diff options
Diffstat (limited to 'lib/Target/ARM')
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 8 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 16 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb.td | 6 | ||||
| -rw-r--r-- | lib/Target/ARM/ARMRegisterInfo.cpp | 5 |
4 files changed, 20 insertions, 15 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index fd25502..d1cd8c0 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -605,10 +605,10 @@ SDOperand ARMTargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) { Chain = DAG.getNode(CallOpc, NodeTys, &Ops[0], Ops.size()); InFlag = Chain.getValue(1); - SDOperand CSOps[] = { Chain, DAG.getConstant(NumBytes, MVT::i32), InFlag }; - Chain = DAG.getNode(ISD::CALLSEQ_END, - DAG.getNodeValueTypes(MVT::Other, MVT::Flag), - ((RetVT != MVT::Other) ? 2 : 1), CSOps, 3); + Chain = DAG.getCALLSEQ_END(Chain, + DAG.getConstant(NumBytes, MVT::i32), + DAG.getConstant(0, MVT::i32), + InFlag); if (RetVT != MVT::Other) InFlag = Chain.getValue(1); diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 8ff610e..ff82ec4 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -17,7 +17,9 @@ // // Type profiles. -def SDT_ARMCallSeq : SDTypeProfile<0, 1, [ SDTCisVT<0, i32> ]>; +def SDT_ARMCallSeq_start : SDTypeProfile<0, 1, [ SDTCisVT<0, i32> ]>; +def SDT_ARMCallSeq_end : SDTypeProfile<0, 2, [ SDTCisVT<0, i32>, + SDTCisVT<1, i32> ]>; def SDT_ARMSaveCallPC : SDTypeProfile<0, 1, []>; @@ -45,10 +47,10 @@ def SDT_ARMThreadPointer : SDTypeProfile<1, 0, [SDTCisPtrTy<0>]>; def ARMWrapper : SDNode<"ARMISD::Wrapper", SDTIntUnaryOp>; def ARMWrapperJT : SDNode<"ARMISD::WrapperJT", SDTIntBinOp>; -def ARMcallseq_start : SDNode<"ISD::CALLSEQ_START", SDT_ARMCallSeq, +def ARMcallseq_start : SDNode<"ISD::CALLSEQ_START", SDT_ARMCallSeq_start, [SDNPHasChain, SDNPOutFlag]>; -def ARMcallseq_end : SDNode<"ISD::CALLSEQ_END", SDT_ARMCallSeq, - [SDNPHasChain, SDNPInFlag, SDNPOutFlag]>; +def ARMcallseq_end : SDNode<"ISD::CALLSEQ_END", SDT_ARMCallSeq_end, + [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; def ARMcall : SDNode<"ARMISD::CALL", SDT_ARMcall, [SDNPHasChain, SDNPOptInFlag, SDNPOutFlag]>; @@ -663,9 +665,9 @@ PseudoInst<(outs), (ins cpinst_operand:$instid, cpinst_operand:$cpidx, let Defs = [SP], Uses = [SP] in { def ADJCALLSTACKUP : -PseudoInst<(outs), (ins i32imm:$amt, pred:$p), - "@ ADJCALLSTACKUP $amt", - [(ARMcallseq_end imm:$amt)]>; +PseudoInst<(outs), (ins i32imm:$amt1, i32imm:$amt2, pred:$p), + "@ ADJCALLSTACKUP $amt1", + [(ARMcallseq_end imm:$amt1, imm:$amt2)]>; def ADJCALLSTACKDOWN : PseudoInst<(outs), (ins i32imm:$amt, pred:$p), diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td index bc8161a..7cfec81 100644 --- a/lib/Target/ARM/ARMInstrThumb.td +++ b/lib/Target/ARM/ARMInstrThumb.td @@ -162,9 +162,9 @@ def t_addrmode_sp : Operand<i32>, let Defs = [SP], Uses = [SP] in { def tADJCALLSTACKUP : -PseudoInst<(outs), (ins i32imm:$amt), - "@ tADJCALLSTACKUP $amt", - [(ARMcallseq_end imm:$amt)]>, Requires<[IsThumb]>; +PseudoInst<(outs), (ins i32imm:$amt1, i32imm:$amt2), + "@ tADJCALLSTACKUP $amt1", + [(ARMcallseq_end imm:$amt1, imm:$amt2)]>, Requires<[IsThumb]>; def tADJCALLSTACKDOWN : PseudoInst<(outs), (ins i32imm:$amt), diff --git a/lib/Target/ARM/ARMRegisterInfo.cpp b/lib/Target/ARM/ARMRegisterInfo.cpp index 0d0f1d0..b4cd0c7 100644 --- a/lib/Target/ARM/ARMRegisterInfo.cpp +++ b/lib/Target/ARM/ARMRegisterInfo.cpp @@ -769,10 +769,13 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, bool isThumb = AFI->isThumbFunction(); ARMCC::CondCodes Pred = isThumb ? ARMCC::AL : (ARMCC::CondCodes)Old->getOperand(1).getImmedValue(); - unsigned PredReg = isThumb ? 0 : Old->getOperand(2).getReg(); if (Opc == ARM::ADJCALLSTACKDOWN || Opc == ARM::tADJCALLSTACKDOWN) { + // Note: PredReg is operand 2 for ADJCALLSTACKDOWN. + unsigned PredReg = isThumb ? 0 : Old->getOperand(2).getReg(); emitSPUpdate(MBB, I, -Amount, Pred, PredReg, isThumb, TII); } else { + // Note: PredReg is operand 3 for ADJCALLSTACKUP. + unsigned PredReg = isThumb ? 0 : Old->getOperand(3).getReg(); assert(Opc == ARM::ADJCALLSTACKUP || Opc == ARM::tADJCALLSTACKUP); emitSPUpdate(MBB, I, Amount, Pred, PredReg, isThumb, TII); } |