diff options
Diffstat (limited to 'lib/Target/CellSPU')
| -rw-r--r-- | lib/Target/CellSPU/CMakeLists.txt | 12 | ||||
| -rw-r--r-- | lib/Target/CellSPU/LLVMBuild.txt | 4 | ||||
| -rw-r--r-- | lib/Target/CellSPU/MCTargetDesc/CMakeLists.txt | 5 | ||||
| -rw-r--r-- | lib/Target/CellSPU/MCTargetDesc/LLVMBuild.txt | 1 | ||||
| -rw-r--r-- | lib/Target/CellSPU/SPUFrameLowering.cpp | 3 | ||||
| -rw-r--r-- | lib/Target/CellSPU/SPUISelLowering.cpp | 10 | ||||
| -rw-r--r-- | lib/Target/CellSPU/SPUTargetMachine.cpp | 3 | ||||
| -rw-r--r-- | lib/Target/CellSPU/SPUTargetMachine.h | 2 | ||||
| -rw-r--r-- | lib/Target/CellSPU/TargetInfo/CMakeLists.txt | 6 | ||||
| -rw-r--r-- | lib/Target/CellSPU/TargetInfo/LLVMBuild.txt | 1 |
10 files changed, 18 insertions, 29 deletions
diff --git a/lib/Target/CellSPU/CMakeLists.txt b/lib/Target/CellSPU/CMakeLists.txt index b442a5c..6c67c2d 100644 --- a/lib/Target/CellSPU/CMakeLists.txt +++ b/lib/Target/CellSPU/CMakeLists.txt @@ -23,17 +23,5 @@ add_llvm_target(CellSPUCodeGen SPUNopFiller.cpp ) -add_llvm_library_dependencies(LLVMCellSPUCodeGen - LLVMAsmPrinter - LLVMCellSPUDesc - LLVMCellSPUInfo - LLVMCodeGen - LLVMCore - LLVMMC - LLVMSelectionDAG - LLVMSupport - LLVMTarget - ) - add_subdirectory(TargetInfo) add_subdirectory(MCTargetDesc) diff --git a/lib/Target/CellSPU/LLVMBuild.txt b/lib/Target/CellSPU/LLVMBuild.txt index 4ae26b2..277620b 100644 --- a/lib/Target/CellSPU/LLVMBuild.txt +++ b/lib/Target/CellSPU/LLVMBuild.txt @@ -15,6 +15,9 @@ ; ;===------------------------------------------------------------------------===; +[common] +subdirectories = MCTargetDesc TargetInfo + [component_0] type = TargetGroup name = CellSPU @@ -27,4 +30,3 @@ name = CellSPUCodeGen parent = CellSPU required_libraries = AsmPrinter CellSPUDesc CellSPUInfo CodeGen Core MC SelectionDAG Support Target add_to_library_groups = CellSPU - diff --git a/lib/Target/CellSPU/MCTargetDesc/CMakeLists.txt b/lib/Target/CellSPU/MCTargetDesc/CMakeLists.txt index d41fe93..0027bdb 100644 --- a/lib/Target/CellSPU/MCTargetDesc/CMakeLists.txt +++ b/lib/Target/CellSPU/MCTargetDesc/CMakeLists.txt @@ -3,9 +3,4 @@ add_llvm_library(LLVMCellSPUDesc SPUMCAsmInfo.cpp ) -add_llvm_library_dependencies(LLVMCellSPUDesc - LLVMCellSPUInfo - LLVMMC - ) - add_dependencies(LLVMCellSPUDesc CellSPUCommonTableGen) diff --git a/lib/Target/CellSPU/MCTargetDesc/LLVMBuild.txt b/lib/Target/CellSPU/MCTargetDesc/LLVMBuild.txt index abc44a2..71e5bbc 100644 --- a/lib/Target/CellSPU/MCTargetDesc/LLVMBuild.txt +++ b/lib/Target/CellSPU/MCTargetDesc/LLVMBuild.txt @@ -21,4 +21,3 @@ name = CellSPUDesc parent = CellSPU required_libraries = CellSPUInfo MC add_to_library_groups = CellSPU - diff --git a/lib/Target/CellSPU/SPUFrameLowering.cpp b/lib/Target/CellSPU/SPUFrameLowering.cpp index 093f99f..916f9ba 100644 --- a/lib/Target/CellSPU/SPUFrameLowering.cpp +++ b/lib/Target/CellSPU/SPUFrameLowering.cpp @@ -47,7 +47,8 @@ bool SPUFrameLowering::hasFP(const MachineFunction &MF) const { const MachineFrameInfo *MFI = MF.getFrameInfo(); return MFI->getStackSize() && - (DisableFramePointerElim(MF) || MFI->hasVarSizedObjects()); + (MF.getTarget().Options.DisableFramePointerElim(MF) || + MFI->hasVarSizedObjects()); } diff --git a/lib/Target/CellSPU/SPUISelLowering.cpp b/lib/Target/CellSPU/SPUISelLowering.cpp index d58e49b..dc0d5a6 100644 --- a/lib/Target/CellSPU/SPUISelLowering.cpp +++ b/lib/Target/CellSPU/SPUISelLowering.cpp @@ -296,12 +296,22 @@ SPUTargetLowering::SPUTargetLowering(SPUTargetMachine &TM) setOperationAction(ISD::CTTZ , MVT::i32, Expand); setOperationAction(ISD::CTTZ , MVT::i64, Expand); setOperationAction(ISD::CTTZ , MVT::i128, Expand); + setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i8, Expand); + setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i16, Expand); + setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i32, Expand); + setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i64, Expand); + setOperationAction(ISD::CTTZ_ZERO_UNDEF, MVT::i128, Expand); setOperationAction(ISD::CTLZ , MVT::i8, Promote); setOperationAction(ISD::CTLZ , MVT::i16, Promote); setOperationAction(ISD::CTLZ , MVT::i32, Legal); setOperationAction(ISD::CTLZ , MVT::i64, Expand); setOperationAction(ISD::CTLZ , MVT::i128, Expand); + setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i8, Expand); + setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i16, Expand); + setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i32, Expand); + setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i64, Expand); + setOperationAction(ISD::CTLZ_ZERO_UNDEF, MVT::i128, Expand); // SPU has a version of select that implements (a&~c)|(b&c), just like // select ought to work: diff --git a/lib/Target/CellSPU/SPUTargetMachine.cpp b/lib/Target/CellSPU/SPUTargetMachine.cpp index 6940316..1e922a4 100644 --- a/lib/Target/CellSPU/SPUTargetMachine.cpp +++ b/lib/Target/CellSPU/SPUTargetMachine.cpp @@ -34,9 +34,10 @@ SPUFrameLowering::getCalleeSaveSpillSlots(unsigned &NumEntries) const { SPUTargetMachine::SPUTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, + const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) - : LLVMTargetMachine(T, TT, CPU, FS, RM, CM, OL), + : LLVMTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL), Subtarget(TT, CPU, FS), DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this), diff --git a/lib/Target/CellSPU/SPUTargetMachine.h b/lib/Target/CellSPU/SPUTargetMachine.h index 909f12e..0841fee 100644 --- a/lib/Target/CellSPU/SPUTargetMachine.h +++ b/lib/Target/CellSPU/SPUTargetMachine.h @@ -39,7 +39,7 @@ class SPUTargetMachine : public LLVMTargetMachine { InstrItineraryData InstrItins; public: SPUTargetMachine(const Target &T, StringRef TT, - StringRef CPU, StringRef FS, + StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL); diff --git a/lib/Target/CellSPU/TargetInfo/CMakeLists.txt b/lib/Target/CellSPU/TargetInfo/CMakeLists.txt index 3f2d6b09..6a98f95 100644 --- a/lib/Target/CellSPU/TargetInfo/CMakeLists.txt +++ b/lib/Target/CellSPU/TargetInfo/CMakeLists.txt @@ -4,10 +4,4 @@ add_llvm_library(LLVMCellSPUInfo CellSPUTargetInfo.cpp ) -add_llvm_library_dependencies(LLVMCellSPUInfo - LLVMMC - LLVMSupport - LLVMTarget - ) - add_dependencies(LLVMCellSPUInfo CellSPUCommonTableGen) diff --git a/lib/Target/CellSPU/TargetInfo/LLVMBuild.txt b/lib/Target/CellSPU/TargetInfo/LLVMBuild.txt index 0710cc3..6937e70 100644 --- a/lib/Target/CellSPU/TargetInfo/LLVMBuild.txt +++ b/lib/Target/CellSPU/TargetInfo/LLVMBuild.txt @@ -21,4 +21,3 @@ name = CellSPUInfo parent = CellSPU required_libraries = MC Support Target add_to_library_groups = CellSPU - |