diff options
Diffstat (limited to 'lib/Target/MSP430')
| -rw-r--r-- | lib/Target/MSP430/MSP430RegisterInfo.td | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/lib/Target/MSP430/MSP430RegisterInfo.td b/lib/Target/MSP430/MSP430RegisterInfo.td index bacc1c0..80db8b0 100644 --- a/lib/Target/MSP430/MSP430RegisterInfo.td +++ b/lib/Target/MSP430/MSP430RegisterInfo.td @@ -60,16 +60,16 @@ def R13W : MSP430RegWithSubregs<13, "r13", [R13B]>; def R14W : MSP430RegWithSubregs<14, "r14", [R14B]>; def R15W : MSP430RegWithSubregs<15, "r15", [R15B]>; -def : SubRegSet<1, [PCW, SPW, SRW, CGW, FPW, - R5W, R6W, R7W, R8W, R9W, R10W, R11W, R12W, R13W, R14W, R15W], - [PCB, SPB, SRB, CGB, FPB, - R5B, R6B, R7B, R8B, R9B, R10B, R11B, R12B, R13B, R14B, R15B]>; - def subreg_8bit : SubRegIndex { let NumberHack = 1; let Namespace = "MSP430"; } +def : SubRegSet<subreg_8bit, [PCW, SPW, SRW, CGW, FPW, R5W, R6W, R7W, + R8W, R9W, R10W, R11W, R12W, R13W, R14W, R15W], + [PCB, SPB, SRB, CGB, FPB, R5B, R6B, R7B, + R8B, R9B, R10B, R11B, R12B, R13B, R14B, R15B]>; + def GR8 : RegisterClass<"MSP430", [i8], 8, // Volatile registers [R12B, R13B, R14B, R15B, R11B, R10B, R9B, R8B, R7B, R6B, R5B, |