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-rw-r--r--lib/Target/Mips/MipsInstrFPU.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Mips/MipsInstrFPU.td b/lib/Target/Mips/MipsInstrFPU.td
index b6a6d2f..bd61738 100644
--- a/lib/Target/Mips/MipsInstrFPU.td
+++ b/lib/Target/Mips/MipsInstrFPU.td
@@ -253,7 +253,7 @@ let hasDelaySlot = 1, Defs=[FCR31] in {
// For some explanation, see Select_CC at MipsInstrInfo.td. We also embedd a
// condiciton code to enable easy handling by the Custom Inserter.
-let usesCustomDAGSchedInserter = 1, Uses=[FCR31] in {
+let usesCustomInserter = 1, Uses=[FCR31] in {
class PseudoFPSelCC<RegisterClass RC, string asmstr> :
MipsPseudo<(outs RC:$dst),
(ins CPURegs:$CmpRes, RC:$T, RC:$F, condcode:$cc), asmstr,