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-rw-r--r--lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp12
-rw-r--r--lib/Target/Mips/MipsISelLowering.cpp14
-rw-r--r--lib/Target/Mips/MipsInstrInfo.cpp4
-rw-r--r--lib/Target/Mips/MipsInstrInfo.h2
-rw-r--r--lib/Target/Mips/MipsRegisterInfo.cpp8
5 files changed, 20 insertions, 20 deletions
diff --git a/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp b/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
index 9768710..7a0e5e8 100644
--- a/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
+++ b/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
@@ -216,7 +216,7 @@ emitCurrentABIString(void)
default: break;
}
- LLVM_UNREACHABLE("Unknown Mips ABI");
+ llvm_unreachable("Unknown Mips ABI");
return NULL;
}
@@ -406,7 +406,7 @@ printOperand(const MachineInstr *MI, int opNum)
break;
default:
- LLVM_UNREACHABLE("<unknown operand type>");
+ llvm_unreachable("<unknown operand type>");
}
if (closeP) O << ")";
@@ -545,13 +545,13 @@ printModuleLevelGV(const GlobalVariable* GVar) {
printSizeAndType = false;
break;
case GlobalValue::GhostLinkage:
- LLVM_UNREACHABLE("Should not have any unmaterialized functions!");
+ llvm_unreachable("Should not have any unmaterialized functions!");
case GlobalValue::DLLImportLinkage:
- LLVM_UNREACHABLE("DLLImport linkage is not supported by this target!");
+ llvm_unreachable("DLLImport linkage is not supported by this target!");
case GlobalValue::DLLExportLinkage:
- LLVM_UNREACHABLE("DLLExport linkage is not supported by this target!");
+ llvm_unreachable("DLLExport linkage is not supported by this target!");
default:
- LLVM_UNREACHABLE("Unknown linkage type!");
+ llvm_unreachable("Unknown linkage type!");
}
EmitAlignment(Align, GVar);
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp
index f3fa179..0b10c9a 100644
--- a/lib/Target/Mips/MipsISelLowering.cpp
+++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -248,7 +248,7 @@ static Mips::FPBranchCode GetFPBranchCodeFromCond(Mips::CondCode CC) {
static unsigned FPBranchCodeToOpc(Mips::FPBranchCode BC) {
switch(BC) {
default:
- LLVM_UNREACHABLE("Unknown branch code");
+ llvm_unreachable("Unknown branch code");
case Mips::BRANCH_T : return Mips::BC1T;
case Mips::BRANCH_F : return Mips::BC1F;
case Mips::BRANCH_TL : return Mips::BC1TL;
@@ -258,7 +258,7 @@ static unsigned FPBranchCodeToOpc(Mips::FPBranchCode BC) {
static Mips::CondCode FPCondCCodeToFCC(ISD::CondCode CC) {
switch (CC) {
- default: LLVM_UNREACHABLE("Unknown fp condition code!");
+ default: llvm_unreachable("Unknown fp condition code!");
case ISD::SETEQ:
case ISD::SETOEQ: return Mips::FCOND_EQ;
case ISD::SETUNE: return Mips::FCOND_OGL;
@@ -542,14 +542,14 @@ LowerGlobalAddress(SDValue Op, SelectionDAG &DAG)
return DAG.getNode(ISD::ADD, dl, MVT::i32, ResNode, Lo);
}
- LLVM_UNREACHABLE("Dont know how to handle GlobalAddress");
+ llvm_unreachable("Dont know how to handle GlobalAddress");
return SDValue(0,0);
}
SDValue MipsTargetLowering::
LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG)
{
- LLVM_UNREACHABLE("TLS not implemented for MIPS.");
+ llvm_unreachable("TLS not implemented for MIPS.");
return SDValue(); // Not reached
}
@@ -753,7 +753,7 @@ LowerCALL(SDValue Op, SelectionDAG &DAG)
// Promote the value if needed.
switch (VA.getLocInfo()) {
- default: LLVM_UNREACHABLE("Unknown loc info!");
+ default: llvm_unreachable("Unknown loc info!");
case CCValAssign::Full:
if (Subtarget->isABI_O32() && VA.isRegLoc()) {
if (VA.getValVT() == MVT::f32 && VA.getLocVT() == MVT::i32)
@@ -978,7 +978,7 @@ LowerFORMAL_ARGUMENTS(SDValue Op, SelectionDAG &DAG)
if (!Subtarget->isSingleFloat())
RC = Mips::AFGR64RegisterClass;
} else
- LLVM_UNREACHABLE("RegVT not supported by FORMAL_ARGUMENTS Lowering");
+ llvm_unreachable("RegVT not supported by FORMAL_ARGUMENTS Lowering");
// Transform the arguments stored on
// physical registers into virtual ones
@@ -1140,7 +1140,7 @@ LowerRET(SDValue Op, SelectionDAG &DAG)
unsigned Reg = MipsFI->getSRetReturnReg();
if (!Reg)
- LLVM_UNREACHABLE("sret virtual register not created in the entry block");
+ llvm_unreachable("sret virtual register not created in the entry block");
SDValue Val = DAG.getCopyFromReg(Chain, dl, Reg, getPointerTy());
Chain = DAG.getCopyToReg(Chain, dl, Mips::V0, Val, Flag);
diff --git a/lib/Target/Mips/MipsInstrInfo.cpp b/lib/Target/Mips/MipsInstrInfo.cpp
index 1150765..34b5a6e 100644
--- a/lib/Target/Mips/MipsInstrInfo.cpp
+++ b/lib/Target/Mips/MipsInstrInfo.cpp
@@ -373,7 +373,7 @@ static Mips::CondCode GetCondFromBranchOpc(unsigned BrOpc)
unsigned Mips::GetCondBranchFromCond(Mips::CondCode CC)
{
switch (CC) {
- default: LLVM_UNREACHABLE("Illegal condition code!");
+ default: llvm_unreachable("Illegal condition code!");
case Mips::COND_E : return Mips::BEQ;
case Mips::COND_NE : return Mips::BNE;
case Mips::COND_GZ : return Mips::BGTZ;
@@ -422,7 +422,7 @@ unsigned Mips::GetCondBranchFromCond(Mips::CondCode CC)
Mips::CondCode Mips::GetOppositeBranchCondition(Mips::CondCode CC)
{
switch (CC) {
- default: LLVM_UNREACHABLE("Illegal condition code!");
+ default: llvm_unreachable("Illegal condition code!");
case Mips::COND_E : return Mips::COND_NE;
case Mips::COND_NE : return Mips::COND_E;
case Mips::COND_GZ : return Mips::COND_LEZ;
diff --git a/lib/Target/Mips/MipsInstrInfo.h b/lib/Target/Mips/MipsInstrInfo.h
index 9c47d8e..1fb678f 100644
--- a/lib/Target/Mips/MipsInstrInfo.h
+++ b/lib/Target/Mips/MipsInstrInfo.h
@@ -93,7 +93,7 @@ namespace Mips {
inline static const char *MipsFCCToString(Mips::CondCode CC)
{
switch (CC) {
- default: LLVM_UNREACHABLE("Unknown condition code");
+ default: llvm_unreachable("Unknown condition code");
case FCOND_F:
case FCOND_T: return "f";
case FCOND_UN:
diff --git a/lib/Target/Mips/MipsRegisterInfo.cpp b/lib/Target/Mips/MipsRegisterInfo.cpp
index 816d7c7..c7aea69 100644
--- a/lib/Target/Mips/MipsRegisterInfo.cpp
+++ b/lib/Target/Mips/MipsRegisterInfo.cpp
@@ -80,7 +80,7 @@ getRegisterNumbering(unsigned RegEnum)
case Mips::SP : case Mips::F29: return 29;
case Mips::FP : case Mips::F30: case Mips::D15: return 30;
case Mips::RA : case Mips::F31: return 31;
- default: LLVM_UNREACHABLE("Unknown register number!");
+ default: llvm_unreachable("Unknown register number!");
}
return 0; // Not reached
}
@@ -516,19 +516,19 @@ getFrameRegister(MachineFunction &MF) const {
unsigned MipsRegisterInfo::
getEHExceptionRegister() const {
- LLVM_UNREACHABLE("What is the exception register");
+ llvm_unreachable("What is the exception register");
return 0;
}
unsigned MipsRegisterInfo::
getEHHandlerRegister() const {
- LLVM_UNREACHABLE("What is the exception handler register");
+ llvm_unreachable("What is the exception handler register");
return 0;
}
int MipsRegisterInfo::
getDwarfRegNum(unsigned RegNum, bool isEH) const {
- LLVM_UNREACHABLE("What is the dwarf register number");
+ llvm_unreachable("What is the dwarf register number");
return -1;
}
generated by cgit v1.1 at 2025-08-16 02:29:11 +0000