4 files changed, 7 insertions, 7 deletions
diff --git a/lib/Target/PowerPC/PPCHazardRecognizers.cpp b/lib/Target/PowerPC/PPCHazardRecognizers.cpp
index 03570aa..f081d14 100644
--- a/lib/Target/PowerPC/PPCHazardRecognizers.cpp
+++ b/lib/Target/PowerPC/PPCHazardRecognizers.cpp
@@ -72,7 +72,7 @@ PPCHazardRecognizer970::GetInstrType(unsigned Opcode,
   
   const TargetInstrDescriptor &TID = TII.get(Opcode);
   
-  isLoad  = TID.Flags & M_LOAD_FLAG;
+  isLoad  = TID.isSimpleLoad();
   isStore = TID.Flags & M_MAY_STORE_FLAG;
   
   unsigned TSFlags = TID.TSFlags;
diff --git a/lib/Target/PowerPC/PPCInstr64Bit.td b/lib/Target/PowerPC/PPCInstr64Bit.td
index 8016783..4e6348d 100644
--- a/lib/Target/PowerPC/PPCInstr64Bit.td
+++ b/lib/Target/PowerPC/PPCInstr64Bit.td
@@ -365,7 +365,7 @@ def RLDICR : MDForm_1<30, 1,
 
 
 // Sign extending loads.
-let isLoad = 1, PPC970_Unit = 2 in {
+let isSimpleLoad = 1, PPC970_Unit = 2 in {
 def LHA8: DForm_1<42, (outs G8RC:$rD), (ins memri:$src),
                   "lha $rD, $src", LdStLHA,
                   [(set G8RC:$rD, (sextloadi16 iaddr:$src))]>,
@@ -394,7 +394,7 @@ def LHAU8 : DForm_1<43, (outs G8RC:$rD, ptr_rc:$ea_result), (ins symbolLo:$disp,
 }
 
 // Zero extending loads.
-let isLoad = 1, PPC970_Unit = 2 in {
+let isSimpleLoad = 1, PPC970_Unit = 2 in {
 def LBZ8 : DForm_1<34, (outs G8RC:$rD), (ins memri:$src),
                   "lbz $rD, $src", LdStGeneral,
                   [(set G8RC:$rD, (zextloadi8 iaddr:$src))]>;
@@ -433,7 +433,7 @@ def LWZU8 : DForm_1<33, (outs G8RC:$rD, ptr_rc:$ea_result), (ins memri:$addr),
 
 
 // Full 8-byte loads.
-let isLoad = 1, PPC970_Unit = 2 in {
+let isSimpleLoad = 1, PPC970_Unit = 2 in {
 def LD   : DSForm_1<58, 0, (outs G8RC:$rD), (ins memrix:$src),
                     "ld $rD, $src", LdStLD,
                     [(set G8RC:$rD, (load ixaddr:$src))]>, isPPC64;
diff --git a/lib/Target/PowerPC/PPCInstrAltivec.td b/lib/Target/PowerPC/PPCInstrAltivec.td
index 7aaf035..c006ce0 100644
--- a/lib/Target/PowerPC/PPCInstrAltivec.td
+++ b/lib/Target/PowerPC/PPCInstrAltivec.td
@@ -202,7 +202,7 @@ def MTVSCR : VXForm_5<1604, (outs), (ins VRRC:$vB),
                       "mtvscr $vB", LdStGeneral,
                       [(int_ppc_altivec_mtvscr VRRC:$vB)]>; 
 
-let isLoad = 1, PPC970_Unit = 2 in {  // Loads.
+let isSimpleLoad = 1, PPC970_Unit = 2 in {  // Loads.
 def LVEBX: XForm_1<31,   7, (outs VRRC:$vD), (ins memrr:$src),
                    "lvebx $vD, $src", LdStGeneral,
                    [(set VRRC:$vD, (int_ppc_altivec_lvebx xoaddr:$src))]>;
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td
index dc1ba09..7b69d28 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/lib/Target/PowerPC/PPCInstrInfo.td
@@ -474,7 +474,7 @@ def DCBZL  : DCB_Form<1014, 1, (outs), (ins memrr:$dst),
 //
 
 // Unindexed (r+i) Loads. 
-let isLoad = 1, PPC970_Unit = 2 in {
+let isSimpleLoad = 1, PPC970_Unit = 2 in {
 def LBZ : DForm_1<34, (outs GPRC:$rD), (ins memri:$src),
                   "lbz $rD, $src", LdStGeneral,
                   [(set GPRC:$rD, (zextloadi8 iaddr:$src))]>;
@@ -531,7 +531,7 @@ def LFDU : DForm_1<51, (outs F8RC:$rD, ptr_rc:$ea_result), (ins memri:$addr),
 
 // Indexed (r+r) Loads.
 //
-let isLoad = 1, PPC970_Unit = 2 in {
+let isSimpleLoad = 1, PPC970_Unit = 2 in {
 def LBZX : XForm_1<31,  87, (outs GPRC:$rD), (ins memrr:$src),
                    "lbzx $rD, $src", LdStGeneral,
                    [(set GPRC:$rD, (zextloadi8 xaddr:$src))]>;