diff options
Diffstat (limited to 'lib/Target/R600/AMDGPUInstrInfo.h')
| -rw-r--r-- | lib/Target/R600/AMDGPUInstrInfo.h | 23 |
1 files changed, 11 insertions, 12 deletions
diff --git a/lib/Target/R600/AMDGPUInstrInfo.h b/lib/Target/R600/AMDGPUInstrInfo.h index c83e57d..dc65d4e 100644 --- a/lib/Target/R600/AMDGPUInstrInfo.h +++ b/lib/Target/R600/AMDGPUInstrInfo.h @@ -87,6 +87,8 @@ public: unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const; + virtual bool expandPostRAPseudo(MachineBasicBlock::iterator MI) const; + protected: MachineInstr *foldMemoryOperandImpl(MachineFunction &MF, @@ -160,14 +162,9 @@ public: virtual unsigned calculateIndirectAddress(unsigned RegIndex, unsigned Channel) const = 0; - /// \returns The register class to be used for storing values to an - /// "Indirect Address" . - virtual const TargetRegisterClass *getIndirectAddrStoreRegClass( - unsigned SourceReg) const = 0; - - /// \returns The register class to be used for loading values from - /// an "Indirect Address" . - virtual const TargetRegisterClass *getIndirectAddrLoadRegClass() const = 0; + /// \returns The register class to be used for loading and storing values + /// from an "Indirect Address" . + virtual const TargetRegisterClass *getIndirectAddrRegClass() const = 0; /// \brief Build instruction(s) for an indirect register write. /// @@ -185,19 +182,21 @@ public: unsigned ValueReg, unsigned Address, unsigned OffsetReg) const = 0; - /// \returns the register class whose sub registers are the set of all - /// possible registers that can be used for indirect addressing. - virtual const TargetRegisterClass *getSuperIndirectRegClass() const = 0; - /// \brief Convert the AMDIL MachineInstr to a supported ISA /// MachineInstr virtual void convertToISA(MachineInstr & MI, MachineFunction &MF, DebugLoc DL) const; + /// \brief Build a MOV instruction. + virtual MachineInstr *buildMovInstr(MachineBasicBlock *MBB, + MachineBasicBlock::iterator I, + unsigned DstReg, unsigned SrcReg) const = 0; + /// \brief Given a MIMG \p Opcode that writes all 4 channels, return the /// equivalent opcode that writes \p Channels Channels. int getMaskedMIMGOp(uint16_t Opcode, unsigned Channels) const; + }; namespace AMDGPU { |