diff options
Diffstat (limited to 'lib/Target/X86')
-rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 8 | ||||
-rw-r--r-- | lib/Target/X86/X86IntelAsmPrinter.cpp | 3 | ||||
-rw-r--r-- | lib/Target/X86/X86Subtarget.cpp | 3 | ||||
-rw-r--r-- | lib/Target/X86/X86TargetMachine.cpp | 8 |
4 files changed, 14 insertions, 8 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 61a4d7a..b5e91ce 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -1029,12 +1029,13 @@ bool X86TargetLowering::IsCalleePop(SDOperand Op) { CCAssignFn *X86TargetLowering::CCAssignFnForNode(SDOperand Op) const { unsigned CC = cast<ConstantSDNode>(Op.getOperand(1))->getValue(); - if (Subtarget->is64Bit()) + if (Subtarget->is64Bit()) { if (CC == CallingConv::Fast && PerformTailCallOpt) return CC_X86_64_TailCall; else return CC_X86_64_C; - + } + if (CC == CallingConv::X86_FastCall) return CC_X86_32_FastCall; else if (CC == CallingConv::Fast && PerformTailCallOpt) @@ -3358,11 +3359,12 @@ SDOperand RewriteAsNarrowerShuffle(SDOperand V1, SDOperand V2, default: assert(false && "Unexpected!"); } - if (NewWidth == 2) + if (NewWidth == 2) { if (MVT::isInteger(VT)) NewVT = MVT::v2i64; else NewVT = MVT::v2f64; + } unsigned Scale = NumElems / NewWidth; SmallVector<SDOperand, 8> MaskVec; for (unsigned i = 0; i < NumElems; i += Scale) { diff --git a/lib/Target/X86/X86IntelAsmPrinter.cpp b/lib/Target/X86/X86IntelAsmPrinter.cpp index 804790d..64013fc 100644 --- a/lib/Target/X86/X86IntelAsmPrinter.cpp +++ b/lib/Target/X86/X86IntelAsmPrinter.cpp @@ -221,13 +221,14 @@ void X86IntelAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op, } else { int DispVal = DispSpec.getImm(); if (DispVal || (!BaseReg.getReg() && !IndexReg.getReg())) { - if (NeedPlus) + if (NeedPlus) { if (DispVal > 0) O << " + "; else { O << " - "; DispVal = -DispVal; } + } O << DispVal; } } diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp index fb46cfc..019b65c 100644 --- a/lib/Target/X86/X86Subtarget.cpp +++ b/lib/Target/X86/X86Subtarget.cpp @@ -36,7 +36,7 @@ bool X86Subtarget::GVRequiresExtraLoad(const GlobalValue* GV, bool isDirectCall) const { // FIXME: PIC - if (TM.getRelocationModel() != Reloc::Static) + if (TM.getRelocationModel() != Reloc::Static) { if (isTargetDarwin()) { return (!isDirectCall && (GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() || @@ -48,6 +48,7 @@ bool X86Subtarget::GVRequiresExtraLoad(const GlobalValue* GV, } else if (isTargetCygMing() || isTargetWindows()) { return (GV->hasDLLImportLinkage()); } + } return false; } diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp index 3c527c5..850eb38 100644 --- a/lib/Target/X86/X86TargetMachine.cpp +++ b/lib/Target/X86/X86TargetMachine.cpp @@ -119,11 +119,12 @@ X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS, Subtarget.getStackAlignment(), Subtarget.is64Bit() ? -8 : -4), InstrInfo(*this), JITInfo(*this), TLInfo(*this) { DefRelocModel = getRelocationModel(); - if (getRelocationModel() == Reloc::Default) + if (getRelocationModel() == Reloc::Default) { if (Subtarget.isTargetDarwin() || Subtarget.isTargetCygMing()) setRelocationModel(Reloc::DynamicNoPIC); else setRelocationModel(Reloc::Static); + } if (Subtarget.is64Bit()) { // No DynamicNoPIC support under X86-64. if (getRelocationModel() == Reloc::DynamicNoPIC) @@ -135,16 +136,17 @@ X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS, if (Subtarget.isTargetCygMing()) Subtarget.setPICStyle(PICStyle::WinPIC); - else if (Subtarget.isTargetDarwin()) + else if (Subtarget.isTargetDarwin()) { if (Subtarget.is64Bit()) Subtarget.setPICStyle(PICStyle::RIPRel); else Subtarget.setPICStyle(PICStyle::Stub); - else if (Subtarget.isTargetELF()) + } else if (Subtarget.isTargetELF()) { if (Subtarget.is64Bit()) Subtarget.setPICStyle(PICStyle::RIPRel); else Subtarget.setPICStyle(PICStyle::GOT); + } } //===----------------------------------------------------------------------===// |