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-rw-r--r--lib/Target/XCore/XCoreInstrInfo.cpp2
-rw-r--r--lib/Target/XCore/XCoreRegisterInfo.cpp12
2 files changed, 7 insertions, 7 deletions
diff --git a/lib/Target/XCore/XCoreInstrInfo.cpp b/lib/Target/XCore/XCoreInstrInfo.cpp
index e328b46..0402f59 100644
--- a/lib/Target/XCore/XCoreInstrInfo.cpp
+++ b/lib/Target/XCore/XCoreInstrInfo.cpp
@@ -397,7 +397,7 @@ void XCoreInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
DebugLoc DL = DebugLoc::getUnknownLoc();
if (I != MBB.end()) DL = I->getDebugLoc();
BuildMI(MBB, I, DL, get(XCore::STWFI))
- .addReg(SrcReg, false, false, isKill)
+ .addReg(SrcReg, getKillRegState(isKill))
.addFrameIndex(FrameIndex)
.addImm(0);
}
diff --git a/lib/Target/XCore/XCoreRegisterInfo.cpp b/lib/Target/XCore/XCoreRegisterInfo.cpp
index ef5f9f9..82cd92d 100644
--- a/lib/Target/XCore/XCoreRegisterInfo.cpp
+++ b/lib/Target/XCore/XCoreRegisterInfo.cpp
@@ -237,18 +237,18 @@ void XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
case XCore::LDWFI:
New = BuildMI(MBB, II, dl, TII.get(XCore::LDW_3r), Reg)
.addReg(FramePtr)
- .addReg(ScratchReg, false, false, true);
+ .addReg(ScratchReg, RegState::Kill);
break;
case XCore::STWFI:
New = BuildMI(MBB, II, dl, TII.get(XCore::STW_3r))
- .addReg(Reg, false, false, isKill)
+ .addReg(Reg, getKillRegState(isKill))
.addReg(FramePtr)
- .addReg(ScratchReg, false, false, true);
+ .addReg(ScratchReg, RegState::Kill);
break;
case XCore::LDAWFI:
New = BuildMI(MBB, II, dl, TII.get(XCore::LDAWF_l3r), Reg)
.addReg(FramePtr)
- .addReg(ScratchReg, false, false, true);
+ .addReg(ScratchReg, RegState::Kill);
break;
default:
assert(0 && "Unexpected Opcode\n");
@@ -262,7 +262,7 @@ void XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
break;
case XCore::STWFI:
New = BuildMI(MBB, II, dl, TII.get(XCore::STW_2rus))
- .addReg(Reg, false, false, isKill)
+ .addReg(Reg, getKillRegState(isKill))
.addReg(FramePtr)
.addImm(Offset);
break;
@@ -293,7 +293,7 @@ void XCoreRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
case XCore::STWFI:
NewOpcode = (isU6) ? XCore::STWSP_ru6 : XCore::STWSP_lru6;
BuildMI(MBB, II, dl, TII.get(NewOpcode))
- .addReg(Reg, false, false, isKill)
+ .addReg(Reg, getKillRegState(isKill))
.addImm(Offset);
break;
case XCore::LDAWFI: