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-rw-r--r--lib/Target/ARM/AsmParser/ARMAsmParser.cpp5
-rw-r--r--lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp6
-rw-r--r--lib/Target/Mips/AsmParser/MipsAsmParser.cpp5
-rw-r--r--lib/Target/X86/AsmParser/X86AsmParser.cpp39
4 files changed, 18 insertions, 37 deletions
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 93e5eca..8181cce 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -7478,12 +7478,9 @@ MatchAndEmitInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out) {
MCInst Inst;
- unsigned Kind;
unsigned ErrorInfo;
unsigned MatchResult;
- MatchInstMapAndConstraints MapAndConstraints;
- MatchResult = MatchInstructionImpl(Operands, Kind, Inst,
- MapAndConstraints, ErrorInfo,
+ MatchResult = MatchInstructionImpl(Operands, Inst, ErrorInfo,
/*matchingInlineAsm*/ false);
switch (MatchResult) {
default: break;
diff --git a/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp b/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp
index d1e18b2..9ef7dd6 100644
--- a/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp
+++ b/lib/Target/MBlaze/AsmParser/MBlazeAsmParser.cpp
@@ -316,11 +316,9 @@ MatchAndEmitInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out) {
MCInst Inst;
- unsigned Kind;
unsigned ErrorInfo;
- MatchInstMapAndConstraints MapAndConstraints;
- switch (MatchInstructionImpl(Operands, Kind, Inst, MapAndConstraints,
- ErrorInfo, /*matchingInlineAsm*/ false)) {
+ switch (MatchInstructionImpl(Operands, Inst, ErrorInfo,
+ /*matchingInlineAsm*/ false)) {
default: break;
case Match_Success:
Out.EmitInstruction(Inst);
diff --git a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
index c2980ff..c94c661 100644
--- a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
+++ b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
@@ -456,11 +456,8 @@ MatchAndEmitInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out) {
MCInst Inst;
- unsigned Kind;
unsigned ErrorInfo;
- MatchInstMapAndConstraints MapAndConstraints;
- unsigned MatchResult = MatchInstructionImpl(Operands, Kind, Inst,
- MapAndConstraints, ErrorInfo,
+ unsigned MatchResult = MatchInstructionImpl(Operands, Inst, ErrorInfo,
/*matchingInlineAsm*/ false);
switch (MatchResult) {
diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp
index df34359..6833266 100644
--- a/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -68,9 +68,8 @@ private:
MCStreamer &Out);
bool MatchInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
- MCStreamer &Out, unsigned &Kind, unsigned &Opcode,
- MatchInstMapAndConstraintsImpl &MapAndConstraints,
- unsigned &OrigErrorInfo, bool matchingInlineAsm = false);
+ MCStreamer &Out, unsigned &Opcode,
+ unsigned &OrigErrorInfo, bool matchingInlineAsm = false);
/// isSrcOp - Returns true if operand is either (%rsi) or %ds:%(rsi)
/// in 64bit mode or (%esi) or %es:(%esi) in 32bit mode.
@@ -1523,21 +1522,17 @@ bool X86AsmParser::
MatchAndEmitInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
MCStreamer &Out) {
- unsigned Kind;
unsigned Opcode;
unsigned ErrorInfo;
- MatchInstMapAndConstraints MapAndConstraints;
- bool Error = MatchInstruction(IDLoc, Operands, Out, Kind, Opcode,
- MapAndConstraints, ErrorInfo);
+ bool Error = MatchInstruction(IDLoc, Operands, Out, Opcode, ErrorInfo);
return Error;
}
bool X86AsmParser::
MatchInstruction(SMLoc IDLoc,
SmallVectorImpl<MCParsedAsmOperand*> &Operands,
- MCStreamer &Out, unsigned &Kind, unsigned &Opcode,
- SmallVectorImpl<std::pair< unsigned, std::string > > &MapAndConstraints,
- unsigned &OrigErrorInfo, bool matchingInlineAsm) {
+ MCStreamer &Out, unsigned &Opcode, unsigned &OrigErrorInfo,
+ bool matchingInlineAsm) {
assert(!Operands.empty() && "Unexpect empty operand list!");
X86Operand *Op = static_cast<X86Operand*>(Operands[0]);
assert(Op->isToken() && "Leading operand should always be a mnemonic!");
@@ -1577,7 +1572,7 @@ MatchInstruction(SMLoc IDLoc,
MCInst Inst;
// First, try a direct match.
- switch (MatchInstructionImpl(Operands, Kind, Inst, MapAndConstraints,
+ switch (MatchInstructionImpl(Operands, Inst,
OrigErrorInfo, matchingInlineAsm,
isParsingIntelSyntax())) {
default: break;
@@ -1629,24 +1624,18 @@ MatchInstruction(SMLoc IDLoc,
Tmp[Base.size()] = Suffixes[0];
unsigned ErrorInfoIgnore;
unsigned Match1, Match2, Match3, Match4;
- unsigned tKind;
- MatchInstMapAndConstraints tMapAndConstraints[4];
- Match1 = MatchInstructionImpl(Operands, tKind, Inst, tMapAndConstraints[0],
- ErrorInfoIgnore, isParsingIntelSyntax());
- if (Match1 == Match_Success) Kind = tKind;
+ Match1 = MatchInstructionImpl(Operands, Inst, ErrorInfoIgnore,
+ isParsingIntelSyntax());
Tmp[Base.size()] = Suffixes[1];
- Match2 = MatchInstructionImpl(Operands, tKind, Inst, tMapAndConstraints[1],
- ErrorInfoIgnore, isParsingIntelSyntax());
- if (Match2 == Match_Success) Kind = tKind;
+ Match2 = MatchInstructionImpl(Operands, Inst, ErrorInfoIgnore,
+ isParsingIntelSyntax());
Tmp[Base.size()] = Suffixes[2];
- Match3 = MatchInstructionImpl(Operands, tKind, Inst, tMapAndConstraints[2],
- ErrorInfoIgnore, isParsingIntelSyntax());
- if (Match3 == Match_Success) Kind = tKind;
+ Match3 = MatchInstructionImpl(Operands, Inst, ErrorInfoIgnore,
+ isParsingIntelSyntax());
Tmp[Base.size()] = Suffixes[3];
- Match4 = MatchInstructionImpl(Operands, tKind, Inst, tMapAndConstraints[3],
- ErrorInfoIgnore, isParsingIntelSyntax());
- if (Match4 == Match_Success) Kind = tKind;
+ Match4 = MatchInstructionImpl(Operands, Inst, ErrorInfoIgnore,
+ isParsingIntelSyntax());
// Restore the old token.
Op->setTokenValue(Base);
generated by cgit v1.1 at 2025-11-14 02:40:01 +0000