diff options
Diffstat (limited to 'lib')
44 files changed, 2142 insertions, 91 deletions
diff --git a/lib/Analysis/Android.mk b/lib/Analysis/Android.mk new file mode 100644 index 0000000..aa4dcc0 --- /dev/null +++ b/lib/Analysis/Android.mk @@ -0,0 +1,89 @@ +LOCAL_PATH:= $(call my-dir) + +analysis_SRC_FILES := \ + AliasAnalysis.cpp \ + AliasAnalysisCounter.cpp \ + AliasAnalysisEvaluator.cpp \ + AliasDebugger.cpp \ + AliasSetTracker.cpp \ + Analysis.cpp \ + BasicAliasAnalysis.cpp \ + BlockFrequency.cpp \ + BranchProbabilityInfo.cpp \ + CFGPrinter.cpp \ + CaptureTracking.cpp \ + ConstantFolding.cpp \ + DIBuilder.cpp \ + DbgInfoPrinter.cpp \ + DebugInfo.cpp \ + DominanceFrontier.cpp \ + DomPrinter.cpp \ + IVUsers.cpp \ + InlineCost.cpp \ + InstCount.cpp \ + InstructionSimplify.cpp \ + Interval.cpp \ + IntervalPartition.cpp \ + LazyValueInfo.cpp \ + LibCallAliasAnalysis.cpp \ + LibCallSemantics.cpp \ + Loads.cpp \ + NoAliasAnalysis.cpp \ + MemDepPrinter.cpp \ + MemoryBuiltins.cpp \ + MemoryDependenceAnalysis.cpp \ + RegionPass.cpp \ + LoopDependenceAnalysis.cpp \ + LoopInfo.cpp \ + LoopPass.cpp \ + PathNumbering.cpp \ + PathProfileInfo.cpp \ + PathProfileVerifier.cpp \ + PHITransAddr.cpp \ + PostDominators.cpp \ + ProfileEstimatorPass.cpp \ + ProfileInfo.cpp \ + ProfileInfoLoader.cpp \ + ProfileInfoLoaderPass.cpp \ + ProfileVerifierPass.cpp \ + ScalarEvolution.cpp \ + ScalarEvolutionAliasAnalysis.cpp \ + ScalarEvolutionExpander.cpp \ + ScalarEvolutionNormalization.cpp \ + SparsePropagation.cpp \ + Trace.cpp \ + TypeBasedAliasAnalysis.cpp \ + ValueTracking.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := \ + $(analysis_SRC_FILES) \ + Lint.cpp \ + ModuleDebugInfoPrinter.cpp \ + RegionInfo.cpp \ + RegionPrinter.cpp + +LOCAL_MODULE:= libLLVMAnalysis + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(analysis_SRC_FILES) + +LOCAL_MODULE:= libLLVMAnalysis + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/Analysis/IPA/Android.mk b/lib/Analysis/IPA/Android.mk new file mode 100644 index 0000000..ffa9f44 --- /dev/null +++ b/lib/Analysis/IPA/Android.mk @@ -0,0 +1,35 @@ +LOCAL_PATH:= $(call my-dir) + +analysis_ipa_SRC_FILES := \ + CallGraph.cpp \ + CallGraphSCCPass.cpp \ + FindUsedTypes.cpp \ + GlobalsModRef.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(analysis_ipa_SRC_FILES) + +LOCAL_MODULE:= libLLVMipa + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(analysis_ipa_SRC_FILES) + +LOCAL_MODULE:= libLLVMipa + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/Analysis/NOTICE b/lib/Analysis/NOTICE new file mode 100644 index 0000000..1b1047c --- /dev/null +++ b/lib/Analysis/NOTICE @@ -0,0 +1,69 @@ +============================================================================== +LLVM Release License +============================================================================== +University of Illinois/NCSA +Open Source License + +Copyright (c) 2003-2011 University of Illinois at Urbana-Champaign. +All rights reserved. + +Developed by: + + LLVM Team + + University of Illinois at Urbana-Champaign + + http://llvm.org + +Permission is hereby granted, free of charge, to any person obtaining a copy of +this software and associated documentation files (the "Software"), to deal with +the Software without restriction, including without limitation the rights to +use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies +of the Software, and to permit persons to whom the Software is furnished to do +so, subject to the following conditions: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimers. + + * Redistributions in binary form must reproduce the above copyright notice, + this list of conditions and the following disclaimers in the + documentation and/or other materials provided with the distribution. + + * Neither the names of the LLVM Team, University of Illinois at + Urbana-Champaign, nor the names of its contributors may be used to + endorse or promote products derived from this Software without specific + prior written permission. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS +FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE +SOFTWARE. + +============================================================================== +Copyrights and Licenses for Third Party Software Distributed with LLVM: +============================================================================== +The LLVM software contains code written by third parties. Such software will +have its own individual LICENSE.TXT file in the directory in which it appears. +This file will describe the copyrights, license, and restrictions which apply +to that code. + +The disclaimer of warranty in the University of Illinois Open Source License +applies to all code in the LLVM Distribution, and nothing in any of the +other licenses gives permission to use the names of the LLVM Team or the +University of Illinois to endorse or promote products derived from this +Software. + +The following pieces of software have additional or alternate copyrights, +licenses, and/or restrictions: + +Program Directory +------- --------- +Autoconf llvm/autoconf + llvm/projects/ModuleMaker/autoconf + llvm/projects/sample/autoconf +CellSPU backend llvm/lib/Target/CellSPU/README.txt +Google Test llvm/utils/unittest/googletest +OpenBSD regex llvm/lib/Support/{reg*, COPYRIGHT.regex} diff --git a/lib/AsmParser/Android.mk b/lib/AsmParser/Android.mk new file mode 100644 index 0000000..a54192e --- /dev/null +++ b/lib/AsmParser/Android.mk @@ -0,0 +1,32 @@ +LOCAL_PATH:= $(call my-dir) + +asm_parser_SRC_FILES := \ + LLLexer.cpp \ + LLParser.cpp \ + Parser.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(asm_parser_SRC_FILES) + +LOCAL_MODULE:= libLLVMAsmParser + +LOCAL_MODULE_TAGS := optional + +include $(LOCAL_PATH)/../../llvm-host-build.mk +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(asm_parser_SRC_FILES) + +LOCAL_MODULE:= libLLVMAsmParser + +LOCAL_MODULE_TAGS := optional + +include $(LOCAL_PATH)/../../llvm-device-build.mk +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/Bitcode/Reader/Android.mk b/lib/Bitcode/Reader/Android.mk new file mode 100644 index 0000000..02fc617 --- /dev/null +++ b/lib/Bitcode/Reader/Android.mk @@ -0,0 +1,33 @@ +LOCAL_PATH:= $(call my-dir) + +bitcode_reader_SRC_FILES := \ + BitReader.cpp \ + BitcodeReader.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(bitcode_reader_SRC_FILES) + +LOCAL_MODULE:= libLLVMBitReader + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(bitcode_reader_SRC_FILES) + +LOCAL_MODULE:= libLLVMBitReader + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/Bitcode/Reader/BitcodeReader.cpp b/lib/Bitcode/Reader/BitcodeReader.cpp index 24c2994..cd2149f 100644 --- a/lib/Bitcode/Reader/BitcodeReader.cpp +++ b/lib/Bitcode/Reader/BitcodeReader.cpp @@ -1040,7 +1040,11 @@ bool BitcodeReader::ParseMetadata() { // METADATA_NAME is always followed by METADATA_NAMED_NODE. unsigned NextBitCode = Stream.ReadRecord(Code, Record); - assert(NextBitCode == bitc::METADATA_NAMED_NODE); (void)NextBitCode; + if (NextBitCode == bitc::METADATA_NAMED_NODE_27) { + LLVM2_7MetadataDetected = true; + } else if (NextBitCode != bitc::METADATA_NAMED_NODE) { + assert(!"Invalid Named Metadata record."); (void)NextBitCode; + } // Read named metadata elements. unsigned Size = Record.size(); @@ -1051,12 +1055,23 @@ bool BitcodeReader::ParseMetadata() { return Error("Malformed metadata record"); NMD->addOperand(MD); } + + if (LLVM2_7MetadataDetected) { + MDValueList.AssignValue(0, NextMDValueNo++); + } break; } + case bitc::METADATA_FN_NODE_27: case bitc::METADATA_FN_NODE: IsFunctionLocal = true; // fall-through + case bitc::METADATA_NODE_27: case bitc::METADATA_NODE: { + if (Code == bitc::METADATA_FN_NODE_27 || + Code == bitc::METADATA_NODE_27) { + LLVM2_7MetadataDetected = true; + } + if (Record.size() % 2 == 1) return Error("Invalid METADATA_NODE record"); @@ -1988,6 +2003,8 @@ bool BitcodeReader::ParseMetadataAttachment() { switch (Stream.ReadRecord(Code, Record)) { default: // Default behavior: ignore. break; + case bitc::METADATA_ATTACHMENT_27: + LLVM2_7MetadataDetected = true; case bitc::METADATA_ATTACHMENT: { unsigned RecordLength = Record.size(); if (Record.empty() || (RecordLength - 1) % 2 == 1) @@ -2100,6 +2117,8 @@ bool BitcodeReader::ParseFunctionBody(Function *F) { I = 0; continue; + case bitc::FUNC_CODE_DEBUG_LOC_27: + LLVM2_7MetadataDetected = true; case bitc::FUNC_CODE_DEBUG_LOC: { // DEBUG_LOC: [line, col, scope, ia] I = 0; // Get the last instruction emitted. if (CurBB && !CurBB->empty()) @@ -2337,6 +2356,19 @@ bool BitcodeReader::ParseFunctionBody(Function *F) { break; } + case bitc::FUNC_CODE_INST_GETRESULT_27: { + if (Record.size() != 2) { + return Error("Invalid GETRESULT record"); + } + unsigned OpNum = 0; + Value *Op; + getValueTypePair(Record, OpNum, NextValueNo, Op); + unsigned Index = Record[1]; + I = ExtractValueInst::Create(Op, Index); + InstructionList.push_back(I); + break; + } + case bitc::FUNC_CODE_INST_RET: // RET: [opty,opval<optional>] { unsigned Size = Record.size(); @@ -2499,14 +2531,51 @@ bool BitcodeReader::ParseFunctionBody(Function *F) { break; } + case bitc::FUNC_CODE_INST_MALLOC_27: { // MALLOC: [instty, op, align] + // Autoupgrade malloc instruction to malloc call. + // FIXME: Remove in LLVM 3.0. + if (Record.size() < 3) { + return Error("Invalid MALLOC record"); + } + const PointerType *Ty = + dyn_cast_or_null<PointerType>(getTypeByID(Record[0])); + Value *Size = getFnValueByID(Record[1], Type::getInt32Ty(Context)); + if (!Ty || !Size) return Error("Invalid MALLOC record"); + if (!CurBB) return Error("Invalid malloc instruction with no BB"); + const Type *Int32Ty = IntegerType::getInt32Ty(CurBB->getContext()); + Constant *AllocSize = ConstantExpr::getSizeOf(Ty->getElementType()); + AllocSize = ConstantExpr::getTruncOrBitCast(AllocSize, Int32Ty); + I = CallInst::CreateMalloc(CurBB, Int32Ty, Ty->getElementType(), + AllocSize, Size, NULL); + InstructionList.push_back(I); + break; + } + case bitc::FUNC_CODE_INST_FREE_27: { // FREE: [op, opty] + unsigned OpNum = 0; + Value *Op; + if (getValueTypePair(Record, OpNum, NextValueNo, Op) || + OpNum != Record.size()) { + return Error("Invalid FREE record"); + } + if (!CurBB) return Error("Invalid free instruction with no BB"); + I = CallInst::CreateFree(Op, CurBB); + InstructionList.push_back(I); + break; + } + case bitc::FUNC_CODE_INST_ALLOCA: { // ALLOCA: [instty, opty, op, align] - if (Record.size() != 4) + // For backward compatibility, tolerate a lack of an opty, and use i32. + // Remove this in LLVM 3.0. + if (Record.size() < 3 || Record.size() > 4) { return Error("Invalid ALLOCA record"); + } + unsigned OpNum = 0; const PointerType *Ty = - dyn_cast_or_null<PointerType>(getTypeByID(Record[0])); - const Type *OpTy = getTypeByID(Record[1]); - Value *Size = getFnValueByID(Record[2], OpTy); - unsigned Align = Record[3]; + dyn_cast_or_null<PointerType>(getTypeByID(Record[OpNum++])); + const Type *OpTy = Record.size() == 4 ? getTypeByID(Record[OpNum++]) : + Type::getInt32Ty(Context); + Value *Size = getFnValueByID(Record[OpNum++], OpTy); + unsigned Align = Record[OpNum++]; if (!Ty || !Size) return Error("Invalid ALLOCA record"); I = new AllocaInst(Ty->getElementType(), Size, (1 << Align) >> 1); InstructionList.push_back(I); @@ -2536,6 +2605,21 @@ bool BitcodeReader::ParseFunctionBody(Function *F) { InstructionList.push_back(I); break; } + case bitc::FUNC_CODE_INST_STORE_27: { + unsigned OpNum = 0; + Value *Val, *Ptr; + if (getValueTypePair(Record, OpNum, NextValueNo, Val) || + getValue(Record, OpNum, + PointerType::getUnqual(Val->getType()), Ptr)|| + OpNum+2 != Record.size()) { + return Error("Invalid STORE record"); + } + I = new StoreInst(Val, Ptr, Record[OpNum+1], (1 << Record[OpNum]) >> 1); + InstructionList.push_back(I); + break; + } + case bitc::FUNC_CODE_INST_CALL_27: + LLVM2_7MetadataDetected = true; case bitc::FUNC_CODE_INST_CALL: { // CALL: [paramattrs, cc, fnty, fnid, arg0, arg1...] if (Record.size() < 3) @@ -2654,10 +2738,16 @@ bool BitcodeReader::ParseFunctionBody(Function *F) { BlockAddrFwdRefs.erase(BAFRI); } - + + unsigned NewMDValueListSize = MDValueList.size(); // Trim the value list down to the size it was before we parsed this function. ValueList.shrinkTo(ModuleValueListSize); MDValueList.shrinkTo(ModuleMDValueListSize); + + if (LLVM2_7MetadataDetected) { + MDValueList.resize(NewMDValueListSize); + } + std::vector<BasicBlock*>().swap(FunctionBBs); return false; } diff --git a/lib/Bitcode/Reader/BitcodeReader.h b/lib/Bitcode/Reader/BitcodeReader.h index 1b3bf1a..a2db75e 100644 --- a/lib/Bitcode/Reader/BitcodeReader.h +++ b/lib/Bitcode/Reader/BitcodeReader.h @@ -174,10 +174,17 @@ class BitcodeReader : public GVMaterializer { typedef std::pair<unsigned, GlobalVariable*> BlockAddrRefTy; DenseMap<Function*, std::vector<BlockAddrRefTy> > BlockAddrFwdRefs; + /// LLVM2_7MetadataDetected - True if metadata produced by LLVM 2.7 or + /// earlier was detected, in which case we behave slightly differently, + /// for compatibility. + /// FIXME: Remove in LLVM 3.0. + bool LLVM2_7MetadataDetected; + public: explicit BitcodeReader(MemoryBuffer *buffer, LLVMContext &C) : Context(C), TheModule(0), Buffer(buffer), BufferOwned(false), - ErrorString(0), ValueList(C), MDValueList(C) { + ErrorString(0), ValueList(C), MDValueList(C), + LLVM2_7MetadataDetected(false) { HasReversedFunctionsWithBodies = false; } ~BitcodeReader() { diff --git a/lib/Bitcode/Writer/Android.mk b/lib/Bitcode/Writer/Android.mk new file mode 100644 index 0000000..c325d14 --- /dev/null +++ b/lib/Bitcode/Writer/Android.mk @@ -0,0 +1,35 @@ +LOCAL_PATH:= $(call my-dir) + +bitcode_writer_SRC_FILES := \ + BitWriter.cpp \ + BitcodeWriter.cpp \ + BitcodeWriterPass.cpp \ + ValueEnumerator.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(bitcode_writer_SRC_FILES) + +LOCAL_MODULE:= libLLVMBitWriter + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(bitcode_writer_SRC_FILES) + +LOCAL_MODULE:= libLLVMBitWriter + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/CodeGen/Android.mk b/lib/CodeGen/Android.mk new file mode 100644 index 0000000..03ea8da --- /dev/null +++ b/lib/CodeGen/Android.mk @@ -0,0 +1,123 @@ +LOCAL_PATH:= $(call my-dir) + +codegen_SRC_FILES := \ + AggressiveAntiDepBreaker.cpp \ + AllocationOrder.cpp \ + Analysis.cpp \ + BranchFolding.cpp \ + CalcSpillWeights.cpp \ + CallingConvLower.cpp \ + CodePlacementOpt.cpp \ + CriticalAntiDepBreaker.cpp \ + DeadMachineInstructionElim.cpp \ + DwarfEHPrepare.cpp \ + EdgeBundles.cpp \ + ELFCodeEmitter.cpp \ + ELFWriter.cpp \ + ExpandISelPseudos.cpp \ + GCMetadata.cpp \ + GCMetadataPrinter.cpp \ + GCStrategy.cpp \ + IfConversion.cpp \ + InlineSpiller.cpp \ + InterferenceCache.cpp \ + IntrinsicLowering.cpp \ + LLVMTargetMachine.cpp \ + LatencyPriorityQueue.cpp \ + LiveDebugVariables.cpp \ + LiveInterval.cpp \ + LiveIntervalUnion.cpp \ + LiveIntervalAnalysis.cpp \ + LiveRangeEdit.cpp \ + LiveStackAnalysis.cpp \ + LiveVariables.cpp \ + LocalStackSlotAllocation.cpp \ + LowerSubregs.cpp \ + MachineBasicBlock.cpp \ + MachineBranchProbabilityInfo.cpp \ + MachineCSE.cpp \ + MachineDominators.cpp \ + MachineFunction.cpp \ + MachineFunctionAnalysis.cpp \ + MachineFunctionPass.cpp \ + MachineFunctionPrinterPass.cpp \ + MachineInstr.cpp \ + MachineLICM.cpp \ + MachineLoopInfo.cpp \ + MachineLoopRanges.cpp \ + MachineModuleInfo.cpp \ + MachineModuleInfoImpls.cpp \ + MachinePassRegistry.cpp \ + MachineRegisterInfo.cpp \ + MachineSSAUpdater.cpp \ + MachineSink.cpp \ + MachineVerifier.cpp \ + ObjectCodeEmitter.cpp \ + OcamlGC.cpp \ + OptimizePHIs.cpp \ + PHIElimination.cpp \ + PHIEliminationUtils.cpp \ + Passes.cpp \ + PeepholeOptimizer.cpp \ + PostRASchedulerList.cpp \ + ProcessImplicitDefs.cpp \ + PrologEpilogInserter.cpp \ + PseudoSourceValue.cpp \ + RegAllocBasic.cpp \ + RegAllocFast.cpp \ + RegAllocGreedy.cpp \ + RegAllocLinearScan.cpp \ + RegAllocPBQP.cpp \ + RegisterCoalescer.cpp \ + RegisterClassInfo.cpp \ + RegisterScavenging.cpp \ + RenderMachineFunction.cpp \ + ScheduleDAG.cpp \ + ScheduleDAGEmit.cpp \ + ScheduleDAGInstrs.cpp \ + ScheduleDAGPrinter.cpp \ + ScoreboardHazardRecognizer.cpp \ + ShadowStackGC.cpp \ + ShrinkWrapping.cpp \ + SjLjEHPrepare.cpp \ + SlotIndexes.cpp \ + Spiller.cpp \ + SpillPlacement.cpp \ + SplitKit.cpp \ + Splitter.cpp \ + StackProtector.cpp \ + StackSlotColoring.cpp \ + StrongPHIElimination.cpp \ + TailDuplication.cpp \ + TargetInstrInfoImpl.cpp \ + TargetLoweringObjectFileImpl.cpp \ + TwoAddressInstructionPass.cpp \ + UnreachableBlockElim.cpp \ + VirtRegMap.cpp \ + VirtRegRewriter.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(codegen_SRC_FILES) +LOCAL_MODULE:= libLLVMCodeGen + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(codegen_SRC_FILES) +LOCAL_MODULE:= libLLVMCodeGen + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/CodeGen/AsmPrinter/Android.mk b/lib/CodeGen/AsmPrinter/Android.mk new file mode 100644 index 0000000..47cb637 --- /dev/null +++ b/lib/CodeGen/AsmPrinter/Android.mk @@ -0,0 +1,44 @@ +LOCAL_PATH := $(call my-dir) + +codegen_asmprinter_SRC_FILES := \ + AsmPrinter.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := \ + AsmPrinter.cpp \ + AsmPrinterDwarf.cpp \ + AsmPrinterInlineAsm.cpp \ + ARMException.cpp \ + DIE.cpp \ + DwarfCFIException.cpp \ + DwarfCompileUnit.cpp \ + DwarfDebug.cpp \ + DwarfException.cpp \ + OcamlGCPrinter.cpp \ + Win64Exception.cpp + +LOCAL_MODULE:= libLLVMAsmPrinter + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := \ + AsmPrinter.cpp \ + AsmPrinterDwarf.cpp \ + AsmPrinterInlineAsm.cpp + +LOCAL_MODULE:= libLLVMAsmPrinter + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp index 7f314ee..2cdf272 100644 --- a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -13,8 +13,10 @@ #define DEBUG_TYPE "asm-printer" #include "llvm/CodeGen/AsmPrinter.h" -#include "DwarfDebug.h" -#include "DwarfException.h" +#ifndef ANDROID_TARGET_BUILD +# include "DwarfDebug.h" +# include "DwarfException.h" +#endif // ANDROID_TARGET_BUILD #include "llvm/Module.h" #include "llvm/CodeGen/GCMetadataPrinter.h" #include "llvm/CodeGen/MachineConstantPool.h" @@ -46,6 +48,7 @@ #include "llvm/Support/ErrorHandling.h" #include "llvm/Support/Format.h" #include "llvm/Support/Timer.h" +#include <ctype.h> using namespace llvm; static const char *DWARFGroupName = "DWARF Emission"; @@ -186,6 +189,7 @@ bool AsmPrinter::doInitialization(Module &M) { OutStreamer.AddBlankLine(); } +#ifndef ANDROID_TARGET_BUILD if (MAI->doesSupportDebugInformation()) DD = new DwarfDebug(this, &M); @@ -203,6 +207,9 @@ bool AsmPrinter::doInitialization(Module &M) { DE = new Win64Exception(this); return false; } +#else + return false; +#endif // ANDROID_TARGET_BUILD llvm_unreachable("Unknown exception type."); } @@ -459,6 +466,7 @@ void AsmPrinter::EmitFunctionHeader() { } // Emit pre-function debug and/or EH information. +#ifndef ANDROID_TARGET_BUILD if (DE) { NamedRegionTimer T(EHTimerName, DWARFGroupName, TimePassesIsEnabled); DE->BeginFunction(MF); @@ -467,6 +475,7 @@ void AsmPrinter::EmitFunctionHeader() { NamedRegionTimer T(DbgTimerName, DWARFGroupName, TimePassesIsEnabled); DD->beginFunction(MF); } +#endif // ANDROID_TARGET_BUILD } /// EmitFunctionEntryLabel - Emit the label that is the entrypoint for the @@ -657,14 +666,16 @@ void AsmPrinter::EmitFunctionBody() { if (!II->isLabel() && !II->isImplicitDef() && !II->isKill() && !II->isDebugValue()) { HasAnyRealCode = true; + ++EmittedInsts; } - +#ifndef ANDROID_TARGET_BUILD if (ShouldPrintDebugScopes) { NamedRegionTimer T(DbgTimerName, DWARFGroupName, TimePassesIsEnabled); DD->beginInstruction(II); } - +#endif // ANDROID_TARGET_BUILD + if (isVerbose()) EmitComments(*II, OutStreamer.GetCommentOS()); @@ -699,11 +710,13 @@ void AsmPrinter::EmitFunctionBody() { EmitInstruction(II); break; } - + +#ifndef ANDROID_TARGET_BUILD if (ShouldPrintDebugScopes) { NamedRegionTimer T(DbgTimerName, DWARFGroupName, TimePassesIsEnabled); DD->endInstruction(II); } +#endif // ANDROID_TARGET_BUILD } } @@ -746,6 +759,7 @@ void AsmPrinter::EmitFunctionBody() { } // Emit post-function debug information. +#ifndef ANDROID_TARGET_BUILD if (DD) { NamedRegionTimer T(DbgTimerName, DWARFGroupName, TimePassesIsEnabled); DD->endFunction(MF); @@ -754,6 +768,7 @@ void AsmPrinter::EmitFunctionBody() { NamedRegionTimer T(EHTimerName, DWARFGroupName, TimePassesIsEnabled); DE->EndFunction(); } +#endif // ANDROID_TARGET_BUILD MMI->EndFunction(); // Print out jump tables referenced by the function. @@ -837,6 +852,7 @@ bool AsmPrinter::doFinalization(Module &M) { } // Finalize debug and EH information. +#ifndef ANDROID_TARGET_BUILD if (DE) { { NamedRegionTimer T(EHTimerName, DWARFGroupName, TimePassesIsEnabled); @@ -851,7 +867,8 @@ bool AsmPrinter::doFinalization(Module &M) { } delete DD; DD = 0; } - +#endif // ANDROID_TARGET_BUILD + // If the target wants to know about weak references, print them all. if (MAI->getWeakRefDirective()) { // FIXME: This is not lazy, it would be nice to only print weak references diff --git a/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp b/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp index 5ac455e..4564beb 100644 --- a/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp +++ b/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp @@ -69,6 +69,7 @@ static void SrcMgrDiagHandler(const SMDiagnostic &Diag, void *diagInfo) { /// EmitInlineAsm - Emit a blob of inline asm to the output streamer. void AsmPrinter::EmitInlineAsm(StringRef Str, const MDNode *LocMDNode) const { +#ifndef ANDROID_TARGET_BUILD assert(!Str.empty() && "Can't emit empty inline asm block"); // Remember if the buffer is nul terminated or not so we can avoid a copy. @@ -132,12 +133,14 @@ void AsmPrinter::EmitInlineAsm(StringRef Str, const MDNode *LocMDNode) const { /*NoFinalize*/ true); if (Res && !HasDiagHandler) report_fatal_error("Error parsing inline asm\n"); +#endif // ANDROID_TARGET_BUILD } /// EmitInlineAsm - This method formats and emits the specified machine /// instruction that is an inline asm. void AsmPrinter::EmitInlineAsm(const MachineInstr *MI) const { +#ifndef ANDROID_TARGET_BUILD assert(MI->isInlineAsm() && "printInlineAsm only works on inline asms"); unsigned NumOperands = MI->getNumOperands(); @@ -365,6 +368,7 @@ void AsmPrinter::EmitInlineAsm(const MachineInstr *MI) const { if (OutStreamer.hasRawTextSupport()) OutStreamer.EmitRawText(Twine("\t")+MAI->getCommentString()+ MAI->getInlineAsmEnd()); +#endif // ANDROID_TARGET_BUILD } diff --git a/lib/CodeGen/SelectionDAG/Android.mk b/lib/CodeGen/SelectionDAG/Android.mk new file mode 100644 index 0000000..d3522fe --- /dev/null +++ b/lib/CodeGen/SelectionDAG/Android.mk @@ -0,0 +1,52 @@ +LOCAL_PATH:= $(call my-dir) + +codegen_selectiondag_SRC_FILES := \ + DAGCombiner.cpp \ + FastISel.cpp \ + FunctionLoweringInfo.cpp \ + InstrEmitter.cpp \ + LegalizeDAG.cpp \ + LegalizeFloatTypes.cpp \ + LegalizeIntegerTypes.cpp \ + LegalizeTypes.cpp \ + LegalizeTypesGeneric.cpp \ + LegalizeVectorOps.cpp \ + LegalizeVectorTypes.cpp \ + ScheduleDAGFast.cpp \ + ScheduleDAGList.cpp \ + ScheduleDAGRRList.cpp \ + ScheduleDAGSDNodes.cpp \ + SelectionDAG.cpp \ + SelectionDAGBuilder.cpp \ + SelectionDAGISel.cpp \ + SelectionDAGPrinter.cpp \ + TargetLowering.cpp \ + TargetSelectionDAGInfo.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(codegen_selectiondag_SRC_FILES) + +LOCAL_MODULE:= libLLVMSelectionDAG + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(codegen_selectiondag_SRC_FILES) + +LOCAL_MODULE:= libLLVMSelectionDAG + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/ExecutionEngine/JIT/Android.mk b/lib/ExecutionEngine/JIT/Android.mk new file mode 100644 index 0000000..7c1cfdd --- /dev/null +++ b/lib/ExecutionEngine/JIT/Android.mk @@ -0,0 +1,35 @@ +LOCAL_PATH:= $(call my-dir) + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := \ + Intercept.cpp \ + JIT.cpp \ + JITDebugRegisterer.cpp \ + JITDwarfEmitter.cpp \ + JITEmitter.cpp \ + JITMemoryManager.cpp \ + OProfileJITEventListener.cpp + +LOCAL_MODULE:= libLLVMJIT + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := \ + JITMemoryManager.cpp + +LOCAL_MODULE:= libLLVMJIT + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/Linker/Android.mk b/lib/Linker/Android.mk new file mode 100644 index 0000000..792a675 --- /dev/null +++ b/lib/Linker/Android.mk @@ -0,0 +1,34 @@ +LOCAL_PATH:= $(call my-dir) + +linker_SRC_FILES := \ + LinkModules.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +LOCAL_SRC_FILES := \ + $(linker_SRC_FILES)\ + LinkArchives.cpp \ + Linker.cpp \ + LinkItems.cpp + +LOCAL_MODULE:= libLLVMLinker +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(linker_SRC_FILES) + +LOCAL_MODULE:= libLLVMLinker +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/MC/Android.mk b/lib/MC/Android.mk new file mode 100644 index 0000000..e46b9bf --- /dev/null +++ b/lib/MC/Android.mk @@ -0,0 +1,67 @@ +LOCAL_PATH:= $(call my-dir) + +mc_SRC_FILES := \ + ELFObjectWriter.cpp \ + MachObjectWriter.cpp \ + MCAsmInfo.cpp \ + MCAsmInfoCOFF.cpp \ + MCAsmInfoDarwin.cpp \ + MCAsmStreamer.cpp \ + MCAssembler.cpp \ + MCCodeEmitter.cpp \ + MCContext.cpp \ + MCDisassembler.cpp \ + MCDwarf.cpp \ + MCELF.cpp \ + MCELFObjectTargetWriter.cpp \ + MCELFStreamer.cpp \ + MCExpr.cpp \ + MCInst.cpp \ + MCInstPrinter.cpp \ + MCLabel.cpp \ + MCLoggingStreamer.cpp \ + MCMachObjectTargetWriter.cpp \ + MCMachOStreamer.cpp \ + MCNullStreamer.cpp \ + MCObjectStreamer.cpp\ + MCObjectWriter.cpp \ + MCSection.cpp \ + MCSectionCOFF.cpp \ + MCSectionELF.cpp \ + MCSectionMachO.cpp \ + MCStreamer.cpp \ + MCSubtargetInfo.cpp \ + MCSymbol.cpp \ + MCValue.cpp \ + MCWin64EH.cpp \ + WinCOFFObjectWriter.cpp \ + WinCOFFStreamer.cpp \ + SubtargetFeature.cpp \ + TargetAsmBackend.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(mc_SRC_FILES) + +LOCAL_MODULE:= libLLVMMC + +LOCAL_MODULE_TAGS := optional + + +include $(LLVM_HOST_BUILD_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(mc_SRC_FILES) + +LOCAL_MODULE:= libLLVMMC + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/MC/MCParser/Android.mk b/lib/MC/MCParser/Android.mk new file mode 100644 index 0000000..33d3aea --- /dev/null +++ b/lib/MC/MCParser/Android.mk @@ -0,0 +1,38 @@ +LOCAL_PATH:= $(call my-dir) + +mc_parser_SRC_FILES := \ + AsmLexer.cpp \ + AsmParser.cpp \ + COFFAsmParser.cpp \ + DarwinAsmParser.cpp \ + ELFAsmParser.cpp \ + MCAsmLexer.cpp \ + MCAsmParser.cpp \ + MCAsmParserExtension.cpp \ + TargetAsmParser.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(mc_parser_SRC_FILES) + +LOCAL_MODULE:= libLLVMMCParser + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(mc_parser_SRC_FILES) + +LOCAL_MODULE:= libLLVMMCParser + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/Support/Android.mk b/lib/Support/Android.mk new file mode 100644 index 0000000..257cbea --- /dev/null +++ b/lib/Support/Android.mk @@ -0,0 +1,103 @@ +LOCAL_PATH:= $(call my-dir) + +support_SRC_FILES := \ + Allocator.cpp \ + APFloat.cpp \ + APInt.cpp \ + APSInt.cpp \ + Atomic.cpp \ + BranchProbability.cpp \ + CommandLine.cpp \ + ConstantRange.cpp \ + CrashRecoveryContext.cpp \ + DAGDeltaAlgorithm.cpp \ + Debug.cpp \ + DeltaAlgorithm.cpp \ + Dwarf.cpp \ + DynamicLibrary.cpp \ + Errno.cpp \ + ErrorHandling.cpp \ + FileUtilities.cpp \ + FoldingSet.cpp \ + FormattedStream.cpp \ + GraphWriter.cpp \ + Host.cpp \ + IntervalMap.cpp \ + IntEqClasses.cpp\ + IsInf.cpp \ + IsNAN.cpp \ + ManagedStatic.cpp \ + Memory.cpp \ + MemoryBuffer.cpp \ + MemoryObject.cpp \ + Mutex.cpp \ + Path.cpp \ + PathV2.cpp \ + PluginLoader.cpp \ + PrettyStackTrace.cpp \ + Process.cpp \ + Program.cpp \ + Regex.cpp \ + RWMutex.cpp \ + SearchForAddressOfSpecialSymbol.cpp \ + Signals.cpp \ + SmallPtrSet.cpp \ + SmallVector.cpp \ + SourceMgr.cpp \ + Statistic.cpp \ + StringExtras.cpp \ + StringMap.cpp \ + StringPool.cpp \ + StringRef.cpp \ + SystemUtils.cpp \ + TargetRegistry.cpp \ + Threading.cpp \ + ThreadLocal.cpp \ + Timer.cpp \ + TimeValue.cpp \ + ToolOutputFile.cpp \ + Triple.cpp \ + Twine.cpp \ + Valgrind.cpp\ + circular_raw_ostream.cpp \ + raw_os_ostream.cpp \ + raw_ostream.cpp \ + regcomp.c \ + regerror.c \ + regexec.c \ + regfree.c \ + regstrlcpy.c \ + system_error.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +# FIXME: This only requires RTTI because tblgen uses it. Fix that. +REQUIRES_RTTI := 1 + +LOCAL_SRC_FILES := $(support_SRC_FILES) + +LOCAL_MODULE:= libLLVMSupport + +LOCAL_CFLAGS := -D__android__ + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(support_SRC_FILES) + +LOCAL_MODULE:= libLLVMSupport + +LOCAL_CFLAGS := -D__android__ + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/Support/Atomic.cpp b/lib/Support/Atomic.cpp index c7b4bff..05339f4 100644 --- a/lib/Support/Atomic.cpp +++ b/lib/Support/Atomic.cpp @@ -13,6 +13,9 @@ #include "llvm/Support/Atomic.h" #include "llvm/Config/config.h" +#if defined(ANDROID_TARGET_BUILD) +# include "sys/atomics.h" +#endif using namespace llvm; @@ -43,6 +46,8 @@ sys::cas_flag sys::CompareAndSwap(volatile sys::cas_flag* ptr, if (result == old_value) *ptr = new_value; return result; +#elif defined(ANDROID_TARGET_BUILD) + return __atomic_cmpxchg(old_value, new_value, (volatile int*)ptr); #elif defined(__GNUC__) return __sync_val_compare_and_swap(ptr, old_value, new_value); #elif defined(_MSC_VER) @@ -56,6 +61,8 @@ sys::cas_flag sys::AtomicIncrement(volatile sys::cas_flag* ptr) { #if LLVM_MULTITHREADED==0 ++(*ptr); return *ptr; +#elif defined(ANDROID_TARGET_BUILD) + return __atomic_inc((volatile int*)ptr); #elif defined(__GNUC__) return __sync_add_and_fetch(ptr, 1); #elif defined(_MSC_VER) @@ -69,6 +76,8 @@ sys::cas_flag sys::AtomicDecrement(volatile sys::cas_flag* ptr) { #if LLVM_MULTITHREADED==0 --(*ptr); return *ptr; +#elif defined(ANDROID_TARGET_BUILD) + return __atomic_dec((volatile int*)ptr); #elif defined(__GNUC__) return __sync_sub_and_fetch(ptr, 1); #elif defined(_MSC_VER) @@ -82,6 +91,13 @@ sys::cas_flag sys::AtomicAdd(volatile sys::cas_flag* ptr, sys::cas_flag val) { #if LLVM_MULTITHREADED==0 *ptr += val; return *ptr; +#elif defined(ANDROID_TARGET_BUILD) + sys::cas_flag original, result; + do { + original = *ptr; + result = original + val; + } while (__atomic_cmpxchg(original, result, (volatile int*)ptr) != original); + return result; #elif defined(__GNUC__) return __sync_add_and_fetch(ptr, val); #elif defined(_MSC_VER) diff --git a/lib/Support/DynamicLibrary.cpp b/lib/Support/DynamicLibrary.cpp index 455c380..9bedfb5 100644 --- a/lib/Support/DynamicLibrary.cpp +++ b/lib/Support/DynamicLibrary.cpp @@ -141,7 +141,7 @@ void* DynamicLibrary::SearchForAddressOfSymbol(const char* symbolName) { // On linux we have a weird situation. The stderr/out/in symbols are both // macros and global variables because of standards requirements. So, we // boldly use the EXPLICIT_SYMBOL macro without checking for a #define first. -#if defined(__linux__) +#if defined(__linux__) && !defined(__android__) { EXPLICIT_SYMBOL(stderr); EXPLICIT_SYMBOL(stdout); diff --git a/lib/Support/Unix/Host.inc b/lib/Support/Unix/Host.inc index 5fd0e5e..a286a15 100644 --- a/lib/Support/Unix/Host.inc +++ b/lib/Support/Unix/Host.inc @@ -22,6 +22,7 @@ #include <sys/utsname.h> #include <cctype> #include <string> +#include <ctype.h> using namespace llvm; diff --git a/lib/Support/Unix/PathV2.inc b/lib/Support/Unix/PathV2.inc index 03ff283..15df8a2 100644 --- a/lib/Support/Unix/PathV2.inc +++ b/lib/Support/Unix/PathV2.inc @@ -43,6 +43,8 @@ #include <stdio.h> #endif +extern "C" int truncate (const char*, off_t); + using namespace llvm; namespace { diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp index d6fca62..2afbb77 100644 --- a/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/lib/Target/ARM/ARMCodeEmitter.cpp @@ -88,9 +88,11 @@ namespace { void emitWordLE(unsigned Binary); void emitDWordLE(uint64_t Binary); + void emitConstantToMemory(unsigned CPI, const Constant *CV); void emitConstPoolInstruction(const MachineInstr &MI); void emitMOVi32immInstruction(const MachineInstr &MI); void emitMOVi2piecesInstruction(const MachineInstr &MI); + void emitLEApcrelInstruction(const MachineInstr &MI); void emitLEApcrelJTInstruction(const MachineInstr &MI); void emitPseudoMoveInstruction(const MachineInstr &MI); void addPCLabel(unsigned LabelID); @@ -139,6 +141,8 @@ namespace { void emitVFPLoadStoreMultipleInstruction(const MachineInstr &MI); + void emitMiscInstruction(const MachineInstr &MI); + void emitNEONLaneInstruction(const MachineInstr &MI); void emitNEONDupInstruction(const MachineInstr &MI); void emitNEON1RegModImmInstruction(const MachineInstr &MI); @@ -161,14 +165,20 @@ namespace { // are already handled elsewhere. They are placeholders to allow this // encoder to continue to function until the MC encoder is sufficiently // far along that this one can be eliminated entirely. - unsigned NEONThumb2DataIPostEncoder(const MachineInstr &MI, unsigned Val) + unsigned NEONThumb2DataIPostEncoder(const MachineInstr &MI, unsigned Val) const { return 0; } - unsigned NEONThumb2LoadStorePostEncoder(const MachineInstr &MI,unsigned Val) + unsigned NEONThumb2LoadStorePostEncoder(const MachineInstr &MI,unsigned Val) const { return 0; } - unsigned NEONThumb2DupPostEncoder(const MachineInstr &MI,unsigned Val) + unsigned NEONThumb2DupPostEncoder(const MachineInstr &MI,unsigned Val) const { return 0; } unsigned VFPThumb2PostEncoder(const MachineInstr&MI, unsigned Val) - const { return 0; } + const { + if (IsThumb) { + Val &= 0x0FFFFFFF; + Val |= 0xE0000000; + } + return Val; + } unsigned getAdrLabelOpValue(const MachineInstr &MI, unsigned Op) const { return 0; } unsigned getThumbAdrLabelOpValue(const MachineInstr &MI, unsigned Op) @@ -260,8 +270,20 @@ namespace { return Binary; } - unsigned getHiLo16ImmOpValue(const MachineInstr &MI, unsigned Op) const { - return 0; + unsigned getHiLo16ImmOpValue(const MachineInstr &MI, unsigned Op) + const { + const MCInstrDesc &MCID = MI.getDesc(); + const MachineOperand &MO = MI.getOperand(Op); + + unsigned Reloc = (MCID.Opcode == ARM::MOVi16 ? + ARM::reloc_arm_movw : ARM::reloc_arm_movt); + + if (!MO.isImm()) { + emitGlobalAddress(MO.getGlobal(), Reloc, true, false); + return 0; + } + unsigned Imm16 = static_cast<unsigned>(MO.getImm()); + return Imm16; } uint32_t getAddrMode2OpValue(const MachineInstr &MI, unsigned OpIdx) @@ -281,34 +303,27 @@ namespace { uint32_t getAddrModePCOpValue(const MachineInstr &MI, unsigned Op) const { return 0; } uint32_t getAddrMode5OpValue(const MachineInstr &MI, unsigned Op) const { - // {17-13} = reg - // {12} = (U)nsigned (add == '1', sub == '0') - // {11-0} = imm12 + // {12-9} = reg + // {8} = (U)nsigned (add == '1', sub == '0') + // {7-0} = imm8 + uint32_t Binary = 0; const MachineOperand &MO = MI.getOperand(Op); - const MachineOperand &MO1 = MI.getOperand(Op + 1); - if (!MO.isReg()) { - emitConstPoolAddress(MO.getIndex(), ARM::reloc_arm_cp_entry); - return 0; - } - unsigned Reg = getARMRegisterNumbering(MO.getReg()); - int32_t Imm12 = MO1.getImm(); - - // Special value for #-0 - if (Imm12 == INT32_MIN) - Imm12 = 0; - - // Immediate is always encoded as positive. The 'U' bit controls add vs - // sub. - bool isAdd = true; - if (Imm12 < 0) { - Imm12 = -Imm12; - isAdd = false; + uint32_t Reg = getMachineOpValue(MI, MO); + Binary |= (Reg << 9); + + // If there is a non-zero immediate offset, encode it. + if (MO.isReg()) { + const MachineOperand &MO1 = MI.getOperand(Op + 1); + if (uint32_t ImmOffs = ARM_AM::getAM5Offset(MO1.getImm())) { + if (ARM_AM::getAM5Op(MO1.getImm()) == ARM_AM::add) + Binary |= 1 << 8; + Binary |= ImmOffs & 0xff; + return Binary; + } } - uint32_t Binary = Imm12 & 0xfff; - if (isAdd) - Binary |= (1 << 12); - Binary |= (Reg << 13); + // If immediate offset is omitted, default to +0. + Binary |= 1 << 8; return Binary; } unsigned getNEONVcvtImm32OpValue(const MachineInstr &MI, unsigned Op) @@ -438,6 +453,9 @@ unsigned ARMCodeEmitter::getMachineOpValue(const MachineInstr &MI, return getARMRegisterNumbering(MO.getReg()); else if (MO.isImm()) return static_cast<unsigned>(MO.getImm()); + else if (MO.isFPImm()) + return static_cast<unsigned>(MO.getFPImm()->getValueAPF() + .bitcastToAPInt().getHiBits(32).getLimitedValue()); else if (MO.isGlobal()) emitGlobalAddress(MO.getGlobal(), ARM::reloc_arm_branch, true, false); else if (MO.isSymbol()) @@ -592,7 +610,9 @@ void ARMCodeEmitter::emitInstruction(const MachineInstr &MI) { case ARMII::VFPLdStMulFrm: emitVFPLoadStoreMultipleInstruction(MI); break; - + case ARMII::VFPMiscFrm: + emitMiscInstruction(MI); + break; // NEON instructions. case ARMII::NGetLnFrm: case ARMII::NSetLnFrm: @@ -614,6 +634,61 @@ void ARMCodeEmitter::emitInstruction(const MachineInstr &MI) { MCE.processDebugLoc(MI.getDebugLoc(), false); } +void ARMCodeEmitter::emitConstantToMemory(unsigned CPI, const Constant *C) { + DEBUG({ + errs() << " ** Constant pool #" << CPI << " @ " + << (void*)MCE.getCurrentPCValue() << " "; + if (const Function *F = dyn_cast<Function>(C)) + errs() << F->getName(); + else + errs() << *C; + errs() << '\n'; + }); + + switch (C->getValueID()) { + default: { + llvm_unreachable("Unable to handle this constantpool entry!"); + break; + } + case Value::GlobalVariableVal: { + emitGlobalAddress(static_cast<const GlobalValue*>(C), + ARM::reloc_arm_absolute, isa<Function>(C), false); + emitWordLE(0); + break; + } + case Value::ConstantIntVal: { + const ConstantInt *CI = static_cast<const ConstantInt*>(C); + uint32_t Val = *(uint32_t*)CI->getValue().getRawData(); + emitWordLE(Val); + break; + } + case Value::ConstantFPVal: { + const ConstantFP *CFP = static_cast<const ConstantFP*>(C); + if (CFP->getType()->isFloatTy()) + emitWordLE(CFP->getValueAPF().bitcastToAPInt().getZExtValue()); + else if (CFP->getType()->isDoubleTy()) + emitDWordLE(CFP->getValueAPF().bitcastToAPInt().getZExtValue()); + else { + llvm_unreachable("Unable to handle this constantpool entry!"); + } + break; + } + case Value::ConstantArrayVal: { + const ConstantArray *CA = static_cast<const ConstantArray*>(C); + for (unsigned i = 0, e = CA->getNumOperands(); i != e; ++i) + emitConstantToMemory(CPI, CA->getOperand(i)); + break; + } + case Value::ConstantVectorVal:{ + //FIXME:emit vector + const ConstantVector *CV = static_cast<const ConstantVector*>(C); + break; + } + } + + return; +} + void ARMCodeEmitter::emitConstPoolInstruction(const MachineInstr &MI) { unsigned CPI = MI.getOperand(0).getImm(); // CP instruction index. unsigned CPIndex = MI.getOperand(1).getIndex(); // Actual cp entry index. @@ -644,35 +719,7 @@ void ARMCodeEmitter::emitConstPoolInstruction(const MachineInstr &MI) { } emitWordLE(0); } else { - const Constant *CV = MCPE.Val.ConstVal; - - DEBUG({ - errs() << " ** Constant pool #" << CPI << " @ " - << (void*)MCE.getCurrentPCValue() << " "; - if (const Function *F = dyn_cast<Function>(CV)) - errs() << F->getName(); - else - errs() << *CV; - errs() << '\n'; - }); - - if (const GlobalValue *GV = dyn_cast<GlobalValue>(CV)) { - emitGlobalAddress(GV, ARM::reloc_arm_absolute, isa<Function>(GV), false); - emitWordLE(0); - } else if (const ConstantInt *CI = dyn_cast<ConstantInt>(CV)) { - uint32_t Val = uint32_t(*CI->getValue().getRawData()); - emitWordLE(Val); - } else if (const ConstantFP *CFP = dyn_cast<ConstantFP>(CV)) { - if (CFP->getType()->isFloatTy()) - emitWordLE(CFP->getValueAPF().bitcastToAPInt().getZExtValue()); - else if (CFP->getType()->isDoubleTy()) - emitDWordLE(CFP->getValueAPF().bitcastToAPInt().getZExtValue()); - else { - llvm_unreachable("Unable to handle this constantpool entry!"); - } - } else { - llvm_unreachable("Unable to handle this constantpool entry!"); - } + emitConstantToMemory(CPI, MCPE.Val.ConstVal); } } @@ -754,6 +801,32 @@ void ARMCodeEmitter::emitMOVi2piecesInstruction(const MachineInstr &MI) { emitWordLE(Binary); } +void ARMCodeEmitter::emitLEApcrelInstruction(const MachineInstr &MI) { + // It's basically add r, pc, (LCPI - $+8) + const MCInstrDesc &MCID = MI.getDesc(); + + unsigned Binary = 0; + + // Set the conditional execution predicate + Binary |= II->getPredicate(&MI) << ARMII::CondShift; + + // Encode S bit if MI modifies CPSR. + Binary |= getAddrModeSBit(MI, MCID); + + // Encode Rd. + Binary |= getMachineOpValue(MI, 0) << ARMII::RegRdShift; + + // Encode Rn which is PC. + Binary |= getARMRegisterNumbering(ARM::PC) << ARMII::RegRnShift; + + // Encode the displacement which is a so_imm. + // Set bit I(25) to identify this is the immediate form of <shifter_op> + Binary |= 1 << ARMII::I_BitShift; + emitConstPoolAddress(MI.getOperand(1).getIndex(), ARM::reloc_arm_so_imm_cp_entry); + + emitWordLE(Binary); +} + void ARMCodeEmitter::emitLEApcrelJTInstruction(const MachineInstr &MI) { // It's basically add r, pc, (LJTI - $+8) @@ -831,6 +904,14 @@ void ARMCodeEmitter::emitPseudoInstruction(const MachineInstr &MI) { switch (Opcode) { default: llvm_unreachable("ARMCodeEmitter::emitPseudoInstruction"); + case ARM::B: + emitBranchInstruction(MI); + break; + case ARM::BR_JTr: + case ARM::BR_JTm: + case ARM::BR_JTadd: + emitMiscBranchInstruction(MI); + break; case ARM::BX_CALL: case ARM::BMOVPCRX_CALL: case ARM::BXr9_CALL: @@ -863,6 +944,9 @@ void ARMCodeEmitter::emitPseudoInstruction(const MachineInstr &MI) { case ARM::CONSTPOOL_ENTRY: emitConstPoolInstruction(MI); break; + case ARM::LDMIA_RET: + emitLoadStoreMultipleInstruction(MI); + break; case ARM::PICADD: { // Remember of the address of the PC label for relocation later. addPCLabel(MI.getOperand(2).getImm()); @@ -898,7 +982,10 @@ void ARMCodeEmitter::emitPseudoInstruction(const MachineInstr &MI) { else emitMOVi2piecesInstruction(MI); break; - + case ARM::LEApcrel: + // Materialize constantpool index address. + emitLEApcrelInstruction(MI); + break; case ARM::LEApcrelJT: // Materialize jumptable address. emitLEApcrelJTInstruction(MI); @@ -999,6 +1086,11 @@ void ARMCodeEmitter::emitDataProcessingInstruction(const MachineInstr &MI, // Part of binary is determined by TableGn. unsigned Binary = getBinaryCodeForInstr(MI); + if (MCID.Opcode == ARM::MOVi16 || MCID.Opcode == ARM::MOVTi16) { + emitWordLE(Binary); + return; + } + // Set the conditional execution predicate Binary |= II->getPredicate(&MI) << ARMII::CondShift; @@ -1101,11 +1193,17 @@ void ARMCodeEmitter::emitLoadStoreInstruction(const MachineInstr &MI, // If this is an LDRi12, STRi12 or LDRcp, nothing more needs be done. if (MI.getOpcode() == ARM::LDRi12 || MI.getOpcode() == ARM::LDRcp || - MI.getOpcode() == ARM::STRi12) { + MI.getOpcode() == ARM::STRi12 || MI.getOpcode() == ARM::LDRBi12 || + MI.getOpcode() == ARM::STRBi12) { emitWordLE(Binary); return; } + if (MI.getOpcode() == ARM::BR_JTm) + Binary = 0x710F000; + else if (MI.getOpcode() == ARM::BR_JTr) + Binary = 0x1A0F000; + // Set the conditional execution predicate Binary |= II->getPredicate(&MI) << ARMII::CondShift; @@ -1261,6 +1359,11 @@ void ARMCodeEmitter::emitLoadStoreMultipleInstruction(const MachineInstr &MI) { // Part of binary is determined by TableGn. unsigned Binary = getBinaryCodeForInstr(MI); + if (MCID.getOpcode() == ARM::LDMIA_RET) { + IsUpdating = true; + Binary |= 0x8B00000; + } + // Set the conditional execution predicate Binary |= II->getPredicate(&MI) << ARMII::CondShift; @@ -1468,6 +1571,10 @@ void ARMCodeEmitter::emitBranchInstruction(const MachineInstr &MI) { // Part of binary is determined by TableGn. unsigned Binary = getBinaryCodeForInstr(MI); + if (MCID.Opcode == ARM::B) { + Binary = 0xEA000000; + } + // Set the conditional execution predicate Binary |= II->getPredicate(&MI) << ARMII::CondShift; @@ -1541,9 +1648,10 @@ static unsigned encodeVFPRd(const MachineInstr &MI, unsigned OpIdx) { unsigned Binary = 0; bool isSPVFP = ARM::SPRRegisterClass->contains(RegD); RegD = getARMRegisterNumbering(RegD); - if (!isSPVFP) - Binary |= RegD << ARMII::RegRdShift; - else { + if (!isSPVFP) { + Binary |= (RegD & 0x0F) << ARMII::RegRdShift; + Binary |= ((RegD & 0x10) >> 4) << ARMII::D_BitShift; + } else { Binary |= ((RegD & 0x1E) >> 1) << ARMII::RegRdShift; Binary |= (RegD & 0x01) << ARMII::D_BitShift; } @@ -1555,9 +1663,10 @@ static unsigned encodeVFPRn(const MachineInstr &MI, unsigned OpIdx) { unsigned Binary = 0; bool isSPVFP = ARM::SPRRegisterClass->contains(RegN); RegN = getARMRegisterNumbering(RegN); - if (!isSPVFP) - Binary |= RegN << ARMII::RegRnShift; - else { + if (!isSPVFP) { + Binary |= (RegN & 0x0F) << ARMII::RegRnShift; + Binary |= ((RegN & 0x10) >> 4) << ARMII::N_BitShift; + } else { Binary |= ((RegN & 0x1E) >> 1) << ARMII::RegRnShift; Binary |= (RegN & 0x01) << ARMII::N_BitShift; } @@ -1569,9 +1678,10 @@ static unsigned encodeVFPRm(const MachineInstr &MI, unsigned OpIdx) { unsigned Binary = 0; bool isSPVFP = ARM::SPRRegisterClass->contains(RegM); RegM = getARMRegisterNumbering(RegM); - if (!isSPVFP) - Binary |= RegM; - else { + if (!isSPVFP) { + Binary |= (RegM & 0x0F); + Binary |= ((RegM & 0x10) >> 4) << ARMII::M_BitShift; + } else { Binary |= ((RegM & 0x1E) >> 1); Binary |= (RegM & 0x01) << ARMII::M_BitShift; } @@ -1588,9 +1698,6 @@ void ARMCodeEmitter::emitVFPArithInstruction(const MachineInstr &MI) { Binary |= II->getPredicate(&MI) << ARMII::CondShift; unsigned OpIdx = 0; - assert((Binary & ARMII::D_BitShift) == 0 && - (Binary & ARMII::N_BitShift) == 0 && - (Binary & ARMII::M_BitShift) == 0 && "VFP encoding bug!"); // Encode Dd / Sd. Binary |= encodeVFPRd(MI, OpIdx++); @@ -1680,6 +1787,12 @@ void ARMCodeEmitter::emitVFPLoadStoreInstruction(const MachineInstr &MI) { // Set the conditional execution predicate Binary |= II->getPredicate(&MI) << ARMII::CondShift; + if (MI.getOpcode() == ARM::VLDRS || MI.getOpcode() == ARM::VLDRD || + MI.getOpcode() == ARM::VSTRS || MI.getOpcode() == ARM::VSTRD){ + emitWordLE(Binary); + return; + } + unsigned OpIdx = 0; // Encode Dd / Sd. @@ -1755,6 +1868,26 @@ ARMCodeEmitter::emitVFPLoadStoreMultipleInstruction(const MachineInstr &MI) { emitWordLE(Binary); } +void ARMCodeEmitter::emitMiscInstruction(const MachineInstr &MI) { + unsigned Opcode = MI.getDesc().Opcode; + // Part of binary is determined by TableGn. + unsigned Binary = getBinaryCodeForInstr(MI); + + if (Opcode == ARM::FCONSTS) { + unsigned Imm = getMachineOpValue(MI, 1); + Binary &= ~(0x780000 >> 19); + Binary |= (Imm & 0x780000) >> 19; + Binary &= ~(0x3800000 >> 7); + Binary |= (Imm & 0x3800000) >> 7; + Binary = VFPThumb2PostEncoder(MI, Binary); + } + + // Set the conditional execution predicate + Binary |= II->getPredicate(&MI) << ARMII::CondShift; + + emitWordLE(Binary); +} + static unsigned encodeNEONRd(const MachineInstr &MI, unsigned OpIdx) { unsigned RegD = MI.getOperand(OpIdx).getReg(); unsigned Binary = 0; diff --git a/lib/Target/ARM/ARMJITInfo.cpp b/lib/Target/ARM/ARMJITInfo.cpp index 45b7e48..11f1b33 100644 --- a/lib/Target/ARM/ARMJITInfo.cpp +++ b/lib/Target/ARM/ARMJITInfo.cpp @@ -15,6 +15,7 @@ #include "ARMJITInfo.h" #include "ARMInstrInfo.h" #include "ARMConstantPoolValue.h" +#include "ARMAddressingModes.h" #include "ARMRelocations.h" #include "ARMSubtarget.h" #include "llvm/Function.h" @@ -48,7 +49,7 @@ static TargetJITInfo::JITCompilerFn JITCompilerFunction; // write our own wrapper, which does things our way, so we have complete // control over register saving and restoring. extern "C" { -#if defined(__arm__) +#if defined(__arm__) && !defined(ANDROID) void ARMCompilationCallback(); asm( ".text\n" @@ -248,6 +249,7 @@ intptr_t ARMJITInfo::resolveRelocDestAddr(MachineRelocation *MR) const { return getJumpTableBaseAddr(MR->getJumpTableIndex()); case ARM::reloc_arm_cp_entry: case ARM::reloc_arm_vfp_cp_entry: + case ARM::reloc_arm_so_imm_cp_entry: // Constant pool entry address. return getConstantPoolEntryAddr(MR->getConstantPoolIndex()); case ARM::reloc_arm_machine_cp_entry: { @@ -294,6 +296,29 @@ void ARMJITInfo::relocate(void *Function, MachineRelocation *MR, getARMRegisterNumbering(ARM::PC) << ARMII::RegRnShift; break; } + case ARM::reloc_arm_so_imm_cp_entry: { + ResultPtr = ResultPtr - (intptr_t)RelocPos - 8; + // If the result is positive, set bit U(23) to 1. + if (ResultPtr >= 0) + *((intptr_t*)RelocPos) |= 1 << ARMII::U_BitShift; + else { + // Otherwise, obtain the absolute value and set bit U(23) to 0. + *((intptr_t*)RelocPos) &= ~(1 << ARMII::U_BitShift); + // FIXME: Also set bit 22 to 1 since 'sub' instruction is going to be used. + *((intptr_t*)RelocPos) |= 1 << 22; + ResultPtr = - ResultPtr; + } + + int SoImmVal = ARM_AM::getSOImmVal(ResultPtr); + assert(SoImmVal != -1 && "Not a valid so_imm value!"); + *((intptr_t*)RelocPos) |= (ARM_AM::getSOImmValRot((unsigned)SoImmVal) >> 1) + << ARMII::SoRotImmShift; + *((intptr_t*)RelocPos) |= ARM_AM::getSOImmValImm((unsigned)SoImmVal); + // Set register Rn to PC. + *((intptr_t*)RelocPos) |= + getARMRegisterNumbering(ARM::PC) << ARMII::RegRnShift; + break; + } case ARM::reloc_arm_pic_jt: case ARM::reloc_arm_machine_cp_entry: case ARM::reloc_arm_absolute: { diff --git a/lib/Target/ARM/ARMRelocations.h b/lib/Target/ARM/ARMRelocations.h index 86e7206..291f3cc 100644 --- a/lib/Target/ARM/ARMRelocations.h +++ b/lib/Target/ARM/ARMRelocations.h @@ -35,6 +35,10 @@ namespace llvm { // should be divided by 4. reloc_arm_vfp_cp_entry, + // reloc_arm_so_imm - Same as reloc_arm_cp_entry except contant should be + // encoded as so_imm value. + reloc_arm_so_imm_cp_entry, + // reloc_arm_machine_cp_entry - Relocation of a ARM machine constantpool // entry. reloc_arm_machine_cp_entry, diff --git a/lib/Target/ARM/Android.mk b/lib/Target/ARM/Android.mk new file mode 100644 index 0000000..5dbbc17 --- /dev/null +++ b/lib/Target/ARM/Android.mk @@ -0,0 +1,90 @@ +LOCAL_PATH := $(call my-dir) + +arm_codegen_TBLGEN_TABLES := \ + ARMGenAsmWriter.inc \ + ARMGenMCCodeEmitter.inc \ + ARMGenRegisterInfo.inc \ + ARMGenInstrInfo.inc \ + ARMGenDAGISel.inc \ + ARMGenFastISel.inc \ + ARMGenSubtargetInfo.inc \ + ARMGenCodeEmitter.inc \ + ARMGenCallingConv.inc + +arm_codegen_SRC_FILES := \ + ARMAsmBackend.cpp \ + ARMAsmPrinter.cpp \ + ARMBaseInstrInfo.cpp \ + ARMBaseRegisterInfo.cpp \ + ARMCodeEmitter.cpp \ + ARMConstantIslandPass.cpp \ + ARMConstantPoolValue.cpp \ + ARMELFWriterInfo.cpp \ + ARMExpandPseudoInsts.cpp \ + ARMFastISel.cpp \ + ARMFrameLowering.cpp \ + ARMGlobalMerge.cpp \ + ARMHazardRecognizer.cpp \ + ARMISelDAGToDAG.cpp \ + ARMISelLowering.cpp \ + ARMInstrInfo.cpp \ + ARMJITInfo.cpp \ + ARMLoadStoreOptimizer.cpp \ + ARMMachObjectWriter.cpp \ + ARMMCAsmInfo.cpp \ + ARMMCCodeEmitter.cpp\ + ARMMCExpr.cpp \ + ARMMCInstLower.cpp \ + ARMRegisterInfo.cpp \ + ARMSelectionDAGInfo.cpp \ + ARMSubtarget.cpp \ + ARMTargetMachine.cpp \ + ARMTargetObjectFile.cpp \ + InstPrinter/ARMInstPrinter.cpp \ + MLxExpansionPass.cpp \ + NEONMoveFix.cpp \ + Thumb1FrameLowering.cpp \ + Thumb1InstrInfo.cpp \ + Thumb1RegisterInfo.cpp \ + Thumb2ITBlockPass.cpp \ + Thumb2InstrInfo.cpp \ + Thumb2RegisterInfo.cpp \ + Thumb2SizeReduction.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(arm_codegen_TBLGEN_TABLES) + +LOCAL_SRC_FILES := $(arm_codegen_SRC_FILES) + +LOCAL_MODULE:= libLLVMARMCodeGen + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device only +# ===================================================== +ifeq ($(TARGET_ARCH),arm) +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(arm_codegen_TBLGEN_TABLES) + +LOCAL_SRC_FILES := $(arm_codegen_SRC_FILES) + +LOCAL_MODULE:= libLLVMARMCodeGen + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) +endif diff --git a/lib/Target/ARM/AsmParser/Android.mk b/lib/Target/ARM/AsmParser/Android.mk new file mode 100644 index 0000000..57678e0 --- /dev/null +++ b/lib/Target/ARM/AsmParser/Android.mk @@ -0,0 +1,30 @@ +LOCAL_PATH := $(call my-dir) + +# For the host only +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := \ + ARMGenInstrInfo.inc \ + ARMGenRegisterInfo.inc \ + ARMGenAsmMatcher.inc \ + ARMGenSubtargetInfo.inc + + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := \ + ARMAsmLexer.cpp \ + ARMAsmParser.cpp + +LOCAL_C_INCLUDES += \ + $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMARMAsmParser + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_HOST_STATIC_LIBRARY) diff --git a/lib/Target/ARM/Disassembler/Android.mk b/lib/Target/ARM/Disassembler/Android.mk new file mode 100644 index 0000000..d5c9c7b --- /dev/null +++ b/lib/Target/ARM/Disassembler/Android.mk @@ -0,0 +1,56 @@ +LOCAL_PATH := $(call my-dir) + +arm_disassembler_TBLGEN_TABLES := \ + ARMGenDecoderTables.inc \ + ARMGenEDInfo.inc \ + ARMGenInstrInfo.inc \ + ARMGenRegisterInfo.inc + +arm_disassembler_SRC_FILES := \ + ARMDisassembler.cpp \ + ARMDisassemblerCore.cpp + +# For the device +# ===================================================== +ifeq ($(TARGET_ARCH),arm) +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(arm_disassembler_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(arm_disassembler_SRC_FILES) + +LOCAL_C_INCLUDES += $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMARMDisassembler + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_STATIC_LIBRARY) +endif + +# For the host +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(arm_disassembler_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(arm_disassembler_SRC_FILES) + +LOCAL_C_INCLUDES += $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMARMDisassembler + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + diff --git a/lib/Target/ARM/InstPrinter/Android.mk b/lib/Target/ARM/InstPrinter/Android.mk new file mode 100644 index 0000000..5ecad8b --- /dev/null +++ b/lib/Target/ARM/InstPrinter/Android.mk @@ -0,0 +1,54 @@ +LOCAL_PATH := $(call my-dir) + +arm_asm_printer_TBLGEN_TABLES := \ + ARMGenAsmWriter.inc \ + ARMGenRegisterInfo.inc\ + ARMGenInstrInfo.inc + +arm_asm_printer_SRC_FILES := \ + ARMInstPrinter.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(arm_asm_printer_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(arm_asm_printer_SRC_FILES) + +LOCAL_MODULE:= libLLVMARMAsmPrinter + +LOCAL_C_INCLUDES += \ + $(LOCAL_PATH)/.. + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device only +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(arm_asm_printer_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(arm_asm_printer_SRC_FILES) + +LOCAL_C_INCLUDES+= \ + $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMARMAsmPrinter + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_STATIC_LIBRARY) + diff --git a/lib/Target/ARM/TargetInfo/Android.mk b/lib/Target/ARM/TargetInfo/Android.mk new file mode 100644 index 0000000..a03fff9 --- /dev/null +++ b/lib/Target/ARM/TargetInfo/Android.mk @@ -0,0 +1,54 @@ +LOCAL_PATH := $(call my-dir) + +arm_target_info_TBLGEN_TABLES := \ + ARMGenRegisterInfo.inc \ + ARMGenInstrInfo.inc + +arm_target_info_SRC_FILES := \ + ARMTargetInfo.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(arm_target_info_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(arm_target_info_SRC_FILES) + +LOCAL_C_INCLUDES += \ + $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMARMInfo + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +ifeq ($(TARGET_ARCH),arm) +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(arm_target_info_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(arm_target_info_SRC_FILES) + +LOCAL_C_INCLUDES += \ + $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMARMInfo + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_STATIC_LIBRARY) +endif diff --git a/lib/Target/Android.mk b/lib/Target/Android.mk new file mode 100644 index 0000000..ddbe63a --- /dev/null +++ b/lib/Target/Android.mk @@ -0,0 +1,43 @@ +LOCAL_PATH:= $(call my-dir) + +target_SRC_FILES := \ + Mangler.cpp \ + Target.cpp \ + TargetAsmInfo.cpp \ + TargetAsmLexer.cpp \ + TargetData.cpp \ + TargetELFWriterInfo.cpp \ + TargetFrameLowering.cpp \ + TargetInstrInfo.cpp \ + TargetIntrinsicInfo.cpp \ + TargetLoweringObjectFile.cpp \ + TargetLibraryInfo.cpp \ + TargetMachine.cpp \ + TargetRegisterInfo.cpp \ + TargetSubtargetInfo.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(target_SRC_FILES) + +LOCAL_MODULE:= libLLVMTarget + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(target_SRC_FILES) + +LOCAL_MODULE:= libLLVMTarget + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/Target/X86/Android.mk b/lib/Target/X86/Android.mk new file mode 100644 index 0000000..537e462 --- /dev/null +++ b/lib/Target/X86/Android.mk @@ -0,0 +1,73 @@ +LOCAL_PATH := $(call my-dir) + +x86_codegen_TBLGEN_TABLES := \ + X86GenAsmWriter.inc \ + X86GenAsmWriter1.inc \ + X86GenRegisterInfo.inc \ + X86GenInstrInfo.inc \ + X86GenDAGISel.inc \ + X86GenFastISel.inc \ + X86GenSubtargetInfo.inc \ + X86GenCallingConv.inc + +x86_codegen_SRC_FILES := \ + SSEDomainFix.cpp \ + X86AsmBackend.cpp \ + X86AsmPrinter.cpp \ + X86COFFMachineModuleInfo.cpp \ + X86CodeEmitter.cpp \ + X86ELFWriterInfo.cpp \ + X86FastISel.cpp \ + X86FloatingPoint.cpp\ + X86FrameLowering.cpp\ + X86ISelDAGToDAG.cpp \ + X86ISelLowering.cpp \ + X86InstrInfo.cpp \ + X86JITInfo.cpp \ + X86MachObjectWriter.cpp \ + X86MCAsmInfo.cpp \ + X86MCCodeEmitter.cpp \ + X86MCInstLower.cpp \ + X86RegisterInfo.cpp \ + X86SelectionDAGInfo.cpp \ + X86Subtarget.cpp \ + X86TargetMachine.cpp \ + X86TargetObjectFile.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(x86_codegen_TBLGEN_TABLES) + +LOCAL_SRC_FILES := $(x86_codegen_SRC_FILES) + +LOCAL_MODULE:= libLLVMX86CodeGen + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device only +# ===================================================== +ifeq ($(TARGET_ARCH),x86) +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(x86_codegen_TBLGEN_TABLES) + +LOCAL_SRC_FILES := $(x86_codegen_SRC_FILES) + +LOCAL_MODULE:= libLLVMX86CodeGen + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) +endif diff --git a/lib/Target/X86/AsmParser/Android.mk b/lib/Target/X86/AsmParser/Android.mk new file mode 100644 index 0000000..fc501ec --- /dev/null +++ b/lib/Target/X86/AsmParser/Android.mk @@ -0,0 +1,30 @@ +LOCAL_PATH := $(call my-dir) + +# For the device only +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := \ + X86GenAsmMatcher.inc \ + X86GenInstrInfo.inc \ + X86GenRegisterInfo.inc \ + X86GenSubtargetInfo.inc + + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := \ + X86AsmLexer.cpp \ + X86AsmParser.cpp + +LOCAL_C_INCLUDES += \ + $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMX86AsmParser + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_HOST_STATIC_LIBRARY) diff --git a/lib/Target/X86/Disassembler/Android.mk b/lib/Target/X86/Disassembler/Android.mk new file mode 100644 index 0000000..69d3435 --- /dev/null +++ b/lib/Target/X86/Disassembler/Android.mk @@ -0,0 +1,55 @@ +LOCAL_PATH := $(call my-dir) + +x86_disassembler_TBLGEN_TABLES := \ + X86GenDisassemblerTables.inc \ + X86GenEDInfo.inc \ + X86GenRegisterInfo.inc + +x86_disassembler_SRC_FILES := \ + X86Disassembler.cpp \ + X86DisassemblerDecoder.c + +# For the device +# ===================================================== +ifeq ($(TARGET_ARCH),x86) +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(x86_disassembler_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(x86_disassembler_SRC_FILES) + +LOCAL_C_INCLUDES += $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMX86Disassembler + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_STATIC_LIBRARY) +endif + +# For the host +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(x86_disassembler_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(x86_disassembler_SRC_FILES) + +LOCAL_C_INCLUDES += \ + $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMX86Disassembler + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_HOST_STATIC_LIBRARY) diff --git a/lib/Target/X86/InstPrinter/Android.mk b/lib/Target/X86/InstPrinter/Android.mk new file mode 100644 index 0000000..0fd7058 --- /dev/null +++ b/lib/Target/X86/InstPrinter/Android.mk @@ -0,0 +1,57 @@ +LOCAL_PATH := $(call my-dir) + +x86_instprinter_TBLGEN_TABLES := \ + X86GenAsmWriter.inc \ + X86GenAsmWriter1.inc \ + X86GenInstrInfo.inc \ + X86GenRegisterInfo.inc \ + X86GenSubtargetInfo.inc + +x86_instprinter_SRC_FILES := \ + X86ATTInstPrinter.cpp \ + X86IntelInstPrinter.cpp \ + X86InstComments.cpp + +# For the device +# ===================================================== +ifeq ($(TARGET_ARCH),x86) +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(x86_instprinter_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(x86_instprinter_SRC_FILES) + +LOCAL_C_INCLUDES += $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMX86AsmPrinter + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_STATIC_LIBRARY) +endif + +# For the host +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(x86_instprinter_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(x86_instprinter_SRC_FILES) + +LOCAL_C_INCLUDES += $(LOCAL_PATH)/.. + +LOCAL_MODULE := libLLVMX86AsmPrinter + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_HOST_STATIC_LIBRARY) diff --git a/lib/Target/X86/MCTargetDesc/Android.mk b/lib/Target/X86/MCTargetDesc/Android.mk new file mode 100644 index 0000000..70b88f8 --- /dev/null +++ b/lib/Target/X86/MCTargetDesc/Android.mk @@ -0,0 +1,36 @@ +#LOCAL_PATH := $(call my-dir) +# +#x86_codegen_SRC_FILES := \ +# X86TargetDesc.cpp +# +## For the host +## ===================================================== +#include $(CLEAR_VARS) +#include $(CLEAR_TBLGEN_VARS) +# +#TBLGEN_TABLES := $(x86_codegen_TBLGEN_TABLES) +# +#LOCAL_SRC_FILES := $(x86_codegen_SRC_FILES) +# +#LOCAL_MODULE:= libLLVMX86Desc +# +#LOCAL_MODULE_TAGS := optional +# +#include $(LLVM_HOST_BUILD_MK) +#include $(BUILD_HOST_STATIC_LIBRARY) +# +## For the device only +## ===================================================== +#ifeq ($(TARGET_ARCH),x86) +#include $(CLEAR_VARS) +#include $(CLEAR_TBLGEN_VARS) +# +#LOCAL_SRC_FILES := $(x86_codegen_SRC_FILES) +# +#LOCAL_MODULE:= libLLVMX86Desc +# +#LOCAL_MODULE_TAGS := optional +# +#include $(LLVM_DEVICE_BUILD_MK) +#include $(BUILD_STATIC_LIBRARY) +#endif diff --git a/lib/Target/X86/TargetInfo/Android.mk b/lib/Target/X86/TargetInfo/Android.mk new file mode 100644 index 0000000..5d81f33 --- /dev/null +++ b/lib/Target/X86/TargetInfo/Android.mk @@ -0,0 +1,54 @@ +LOCAL_PATH := $(call my-dir) + +x86_target_info_TBLGEN_TABLES := \ + X86GenRegisterInfo.inc \ + X86GenInstrInfo.inc + +x86_target_info_SRC_FILES := \ + X86TargetInfo.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(x86_target_info_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(x86_target_info_SRC_FILES) + +LOCAL_C_INCLUDES += \ + $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMX86Info + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +ifeq ($(TARGET_ARCH),x86) +include $(CLEAR_VARS) +include $(CLEAR_TBLGEN_VARS) + +TBLGEN_TABLES := $(x86_target_info_TBLGEN_TABLES) + +TBLGEN_TD_DIR := $(LOCAL_PATH)/.. + +LOCAL_SRC_FILES := $(x86_target_info_SRC_FILES) + +LOCAL_C_INCLUDES += \ + $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMX86Info + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_TBLGEN_RULES_MK) +include $(BUILD_STATIC_LIBRARY) +endif diff --git a/lib/Target/X86/Utils/Android.mk b/lib/Target/X86/Utils/Android.mk new file mode 100644 index 0000000..d9dd670 --- /dev/null +++ b/lib/Target/X86/Utils/Android.mk @@ -0,0 +1,34 @@ +LOCAL_PATH := $(call my-dir) + +x86_utils_SRC_FILES := \ + X86ShuffleDecode.cpp + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(x86_utils_SRC_FILES) + +LOCAL_C_INCLUDES += $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMX86Utils + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(BUILD_STATIC_LIBRARY) + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(x86_utils_SRC_FILES) + +LOCAL_C_INCLUDES += $(LOCAL_PATH)/.. + +LOCAL_MODULE:= libLLVMX86Utils + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(BUILD_HOST_STATIC_LIBRARY) diff --git a/lib/Transforms/IPO/Android.mk b/lib/Transforms/IPO/Android.mk new file mode 100644 index 0000000..b19ef66 --- /dev/null +++ b/lib/Transforms/IPO/Android.mk @@ -0,0 +1,50 @@ +LOCAL_PATH:= $(call my-dir) + +transforms_ipo_SRC_FILES := \ + ArgumentPromotion.cpp \ + ConstantMerge.cpp \ + DeadArgumentElimination.cpp \ + DeadTypeElimination.cpp \ + ExtractGV.cpp \ + FunctionAttrs.cpp \ + GlobalDCE.cpp \ + GlobalOpt.cpp \ + IPConstantPropagation.cpp \ + IPO.cpp \ + InlineAlways.cpp \ + InlineSimple.cpp \ + Inliner.cpp \ + Internalize.cpp \ + LoopExtractor.cpp \ + LowerSetJmp.cpp \ + MergeFunctions.cpp \ + PartialInlining.cpp \ + PruneEH.cpp \ + StripDeadPrototypes.cpp \ + StripSymbols.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(transforms_ipo_SRC_FILES) +LOCAL_MODULE:= libLLVMipo + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(transforms_ipo_SRC_FILES) +LOCAL_MODULE:= libLLVMipo + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/Transforms/InstCombine/Android.mk b/lib/Transforms/InstCombine/Android.mk new file mode 100644 index 0000000..b30fcd9 --- /dev/null +++ b/lib/Transforms/InstCombine/Android.mk @@ -0,0 +1,42 @@ +LOCAL_PATH:= $(call my-dir) + +transforms_inst_combine_SRC_FILES := \ + InstCombineAddSub.cpp \ + InstCombineAndOrXor.cpp \ + InstCombineCalls.cpp \ + InstCombineCasts.cpp \ + InstCombineCompares.cpp \ + InstCombineLoadStoreAlloca.cpp \ + InstCombineMulDivRem.cpp \ + InstCombinePHI.cpp \ + InstCombineSelect.cpp \ + InstCombineShifts.cpp \ + InstCombineSimplifyDemanded.cpp \ + InstCombineVectorOps.cpp \ + InstructionCombining.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(transforms_inst_combine_SRC_FILES) +LOCAL_MODULE:= libLLVMInstCombine + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(transforms_inst_combine_SRC_FILES) +LOCAL_MODULE:= libLLVMInstCombine + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/Transforms/Instrumentation/Android.mk b/lib/Transforms/Instrumentation/Android.mk new file mode 100644 index 0000000..d4ac0da --- /dev/null +++ b/lib/Transforms/Instrumentation/Android.mk @@ -0,0 +1,20 @@ +LOCAL_PATH:= $(call my-dir) + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := \ + EdgeProfiling.cpp \ + GCOVProfiling.cpp \ + Instrumentation.cpp \ + ProfilingUtils.cpp \ + PathProfiling.cpp \ + OptimalEdgeProfiling.cpp + +LOCAL_MODULE:= libLLVMInstrumentation + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(BUILD_HOST_STATIC_LIBRARY) diff --git a/lib/Transforms/Scalar/Android.mk b/lib/Transforms/Scalar/Android.mk new file mode 100644 index 0000000..a57d4bd --- /dev/null +++ b/lib/Transforms/Scalar/Android.mk @@ -0,0 +1,62 @@ +LOCAL_PATH:= $(call my-dir) + +transforms_scalar_SRC_FILES := \ + ADCE.cpp \ + BasicBlockPlacement.cpp \ + CodeGenPrepare.cpp \ + ConstantProp.cpp \ + CorrelatedValuePropagation.cpp \ + DCE.cpp \ + DeadStoreElimination.cpp \ + EarlyCSE.cpp \ + GVN.cpp \ + IndVarSimplify.cpp \ + JumpThreading.cpp \ + LICM.cpp \ + LoopDeletion.cpp \ + LoopIdiomRecognize.cpp \ + LoopRotation.cpp \ + LoopStrengthReduce.cpp \ + LoopUnrollPass.cpp \ + LoopUnswitch.cpp \ + LowerAtomic.cpp \ + MemCpyOptimizer.cpp \ + ObjCARC.cpp \ + Reassociate.cpp \ + Reg2Mem.cpp \ + SCCP.cpp \ + Scalar.cpp \ + ScalarReplAggregates.cpp \ + SimplifyCFGPass.cpp \ + SimplifyLibCalls.cpp \ + Sink.cpp \ + TailDuplication.cpp \ + TailRecursionElimination.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := \ + $(transforms_scalar_SRC_FILES) + +LOCAL_MODULE:= libLLVMScalarOpts + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(transforms_scalar_SRC_FILES) +LOCAL_MODULE:= libLLVMScalarOpts + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/Transforms/Utils/Android.mk b/lib/Transforms/Utils/Android.mk new file mode 100644 index 0000000..93d36e7 --- /dev/null +++ b/lib/Transforms/Utils/Android.mk @@ -0,0 +1,53 @@ +LOCAL_PATH:= $(call my-dir) + +transforms_utils_SRC_FILES := \ + AddrModeMatcher.cpp \ + BasicBlockUtils.cpp \ + BasicInliner.cpp \ + BreakCriticalEdges.cpp \ + BuildLibCalls.cpp \ + CloneFunction.cpp \ + CloneModule.cpp \ + CodeExtractor.cpp \ + DemoteRegToStack.cpp \ + InlineFunction.cpp \ + InstructionNamer.cpp \ + LCSSA.cpp \ + Local.cpp \ + LoopSimplify.cpp \ + LoopUnroll.cpp \ + LowerInvoke.cpp \ + LowerSwitch.cpp \ + Mem2Reg.cpp \ + PromoteMemoryToRegister.cpp \ + SSAUpdater.cpp \ + SimplifyCFG.cpp \ + SimplifyInstructions.cpp \ + UnifyFunctionExitNodes.cpp \ + ValueMapper.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(transforms_utils_SRC_FILES) +LOCAL_MODULE:= libLLVMTransformUtils + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(transforms_utils_SRC_FILES) +LOCAL_MODULE:= libLLVMTransformUtils + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) diff --git a/lib/VMCore/Android.mk b/lib/VMCore/Android.mk new file mode 100644 index 0000000..7b99aeb --- /dev/null +++ b/lib/VMCore/Android.mk @@ -0,0 +1,70 @@ +LOCAL_PATH:= $(call my-dir) + +vmcore_SRC_FILES := \ + AsmWriter.cpp \ + Attributes.cpp \ + AutoUpgrade.cpp \ + BasicBlock.cpp \ + ConstantFold.cpp \ + Constants.cpp \ + Core.cpp \ + DebugLoc.cpp \ + DebugInfoProbe.cpp \ + Dominators.cpp \ + Function.cpp \ + GVMaterializer.cpp \ + Globals.cpp \ + IRBuilder.cpp \ + InlineAsm.cpp \ + Instruction.cpp \ + Instructions.cpp \ + IntrinsicInst.cpp \ + LLVMContext.cpp \ + LLVMContextImpl.cpp \ + LeakDetector.cpp \ + Metadata.cpp \ + Module.cpp \ + Pass.cpp \ + PassManager.cpp \ + PassRegistry.cpp \ + PrintModulePass.cpp \ + Type.cpp \ + TypeSymbolTable.cpp \ + Use.cpp \ + User.cpp\ + Value.cpp \ + ValueSymbolTable.cpp \ + ValueTypes.cpp \ + Verifier.cpp + +# For the host +# ===================================================== +include $(CLEAR_VARS) + +REQUIRES_RTTI := 1 + +LOCAL_SRC_FILES := $(vmcore_SRC_FILES) + +LOCAL_MODULE:= libLLVMCore + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_HOST_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_HOST_STATIC_LIBRARY) + +# For the device +# ===================================================== +include $(CLEAR_VARS) + +REQUIRES_RTTI := 1 + +LOCAL_SRC_FILES := $(vmcore_SRC_FILES) + +LOCAL_MODULE:= libLLVMCore + +LOCAL_MODULE_TAGS := optional + +include $(LLVM_DEVICE_BUILD_MK) +include $(LLVM_GEN_INTRINSICS_MK) +include $(BUILD_STATIC_LIBRARY) |