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-rw-r--r--test/CodeGen/R600/llvm.cos.ll12
1 files changed, 6 insertions, 6 deletions
diff --git a/test/CodeGen/R600/llvm.cos.ll b/test/CodeGen/R600/llvm.cos.ll
index 8fb4559..aaf2305 100644
--- a/test/CodeGen/R600/llvm.cos.ll
+++ b/test/CodeGen/R600/llvm.cos.ll
@@ -5,15 +5,15 @@
;CHECK: ADD *
;CHECK: COS * T{{[0-9]+\.[XYZW], PV\.[XYZW]}}
-define void @test() {
- %r0 = call float @llvm.R600.load.input(i32 0)
+define void @test(<4 x float> inreg %reg0) #0 {
+ %r0 = extractelement <4 x float> %reg0, i32 0
%r1 = call float @llvm.cos.f32(float %r0)
- call void @llvm.AMDGPU.store.output(float %r1, i32 0)
+ %vec = insertelement <4 x float> undef, float %r1, i32 0
+ call void @llvm.R600.store.swizzle(<4 x float> %vec, i32 0, i32 0)
ret void
}
declare float @llvm.cos.f32(float) readnone
+declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
-declare float @llvm.R600.load.input(i32) readnone
-
-declare void @llvm.AMDGPU.store.output(float, i32)
+attributes #0 = { "ShaderType"="0" }