diff options
Diffstat (limited to 'test/CodeGen/R600/work-item-intrinsics.ll')
-rw-r--r-- | test/CodeGen/R600/work-item-intrinsics.ll | 52 |
1 files changed, 26 insertions, 26 deletions
diff --git a/test/CodeGen/R600/work-item-intrinsics.ll b/test/CodeGen/R600/work-item-intrinsics.ll index d2acc5a..9618d7f 100644 --- a/test/CodeGen/R600/work-item-intrinsics.ll +++ b/test/CodeGen/R600/work-item-intrinsics.ll @@ -5,8 +5,8 @@ ; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] ; R600-CHECK: MOV [[VAL]], KC0[0].X ; SI-CHECK: @ngroups_x -; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 0 -; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]] +; SI-CHECK: S_LOAD_DWORD [[VAL:s[0-9]+]], s[0:1], 0 +; SI-CHECK: V_MOV_B32_e32 [[VVAL:v[0-9]+]], [[VAL]] ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] define void @ngroups_x (i32 addrspace(1)* %out) { entry: @@ -19,8 +19,8 @@ entry: ; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] ; R600-CHECK: MOV [[VAL]], KC0[0].Y ; SI-CHECK: @ngroups_y -; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 1 -; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]] +; SI-CHECK: S_LOAD_DWORD [[VAL:s[0-9]+]], s[0:1], 1 +; SI-CHECK: V_MOV_B32_e32 [[VVAL:v[0-9]+]], [[VAL]] ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] define void @ngroups_y (i32 addrspace(1)* %out) { entry: @@ -33,8 +33,8 @@ entry: ; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] ; R600-CHECK: MOV [[VAL]], KC0[0].Z ; SI-CHECK: @ngroups_z -; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 2 -; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]] +; SI-CHECK: S_LOAD_DWORD [[VAL:s[0-9]+]], s[0:1], 2 +; SI-CHECK: V_MOV_B32_e32 [[VVAL:v[0-9]+]], [[VAL]] ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] define void @ngroups_z (i32 addrspace(1)* %out) { entry: @@ -47,8 +47,8 @@ entry: ; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] ; R600-CHECK: MOV [[VAL]], KC0[0].W ; SI-CHECK: @global_size_x -; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 3 -; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]] +; SI-CHECK: S_LOAD_DWORD [[VAL:s[0-9]+]], s[0:1], 3 +; SI-CHECK: V_MOV_B32_e32 [[VVAL:v[0-9]+]], [[VAL]] ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] define void @global_size_x (i32 addrspace(1)* %out) { entry: @@ -61,8 +61,8 @@ entry: ; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] ; R600-CHECK: MOV [[VAL]], KC0[1].X ; SI-CHECK: @global_size_y -; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 4 -; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]] +; SI-CHECK: S_LOAD_DWORD [[VAL:s[0-9]+]], s[0:1], 4 +; SI-CHECK: V_MOV_B32_e32 [[VVAL:v[0-9]+]], [[VAL]] ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] define void @global_size_y (i32 addrspace(1)* %out) { entry: @@ -75,8 +75,8 @@ entry: ; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] ; R600-CHECK: MOV [[VAL]], KC0[1].Y ; SI-CHECK: @global_size_z -; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 5 -; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]] +; SI-CHECK: S_LOAD_DWORD [[VAL:s[0-9]+]], s[0:1], 5 +; SI-CHECK: V_MOV_B32_e32 [[VVAL:v[0-9]+]], [[VAL]] ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] define void @global_size_z (i32 addrspace(1)* %out) { entry: @@ -89,8 +89,8 @@ entry: ; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] ; R600-CHECK: MOV [[VAL]], KC0[1].Z ; SI-CHECK: @local_size_x -; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 6 -; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]] +; SI-CHECK: S_LOAD_DWORD [[VAL:s[0-9]+]], s[0:1], 6 +; SI-CHECK: V_MOV_B32_e32 [[VVAL:v[0-9]+]], [[VAL]] ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] define void @local_size_x (i32 addrspace(1)* %out) { entry: @@ -103,8 +103,8 @@ entry: ; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] ; R600-CHECK: MOV [[VAL]], KC0[1].W ; SI-CHECK: @local_size_y -; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 7 -; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]] +; SI-CHECK: S_LOAD_DWORD [[VAL:s[0-9]+]], s[0:1], 7 +; SI-CHECK: V_MOV_B32_e32 [[VVAL:v[0-9]+]], [[VAL]] ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] define void @local_size_y (i32 addrspace(1)* %out) { entry: @@ -117,8 +117,8 @@ entry: ; R600-CHECK: MEM_RAT_CACHELESS STORE_RAW [[VAL:T[0-9]+\.X]] ; R600-CHECK: MOV [[VAL]], KC0[2].X ; SI-CHECK: @local_size_z -; SI-CHECK: S_LOAD_DWORD [[VAL:SGPR[0-9]+]], SGPR0_SGPR1, 8 -; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], [[VAL]] +; SI-CHECK: S_LOAD_DWORD [[VAL:s[0-9]+]], s[0:1], 8 +; SI-CHECK: V_MOV_B32_e32 [[VVAL:v[0-9]+]], [[VAL]] ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] define void @local_size_z (i32 addrspace(1)* %out) { entry: @@ -127,12 +127,12 @@ entry: ret void } -; The tgid values are stored in SGPRs offset by the number of user SGPRs. -; Currently we always use exactly 2 user SGPRs for the pointer to the +; The tgid values are stored in ss offset by the number of user ss. +; Currently we always use exactly 2 user ss for the pointer to the ; kernel arguments, but this may change in the future. ; SI-CHECK: @tgid_x -; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], SGPR2 +; SI-CHECK: V_MOV_B32_e32 [[VVAL:v[0-9]+]], s2 ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] define void @tgid_x (i32 addrspace(1)* %out) { entry: @@ -142,7 +142,7 @@ entry: } ; SI-CHECK: @tgid_y -; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], SGPR3 +; SI-CHECK: V_MOV_B32_e32 [[VVAL:v[0-9]+]], s3 ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] define void @tgid_y (i32 addrspace(1)* %out) { entry: @@ -152,7 +152,7 @@ entry: } ; SI-CHECK: @tgid_z -; SI-CHECK: V_MOV_B32_e32 [[VVAL:VGPR[0-9]+]], SGPR4 +; SI-CHECK: V_MOV_B32_e32 [[VVAL:v[0-9]+]], s4 ; SI-CHECK: BUFFER_STORE_DWORD [[VVAL]] define void @tgid_z (i32 addrspace(1)* %out) { entry: @@ -162,7 +162,7 @@ entry: } ; SI-CHECK: @tidig_x -; SI-CHECK: BUFFER_STORE_DWORD VGPR0 +; SI-CHECK: BUFFER_STORE_DWORD v0 define void @tidig_x (i32 addrspace(1)* %out) { entry: %0 = call i32 @llvm.r600.read.tidig.x() #0 @@ -171,7 +171,7 @@ entry: } ; SI-CHECK: @tidig_y -; SI-CHECK: BUFFER_STORE_DWORD VGPR1 +; SI-CHECK: BUFFER_STORE_DWORD v1 define void @tidig_y (i32 addrspace(1)* %out) { entry: %0 = call i32 @llvm.r600.read.tidig.y() #0 @@ -180,7 +180,7 @@ entry: } ; SI-CHECK: @tidig_z -; SI-CHECK: BUFFER_STORE_DWORD VGPR2 +; SI-CHECK: BUFFER_STORE_DWORD v2 define void @tidig_z (i32 addrspace(1)* %out) { entry: %0 = call i32 @llvm.r600.read.tidig.z() #0 |