diff options
Diffstat (limited to 'test/CodeGen/SystemZ')
25 files changed, 781 insertions, 154 deletions
diff --git a/test/CodeGen/SystemZ/Large/branch-range-09.py b/test/CodeGen/SystemZ/Large/branch-range-09.py new file mode 100644 index 0000000..b3fd813 --- /dev/null +++ b/test/CodeGen/SystemZ/Large/branch-range-09.py @@ -0,0 +1,107 @@ +# Test 32-bit COMPARE LOGICAL AND BRANCH in cases where the sheer number of +# instructions causes some branches to be out of range. +# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s + +# Construct: +# +# before0: +# conditional branch to after0 +# ... +# beforeN: +# conditional branch to after0 +# main: +# 0xffcc bytes, from MVIY instructions +# conditional branch to main +# after0: +# ... +# conditional branch to main +# afterN: +# +# Each conditional branch sequence occupies 12 bytes if it uses a short +# branch and 14 if it uses a long one. The ones before "main:" have to +# take the branch length into account, which is 6 for short branches, +# so the final (0x34 - 6) / 12 == 3 blocks can use short branches. +# The ones after "main:" do not, so the first 0x34 / 12 == 4 blocks +# can use short branches. +# +# CHECK: lb [[REG:%r[0-5]]], 0(%r3) +# CHECK: clr %r4, [[REG]] +# CHECK: jgl [[LABEL:\.L[^ ]*]] +# CHECK: lb [[REG:%r[0-5]]], 1(%r3) +# CHECK: clr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 2(%r3) +# CHECK: clr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 3(%r3) +# CHECK: clr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 4(%r3) +# CHECK: clr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 5(%r3) +# CHECK: clrjl %r4, [[REG]], [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 6(%r3) +# CHECK: clrjl %r4, [[REG]], [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 7(%r3) +# CHECK: clrjl %r4, [[REG]], [[LABEL]] +# ...main goes here... +# CHECK: lb [[REG:%r[0-5]]], 25(%r3) +# CHECK: clrjl %r4, [[REG]], [[LABEL:\.L[^ ]*]] +# CHECK: lb [[REG:%r[0-5]]], 26(%r3) +# CHECK: clrjl %r4, [[REG]], [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 27(%r3) +# CHECK: clrjl %r4, [[REG]], [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 28(%r3) +# CHECK: clrjl %r4, [[REG]], [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 29(%r3) +# CHECK: clr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 30(%r3) +# CHECK: clr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 31(%r3) +# CHECK: clr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lb [[REG:%r[0-5]]], 32(%r3) +# CHECK: clr %r4, [[REG]] +# CHECK: jgl [[LABEL]] + +branch_blocks = 8 +main_size = 0xffcc + +print 'define void @f1(i8 *%base, i8 *%stop, i32 %limit) {' +print 'entry:' +print ' br label %before0' +print '' + +for i in xrange(branch_blocks): + next = 'before%d' % (i + 1) if i + 1 < branch_blocks else 'main' + print 'before%d:' % i + print ' %%bstop%d = getelementptr i8 *%%stop, i64 %d' % (i, i) + print ' %%bcur%d = load volatile i8 *%%bstop%d' % (i, i) + print ' %%bext%d = sext i8 %%bcur%d to i32' % (i, i) + print ' %%btest%d = icmp ult i32 %%limit, %%bext%d' % (i, i) + print ' br i1 %%btest%d, label %%after0, label %%%s' % (i, next) + print '' + +print '%s:' % next +a, b = 1, 1 +for i in xrange(0, main_size, 6): + a, b = b, a + b + offset = 4096 + b % 500000 + value = a % 256 + print ' %%ptr%d = getelementptr i8 *%%base, i64 %d' % (i, offset) + print ' store volatile i8 %d, i8 *%%ptr%d' % (value, i) + +for i in xrange(branch_blocks): + print ' %%astop%d = getelementptr i8 *%%stop, i64 %d' % (i, i + 25) + print ' %%acur%d = load volatile i8 *%%astop%d' % (i, i) + print ' %%aext%d = sext i8 %%acur%d to i32' % (i, i) + print ' %%atest%d = icmp ult i32 %%limit, %%aext%d' % (i, i) + print ' br i1 %%atest%d, label %%main, label %%after%d' % (i, i) + print '' + print 'after%d:' % i + +print ' ret void' +print '}' diff --git a/test/CodeGen/SystemZ/Large/branch-range-10.py b/test/CodeGen/SystemZ/Large/branch-range-10.py new file mode 100644 index 0000000..3aeea3e --- /dev/null +++ b/test/CodeGen/SystemZ/Large/branch-range-10.py @@ -0,0 +1,111 @@ +# Test 64-bit COMPARE LOGICAL AND BRANCH in cases where the sheer number of +# instructions causes some branches to be out of range. +# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s + +# Construct: +# +# before0: +# conditional branch to after0 +# ... +# beforeN: +# conditional branch to after0 +# main: +# 0xffcc bytes, from MVIY instructions +# conditional branch to main +# after0: +# ... +# conditional branch to main +# afterN: +# +# Each conditional branch sequence occupies 12 bytes if it uses a short +# branch and 16 if it uses a long one. The ones before "main:" have to +# take the branch length into account, which is 6 for short branches, +# so the final (0x34 - 6) / 12 == 3 blocks can use short branches. +# The ones after "main:" do not, so the first 0x34 / 12 == 4 blocks +# can use short branches. The conservative algorithm we use makes +# one of the forward branches unnecessarily long, as noted in the +# check output below. +# +# CHECK: lgb [[REG:%r[0-5]]], 0(%r3) +# CHECK: clgr %r4, [[REG]] +# CHECK: jgl [[LABEL:\.L[^ ]*]] +# CHECK: lgb [[REG:%r[0-5]]], 1(%r3) +# CHECK: clgr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lgb [[REG:%r[0-5]]], 2(%r3) +# CHECK: clgr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lgb [[REG:%r[0-5]]], 3(%r3) +# CHECK: clgr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lgb [[REG:%r[0-5]]], 4(%r3) +# CHECK: clgr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# ...as mentioned above, the next one could be a CLGRJL instead... +# CHECK: lgb [[REG:%r[0-5]]], 5(%r3) +# CHECK: clgr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lgb [[REG:%r[0-5]]], 6(%r3) +# CHECK: clgrjl %r4, [[REG]], [[LABEL]] +# CHECK: lgb [[REG:%r[0-5]]], 7(%r3) +# CHECK: clgrjl %r4, [[REG]], [[LABEL]] +# ...main goes here... +# CHECK: lgb [[REG:%r[0-5]]], 25(%r3) +# CHECK: clgrjl %r4, [[REG]], [[LABEL:\.L[^ ]*]] +# CHECK: lgb [[REG:%r[0-5]]], 26(%r3) +# CHECK: clgrjl %r4, [[REG]], [[LABEL]] +# CHECK: lgb [[REG:%r[0-5]]], 27(%r3) +# CHECK: clgrjl %r4, [[REG]], [[LABEL]] +# CHECK: lgb [[REG:%r[0-5]]], 28(%r3) +# CHECK: clgrjl %r4, [[REG]], [[LABEL]] +# CHECK: lgb [[REG:%r[0-5]]], 29(%r3) +# CHECK: clgr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lgb [[REG:%r[0-5]]], 30(%r3) +# CHECK: clgr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lgb [[REG:%r[0-5]]], 31(%r3) +# CHECK: clgr %r4, [[REG]] +# CHECK: jgl [[LABEL]] +# CHECK: lgb [[REG:%r[0-5]]], 32(%r3) +# CHECK: clgr %r4, [[REG]] +# CHECK: jgl [[LABEL]] + +branch_blocks = 8 +main_size = 0xffcc + +print 'define void @f1(i8 *%base, i8 *%stop, i64 %limit) {' +print 'entry:' +print ' br label %before0' +print '' + +for i in xrange(branch_blocks): + next = 'before%d' % (i + 1) if i + 1 < branch_blocks else 'main' + print 'before%d:' % i + print ' %%bstop%d = getelementptr i8 *%%stop, i64 %d' % (i, i) + print ' %%bcur%d = load volatile i8 *%%bstop%d' % (i, i) + print ' %%bext%d = sext i8 %%bcur%d to i64' % (i, i) + print ' %%btest%d = icmp ult i64 %%limit, %%bext%d' % (i, i) + print ' br i1 %%btest%d, label %%after0, label %%%s' % (i, next) + print '' + +print '%s:' % next +a, b = 1, 1 +for i in xrange(0, main_size, 6): + a, b = b, a + b + offset = 4096 + b % 500000 + value = a % 256 + print ' %%ptr%d = getelementptr i8 *%%base, i64 %d' % (i, offset) + print ' store volatile i8 %d, i8 *%%ptr%d' % (value, i) + +for i in xrange(branch_blocks): + print ' %%astop%d = getelementptr i8 *%%stop, i64 %d' % (i, i + 25) + print ' %%acur%d = load volatile i8 *%%astop%d' % (i, i) + print ' %%aext%d = sext i8 %%acur%d to i64' % (i, i) + print ' %%atest%d = icmp ult i64 %%limit, %%aext%d' % (i, i) + print ' br i1 %%atest%d, label %%main, label %%after%d' % (i, i) + print '' + print 'after%d:' % i + +print ' ret void' +print '}' diff --git a/test/CodeGen/SystemZ/Large/branch-range-11.py b/test/CodeGen/SystemZ/Large/branch-range-11.py new file mode 100644 index 0000000..034902c --- /dev/null +++ b/test/CodeGen/SystemZ/Large/branch-range-11.py @@ -0,0 +1,127 @@ +# Test 32-bit COMPARE LOGICAL IMMEDIATE AND BRANCH in cases where the sheer +# number of instructions causes some branches to be out of range. +# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s + +# Construct: +# +# before0: +# conditional branch to after0 +# ... +# beforeN: +# conditional branch to after0 +# main: +# 0xffc6 bytes, from MVIY instructions +# conditional branch to main +# after0: +# ... +# conditional branch to main +# afterN: +# +# Each conditional branch sequence occupies 14 bytes if it uses a short +# branch and 20 if it uses a long one. The ones before "main:" have to +# take the branch length into account, which is 6 for short branches, +# so the final (0x3a - 6) / 14 == 3 blocks can use short branches. +# The ones after "main:" do not, so the first 0x3a / 14 == 4 blocks +# can use short branches. The conservative algorithm we use makes +# one of the forward branches unnecessarily long, as noted in the +# check output below. +# +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clfi [[REG]], 50 +# CHECK: jgl [[LABEL:\.L[^ ]*]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clfi [[REG]], 51 +# CHECK: jgl [[LABEL]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clfi [[REG]], 52 +# CHECK: jgl [[LABEL]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clfi [[REG]], 53 +# CHECK: jgl [[LABEL]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clfi [[REG]], 54 +# CHECK: jgl [[LABEL]] +# ...as mentioned above, the next one could be a CLIJL instead... +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clfi [[REG]], 55 +# CHECK: jgl [[LABEL]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clijl [[REG]], 56, [[LABEL]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clijl [[REG]], 57, [[LABEL]] +# ...main goes here... +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clijl [[REG]], 100, [[LABEL:\.L[^ ]*]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clijl [[REG]], 101, [[LABEL]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clijl [[REG]], 102, [[LABEL]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clijl [[REG]], 103, [[LABEL]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clfi [[REG]], 104 +# CHECK: jgl [[LABEL]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clfi [[REG]], 105 +# CHECK: jgl [[LABEL]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clfi [[REG]], 106 +# CHECK: jgl [[LABEL]] +# CHECK: l [[REG:%r[0-5]]], 0(%r3) +# CHECK: s [[REG]], 0(%r4) +# CHECK: clfi [[REG]], 107 +# CHECK: jgl [[LABEL]] + +branch_blocks = 8 +main_size = 0xffc6 + +print 'define void @f1(i8 *%base, i32 *%stopa, i32 *%stopb) {' +print 'entry:' +print ' br label %before0' +print '' + +for i in xrange(branch_blocks): + next = 'before%d' % (i + 1) if i + 1 < branch_blocks else 'main' + print 'before%d:' % i + print ' %%bcur%da = load volatile i32 *%%stopa' % i + print ' %%bcur%db = load volatile i32 *%%stopb' % i + print ' %%bsub%d = sub i32 %%bcur%da, %%bcur%db' % (i, i, i) + print ' %%btest%d = icmp ult i32 %%bsub%d, %d' % (i, i, i + 50) + print ' br i1 %%btest%d, label %%after0, label %%%s' % (i, next) + print '' + +print '%s:' % next +a, b = 1, 1 +for i in xrange(0, main_size, 6): + a, b = b, a + b + offset = 4096 + b % 500000 + value = a % 256 + print ' %%ptr%d = getelementptr i8 *%%base, i64 %d' % (i, offset) + print ' store volatile i8 %d, i8 *%%ptr%d' % (value, i) + +for i in xrange(branch_blocks): + print ' %%acur%da = load volatile i32 *%%stopa' % i + print ' %%acur%db = load volatile i32 *%%stopb' % i + print ' %%asub%d = sub i32 %%acur%da, %%acur%db' % (i, i, i) + print ' %%atest%d = icmp ult i32 %%asub%d, %d' % (i, i, i + 100) + print ' br i1 %%atest%d, label %%main, label %%after%d' % (i, i) + print '' + print 'after%d:' % i + +print ' ret void' +print '}' diff --git a/test/CodeGen/SystemZ/Large/branch-range-12.py b/test/CodeGen/SystemZ/Large/branch-range-12.py new file mode 100644 index 0000000..007d477 --- /dev/null +++ b/test/CodeGen/SystemZ/Large/branch-range-12.py @@ -0,0 +1,127 @@ +# Test 64-bit COMPARE LOGICAL IMMEDIATE AND BRANCH in cases where the sheer +# number of instructions causes some branches to be out of range. +# RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s + +# Construct: +# +# before0: +# conditional branch to after0 +# ... +# beforeN: +# conditional branch to after0 +# main: +# 0xffb4 bytes, from MVIY instructions +# conditional branch to main +# after0: +# ... +# conditional branch to main +# afterN: +# +# Each conditional branch sequence occupies 18 bytes if it uses a short +# branch and 24 if it uses a long one. The ones before "main:" have to +# take the branch length into account, which is 6 for short branches, +# so the final (0x4c - 6) / 18 == 3 blocks can use short branches. +# The ones after "main:" do not, so the first 0x4c / 18 == 4 blocks +# can use short branches. The conservative algorithm we use makes +# one of the forward branches unnecessarily long, as noted in the +# check output below. +# +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgfi [[REG]], 50 +# CHECK: jgl [[LABEL:\.L[^ ]*]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgfi [[REG]], 51 +# CHECK: jgl [[LABEL]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgfi [[REG]], 52 +# CHECK: jgl [[LABEL]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgfi [[REG]], 53 +# CHECK: jgl [[LABEL]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgfi [[REG]], 54 +# CHECK: jgl [[LABEL]] +# ...as mentioned above, the next one could be a CLGIJL instead... +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgfi [[REG]], 55 +# CHECK: jgl [[LABEL]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgijl [[REG]], 56, [[LABEL]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgijl [[REG]], 57, [[LABEL]] +# ...main goes here... +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgijl [[REG]], 100, [[LABEL:\.L[^ ]*]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgijl [[REG]], 101, [[LABEL]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgijl [[REG]], 102, [[LABEL]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgijl [[REG]], 103, [[LABEL]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgfi [[REG]], 104 +# CHECK: jgl [[LABEL]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgfi [[REG]], 105 +# CHECK: jgl [[LABEL]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgfi [[REG]], 106 +# CHECK: jgl [[LABEL]] +# CHECK: lg [[REG:%r[0-5]]], 0(%r3) +# CHECK: sg [[REG]], 0(%r4) +# CHECK: clgfi [[REG]], 107 +# CHECK: jgl [[LABEL]] + +branch_blocks = 8 +main_size = 0xffb4 + +print 'define void @f1(i8 *%base, i64 *%stopa, i64 *%stopb) {' +print 'entry:' +print ' br label %before0' +print '' + +for i in xrange(branch_blocks): + next = 'before%d' % (i + 1) if i + 1 < branch_blocks else 'main' + print 'before%d:' % i + print ' %%bcur%da = load volatile i64 *%%stopa' % i + print ' %%bcur%db = load volatile i64 *%%stopb' % i + print ' %%bsub%d = sub i64 %%bcur%da, %%bcur%db' % (i, i, i) + print ' %%btest%d = icmp ult i64 %%bsub%d, %d' % (i, i, i + 50) + print ' br i1 %%btest%d, label %%after0, label %%%s' % (i, next) + print '' + +print '%s:' % next +a, b = 1, 1 +for i in xrange(0, main_size, 6): + a, b = b, a + b + offset = 4096 + b % 500000 + value = a % 256 + print ' %%ptr%d = getelementptr i8 *%%base, i64 %d' % (i, offset) + print ' store volatile i8 %d, i8 *%%ptr%d' % (value, i) + +for i in xrange(branch_blocks): + print ' %%acur%da = load volatile i64 *%%stopa' % i + print ' %%acur%db = load volatile i64 *%%stopb' % i + print ' %%asub%d = sub i64 %%acur%da, %%acur%db' % (i, i, i) + print ' %%atest%d = icmp ult i64 %%asub%d, %d' % (i, i, i + 100) + print ' br i1 %%atest%d, label %%main, label %%after%d' % (i, i) + print '' + print 'after%d:' % i + +print ' ret void' +print '}' diff --git a/test/CodeGen/SystemZ/atomicrmw-minmax-01.ll b/test/CodeGen/SystemZ/atomicrmw-minmax-01.ll index a15fe57..2b750c4 100644 --- a/test/CodeGen/SystemZ/atomicrmw-minmax-01.ll +++ b/test/CodeGen/SystemZ/atomicrmw-minmax-01.ll @@ -91,8 +91,7 @@ define i8 @f3(i8 *%src, i8 %b) { ; CHECK: l [[OLD:%r[0-9]+]], 0(%r2) ; CHECK: [[LOOP:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]]) -; CHECK: clr [[ROT]], %r3 -; CHECK: jle [[KEEP:\..*]] +; CHECK: clrjle [[ROT]], %r3, [[KEEP:\..*]] ; CHECK: risbg [[ROT]], %r3, 32, 39, 0 ; CHECK: [[KEEP]]: ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}}) @@ -112,7 +111,7 @@ define i8 @f3(i8 *%src, i8 %b) { ; CHECK-SHIFT2-LABEL: f3: ; CHECK-SHIFT2: sll %r3, 24 ; CHECK-SHIFT2: rll -; CHECK-SHIFT2: clr {{%r[0-9]+}}, %r3 +; CHECK-SHIFT2: clrjle {{%r[0-9]+}}, %r3, ; CHECK-SHIFT2: rll ; CHECK-SHIFT2: rll ; CHECK-SHIFT2: br %r14 @@ -128,8 +127,7 @@ define i8 @f4(i8 *%src, i8 %b) { ; CHECK: l [[OLD:%r[0-9]+]], 0(%r2) ; CHECK: [[LOOP:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]]) -; CHECK: clr [[ROT]], %r3 -; CHECK: jhe [[KEEP:\..*]] +; CHECK: clrjhe [[ROT]], %r3, [[KEEP:\..*]] ; CHECK: risbg [[ROT]], %r3, 32, 39, 0 ; CHECK: [[KEEP]]: ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}}) @@ -149,7 +147,7 @@ define i8 @f4(i8 *%src, i8 %b) { ; CHECK-SHIFT2-LABEL: f4: ; CHECK-SHIFT2: sll %r3, 24 ; CHECK-SHIFT2: rll -; CHECK-SHIFT2: clr {{%r[0-9]+}}, %r3 +; CHECK-SHIFT2: clrjhe {{%r[0-9]+}}, %r3, ; CHECK-SHIFT2: rll ; CHECK-SHIFT2: rll ; CHECK-SHIFT2: br %r14 @@ -196,7 +194,7 @@ define i8 @f6(i8 *%src) { define i8 @f7(i8 *%src) { ; CHECK-LABEL: f7: ; CHECK: llilh [[SRC2:%r[0-9]+]], 256 -; CHECK: clr [[ROT:%r[0-9]+]], [[SRC2]] +; CHECK: clrjle [[ROT:%r[0-9]+]], [[SRC2]], ; CHECK: risbg [[ROT]], [[SRC2]], 32, 39, 0 ; CHECK: br %r14 ; @@ -213,7 +211,7 @@ define i8 @f7(i8 *%src) { define i8 @f8(i8 *%src) { ; CHECK-LABEL: f8: ; CHECK: llilh [[SRC2:%r[0-9]+]], 65024 -; CHECK: clr [[ROT:%r[0-9]+]], [[SRC2]] +; CHECK: clrjhe [[ROT:%r[0-9]+]], [[SRC2]], ; CHECK: risbg [[ROT]], [[SRC2]], 32, 39, 0 ; CHECK: br %r14 ; diff --git a/test/CodeGen/SystemZ/atomicrmw-minmax-02.ll b/test/CodeGen/SystemZ/atomicrmw-minmax-02.ll index c0ae883..98ffedf 100644 --- a/test/CodeGen/SystemZ/atomicrmw-minmax-02.ll +++ b/test/CodeGen/SystemZ/atomicrmw-minmax-02.ll @@ -91,8 +91,7 @@ define i16 @f3(i16 *%src, i16 %b) { ; CHECK: l [[OLD:%r[0-9]+]], 0(%r2) ; CHECK: [[LOOP:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]]) -; CHECK: clr [[ROT]], %r3 -; CHECK: jle [[KEEP:\..*]] +; CHECK: clrjle [[ROT]], %r3, [[KEEP:\..*]] ; CHECK: risbg [[ROT]], %r3, 32, 47, 0 ; CHECK: [[KEEP]]: ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}}) @@ -112,7 +111,7 @@ define i16 @f3(i16 *%src, i16 %b) { ; CHECK-SHIFT2-LABEL: f3: ; CHECK-SHIFT2: sll %r3, 16 ; CHECK-SHIFT2: rll -; CHECK-SHIFT2: clr {{%r[0-9]+}}, %r3 +; CHECK-SHIFT2: clrjle {{%r[0-9]+}}, %r3, ; CHECK-SHIFT2: rll ; CHECK-SHIFT2: rll ; CHECK-SHIFT2: br %r14 @@ -128,8 +127,7 @@ define i16 @f4(i16 *%src, i16 %b) { ; CHECK: l [[OLD:%r[0-9]+]], 0(%r2) ; CHECK: [[LOOP:\.[^:]*]]: ; CHECK: rll [[ROT:%r[0-9]+]], [[OLD]], 0([[SHIFT]]) -; CHECK: clr [[ROT]], %r3 -; CHECK: jhe [[KEEP:\..*]] +; CHECK: clrjhe [[ROT]], %r3, [[KEEP:\..*]] ; CHECK: risbg [[ROT]], %r3, 32, 47, 0 ; CHECK: [[KEEP]]: ; CHECK: rll [[NEW:%r[0-9]+]], [[ROT]], 0({{%r[1-9]+}}) @@ -149,7 +147,7 @@ define i16 @f4(i16 *%src, i16 %b) { ; CHECK-SHIFT2-LABEL: f4: ; CHECK-SHIFT2: sll %r3, 16 ; CHECK-SHIFT2: rll -; CHECK-SHIFT2: clr {{%r[0-9]+}}, %r3 +; CHECK-SHIFT2: clrjhe {{%r[0-9]+}}, %r3, ; CHECK-SHIFT2: rll ; CHECK-SHIFT2: rll ; CHECK-SHIFT2: br %r14 @@ -196,7 +194,7 @@ define i16 @f6(i16 *%src) { define i16 @f7(i16 *%src) { ; CHECK-LABEL: f7: ; CHECK: llilh [[SRC2:%r[0-9]+]], 1 -; CHECK: clr [[ROT:%r[0-9]+]], [[SRC2]] +; CHECK: clrjle [[ROT:%r[0-9]+]], [[SRC2]], ; CHECK: risbg [[ROT]], [[SRC2]], 32, 47, 0 ; CHECK: br %r14 ; @@ -213,7 +211,7 @@ define i16 @f7(i16 *%src) { define i16 @f8(i16 *%src) { ; CHECK-LABEL: f8: ; CHECK: llilh [[SRC2:%r[0-9]+]], 65534 -; CHECK: clr [[ROT:%r[0-9]+]], [[SRC2]] +; CHECK: clrjhe [[ROT:%r[0-9]+]], [[SRC2]], ; CHECK: risbg [[ROT]], [[SRC2]], 32, 47, 0 ; CHECK: br %r14 ; diff --git a/test/CodeGen/SystemZ/atomicrmw-minmax-03.ll b/test/CodeGen/SystemZ/atomicrmw-minmax-03.ll index 3a9485a..418f156 100644 --- a/test/CodeGen/SystemZ/atomicrmw-minmax-03.ll +++ b/test/CodeGen/SystemZ/atomicrmw-minmax-03.ll @@ -37,9 +37,8 @@ define i32 @f3(i32 %dummy, i32 *%src, i32 %b) { ; CHECK-LABEL: f3: ; CHECK: l %r2, 0(%r3) ; CHECK: [[LOOP:\.[^:]*]]: -; CHECK: clr %r2, %r4 ; CHECK: lr [[NEW:%r[0-9]+]], %r2 -; CHECK: jle [[KEEP:\..*]] +; CHECK: clrjle %r2, %r4, [[KEEP:\..*]] ; CHECK: lr [[NEW]], %r4 ; CHECK: cs %r2, [[NEW]], 0(%r3) ; CHECK: jl [[LOOP]] @@ -53,9 +52,8 @@ define i32 @f4(i32 %dummy, i32 *%src, i32 %b) { ; CHECK-LABEL: f4: ; CHECK: l %r2, 0(%r3) ; CHECK: [[LOOP:\.[^:]*]]: -; CHECK: clr %r2, %r4 ; CHECK: lr [[NEW:%r[0-9]+]], %r2 -; CHECK: jhe [[KEEP:\..*]] +; CHECK: clrjhe %r2, %r4, [[KEEP:\..*]] ; CHECK: lr [[NEW]], %r4 ; CHECK: cs %r2, [[NEW]], 0(%r3) ; CHECK: jl [[LOOP]] diff --git a/test/CodeGen/SystemZ/atomicrmw-minmax-04.ll b/test/CodeGen/SystemZ/atomicrmw-minmax-04.ll index ebed147..9d26d28 100644 --- a/test/CodeGen/SystemZ/atomicrmw-minmax-04.ll +++ b/test/CodeGen/SystemZ/atomicrmw-minmax-04.ll @@ -37,9 +37,8 @@ define i64 @f3(i64 %dummy, i64 *%src, i64 %b) { ; CHECK-LABEL: f3: ; CHECK: lg %r2, 0(%r3) ; CHECK: [[LOOP:\.[^:]*]]: -; CHECK: clgr %r2, %r4 ; CHECK: lgr [[NEW:%r[0-9]+]], %r2 -; CHECK: jle [[KEEP:\..*]] +; CHECK: clgrjle %r2, %r4, [[KEEP:\..*]] ; CHECK: lgr [[NEW]], %r4 ; CHECK: csg %r2, [[NEW]], 0(%r3) ; CHECK: jl [[LOOP]] @@ -53,9 +52,8 @@ define i64 @f4(i64 %dummy, i64 *%src, i64 %b) { ; CHECK-LABEL: f4: ; CHECK: lg %r2, 0(%r3) ; CHECK: [[LOOP:\.[^:]*]]: -; CHECK: clgr %r2, %r4 ; CHECK: lgr [[NEW:%r[0-9]+]], %r2 -; CHECK: jhe [[KEEP:\..*]] +; CHECK: clgrjhe %r2, %r4, [[KEEP:\..*]] ; CHECK: lgr [[NEW]], %r4 ; CHECK: csg %r2, [[NEW]], 0(%r3) ; CHECK: jl [[LOOP]] diff --git a/test/CodeGen/SystemZ/branch-05.ll b/test/CodeGen/SystemZ/branch-05.ll index d657c9b..b2157b5 100644 --- a/test/CodeGen/SystemZ/branch-05.ll +++ b/test/CodeGen/SystemZ/branch-05.ll @@ -5,8 +5,7 @@ define i32 @f1(i32 %x, i32 %y, i32 %op) { ; CHECK-LABEL: f1: ; CHECK: ahi %r4, -1 -; CHECK: clfi %r4, 5 -; CHECK-NEXT: jh +; CHECK: clijh %r4, 5, ; CHECK: llgfr [[OP64:%r[0-5]]], %r4 ; CHECK: sllg [[INDEX:%r[1-5]]], [[OP64]], 3 ; CHECK: larl [[BASE:%r[1-5]]] diff --git a/test/CodeGen/SystemZ/branch-08.ll b/test/CodeGen/SystemZ/branch-08.ll index c4dc467..6741d29 100644 --- a/test/CodeGen/SystemZ/branch-08.ll +++ b/test/CodeGen/SystemZ/branch-08.ll @@ -6,14 +6,15 @@ declare void @foo() noreturn ; Check a case where a separate branch is needed and where the original ; order should be reversed. -define i32 @f1(i32 %a, i32 %b) { +define i32 @f1(i32 %a, i32 *%bptr) { ; CHECK-LABEL: f1: -; CHECK: clr %r2, %r3 +; CHECK: cl %r2, 0(%r3) ; CHECK: jl .L[[LABEL:.*]] ; CHECK: br %r14 ; CHECK: .L[[LABEL]]: ; CHECK: brasl %r14, foo@PLT entry: + %b = load i32 *%bptr %cmp = icmp ult i32 %a, %b br i1 %cmp, label %callit, label %return diff --git a/test/CodeGen/SystemZ/branch-09.ll b/test/CodeGen/SystemZ/branch-09.ll new file mode 100644 index 0000000..5591f5b --- /dev/null +++ b/test/CodeGen/SystemZ/branch-09.ll @@ -0,0 +1,62 @@ +; Test all condition-code masks that are relevant for CLRJ. +; +; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s + +declare i32 @foo() +@g1 = global i16 0 + +define void @f1(i32 %target) { +; CHECK-LABEL: f1: +; CHECK: .cfi_def_cfa_offset +; CHECK: .L[[LABEL:.*]]: +; CHECK: clrjle %r2, {{%r[0-9]+}}, .L[[LABEL]] + br label %loop +loop: + %val = call i32 @foo() + %cond = icmp ule i32 %val, %target + br i1 %cond, label %loop, label %exit +exit: + ret void +} + +define void @f2(i32 %target) { +; CHECK-LABEL: f2: +; CHECK: .cfi_def_cfa_offset +; CHECK: .L[[LABEL:.*]]: +; CHECK: clrjl %r2, {{%r[0-9]+}}, .L[[LABEL]] + br label %loop +loop: + %val = call i32 @foo() + %cond = icmp ult i32 %val, %target + br i1 %cond, label %loop, label %exit +exit: + ret void +} + +define void @f3(i32 %target) { +; CHECK-LABEL: f3: +; CHECK: .cfi_def_cfa_offset +; CHECK: .L[[LABEL:.*]]: +; CHECK: clrjh %r2, {{%r[0-9]+}}, .L[[LABEL]] + br label %loop +loop: + %val = call i32 @foo() + %cond = icmp ugt i32 %val, %target + br i1 %cond, label %loop, label %exit +exit: + ret void +} + +define void @f4(i32 %target) { +; CHECK-LABEL: f4: +; CHECK: .cfi_def_cfa_offset +; CHECK: .L[[LABEL:.*]]: +; CHECK: clrjhe %r2, {{%r[0-9]+}}, .L[[LABEL]] + br label %loop +loop: + %val = call i32 @foo() + %cond = icmp uge i32 %val, %target + br i1 %cond, label %loop, label %exit +exit: + ret void +} diff --git a/test/CodeGen/SystemZ/branch-10.ll b/test/CodeGen/SystemZ/branch-10.ll new file mode 100644 index 0000000..ec6e759 --- /dev/null +++ b/test/CodeGen/SystemZ/branch-10.ll @@ -0,0 +1,62 @@ +; Test all condition-code masks that are relevant for CLGRJ. +; +; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s + +declare i64 @foo() +@g1 = global i16 0 + +define void @f1(i64 %target) { +; CHECK-LABEL: f1: +; CHECK: .cfi_def_cfa_offset +; CHECK: .L[[LABEL:.*]]: +; CHECK: clgrjle %r2, {{%r[0-9]+}}, .L[[LABEL]] + br label %loop +loop: + %val = call i64 @foo() + %cond = icmp ule i64 %val, %target + br i1 %cond, label %loop, label %exit +exit: + ret void +} + +define void @f2(i64 %target) { +; CHECK-LABEL: f2: +; CHECK: .cfi_def_cfa_offset +; CHECK: .L[[LABEL:.*]]: +; CHECK: clgrjl %r2, {{%r[0-9]+}}, .L[[LABEL]] + br label %loop +loop: + %val = call i64 @foo() + %cond = icmp ult i64 %val, %target + br i1 %cond, label %loop, label %exit +exit: + ret void +} + +define void @f3(i64 %target) { +; CHECK-LABEL: f3: +; CHECK: .cfi_def_cfa_offset +; CHECK: .L[[LABEL:.*]]: +; CHECK: clgrjh %r2, {{%r[0-9]+}}, .L[[LABEL]] + br label %loop +loop: + %val = call i64 @foo() + %cond = icmp ugt i64 %val, %target + br i1 %cond, label %loop, label %exit +exit: + ret void +} + +define void @f4(i64 %target) { +; CHECK-LABEL: f4: +; CHECK: .cfi_def_cfa_offset +; CHECK: .L[[LABEL:.*]]: +; CHECK: clgrjhe %r2, {{%r[0-9]+}}, .L[[LABEL]] + br label %loop +loop: + %val = call i64 @foo() + %cond = icmp uge i64 %val, %target + br i1 %cond, label %loop, label %exit +exit: + ret void +} diff --git a/test/CodeGen/SystemZ/cond-store-01.ll b/test/CodeGen/SystemZ/cond-store-01.ll index 80e6d91..5b55934 100644 --- a/test/CodeGen/SystemZ/cond-store-01.ll +++ b/test/CodeGen/SystemZ/cond-store-01.ll @@ -13,7 +13,7 @@ define void @f1(i8 *%ptr, i8 %alt, i32 %limit) { ; CHECK: stc %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store i8 %res, i8 *%ptr @@ -29,7 +29,7 @@ define void @f2(i8 *%ptr, i8 %alt, i32 %limit) { ; CHECK: stc %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %alt, i8 %orig store i8 %res, i8 *%ptr @@ -46,7 +46,7 @@ define void @f3(i8 *%ptr, i32 %alt, i32 %limit) { ; CHECK: stc %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %ext = sext i8 %orig to i32 %res = select i1 %cond, i32 %ext, i32 %alt @@ -64,7 +64,7 @@ define void @f4(i8 *%ptr, i32 %alt, i32 %limit) { ; CHECK: stc %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %ext = sext i8 %orig to i32 %res = select i1 %cond, i32 %alt, i32 %ext @@ -83,7 +83,7 @@ define void @f5(i8 *%ptr, i32 %alt, i32 %limit) { ; CHECK: stc %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %ext = zext i8 %orig to i32 %res = select i1 %cond, i32 %ext, i32 %alt @@ -101,7 +101,7 @@ define void @f6(i8 *%ptr, i32 %alt, i32 %limit) { ; CHECK: stc %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %ext = zext i8 %orig to i32 %res = select i1 %cond, i32 %alt, i32 %ext @@ -120,7 +120,7 @@ define void @f7(i8 *%ptr, i64 %alt, i32 %limit) { ; CHECK: stc %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %ext = sext i8 %orig to i64 %res = select i1 %cond, i64 %ext, i64 %alt @@ -138,7 +138,7 @@ define void @f8(i8 *%ptr, i64 %alt, i32 %limit) { ; CHECK: stc %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %ext = sext i8 %orig to i64 %res = select i1 %cond, i64 %alt, i64 %ext @@ -157,7 +157,7 @@ define void @f9(i8 *%ptr, i64 %alt, i32 %limit) { ; CHECK: stc %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %ext = zext i8 %orig to i64 %res = select i1 %cond, i64 %ext, i64 %alt @@ -175,7 +175,7 @@ define void @f10(i8 *%ptr, i64 %alt, i32 %limit) { ; CHECK: stc %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %ext = zext i8 %orig to i64 %res = select i1 %cond, i64 %alt, i64 %ext @@ -194,7 +194,7 @@ define void @f11(i8 *%base, i8 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i8 *%base, i64 4095 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store i8 %res, i8 *%ptr @@ -211,7 +211,7 @@ define void @f12(i8 *%base, i8 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i8 *%base, i64 4096 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store i8 %res, i8 *%ptr @@ -228,7 +228,7 @@ define void @f13(i8 *%base, i8 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i8 *%base, i64 524287 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store i8 %res, i8 *%ptr @@ -247,7 +247,7 @@ define void @f14(i8 *%base, i8 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i8 *%base, i64 524288 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store i8 %res, i8 *%ptr @@ -264,7 +264,7 @@ define void @f15(i8 *%base, i8 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i8 *%base, i64 -524288 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store i8 %res, i8 *%ptr @@ -283,7 +283,7 @@ define void @f16(i8 *%base, i8 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i8 *%base, i64 -524289 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store i8 %res, i8 *%ptr @@ -302,7 +302,7 @@ define void @f17(i64 %base, i64 %index, i8 %alt, i32 %limit) { %add1 = add i64 %base, %index %add2 = add i64 %add1, 4096 %ptr = inttoptr i64 %add2 to i8 * - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store i8 %res, i8 *%ptr @@ -317,7 +317,7 @@ define void @f18(i8 *%ptr, i8 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: stc {{%r[0-5]}}, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load volatile i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store i8 %res, i8 *%ptr @@ -332,7 +332,7 @@ define void @f19(i8 *%ptr, i8 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: stc %r3, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store volatile i8 %res, i8 *%ptr @@ -352,7 +352,7 @@ define void @f20(i8 *%ptr, i8 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: stc {{%r[0-9]+}}, ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load atomic i8 *%ptr unordered, align 1 %res = select i1 %cond, i8 %orig, i8 %alt store i8 %res, i8 *%ptr @@ -368,7 +368,7 @@ define void @f21(i8 *%ptr, i8 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: cs {{%r[0-9]+}}, ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store atomic i8 %res, i8 *%ptr unordered, align 1 @@ -388,7 +388,7 @@ define void @f22(i8 %alt, i32 %limit) { ; CHECK: br %r14 %ptr = alloca i8 call void @foo(i8 *%ptr) - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i8 *%ptr %res = select i1 %cond, i8 %orig, i8 %alt store i8 %res, i8 *%ptr diff --git a/test/CodeGen/SystemZ/cond-store-02.ll b/test/CodeGen/SystemZ/cond-store-02.ll index e01a853..9e18843 100644 --- a/test/CodeGen/SystemZ/cond-store-02.ll +++ b/test/CodeGen/SystemZ/cond-store-02.ll @@ -13,7 +13,7 @@ define void @f1(i16 *%ptr, i16 %alt, i32 %limit) { ; CHECK: sth %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store i16 %res, i16 *%ptr @@ -29,7 +29,7 @@ define void @f2(i16 *%ptr, i16 %alt, i32 %limit) { ; CHECK: sth %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %alt, i16 %orig store i16 %res, i16 *%ptr @@ -46,7 +46,7 @@ define void @f3(i16 *%ptr, i32 %alt, i32 %limit) { ; CHECK: sth %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %ext = sext i16 %orig to i32 %res = select i1 %cond, i32 %ext, i32 %alt @@ -64,7 +64,7 @@ define void @f4(i16 *%ptr, i32 %alt, i32 %limit) { ; CHECK: sth %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %ext = sext i16 %orig to i32 %res = select i1 %cond, i32 %alt, i32 %ext @@ -83,7 +83,7 @@ define void @f5(i16 *%ptr, i32 %alt, i32 %limit) { ; CHECK: sth %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %ext = zext i16 %orig to i32 %res = select i1 %cond, i32 %ext, i32 %alt @@ -101,7 +101,7 @@ define void @f6(i16 *%ptr, i32 %alt, i32 %limit) { ; CHECK: sth %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %ext = zext i16 %orig to i32 %res = select i1 %cond, i32 %alt, i32 %ext @@ -120,7 +120,7 @@ define void @f7(i16 *%ptr, i64 %alt, i32 %limit) { ; CHECK: sth %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %ext = sext i16 %orig to i64 %res = select i1 %cond, i64 %ext, i64 %alt @@ -138,7 +138,7 @@ define void @f8(i16 *%ptr, i64 %alt, i32 %limit) { ; CHECK: sth %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %ext = sext i16 %orig to i64 %res = select i1 %cond, i64 %alt, i64 %ext @@ -157,7 +157,7 @@ define void @f9(i16 *%ptr, i64 %alt, i32 %limit) { ; CHECK: sth %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %ext = zext i16 %orig to i64 %res = select i1 %cond, i64 %ext, i64 %alt @@ -175,7 +175,7 @@ define void @f10(i16 *%ptr, i64 %alt, i32 %limit) { ; CHECK: sth %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %ext = zext i16 %orig to i64 %res = select i1 %cond, i64 %alt, i64 %ext @@ -194,7 +194,7 @@ define void @f11(i16 *%base, i16 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i16 *%base, i64 2047 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store i16 %res, i16 *%ptr @@ -211,7 +211,7 @@ define void @f12(i16 *%base, i16 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i16 *%base, i64 2048 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store i16 %res, i16 *%ptr @@ -228,7 +228,7 @@ define void @f13(i16 *%base, i16 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i16 *%base, i64 262143 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store i16 %res, i16 *%ptr @@ -247,7 +247,7 @@ define void @f14(i16 *%base, i16 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i16 *%base, i64 262144 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store i16 %res, i16 *%ptr @@ -264,7 +264,7 @@ define void @f15(i16 *%base, i16 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i16 *%base, i64 -262144 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store i16 %res, i16 *%ptr @@ -283,7 +283,7 @@ define void @f16(i16 *%base, i16 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i16 *%base, i64 -262145 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store i16 %res, i16 *%ptr @@ -302,7 +302,7 @@ define void @f17(i64 %base, i64 %index, i16 %alt, i32 %limit) { %add1 = add i64 %base, %index %add2 = add i64 %add1, 4096 %ptr = inttoptr i64 %add2 to i16 * - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store i16 %res, i16 *%ptr @@ -317,7 +317,7 @@ define void @f18(i16 *%ptr, i16 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: sth {{%r[0-5]}}, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load volatile i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store i16 %res, i16 *%ptr @@ -332,7 +332,7 @@ define void @f19(i16 *%ptr, i16 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: sth %r3, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store volatile i16 %res, i16 *%ptr @@ -352,7 +352,7 @@ define void @f20(i16 *%ptr, i16 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: sth {{%r[0-9]+}}, ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load atomic i16 *%ptr unordered, align 2 %res = select i1 %cond, i16 %orig, i16 %alt store i16 %res, i16 *%ptr @@ -368,7 +368,7 @@ define void @f21(i16 *%ptr, i16 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: cs {{%r[0-9]+}}, ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store atomic i16 %res, i16 *%ptr unordered, align 2 @@ -388,7 +388,7 @@ define void @f22(i16 %alt, i32 %limit) { ; CHECK: br %r14 %ptr = alloca i16 call void @foo(i16 *%ptr) - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i16 *%ptr %res = select i1 %cond, i16 %orig, i16 %alt store i16 %res, i16 *%ptr diff --git a/test/CodeGen/SystemZ/cond-store-03.ll b/test/CodeGen/SystemZ/cond-store-03.ll index e122bc2..d4fd48d 100644 --- a/test/CodeGen/SystemZ/cond-store-03.ll +++ b/test/CodeGen/SystemZ/cond-store-03.ll @@ -13,7 +13,7 @@ define void @f1(i32 *%ptr, i32 %alt, i32 %limit) { ; CHECK: st %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store i32 %res, i32 *%ptr @@ -29,7 +29,7 @@ define void @f2(i32 *%ptr, i32 %alt, i32 %limit) { ; CHECK: st %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %alt, i32 %orig store i32 %res, i32 *%ptr @@ -46,7 +46,7 @@ define void @f3(i32 *%ptr, i64 %alt, i32 %limit) { ; CHECK: st %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %ext = sext i32 %orig to i64 %res = select i1 %cond, i64 %ext, i64 %alt @@ -64,7 +64,7 @@ define void @f4(i32 *%ptr, i64 %alt, i32 %limit) { ; CHECK: st %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %ext = sext i32 %orig to i64 %res = select i1 %cond, i64 %alt, i64 %ext @@ -83,7 +83,7 @@ define void @f5(i32 *%ptr, i64 %alt, i32 %limit) { ; CHECK: st %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %ext = zext i32 %orig to i64 %res = select i1 %cond, i64 %ext, i64 %alt @@ -101,7 +101,7 @@ define void @f6(i32 *%ptr, i64 %alt, i32 %limit) { ; CHECK: st %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %ext = zext i32 %orig to i64 %res = select i1 %cond, i64 %alt, i64 %ext @@ -120,7 +120,7 @@ define void @f7(i32 *%base, i32 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i32 *%base, i64 1023 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store i32 %res, i32 *%ptr @@ -137,7 +137,7 @@ define void @f8(i32 *%base, i32 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i32 *%base, i64 1024 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store i32 %res, i32 *%ptr @@ -154,7 +154,7 @@ define void @f9(i32 *%base, i32 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i32 *%base, i64 131071 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store i32 %res, i32 *%ptr @@ -173,7 +173,7 @@ define void @f10(i32 *%base, i32 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i32 *%base, i64 131072 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store i32 %res, i32 *%ptr @@ -190,7 +190,7 @@ define void @f11(i32 *%base, i32 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i32 *%base, i64 -131072 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store i32 %res, i32 *%ptr @@ -209,7 +209,7 @@ define void @f12(i32 *%base, i32 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i32 *%base, i64 -131073 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store i32 %res, i32 *%ptr @@ -228,7 +228,7 @@ define void @f13(i64 %base, i64 %index, i32 %alt, i32 %limit) { %add1 = add i64 %base, %index %add2 = add i64 %add1, 4096 %ptr = inttoptr i64 %add2 to i32 * - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store i32 %res, i32 *%ptr @@ -243,7 +243,7 @@ define void @f14(i32 *%ptr, i32 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: st {{%r[0-5]}}, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load volatile i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store i32 %res, i32 *%ptr @@ -258,7 +258,7 @@ define void @f15(i32 *%ptr, i32 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: st %r3, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store volatile i32 %res, i32 *%ptr @@ -277,7 +277,7 @@ define void @f16(i32 *%ptr, i32 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: st {{%r[0-5]}}, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load atomic i32 *%ptr unordered, align 4 %res = select i1 %cond, i32 %orig, i32 %alt store i32 %res, i32 *%ptr @@ -293,7 +293,7 @@ define void @f17(i32 *%ptr, i32 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: cs {{%r[0-5]}}, %r3, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store atomic i32 %res, i32 *%ptr unordered, align 4 @@ -313,7 +313,7 @@ define void @f18(i32 %alt, i32 %limit) { ; CHECK: br %r14 %ptr = alloca i32 call void @foo(i32 *%ptr) - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i32 *%ptr %res = select i1 %cond, i32 %orig, i32 %alt store i32 %res, i32 *%ptr diff --git a/test/CodeGen/SystemZ/cond-store-04.ll b/test/CodeGen/SystemZ/cond-store-04.ll index 4ed23a3..fc565c4 100644 --- a/test/CodeGen/SystemZ/cond-store-04.ll +++ b/test/CodeGen/SystemZ/cond-store-04.ll @@ -13,7 +13,7 @@ define void @f1(i64 *%ptr, i64 %alt, i32 %limit) { ; CHECK: stg %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i64 *%ptr %res = select i1 %cond, i64 %orig, i64 %alt store i64 %res, i64 *%ptr @@ -29,7 +29,7 @@ define void @f2(i64 *%ptr, i64 %alt, i32 %limit) { ; CHECK: stg %r3, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i64 *%ptr %res = select i1 %cond, i64 %alt, i64 %orig store i64 %res, i64 *%ptr @@ -46,7 +46,7 @@ define void @f3(i64 *%base, i64 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i64 *%base, i64 65535 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i64 *%ptr %res = select i1 %cond, i64 %orig, i64 %alt store i64 %res, i64 *%ptr @@ -65,7 +65,7 @@ define void @f4(i64 *%base, i64 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i64 *%base, i64 65536 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i64 *%ptr %res = select i1 %cond, i64 %orig, i64 %alt store i64 %res, i64 *%ptr @@ -82,7 +82,7 @@ define void @f5(i64 *%base, i64 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i64 *%base, i64 -65536 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i64 *%ptr %res = select i1 %cond, i64 %orig, i64 %alt store i64 %res, i64 *%ptr @@ -101,7 +101,7 @@ define void @f6(i64 *%base, i64 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr i64 *%base, i64 -65537 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i64 *%ptr %res = select i1 %cond, i64 %orig, i64 %alt store i64 %res, i64 *%ptr @@ -120,7 +120,7 @@ define void @f7(i64 %base, i64 %index, i64 %alt, i32 %limit) { %add1 = add i64 %base, %index %add2 = add i64 %add1, 524287 %ptr = inttoptr i64 %add2 to i64 * - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i64 *%ptr %res = select i1 %cond, i64 %orig, i64 %alt store i64 %res, i64 *%ptr @@ -135,7 +135,7 @@ define void @f8(i64 *%ptr, i64 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: stg {{%r[0-5]}}, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load volatile i64 *%ptr %res = select i1 %cond, i64 %orig, i64 %alt store i64 %res, i64 *%ptr @@ -150,7 +150,7 @@ define void @f9(i64 *%ptr, i64 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: stg %r3, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i64 *%ptr %res = select i1 %cond, i64 %orig, i64 %alt store volatile i64 %res, i64 *%ptr @@ -169,7 +169,7 @@ define void @f10(i64 *%ptr, i64 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: stg {{%r[0-5]}}, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load atomic i64 *%ptr unordered, align 8 %res = select i1 %cond, i64 %orig, i64 %alt store i64 %res, i64 *%ptr @@ -185,7 +185,7 @@ define void @f11(i64 *%ptr, i64 %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: csg {{%r[0-5]}}, %r3, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i64 *%ptr %res = select i1 %cond, i64 %orig, i64 %alt store atomic i64 %res, i64 *%ptr unordered, align 8 @@ -205,7 +205,7 @@ define void @f12(i64 %alt, i32 %limit) { ; CHECK: br %r14 %ptr = alloca i64 call void @foo(i64 *%ptr) - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load i64 *%ptr %res = select i1 %cond, i64 %orig, i64 %alt store i64 %res, i64 *%ptr diff --git a/test/CodeGen/SystemZ/cond-store-05.ll b/test/CodeGen/SystemZ/cond-store-05.ll index e41c8fe..f8056f7 100644 --- a/test/CodeGen/SystemZ/cond-store-05.ll +++ b/test/CodeGen/SystemZ/cond-store-05.ll @@ -13,7 +13,7 @@ define void @f1(float *%ptr, float %alt, i32 %limit) { ; CHECK: ste %f0, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load float *%ptr %res = select i1 %cond, float %orig, float %alt store float %res, float *%ptr @@ -29,7 +29,7 @@ define void @f2(float *%ptr, float %alt, i32 %limit) { ; CHECK: ste %f0, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load float *%ptr %res = select i1 %cond, float %alt, float %orig store float %res, float *%ptr @@ -46,7 +46,7 @@ define void @f3(float *%base, float %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr float *%base, i64 1023 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load float *%ptr %res = select i1 %cond, float %orig, float %alt store float %res, float *%ptr @@ -63,7 +63,7 @@ define void @f4(float *%base, float %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr float *%base, i64 1024 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load float *%ptr %res = select i1 %cond, float %orig, float %alt store float %res, float *%ptr @@ -80,7 +80,7 @@ define void @f5(float *%base, float %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr float *%base, i64 131071 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load float *%ptr %res = select i1 %cond, float %orig, float %alt store float %res, float *%ptr @@ -99,7 +99,7 @@ define void @f6(float *%base, float %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr float *%base, i64 131072 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load float *%ptr %res = select i1 %cond, float %orig, float %alt store float %res, float *%ptr @@ -116,7 +116,7 @@ define void @f7(float *%base, float %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr float *%base, i64 -131072 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load float *%ptr %res = select i1 %cond, float %orig, float %alt store float %res, float *%ptr @@ -135,7 +135,7 @@ define void @f8(float *%base, float %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr float *%base, i64 -131073 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load float *%ptr %res = select i1 %cond, float %orig, float %alt store float %res, float *%ptr @@ -154,7 +154,7 @@ define void @f9(i64 %base, i64 %index, float %alt, i32 %limit) { %add1 = add i64 %base, %index %add2 = add i64 %add1, 4096 %ptr = inttoptr i64 %add2 to float * - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load float *%ptr %res = select i1 %cond, float %orig, float %alt store float %res, float *%ptr @@ -169,7 +169,7 @@ define void @f10(float *%ptr, float %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: ste {{%f[0-5]}}, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load volatile float *%ptr %res = select i1 %cond, float %orig, float %alt store float %res, float *%ptr @@ -184,7 +184,7 @@ define void @f11(float *%ptr, float %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: ste %f0, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load float *%ptr %res = select i1 %cond, float %orig, float %alt store volatile float %res, float *%ptr @@ -204,7 +204,7 @@ define void @f12(float %alt, i32 %limit) { ; CHECK: br %r14 %ptr = alloca float call void @foo(float *%ptr) - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load float *%ptr %res = select i1 %cond, float %orig, float %alt store float %res, float *%ptr diff --git a/test/CodeGen/SystemZ/cond-store-06.ll b/test/CodeGen/SystemZ/cond-store-06.ll index 759a3e0..6668195 100644 --- a/test/CodeGen/SystemZ/cond-store-06.ll +++ b/test/CodeGen/SystemZ/cond-store-06.ll @@ -13,7 +13,7 @@ define void @f1(double *%ptr, double %alt, i32 %limit) { ; CHECK: std %f0, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load double *%ptr %res = select i1 %cond, double %orig, double %alt store double %res, double *%ptr @@ -29,7 +29,7 @@ define void @f2(double *%ptr, double %alt, i32 %limit) { ; CHECK: std %f0, 0(%r2) ; CHECK: [[LABEL]]: ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load double *%ptr %res = select i1 %cond, double %alt, double %orig store double %res, double *%ptr @@ -46,7 +46,7 @@ define void @f3(double *%base, double %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr double *%base, i64 511 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load double *%ptr %res = select i1 %cond, double %orig, double %alt store double %res, double *%ptr @@ -63,7 +63,7 @@ define void @f4(double *%base, double %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr double *%base, i64 512 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load double *%ptr %res = select i1 %cond, double %orig, double %alt store double %res, double *%ptr @@ -80,7 +80,7 @@ define void @f5(double *%base, double %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr double *%base, i64 65535 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load double *%ptr %res = select i1 %cond, double %orig, double %alt store double %res, double *%ptr @@ -99,7 +99,7 @@ define void @f6(double *%base, double %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr double *%base, i64 65536 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load double *%ptr %res = select i1 %cond, double %orig, double %alt store double %res, double *%ptr @@ -116,7 +116,7 @@ define void @f7(double *%base, double %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr double *%base, i64 -65536 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load double *%ptr %res = select i1 %cond, double %orig, double %alt store double %res, double *%ptr @@ -135,7 +135,7 @@ define void @f8(double *%base, double %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: br %r14 %ptr = getelementptr double *%base, i64 -65537 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load double *%ptr %res = select i1 %cond, double %orig, double %alt store double %res, double *%ptr @@ -154,7 +154,7 @@ define void @f9(i64 %base, i64 %index, double %alt, i32 %limit) { %add1 = add i64 %base, %index %add2 = add i64 %add1, 524287 %ptr = inttoptr i64 %add2 to double * - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load double *%ptr %res = select i1 %cond, double %orig, double %alt store double %res, double *%ptr @@ -169,7 +169,7 @@ define void @f10(double *%ptr, double %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: std {{%f[0-5]}}, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load volatile double *%ptr %res = select i1 %cond, double %orig, double %alt store double %res, double *%ptr @@ -184,7 +184,7 @@ define void @f11(double *%ptr, double %alt, i32 %limit) { ; CHECK: [[LABEL]]: ; CHECK: std %f0, 0(%r2) ; CHECK: br %r14 - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load double *%ptr %res = select i1 %cond, double %orig, double %alt store volatile double %res, double *%ptr @@ -204,7 +204,7 @@ define void @f12(double %alt, i32 %limit) { ; CHECK: br %r14 %ptr = alloca double call void @foo(double *%ptr) - %cond = icmp ult i32 %limit, 42 + %cond = icmp ult i32 %limit, 420 %orig = load double *%ptr %res = select i1 %cond, double %orig, double %alt store double %res, double *%ptr diff --git a/test/CodeGen/SystemZ/int-cmp-03.ll b/test/CodeGen/SystemZ/int-cmp-03.ll index 9602d54..aa654e0 100644 --- a/test/CodeGen/SystemZ/int-cmp-03.ll +++ b/test/CodeGen/SystemZ/int-cmp-03.ll @@ -5,8 +5,7 @@ ; Check register comparison. define double @f1(double %a, double %b, i32 %i1, i32 %i2) { ; CHECK-LABEL: f1: -; CHECK: clr %r2, %r3 -; CHECK-NEXT: jl +; CHECK: clrjl %r2, %r3 ; CHECK: ldr %f0, %f2 ; CHECK: br %r14 %cond = icmp ult i32 %i1, %i2 diff --git a/test/CodeGen/SystemZ/int-cmp-08.ll b/test/CodeGen/SystemZ/int-cmp-08.ll index b6f48d3..ebf158a 100644 --- a/test/CodeGen/SystemZ/int-cmp-08.ll +++ b/test/CodeGen/SystemZ/int-cmp-08.ll @@ -5,8 +5,7 @@ ; Check CLGR. define double @f1(double %a, double %b, i64 %i1, i64 %i2) { ; CHECK-LABEL: f1: -; CHECK: clgr %r2, %r3 -; CHECK-NEXT: jl +; CHECK: clgrjl %r2, %r3 ; CHECK: ldr %f0, %f2 ; CHECK: br %r14 %cond = icmp ult i64 %i1, %i2 diff --git a/test/CodeGen/SystemZ/int-cmp-10.ll b/test/CodeGen/SystemZ/int-cmp-10.ll index e30e014..4d4c4bb 100644 --- a/test/CodeGen/SystemZ/int-cmp-10.ll +++ b/test/CodeGen/SystemZ/int-cmp-10.ll @@ -2,12 +2,11 @@ ; ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -; Check a value near the low end of the range. We use CFI for comparisons -; with zero, or things that are equivalent to them. +; Check a value near the low end of the range. We use signed forms for +; comparisons with zero, or things that are equivalent to them. define double @f1(double %a, double %b, i32 %i1) { ; CHECK-LABEL: f1: -; CHECK: clfi %r2, 1 -; CHECK-NEXT: jh +; CHECK: clijh %r2, 1 ; CHECK: ldr %f0, %f2 ; CHECK: br %r14 %cond = icmp ugt i32 %i1, 1 @@ -15,9 +14,32 @@ define double @f1(double %a, double %b, i32 %i1) { ret double %res } -; Check a value near the high end of the range. +; Check the top of the CLIJ range. define double @f2(double %a, double %b, i32 %i1) { ; CHECK-LABEL: f2: +; CHECK: clijl %r2, 255 +; CHECK: ldr %f0, %f2 +; CHECK: br %r14 + %cond = icmp ult i32 %i1, 255 + %res = select i1 %cond, double %a, double %b + ret double %res +} + +; Check the next value up, which needs a separate comparison. +define double @f3(double %a, double %b, i32 %i1) { +; CHECK-LABEL: f3: +; CHECK: clfi %r2, 256 +; CHECK: jl +; CHECK: ldr %f0, %f2 +; CHECK: br %r14 + %cond = icmp ult i32 %i1, 256 + %res = select i1 %cond, double %a, double %b + ret double %res +} + +; Check a value near the high end of the range. +define double @f4(double %a, double %b, i32 %i1) { +; CHECK-LABEL: f4: ; CHECK: clfi %r2, 4294967280 ; CHECK-NEXT: jl ; CHECK: ldr %f0, %f2 diff --git a/test/CodeGen/SystemZ/int-cmp-12.ll b/test/CodeGen/SystemZ/int-cmp-12.ll index f57f6ec..077b224 100644 --- a/test/CodeGen/SystemZ/int-cmp-12.ll +++ b/test/CodeGen/SystemZ/int-cmp-12.ll @@ -2,12 +2,11 @@ ; ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s -; Check a value near the low end of the range. We use CGFI for comparisons -; with zero, or things that are equivalent to them. +; Check a value near the low end of the range. We use signed forms for +; comparisons with zero, or things that are equivalent to them. define double @f1(double %a, double %b, i64 %i1) { ; CHECK-LABEL: f1: -; CHECK: clgfi %r2, 1 -; CHECK-NEXT: jh +; CHECK: clgijh %r2, 1 ; CHECK: ldr %f0, %f2 ; CHECK: br %r14 %cond = icmp ugt i64 %i1, 1 @@ -15,9 +14,32 @@ define double @f1(double %a, double %b, i64 %i1) { ret double %res } -; Check the high end of the CLGFI range. +; Check the top of the CLGIJ range. define double @f2(double %a, double %b, i64 %i1) { ; CHECK-LABEL: f2: +; CHECK: clgijl %r2, 255 +; CHECK: ldr %f0, %f2 +; CHECK: br %r14 + %cond = icmp ult i64 %i1, 255 + %res = select i1 %cond, double %a, double %b + ret double %res +} + +; Check the next value up, which needs a separate comparison. +define double @f3(double %a, double %b, i64 %i1) { +; CHECK-LABEL: f3: +; CHECK: clgfi %r2, 256 +; CHECK: jl +; CHECK: ldr %f0, %f2 +; CHECK: br %r14 + %cond = icmp ult i64 %i1, 256 + %res = select i1 %cond, double %a, double %b + ret double %res +} + +; Check the high end of the CLGFI range. +define double @f4(double %a, double %b, i64 %i1) { +; CHECK-LABEL: f4: ; CHECK: clgfi %r2, 4294967295 ; CHECK-NEXT: jl ; CHECK: ldr %f0, %f2 @@ -28,10 +50,9 @@ define double @f2(double %a, double %b, i64 %i1) { } ; Check the next value up, which must use a register comparison. -define double @f3(double %a, double %b, i64 %i1) { -; CHECK-LABEL: f3: -; CHECK: clgr %r2, -; CHECK-NEXT: jl +define double @f5(double %a, double %b, i64 %i1) { +; CHECK-LABEL: f5: +; CHECK: clgrjl %r2, ; CHECK: ldr %f0, %f2 ; CHECK: br %r14 %cond = icmp ult i64 %i1, 4294967296 diff --git a/test/CodeGen/SystemZ/int-cmp-20.ll b/test/CodeGen/SystemZ/int-cmp-20.ll index 7ecde77..98c41cd 100644 --- a/test/CodeGen/SystemZ/int-cmp-20.ll +++ b/test/CodeGen/SystemZ/int-cmp-20.ll @@ -63,7 +63,7 @@ define double @f4(double %a, double %b, i8 *%ptr) { ; extension. The condition is always true. define double @f5(double %a, double %b, i8 *%ptr) { ; CHECK-LABEL: f5: -; CHECK-NOT: cli +; CHECK-NOT: cli {{.*}} ; CHECK: br %r14 %val = load i8 *%ptr %ext = zext i8 %val to i32 @@ -79,7 +79,7 @@ define double @f5(double %a, double %b, i8 *%ptr) { ; and simply ignore CLI for this range. First check the low end of the range. define double @f6(double %a, double %b, i8 *%ptr) { ; CHECK-LABEL: f6: -; CHECK-NOT: cli +; CHECK-NOT: cli {{.*}} ; CHECK: br %r14 %val = load i8 *%ptr %ext = sext i8 %val to i32 @@ -91,7 +91,7 @@ define double @f6(double %a, double %b, i8 *%ptr) { ; ...and then the high end. define double @f7(double %a, double %b, i8 *%ptr) { ; CHECK-LABEL: f7: -; CHECK-NOT: cli +; CHECK-NOT: cli {{.*}} ; CHECK: br %r14 %val = load i8 *%ptr %ext = sext i8 %val to i32 @@ -118,7 +118,7 @@ define double @f8(double %a, double %b, i8 *%ptr) { ; extension. This cannot use CLI. define double @f9(double %a, double %b, i8 *%ptr) { ; CHECK-LABEL: f9: -; CHECK-NOT: cli +; CHECK-NOT: cli {{.*}} ; CHECK: br %r14 %val = load i8 *%ptr %ext = sext i8 %val to i32 @@ -145,7 +145,7 @@ define double @f10(double %a, double %b, i8 *%ptr) { ; extension. This cannot use CLI. define double @f11(double %a, double %b, i8 *%ptr) { ; CHECK-LABEL: f11: -; CHECK-NOT: cli +; CHECK-NOT: cli {{.*}} ; CHECK: br %r14 %val = load i8 *%ptr %ext = sext i8 %val to i32 @@ -158,7 +158,7 @@ define double @f11(double %a, double %b, i8 *%ptr) { ; extension. The condition is always true. define double @f12(double %a, double %b, i8 *%ptr) { ; CHECK-LABEL: f12: -; CHECK-NOT: cli +; CHECK-NOT: cli {{.*}} ; CHECK: br %r14 %val = load i8 *%ptr %ext = zext i8 %val to i32 diff --git a/test/CodeGen/SystemZ/int-cmp-37.ll b/test/CodeGen/SystemZ/int-cmp-37.ll index dc11a5c..8095ed1 100644 --- a/test/CodeGen/SystemZ/int-cmp-37.ll +++ b/test/CodeGen/SystemZ/int-cmp-37.ll @@ -86,8 +86,7 @@ define i32 @f5(i32 %src1) { ; CHECK-LABEL: f5: ; CHECK: lgrl [[REG:%r[0-5]]], h@GOT ; CHECK: llh [[VAL:%r[0-5]]], 0([[REG]]) -; CHECK: clr %r2, [[VAL]] -; CHECK-NEXT: jl +; CHECK: clrjl %r2, [[VAL]], ; CHECK: br %r14 entry: %val = load i16 *@h, align 1 diff --git a/test/CodeGen/SystemZ/int-cmp-40.ll b/test/CodeGen/SystemZ/int-cmp-40.ll index 201d8b2..9c532f1 100644 --- a/test/CodeGen/SystemZ/int-cmp-40.ll +++ b/test/CodeGen/SystemZ/int-cmp-40.ll @@ -86,8 +86,7 @@ define i64 @f5(i64 %src1) { ; CHECK-LABEL: f5: ; CHECK: lgrl [[REG:%r[0-5]]], h@GOT ; CHECK: llgh [[VAL:%r[0-5]]], 0([[REG]]) -; CHECK: clgr %r2, [[VAL]] -; CHECK-NEXT: jl +; CHECK: clgrjl %r2, [[VAL]], ; CHECK: br %r14 entry: %val = load i16 *@h, align 1 |