diff options
Diffstat (limited to 'test/CodeGen/X86/MergeConsecutiveStores.ll')
| -rw-r--r-- | test/CodeGen/X86/MergeConsecutiveStores.ll | 133 |
1 files changed, 96 insertions, 37 deletions
diff --git a/test/CodeGen/X86/MergeConsecutiveStores.ll b/test/CodeGen/X86/MergeConsecutiveStores.ll index f6d6852..f396e88 100644 --- a/test/CodeGen/X86/MergeConsecutiveStores.ll +++ b/test/CodeGen/X86/MergeConsecutiveStores.ll @@ -148,12 +148,12 @@ define void @merge_nonconst_store(i32 %count, i8 %zz, %struct.A* nocapture %p) n } -;CHECK-LABEL: merge_loads_i16: -; load: -;CHECK: movw -; store: -;CHECK: movw -;CHECK: ret +; CHECK-LABEL: merge_loads_i16: +; load: +; CHECK: movw +; store: +; CHECK: movw +; CHECK: ret define void @merge_loads_i16(i32 %count, %struct.A* noalias nocapture %q, %struct.A* noalias nocapture %p) nounwind uwtable noinline ssp { %1 = icmp sgt i32 %count, 0 br i1 %1, label %.lr.ph, label %._crit_edge @@ -181,13 +181,13 @@ define void @merge_loads_i16(i32 %count, %struct.A* noalias nocapture %q, %struc ret void } -; The loads and the stores are interleved. Can't merge them. -;CHECK-LABEL: no_merge_loads: -;CHECK: movb -;CHECK: movb -;CHECK: movb -;CHECK: movb -;CHECK: ret +; The loads and the stores are interleaved. Can't merge them. +; CHECK-LABEL: no_merge_loads: +; CHECK: movb +; CHECK: movb +; CHECK: movb +; CHECK: movb +; CHECK: ret define void @no_merge_loads(i32 %count, %struct.A* noalias nocapture %q, %struct.A* noalias nocapture %p) nounwind uwtable noinline ssp { %1 = icmp sgt i32 %count, 0 br i1 %1, label %.lr.ph, label %._crit_edge @@ -216,12 +216,12 @@ a4: ; preds = %4, %.lr.ph } -;CHECK-LABEL: merge_loads_integer: -; load: -;CHECK: movq -; store: -;CHECK: movq -;CHECK: ret +; CHECK-LABEL: merge_loads_integer: +; load: +; CHECK: movq +; store: +; CHECK: movq +; CHECK: ret define void @merge_loads_integer(i32 %count, %struct.B* noalias nocapture %q, %struct.B* noalias nocapture %p) nounwind uwtable noinline ssp { %1 = icmp sgt i32 %count, 0 br i1 %1, label %.lr.ph, label %._crit_edge @@ -250,12 +250,12 @@ define void @merge_loads_integer(i32 %count, %struct.B* noalias nocapture %q, %s } -;CHECK-LABEL: merge_loads_vector: -; load: -;CHECK: movups -; store: -;CHECK: movups -;CHECK: ret +; CHECK-LABEL: merge_loads_vector: +; load: +; CHECK: movups +; store: +; CHECK: movups +; CHECK: ret define void @merge_loads_vector(i32 %count, %struct.B* noalias nocapture %q, %struct.B* noalias nocapture %p) nounwind uwtable noinline ssp { %a1 = icmp sgt i32 %count, 0 br i1 %a1, label %.lr.ph, label %._crit_edge @@ -291,18 +291,18 @@ block4: ; preds = %4, %.lr.ph ret void } -;CHECK-LABEL: merge_loads_no_align: -; load: -;CHECK: movl -;CHECK: movl -;CHECK: movl -;CHECK: movl -; store: -;CHECK: movl -;CHECK: movl -;CHECK: movl -;CHECK: movl -;CHECK: ret +; CHECK-LABEL: merge_loads_no_align: +; load: +; CHECK: movl +; CHECK: movl +; CHECK: movl +; CHECK: movl +; store: +; CHECK: movl +; CHECK: movl +; CHECK: movl +; CHECK: movl +; CHECK: ret define void @merge_loads_no_align(i32 %count, %struct.B* noalias nocapture %q, %struct.B* noalias nocapture %p) nounwind uwtable noinline ssp { %a1 = icmp sgt i32 %count, 0 br i1 %a1, label %.lr.ph, label %._crit_edge @@ -434,3 +434,62 @@ define void @loadStoreBaseIndexOffsetSextNoSex(i8* %a, i8* %b, i8* %c, i32 %n) { ; <label>:14 ret void } + +; PR21711 ( http://llvm.org/bugs/show_bug.cgi?id=21711 ) +define void @merge_vec_element_store(<8 x float> %v, float* %ptr) { + %vecext0 = extractelement <8 x float> %v, i32 0 + %vecext1 = extractelement <8 x float> %v, i32 1 + %vecext2 = extractelement <8 x float> %v, i32 2 + %vecext3 = extractelement <8 x float> %v, i32 3 + %vecext4 = extractelement <8 x float> %v, i32 4 + %vecext5 = extractelement <8 x float> %v, i32 5 + %vecext6 = extractelement <8 x float> %v, i32 6 + %vecext7 = extractelement <8 x float> %v, i32 7 + %arrayidx1 = getelementptr inbounds float* %ptr, i64 1 + %arrayidx2 = getelementptr inbounds float* %ptr, i64 2 + %arrayidx3 = getelementptr inbounds float* %ptr, i64 3 + %arrayidx4 = getelementptr inbounds float* %ptr, i64 4 + %arrayidx5 = getelementptr inbounds float* %ptr, i64 5 + %arrayidx6 = getelementptr inbounds float* %ptr, i64 6 + %arrayidx7 = getelementptr inbounds float* %ptr, i64 7 + store float %vecext0, float* %ptr, align 4 + store float %vecext1, float* %arrayidx1, align 4 + store float %vecext2, float* %arrayidx2, align 4 + store float %vecext3, float* %arrayidx3, align 4 + store float %vecext4, float* %arrayidx4, align 4 + store float %vecext5, float* %arrayidx5, align 4 + store float %vecext6, float* %arrayidx6, align 4 + store float %vecext7, float* %arrayidx7, align 4 + ret void + +; CHECK-LABEL: merge_vec_element_store +; CHECK: vmovups +; CHECK-NEXT: vzeroupper +; CHECK-NEXT: retq +} + +; This is a minimized test based on real code that was failing. +; We could merge stores (and loads) like this... + +define void @merge_vec_element_and_scalar_load([6 x i64]* %array) { + %idx0 = getelementptr inbounds [6 x i64]* %array, i64 0, i64 0 + %idx1 = getelementptr inbounds [6 x i64]* %array, i64 0, i64 1 + %idx4 = getelementptr inbounds [6 x i64]* %array, i64 0, i64 4 + %idx5 = getelementptr inbounds [6 x i64]* %array, i64 0, i64 5 + + %a0 = load i64* %idx0, align 8 + store i64 %a0, i64* %idx4, align 8 + + %b = bitcast i64* %idx1 to <2 x i64>* + %v = load <2 x i64>* %b, align 8 + %a1 = extractelement <2 x i64> %v, i32 0 + store i64 %a1, i64* %idx5, align 8 + ret void + +; CHECK-LABEL: merge_vec_element_and_scalar_load +; CHECK: movq (%rdi), %rax +; CHECK-NEXT: movq %rax, 32(%rdi) +; CHECK-NEXT: movq 8(%rdi), %rax +; CHECK-NEXT: movq %rax, 40(%rdi) +; CHECK-NEXT: retq +} |