diff options
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/R600/store.ll | 14 | ||||
| -rw-r--r-- | test/CodeGen/R600/vertex-fetch-encoding.ll | 2 |
2 files changed, 15 insertions, 1 deletions
diff --git a/test/CodeGen/R600/store.ll b/test/CodeGen/R600/store.ll index 5dc0a84..f2a8dd7 100644 --- a/test/CodeGen/R600/store.ll +++ b/test/CodeGen/R600/store.ll @@ -31,6 +31,20 @@ entry: ret void } +; EG-CHECK: @store_v4i32 +; EG-CHECK: MEM_RAT_CACHELESS STORE_RAW +; EG-CHECK-NOT: MEM_RAT_CACHELESS STORE_RAW +; CM-CHECK: @store_v4i32 +; CM-CHECK: MEM_RAT_CACHELESS STORE_DWORD +; CM-CHECK-NOT: MEM_RAT_CACHELESS STORE_DWORD +; SI-CHECK: @store_v4i32 +; SI-CHECK: BUFFER_STORE_DWORDX4 +define void @store_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> %in) { +entry: + store <4 x i32> %in, <4 x i32> addrspace(1)* %out + ret void +} + ; The stores in this function are combined by the optimizer to create a ; 64-bit store with 32-bit alignment. This is legal for SI and the legalizer ; should not try to split the 64-bit store back into 2 32-bit stores. diff --git a/test/CodeGen/R600/vertex-fetch-encoding.ll b/test/CodeGen/R600/vertex-fetch-encoding.ll index d892229..7ea7a5c 100644 --- a/test/CodeGen/R600/vertex-fetch-encoding.ll +++ b/test/CodeGen/R600/vertex-fetch-encoding.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -march=r600 -show-mc-encoding -mcpu=barts | FileCheck --check-prefix=NI-CHECK %s -; RUN: not llc < %s -march=r600 -show-mc-encoding -mcpu=cayman | FileCheck --check-prefix=CM-CHECK %s +; RUN: llc < %s -march=r600 -show-mc-encoding -mcpu=cayman | FileCheck --check-prefix=CM-CHECK %s ; NI-CHECK: @vtx_fetch32 ; NI-CHECK: VTX_READ_32 T[[GPR:[0-9]]].X, T[[GPR]].X, 0 ; encoding: [0x40,0x01,0x0[[GPR]],0x10,0x0[[GPR]],0xf0,0x5f,0x13,0x00,0x00,0x08,0x00 |