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-rw-r--r--test/MC/Disassembler/ARM/armv8.1a.txt16
1 files changed, 16 insertions, 0 deletions
diff --git a/test/MC/Disassembler/ARM/armv8.1a.txt b/test/MC/Disassembler/ARM/armv8.1a.txt
index de0c89e..929643b 100644
--- a/test/MC/Disassembler/ARM/armv8.1a.txt
+++ b/test/MC/Disassembler/ARM/armv8.1a.txt
@@ -34,3 +34,19 @@
# CHECK-V8: [0x42,0x0f,0x92,0xf3]
# CHECK-V8: warning: invalid instruction encoding
# CHECK-V8: [0x42,0x0f,0xa1,0xf2]
+
+# The SETPAN(v8.1a) and TST(v8) instructions occupy the same space, but SETPAN
+# uses the encoding for the invalid NV predicate operand. This test checks that
+# the disassembler is correctly disambiguating and decoding these instructions.
+
+[0x00 0x00 0x10 0xf1]
+# CHECK: setpan #0
+
+[0x00 0x02 0x10 0xf1]
+# CHECK: setpan #1
+
+[0x00 0x00 0x10 0xe1]
+# CHECK: tst r0, r0
+
+[0x00 0x02 0x10 0xe1]
+# CHECK: tst r0, r0, lsl #4