diff options
Diffstat (limited to 'test')
191 files changed, 3957 insertions, 1765 deletions
diff --git a/test/Analysis/GlobalsModRef/volatile-instrs.ll b/test/Analysis/GlobalsModRef/volatile-instrs.ll new file mode 100644 index 0000000..49bce67 --- /dev/null +++ b/test/Analysis/GlobalsModRef/volatile-instrs.ll @@ -0,0 +1,34 @@ +; RUN: opt < %s -basicaa -dse -S | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.8.0" + +%struct.anon = type { i32, i32, i32 } +@b = global %struct.anon { i32 1, i32 0, i32 0 }, align 4 +@c = common global i32 0, align 4 +@a = common global %struct.anon zeroinitializer, align 4 +@.str = private unnamed_addr constant [4 x i8] c"%d\0A\00", align 1 + +declare i32 @printf(i8* nocapture, ...) nounwind +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind + + +; Make sure that the initial memcpy call does not go away +; because the volatile load is in the way. PR12899 + +; CHECK: main_entry: +; CHECK-NEXT: tail call void @llvm.memcpy.p0i8.p0i8.i64 + +define i32 @main() nounwind uwtable ssp { +main_entry: + tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* bitcast (%struct.anon* @b to i8*), i8* bitcast (%struct.anon* @a to i8*), i64 12, i32 4, i1 false) + %0 = load volatile i32* getelementptr inbounds (%struct.anon* @b, i64 0, i32 0), align 4, !tbaa !0 + store i32 %0, i32* @c, align 4, !tbaa !0 + tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* bitcast (%struct.anon* @b to i8*), i8* bitcast (%struct.anon* @a to i8*), i64 12, i32 4, i1 false) nounwind + %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i64 0, i64 0), i32 %0) nounwind + ret i32 0 +} + +!0 = metadata !{metadata !"int", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/Analysis/ScalarEvolution/2012-05-29-MulAddRec.ll b/test/Analysis/ScalarEvolution/2012-05-29-MulAddRec.ll index eee4ec4..3f04e2e 100644 --- a/test/Analysis/ScalarEvolution/2012-05-29-MulAddRec.ll +++ b/test/Analysis/ScalarEvolution/2012-05-29-MulAddRec.ll @@ -16,7 +16,7 @@ ; CHECK: for.body: ; CHECK: %inc.9 = add i8 %inc.8, 1 ; CHECK: %0 = add i8 %inc1, 10 -; CHEKC: br label %for.cond +; CHECK: br label %for.cond target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" define void @func() noreturn nounwind uwtable ssp { diff --git a/test/Analysis/ScalarEvolution/SolveQuadraticEquation.ll b/test/Analysis/ScalarEvolution/SolveQuadraticEquation.ll index 06f1b6f..e946d7a 100644 --- a/test/Analysis/ScalarEvolution/SolveQuadraticEquation.ll +++ b/test/Analysis/ScalarEvolution/SolveQuadraticEquation.ll @@ -80,3 +80,24 @@ for.cond539.preheader: unreachable } ; CHECK: Determining loop execution counts for: @test3 + +; PR13489 +; We used to crash on this too. + +define void @test4() { +entry: + br label %for.body + +for.body: ; preds = %for.body, %entry + %v2.02 = phi i64 [ 2, %entry ], [ %phitmp, %for.body ] + %v1.01 = phi i64 [ -2, %entry ], [ %sub1, %for.body ] + %sub1 = sub i64 %v1.01, %v2.02 + %phitmp = add i64 %v2.02, 2 + %tobool = icmp eq i64 %sub1, %phitmp + br i1 %tobool, label %for.end, label %for.body + +for.end: ; preds = %for.body + ret void +} + +; CHECK: Determining loop execution counts for: @test4 diff --git a/test/Assembler/2003-06-17-InvokeDisassemble.ll b/test/Assembler/2003-06-17-InvokeDisassemble.ll deleted file mode 100644 index 8a9670e..0000000 --- a/test/Assembler/2003-06-17-InvokeDisassemble.ll +++ /dev/null @@ -1,13 +0,0 @@ -; RUN: llvm-as < %s | llvm-dis - -define void @test() { - invoke void @test( ) - to label %Next unwind label %Next - -Next: ; preds = %0, %0 - %lpad = landingpad { i8*, i32 } personality i32 (...)* @__gxx_personality_v0 - cleanup - ret void -} - -declare i32 @__gxx_personality_v0(...) diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt index bb5afe2..991cc9d 100644 --- a/test/CMakeLists.txt +++ b/test/CMakeLists.txt @@ -19,6 +19,7 @@ add_lit_testsuite(check-llvm "Running the LLVM regression tests" llvm-link llvm-mc llvm-nm llvm-objdump llvm-readobj macho-dump opt FileCheck count not + yaml2obj ) set_target_properties(check-llvm PROPERTIES FOLDER "Tests") diff --git a/test/CodeGen/ARM/2011-03-15-LdStMultipleBug.ll b/test/CodeGen/ARM/2011-03-15-LdStMultipleBug.ll index 2faa04a..e84ce0e 100644 --- a/test/CodeGen/ARM/2011-03-15-LdStMultipleBug.ll +++ b/test/CodeGen/ARM/2011-03-15-LdStMultipleBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -relocation-model=pic -disable-fp-elim -disable-cgp-delete-dead-blocks -mcpu=cortex-a8 | FileCheck %s +; RUN: llc < %s -mtriple=thumbv7-apple-darwin10 -relocation-model=pic -disable-fp-elim -mcpu=cortex-a8 | FileCheck %s ; Do not form Thumb2 ldrd / strd if the offset is not multiple of 4. ; rdar://9133587 @@ -21,12 +21,6 @@ for.body: ; preds = %_Z14printIsNotZeroi %x = getelementptr %struct.Outer* @oStruct, i32 0, i32 1, i32 %i.022, i32 0 %y = getelementptr %struct.Outer* @oStruct, i32 0, i32 1, i32 %i.022, i32 1 %inc = add i32 %i.022, 1 - br i1 %tmp3, label %_Z14printIsNotZeroi.exit, label %if.then.i - -if.then.i: ; preds = %for.body - unreachable - -_Z14printIsNotZeroi.exit: ; preds = %for.body %tmp8 = load i32* %x, align 4, !tbaa !0 %tmp11 = load i32* %y, align 4, !tbaa !0 %mul = mul nsw i32 %tmp11, %tmp8 @@ -37,7 +31,7 @@ if.then.i16: ; preds = %_Z14printIsNotZeroi unreachable _Z14printIsNotZeroi.exit17: ; preds = %_Z14printIsNotZeroi.exit - br i1 undef, label %_Z14printIsNotZeroi.exit17.for.body_crit_edge, label %for.end + br label %_Z14printIsNotZeroi.exit17.for.body_crit_edge _Z14printIsNotZeroi.exit17.for.body_crit_edge: ; preds = %_Z14printIsNotZeroi.exit17 %b.phi.trans.insert = getelementptr %struct.Outer* @oStruct, i32 0, i32 1, i32 %inc, i32 3 diff --git a/test/CodeGen/ARM/2011-11-29-128bitArithmetics.ll b/test/CodeGen/ARM/2011-11-29-128bitArithmetics.ll index 6fbae19..f80b44f 100644 --- a/test/CodeGen/ARM/2011-11-29-128bitArithmetics.ll +++ b/test/CodeGen/ARM/2011-11-29-128bitArithmetics.ll @@ -33,16 +33,16 @@ define void @test_cos(<4 x float>* %X) nounwind { ; CHECK: movt [[reg0]], :upper16:{{.*}} ; CHECK: vldmia r{{[0-9][0-9]?}}, {{.*}} -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}cosf -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}cosf -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}cosf -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}cosf ; CHECK: vstmia {{.*}} @@ -64,16 +64,16 @@ define void @test_exp(<4 x float>* %X) nounwind { ; CHECK: movt [[reg0]], :upper16:{{.*}} ; CHECK: vldmia r{{[0-9][0-9]?}}, {{.*}} -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}expf -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}expf -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}expf -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}expf ; CHECK: vstmia {{.*}} @@ -95,16 +95,16 @@ define void @test_exp2(<4 x float>* %X) nounwind { ; CHECK: movt [[reg0]], :upper16:{{.*}} ; CHECK: vldmia r{{[0-9][0-9]?}}, {{.*}} -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}exp2f -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}exp2f -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}exp2f -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}exp2f ; CHECK: vstmia {{.*}} @@ -126,16 +126,16 @@ define void @test_log10(<4 x float>* %X) nounwind { ; CHECK: movt [[reg0]], :upper16:{{.*}} ; CHECK: vldmia r{{[0-9][0-9]?}}, {{.*}} -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}log10f -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}log10f -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}log10f -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}log10f ; CHECK: vstmia {{.*}} @@ -157,16 +157,16 @@ define void @test_log(<4 x float>* %X) nounwind { ; CHECK: movt [[reg0]], :upper16:{{.*}} ; CHECK: vldmia r{{[0-9][0-9]?}}, {{.*}} -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}logf -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}logf -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}logf -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}logf ; CHECK: vstmia {{.*}} @@ -188,16 +188,16 @@ define void @test_log2(<4 x float>* %X) nounwind { ; CHECK: movt [[reg0]], :upper16:{{.*}} ; CHECK: vldmia r{{[0-9][0-9]?}}, {{.*}} -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}log2f -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}log2f -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}log2f -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}log2f ; CHECK: vstmia {{.*}} @@ -220,16 +220,16 @@ define void @test_pow(<4 x float>* %X) nounwind { ; CHECK: movt [[reg0]], :upper16:{{.*}} ; CHECK: vldmia r{{[0-9][0-9]?}}, {{.*}} -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}powf -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}powf -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}powf -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}powf ; CHECK: vstmia {{.*}} @@ -277,16 +277,16 @@ define void @test_sin(<4 x float>* %X) nounwind { ; CHECK: movt [[reg0]], :upper16:{{.*}} ; CHECK: vldmia r{{[0-9][0-9]?}}, {{.*}} -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}sinf -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}sinf -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}sinf -; CHECK: {{[v]?mov}} r0, {{[r|s][0-9]+}} +; CHECK: {{v?mov(.32)?}} r0, ; CHECK: bl {{.*}}sinf ; CHECK: vstmia {{.*}} diff --git a/test/CodeGen/ARM/2012-08-04-DtripleSpillReload.ll b/test/CodeGen/ARM/2012-08-04-DtripleSpillReload.ll new file mode 100644 index 0000000..e4ad45b --- /dev/null +++ b/test/CodeGen/ARM/2012-08-04-DtripleSpillReload.ll @@ -0,0 +1,174 @@ +; RUN: llc < %s +; PR13377 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64" +target triple = "armv7-none-linux-gnueabi" + +%0 = type { <4 x float> } + +define arm_aapcs_vfpcc void @foo(float, i1 zeroext, i1 zeroext) nounwind uwtable { + br i1 undef, label %4, label %5 + +; <label>:4 ; preds = %3 + unreachable + +; <label>:5 ; preds = %3 + br i1 undef, label %7, label %6 + +; <label>:6 ; preds = %5 + unreachable + +; <label>:7 ; preds = %5 + br i1 undef, label %8, label %10 + +; <label>:8 ; preds = %7 + br i1 undef, label %9, label %10 + +; <label>:9 ; preds = %8 + br i1 undef, label %11, label %10 + +; <label>:10 ; preds = %9, %8, %7 + unreachable + +; <label>:11 ; preds = %9 + br i1 undef, label %13, label %12 + +; <label>:12 ; preds = %11 + unreachable + +; <label>:13 ; preds = %11 + br i1 undef, label %15, label %14 + +; <label>:14 ; preds = %13 + unreachable + +; <label>:15 ; preds = %13 + br i1 undef, label %18, label %16 + +; <label>:16 ; preds = %15 + br i1 undef, label %17, label %18 + +; <label>:17 ; preds = %16 + unreachable + +; <label>:18 ; preds = %16, %15 + br i1 undef, label %68, label %19 + +; <label>:19 ; preds = %18 + br label %20 + +; <label>:20 ; preds = %20, %19 + br i1 undef, label %21, label %20 + +; <label>:21 ; preds = %20 + br i1 undef, label %22, label %68 + +; <label>:22 ; preds = %21 + br i1 undef, label %23, label %24 + +; <label>:23 ; preds = %22 + unreachable + +; <label>:24 ; preds = %22 + br i1 undef, label %26, label %25 + +; <label>:25 ; preds = %24 + unreachable + +; <label>:26 ; preds = %24 + br i1 undef, label %28, label %27 + +; <label>:27 ; preds = %26 + unreachable + +; <label>:28 ; preds = %26 + br i1 undef, label %29, label %30, !prof !0 + +; <label>:29 ; preds = %28 + br label %30 + +; <label>:30 ; preds = %29, %28 + br i1 undef, label %31, label %32, !prof !0 + +; <label>:31 ; preds = %30 + br label %32 + +; <label>:32 ; preds = %31, %30 + br i1 undef, label %34, label %33 + +; <label>:33 ; preds = %32 + unreachable + +; <label>:34 ; preds = %32 + br i1 undef, label %35, label %36, !prof !0 + +; <label>:35 ; preds = %34 + br label %36 + +; <label>:36 ; preds = %35, %34 + br i1 undef, label %37, label %38, !prof !0 + +; <label>:37 ; preds = %36 + br label %38 + +; <label>:38 ; preds = %37, %36 + br i1 undef, label %39, label %67 + +; <label>:39 ; preds = %38 + br i1 undef, label %40, label %41 + +; <label>:40 ; preds = %39 + br i1 undef, label %64, label %41 + +; <label>:41 ; preds = %40, %39 + br i1 undef, label %64, label %42 + +; <label>:42 ; preds = %41 + %43 = fadd <4 x float> undef, undef + %44 = fadd <4 x float> undef, undef + %45 = fmul <4 x float> undef, undef + %46 = fmul <4 x float> %45, %43 + %47 = fmul <4 x float> undef, %44 + %48 = load <4 x float>* undef, align 8, !tbaa !1 + %49 = bitcast <4 x float> %48 to <2 x i64> + %50 = shufflevector <2 x i64> %49, <2 x i64> undef, <1 x i32> <i32 1> + %51 = bitcast <1 x i64> %50 to <2 x float> + %52 = shufflevector <2 x float> %51, <2 x float> undef, <4 x i32> zeroinitializer + %53 = bitcast <4 x float> %52 to <2 x i64> + %54 = shufflevector <2 x i64> %53, <2 x i64> undef, <1 x i32> zeroinitializer + %55 = bitcast <1 x i64> %54 to <2 x float> + %56 = extractelement <2 x float> %55, i32 0 + %57 = insertelement <4 x float> undef, float %56, i32 2 + %58 = insertelement <4 x float> %57, float 1.000000e+00, i32 3 + %59 = fsub <4 x float> %47, %58 + %60 = fmul <4 x float> undef, undef + %61 = fmul <4 x float> %59, %60 + %62 = fmul <4 x float> %61, <float 6.000000e+01, float 6.000000e+01, float 6.000000e+01, float 6.000000e+01> + %63 = fadd <4 x float> %47, %62 + store <4 x float> %46, <4 x float>* undef, align 8, !tbaa !1 + call arm_aapcs_vfpcc void @bar(%0* undef, float 0.000000e+00) nounwind + call arm_aapcs_vfpcc void @bar(%0* undef, float 0.000000e+00) nounwind + store <4 x float> %63, <4 x float>* undef, align 8, !tbaa !1 + unreachable + +; <label>:64 ; preds = %41, %40 + br i1 undef, label %65, label %66 + +; <label>:65 ; preds = %64 + unreachable + +; <label>:66 ; preds = %64 + unreachable + +; <label>:67 ; preds = %38 + unreachable + +; <label>:68 ; preds = %21, %18 + ret void +} + +declare arm_aapcs_vfpcc void @bar(%0*, float) + +!0 = metadata !{metadata !"branch_weights", i32 64, i32 4} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/ARM/2012-08-08-legalize-unaligned.ll b/test/CodeGen/ARM/2012-08-08-legalize-unaligned.ll new file mode 100644 index 0000000..bdcd1b6 --- /dev/null +++ b/test/CodeGen/ARM/2012-08-08-legalize-unaligned.ll @@ -0,0 +1,12 @@ +; RUN: llc < %s +; PR13111 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32" +target triple = "armv7-none-linux-gnueabi" + +define void @test_hi_char8() noinline { +entry: + %0 = load <4 x i8>* undef, align 1 + store <4 x i8> %0, <4 x i8>* null, align 4 + ret void +} diff --git a/test/CodeGen/ARM/2012-08-13-bfi.ll b/test/CodeGen/ARM/2012-08-13-bfi.ll new file mode 100644 index 0000000..8263833 --- /dev/null +++ b/test/CodeGen/ARM/2012-08-13-bfi.ll @@ -0,0 +1,17 @@ +; RUN: llc -march=thumb -mcpu=cortex-a8 < %s | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.8.0" + +; CHECK: foo +; CHECK-NOT: bfi +; CHECK: bx +define i32 @foo(i8 zeroext %i) nounwind uwtable readnone ssp { + %1 = and i8 %i, 15 + %2 = zext i8 %1 to i32 + %3 = icmp ult i8 %1, 10 + %4 = or i32 %2, 48 + %5 = add nsw i32 %2, 55 + %6 = select i1 %3, i32 %4, i32 %5 + ret i32 %6 +} diff --git a/test/CodeGen/ARM/arm-modifier.ll b/test/CodeGen/ARM/arm-modifier.ll index 396de37..5e12d8e 100644 --- a/test/CodeGen/ARM/arm-modifier.ll +++ b/test/CodeGen/ARM/arm-modifier.ll @@ -57,3 +57,12 @@ store i64 %0, i64* @f3_var, align 4 store i64 %1, i64* @f3_var, align 4 ret void } + +define i64 @f4(i64* %val) nounwind { +entry: + ;CHECK: f4 + ;CHECK: ldrexd [[REG1:(r[0-9]?[02468])]], {{r[0-9]?[13579]}}, [r0] + ;CHECK: mov r0, [[REG1]] + %0 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [$1]", "=&r,r,*Qo"(i64* %val, i64* %val) nounwind + ret i64 %0 +} diff --git a/test/CodeGen/ARM/constants.ll b/test/CodeGen/ARM/constants.ll index f4c1b5a..0ac8b48 100644 --- a/test/CodeGen/ARM/constants.ll +++ b/test/CodeGen/ARM/constants.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=armv4t-unknown-linux-gnueabi -disable-cgp-branch-opts | FileCheck %s +; RUN: llc < %s -mtriple=armv4t-unknown-linux-gnueabi -disable-cgp-branch-opts -verify-machineinstrs | FileCheck %s define i32 @f1() { ; CHECK: f1 diff --git a/test/CodeGen/ARM/crash-greedy.ll b/test/CodeGen/ARM/crash-greedy.ll index 8a865e2..a3d49f6 100644 --- a/test/CodeGen/ARM/crash-greedy.ll +++ b/test/CodeGen/ARM/crash-greedy.ll @@ -82,3 +82,49 @@ if.then195: ; preds = %if.then84 if.end251: ; preds = %if.then195, %if.then84, %entry ret void } + +; Coalescer failure: removeCopyByCommutingDef leaves a bad kill flag +; behind. +define void @rdar11950722() nounwind readonly optsize ssp align 2 { +entry: + br i1 undef, label %land.lhs.true7, label %lor.lhs.false.i + +lor.lhs.false.i: + br i1 undef, label %if.then10.i, label %land.lhs.true7 + +if.then10.i: + %xFlags.1.i = select i1 undef, i32 0, i32 undef + br i1 undef, label %land.lhs.true33.i, label %f.exit + +land.lhs.true33.i: + %and26.i = and i32 %xFlags.1.i, 8 + %cmp27.i = icmp eq i32 %and26.i, 0 + %and29.i = and i32 %xFlags.1.i, 2147483645 + %xFlags.1.and29.i = select i1 %cmp27.i, i32 %xFlags.1.i, i32 %and29.i + %and34.i = and i32 %xFlags.1.i, 8 + %cmp35.i = icmp eq i32 %and34.i, 0 + %and37.i = and i32 %xFlags.1.i, 2147483645 + %yFlags.1.and37.i = select i1 %cmp35.i, i32 %xFlags.1.i, i32 %and37.i + br label %f.exit + +f.exit: + %xFlags.3.i = phi i32 [ %xFlags.1.and29.i, %land.lhs.true33.i ], [ %xFlags.1.i, %if.then10.i ] + %yFlags.2.i = phi i32 [ %yFlags.1.and37.i, %land.lhs.true33.i ], [ %xFlags.1.i, %if.then10.i ] + %cmp40.i = icmp eq i32 %xFlags.3.i, %yFlags.2.i + br i1 %cmp40.i, label %land.lhs.true7, label %land.end + +land.lhs.true7: + br i1 undef, label %land.lhs.true34, label %lor.lhs.false27 + +lor.lhs.false27: + br i1 undef, label %land.lhs.true34, label %land.end + +land.lhs.true34: + br i1 undef, label %land.end, label %lor.lhs.false44 + +lor.lhs.false44: + ret void + +land.end: + ret void +} diff --git a/test/CodeGen/ARM/crash-shufflevector.ll b/test/CodeGen/ARM/crash-shufflevector.ll new file mode 100644 index 0000000..ece4234 --- /dev/null +++ b/test/CodeGen/ARM/crash-shufflevector.ll @@ -0,0 +1,10 @@ +; RUN: llc < %s -mtriple=armv7-- + +declare void @g(<16 x i8>) +define void @f(<4 x i8> %param1, <4 x i8> %param2) { + %y1 = shufflevector <4 x i8> %param1, <4 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> + %y2 = shufflevector <4 x i8> %param2, <4 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> + %z = shufflevector <16 x i8> %y1, <16 x i8> %y2, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 16, i32 17, i32 18, i32 19> + call void @g(<16 x i8> %z) + ret void +} diff --git a/test/CodeGen/ARM/debug-info-branch-folding.ll b/test/CodeGen/ARM/debug-info-branch-folding.ll index 9bdae43..4f4ff8e 100644 --- a/test/CodeGen/ARM/debug-info-branch-folding.ll +++ b/test/CodeGen/ARM/debug-info-branch-folding.ll @@ -3,16 +3,17 @@ target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32- target triple = "thumbv7-apple-macosx10.6.7" ;CHECK: vadd.f32 q4, q8, q8 -;CHECK-NEXT: Ltmp -;CHECK-NEXT: @DEBUG_VALUE: y <- Q4+0 -;CHECK-NEXT: @DEBUG_VALUE: x <- Q4+0 +;CHECK-NEXT: Ltmp1 + +;CHECK:@DEBUG_VALUE: x <- Q4+0 +;CHECK-NEXT:@DEBUG_VALUE: y <- Q4+0 @.str = external constant [13 x i8] declare <4 x float> @test0001(float) nounwind readnone ssp -define i32 @main(i32 %argc, i8** nocapture %argv) nounwind ssp { +define i32 @main(i32 %argc, i8** nocapture %argv, i1 %cond) nounwind ssp { entry: br label %for.body9 @@ -21,7 +22,7 @@ for.body9: ; preds = %for.body9, %entry tail call void @llvm.dbg.value(metadata !{<4 x float> %add19}, i64 0, metadata !27), !dbg !39 %add20 = fadd <4 x float> undef, <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00>, !dbg !39 tail call void @llvm.dbg.value(metadata !{<4 x float> %add20}, i64 0, metadata !28), !dbg !39 - br i1 undef, label %for.end54, label %for.body9, !dbg !44 + br i1 %cond, label %for.end54, label %for.body9, !dbg !44 for.end54: ; preds = %for.body9 %tmp115 = extractelement <4 x float> %add19, i32 1 @@ -52,7 +53,7 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !7 = metadata !{i32 589860, metadata !2, metadata !"float", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] !8 = metadata !{metadata !9} !9 = metadata !{i32 589857, i64 0, i64 3} ; [ DW_TAG_subrange_type ] -!10 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 59, metadata !11, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32, i8**)* @main, null} ; [ DW_TAG_subprogram ] +!10 = metadata !{i32 589870, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 59, metadata !11, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32, i8**, i1)* @main, null} ; [ DW_TAG_subprogram ] !11 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !12, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !12 = metadata !{metadata !13} !13 = metadata !{i32 589860, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] diff --git a/test/CodeGen/ARM/fabss.ll b/test/CodeGen/ARM/fabss.ll index 45c322d..bcb4ee7 100644 --- a/test/CodeGen/ARM/fabss.ll +++ b/test/CodeGen/ARM/fabss.ll @@ -1,12 +1,12 @@ -; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2 -; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NFP0 -; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8 -; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=CORTEXA9 +; RUN: llc < %s -mtriple=arm-apple-ios -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2 +; RUN: llc < %s -mtriple=arm-apple-ios -mattr=+neon | FileCheck %s -check-prefix=NFP0 +; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8 +; RUN: llc < %s -mtriple=arm-apple-ios -mcpu=cortex-a9 | FileCheck %s -check-prefix=CORTEXA9 define float @test(float %a, float %b) { entry: %dum = fadd float %a, %b - %0 = tail call float @fabsf(float %dum) + %0 = tail call float @fabsf(float %dum) readnone %dum1 = fadd float %0, %b ret float %dum1 } diff --git a/test/CodeGen/ARM/fast-isel-call.ll b/test/CodeGen/ARM/fast-isel-call.ll index edc805a..b6c9098 100644 --- a/test/CodeGen/ARM/fast-isel-call.ll +++ b/test/CodeGen/ARM/fast-isel-call.ll @@ -2,6 +2,8 @@ ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios | FileCheck %s --check-prefix=THUMB ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -arm-long-calls | FileCheck %s --check-prefix=ARM-LONG ; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -arm-long-calls | FileCheck %s --check-prefix=THUMB-LONG +; RUN: llc < %s -O0 -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios -mattr=-vfp2 | FileCheck %s --check-prefix=ARM-NOVFP +; RUN: llc < %s -O0 -relocation-model=dynamic-no-pic -mtriple=thumbv7-apple-ios -mattr=-vfp2 | FileCheck %s --check-prefix=THUMB-NOVFP define i32 @t0(i1 zeroext %a) nounwind { %1 = zext i1 %a to i32 @@ -221,3 +223,67 @@ entry: } declare i32 @CallVariadic(i32, ...) + +; Test fastcc + +define fastcc void @fast_callee(float %i) ssp { +entry: +; ARM: fast_callee +; ARM: vmov r0, s0 +; THUMB: fast_callee +; THUMB: vmov r0, s0 +; ARM-NOVFP: fast_callee +; ARM-NOVFP-NOT: s0 +; THUMB-NOVFP: fast_callee +; THUMB-NOVFP-NOT: s0 + call void @print(float %i) + ret void +} + +define void @fast_caller() ssp { +entry: +; ARM: fast_caller +; ARM: vldr s0, +; THUMB: fast_caller +; THUMB: vldr s0, +; ARM-NOVFP: fast_caller +; ARM-NOVFP: movw r0, #13107 +; ARM-NOVFP: movt r0, #16611 +; THUMB-NOVFP: fast_caller +; THUMB-NOVFP: movw r0, #13107 +; THUMB-NOVFP: movt r0, #16611 + call fastcc void @fast_callee(float 0x401C666660000000) + ret void +} + +define void @no_fast_callee(float %i) ssp { +entry: +; ARM: no_fast_callee +; ARM: vmov s0, r0 +; THUMB: no_fast_callee +; THUMB: vmov s0, r0 +; ARM-NOVFP: no_fast_callee +; ARM-NOVFP-NOT: s0 +; THUMB-NOVFP: no_fast_callee +; THUMB-NOVFP-NOT: s0 + call void @print(float %i) + ret void +} + +define void @no_fast_caller() ssp { +entry: +; ARM: no_fast_caller +; ARM: vmov r0, s0 +; THUMB: no_fast_caller +; THUMB: vmov r0, s0 +; ARM-NOVFP: no_fast_caller +; ARM-NOVFP: movw r0, #13107 +; ARM-NOVFP: movt r0, #16611 +; THUMB-NOVFP: no_fast_caller +; THUMB-NOVFP: movw r0, #13107 +; THUMB-NOVFP: movt r0, #16611 + call void @no_fast_callee(float 0x401C666660000000) + ret void +} + +declare void @print(float) diff --git a/test/CodeGen/ARM/fast-isel-shifter.ll b/test/CodeGen/ARM/fast-isel-shifter.ll new file mode 100644 index 0000000..111818b --- /dev/null +++ b/test/CodeGen/ARM/fast-isel-shifter.ll @@ -0,0 +1,50 @@ +; RUN: llc < %s -O0 -fast-isel-abort -relocation-model=dynamic-no-pic -mtriple=armv7-apple-ios | FileCheck %s --check-prefix=ARM + +define i32 @shl() nounwind ssp { +entry: +; ARM: shl +; ARM: lsl r0, r0, #2 + %shl = shl i32 -1, 2 + ret i32 %shl +} + +define i32 @shl_reg(i32 %src1, i32 %src2) nounwind ssp { +entry: +; ARM: shl_reg +; ARM: lsl r0, r0, r1 + %shl = shl i32 %src1, %src2 + ret i32 %shl +} + +define i32 @lshr() nounwind ssp { +entry: +; ARM: lshr +; ARM: lsr r0, r0, #2 + %lshr = lshr i32 -1, 2 + ret i32 %lshr +} + +define i32 @lshr_reg(i32 %src1, i32 %src2) nounwind ssp { +entry: +; ARM: lshr_reg +; ARM: lsr r0, r0, r1 + %lshr = lshr i32 %src1, %src2 + ret i32 %lshr +} + +define i32 @ashr() nounwind ssp { +entry: +; ARM: ashr +; ARM: asr r0, r0, #2 + %ashr = ashr i32 -1, 2 + ret i32 %ashr +} + +define i32 @ashr_reg(i32 %src1, i32 %src2) nounwind ssp { +entry: +; ARM: ashr_reg +; ARM: asr r0, r0, r1 + %ashr = ashr i32 %src1, %src2 + ret i32 %ashr +} + diff --git a/test/CodeGen/ARM/fcopysign.ll b/test/CodeGen/ARM/fcopysign.ll index 27fa2b0..5511d24 100644 --- a/test/CodeGen/ARM/fcopysign.ll +++ b/test/CodeGen/ARM/fcopysign.ll @@ -11,7 +11,7 @@ entry: ; HARD: test1: ; HARD: vmov.i32 [[REG1:(d[0-9]+)]], #0x80000000 ; HARD: vbsl [[REG1]], d - %0 = tail call float @copysignf(float %x, float %y) nounwind + %0 = tail call float @copysignf(float %x, float %y) nounwind readnone ret float %0 } @@ -25,7 +25,7 @@ entry: ; HARD: vmov.i32 [[REG2:(d[0-9]+)]], #0x80000000 ; HARD: vshl.i64 [[REG2]], [[REG2]], #32 ; HARD: vbsl [[REG2]], d1, d0 - %0 = tail call double @copysign(double %x, double %y) nounwind + %0 = tail call double @copysign(double %x, double %y) nounwind readnone ret double %0 } @@ -36,7 +36,7 @@ entry: ; SOFT: vshl.i64 [[REG3]], [[REG3]], #32 ; SOFT: vbsl [[REG3]], %0 = fmul double %x, %y - %1 = tail call double @copysign(double %0, double %z) nounwind + %1 = tail call double @copysign(double %0, double %z) nounwind readnone ret double %1 } diff --git a/test/CodeGen/ARM/floorf.ll b/test/CodeGen/ARM/floorf.ll new file mode 100644 index 0000000..492fc36 --- /dev/null +++ b/test/CodeGen/ARM/floorf.ll @@ -0,0 +1,29 @@ +; RUN: llc -mtriple=arm-unknown-unknown < %s | FileCheck %s + +; CHECK: test1 +define float @test1() nounwind uwtable readnone ssp { +; CHECK-NOT: floorf + %foo = call float @floorf(float 0x4000CCCCC0000000) nounwind readnone + ret float %foo +} + +; CHECK: test2 +define float @test2() nounwind uwtable readnone ssp { +; CHECK-NOT: ceilf + %foo = call float @ceilf(float 0x4000CCCCC0000000) nounwind readnone + ret float %foo +} + +; CHECK: test3 +define float @test3() nounwind uwtable readnone ssp { +; CHECK-NOT: truncf + %foo = call float @truncf(float 0x4000CCCCC0000000) nounwind readnone + ret float %foo +} + +declare float @floorf(float) nounwind readnone +declare float @ceilf(float) nounwind readnone +declare float @truncf(float) nounwind readnone + + + diff --git a/test/CodeGen/ARM/fp16.ll b/test/CodeGen/ARM/fp16.ll index c5583b9..1261ea5 100644 --- a/test/CodeGen/ARM/fp16.ll +++ b/test/CodeGen/ARM/fp16.ll @@ -15,14 +15,14 @@ entry: %1 = load i16* @y, align 2 %2 = tail call float @llvm.convert.from.fp16(i16 %0) ; CHECK: __gnu_h2f_ieee -; CHECK-FP16: vcvtb.f16.f32 +; CHECK-FP16: vcvtb.f32.f16 %3 = tail call float @llvm.convert.from.fp16(i16 %1) ; CHECK: __gnu_h2f_ieee -; CHECK-FP16: vcvtb.f16.f32 +; CHECK-FP16: vcvtb.f32.f16 %4 = fadd float %2, %3 %5 = tail call i16 @llvm.convert.to.fp16(float %4) ; CHECK: __gnu_f2h_ieee -; CHECK-FP16: vcvtb.f32.f16 +; CHECK-FP16: vcvtb.f16.f32 store i16 %5, i16* @x, align 2 ret void } diff --git a/test/CodeGen/ARM/fparith.ll b/test/CodeGen/ARM/fparith.ll index ce6d6b2..40ea33b 100644 --- a/test/CodeGen/ARM/fparith.ll +++ b/test/CodeGen/ARM/fparith.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s +; RUN: llc < %s -mtriple=arm-apple-ios -mattr=+vfp2 | FileCheck %s define float @f1(float %a, float %b) { ;CHECK: f1: @@ -84,7 +84,7 @@ define float @f11(float %a) { ;CHECK: f11: ;CHECK: bic entry: - %tmp1 = call float @fabsf( float %a ) ; <float> [#uses=1] + %tmp1 = call float @fabsf( float %a ) readnone ; <float> [#uses=1] ret float %tmp1 } @@ -94,7 +94,7 @@ define double @f12(double %a) { ;CHECK: f12: ;CHECK: vabs.f64 entry: - %tmp1 = call double @fabs( double %a ) ; <double> [#uses=1] + %tmp1 = call double @fabs( double %a ) readnone ; <double> [#uses=1] ret double %tmp1 } diff --git a/test/CodeGen/ARM/select.ll b/test/CodeGen/ARM/select.ll index 418d4f3..5575566 100644 --- a/test/CodeGen/ARM/select.ll +++ b/test/CodeGen/ARM/select.ll @@ -76,12 +76,11 @@ define double @f7(double %a, double %b) { ; block generated, odds are good that we have close to the ideal code for this: ; ; CHECK-NEON: _f8: +; CHECK-NEON: movw [[R3:r[0-9]+]], #1123 ; CHECK-NEON: adr [[R2:r[0-9]+]], LCPI7_0 -; CHECK-NEON-NEXT: movw [[R3:r[0-9]+]], #1123 -; CHECK-NEON-NEXT: adds {{r.*}}, [[R2]], #4 ; CHECK-NEON-NEXT: cmp r0, [[R3]] -; CHECK-NEON-NEXT: it ne -; CHECK-NEON-NEXT: movne {{r.*}}, [[R2]] +; CHECK-NEON-NEXT: it eq +; CHECK-NEON-NEXT: addeq.w {{r.*}}, [[R2]] ; CHECK-NEON-NEXT: ldr ; CHECK-NEON: bx diff --git a/test/CodeGen/ARM/select_xform.ll b/test/CodeGen/ARM/select_xform.ll index ca2e18a..cfc0e70 100644 --- a/test/CodeGen/ARM/select_xform.ll +++ b/test/CodeGen/ARM/select_xform.ll @@ -4,13 +4,13 @@ define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind { ; ARM: t1: -; ARM: sub r0, r1, #-2147483647 -; ARM: movgt r0, r1 +; ARM: suble r1, r1, #-2147483647 +; ARM: mov r0, r1 ; T2: t1: ; T2: mvn r0, #-2147483648 -; T2: add r0, r1 -; T2: movgt r0, r1 +; T2: addle.w r1, r1 +; T2: mov r0, r1 %tmp1 = icmp sgt i32 %c, 10 %tmp2 = select i1 %tmp1, i32 0, i32 2147483647 %tmp3 = add i32 %tmp2, %b @@ -19,12 +19,12 @@ define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind { define i32 @t2(i32 %a, i32 %b, i32 %c, i32 %d) nounwind { ; ARM: t2: -; ARM: sub r0, r1, #10 -; ARM: movgt r0, r1 +; ARM: suble r1, r1, #10 +; ARM: mov r0, r1 ; T2: t2: -; T2: sub.w r0, r1, #10 -; T2: movgt r0, r1 +; T2: suble.w r1, r1, #10 +; T2: mov r0, r1 %tmp1 = icmp sgt i32 %c, 10 %tmp2 = select i1 %tmp1, i32 0, i32 10 %tmp3 = sub i32 %b, %tmp2 @@ -33,12 +33,12 @@ define i32 @t2(i32 %a, i32 %b, i32 %c, i32 %d) nounwind { define i32 @t3(i32 %a, i32 %b, i32 %x, i32 %y) nounwind { ; ARM: t3: -; ARM: mvnlt r2, #0 -; ARM: and r0, r2, r3 +; ARM: andge r3, r3, r2 +; ARM: mov r0, r3 ; T2: t3: -; T2: movlt.w r2, #-1 -; T2: and.w r0, r2, r3 +; T2: andge.w r3, r3, r2 +; T2: mov r0, r3 %cond = icmp slt i32 %a, %b %z = select i1 %cond, i32 -1, i32 %x %s = and i32 %z, %y @@ -47,12 +47,12 @@ define i32 @t3(i32 %a, i32 %b, i32 %x, i32 %y) nounwind { define i32 @t4(i32 %a, i32 %b, i32 %x, i32 %y) nounwind { ; ARM: t4: -; ARM: movlt r2, #0 -; ARM: orr r0, r2, r3 +; ARM: orrge r3, r3, r2 +; ARM: mov r0, r3 ; T2: t4: -; T2: movlt r2, #0 -; T2: orr.w r0, r2, r3 +; T2: orrge.w r3, r3, r2 +; T2: mov r0, r3 %cond = icmp slt i32 %a, %b %z = select i1 %cond, i32 0, i32 %x %s = or i32 %z, %y @@ -104,3 +104,121 @@ entry: ret i32 %tmp3 } +; Fold ORRri into movcc. +define i32 @t8(i32 %a, i32 %b) nounwind { +; ARM: t8: +; ARM: cmp r0, r1 +; ARM: orrge r0, r1, #1 + +; T2: t8: +; T2: cmp r0, r1 +; T2: orrge r0, r1, #1 + %x = or i32 %b, 1 + %cond = icmp slt i32 %a, %b + %tmp1 = select i1 %cond, i32 %a, i32 %x + ret i32 %tmp1 +} + +; Fold ANDrr into movcc. +define i32 @t9(i32 %a, i32 %b, i32 %c) nounwind { +; ARM: t9: +; ARM: cmp r0, r1 +; ARM: andge r0, r1, r2 + +; T2: t9: +; T2: cmp r0, r1 +; T2: andge.w r0, r1, r2 + %x = and i32 %b, %c + %cond = icmp slt i32 %a, %b + %tmp1 = select i1 %cond, i32 %a, i32 %x + ret i32 %tmp1 +} + +; Fold EORrs into movcc. +define i32 @t10(i32 %a, i32 %b, i32 %c, i32 %d) nounwind { +; ARM: t10: +; ARM: cmp r0, r1 +; ARM: eorge r0, r1, r2, lsl #7 + +; T2: t10: +; T2: cmp r0, r1 +; T2: eorge.w r0, r1, r2, lsl #7 + %s = shl i32 %c, 7 + %x = xor i32 %b, %s + %cond = icmp slt i32 %a, %b + %tmp1 = select i1 %cond, i32 %a, i32 %x + ret i32 %tmp1 +} + +; Fold ORRri into movcc, reversing the condition. +define i32 @t11(i32 %a, i32 %b) nounwind { +; ARM: t11: +; ARM: cmp r0, r1 +; ARM: orrlt r0, r1, #1 + +; T2: t11: +; T2: cmp r0, r1 +; T2: orrlt r0, r1, #1 + %x = or i32 %b, 1 + %cond = icmp slt i32 %a, %b + %tmp1 = select i1 %cond, i32 %x, i32 %a + ret i32 %tmp1 +} + +; Fold ADDri12 into movcc +define i32 @t12(i32 %a, i32 %b) nounwind { +; ARM: t12: +; ARM: cmp r0, r1 +; ARM: addge r0, r1, + +; T2: t12: +; T2: cmp r0, r1 +; T2: addwge r0, r1, #3000 + %x = add i32 %b, 3000 + %cond = icmp slt i32 %a, %b + %tmp1 = select i1 %cond, i32 %a, i32 %x + ret i32 %tmp1 +} + +; Handle frame index operands. +define void @pr13628() nounwind uwtable align 2 { + %x3 = alloca i8, i32 256, align 8 + %x4 = load i8* undef, align 1 + %x5 = icmp ne i8 %x4, 0 + %x6 = select i1 %x5, i8* %x3, i8* null + call void @bar(i8* %x6) nounwind + ret void +} +declare void @bar(i8*) + +; Fold zext i1 into predicated add +define i32 @t13(i32 %c, i32 %a) nounwind readnone ssp { +entry: +; ARM: t13 +; ARM: cmp r1, #10 +; ARM: addgt r0, r0, #1 + +; T2: t13 +; T2: cmp r1, #10 +; T2: addgt.w r0, r0, #1 + %cmp = icmp sgt i32 %a, 10 + %conv = zext i1 %cmp to i32 + %add = add i32 %conv, %c + ret i32 %add +} + +; Fold sext i1 into predicated sub +define i32 @t14(i32 %c, i32 %a) nounwind readnone ssp { +entry: +; ARM: t14 +; ARM: cmp r1, #10 +; ARM: subgt r0, r0, #1 + +; T2: t14 +; T2: cmp r1, #10 +; T2: subgt.w r0, r0, #1 + %cmp = icmp sgt i32 %a, 10 + %conv = sext i1 %cmp to i32 + %add = add i32 %conv, %c + ret i32 %add +} diff --git a/test/CodeGen/ARM/unaligned_load_store.ll b/test/CodeGen/ARM/unaligned_load_store.ll index a8237c6..869b926 100644 --- a/test/CodeGen/ARM/unaligned_load_store.ll +++ b/test/CodeGen/ARM/unaligned_load_store.ll @@ -1,25 +1,25 @@ -; RUN: llc < %s -march=arm -pre-RA-sched=source | FileCheck %s -check-prefix=GENERIC -; RUN: llc < %s -mtriple=armv6-apple-darwin | FileCheck %s -check-prefix=DARWIN_V6 -; RUN: llc < %s -mtriple=armv6-apple-darwin -arm-strict-align | FileCheck %s -check-prefix=GENERIC -; RUN: llc < %s -mtriple=armv6-linux | FileCheck %s -check-prefix=GENERIC +; RUN: llc < %s -march=arm -pre-RA-sched=source | FileCheck %s -check-prefix=EXPANDED +; RUN: llc < %s -mtriple=armv6-apple-darwin -mcpu=cortex-a8 -arm-strict-align -pre-RA-sched=source | FileCheck %s -check-prefix=EXPANDED +; RUN: llc < %s -mtriple=armv6-apple-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=UNALIGNED ; rdar://7113725 +; rdar://12091029 define void @t(i8* nocapture %a, i8* nocapture %b) nounwind { entry: -; GENERIC: t: -; GENERIC: ldrb [[R2:r[0-9]+]] -; GENERIC: ldrb [[R3:r[0-9]+]] -; GENERIC: ldrb [[R12:r[0-9]+]] -; GENERIC: ldrb [[R1:r[0-9]+]] -; GENERIC: strb [[R1]] -; GENERIC: strb [[R12]] -; GENERIC: strb [[R3]] -; GENERIC: strb [[R2]] - -; DARWIN_V6: t: -; DARWIN_V6: ldr r1 -; DARWIN_V6: str r1 +; EXPANDED: t: +; EXPANDED: ldrb [[R2:r[0-9]+]] +; EXPANDED: ldrb [[R3:r[0-9]+]] +; EXPANDED: ldrb [[R12:r[0-9]+]] +; EXPANDED: ldrb [[R1:r[0-9]+]] +; EXPANDED: strb [[R1]] +; EXPANDED: strb [[R12]] +; EXPANDED: strb [[R3]] +; EXPANDED: strb [[R2]] + +; UNALIGNED: t: +; UNALIGNED: ldr r1 +; UNALIGNED: str r1 %__src1.i = bitcast i8* %b to i32* ; <i32*> [#uses=1] %__dest2.i = bitcast i8* %a to i32* ; <i32*> [#uses=1] @@ -27,3 +27,35 @@ entry: store i32 %tmp.i, i32* %__dest2.i, align 1 ret void } + +define void @hword(double* %a, double* %b) nounwind { +entry: +; EXPANDED: hword: +; EXPANDED-NOT: vld1 +; EXPANDED: ldrh +; EXPANDED-NOT: str1 +; EXPANDED: strh + +; UNALIGNED: hword: +; UNALIGNED: vld1.16 +; UNALIGNED: vst1.16 + %tmp = load double* %a, align 2 + store double %tmp, double* %b, align 2 + ret void +} + +define void @byte(double* %a, double* %b) nounwind { +entry: +; EXPANDED: byte: +; EXPANDED-NOT: vld1 +; EXPANDED: ldrb +; EXPANDED-NOT: str1 +; EXPANDED: strb + +; UNALIGNED: byte: +; UNALIGNED: vld1.8 +; UNALIGNED: vst1.8 + %tmp = load double* %a, align 1 + store double %tmp, double* %b, align 1 + ret void +} diff --git a/test/CodeGen/ARM/vfp.ll b/test/CodeGen/ARM/vfp.ll index 49a6982..7a4b34f 100644 --- a/test/CodeGen/ARM/vfp.ll +++ b/test/CodeGen/ARM/vfp.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=arm -mattr=+vfp2 -disable-post-ra | FileCheck %s -; RUN: llc < %s -march=arm -mattr=+vfp2 -disable-post-ra -regalloc=basic | FileCheck %s +; RUN: llc < %s -mtriple=arm-apple-ios -mattr=+vfp2 -disable-post-ra | FileCheck %s +; RUN: llc < %s -mtriple=arm-apple-ios -mattr=+vfp2 -disable-post-ra -regalloc=basic | FileCheck %s define void @test(float* %P, double* %D) { %A = load float* %P ; <float> [#uses=1] @@ -17,11 +17,11 @@ define void @test_abs(float* %P, double* %D) { ;CHECK: test_abs: %a = load float* %P ; <float> [#uses=1] ;CHECK: vabs.f32 - %b = call float @fabsf( float %a ) ; <float> [#uses=1] + %b = call float @fabsf( float %a ) readnone ; <float> [#uses=1] store float %b, float* %P %A = load double* %D ; <double> [#uses=1] ;CHECK: vabs.f64 - %B = call double @fabs( double %A ) ; <double> [#uses=1] + %B = call double @fabs( double %A ) readnone ; <double> [#uses=1] store double %B, double* %D ret void } diff --git a/test/CodeGen/CellSPU/fcmp32.ll b/test/CodeGen/CellSPU/fcmp32.ll index c14fd7b..f6b028d 100644 --- a/test/CodeGen/CellSPU/fcmp32.ll +++ b/test/CodeGen/CellSPU/fcmp32.ll @@ -1,4 +1,4 @@ -; RUN: llc --march=cellspu %s -o - | FileCheck %s +; RUN: llc --mtriple=cellspu-unknown-elf %s -o - | FileCheck %s ; Exercise the floating point comparison operators for f32: @@ -15,8 +15,8 @@ define i1 @fcmp_eq(float %arg1, float %arg2) { define i1 @fcmp_mag_eq(float %arg1, float %arg2) { ; CHECK: fcmeq ; CHECK: bi $lr - %1 = call float @fabsf(float %arg1) - %2 = call float @fabsf(float %arg2) + %1 = call float @fabsf(float %arg1) readnone + %2 = call float @fabsf(float %arg2) readnone %3 = fcmp oeq float %1, %2 ret i1 %3 } diff --git a/test/CodeGen/CellSPU/fneg-fabs.ll b/test/CodeGen/CellSPU/fneg-fabs.ll index 1e5e3b3..6e01906 100644 --- a/test/CodeGen/CellSPU/fneg-fabs.ll +++ b/test/CodeGen/CellSPU/fneg-fabs.ll @@ -32,11 +32,11 @@ declare double @fabs(double) declare float @fabsf(float) define double @fabs_dp(double %X) { - %Y = call double @fabs( double %X ) + %Y = call double @fabs( double %X ) readnone ret double %Y } define float @fabs_sp(float %X) { - %Y = call float @fabsf( float %X ) + %Y = call float @fabsf( float %X ) readnone ret float %Y } diff --git a/test/CodeGen/Generic/2009-06-03-UnreachableSplitPad.ll b/test/CodeGen/Generic/2009-06-03-UnreachableSplitPad.ll deleted file mode 100644 index ad418f7..0000000 --- a/test/CodeGen/Generic/2009-06-03-UnreachableSplitPad.ll +++ /dev/null @@ -1,19 +0,0 @@ -; RUN: llc < %s -; PR4317 - -declare i32 @b() - -define void @a() { -entry: - ret void - -dummy: - invoke i32 @b() to label %reg unwind label %reg - -reg: - %lpad = landingpad { i8*, i32 } personality i32 (...)* @__gxx_personality_v0 - catch i8* null - ret void -} - -declare i32 @__gxx_personality_v0(...) diff --git a/test/CodeGen/Generic/donothing.ll b/test/CodeGen/Generic/donothing.ll index d6ba138..3727b60 100644 --- a/test/CodeGen/Generic/donothing.ll +++ b/test/CodeGen/Generic/donothing.ll @@ -7,7 +7,7 @@ declare void @llvm.donothing() readnone ; CHECK: f1 define void @f1() nounwind uwtable ssp { entry: -; CHECK-NOT donothing +; CHECK-NOT: donothing invoke void @llvm.donothing() to label %invoke.cont unwind label %lpad @@ -25,7 +25,7 @@ lpad: ; CHECK: f2 define void @f2() nounwind { entry: -; CHECK-NOT donothing +; CHECK-NOT: donothing call void @llvm.donothing() ret void } diff --git a/test/CodeGen/Hexagon/opt-fabs.ll b/test/CodeGen/Hexagon/opt-fabs.ll index 1cf0dd0..31b56fd 100644 --- a/test/CodeGen/Hexagon/opt-fabs.ll +++ b/test/CodeGen/Hexagon/opt-fabs.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s +; RUN: llc -mtriple=hexagon-unknown-elf -mcpu=hexagonv5 < %s | FileCheck %s ; Optimize fabsf to clrbit in V5. ; CHECK: r{{[0-9]+}} = clrbit(r{{[0-9]+}}, #31) @@ -8,7 +8,7 @@ entry: %x.addr = alloca float, align 4 store float %x, float* %x.addr, align 4 %0 = load float* %x.addr, align 4 - %call = call float @fabsf(float %0) + %call = call float @fabsf(float %0) readnone ret float %call } diff --git a/test/CodeGen/Hexagon/simpletailcall.ll b/test/CodeGen/Hexagon/simpletailcall.ll new file mode 100644 index 0000000..2876404 --- /dev/null +++ b/test/CodeGen/Hexagon/simpletailcall.ll @@ -0,0 +1,14 @@ +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; CHECK: foo_empty +; CHECK-NOT: allocframe +; CHECK-NOT: memd(r29 +; CHECK: jump bar_empty + +define void @foo_empty(i32 %h) nounwind { +entry: + %add = add nsw i32 %h, 3 + %call = tail call i32 bitcast (i32 (...)* @bar_empty to i32 (i32)*)(i32 %add) nounwind + ret void +} + +declare i32 @bar_empty(...) diff --git a/test/CodeGen/MSP430/Inst8rr.ll b/test/CodeGen/MSP430/Inst8rr.ll index 45342e2..b9c17d9 100644 --- a/test/CodeGen/MSP430/Inst8rr.ll +++ b/test/CodeGen/MSP430/Inst8rr.ll @@ -4,7 +4,7 @@ target triple = "msp430-generic-generic" define i8 @mov(i8 %a, i8 %b) nounwind { ; CHECK: mov: -; CHECK: mov.b r14, r15 +; CHECK: mov.{{[bw]}} r14, r15 ret i8 %b } diff --git a/test/CodeGen/Mips/alloca.ll b/test/CodeGen/Mips/alloca.ll index 14288de..29f43c8 100644 --- a/test/CodeGen/Mips/alloca.ll +++ b/test/CodeGen/Mips/alloca.ll @@ -4,14 +4,10 @@ define i32 @twoalloca(i32 %size) nounwind { entry: ; CHECK: subu $[[T0:[0-9]+]], $sp, $[[SZ:[0-9]+]] ; CHECK: addu $sp, $zero, $[[T0]] -; CHECK: addiu $[[T1:[0-9]+]], $sp, [[OFF:[0-9]+]] ; CHECK: subu $[[T2:[0-9]+]], $sp, $[[SZ]] ; CHECK: addu $sp, $zero, $[[T2]] -; CHECK: addiu $[[T3:[0-9]+]], $sp, [[OFF]] -; CHECK: lw $[[T4:[0-9]+]], %call16(foo) -; CHECK: addu $25, $zero, $[[T4]] -; CHECK: addu $4, $zero, $[[T1]] -; CHECK: jalr $25 +; CHECK: addu $4, $zero, $[[T0]] +; CHECK: addu $4, $zero, $[[T2]] %tmp1 = alloca i8, i32 %size, align 4 %add.ptr = getelementptr inbounds i8* %tmp1, i32 5 store i8 97, i8* %add.ptr, align 1 @@ -34,7 +30,6 @@ entry: ; CHECK: alloca2 ; CHECK: subu $[[T0:[0-9]+]], $sp ; CHECK: addu $sp, $zero, $[[T0]] -; CHECK: addiu $[[T1:[0-9]+]], $sp %tmp1 = alloca i8, i32 %size, align 4 %0 = bitcast i8* %tmp1 to i32* @@ -42,7 +37,7 @@ entry: br i1 %cmp, label %if.then, label %if.else if.then: ; preds = %entry -; CHECK: addiu $4, $[[T1]], 40 +; CHECK: addiu $4, $[[T0]], 40 %add.ptr = getelementptr inbounds i8* %tmp1, i32 40 %1 = bitcast i8* %add.ptr to i32* @@ -52,7 +47,7 @@ if.then: ; preds = %entry br label %if.end if.else: ; preds = %entry -; CHECK: addiu $4, $[[T1]], 12 +; CHECK: addiu $4, $[[T0]], 12 %add.ptr5 = getelementptr inbounds i8* %tmp1, i32 12 %2 = bitcast i8* %add.ptr5 to i32* @@ -60,7 +55,7 @@ if.else: ; preds = %entry br label %if.end if.end: ; preds = %if.else, %if.then -; CHECK: lw $5, 0($[[T1]]) +; CHECK: lw $5, 0($[[T0]]) ; CHECK: lw $25, %call16(printf) %.pre-phi = phi i32* [ %2, %if.else ], [ %.pre, %if.then ] diff --git a/test/CodeGen/Mips/and1.ll b/test/CodeGen/Mips/and1.ll new file mode 100644 index 0000000..4ff1204 --- /dev/null +++ b/test/CodeGen/Mips/and1.ll @@ -0,0 +1,17 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@x = global i32 65504, align 4 +@y = global i32 60929, align 4 +@.str = private unnamed_addr constant [7 x i8] c"%08x \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @x, align 4 + %1 = load i32* @y, align 4 + %and = and i32 %0, %1 +; 16: and ${{[0-9]+}}, ${{[0-9]+}} + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), i32 %and) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/fabs.ll b/test/CodeGen/Mips/fabs.ll index b296ab3..49d8a72 100644 --- a/test/CodeGen/Mips/fabs.ll +++ b/test/CodeGen/Mips/fabs.ll @@ -1,8 +1,8 @@ -; RUN: llc < %s -march=mipsel -mcpu=mips32 | FileCheck %s -check-prefix=32 -; RUN: llc < %s -march=mipsel -mcpu=mips32r2 | FileCheck %s -check-prefix=32R2 -; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=n64 | FileCheck %s -check-prefix=64 -; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -mattr=n64 | FileCheck %s -check-prefix=64R2 -; RUN: llc < %s -march=mipsel -mcpu=mips32 -enable-no-nans-fp-math | FileCheck %s -check-prefix=NO-NAN +; RUN: llc < %s -mtriple=mipsel-linux-gnu -mcpu=mips32 | FileCheck %s -check-prefix=32 +; RUN: llc < %s -mtriple=mipsel-linux-gnu -mcpu=mips32r2 | FileCheck %s -check-prefix=32R2 +; RUN: llc < %s -mtriple=mips64el-linux-gnu -mcpu=mips64 -mattr=n64 | FileCheck %s -check-prefix=64 +; RUN: llc < %s -mtriple=mips64el-linux-gnu -mcpu=mips64r2 -mattr=n64 | FileCheck %s -check-prefix=64R2 +; RUN: llc < %s -mtriple=mipsel-linux-gnu -mcpu=mips32 -enable-no-nans-fp-math | FileCheck %s -check-prefix=NO-NAN define float @foo0(float %a) nounwind readnone { entry: diff --git a/test/CodeGen/Mips/fp-indexed-ls.ll b/test/CodeGen/Mips/fp-indexed-ls.ll index 08bd6e7..1c4a3fd 100644 --- a/test/CodeGen/Mips/fp-indexed-ls.ll +++ b/test/CodeGen/Mips/fp-indexed-ls.ll @@ -28,7 +28,7 @@ entry: define float @foo2(i32 %b, i32 %c) nounwind readonly { entry: -; CHECK: luxc1 +; CHECK-NOT: luxc1 %arrayidx1 = getelementptr inbounds [4 x %struct.S]* @s, i32 0, i32 %b, i32 0, i32 %c %0 = load float* %arrayidx1, align 1 ret float %0 @@ -54,7 +54,7 @@ entry: define void @foo5(i32 %b, i32 %c) nounwind { entry: -; CHECK: suxc1 +; CHECK-NOT: suxc1 %0 = load float* @gf, align 4 %arrayidx1 = getelementptr inbounds [4 x %struct.S]* @s, i32 0, i32 %b, i32 0, i32 %c store float %0, float* %arrayidx1, align 1 @@ -64,7 +64,7 @@ entry: define double @foo6(i32 %b, i32 %c) nounwind readonly { entry: ; CHECK: foo6 -; CHECK-NOT: ldxc1 +; CHECK-NOT: luxc1 %arrayidx1 = getelementptr inbounds [4 x %struct.S2]* @s2, i32 0, i32 %b, i32 0, i32 %c %0 = load double* %arrayidx1, align 1 ret double %0 @@ -73,7 +73,7 @@ entry: define void @foo7(i32 %b, i32 %c) nounwind { entry: ; CHECK: foo7 -; CHECK-NOT: sdxc1 +; CHECK-NOT: suxc1 %0 = load double* @gd, align 8 %arrayidx1 = getelementptr inbounds [4 x %struct.S2]* @s2, i32 0, i32 %b, i32 0, i32 %c store double %0, double* %arrayidx1, align 1 @@ -83,7 +83,7 @@ entry: define float @foo8() nounwind readonly { entry: ; CHECK: foo8 -; CHECK: luxc1 +; CHECK-NOT: luxc1 %0 = load float* getelementptr inbounds (%struct.S3* @s3, i32 0, i32 1), align 1 ret float %0 } @@ -91,7 +91,7 @@ entry: define void @foo9(float %f) nounwind { entry: ; CHECK: foo9 -; CHECK: suxc1 +; CHECK-NOT: suxc1 store float %f, float* getelementptr inbounds (%struct.S3* @s3, i32 0, i32 1), align 1 ret void } diff --git a/test/CodeGen/Mips/helloworld.ll b/test/CodeGen/Mips/helloworld.ll new file mode 100644 index 0000000..bee93ac --- /dev/null +++ b/test/CodeGen/Mips/helloworld.ll @@ -0,0 +1,34 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=C1 +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=C2 +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=PE +; +; re-enable this when mips16's jalr is fixed. +; DISABLED: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=SR + + +@.str = private unnamed_addr constant [13 x i8] c"hello world\0A\00", align 1 + +define i32 @main() nounwind { +entry: + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([13 x i8]* @.str, i32 0, i32 0)) + ret i32 0 + +; SR: .set mips16 # @main + +; SR: save $ra, [[FS:[0-9]+]] +; PE: li $[[T1:[0-9]+]], %hi(_gp_disp) +; PE: addiu $[[T2:[0-9]+]], $pc, %lo(_gp_disp) +; PE: sll $[[T3:[0-9]+]], $[[T1]], 16 +; C1: lw ${{[0-9]+}}, %got($.str)(${{[0-9]+}}) +; C2: lw ${{[0-9]+}}, %call16(printf)(${{[0-9]+}}) +; C1: addiu ${{[0-9]+}}, %lo($.str) +; C2: move $25, ${{[0-9]+}} +; C1: move $gp, ${{[0-9]+}} +; C1: jalr ${{[0-9]+}} +; SR: restore $ra, [[FS]] +; PE: li $2, 0 +; PE: jr $ra + +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/helloworld_pe.ll b/test/CodeGen/Mips/helloworld_pe.ll deleted file mode 100644 index ba46662..0000000 --- a/test/CodeGen/Mips/helloworld_pe.ll +++ /dev/null @@ -1,18 +0,0 @@ -; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 - -@.str = private unnamed_addr constant [13 x i8] c"hello world\0A\00", align 1 - -define i32 @main() nounwind { -entry: - %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([13 x i8]* @.str, i32 0, i32 0)) - ret i32 0 - -; 16: .set mips16 # @main - -; 16: li $[[T1:[0-9]+]], %hi(_gp_disp) -; 16: addiu $[[T2:[0-9]+]], $pc, %lo(_gp_disp) -; 16: sll $[[T3:[0-9]+]], $[[T1]], 16 -; 16: li $2, 0 -} - -declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/i64arg.ll b/test/CodeGen/Mips/i64arg.ll index e33021f..8b1f71b 100644 --- a/test/CodeGen/Mips/i64arg.ll +++ b/test/CodeGen/Mips/i64arg.ll @@ -10,8 +10,8 @@ entry: ; CHECK: jalr tail call void @ff1(i32 %i, i64 1085102592623924856) nounwind ; CHECK: lw $25, %call16(ff2) -; CHECK: lw $[[R2:[0-9]+]], 88($sp) -; CHECK: lw $[[R3:[0-9]+]], 92($sp) +; CHECK: lw $[[R2:[0-9]+]], 80($sp) +; CHECK: lw $[[R3:[0-9]+]], 84($sp) ; CHECK: addu $4, $zero, $[[R2]] ; CHECK: addu $5, $zero, $[[R3]] ; CHECK: jalr $25 diff --git a/test/CodeGen/Mips/largeimmprinting.ll b/test/CodeGen/Mips/largeimmprinting.ll index c81cc76..2e548790 100644 --- a/test/CodeGen/Mips/largeimmprinting.ll +++ b/test/CodeGen/Mips/largeimmprinting.ll @@ -6,8 +6,8 @@ define void @f() nounwind { entry: -; CHECK: lui $at, 65534 -; CHECK: addiu $at, $at, -24 +; CHECK: lui $at, 65535 +; CHECK: addiu $at, $at, -16 ; CHECK: addu $sp, $sp, $at %agg.tmp = alloca %struct.S1, align 1 diff --git a/test/CodeGen/Mips/lb1.ll b/test/CodeGen/Mips/lb1.ll new file mode 100644 index 0000000..aac2767 --- /dev/null +++ b/test/CodeGen/Mips/lb1.ll @@ -0,0 +1,18 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@c = global i8 -1, align 1 +@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %i = alloca i32, align 4 + %0 = load i8* @c, align 1 +; 16: lb ${{[0-9]+}}, 0(${{[0-9]+}}) + %conv = sext i8 %0 to i32 + store i32 %conv, i32* %i, align 4 + %1 = load i32* %i, align 4 + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %1) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/lbu1.ll b/test/CodeGen/Mips/lbu1.ll new file mode 100644 index 0000000..63e0cca --- /dev/null +++ b/test/CodeGen/Mips/lbu1.ll @@ -0,0 +1,19 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@c = global i8 97, align 1 +@.str = private unnamed_addr constant [5 x i8] c"%c \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %i = alloca i32, align 4 + %0 = load i8* @c, align 1 + %conv = zext i8 %0 to i32 +; 16: lbu ${{[0-9]+}}, 0(${{[0-9]+}}) + store i32 %conv, i32* %i, align 4 + %1 = load i8* @c, align 1 + %conv1 = zext i8 %1 to i32 + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %conv1) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/lh1.ll b/test/CodeGen/Mips/lh1.ll new file mode 100644 index 0000000..1f95b09 --- /dev/null +++ b/test/CodeGen/Mips/lh1.ll @@ -0,0 +1,18 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@s = global i16 -1, align 2 +@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %i = alloca i32, align 4 + %0 = load i16* @s, align 2 + %conv = sext i16 %0 to i32 +; 16: lh ${{[0-9]+}}, 0(${{[0-9]+}}) + store i32 %conv, i32* %i, align 4 + %1 = load i32* %i, align 4 + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %1) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/lhu1.ll b/test/CodeGen/Mips/lhu1.ll new file mode 100644 index 0000000..0cfcede --- /dev/null +++ b/test/CodeGen/Mips/lhu1.ll @@ -0,0 +1,19 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + + +@s = global i16 255, align 2 +@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %i = alloca i32, align 4 + %0 = load i16* @s, align 2 + %conv = zext i16 %0 to i32 +; 16: lhu ${{[0-9]+}}, 0(${{[0-9]+}}) + store i32 %conv, i32* %i, align 4 + %1 = load i32* %i, align 4 + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %1) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/mips64-fp-indexed-ls.ll b/test/CodeGen/Mips/mips64-fp-indexed-ls.ll index 09745fb..bbdc05c 100644 --- a/test/CodeGen/Mips/mips64-fp-indexed-ls.ll +++ b/test/CodeGen/Mips/mips64-fp-indexed-ls.ll @@ -30,7 +30,7 @@ entry: define float @foo2(i32 %b, i32 %c) nounwind readonly { entry: -; CHECK: luxc1 +; CHECK-NOT: luxc1 %idxprom = zext i32 %c to i64 %idxprom1 = zext i32 %b to i64 %arrayidx2 = getelementptr inbounds [4 x %struct.S]* @s, i64 0, i64 %idxprom1, i32 0, i64 %idxprom @@ -60,7 +60,7 @@ entry: define void @foo5(i32 %b, i32 %c) nounwind { entry: -; CHECK: suxc1 +; CHECK-NOT: suxc1 %0 = load float* @gf, align 4 %idxprom = zext i32 %c to i64 %idxprom1 = zext i32 %b to i64 @@ -72,7 +72,7 @@ entry: define double @foo6(i32 %b, i32 %c) nounwind readonly { entry: ; CHECK: foo6 -; CHECK-NOT: ldxc1 +; CHECK-NOT: luxc1 %idxprom = zext i32 %c to i64 %idxprom1 = zext i32 %b to i64 %arrayidx2 = getelementptr inbounds [4 x %struct.S2]* @s2, i64 0, i64 %idxprom1, i32 0, i64 %idxprom @@ -83,7 +83,7 @@ entry: define void @foo7(i32 %b, i32 %c) nounwind { entry: ; CHECK: foo7 -; CHECK-NOT: sdxc1 +; CHECK-NOT: suxc1 %0 = load double* @gd, align 8 %idxprom = zext i32 %c to i64 %idxprom1 = zext i32 %b to i64 @@ -95,7 +95,7 @@ entry: define float @foo8() nounwind readonly { entry: ; CHECK: foo8 -; CHECK: luxc1 +; CHECK-NOT: luxc1 %0 = load float* getelementptr inbounds (%struct.S3* @s3, i64 0, i32 1), align 1 ret float %0 } @@ -103,7 +103,7 @@ entry: define void @foo9(float %f) nounwind { entry: ; CHECK: foo9 -; CHECK: suxc1 +; CHECK-NOT: suxc1 store float %f, float* getelementptr inbounds (%struct.S3* @s3, i64 0, i32 1), align 1 ret void } diff --git a/test/CodeGen/Mips/helloworld_sr.ll b/test/CodeGen/Mips/neg1.ll index 641ee27..281e626 100644 --- a/test/CodeGen/Mips/helloworld_sr.ll +++ b/test/CodeGen/Mips/neg1.ll @@ -1,16 +1,15 @@ ; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 -@.str = private unnamed_addr constant [13 x i8] c"hello world\0A\00", align 1 +@i = global i32 10, align 4 +@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 define i32 @main() nounwind { entry: - %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([13 x i8]* @.str, i32 0, i32 0)) + %0 = load i32* @i, align 4 + %sub = sub nsw i32 0, %0 +; 16: neg ${{[0-9]+}}, ${{[0-9]+}} + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %sub) ret i32 0 - -; 16: .set mips16 # @main - -; 16: save $ra, [[FS:[0-9]+]] -; 16: restore $ra, [[FS]] } declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/not1.ll b/test/CodeGen/Mips/not1.ll new file mode 100644 index 0000000..2163b23 --- /dev/null +++ b/test/CodeGen/Mips/not1.ll @@ -0,0 +1,16 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@x = global i32 65504, align 4 +@y = global i32 60929, align 4 +@.str = private unnamed_addr constant [7 x i8] c"%08x \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @x, align 4 + %neg = xor i32 %0, -1 +; 16: not ${{[0-9]+}}, ${{[0-9]+}} + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), i32 %neg) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/o32_cc_byval.ll b/test/CodeGen/Mips/o32_cc_byval.ll index d5eac99..eac0d80 100644 --- a/test/CodeGen/Mips/o32_cc_byval.ll +++ b/test/CodeGen/Mips/o32_cc_byval.ll @@ -43,16 +43,16 @@ declare void @callee3(float, %struct.S3* byval, %struct.S1* byval) define void @f2(float %f, %struct.S1* nocapture byval %s1) nounwind { entry: -; CHECK: addiu $sp, $sp, -56 -; CHECK: sw $7, 68($sp) -; CHECK: sw $6, 64($sp) -; CHECK: lw $4, 88($sp) -; CHECK: ldc1 $f[[F0:[0-9]+]], 80($sp) -; CHECK: lw $[[R3:[0-9]+]], 72($sp) -; CHECK: lw $[[R4:[0-9]+]], 76($sp) -; CHECK: lw $[[R2:[0-9]+]], 68($sp) -; CHECK: lh $[[R1:[0-9]+]], 66($sp) -; CHECK: lb $[[R0:[0-9]+]], 64($sp) +; CHECK: addiu $sp, $sp, -48 +; CHECK: sw $7, 60($sp) +; CHECK: sw $6, 56($sp) +; CHECK: lw $4, 80($sp) +; CHECK: ldc1 $f[[F0:[0-9]+]], 72($sp) +; CHECK: lw $[[R3:[0-9]+]], 64($sp) +; CHECK: lw $[[R4:[0-9]+]], 68($sp) +; CHECK: lw $[[R2:[0-9]+]], 60($sp) +; CHECK: lh $[[R1:[0-9]+]], 58($sp) +; CHECK: lb $[[R0:[0-9]+]], 56($sp) ; CHECK: sw $[[R0]], 32($sp) ; CHECK: sw $[[R1]], 28($sp) ; CHECK: sw $[[R2]], 24($sp) @@ -80,13 +80,13 @@ declare void @callee4(i32, double, i64, i32, i16 signext, i8 signext, float) define void @f3(%struct.S2* nocapture byval %s2) nounwind { entry: -; CHECK: addiu $sp, $sp, -56 -; CHECK: sw $7, 68($sp) -; CHECK: sw $6, 64($sp) -; CHECK: sw $5, 60($sp) -; CHECK: sw $4, 56($sp) -; CHECK: lw $4, 56($sp) -; CHECK: lw $[[R0:[0-9]+]], 68($sp) +; CHECK: addiu $sp, $sp, -48 +; CHECK: sw $7, 60($sp) +; CHECK: sw $6, 56($sp) +; CHECK: sw $5, 52($sp) +; CHECK: sw $4, 48($sp) +; CHECK: lw $4, 48($sp) +; CHECK: lw $[[R0:[0-9]+]], 60($sp) ; CHECK: sw $[[R0]], 24($sp) %arrayidx = getelementptr inbounds %struct.S2* %s2, i32 0, i32 0, i32 0 @@ -99,13 +99,13 @@ entry: define void @f4(float %f, %struct.S3* nocapture byval %s3, %struct.S1* nocapture byval %s1) nounwind { entry: -; CHECK: addiu $sp, $sp, -56 -; CHECK: sw $7, 68($sp) -; CHECK: sw $6, 64($sp) -; CHECK: sw $5, 60($sp) -; CHECK: lw $4, 68($sp) -; CHECK: lw $[[R1:[0-9]+]], 88($sp) -; CHECK: lb $[[R0:[0-9]+]], 60($sp) +; CHECK: addiu $sp, $sp, -48 +; CHECK: sw $7, 60($sp) +; CHECK: sw $6, 56($sp) +; CHECK: sw $5, 52($sp) +; CHECK: lw $4, 60($sp) +; CHECK: lw $[[R1:[0-9]+]], 80($sp) +; CHECK: lb $[[R0:[0-9]+]], 52($sp) ; CHECK: sw $[[R0]], 32($sp) ; CHECK: sw $[[R1]], 24($sp) diff --git a/test/CodeGen/Mips/o32_cc_vararg.ll b/test/CodeGen/Mips/o32_cc_vararg.ll index 49d614c..35332b6 100644 --- a/test/CodeGen/Mips/o32_cc_vararg.ll +++ b/test/CodeGen/Mips/o32_cc_vararg.ll @@ -1,6 +1,5 @@ ; RUN: llc -march=mipsel -pre-RA-sched=source < %s | FileCheck %s - ; All test functions do the same thing - they return the first variable ; argument. @@ -29,11 +28,11 @@ entry: ret i32 %tmp ; CHECK: va1: -; CHECK: addiu $sp, $sp, -24 -; CHECK: sw $7, 36($sp) -; CHECK: sw $6, 32($sp) -; CHECK: sw $5, 28($sp) -; CHECK: lw $2, 28($sp) +; CHECK: addiu $sp, $sp, -16 +; CHECK: sw $7, 28($sp) +; CHECK: sw $6, 24($sp) +; CHECK: sw $5, 20($sp) +; CHECK: lw $2, 20($sp) } ; check whether the variable double argument will be accessed from the 8-byte @@ -55,11 +54,11 @@ entry: ret double %tmp ; CHECK: va2: -; CHECK: addiu $sp, $sp, -24 -; CHECK: sw $7, 36($sp) -; CHECK: sw $6, 32($sp) -; CHECK: sw $5, 28($sp) -; CHECK: addiu $[[R0:[0-9]+]], $sp, 28 +; CHECK: addiu $sp, $sp, -16 +; CHECK: sw $7, 28($sp) +; CHECK: sw $6, 24($sp) +; CHECK: sw $5, 20($sp) +; CHECK: addiu $[[R0:[0-9]+]], $sp, 20 ; CHECK: addiu $[[R1:[0-9]+]], $[[R0]], 7 ; CHECK: addiu $[[R2:[0-9]+]], $zero, -8 ; CHECK: and $[[R3:[0-9]+]], $[[R1]], $[[R2]] @@ -83,10 +82,10 @@ entry: ret i32 %tmp ; CHECK: va3: -; CHECK: addiu $sp, $sp, -24 -; CHECK: sw $7, 36($sp) -; CHECK: sw $6, 32($sp) -; CHECK: lw $2, 32($sp) +; CHECK: addiu $sp, $sp, -16 +; CHECK: sw $7, 28($sp) +; CHECK: sw $6, 24($sp) +; CHECK: lw $2, 24($sp) } ; double @@ -106,11 +105,11 @@ entry: ret double %tmp ; CHECK: va4: -; CHECK: addiu $sp, $sp, -32 -; CHECK: sw $7, 44($sp) -; CHECK: sw $6, 40($sp) -; CHECK: addiu ${{[0-9]+}}, $sp, 40 -; CHECK: ldc1 $f0, 40($sp) +; CHECK: addiu $sp, $sp, -24 +; CHECK: sw $7, 36($sp) +; CHECK: sw $6, 32($sp) +; CHECK: addiu ${{[0-9]+}}, $sp, 32 +; CHECK: ldc1 $f0, 32($sp) } ; int @@ -134,9 +133,9 @@ entry: ret i32 %tmp ; CHECK: va5: -; CHECK: addiu $sp, $sp, -32 -; CHECK: sw $7, 44($sp) -; CHECK: lw $2, 44($sp) +; CHECK: addiu $sp, $sp, -24 +; CHECK: sw $7, 36($sp) +; CHECK: lw $2, 36($sp) } ; double @@ -160,9 +159,9 @@ entry: ret double %tmp ; CHECK: va6: -; CHECK: addiu $sp, $sp, -32 -; CHECK: sw $7, 44($sp) -; CHECK: addiu $[[R0:[0-9]+]], $sp, 44 +; CHECK: addiu $sp, $sp, -24 +; CHECK: sw $7, 36($sp) +; CHECK: addiu $[[R0:[0-9]+]], $sp, 36 ; CHECK: addiu $[[R1:[0-9]+]], $[[R0]], 7 ; CHECK: addiu $[[R2:[0-9]+]], $zero, -8 ; CHECK: and $[[R3:[0-9]+]], $[[R1]], $[[R2]] @@ -188,8 +187,8 @@ entry: ret i32 %tmp ; CHECK: va7: -; CHECK: addiu $sp, $sp, -32 -; CHECK: lw $2, 48($sp) +; CHECK: addiu $sp, $sp, -24 +; CHECK: lw $2, 40($sp) } ; double @@ -211,9 +210,9 @@ entry: ret double %tmp ; CHECK: va8: -; CHECK: addiu $sp, $sp, -40 -; CHECK: addiu ${{[0-9]+}}, $sp, 56 -; CHECK: ldc1 $f0, 56($sp) +; CHECK: addiu $sp, $sp, -32 +; CHECK: addiu ${{[0-9]+}}, $sp, 48 +; CHECK: ldc1 $f0, 48($sp) } ; int @@ -237,8 +236,8 @@ entry: ret i32 %tmp ; CHECK: va9: -; CHECK: addiu $sp, $sp, -40 -; CHECK: lw $2, 60($sp) +; CHECK: addiu $sp, $sp, -32 +; CHECK: lw $2, 52($sp) } ; double @@ -262,8 +261,8 @@ entry: ret double %tmp ; CHECK: va10: -; CHECK: addiu $sp, $sp, -40 -; CHECK: addiu $[[R0:[0-9]+]], $sp, 60 +; CHECK: addiu $sp, $sp, -32 +; CHECK: addiu $[[R0:[0-9]+]], $sp, 52 ; CHECK: addiu $[[R1:[0-9]+]], $[[R0]], 7 ; CHECK: addiu $[[R2:[0-9]+]], $zero, -8 ; CHECK: and $[[R3:[0-9]+]], $[[R1]], $[[R2]] diff --git a/test/CodeGen/Mips/or1.ll b/test/CodeGen/Mips/or1.ll new file mode 100644 index 0000000..b1c3696 --- /dev/null +++ b/test/CodeGen/Mips/or1.ll @@ -0,0 +1,17 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@x = global i32 65504, align 4 +@y = global i32 60929, align 4 +@.str = private unnamed_addr constant [7 x i8] c"%08x \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @x, align 4 + %1 = load i32* @y, align 4 + %or = or i32 %0, %1 +; 16: or ${{[0-9]+}}, ${{[0-9]+}} + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), i32 %or) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/return-vector-float4.ll b/test/CodeGen/Mips/return-vector-float4.ll new file mode 100644 index 0000000..ae10f12 --- /dev/null +++ b/test/CodeGen/Mips/return-vector-float4.ll @@ -0,0 +1,12 @@ +; RUN: llc -march=mipsel -mattr=+android < %s | FileCheck %s + +define <4 x float> @retvec4() nounwind readnone { +entry: +; CHECK: lwc1 $f0 +; CHECK: lwc1 $f2 +; CHECK: lwc1 $f1 +; CHECK: lwc1 $f3 + + ret <4 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00> +} + diff --git a/test/CodeGen/Mips/sb1.ll b/test/CodeGen/Mips/sb1.ll new file mode 100644 index 0000000..e1a28d4 --- /dev/null +++ b/test/CodeGen/Mips/sb1.ll @@ -0,0 +1,20 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@i = global i32 97, align 4 +@c = common global i8 0, align 1 +@.str = private unnamed_addr constant [8 x i8] c"%i %c \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @i, align 4 + %conv = trunc i32 %0 to i8 + store i8 %conv, i8* @c, align 1 + %1 = load i32* @i, align 4 + %2 = load i8* @c, align 1 + %conv1 = sext i8 %2 to i32 +; 16: sb ${{[0-9]+}}, 0(${{[0-9]+}}) + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([8 x i8]* @.str, i32 0, i32 0), i32 %1, i32 %conv1) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/sh1.ll b/test/CodeGen/Mips/sh1.ll new file mode 100644 index 0000000..1746ae2 --- /dev/null +++ b/test/CodeGen/Mips/sh1.ll @@ -0,0 +1,20 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@i = global i32 97, align 4 +@s = common global i16 0, align 2 +@.str = private unnamed_addr constant [9 x i8] c"%i %hi \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @i, align 4 + %conv = trunc i32 %0 to i16 + store i16 %conv, i16* @s, align 2 + %1 = load i32* @i, align 4 + %2 = load i16* @s, align 2 + %conv1 = sext i16 %2 to i32 +; 16: sh ${{[0-9]+}}, 0(${{[0-9]+}}) + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([9 x i8]* @.str, i32 0, i32 0), i32 %1, i32 %conv1) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/sll1.ll b/test/CodeGen/Mips/sll1.ll new file mode 100644 index 0000000..fdcd38c --- /dev/null +++ b/test/CodeGen/Mips/sll1.ll @@ -0,0 +1,19 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@i = global i32 10, align 4 +@j = global i32 0, align 4 +@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 + +define i32 @main() nounwind { +entry: +; 16: sll ${{[0-9]+}}, ${{[0-9]+}}, {{[0-9]+}} + %0 = load i32* @i, align 4 + %shl = shl i32 %0, 4 +; 16: sll ${{[0-9]+}}, ${{[0-9]+}}, {{[0-9]+}} + store i32 %shl, i32* @j, align 4 + %1 = load i32* @j, align 4 + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %1) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/sll2.ll b/test/CodeGen/Mips/sll2.ll new file mode 100644 index 0000000..c2af454 --- /dev/null +++ b/test/CodeGen/Mips/sll2.ll @@ -0,0 +1,19 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@i = global i32 10, align 4 +@j = global i32 4, align 4 +@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @i, align 4 + %1 = load i32* @j, align 4 + %shl = shl i32 %0, %1 +; 16: sllv ${{[0-9]+}}, ${{[0-9]+}} + store i32 %shl, i32* @i, align 4 + %2 = load i32* @j, align 4 + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %2) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/sra1.ll b/test/CodeGen/Mips/sra1.ll new file mode 100644 index 0000000..15bf8d6 --- /dev/null +++ b/test/CodeGen/Mips/sra1.ll @@ -0,0 +1,15 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@i = global i32 -354, align 4 +@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @i, align 4 + %shr = ashr i32 %0, 3 +; 16: sra ${{[0-9]+}}, ${{[0-9]+}}, {{[0-9]+}} + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %shr) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/sra2.ll b/test/CodeGen/Mips/sra2.ll new file mode 100644 index 0000000..26bf19d --- /dev/null +++ b/test/CodeGen/Mips/sra2.ll @@ -0,0 +1,17 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@i = global i32 -354, align 4 +@j = global i32 3, align 4 +@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @i, align 4 + %1 = load i32* @j, align 4 + %shr = ashr i32 %0, %1 +; 16: srav ${{[0-9]+}}, ${{[0-9]+}} + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %shr) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/srl1.ll b/test/CodeGen/Mips/srl1.ll new file mode 100644 index 0000000..3474283 --- /dev/null +++ b/test/CodeGen/Mips/srl1.ll @@ -0,0 +1,18 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@i = global i32 10654, align 4 +@j = global i32 0, align 4 +@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @i, align 4 + %shr = lshr i32 %0, 4 +; 16: srl ${{[0-9]+}}, ${{[0-9]+}}, {{[0-9]+}} + store i32 %shr, i32* @j, align 4 + %1 = load i32* @j, align 4 + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %1) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/srl2.ll b/test/CodeGen/Mips/srl2.ll new file mode 100644 index 0000000..26ec092 --- /dev/null +++ b/test/CodeGen/Mips/srl2.ll @@ -0,0 +1,20 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@i = global i32 10654, align 4 +@j = global i32 0, align 4 +@k = global i32 4, align 4 +@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @i, align 4 + %1 = load i32* @k, align 4 + %shr = lshr i32 %0, %1 +; 16: srlv ${{[0-9]+}}, ${{[0-9]+}} + store i32 %shr, i32* @j, align 4 + %2 = load i32* @j, align 4 + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i32 0, i32 0), i32 %2) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/helloworld_call.ll b/test/CodeGen/Mips/sub1.ll index 61c0446..195750b 100644 --- a/test/CodeGen/Mips/helloworld_call.ll +++ b/test/CodeGen/Mips/sub1.ll @@ -1,17 +1,15 @@ ; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 -@.str = private unnamed_addr constant [13 x i8] c"hello world\0A\00", align 1 +@i = global i32 10, align 4 +@.str = private unnamed_addr constant [4 x i8] c"%i\0A\00", align 1 define i32 @main() nounwind { entry: - %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([13 x i8]* @.str, i32 0, i32 0)) + %0 = load i32* @i, align 4 + %sub = sub nsw i32 %0, 5 +; 16: addiu ${{[0-9]+}}, -{{[0-9]+}} + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i32 0, i32 0), i32 %sub) ret i32 0 - -; 16: .set mips16 # @main - -; 16: move $gp, ${{[0-9]+}} -; 16: jalr ${{[0-9]+}} -; 16: li $2, 0 } declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/sub2.ll b/test/CodeGen/Mips/sub2.ll new file mode 100644 index 0000000..4f6bfcc --- /dev/null +++ b/test/CodeGen/Mips/sub2.ll @@ -0,0 +1,17 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@i = global i32 10, align 4 +@j = global i32 20, align 4 +@.str = private unnamed_addr constant [4 x i8] c"%i\0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @j, align 4 + %1 = load i32* @i, align 4 + %sub = sub nsw i32 %0, %1 +; 16: subu ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}} + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i32 0, i32 0), i32 %sub) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/Mips/swzero.ll b/test/CodeGen/Mips/swzero.ll index 2441ca2..9f91a39 100644 --- a/test/CodeGen/Mips/swzero.ll +++ b/test/CodeGen/Mips/swzero.ll @@ -4,6 +4,7 @@ define void @zero_u(%struct.unaligned* nocapture %p) nounwind { entry: +; CHECK: swl $zero ; CHECK: swr $zero %x = getelementptr inbounds %struct.unaligned* %p, i32 0, i32 0 store i32 0, i32* %x, align 1 diff --git a/test/CodeGen/Mips/xor1.ll b/test/CodeGen/Mips/xor1.ll new file mode 100644 index 0000000..f2c1316 --- /dev/null +++ b/test/CodeGen/Mips/xor1.ll @@ -0,0 +1,17 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=16 + +@x = global i32 65504, align 4 +@y = global i32 60929, align 4 +@.str = private unnamed_addr constant [7 x i8] c"%08x \0A\00", align 1 + +define i32 @main() nounwind { +entry: + %0 = load i32* @x, align 4 + %1 = load i32* @y, align 4 + %xor = xor i32 %0, %1 +; 16: xor ${{[0-9]+}}, ${{[0-9]+}} + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), i32 %xor) + ret i32 0 +} + +declare i32 @printf(i8*, ...) diff --git a/test/CodeGen/PowerPC/fabs.ll b/test/CodeGen/PowerPC/fabs.ll index 156e00b..ddcce74 100644 --- a/test/CodeGen/PowerPC/fabs.ll +++ b/test/CodeGen/PowerPC/fabs.ll @@ -2,6 +2,6 @@ define double @fabs(double %f) { entry: - %tmp2 = tail call double @fabs( double %f ) ; <double> [#uses=1] + %tmp2 = tail call double @fabs( double %f ) readnone ; <double> [#uses=1] ret double %tmp2 } diff --git a/test/CodeGen/PowerPC/fnabs.ll b/test/CodeGen/PowerPC/fnabs.ll index bbd5c71..9fa2dcb 100644 --- a/test/CodeGen/PowerPC/fnabs.ll +++ b/test/CodeGen/PowerPC/fnabs.ll @@ -3,7 +3,7 @@ declare double @fabs(double) define double @test(double %X) { - %Y = call double @fabs( double %X ) ; <double> [#uses=1] + %Y = call double @fabs( double %X ) readnone ; <double> [#uses=1] %Z = fsub double -0.000000e+00, %Y ; <double> [#uses=1] ret double %Z } diff --git a/test/CodeGen/PowerPC/lbzux.ll b/test/CodeGen/PowerPC/lbzux.ll index 5725c0d..12f1d1f 100644 --- a/test/CodeGen/PowerPC/lbzux.ll +++ b/test/CodeGen/PowerPC/lbzux.ll @@ -2,7 +2,7 @@ target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 target triple = "powerpc64-unknown-linux-gnu" ; RUN: llc < %s | FileCheck %s -define fastcc void @allocateSpace() nounwind { +define fastcc void @allocateSpace(i1 %cond1, i1 %cond2) nounwind { entry: %0 = load i8** undef, align 8, !tbaa !0 br i1 undef, label %return, label %lor.lhs.false @@ -20,10 +20,10 @@ while.cond: ; preds = %while.body, %if.the %idxprom17 = sext i32 0 to i64 %arrayidx18 = getelementptr inbounds i8* %0, i64 %idxprom17 %or = or i32 undef, undef - br i1 false, label %if.end71, label %while.body + br i1 %cond1, label %if.end71, label %while.body while.body: ; preds = %while.cond - br i1 undef, label %while.cond, label %if.then45 + br i1 %cond2, label %while.cond, label %if.then45 if.then45: ; preds = %while.body %idxprom48139 = zext i32 %or to i64 diff --git a/test/CodeGen/PowerPC/ppc64-cyclecounter.ll b/test/CodeGen/PowerPC/ppc64-cyclecounter.ll new file mode 100644 index 0000000..38406ca --- /dev/null +++ b/test/CodeGen/PowerPC/ppc64-cyclecounter.ll @@ -0,0 +1,15 @@ +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" +; RUN: llc < %s | FileCheck %s + +define i64 @test1() nounwind { +entry: + %r = call i64 @llvm.readcyclecounter() + ret i64 %r +} + +; CHECK: @test1 +; CHECK: mfspr 3, 268 + +declare i64 @llvm.readcyclecounter() + diff --git a/test/CodeGen/Thumb2/machine-licm.ll b/test/CodeGen/Thumb2/machine-licm.ll index 8285742..01df373 100644 --- a/test/CodeGen/Thumb2/machine-licm.ll +++ b/test/CodeGen/Thumb2/machine-licm.ll @@ -95,7 +95,7 @@ bb.nph: bb: ; preds = %bb, %bb.nph ; CHECK: bb ; CHECK: eor.w -; CHECK: eor.w {{(r[0-9])|(lr)}}, {{(r[0-9])|(lr)}}, [[REGISTER]] +; CHECK: eorne.w {{(r[0-9])|(lr)}}, {{(r[0-9])|(lr)}}, [[REGISTER]] ; CHECK-NOT: eor ; CHECK: and %data_addr.013 = phi i8 [ %data, %bb.nph ], [ %8, %bb ] ; <i8> [#uses=2] diff --git a/test/CodeGen/Thumb2/thumb2-select_xform.ll b/test/CodeGen/Thumb2/thumb2-select_xform.ll index 74729fd..ead198f 100644 --- a/test/CodeGen/Thumb2/thumb2-select_xform.ll +++ b/test/CodeGen/Thumb2/thumb2-select_xform.ll @@ -4,9 +4,9 @@ define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind { ; CHECK: t1 ; CHECK: mvn r0, #-2147483648 ; CHECK: cmp r2, #10 -; CHECK: add r0, r1 -; CHECK: it gt -; CHECK: movgt r0, r1 +; CHECK: it le +; CHECK: addle.w r1, r1, r0 +; CHECK: mov r0, r1 %tmp1 = icmp sgt i32 %c, 10 %tmp2 = select i1 %tmp1, i32 0, i32 2147483647 %tmp3 = add i32 %tmp2, %b @@ -15,10 +15,10 @@ define i32 @t1(i32 %a, i32 %b, i32 %c) nounwind { define i32 @t2(i32 %a, i32 %b, i32 %c) nounwind { ; CHECK: t2 -; CHECK: add.w r0, r1, #-2147483648 ; CHECK: cmp r2, #10 -; CHECK: it gt -; CHECK: movgt r0, r1 +; CHECK: it le +; CHECK: addle.w r1, r1, #-2147483648 +; CHECK: mov r0, r1 %tmp1 = icmp sgt i32 %c, 10 %tmp2 = select i1 %tmp1, i32 0, i32 2147483648 @@ -28,10 +28,10 @@ define i32 @t2(i32 %a, i32 %b, i32 %c) nounwind { define i32 @t3(i32 %a, i32 %b, i32 %c, i32 %d) nounwind { ; CHECK: t3 -; CHECK: sub.w r0, r1, #10 ; CHECK: cmp r2, #10 -; CHECK: it gt -; CHECK: movgt r0, r1 +; CHECK: it le +; CHECK: suble.w r1, r1, #10 +; CHECK: mov r0, r1 %tmp1 = icmp sgt i32 %c, 10 %tmp2 = select i1 %tmp1, i32 0, i32 10 %tmp3 = sub i32 %b, %tmp2 diff --git a/test/CodeGen/X86/2006-11-12-CSRetCC.ll b/test/CodeGen/X86/2006-11-12-CSRetCC.ll index 6ec9a48..a58c9b1 100644 --- a/test/CodeGen/X86/2006-11-12-CSRetCC.ll +++ b/test/CodeGen/X86/2006-11-12-CSRetCC.ll @@ -52,8 +52,8 @@ entry: %tmp21 = load double* %tmp20 ; <double> [#uses=1] %tmp.upgrd.6 = getelementptr [9 x i8]* @str, i32 0, i64 0 ; <i8*> [#uses=1] %tmp.upgrd.7 = call i32 (i8*, ...)* @printf( i8* %tmp.upgrd.6, double %tmp21, double %tmp19 ) ; <i32> [#uses=0] - br label %return -return: ; preds = %entry + br label %finish +finish: %retval.upgrd.8 = load i32* %retval ; <i32> [#uses=1] ret i32 %retval.upgrd.8 } diff --git a/test/CodeGen/X86/2006-11-17-IllegalMove.ll b/test/CodeGen/X86/2006-11-17-IllegalMove.ll index adc825c..783d9f9 100644 --- a/test/CodeGen/X86/2006-11-17-IllegalMove.ll +++ b/test/CodeGen/X86/2006-11-17-IllegalMove.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -march=x86-64 > %t -; RUN: grep movb %t | count 2 +; RUN: grep movb %t | count 1 ; RUN: grep "movzb[wl]" %t diff --git a/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll b/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll index 266fd7b..39af931 100644 --- a/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll +++ b/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll @@ -10,10 +10,10 @@ %struct.indexentry = type { i32, i8*, i8*, i8*, i8*, i8* } -define i32 @_bfd_stab_section_find_nearest_line(i32 %offset) nounwind { +define i32 @_bfd_stab_section_find_nearest_line(i32 %offset, i1 %cond) nounwind { entry: %tmp910 = add i32 0, %offset ; <i32> [#uses=1] - br i1 true, label %bb951, label %bb917 + br i1 %cond, label %bb951, label %bb917 bb917: ; preds = %entry ret i32 0 @@ -21,7 +21,7 @@ bb917: ; preds = %entry bb951: ; preds = %bb986, %entry %tmp955 = sdiv i32 0, 2 ; <i32> [#uses=3] %tmp961 = getelementptr %struct.indexentry* null, i32 %tmp955, i32 0 ; <i32*> [#uses=1] - br i1 true, label %bb986, label %bb967 + br i1 %cond, label %bb986, label %bb967 bb967: ; preds = %bb951 ret i32 0 diff --git a/test/CodeGen/X86/2008-10-27-CoalescerBug.ll b/test/CodeGen/X86/2008-10-27-CoalescerBug.ll index 66f0677..b2cf34c 100644 --- a/test/CodeGen/X86/2008-10-27-CoalescerBug.ll +++ b/test/CodeGen/X86/2008-10-27-CoalescerBug.ll @@ -17,8 +17,7 @@ bb: ; preds = %bb, %entry ; CHECK: %bb30.loopexit ; CHECK: divsd %xmm0 ; CHECK: movsd %xmm0, 16(%esp) -; CHECK: .align -; CHECK-NEXT: %bb3 +; CHECK: %bb3 bb3: ; preds = %bb30.loopexit, %bb25, %bb3 %2 = load i32* null, align 4 ; <i32> [#uses=1] %3 = mul i32 %2, 0 ; <i32> [#uses=1] diff --git a/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll b/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll index 1b2f203..d50fe6f 100644 --- a/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll +++ b/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -mcpu=penryn -stats 2>&1 | grep "8 machine-licm" +; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -mcpu=penryn -stats 2>&1 | grep "5 machine-licm" ; RUN: llc < %s -march=x86-64 -mattr=+sse3,+sse41 -mcpu=penryn | FileCheck %s ; rdar://6627786 ; rdar://7792037 diff --git a/test/CodeGen/X86/2011-08-29-InitOrder.ll b/test/CodeGen/X86/2011-08-29-InitOrder.ll index 4d5f8d7..a95dcb5 100644 --- a/test/CodeGen/X86/2011-08-29-InitOrder.ll +++ b/test/CodeGen/X86/2011-08-29-InitOrder.ll @@ -3,7 +3,7 @@ ; PR5329 @llvm.global_ctors = appending global [3 x { i32, void ()* }] [{ i32, void ()* } { i32 2000, void ()* @construct_2 }, { i32, void ()* } { i32 3000, void ()* @construct_3 }, { i32, void ()* } { i32 1000, void ()* @construct_1 }] -; CHECK-DEFAULT .section .ctors.64535,"aw",@progbits +; CHECK-DEFAULT: .section .ctors.64535,"aw",@progbits ; CHECK-DEFAULT: .long construct_1 ; CHECK-DEFAULT: .section .ctors.63535,"aw",@progbits ; CHECK-DEFAULT: .long construct_2 diff --git a/test/CodeGen/X86/2012-05-19-avx2-store.ll b/test/CodeGen/X86/2012-05-19-avx2-store.ll index 61fef90..1c1e8e2 100644 --- a/test/CodeGen/X86/2012-05-19-avx2-store.ll +++ b/test/CodeGen/X86/2012-05-19-avx2-store.ll @@ -3,8 +3,7 @@ define void @double_save(<4 x i32>* %Ap, <4 x i32>* %Bp, <8 x i32>* %P) nounwind ssp { entry: ; CHECK: vmovaps - ; CHECK: vmovaps - ; CHECK: vinsertf128 + ; CHECK: vinsertf128 $1, ([[A0:%rdi|%rsi]]), ; CHECK: vmovups %A = load <4 x i32>* %Ap %B = load <4 x i32>* %Bp diff --git a/test/CodeGen/X86/2012-08-07-CmpISelBug.ll b/test/CodeGen/X86/2012-08-07-CmpISelBug.ll new file mode 100644 index 0000000..000b853 --- /dev/null +++ b/test/CodeGen/X86/2012-08-07-CmpISelBug.ll @@ -0,0 +1,36 @@ +; RUN: llc < %s -mtriple=x86_64-apple-macosx | FileCheck %s + +; Cmp lowering should not look past the truncate unless the high bits are known +; zero. +; rdar://12027825 + +define void @foo(i8 %arg4, i32 %arg5, i32* %arg14) nounwind { +bb: +; CHECK: foo: +; CHECK-NOT: testl +; CHECK: testb + %tmp48 = zext i8 %arg4 to i32 + %tmp49 = and i32 %tmp48, 32 + %tmp50 = add i32 %tmp49, 1593371643 + %tmp55 = sub i32 %tmp50, 0 + %tmp56 = add i32 %tmp55, 7787538 + %tmp57 = xor i32 %tmp56, 1601159181 + %tmp58 = xor i32 %arg5, 1601159181 + %tmp59 = and i32 %tmp57, %tmp58 + %tmp60 = add i32 %tmp59, -1263900958 + %tmp67 = sub i32 %tmp60, 0 + %tmp103 = xor i32 %tmp56, 13 + %tmp104 = trunc i32 %tmp103 to i8 + %tmp105 = sub i8 0, %tmp104 + %tmp106 = add i8 %tmp105, -103 + %tmp113 = sub i8 %tmp106, 0 + %tmp114 = add i8 %tmp113, -72 + %tmp141 = icmp ne i32 %tmp67, -1263900958 + %tmp142 = select i1 %tmp141, i8 %tmp114, i8 undef + %tmp143 = xor i8 %tmp142, 81 + %tmp144 = zext i8 %tmp143 to i32 + %tmp145 = add i32 %tmp144, 2062143348 + %tmp152 = sub i32 %tmp145, 0 + store i32 %tmp152, i32* %arg14 + ret void +} diff --git a/test/CodeGen/X86/2012-08-16-setcc.ll b/test/CodeGen/X86/2012-08-16-setcc.ll new file mode 100644 index 0000000..ed51156 --- /dev/null +++ b/test/CodeGen/X86/2012-08-16-setcc.ll @@ -0,0 +1,45 @@ +; RUN: llc < %s -mtriple=x86_64-apple-macosx | FileCheck %s + +; rdar://12081007 + +; CHECK: and_1: +; CHECK: andb +; CHECK-NEXT: cmovnel +; CHECK: ret +define i32 @and_1(i8 zeroext %a, i8 zeroext %b, i32 %x) { + %1 = and i8 %b, %a + %2 = icmp ne i8 %1, 0 + %3 = select i1 %2, i32 %x, i32 0 + ret i32 %3 +} + +; CHECK: and_2: +; CHECK: andb +; CHECK-NEXT: setne +; CHECK: ret +define zeroext i1 @and_2(i8 zeroext %a, i8 zeroext %b) { + %1 = and i8 %b, %a + %2 = icmp ne i8 %1, 0 + ret i1 %2 +} + +; CHECK: xor_1: +; CHECK: xorb +; CHECK-NEXT: cmovnel +; CHECK: ret +define i32 @xor_1(i8 zeroext %a, i8 zeroext %b, i32 %x) { + %1 = xor i8 %b, %a + %2 = icmp ne i8 %1, 0 + %3 = select i1 %2, i32 %x, i32 0 + ret i32 %3 +} + +; CHECK: xor_2: +; CHECK: xorb +; CHECK-NEXT: setne +; CHECK: ret +define zeroext i1 @xor_2(i8 zeroext %a, i8 zeroext %b) { + %1 = xor i8 %b, %a + %2 = icmp ne i8 %1, 0 + ret i1 %2 +} diff --git a/test/CodeGen/X86/2012-08-17-legalizer-crash.ll b/test/CodeGen/X86/2012-08-17-legalizer-crash.ll new file mode 100644 index 0000000..a65e688 --- /dev/null +++ b/test/CodeGen/X86/2012-08-17-legalizer-crash.ll @@ -0,0 +1,32 @@ +; RUN: llc < %s | FileCheck %s +; Check that an overly large immediate created by SROA doesn't crash the +; legalizer. + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.8.0" + +%struct._GtkSheetRow = type { i32*, i32, i32, i32, %struct._GtkSheetButton, i32, i32 } +%struct._GtkSheetButton = type { i32, i32*, i32, i32*, i32 } + +@a = common global %struct._GtkSheetRow* null, align 8 + +define void @fn1() nounwind uwtable ssp { +entry: + %0 = load %struct._GtkSheetRow** @a, align 8 + %1 = bitcast %struct._GtkSheetRow* %0 to i576* + %srcval2 = load i576* %1, align 8 + %tobool = icmp ugt i576 %srcval2, 57586096570152913699974892898380567793532123114264532903689671329431521032595044740083720782129802971518987656109067457577065805510327036019308994315074097345724415 + br i1 %tobool, label %if.then, label %if.end + +if.then: ; preds = %entry + store i576 %srcval2, i576* %1, align 8 + br label %if.end + +if.end: ; preds = %if.then, %entry + ret void + +; CHECK: fn1: +; CHECK: shrq $32, [[REG:%.*]] +; CHECK: testq [[REG]], [[REG]] +; CHECK: je +} diff --git a/test/CodeGen/X86/alignment-2.ll b/test/CodeGen/X86/alignment-2.ll index cc709b5..1f9e85c 100644 --- a/test/CodeGen/X86/alignment-2.ll +++ b/test/CodeGen/X86/alignment-2.ll @@ -18,7 +18,9 @@ define signext i8 @do_lo_list() nounwind optsize ssp { bb: ; CHECK: do_lo_list -; CHECK-NOT: movaps +; Make sure we do not use movaps for the global variable. +; It is okay to use movaps for writing the local variable on stack. +; CHECK-NOT: movaps {{[0-9]*}}(%{{[a-z]*}}), {{%xmm[0-9]}} %myopt = alloca %struct.printQueryOpt, align 4 %tmp = bitcast %struct.printQueryOpt* %myopt to i8* call void @llvm.memcpy.p0i8.p0i8.i32(i8* %tmp, i8* bitcast (%struct.printQueryOpt* getelementptr inbounds (%struct._psqlSettings* @pset, i32 0, i32 4) to i8*), i32 76, i32 4, i1 false) diff --git a/test/CodeGen/X86/atomic-pointer.ll b/test/CodeGen/X86/atomic-pointer.ll new file mode 100644 index 0000000..a455277 --- /dev/null +++ b/test/CodeGen/X86/atomic-pointer.ll @@ -0,0 +1,22 @@ +; RUN: llc < %s -mtriple=i686-none-linux | FileCheck %s + +define i32* @test_atomic_ptr_load(i32** %a0) { +; CHECK: test_atomic_ptr_load +; CHECK: movl +; CHECK: movl +; CHECK: ret +0: + %0 = load atomic i32** %a0 seq_cst, align 4 + ret i32* %0 +} + +define void @test_atomic_ptr_store(i32* %a0, i32** %a1) { +; CHECK: test_atomic_ptr_store +; CHECK: movl +; CHECK: movl +; CHECK: xchgl +; CHECK: ret +0: + store atomic i32* %a0, i32** %a1 seq_cst, align 4 + ret void +} diff --git a/test/CodeGen/X86/avx-intrinsics-x86.ll b/test/CodeGen/X86/avx-intrinsics-x86.ll index a8fd8e3..c44beb4 100644 --- a/test/CodeGen/X86/avx-intrinsics-x86.ll +++ b/test/CodeGen/X86/avx-intrinsics-x86.ll @@ -1154,7 +1154,7 @@ define i32 @test_x86_sse42_pcmpestria128(<16 x i8> %a0, <16 x i8> %a2) { ; CHECK: movl ; CHECK: movl ; CHECK: vpcmpestri - ; CHECK: movl + ; CHECK: seta %res = call i32 @llvm.x86.sse42.pcmpestria128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <i32> [#uses=1] ret i32 %res } @@ -1165,7 +1165,7 @@ define i32 @test_x86_sse42_pcmpestric128(<16 x i8> %a0, <16 x i8> %a2) { ; CHECK: movl ; CHECK: movl ; CHECK: vpcmpestri - ; CHECK: movl + ; CHECK: sbbl %res = call i32 @llvm.x86.sse42.pcmpestric128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <i32> [#uses=1] ret i32 %res } @@ -1176,7 +1176,7 @@ define i32 @test_x86_sse42_pcmpestrio128(<16 x i8> %a0, <16 x i8> %a2) { ; CHECK: movl ; CHECK: movl ; CHECK: vpcmpestri - ; CHECK: movl + ; CHECK: seto %res = call i32 @llvm.x86.sse42.pcmpestrio128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <i32> [#uses=1] ret i32 %res } @@ -1187,7 +1187,7 @@ define i32 @test_x86_sse42_pcmpestris128(<16 x i8> %a0, <16 x i8> %a2) { ; CHECK: movl ; CHECK: movl ; CHECK: vpcmpestri - ; CHECK: movl + ; CHECK: sets %res = call i32 @llvm.x86.sse42.pcmpestris128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <i32> [#uses=1] ret i32 %res } @@ -1198,7 +1198,7 @@ define i32 @test_x86_sse42_pcmpestriz128(<16 x i8> %a0, <16 x i8> %a2) { ; CHECK: movl ; CHECK: movl ; CHECK: vpcmpestri - ; CHECK: movl + ; CHECK: sete %res = call i32 @llvm.x86.sse42.pcmpestriz128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <i32> [#uses=1] ret i32 %res } @@ -1209,6 +1209,7 @@ define <16 x i8> @test_x86_sse42_pcmpestrm128(<16 x i8> %a0, <16 x i8> %a2) { ; CHECK: movl ; CHECK: movl ; CHECK: vpcmpestrm + ; CHECK-NOT: vmov %res = call <16 x i8> @llvm.x86.sse42.pcmpestrm128(<16 x i8> %a0, i32 7, <16 x i8> %a2, i32 7, i8 7) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } @@ -1226,7 +1227,7 @@ declare i32 @llvm.x86.sse42.pcmpistri128(<16 x i8>, <16 x i8>, i8) nounwind read define i32 @test_x86_sse42_pcmpistria128(<16 x i8> %a0, <16 x i8> %a1) { ; CHECK: vpcmpistri - ; CHECK: movl + ; CHECK: seta %res = call i32 @llvm.x86.sse42.pcmpistria128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; <i32> [#uses=1] ret i32 %res } @@ -1235,7 +1236,7 @@ declare i32 @llvm.x86.sse42.pcmpistria128(<16 x i8>, <16 x i8>, i8) nounwind rea define i32 @test_x86_sse42_pcmpistric128(<16 x i8> %a0, <16 x i8> %a1) { ; CHECK: vpcmpistri - ; CHECK: movl + ; CHECK: sbbl %res = call i32 @llvm.x86.sse42.pcmpistric128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; <i32> [#uses=1] ret i32 %res } @@ -1244,7 +1245,7 @@ declare i32 @llvm.x86.sse42.pcmpistric128(<16 x i8>, <16 x i8>, i8) nounwind rea define i32 @test_x86_sse42_pcmpistrio128(<16 x i8> %a0, <16 x i8> %a1) { ; CHECK: vpcmpistri - ; CHECK: movl + ; CHECK: seto %res = call i32 @llvm.x86.sse42.pcmpistrio128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; <i32> [#uses=1] ret i32 %res } @@ -1253,7 +1254,7 @@ declare i32 @llvm.x86.sse42.pcmpistrio128(<16 x i8>, <16 x i8>, i8) nounwind rea define i32 @test_x86_sse42_pcmpistris128(<16 x i8> %a0, <16 x i8> %a1) { ; CHECK: vpcmpistri - ; CHECK: movl + ; CHECK: sets %res = call i32 @llvm.x86.sse42.pcmpistris128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; <i32> [#uses=1] ret i32 %res } @@ -1262,7 +1263,7 @@ declare i32 @llvm.x86.sse42.pcmpistris128(<16 x i8>, <16 x i8>, i8) nounwind rea define i32 @test_x86_sse42_pcmpistriz128(<16 x i8> %a0, <16 x i8> %a1) { ; CHECK: vpcmpistri - ; CHECK: movl + ; CHECK: sete %res = call i32 @llvm.x86.sse42.pcmpistriz128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; <i32> [#uses=1] ret i32 %res } @@ -1271,6 +1272,7 @@ declare i32 @llvm.x86.sse42.pcmpistriz128(<16 x i8>, <16 x i8>, i8) nounwind rea define <16 x i8> @test_x86_sse42_pcmpistrm128(<16 x i8> %a0, <16 x i8> %a1) { ; CHECK: vpcmpistrm + ; CHECK-NOT: vmov %res = call <16 x i8> @llvm.x86.sse42.pcmpistrm128(<16 x i8> %a0, <16 x i8> %a1, i8 7) ; <<16 x i8>> [#uses=1] ret <16 x i8> %res } diff --git a/test/CodeGen/X86/block-placement.ll b/test/CodeGen/X86/block-placement.ll index fc7b638..5534712 100644 --- a/test/CodeGen/X86/block-placement.ll +++ b/test/CodeGen/X86/block-placement.ll @@ -7,10 +7,15 @@ define i32 @test_ifchains(i32 %i, i32* %a, i32 %b) { ; that is not expected to run. ; CHECK: test_ifchains: ; CHECK: %entry +; CHECK-NOT: .align ; CHECK: %else1 +; CHECK-NOT: .align ; CHECK: %else2 +; CHECK-NOT: .align ; CHECK: %else3 +; CHECK-NOT: .align ; CHECK: %else4 +; CHECK-NOT: .align ; CHECK: %exit ; CHECK: %then1 ; CHECK: %then2 @@ -76,8 +81,11 @@ define i32 @test_loop_cold_blocks(i32 %i, i32* %a) { ; Check that we sink cold loop blocks after the hot loop body. ; CHECK: test_loop_cold_blocks: ; CHECK: %entry +; CHECK-NOT: .align ; CHECK: %unlikely1 +; CHECK-NOT: .align ; CHECK: %unlikely2 +; CHECK: .align ; CHECK: %body1 ; CHECK: %body2 ; CHECK: %body3 @@ -634,7 +642,7 @@ define void @test_unnatural_cfg_backwards_inner_loop() { ; ; CHECK: test_unnatural_cfg_backwards_inner_loop ; CHECK: %entry -; CHECK: %body +; CHECK: [[BODY:# BB#[0-9]+]]: ; CHECK: %loop2b ; CHECK: %loop1 ; CHECK: %loop2a diff --git a/test/CodeGen/X86/bool-simplify.ll b/test/CodeGen/X86/bool-simplify.ll new file mode 100644 index 0000000..0cb9fd9 --- /dev/null +++ b/test/CodeGen/X86/bool-simplify.ll @@ -0,0 +1,42 @@ +; RUN: llc < %s -march=x86-64 -mattr=+sse41,-avx | FileCheck %s + +define i32 @foo(<2 x i64> %c, i32 %a, i32 %b) { + %t1 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %c, <2 x i64> %c) + %t2 = icmp ne i32 %t1, 0 + %t3 = select i1 %t2, i32 %a, i32 %b + ret i32 %t3 +; CHECK: foo +; CHECK: ptest +; CHECK-NOT: testl +; CHECK: cmov +; CHECK: ret +} + +define i32 @bar(<2 x i64> %c) { +entry: + %0 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %c, <2 x i64> %c) + %1 = icmp ne i32 %0, 0 + br i1 %1, label %if-true-block, label %endif-block +if-true-block: ; preds = %entry + ret i32 0 +endif-block: ; preds = %entry, + ret i32 1 +; CHECK: bar +; CHECK: ptest +; CHECK-NOT: testl +; CHECK: jne +; CHECK: ret +} + +define i32 @bax(<2 x i64> %c) { + %t1 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %c, <2 x i64> %c) + %t2 = icmp eq i32 %t1, 1 + %t3 = zext i1 %t2 to i32 + ret i32 %t3 +; CHECK: bax +; CHECK: ptest +; CHECK-NOT: cmpl +; CHECK: ret +} + +declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone diff --git a/test/CodeGen/X86/br-fold.ll b/test/CodeGen/X86/br-fold.ll index 2c37194..5223463 100644 --- a/test/CodeGen/X86/br-fold.ll +++ b/test/CodeGen/X86/br-fold.ll @@ -1,7 +1,7 @@ ; RUN: llc -march=x86-64 < %s | FileCheck %s ; CHECK: orq -; CHECK-NEXT: LBB0_1 +; CHECK-NEXT: %bb8.i329 @_ZN11xercesc_2_513SchemaSymbols21fgURI_SCHEMAFORSCHEMAE = external constant [33 x i16], align 32 ; <[33 x i16]*> [#uses=1] @_ZN11xercesc_2_56XMLUni16fgNotationStringE = external constant [9 x i16], align 16 ; <[9 x i16]*> [#uses=1] diff --git a/test/CodeGen/X86/break-sse-dep.ll b/test/CodeGen/X86/break-sse-dep.ll index 3e65867..4d80189 100644 --- a/test/CodeGen/X86/break-sse-dep.ll +++ b/test/CodeGen/X86/break-sse-dep.ll @@ -34,8 +34,7 @@ entry: define double @squirt(double* %x) nounwind { entry: ; CHECK: squirt: -; CHECK: movsd ([[A0]]), %xmm0 -; CHECK: sqrtsd %xmm0, %xmm0 +; CHECK: sqrtsd ([[A0]]), %xmm0 %z = load double* %x %t = call double @llvm.sqrt.f64(double %z) ret double %t diff --git a/test/CodeGen/X86/cmov.ll b/test/CodeGen/X86/cmov.ll index 43beac0..ed25c82 100644 --- a/test/CodeGen/X86/cmov.ll +++ b/test/CodeGen/X86/cmov.ll @@ -4,8 +4,8 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 define i32 @test1(i32 %x, i32 %n, i32 %w, i32* %vp) nounwind readnone { entry: ; CHECK: test1: -; CHECK: btl -; CHECK-NEXT: movl $12, %eax +; CHECK: movl $12, %eax +; CHECK-NEXT: btl ; CHECK-NEXT: cmovael (%rcx), %eax ; CHECK-NEXT: ret @@ -19,8 +19,8 @@ entry: define i32 @test2(i32 %x, i32 %n, i32 %w, i32* %vp) nounwind readnone { entry: ; CHECK: test2: -; CHECK: btl -; CHECK-NEXT: movl $12, %eax +; CHECK: movl $12, %eax +; CHECK-NEXT: btl ; CHECK-NEXT: cmovbl (%rcx), %eax ; CHECK-NEXT: ret diff --git a/test/CodeGen/X86/early-ifcvt.ll b/test/CodeGen/X86/early-ifcvt.ll index ce1fe04..7883ffa 100644 --- a/test/CodeGen/X86/early-ifcvt.ll +++ b/test/CodeGen/X86/early-ifcvt.ll @@ -37,3 +37,33 @@ do.end: %sub = sub nsw i32 %max.1, %min.1 ret i32 %sub } + +; CHECK: multipreds +; Deal with alternative tail predecessors +; CHECK-NOT: LBB +; CHECK: cmov +; CHECK-NOT: LBB +; CHECK: cmov +; CHECK-NOT: LBB +; CHECK: fprintf + +define void @multipreds(i32 %sw) nounwind uwtable ssp { +entry: + switch i32 %sw, label %if.then29 [ + i32 0, label %if.then37 + i32 127, label %if.end41 + ] + +if.then29: + br label %if.end41 + +if.then37: + br label %if.end41 + +if.end41: + %exit_status.0 = phi i32 [ 2, %if.then29 ], [ 0, %if.then37 ], [ 66, %entry ] + call void (...)* @fprintf(i32 %exit_status.0) nounwind + unreachable +} + +declare void @fprintf(...) nounwind diff --git a/test/CodeGen/X86/fabs.ll b/test/CodeGen/X86/fabs.ll index 5adc38f..af1867f 100644 --- a/test/CodeGen/X86/fabs.ll +++ b/test/CodeGen/X86/fabs.ll @@ -1,6 +1,7 @@ ; Make sure this testcase codegens to the fabs instruction, not a call to fabsf -; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3,-sse | FileCheck %s -; RUN: llc < %s -march=x86 -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math -enable-no-nans-fp-math | FileCheck %s --check-prefix=UNSAFE +; RUN: llc < %s -mtriple=i686-apple-macosx -mattr=-sse2,-sse3,-sse | FileCheck %s +; RUN: llc < %s -mtriple=i686-apple-macosx -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math -enable-no-nans-fp-math | FileCheck %s --check-prefix=UNSAFE +; RUN: llc < %s -mtriple=x86_64-apple-macosx -O0 | FileCheck %s --check-prefix=NOOPT declare float @fabsf(float) @@ -8,8 +9,9 @@ declare x86_fp80 @fabsl(x86_fp80) ; CHECK: test1: ; UNSAFE: test1: +; NOOPT: test1: define float @test1(float %X) { - %Y = call float @fabsf(float %X) + %Y = call float @fabsf(float %X) readnone ret float %Y } ; CHECK: {{^[ \t]+fabs$}} @@ -17,9 +19,11 @@ define float @test1(float %X) { ; CHECK-NOT: fabs ; UNSAFE-NOT: fabs +; NOOPT-NOT: fabsf ; CHECK: test2: ; UNSAFE: test2: +; NOOPT: test2: define double @test2(double %X) { %Y = fcmp oge double %X, -0.0 %Z = fsub double -0.0, %X @@ -28,6 +32,7 @@ define double @test2(double %X) { } ; fabs is not used here. ; CHECK-NOT: fabs +; NOOPT-NOT: fabs ; UNSAFE: {{^[ \t]+fabs$}} @@ -35,12 +40,15 @@ define double @test2(double %X) { ; CHECK: test3: ; UNSAFE: test3: +; NOOPT: test3: define x86_fp80 @test3(x86_fp80 %X) { - %Y = call x86_fp80 @fabsl(x86_fp80 %X) + %Y = call x86_fp80 @fabsl(x86_fp80 %X) readnone ret x86_fp80 %Y } ; CHECK: {{^[ \t]+fabs$}} ; UNSAFE: {{^[ \t]+fabs$}} +; NOOPT: {{^[ \t]+fabs$}} ; CHECK-NOT: fabs ; UNSAFE-NOT: fabs +; NOOPT-NOT: fabs diff --git a/test/CodeGen/X86/fast-isel-x86.ll b/test/CodeGen/X86/fast-isel-x86.ll index 19f3888..4caa3a0 100644 --- a/test/CodeGen/X86/fast-isel-x86.ll +++ b/test/CodeGen/X86/fast-isel-x86.ll @@ -57,6 +57,6 @@ entry: ; CHECK: subl $28 ; CHECK: leal (%esp), %ecx ; CHECK: calll _test4fastccsret -; CHECK addl $28 +; CHECK: addl $28 } declare fastcc void @test4fastccsret(%struct.a* sret) diff --git a/test/CodeGen/X86/fma.ll b/test/CodeGen/X86/fma.ll index 5deedb9..b0c1d0a 100644 --- a/test/CodeGen/X86/fma.ll +++ b/test/CodeGen/X86/fma.ll @@ -1,8 +1,11 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin10 | FileCheck %s -; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s +; RUN: llc < %s -mtriple=i386-apple-darwin10 -mattr=+fma | FileCheck %s --check-prefix=CHECK-FMA-INST +; RUN: llc < %s -mtriple=i386-apple-darwin10 | FileCheck %s --check-prefix=CHECK-FMA-CALL +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mattr=+fma | FileCheck %s --check-prefix=CHECK-FMA-INST +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefix=CHECK-FMA-CALL ; CHECK: test_f32 -; CHECK: _fmaf +; CHECK-FMA-INST: vfmadd213ss +; CHECK-FMA-CALL: _fmaf define float @test_f32(float %a, float %b, float %c) nounwind readnone ssp { entry: @@ -11,7 +14,8 @@ entry: } ; CHECK: test_f64 -; CHECK: _fma +; CHECK-FMA-INST: vfmadd213sd +; CHECK-FMA-CALL: _fma define double @test_f64(double %a, double %b, double %c) nounwind readnone ssp { entry: diff --git a/test/CodeGen/X86/fma3-intrinsics.ll b/test/CodeGen/X86/fma3-intrinsics.ll index 8659dfe..90529e0 100755 --- a/test/CodeGen/X86/fma3-intrinsics.ll +++ b/test/CodeGen/X86/fma3-intrinsics.ll @@ -1,42 +1,42 @@ ; RUN: llc < %s -mtriple=x86_64-pc-win32 -mcpu=core-avx2 -mattr=avx2,+fma | FileCheck %s define <4 x float> @test_x86_fmadd_ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) { - ; CHECK: fmadd132ss %xmm + ; CHECK: fmadd213ss %xmm %res = call <4 x float> @llvm.x86.fma.vfmadd.ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) nounwind ret <4 x float> %res } declare <4 x float> @llvm.x86.fma.vfmadd.ss(<4 x float>, <4 x float>, <4 x float>) nounwind readnone define <4 x float> @test_x86_fmadd_ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) { - ; CHECK: fmadd132ps + ; CHECK: fmadd213ps %res = call <4 x float> @llvm.x86.fma.vfmadd.ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) nounwind ret <4 x float> %res } declare <4 x float> @llvm.x86.fma.vfmadd.ps(<4 x float>, <4 x float>, <4 x float>) nounwind readnone define <8 x float> @test_x86_fmadd_ps_y(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) { - ; CHECK: fmadd132ps {{.*\(%r.*}}, %ymm + ; CHECK: fmadd213ps {{.*\(%r.*}}, %ymm %res = call <8 x float> @llvm.x86.fma.vfmadd.ps.256(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) nounwind ret <8 x float> %res } declare <8 x float> @llvm.x86.fma.vfmadd.ps.256(<8 x float>, <8 x float>, <8 x float>) nounwind readnone define <4 x float> @test_x86_fnmadd_ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) { - ; CHECK: fnmadd132ss %xmm + ; CHECK: fnmadd213ss %xmm %res = call <4 x float> @llvm.x86.fma.vfnmadd.ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) nounwind ret <4 x float> %res } declare <4 x float> @llvm.x86.fma.vfnmadd.ss(<4 x float>, <4 x float>, <4 x float>) nounwind readnone define <4 x float> @test_x86_fnmadd_ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) { - ; CHECK: fnmadd132ps + ; CHECK: fnmadd213ps %res = call <4 x float> @llvm.x86.fma.vfnmadd.ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) nounwind ret <4 x float> %res } declare <4 x float> @llvm.x86.fma.vfnmadd.ps(<4 x float>, <4 x float>, <4 x float>) nounwind readnone define <8 x float> @test_x86_fnmadd_ps_y(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) { - ; CHECK: fnmadd132ps {{.*\(%r.*}}, %ymm + ; CHECK: fnmadd213ps {{.*\(%r.*}}, %ymm %res = call <8 x float> @llvm.x86.fma.vfnmadd.ps.256(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) nounwind ret <8 x float> %res } @@ -44,28 +44,28 @@ declare <8 x float> @llvm.x86.fma.vfnmadd.ps.256(<8 x float>, <8 x float>, <8 x define <4 x float> @test_x86_fmsub_ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) { - ; CHECK: fmsub132ss + ; CHECK: fmsub213ss %res = call <4 x float> @llvm.x86.fma.vfmsub.ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) nounwind ret <4 x float> %res } declare <4 x float> @llvm.x86.fma.vfmsub.ss(<4 x float>, <4 x float>, <4 x float>) nounwind readnone define <4 x float> @test_x86_fmsub_ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) { - ; CHECK: fmsub132ps + ; CHECK: fmsub213ps %res = call <4 x float> @llvm.x86.fma.vfmsub.ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) nounwind ret <4 x float> %res } declare <4 x float> @llvm.x86.fma.vfmsub.ps(<4 x float>, <4 x float>, <4 x float>) nounwind readnone define <4 x float> @test_x86_fnmsub_ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) { - ; CHECK: fnmsub132ss + ; CHECK: fnmsub213ss %res = call <4 x float> @llvm.x86.fma.vfnmsub.ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) nounwind ret <4 x float> %res } declare <4 x float> @llvm.x86.fma.vfnmsub.ss(<4 x float>, <4 x float>, <4 x float>) nounwind readnone define <4 x float> @test_x86_fnmsub_ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) { - ; CHECK: fnmsub132ps + ; CHECK: fnmsub213ps %res = call <4 x float> @llvm.x86.fma.vfnmsub.ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) nounwind ret <4 x float> %res } @@ -74,28 +74,28 @@ declare <4 x float> @llvm.x86.fma.vfnmsub.ps(<4 x float>, <4 x float>, <4 x floa ;;;; define <2 x double> @test_x86_fmadd_sd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) { - ; CHECK: fmadd132sd + ; CHECK: fmadd213sd %res = call <2 x double> @llvm.x86.fma.vfmadd.sd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) nounwind ret <2 x double> %res } declare <2 x double> @llvm.x86.fma.vfmadd.sd(<2 x double>, <2 x double>, <2 x double>) nounwind readnone define <2 x double> @test_x86_fmadd_pd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) { - ; CHECK: fmadd132pd + ; CHECK: fmadd213pd %res = call <2 x double> @llvm.x86.fma.vfmadd.pd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) nounwind ret <2 x double> %res } declare <2 x double> @llvm.x86.fma.vfmadd.pd(<2 x double>, <2 x double>, <2 x double>) nounwind readnone define <2 x double> @test_x86_fnmadd_sd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) { - ; CHECK: fnmadd132sd + ; CHECK: fnmadd213sd %res = call <2 x double> @llvm.x86.fma.vfnmadd.sd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) nounwind ret <2 x double> %res } declare <2 x double> @llvm.x86.fma.vfnmadd.sd(<2 x double>, <2 x double>, <2 x double>) nounwind readnone define <2 x double> @test_x86_fnmadd_pd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) { - ; CHECK: fnmadd132pd + ; CHECK: fnmadd213pd %res = call <2 x double> @llvm.x86.fma.vfnmadd.pd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) nounwind ret <2 x double> %res } @@ -104,28 +104,28 @@ declare <2 x double> @llvm.x86.fma.vfnmadd.pd(<2 x double>, <2 x double>, <2 x d define <2 x double> @test_x86_fmsub_sd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) { - ; CHECK: fmsub132sd + ; CHECK: fmsub213sd %res = call <2 x double> @llvm.x86.fma.vfmsub.sd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) nounwind ret <2 x double> %res } declare <2 x double> @llvm.x86.fma.vfmsub.sd(<2 x double>, <2 x double>, <2 x double>) nounwind readnone define <2 x double> @test_x86_fmsub_pd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) { - ; CHECK: fmsub132pd + ; CHECK: fmsub213pd %res = call <2 x double> @llvm.x86.fma.vfmsub.pd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) nounwind ret <2 x double> %res } declare <2 x double> @llvm.x86.fma.vfmsub.pd(<2 x double>, <2 x double>, <2 x double>) nounwind readnone define <2 x double> @test_x86_fnmsub_sd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) { - ; CHECK: fnmsub132sd + ; CHECK: fnmsub213sd %res = call <2 x double> @llvm.x86.fma.vfnmsub.sd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) nounwind ret <2 x double> %res } declare <2 x double> @llvm.x86.fma.vfnmsub.sd(<2 x double>, <2 x double>, <2 x double>) nounwind readnone define <2 x double> @test_x86_fnmsub_pd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) { - ; CHECK: fnmsub132pd + ; CHECK: fnmsub213pd %res = call <2 x double> @llvm.x86.fma.vfnmsub.pd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) nounwind ret <2 x double> %res } diff --git a/test/CodeGen/X86/fma_patterns.ll b/test/CodeGen/X86/fma_patterns.ll new file mode 100644 index 0000000..5d97a87 --- /dev/null +++ b/test/CodeGen/X86/fma_patterns.ll @@ -0,0 +1,139 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -mattr=avx2,+fma -fp-contract=fast | FileCheck %s + +; CHECK: test_x86_fmadd_ps +; CHECK: vfmadd213ps %xmm2, %xmm0, %xmm1 +; CHECK: ret +define <4 x float> @test_x86_fmadd_ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) { + %x = fmul <4 x float> %a0, %a1 + %res = fadd <4 x float> %x, %a2 + ret <4 x float> %res +} + +; CHECK: test_x86_fmsub_ps +; CHECK: fmsub213ps %xmm2, %xmm0, %xmm1 +; CHECK: ret +define <4 x float> @test_x86_fmsub_ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) { + %x = fmul <4 x float> %a0, %a1 + %res = fsub <4 x float> %x, %a2 + ret <4 x float> %res +} + +; CHECK: test_x86_fnmadd_ps +; CHECK: fnmadd213ps %xmm2, %xmm0, %xmm1 +; CHECK: ret +define <4 x float> @test_x86_fnmadd_ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) { + %x = fmul <4 x float> %a0, %a1 + %res = fsub <4 x float> %a2, %x + ret <4 x float> %res +} + +; CHECK: test_x86_fnmsub_ps +; CHECK: fnmsub213ps %xmm2, %xmm0, %xmm1 +; CHECK: ret +define <4 x float> @test_x86_fnmsub_ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) { + %x = fmul <4 x float> %a0, %a1 + %y = fsub <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %x + %res = fsub <4 x float> %y, %a2 + ret <4 x float> %res +} + +; CHECK: test_x86_fmadd_ps_y +; CHECK: vfmadd213ps %ymm2, %ymm0, %ymm1 +; CHECK: ret +define <8 x float> @test_x86_fmadd_ps_y(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) { + %x = fmul <8 x float> %a0, %a1 + %res = fadd <8 x float> %x, %a2 + ret <8 x float> %res +} + +; CHECK: test_x86_fmsub_ps_y +; CHECK: vfmsub213ps %ymm2, %ymm0, %ymm1 +; CHECK: ret +define <8 x float> @test_x86_fmsub_ps_y(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) { + %x = fmul <8 x float> %a0, %a1 + %res = fsub <8 x float> %x, %a2 + ret <8 x float> %res +} + +; CHECK: test_x86_fnmadd_ps_y +; CHECK: vfnmadd213ps %ymm2, %ymm0, %ymm1 +; CHECK: ret +define <8 x float> @test_x86_fnmadd_ps_y(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) { + %x = fmul <8 x float> %a0, %a1 + %res = fsub <8 x float> %a2, %x + ret <8 x float> %res +} + +; CHECK: test_x86_fnmsub_ps_y +; CHECK: vfnmsub213ps %ymm2, %ymm0, %ymm1 +; CHECK: ret +define <8 x float> @test_x86_fnmsub_ps_y(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2) { + %x = fmul <8 x float> %a0, %a1 + %y = fsub <8 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00>, %x + %res = fsub <8 x float> %y, %a2 + ret <8 x float> %res +} + +; CHECK: test_x86_fmadd_pd_y +; CHECK: vfmadd213pd %ymm2, %ymm0, %ymm1 +; CHECK: ret +define <4 x double> @test_x86_fmadd_pd_y(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) { + %x = fmul <4 x double> %a0, %a1 + %res = fadd <4 x double> %x, %a2 + ret <4 x double> %res +} + +; CHECK: test_x86_fmsub_pd_y +; CHECK: vfmsub213pd %ymm2, %ymm0, %ymm1 +; CHECK: ret +define <4 x double> @test_x86_fmsub_pd_y(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2) { + %x = fmul <4 x double> %a0, %a1 + %res = fsub <4 x double> %x, %a2 + ret <4 x double> %res +} + +; CHECK: test_x86_fmsub_pd +; CHECK: vfmsub213pd %xmm2, %xmm0, %xmm1 +; CHECK: ret +define <2 x double> @test_x86_fmsub_pd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) { + %x = fmul <2 x double> %a0, %a1 + %res = fsub <2 x double> %x, %a2 + ret <2 x double> %res +} + +; CHECK: test_x86_fnmadd_ss +; CHECK: vfnmadd213ss %xmm2, %xmm0, %xmm1 +; CHECK: ret +define float @test_x86_fnmadd_ss(float %a0, float %a1, float %a2) { + %x = fmul float %a0, %a1 + %res = fsub float %a2, %x + ret float %res +} + +; CHECK: test_x86_fnmadd_sd +; CHECK: vfnmadd213sd %xmm2, %xmm0, %xmm1 +; CHECK: ret +define double @test_x86_fnmadd_sd(double %a0, double %a1, double %a2) { + %x = fmul double %a0, %a1 + %res = fsub double %a2, %x + ret double %res +} + +; CHECK: test_x86_fmsub_sd +; CHECK: vfmsub213sd %xmm2, %xmm0, %xmm1 +; CHECK: ret +define double @test_x86_fmsub_sd(double %a0, double %a1, double %a2) { + %x = fmul double %a0, %a1 + %res = fsub double %x, %a2 + ret double %res +} + +; CHECK: test_x86_fnmsub_ss +; CHECK: vfnmsub213ss %xmm2, %xmm0, %xmm1 +; CHECK: ret +define float @test_x86_fnmsub_ss(float %a0, float %a1, float %a2) { + %x = fsub float -0.000000e+00, %a0 + %y = fmul float %x, %a1 + %res = fsub float %y, %a2 + ret float %res +} diff --git a/test/CodeGen/X86/fold-load.ll b/test/CodeGen/X86/fold-load.ll index e03cb7e..d836665 100644 --- a/test/CodeGen/X86/fold-load.ll +++ b/test/CodeGen/X86/fold-load.ll @@ -45,3 +45,29 @@ L: } +; rdar://10554090 +; xor in exit block will be CSE'ed and load will be folded to xor in entry. +define i1 @test3(i32* %P, i32* %Q) nounwind { +; CHECK: test3: +; CHECK: movl 8(%esp), %eax +; CHECK: xorl (%eax), +; CHECK: j +; CHECK-NOT: xor +entry: + %0 = load i32* %P, align 4 + %1 = load i32* %Q, align 4 + %2 = xor i32 %0, %1 + %3 = and i32 %2, 89947 + %4 = icmp eq i32 %3, 0 + br i1 %4, label %exit, label %land.end + +exit: + %shr.i.i19 = xor i32 %1, %0 + %5 = and i32 %shr.i.i19, 3456789123 + %6 = icmp eq i32 %5, 0 + br label %land.end + +land.end: + %7 = phi i1 [ %6, %exit ], [ false, %entry ] + ret i1 %7 +} diff --git a/test/CodeGen/X86/fold-pcmpeqd-1.ll b/test/CodeGen/X86/fold-pcmpeqd-1.ll index cc4198d..d850630 100644 --- a/test/CodeGen/X86/fold-pcmpeqd-1.ll +++ b/test/CodeGen/X86/fold-pcmpeqd-1.ll @@ -1,11 +1,16 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 > %t -; RUN: grep pcmpeqd %t | count 1 -; RUN: grep xor %t | count 1 -; RUN: not grep LCP %t +; RUN: llc < %s -march=x86 -mattr=+sse2,-avx | FileCheck %s define <2 x double> @foo() nounwind { ret <2 x double> bitcast (<2 x i64><i64 -1, i64 -1> to <2 x double>) +; CHECK: foo: +; CHECK: pcmpeqd %xmm0, %xmm0 +; CHECK-NOT: %xmm +; CHECK: ret } define <2 x double> @bar() nounwind { ret <2 x double> bitcast (<2 x i64><i64 0, i64 0> to <2 x double>) +; CHECK: bar: +; CHECK: xorps %xmm0, %xmm0 +; CHECK-NOT: %xmm +; CHECK: ret } diff --git a/test/CodeGen/X86/force-align-stack-alloca.ll b/test/CodeGen/X86/force-align-stack-alloca.ll index 4ab9067..2ada194 100644 --- a/test/CodeGen/X86/force-align-stack-alloca.ll +++ b/test/CodeGen/X86/force-align-stack-alloca.ll @@ -24,8 +24,8 @@ define i64 @g(i32 %i) nounwind { ; CHECK-NEXT: andl $-32, %esp ; CHECK-NEXT: subl $32, %esp ; -; Now setup the base pointer (%ebx). -; CHECK-NEXT: movl %esp, %ebx +; Now setup the base pointer (%esi). +; CHECK-NEXT: movl %esp, %esi ; CHECK-NOT: {{[^ ,]*}}, %esp ; ; The next adjustment of the stack is due to the alloca. diff --git a/test/CodeGen/X86/fp-in-intregs.ll b/test/CodeGen/X86/fp-in-intregs.ll index 6966cf0..1f5121d 100644 --- a/test/CodeGen/X86/fp-in-intregs.ll +++ b/test/CodeGen/X86/fp-in-intregs.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s +; RUN: llc < %s -mtriple=i686-apple-macosx -mcpu=yonah | FileCheck %s ; CHECK-NOT: {{((xor|and)ps|movd)}} ; These operations should be done in integer registers, eliminating constant diff --git a/test/CodeGen/X86/full-lsr.ll b/test/CodeGen/X86/full-lsr.ll index 1344cdc..0729dda 100644 --- a/test/CodeGen/X86/full-lsr.ll +++ b/test/CodeGen/X86/full-lsr.ll @@ -10,7 +10,7 @@ define void @foo(float* nocapture %A, float* nocapture %B, float* nocapture %C, ; CHECK: foo ; CHECK: addl ; CHECK: addl -; CEHCK: addl +; CHECK: addl entry: %0 = icmp sgt i32 %N, 0 ; <i1> [#uses=1] diff --git a/test/CodeGen/X86/gs-fold.ll b/test/CodeGen/X86/gs-fold.ll new file mode 100644 index 0000000..dbec76b --- /dev/null +++ b/test/CodeGen/X86/gs-fold.ll @@ -0,0 +1,20 @@ +; RUN: llc < %s -mtriple=x86_64-unknown-freebsd | FileCheck %s --check-prefix=CHECK-FBSD +; RUN: llc < %s -mtriple=x86_64-unknown-linux | FileCheck %s --check-prefix=CHECK-LINUX +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" + +%struct.thread = type { i32, i32, i32, i32 } + +define i32 @test() nounwind uwtable { +entry: + %0 = load volatile %struct.thread* addrspace(256)* null + %c = getelementptr inbounds %struct.thread* %0, i64 0, i32 2 + %1 = load i32* %c, align 4 + ret i32 %1 +} + +; Check that we are not assuming that gs contains the address of gs if we are not targeting Linux +; CHECK-FBSD: movq %gs:0, %rax +; CHECK-FBSD: movl 8(%rax), %eax +; Check that we are assuming that gs contains the address of gs if we are targeting Linux +; CHECK-LINUX: movl %gs:8, %eax + diff --git a/test/CodeGen/X86/inreg.ll b/test/CodeGen/X86/inreg.ll new file mode 100644 index 0000000..6653cfb --- /dev/null +++ b/test/CodeGen/X86/inreg.ll @@ -0,0 +1,46 @@ +; RUN: llc < %s -mtriple=i686-pc-linux -mcpu=corei7 | FileCheck --check-prefix=DAG %s +; RUN: llc < %s -mtriple=i686-pc-linux -mcpu=corei7 -O0 | FileCheck --check-prefix=FAST %s + +%struct.s1 = type { double, float } + +define void @g1() nounwind { +entry: + %tmp = alloca %struct.s1, align 4 + call void @f(%struct.s1* inreg sret %tmp, i32 inreg 41, i32 inreg 42, i32 43) + ret void + ; DAG: g1: + ; DAG: subl $[[AMT:.*]], %esp + ; DAG-NEXT: $43, (%esp) + ; DAG-NEXT: leal 16(%esp), %eax + ; DAG-NEXT: movl $41, %edx + ; DAG-NEXT: movl $42, %ecx + ; DAG-NEXT: calll f + ; DAG-NEXT: addl $[[AMT]], %esp + ; DAG-NEXT: ret + + ; FAST: g1: + ; FAST: subl $[[AMT:.*]], %esp + ; FAST-NEXT: leal 8(%esp), %eax + ; FAST-NEXT: movl $41, %edx + ; FAST-NEXT: movl $42, %ecx + ; FAST: $43, (%esp) + ; FAST: calll f + ; FAST-NEXT: addl $[[AMT]], %esp + ; FAST: ret +} + +declare void @f(%struct.s1* inreg sret, i32 inreg, i32 inreg, i32) + +%struct.s2 = type {} + +define void @g2(%struct.s2* inreg sret %agg.result) nounwind { +entry: + ret void + ; DAG: g2 + ; DAG-NOT: ret $4 + ; DAG: .size g2 + + ; FAST: g2 + ; FAST-NOT: ret $4 + ; FAST: .size g2 +} diff --git a/test/CodeGen/X86/jump_sign.ll b/test/CodeGen/X86/jump_sign.ll index 5b7c19f..48e2106 100644 --- a/test/CodeGen/X86/jump_sign.ll +++ b/test/CodeGen/X86/jump_sign.ll @@ -142,6 +142,7 @@ if.else: define i32 @l4(i32 %a, i32 %b) nounwind { entry: ; CHECK: l4: +; CHECK: xor ; CHECK: sub ; CHECK-NOT: cmp %cmp = icmp sgt i32 %b, %a @@ -213,3 +214,42 @@ entry: %add. = select i1 %cmp, i32 %add, i32 0 ret i32 %add. } +; PR13475 +; If we have sub a, b and cmp b, a and the result of cmp is used +; by sbb, we should not optimize cmp away. +define i32 @q(i32 %j.4, i32 %w, i32 %el) { +; CHECK: q: +; CHECK: sub +; CHECK: cmp +; CHECK-NEXT: sbb + %tmp532 = add i32 %j.4, %w + %tmp533 = icmp ugt i32 %tmp532, %el + %tmp534 = icmp ult i32 %w, %el + %or.cond = and i1 %tmp533, %tmp534 + %tmp535 = sub i32 %el, %w + %j.5 = select i1 %or.cond, i32 %tmp535, i32 %j.4 + ret i32 %j.5 +} +; rdar://11873276 +define i8* @r(i8* %base, i32* nocapture %offset, i32 %size) nounwind { +entry: +; CHECK: r: +; CHECK: sub +; CHECK-NOT: cmp +; CHECK: j +; CHECK-NOT: sub +; CHECK: ret + %0 = load i32* %offset, align 8 + %cmp = icmp slt i32 %0, %size + br i1 %cmp, label %return, label %if.end + +if.end: + %sub = sub nsw i32 %0, %size + store i32 %sub, i32* %offset, align 8 + %add.ptr = getelementptr inbounds i8* %base, i32 %sub + br label %return + +return: + %retval.0 = phi i8* [ %add.ptr, %if.end ], [ null, %entry ] + ret i8* %retval.0 +} diff --git a/test/CodeGen/X86/liveness-local-regalloc.ll b/test/CodeGen/X86/liveness-local-regalloc.ll index faeeaa7..721f545 100644 --- a/test/CodeGen/X86/liveness-local-regalloc.ll +++ b/test/CodeGen/X86/liveness-local-regalloc.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mcpu=generic -regalloc=fast -optimize-regalloc=0 -verify-machineinstrs -mtriple=x86_64-apple-darwin10 +; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 -verify-machineinstrs -mtriple=x86_64-apple-darwin10 ; <rdar://problem/7755473> ; PR12821 diff --git a/test/CodeGen/X86/loop-blocks.ll b/test/CodeGen/X86/loop-blocks.ll index d14102f..4bd162b 100644 --- a/test/CodeGen/X86/loop-blocks.ll +++ b/test/CodeGen/X86/loop-blocks.ll @@ -41,7 +41,6 @@ done: ; CHECK-NEXT: align ; CHECK-NEXT: .LBB1_4: ; CHECK-NEXT: callq bar99 -; CHECK-NEXT: align ; CHECK-NEXT: .LBB1_1: ; CHECK-NEXT: callq body @@ -79,7 +78,6 @@ exit: ; CHECK-NEXT: .LBB2_5: ; CHECK-NEXT: callq block_a_true_func ; CHECK-NEXT: callq block_a_merge_func -; CHECK-NEXT: align ; CHECK-NEXT: .LBB2_1: ; CHECK-NEXT: callq body ; @@ -139,13 +137,13 @@ exit: ; CHECK-NEXT: align ; CHECK-NEXT: .LBB3_7: ; CHECK-NEXT: callq bar100 -; CHECK-NEXT: align ; CHECK-NEXT: .LBB3_1: ; CHECK-NEXT: callq loop_header ; CHECK: jl .LBB3_7 ; CHECK: jge .LBB3_3 ; CHECK-NEXT: callq bar101 ; CHECK-NEXT: jmp .LBB3_1 +; CHECK-NEXT: align ; CHECK-NEXT: .LBB3_3: ; CHECK: jge .LBB3_4 ; CHECK-NEXT: callq bar102 diff --git a/test/CodeGen/X86/lsr-loop-exit-cond.ll b/test/CodeGen/X86/lsr-loop-exit-cond.ll index 6e8d0bf..8a81f70 100644 --- a/test/CodeGen/X86/lsr-loop-exit-cond.ll +++ b/test/CodeGen/X86/lsr-loop-exit-cond.ll @@ -3,11 +3,11 @@ ; CHECK: t: ; CHECK: decq -; CHECK-NEXT: movl (%r11,%rax,4), %eax +; CHECK-NEXT: movl (%r9,%rax,4), %eax ; CHECK-NEXT: jne ; ATOM: t: -; ATOM: movl (%r10,%rax,4), %eax +; ATOM: movl (%r9,%rax,4), %eax ; ATOM-NEXT: decq ; ATOM-NEXT: jne diff --git a/test/CodeGen/X86/machine-cse.ll b/test/CodeGen/X86/machine-cse.ll index a757cde..d171fd5 100644 --- a/test/CodeGen/X86/machine-cse.ll +++ b/test/CodeGen/X86/machine-cse.ll @@ -99,3 +99,60 @@ return: ; preds = %if.end, %entry %retval.0 = phi i32 [ 1, %entry ], [ %., %if.end ] ret i32 %retval.0 } + +; rdar://11393714 +define i8* @bsd_memchr(i8* %s, i32 %a, i32 %c, i64 %n) nounwind ssp { +; CHECK: %entry +; CHECK: xorl +; CHECK: %preheader +; CHECK: %do.body +; CHECK-NOT: xorl +; CHECK: %do.cond +; CHECK-NOT: xorl +; CHECK: %return +entry: + %cmp = icmp eq i64 %n, 0 + br i1 %cmp, label %return, label %preheader + +preheader: + %conv2 = and i32 %c, 255 + br label %do.body + +do.body: + %n.addr.0 = phi i64 [ %dec, %do.cond ], [ %n, %preheader ] + %p.0 = phi i8* [ %incdec.ptr, %do.cond ], [ %s, %preheader ] + %cmp3 = icmp eq i32 %a, %conv2 + br i1 %cmp3, label %return, label %do.cond + +do.cond: + %incdec.ptr = getelementptr inbounds i8* %p.0, i64 1 + %dec = add i64 %n.addr.0, -1 + %cmp6 = icmp eq i64 %dec, 0 + br i1 %cmp6, label %return, label %do.body + +return: + %retval.0 = phi i8* [ null, %entry ], [ null, %do.cond ], [ %p.0, %do.body ] + ret i8* %retval.0 +} + +; PR13578 +@t2_global = external global i32 + +declare i1 @t2_func() + +define i32 @t2() { + store i32 42, i32* @t2_global + %c = call i1 @t2_func() + br i1 %c, label %a, label %b + +a: + %l = load i32* @t2_global + ret i32 %l + +b: + ret i32 0 + +; CHECK: t2: +; CHECK: t2_global@GOTPCREL(%rip) +; CHECK-NOT: t2_global@GOTPCREL(%rip) +} diff --git a/test/CodeGen/X86/memcmp.ll b/test/CodeGen/X86/memcmp.ll index f4bc1bb..723d1d8 100644 --- a/test/CodeGen/X86/memcmp.ll +++ b/test/CodeGen/X86/memcmp.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s +; RUN: llc < %s -disable-simplify-libcalls -mtriple=x86_64-linux | FileCheck %s --check-prefix=NOBUILTIN ; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s ; This tests codegen time inlining/optimization of memcmp @@ -23,6 +24,8 @@ return: ; preds = %entry ; CHECK: memcmp2: ; CHECK: movw ([[A0:%rdi|%rcx]]), %ax ; CHECK: cmpw ([[A1:%rsi|%rdx]]), %ax +; NOBUILTIN: memcmp2: +; NOBUILTIN: callq } define void @memcmp2a(i8* %X, i32* nocapture %P) nounwind { diff --git a/test/CodeGen/X86/memcpy.ll b/test/CodeGen/X86/memcpy.ll index 86c6862..39c7fba 100644 --- a/test/CodeGen/X86/memcpy.ll +++ b/test/CodeGen/X86/memcpy.ll @@ -65,18 +65,18 @@ entry: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %A, i8* %B, i64 64, i32 1, i1 false) ret void ; LINUX: test4: -; LINUX movq -; LINUX movq -; LINUX movq -; LINUX movq -; LINUX movq -; LINUX movq -; LINUX movq -; LINUX movq -; LINUX movq -; LINUX movq -; LINUX movq -; LINUX movq +; LINUX: movq +; LINUX: movq +; LINUX: movq +; LINUX: movq +; LINUX: movq +; LINUX: movq +; LINUX: movq +; LINUX: movq +; LINUX: movq +; LINUX: movq +; LINUX: movq +; LINUX: movq } diff --git a/test/CodeGen/X86/movgs.ll b/test/CodeGen/X86/movgs.ll index aeb540f..65ee7b1 100644 --- a/test/CodeGen/X86/movgs.ll +++ b/test/CodeGen/X86/movgs.ll @@ -55,4 +55,20 @@ entry: ; X64: ret } +; The two loads here both look identical to selection DAG, except for their +; address spaces. Make sure they aren't CSE'd. +define i32 @test_no_cse() nounwind readonly { +entry: + %tmp = load i32* addrspace(256)* getelementptr (i32* addrspace(256)* inttoptr (i32 72 to i32* addrspace(256)*), i32 31) ; <i32*> [#uses=1] + %tmp1 = load i32* %tmp ; <i32> [#uses=1] + %tmp2 = load i32* addrspace(257)* getelementptr (i32* addrspace(257)* inttoptr (i32 72 to i32* addrspace(257)*), i32 31) ; <i32*> [#uses=1] + %tmp3 = load i32* %tmp2 ; <i32> [#uses=1] + %tmp4 = add i32 %tmp1, %tmp3 + ret i32 %tmp4 +} +; X32: test_no_cse: +; X32: movl %gs:196 +; X32: movl %fs:196 +; X32: ret + declare <4 x i32> @llvm.x86.sse41.pmovsxwd(<8 x i16>) nounwind readnone diff --git a/test/CodeGen/X86/pr11334.ll b/test/CodeGen/X86/pr11334.ll new file mode 100644 index 0000000..e7e29e0 --- /dev/null +++ b/test/CodeGen/X86/pr11334.ll @@ -0,0 +1,64 @@ +; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=corei7 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=core-avx-i | FileCheck %s --check-prefix=AVX + +define <2 x double> @v2f2d_ext_vec(<2 x float> %v1) nounwind { +entry: +; CHECK: v2f2d_ext_vec +; CHECK: cvtps2pd +; AVX: v2f2d_ext_vec +; AVX: vcvtps2pd + %f1 = fpext <2 x float> %v1 to <2 x double> + ret <2 x double> %f1 +} + +define <3 x double> @v3f2d_ext_vec(<3 x float> %v1) nounwind { +entry: +; CHECK: v3f2d_ext_vec +; CHECK: cvtps2pd +; CHECK: movhlps +; CHECK: cvtps2pd +; AVX: v3f2d_ext_vec +; AVX: vcvtps2pd +; AVX: ret + %f1 = fpext <3 x float> %v1 to <3 x double> + ret <3 x double> %f1 +} + +define <4 x double> @v4f2d_ext_vec(<4 x float> %v1) nounwind { +entry: +; CHECK: v4f2d_ext_vec +; CHECK: cvtps2pd +; CHECK: movhlps +; CHECK: cvtps2pd +; AVX: v4f2d_ext_vec +; AVX: vcvtps2pd +; AVX: ret + %f1 = fpext <4 x float> %v1 to <4 x double> + ret <4 x double> %f1 +} + +define <8 x double> @v8f2d_ext_vec(<8 x float> %v1) nounwind { +entry: +; CHECK: v8f2d_ext_vec +; CHECK: cvtps2pd +; CHECK: cvtps2pd +; CHECK: movhlps +; CHECK: cvtps2pd +; CHECK: movhlps +; CHECK: cvtps2pd +; AVX: v8f2d_ext_vec +; AVX: vcvtps2pd +; AVX: vextractf128 +; AVX: vcvtps2pd +; AVX: ret + %f1 = fpext <8 x float> %v1 to <8 x double> + ret <8 x double> %f1 +} + +define void @test_vector_creation() nounwind { + %1 = insertelement <4 x double> undef, double 0.000000e+00, i32 2 + %2 = load double addrspace(1)* null + %3 = insertelement <4 x double> %1, double %2, i32 3 + store <4 x double> %3, <4 x double>* undef + ret void +} diff --git a/test/CodeGen/X86/pr13577.ll b/test/CodeGen/X86/pr13577.ll new file mode 100644 index 0000000..faaec26 --- /dev/null +++ b/test/CodeGen/X86/pr13577.ll @@ -0,0 +1,8 @@ +; RUN: llc < %s -march=x86-64 + +define x86_fp80 @foo(x86_fp80 %a) { + %1 = tail call x86_fp80 @copysignl(x86_fp80 0xK7FFF8000000000000000, x86_fp80 %a) nounwind readnone + ret x86_fp80 %1 +} + +declare x86_fp80 @copysignl(x86_fp80, x86_fp80) nounwind readnone diff --git a/test/CodeGen/X86/reverse_branches.ll b/test/CodeGen/X86/reverse_branches.ll new file mode 100644 index 0000000..9772125 --- /dev/null +++ b/test/CodeGen/X86/reverse_branches.ll @@ -0,0 +1,104 @@ +; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck %s + +@.str2 = private unnamed_addr constant [7 x i8] c"memchr\00", align 1 +@.str3 = private unnamed_addr constant [11 x i8] c"bsd_memchr\00", align 1 +@str4 = private unnamed_addr constant [5 x i8] c"Bug!\00" + +; Make sure at end of do.cond.i, we jump to do.body.i first to have a tighter +; inner loop. +define i32 @test_branches_order() uwtable ssp { +; CHECK: test_branches_order: +; CHECK: [[L0:LBB0_[0-9]+]]: ## %do.body.i +; CHECK: je +; CHECK: %do.cond.i +; CHECK: jne [[L0]] +; CHECK: jmp +; CHECK: %exit +entry: + %strs = alloca [1000 x [1001 x i8]], align 16 + br label %for.cond + +for.cond: + %j.0 = phi i32 [ 0, %entry ], [ %inc10, %for.inc9 ] + %cmp = icmp slt i32 %j.0, 1000 + br i1 %cmp, label %for.cond1, label %for.end11 + +for.cond1: + %indvars.iv50 = phi i64 [ %indvars.iv.next51, %for.body3 ], [ 0, %for.cond ] + %0 = trunc i64 %indvars.iv50 to i32 + %cmp2 = icmp slt i32 %0, 1000 + br i1 %cmp2, label %for.body3, label %for.inc9 + +for.body3: + %arraydecay = getelementptr inbounds [1000 x [1001 x i8]]* %strs, i64 0, i64 %indvars.iv50, i64 0 + %call = call i8* @memchr(i8* %arraydecay, i32 120, i64 1000) + %add.ptr = getelementptr inbounds [1000 x [1001 x i8]]* %strs, i64 0, i64 %indvars.iv50, i64 %indvars.iv50 + %cmp7 = icmp eq i8* %call, %add.ptr + %indvars.iv.next51 = add i64 %indvars.iv50, 1 + br i1 %cmp7, label %for.cond1, label %if.then + +if.then: + %puts = call i32 @puts(i8* getelementptr inbounds ([5 x i8]* @str4, i64 0, i64 0)) + call void @exit(i32 1) noreturn + unreachable + +for.inc9: + %inc10 = add nsw i32 %j.0, 1 + br label %for.cond + +for.end11: + %puts42 = call i32 @puts(i8* getelementptr inbounds ([7 x i8]* @.str2, i64 0, i64 0)) + br label %for.cond14 + +for.cond14: + %j13.0 = phi i32 [ 0, %for.end11 ], [ %inc39, %for.inc38 ] + %cmp15 = icmp slt i32 %j13.0, 1000 + br i1 %cmp15, label %for.cond18, label %for.end40 + +for.cond18: + %indvars.iv = phi i64 [ %indvars.iv.next, %exit ], [ 0, %for.cond14 ] + %1 = trunc i64 %indvars.iv to i32 + %cmp19 = icmp slt i32 %1, 1000 + br i1 %cmp19, label %for.body20, label %for.inc38 + +for.body20: + %arraydecay24 = getelementptr inbounds [1000 x [1001 x i8]]* %strs, i64 0, i64 %indvars.iv, i64 0 + br label %do.body.i + +do.body.i: + %n.addr.0.i = phi i64 [ %dec.i, %do.cond.i ], [ 1000, %for.body20 ] + %p.0.i = phi i8* [ %incdec.ptr.i, %do.cond.i ], [ %arraydecay24, %for.body20 ] + %2 = load i8* %p.0.i, align 1 + %cmp3.i = icmp eq i8 %2, 120 + br i1 %cmp3.i, label %exit, label %do.cond.i + +do.cond.i: + %incdec.ptr.i = getelementptr inbounds i8* %p.0.i, i64 1 + %dec.i = add i64 %n.addr.0.i, -1 + %cmp5.i = icmp eq i64 %dec.i, 0 + br i1 %cmp5.i, label %if.then32, label %do.body.i + +exit: + %add.ptr30 = getelementptr inbounds [1000 x [1001 x i8]]* %strs, i64 0, i64 %indvars.iv, i64 %indvars.iv + %cmp31 = icmp eq i8* %p.0.i, %add.ptr30 + %indvars.iv.next = add i64 %indvars.iv, 1 + br i1 %cmp31, label %for.cond18, label %if.then32 + +if.then32: + %puts43 = call i32 @puts(i8* getelementptr inbounds ([5 x i8]* @str4, i64 0, i64 0)) + call void @exit(i32 1) noreturn + unreachable + +for.inc38: + %inc39 = add nsw i32 %j13.0, 1 + br label %for.cond14 + +for.end40: + %puts44 = call i32 @puts(i8* getelementptr inbounds ([11 x i8]* @.str3, i64 0, i64 0)) + ret i32 0 +} + +declare i8* @memchr(i8*, i32, i64) nounwind readonly +declare void @exit(i32) noreturn +declare i32 @puts(i8* nocapture) nounwind + diff --git a/test/CodeGen/X86/rounding-ops.ll b/test/CodeGen/X86/rounding-ops.ll index 0dd74ea..51fcf64 100644 --- a/test/CodeGen/X86/rounding-ops.ll +++ b/test/CodeGen/X86/rounding-ops.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse41 | FileCheck -check-prefix=CHECK-SSE %s -; RUN: llc < %s -march=x86-64 -mattr=+avx | FileCheck -check-prefix=CHECK-AVX %s +; RUN: llc < %s -mtriple=x86_64-apple-macosx -mattr=+sse41 | FileCheck -check-prefix=CHECK-SSE %s +; RUN: llc < %s -mtriple=x86_64-apple-macosx -mattr=+avx | FileCheck -check-prefix=CHECK-AVX %s define float @test1(float %x) nounwind { %call = tail call float @floorf(float %x) nounwind readnone diff --git a/test/CodeGen/X86/select.ll b/test/CodeGen/X86/select.ll index c8d9345..2e39473 100644 --- a/test/CodeGen/X86/select.ll +++ b/test/CodeGen/X86/select.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=generic | FileCheck %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=atom | FileCheck -check-prefix=ATOM %s ; PR5757 %0 = type { i64, i32 } @@ -12,6 +13,10 @@ define i32 @test1(%0* %p, %0* %q, i1 %r) nounwind { ; CHECK: test1: ; CHECK: cmovneq %rdi, %rsi ; CHECK: movl (%rsi), %eax + +; ATOM: test1: +; ATOM: cmovneq %rdi, %rsi +; ATOM: movl (%rsi), %eax } @@ -31,6 +36,10 @@ bb91: ; preds = %bb84 ; CHECK: test2: ; CHECK: movnew ; CHECK: movswl + +; ATOM: test2: +; ATOM: movnew +; ATOM: movswl } declare i1 @return_false() @@ -44,6 +53,9 @@ entry: ret float %iftmp.0.0 ; CHECK: test3: ; CHECK: movss {{.*}},4), %xmm0 + +; ATOM: test3: +; ATOM: movss {{.*}},4), %xmm0 } define signext i8 @test4(i8* nocapture %P, double %F) nounwind readonly { @@ -55,6 +67,9 @@ entry: ret i8 %2 ; CHECK: test4: ; CHECK: movsbl ({{.*}},4), %eax + +; ATOM: test4: +; ATOM: movsbl ({{.*}},4), %eax } define void @test5(i1 %c, <2 x i16> %a, <2 x i16> %b, <2 x i16>* %p) nounwind { @@ -62,6 +77,8 @@ define void @test5(i1 %c, <2 x i16> %a, <2 x i16> %b, <2 x i16>* %p) nounwind { store <2 x i16> %x, <2 x i16>* %p ret void ; CHECK: test5: + +; ATOM: test5: } define void @test6(i32 %C, <4 x float>* %A, <4 x float>* %B) nounwind { @@ -79,6 +96,12 @@ define void @test6(i32 %C, <4 x float>* %A, <4 x float>* %B) nounwind { ; CHECK: ret ; CHECK: mulps ; CHECK: ret + +; ATOM: test6: +; ATOM: je +; ATOM: ret +; ATOM: mulps +; ATOM: ret } ; Select with fp80's @@ -89,6 +112,10 @@ define x86_fp80 @test7(i32 %tmp8) nounwind { ; CHECK: test7: ; CHECK: leaq ; CHECK: fldt (%r{{.}}x,%r{{.}}x) + +; ATOM: test7: +; ATOM: leaq +; ATOM: fldt (%r{{.}}x,%r{{.}}x) } ; widening select v6i32 and then a sub @@ -99,6 +126,8 @@ define void @test8(i1 %c, <6 x i32>* %dst.addr, <6 x i32> %src1,<6 x i32> %src2) ret void ; CHECK: test8: + +; ATOM: test8: } @@ -113,6 +142,12 @@ define i64 @test9(i64 %x, i64 %y) nounwind readnone ssp noredzone { ; CHECK: sbbq %rax, %rax ; CHECK: orq %rsi, %rax ; CHECK: ret + +; ATOM: test9: +; ATOM: cmpq $1, %rdi +; ATOM: sbbq %rax, %rax +; ATOM: orq %rsi, %rax +; ATOM: ret } ;; Same as test9 @@ -125,6 +160,12 @@ define i64 @test9a(i64 %x, i64 %y) nounwind readnone ssp noredzone { ; CHECK: sbbq %rax, %rax ; CHECK: orq %rsi, %rax ; CHECK: ret + +; ATOM: test9a: +; ATOM: cmpq $1, %rdi +; ATOM: sbbq %rax, %rax +; ATOM: orq %rsi, %rax +; ATOM: ret } define i64 @test9b(i64 %x, i64 %y) nounwind readnone ssp noredzone { @@ -137,6 +178,12 @@ define i64 @test9b(i64 %x, i64 %y) nounwind readnone ssp noredzone { ; CHECK: sbbq %rax, %rax ; CHECK: orq %rsi, %rax ; CHECK: ret + +; ATOM: test9b: +; ATOM: cmpq $1, %rdi +; ATOM: sbbq %rax, %rax +; ATOM: orq %rsi, %rax +; ATOM: ret } ;; Select between -1 and 1. @@ -149,6 +196,12 @@ define i64 @test10(i64 %x, i64 %y) nounwind readnone ssp noredzone { ; CHECK: sbbq %rax, %rax ; CHECK: orq $1, %rax ; CHECK: ret + +; ATOM: test10: +; ATOM: cmpq $1, %rdi +; ATOM: sbbq %rax, %rax +; ATOM: orq $1, %rax +; ATOM: ret } @@ -163,6 +216,13 @@ define i64 @test11(i64 %x, i64 %y) nounwind readnone ssp noredzone { ; CHECK: notq %rax ; CHECK: orq %rsi, %rax ; CHECK: ret + +; ATOM: test11: +; ATOM: cmpq $1, %rdi +; ATOM: sbbq %rax, %rax +; ATOM: notq %rax +; ATOM: orq %rsi, %rax +; ATOM: ret } define i64 @test11a(i64 %x, i64 %y) nounwind readnone ssp noredzone { @@ -175,6 +235,13 @@ define i64 @test11a(i64 %x, i64 %y) nounwind readnone ssp noredzone { ; CHECK: notq %rax ; CHECK: orq %rsi, %rax ; CHECK: ret + +; ATOM: test11a: +; ATOM: cmpq $1, %rdi +; ATOM: sbbq %rax, %rax +; ATOM: notq %rax +; ATOM: orq %rsi, %rax +; ATOM: ret } @@ -189,10 +256,16 @@ entry: %call = tail call noalias i8* @_Znam(i64 %D) nounwind noredzone ret i8* %call ; CHECK: test12: -; CHECK: mulq ; CHECK: movq $-1, %rdi +; CHECK: mulq ; CHECK: cmovnoq %rax, %rdi ; CHECK: jmp __Znam + +; ATOM: test12: +; ATOM: mulq +; ATOM: movq $-1, %rdi +; ATOM: cmovnoq %rax, %rdi +; ATOM: jmp __Znam } declare { i64, i1 } @llvm.umul.with.overflow.i64(i64, i64) nounwind readnone @@ -205,6 +278,11 @@ define i32 @test13(i32 %a, i32 %b) nounwind { ; CHECK: cmpl ; CHECK-NEXT: sbbl ; CHECK-NEXT: ret + +; ATOM: test13: +; ATOM: cmpl +; ATOM-NEXT: sbbl +; ATOM-NEXT: ret } define i32 @test14(i32 %a, i32 %b) nounwind { @@ -216,6 +294,12 @@ define i32 @test14(i32 %a, i32 %b) nounwind { ; CHECK-NEXT: sbbl ; CHECK-NEXT: notl ; CHECK-NEXT: ret + +; ATOM: test14: +; ATOM: cmpl +; ATOM-NEXT: sbbl +; ATOM-NEXT: notl +; ATOM-NEXT: ret } ; rdar://10961709 @@ -227,6 +311,10 @@ entry: ; CHECK: test15: ; CHECK: negl ; CHECK: sbbl + +; ATOM: test15: +; ATOM: negl +; ATOM: sbbl } define i64 @test16(i64 %x) nounwind uwtable readnone ssp { @@ -237,6 +325,10 @@ entry: ; CHECK: test16: ; CHECK: negq ; CHECK: sbbq + +; ATOM: test16: +; ATOM: negq +; ATOM: sbbq } define i16 @test17(i16 %x) nounwind { @@ -247,4 +339,8 @@ entry: ; CHECK: test17: ; CHECK: negw ; CHECK: sbbw + +; ATOM: test17: +; ATOM: negw +; ATOM: sbbw } diff --git a/test/CodeGen/X86/sincos.ll b/test/CodeGen/X86/sincos.ll index e81860b..1479be1 100644 --- a/test/CodeGen/X86/sincos.ll +++ b/test/CodeGen/X86/sincos.ll @@ -1,6 +1,6 @@ ; Make sure this testcase codegens to the sin and cos instructions, not calls -; RUN: llc < %s -march=x86 -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | FileCheck %s --check-prefix=SIN -; RUN: llc < %s -march=x86 -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | FileCheck %s --check-prefix=COS +; RUN: llc < %s -mtriple=i686-apple-macosx -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | FileCheck %s --check-prefix=SIN +; RUN: llc < %s -mtriple=i686-apple-macosx -mattr=-sse,-sse2,-sse3 -enable-unsafe-fp-math | FileCheck %s --check-prefix=COS declare float @sinf(float) readonly diff --git a/test/CodeGen/X86/sink-out-of-loop.ll b/test/CodeGen/X86/sink-out-of-loop.ll new file mode 100644 index 0000000..c600f92 --- /dev/null +++ b/test/CodeGen/X86/sink-out-of-loop.ll @@ -0,0 +1,54 @@ +; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck %s + +; A MOV32ri is inside a loop, it has two successors, one successor is inside the +; same loop, the other successor is outside the loop. We should be able to sink +; MOV32ri outside the loop. +; rdar://11980766 +define i32 @sink_succ(i32 %argc, i8** nocapture %argv) nounwind uwtable ssp { +; CHECK: sink_succ +; CHECK: [[OUTER_LN1:LBB0_[0-9]+]]: ## %preheader +; CHECK: %exit +; CHECK-NOT: movl +; CHECK: jne [[OUTER_LN1]] +; CHECK: movl +; CHECK: [[LN2:LBB0_[0-9]+]]: ## %for.body2 +; CHECK: jne [[LN2]] +; CHECK: ret +entry: + br label %preheader + +preheader: + %i.127 = phi i32 [ 0, %entry ], [ %inc9, %exit ] + br label %for.body1.lr + +for.body1.lr: + %iv30 = phi i32 [ 1, %preheader ], [ %iv.next31, %for.inc40.i ] + br label %for.body1 + +for.body1: + %iv.i = phi i64 [ 0, %for.body1.lr ], [ %iv.next.i, %for.body1 ] + %iv.next.i = add i64 %iv.i, 1 + %lftr.wideiv32 = trunc i64 %iv.next.i to i32 + %exitcond33 = icmp eq i32 %lftr.wideiv32, %iv30 + br i1 %exitcond33, label %for.inc40.i, label %for.body1 + +for.inc40.i: + %iv.next31 = add i32 %iv30, 1 + %exitcond49.i = icmp eq i32 %iv.next31, 32 + br i1 %exitcond49.i, label %exit, label %for.body1.lr + +exit: + %inc9 = add nsw i32 %i.127, 1 + %exitcond34 = icmp eq i32 %inc9, 10 + br i1 %exitcond34, label %for.body2, label %preheader + +for.body2: + %iv = phi i64 [ %iv.next, %for.body2 ], [ 0, %exit ] + %iv.next = add i64 %iv, 1 + %lftr.wideiv = trunc i64 %iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 2048 + br i1 %exitcond, label %for.end20, label %for.body2 + +for.end20: + ret i32 0 +} diff --git a/test/CodeGen/X86/sse-minmax.ll b/test/CodeGen/X86/sse-minmax.ll index 4405f68..0ba0215 100644 --- a/test/CodeGen/X86/sse-minmax.ll +++ b/test/CodeGen/X86/sse-minmax.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=x86-64 -mcpu=nehalem -asm-verbose=false | FileCheck %s -; RUN: llc < %s -march=x86-64 -mcpu=nehalem -asm-verbose=false -enable-unsafe-fp-math -enable-no-nans-fp-math | FileCheck -check-prefix=UNSAFE %s -; RUN: llc < %s -march=x86-64 -mcpu=nehalem -asm-verbose=false -enable-no-nans-fp-math | FileCheck -check-prefix=FINITE %s +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=nehalem -asm-verbose=false | FileCheck %s +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=nehalem -asm-verbose=false -enable-unsafe-fp-math -enable-no-nans-fp-math | FileCheck -check-prefix=UNSAFE %s +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-apple-darwin -mcpu=nehalem -asm-verbose=false -enable-no-nans-fp-math | FileCheck -check-prefix=FINITE %s ; Some of these patterns can be matched as SSE min or max. Some of ; then can be matched provided that the operands are swapped. @@ -47,8 +47,7 @@ define double @olt(double %x, double %y) nounwind { ; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; CHECK-NEXT: ret ; UNSAFE: ogt_inverse: -; UNSAFE-NEXT: minsd %xmm0, %xmm1 -; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 +; UNSAFE-NEXT: minsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: ogt_inverse: ; FINITE-NEXT: minsd %xmm0, %xmm1 @@ -65,8 +64,7 @@ define double @ogt_inverse(double %x, double %y) nounwind { ; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; CHECK-NEXT: ret ; UNSAFE: olt_inverse: -; UNSAFE-NEXT: maxsd %xmm0, %xmm1 -; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 +; UNSAFE-NEXT: maxsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: olt_inverse: ; FINITE-NEXT: maxsd %xmm0, %xmm1 @@ -107,8 +105,7 @@ define double @ole(double %x, double %y) nounwind { ; CHECK: oge_inverse: ; CHECK-NEXT: ucomisd %xmm1, %xmm0 ; UNSAFE: oge_inverse: -; UNSAFE-NEXT: minsd %xmm0, %xmm1 -; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 +; UNSAFE-NEXT: minsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: oge_inverse: ; FINITE-NEXT: minsd %xmm0, %xmm1 @@ -123,8 +120,7 @@ define double @oge_inverse(double %x, double %y) nounwind { ; CHECK: ole_inverse: ; CHECK-NEXT: ucomisd %xmm0, %xmm1 ; UNSAFE: ole_inverse: -; UNSAFE-NEXT: maxsd %xmm0, %xmm1 -; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 +; UNSAFE-NEXT: maxsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: ole_inverse: ; FINITE-NEXT: maxsd %xmm0, %xmm1 @@ -142,7 +138,8 @@ define double @ole_inverse(double %x, double %y) nounwind { ; CHECK-NEXT: ret ; UNSAFE: ogt_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 -; UNSAFE-NEXT: maxsd %xmm1, %xmm0 +; UNSAFE-NEXT: maxsd %xmm0, %xmm1 +; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: ogt_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 @@ -160,7 +157,8 @@ define double @ogt_x(double %x) nounwind { ; CHECK-NEXT: ret ; UNSAFE: olt_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 -; UNSAFE-NEXT: minsd %xmm1, %xmm0 +; UNSAFE-NEXT: minsd %xmm0, %xmm1 +; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: olt_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 @@ -218,7 +216,8 @@ define double @olt_inverse_x(double %x) nounwind { ; CHECK: ucomisd %xmm1, %xmm0 ; UNSAFE: oge_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 -; UNSAFE-NEXT: maxsd %xmm1, %xmm0 +; UNSAFE-NEXT: maxsd %xmm0, %xmm1 +; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: oge_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 @@ -234,7 +233,8 @@ define double @oge_x(double %x) nounwind { ; CHECK: ucomisd %xmm0, %xmm1 ; UNSAFE: ole_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 -; UNSAFE-NEXT: minsd %xmm1, %xmm0 +; UNSAFE-NEXT: minsd %xmm0, %xmm1 +; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: ole_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 @@ -313,8 +313,7 @@ define double @ult(double %x, double %y) nounwind { ; CHECK: ugt_inverse: ; CHECK: ucomisd %xmm0, %xmm1 ; UNSAFE: ugt_inverse: -; UNSAFE-NEXT: minsd %xmm0, %xmm1 -; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 +; UNSAFE-NEXT: minsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: ugt_inverse: ; FINITE-NEXT: minsd %xmm0, %xmm1 @@ -329,8 +328,7 @@ define double @ugt_inverse(double %x, double %y) nounwind { ; CHECK: ult_inverse: ; CHECK: ucomisd %xmm1, %xmm0 ; UNSAFE: ult_inverse: -; UNSAFE-NEXT: maxsd %xmm0, %xmm1 -; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 +; UNSAFE-NEXT: maxsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: ult_inverse: ; FINITE-NEXT: maxsd %xmm0, %xmm1 @@ -378,8 +376,7 @@ define double @ule(double %x, double %y) nounwind { ; CHECK-NEXT: minsd %xmm1, %xmm0 ; CHECK-NEXT: ret ; UNSAFE: uge_inverse: -; UNSAFE-NEXT: minsd %xmm0, %xmm1 -; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 +; UNSAFE-NEXT: minsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: uge_inverse: ; FINITE-NEXT: minsd %xmm0, %xmm1 @@ -395,8 +392,7 @@ define double @uge_inverse(double %x, double %y) nounwind { ; CHECK-NEXT: maxsd %xmm1, %xmm0 ; CHECK-NEXT: ret ; UNSAFE: ule_inverse: -; UNSAFE-NEXT: maxsd %xmm0, %xmm1 -; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 +; UNSAFE-NEXT: maxsd %xmm1, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: ule_inverse: ; FINITE-NEXT: maxsd %xmm0, %xmm1 @@ -412,7 +408,8 @@ define double @ule_inverse(double %x, double %y) nounwind { ; CHECK: ucomisd %xmm0, %xmm1 ; UNSAFE: ugt_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 -; UNSAFE-NEXT: maxsd %xmm1, %xmm0 +; UNSAFE-NEXT: maxsd %xmm0, %xmm1 +; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: ugt_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 @@ -428,7 +425,8 @@ define double @ugt_x(double %x) nounwind { ; CHECK: ucomisd %xmm1, %xmm0 ; UNSAFE: ult_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 -; UNSAFE-NEXT: minsd %xmm1, %xmm0 +; UNSAFE-NEXT: minsd %xmm0, %xmm1 +; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: ult_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 @@ -483,7 +481,8 @@ define double @ult_inverse_x(double %x) nounwind { ; CHECK-NEXT: ret ; UNSAFE: uge_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 -; UNSAFE-NEXT: maxsd %xmm1, %xmm0 +; UNSAFE-NEXT: maxsd %xmm0, %xmm1 +; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: uge_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 @@ -502,7 +501,8 @@ define double @uge_x(double %x) nounwind { ; CHECK-NEXT: ret ; UNSAFE: ule_x: ; UNSAFE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 -; UNSAFE-NEXT: minsd %xmm1, %xmm0 +; UNSAFE-NEXT: minsd %xmm0, %xmm1 +; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: ule_x: ; FINITE-NEXT: xorp{{[sd]}} %xmm1, %xmm1 @@ -590,9 +590,7 @@ define double @olt_y(double %x) nounwind { ; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; CHECK-NEXT: ret ; UNSAFE: ogt_inverse_y: -; UNSAFE-NEXT: movsd {{[^,]*}}, %xmm1 -; UNSAFE-NEXT: minsd %xmm0, %xmm1 -; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 +; UNSAFE-NEXT: minsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: ogt_inverse_y: ; FINITE-NEXT: movsd {{[^,]*}}, %xmm1 @@ -611,9 +609,7 @@ define double @ogt_inverse_y(double %x) nounwind { ; CHECK-NEXT: movap{{[sd]}} %xmm1, %xmm0 ; CHECK-NEXT: ret ; UNSAFE: olt_inverse_y: -; UNSAFE-NEXT: movsd {{[^,]*}}, %xmm1 -; UNSAFE-NEXT: maxsd %xmm0, %xmm1 -; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 +; UNSAFE-NEXT: maxsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: olt_inverse_y: ; FINITE-NEXT: movsd {{[^,]*}}, %xmm1 @@ -657,9 +653,7 @@ define double @ole_y(double %x) nounwind { ; CHECK: oge_inverse_y: ; CHECK: ucomisd %xmm ; UNSAFE: oge_inverse_y: -; UNSAFE-NEXT: movsd {{[^,]*}}, %xmm1 -; UNSAFE-NEXT: minsd %xmm0, %xmm1 -; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 +; UNSAFE-NEXT: minsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: oge_inverse_y: ; FINITE-NEXT: movsd {{[^,]*}}, %xmm1 @@ -675,9 +669,7 @@ define double @oge_inverse_y(double %x) nounwind { ; CHECK: ole_inverse_y: ; CHECK: ucomisd %xmm ; UNSAFE: ole_inverse_y: -; UNSAFE-NEXT: movsd {{[^,]*}}, %xmm1 -; UNSAFE-NEXT: maxsd %xmm0, %xmm1 -; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 +; UNSAFE-NEXT: maxsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: ole_inverse_y: ; FINITE-NEXT: movsd {{[^,]*}}, %xmm1 @@ -721,9 +713,7 @@ define double @ult_y(double %x) nounwind { ; CHECK: ugt_inverse_y: ; CHECK: ucomisd %xmm ; UNSAFE: ugt_inverse_y: -; UNSAFE-NEXT: movsd {{[^,]*}}, %xmm1 -; UNSAFE-NEXT: minsd %xmm0, %xmm1 -; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 +; UNSAFE-NEXT: minsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: ugt_inverse_y: ; FINITE-NEXT: movsd {{[^,]*}}, %xmm1 @@ -739,9 +729,7 @@ define double @ugt_inverse_y(double %x) nounwind { ; CHECK: ult_inverse_y: ; CHECK: ucomisd %xmm ; UNSAFE: ult_inverse_y: -; UNSAFE-NEXT: movsd {{[^,]*}}, %xmm1 -; UNSAFE-NEXT: maxsd %xmm0, %xmm1 -; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 +; UNSAFE-NEXT: maxsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: ult_inverse_y: ; FINITE-NEXT: movsd {{[^,]*}}, %xmm1 @@ -792,9 +780,7 @@ define double @ule_y(double %x) nounwind { ; CHECK-NEXT: minsd {{[^,]*}}, %xmm0 ; CHECK-NEXT: ret ; UNSAFE: uge_inverse_y: -; UNSAFE-NEXT: movsd {{[^,]*}}, %xmm1 -; UNSAFE-NEXT: minsd %xmm0, %xmm1 -; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 +; UNSAFE-NEXT: minsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: uge_inverse_y: ; FINITE-NEXT: movsd {{[^,]*}}, %xmm1 @@ -811,9 +797,7 @@ define double @uge_inverse_y(double %x) nounwind { ; CHECK-NEXT: maxsd {{[^,]*}}, %xmm0 ; CHECK-NEXT: ret ; UNSAFE: ule_inverse_y: -; UNSAFE-NEXT: movsd {{[^,]*}}, %xmm1 -; UNSAFE-NEXT: maxsd %xmm0, %xmm1 -; UNSAFE-NEXT: movap{{[sd]}} %xmm1, %xmm0 +; UNSAFE-NEXT: maxsd {{[^,]*}}, %xmm0 ; UNSAFE-NEXT: ret ; FINITE: ule_inverse_y: ; FINITE-NEXT: movsd {{[^,]*}}, %xmm1 diff --git a/test/CodeGen/X86/stack-align.ll b/test/CodeGen/X86/stack-align.ll index f6c13ec..0ddb237 100644 --- a/test/CodeGen/X86/stack-align.ll +++ b/test/CodeGen/X86/stack-align.ll @@ -10,11 +10,11 @@ target triple = "i686-apple-darwin8" define void @test({ double, double }* byval %z, double* %P) nounwind { entry: %tmp3 = load double* @G, align 16 ; <double> [#uses=1] - %tmp4 = tail call double @fabs( double %tmp3 ) ; <double> [#uses=1] + %tmp4 = tail call double @fabs( double %tmp3 ) readnone ; <double> [#uses=1] store volatile double %tmp4, double* %P %tmp = getelementptr { double, double }* %z, i32 0, i32 0 ; <double*> [#uses=1] %tmp1 = load volatile double* %tmp, align 8 ; <double> [#uses=1] - %tmp2 = tail call double @fabs( double %tmp1 ) ; <double> [#uses=1] + %tmp2 = tail call double @fabs( double %tmp1 ) readnone ; <double> [#uses=1] ; CHECK: andpd{{.*}}4(%esp), %xmm %tmp6 = fadd double %tmp4, %tmp2 ; <double> [#uses=1] store volatile double %tmp6, double* %P, align 8 diff --git a/test/CodeGen/X86/stack-protector-linux.ll b/test/CodeGen/X86/stack-protector.ll index c075114..c075114 100644 --- a/test/CodeGen/X86/stack-protector-linux.ll +++ b/test/CodeGen/X86/stack-protector.ll diff --git a/test/CodeGen/X86/tailcall-cgp-dup.ll b/test/CodeGen/X86/tailcall-cgp-dup.ll new file mode 100644 index 0000000..a80b90f --- /dev/null +++ b/test/CodeGen/X86/tailcall-cgp-dup.ll @@ -0,0 +1,87 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s + +; Teach CGP to dup returns to enable tail call optimization. +; rdar://9147433 + +define i32 @foo(i32 %x) nounwind ssp { +; CHECK: foo: +entry: + switch i32 %x, label %return [ + i32 1, label %sw.bb + i32 2, label %sw.bb1 + i32 3, label %sw.bb3 + i32 4, label %sw.bb5 + i32 5, label %sw.bb7 + i32 6, label %sw.bb9 + ] + +sw.bb: ; preds = %entry +; CHECK: jmp _f1 + %call = tail call i32 @f1() nounwind + br label %return + +sw.bb1: ; preds = %entry +; CHECK: jmp _f2 + %call2 = tail call i32 @f2() nounwind + br label %return + +sw.bb3: ; preds = %entry +; CHECK: jmp _f3 + %call4 = tail call i32 @f3() nounwind + br label %return + +sw.bb5: ; preds = %entry +; CHECK: jmp _f4 + %call6 = tail call i32 @f4() nounwind + br label %return + +sw.bb7: ; preds = %entry +; CHECK: jmp _f5 + %call8 = tail call i32 @f5() nounwind + br label %return + +sw.bb9: ; preds = %entry +; CHECK: jmp _f6 + %call10 = tail call i32 @f6() nounwind + br label %return + +return: ; preds = %entry, %sw.bb9, %sw.bb7, %sw.bb5, %sw.bb3, %sw.bb1, %sw.bb + %retval.0 = phi i32 [ %call10, %sw.bb9 ], [ %call8, %sw.bb7 ], [ %call6, %sw.bb5 ], [ %call4, %sw.bb3 ], [ %call2, %sw.bb1 ], [ %call, %sw.bb ], [ 0, %entry ] + ret i32 %retval.0 +} + +declare i32 @f1() + +declare i32 @f2() + +declare i32 @f3() + +declare i32 @f4() + +declare i32 @f5() + +declare i32 @f6() + +; rdar://11958338 +%0 = type opaque + +declare i8* @bar(i8*) uwtable optsize noinline ssp + +define hidden %0* @thingWithValue(i8* %self) uwtable ssp { +entry: +; CHECK: thingWithValue: +; CHECK: jmp _bar + br i1 undef, label %if.then.i, label %if.else.i + +if.then.i: ; preds = %entry + br label %someThingWithValue.exit + +if.else.i: ; preds = %entry + %call4.i = tail call i8* @bar(i8* undef) optsize + br label %someThingWithValue.exit + +someThingWithValue.exit: ; preds = %if.else.i, %if.then.i + %retval.0.in.i = phi i8* [ undef, %if.then.i ], [ %call4.i, %if.else.i ] + %retval.0.i = bitcast i8* %retval.0.in.i to %0* + ret %0* %retval.0.i +} diff --git a/test/CodeGen/X86/unreachable-stack-protector.ll b/test/CodeGen/X86/unreachable-stack-protector.ll deleted file mode 100644 index b066297..0000000 --- a/test/CodeGen/X86/unreachable-stack-protector.ll +++ /dev/null @@ -1,19 +0,0 @@ -; RUN: llc < %s -disable-cgp-delete-dead-blocks | FileCheck %s -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" -target triple = "x86_64-apple-darwin10.0.0" - -declare i64 @llvm.objectsize.i64(i8*, i1) nounwind readnone - -define void @test5() nounwind optsize noinline ssp { -entry: -; CHECK: movq ___stack_chk_guard@GOTPCREL(%rip) - %buf = alloca [64 x i8], align 16 - %0 = call i64 @llvm.objectsize.i64(i8* undef, i1 false) - br i1 false, label %if.end, label %if.then - -if.then: ; preds = %entry - unreachable - -if.end: ; preds = %entry - ret void -} diff --git a/test/CodeGen/X86/vec_compare.ll b/test/CodeGen/X86/vec_compare.ll index 39c9b77..367dd27 100644 --- a/test/CodeGen/X86/vec_compare.ll +++ b/test/CodeGen/X86/vec_compare.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -mcpu=yonah | FileCheck %s +; RUN: llc < %s -march=x86 -mcpu=yonah -mtriple=i386-apple-darwin | FileCheck %s define <4 x i32> @test1(<4 x i32> %A, <4 x i32> %B) nounwind { diff --git a/test/CodeGen/X86/vec_ss_load_fold.ll b/test/CodeGen/X86/vec_ss_load_fold.ll index 3bd3f7b..c294df5 100644 --- a/test/CodeGen/X86/vec_ss_load_fold.ll +++ b/test/CodeGen/X86/vec_ss_load_fold.ll @@ -70,3 +70,17 @@ define <4 x float> @test4(<4 x float> %A, float *%b, i32 %C) nounwind { ; CHECK: call ; CHECK: roundss $4, %xmm{{.*}}, %xmm0 } + +; PR13576 +define <2 x double> @test5() nounwind uwtable readnone noinline { +entry: + %0 = tail call <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double> <double +4.569870e+02, double 1.233210e+02>, i32 128) nounwind readnone + ret <2 x double> %0 +; CHECK: test5: +; CHECK: mov +; CHECK: mov +; CHECK: cvtsi2sd +} + +declare <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double>, i32) nounwind readnone diff --git a/test/CodeGen/X86/xor.ll b/test/CodeGen/X86/xor.ll index 73416ef..996bfc4 100644 --- a/test/CodeGen/X86/xor.ll +++ b/test/CodeGen/X86/xor.ll @@ -31,7 +31,7 @@ entry: ; X64: test3: ; X64: notl ; X64: andl -; X64: shrl %eax +; X64: shrl ; X64: ret ; X32: test3: diff --git a/test/DebugInfo/Inputs/dwarfdump-test4.elf-x86-64 b/test/DebugInfo/Inputs/dwarfdump-test4.elf-x86-64 Binary files differnew file mode 100755 index 0000000..8848708 --- /dev/null +++ b/test/DebugInfo/Inputs/dwarfdump-test4.elf-x86-64 diff --git a/test/DebugInfo/dwarfdump-test.test b/test/DebugInfo/dwarfdump-test.test index faef03b..de23dcd 100644 --- a/test/DebugInfo/dwarfdump-test.test +++ b/test/DebugInfo/dwarfdump-test.test @@ -14,6 +14,9 @@ RUN: llvm-dwarfdump %p/Inputs/dwarfdump-test3.elf-x86-64 \ RUN: --address=0x573 --functions | FileCheck %s -check-prefix INCLUDE_TEST_1 RUN: llvm-dwarfdump %p/Inputs/dwarfdump-test3.elf-x86-64 \ RUN: --address=0x56d --functions | FileCheck %s -check-prefix INCLUDE_TEST_2 +RUN: llvm-dwarfdump %p/Inputs/dwarfdump-test4.elf-x86-64 \ +RUN: --address=0x55c --functions \ +RUN: | FileCheck %s -check-prefix MANY_SEQ_IN_LINE_TABLE MAIN: main MAIN-NEXT: /tmp/dbginfo{{[/\\]}}dwarfdump-test.cc:16:10 @@ -38,3 +41,6 @@ INCLUDE_TEST_1-NEXT: /tmp/dbginfo{{[/\\]}}include{{[/\\]}}decl2.h:1:0 INCLUDE_TEST_2: _Z3do1v INCLUDE_TEST_2-NEXT: /tmp/include{{[/\\]}}decl.h:5:0 + +MANY_SEQ_IN_LINE_TABLE: _Z1cv +MANY_SEQ_IN_LINE_TABLE-NEXT: /tmp/dbginfo/sequences{{[/\\]}}c.cc:2:0 diff --git a/test/Feature/linker_private_linkages.ll b/test/Feature/linker_private_linkages.ll index f9f2908..19bcbb4 100644 --- a/test/Feature/linker_private_linkages.ll +++ b/test/Feature/linker_private_linkages.ll @@ -4,4 +4,3 @@ @foo = linker_private hidden global i32 0 @bar = linker_private_weak hidden global i32 0 -@qux = linker_private_weak_def_auto global i32 0 diff --git a/test/Instrumentation/AddressSanitizer/basic.ll b/test/Instrumentation/AddressSanitizer/basic.ll index 294ca8a..d190001 100644 --- a/test/Instrumentation/AddressSanitizer/basic.ll +++ b/test/Instrumentation/AddressSanitizer/basic.ll @@ -23,15 +23,14 @@ define i32 @test_load(i32* %a) address_safety { ; CHECK: icmp sge i8 %{{.*}}, %[[LOAD_SHADOW]] ; CHECK: br i1 %{{.*}}, label %{{.*}}, label %{{.*}} ; -; The actual load comes next because ASan adds the crash block -; to the end of the function. -; CHECK: %tmp1 = load i32* %a -; CHECK: ret i32 %tmp1 - ; The crash block reports the error. ; CHECK: call void @__asan_report_load4(i64 %[[LOAD_ADDR]]) ; CHECK: unreachable ; +; The actual load. +; CHECK: %tmp1 = load i32* %a +; CHECK: ret i32 %tmp1 + entry: @@ -57,15 +56,14 @@ define void @test_store(i32* %a) address_safety { ; CHECK: icmp sge i8 %{{.*}}, %[[STORE_SHADOW]] ; CHECK: br i1 %{{.*}}, label %{{.*}}, label %{{.*}} ; -; The actual load comes next because ASan adds the crash block -; to the end of the function. -; CHECK: store i32 42, i32* %a -; CHECK: ret void -; ; The crash block reports the error. ; CHECK: call void @__asan_report_store4(i64 %[[STORE_ADDR]]) ; CHECK: unreachable ; +; The actual load. +; CHECK: store i32 42, i32* %a +; CHECK: ret void +; entry: store i32 42, i32* %a diff --git a/test/Instrumentation/AddressSanitizer/instrument_initializer_metadata.ll b/test/Instrumentation/AddressSanitizer/instrument_initializer_metadata.ll new file mode 100644 index 0000000..4725516 --- /dev/null +++ b/test/Instrumentation/AddressSanitizer/instrument_initializer_metadata.ll @@ -0,0 +1,36 @@ +; RUN: opt < %s -asan -asan-initialization-order -S | FileCheck %s +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" +target triple = "x86_64-unknown-linux-gnu" +@xxx = global i32 0, align 4 +; Clang will emit the following metadata identifying @xxx as dynamically +; initialized. +!0 = metadata !{i32* @xxx} +!llvm.asan.dynamically_initialized_globals = !{!0} + +define i32 @initializer() uwtable { +entry: + ret i32 42 +} + +define internal void @__cxx_global_var_init() section ".text.startup" { +entry: + %call = call i32 @initializer() + store i32 %call, i32* @xxx, align 4 + ret void +} + +define internal void @_GLOBAL__I_a() address_safety section ".text.startup" { +entry: + call void @__cxx_global_var_init() + ret void +} + +; Clang indicated that @xxx was dynamically initailized. +; __asan_{before,after}_dynamic_init should be called from _GLOBAL__I_a + +; CHECK: define internal void @_GLOBAL__I_a +; CHECK-NOT: ret +; CHECK: call void @__asan_before_dynamic_init +; CHECK: call void @__cxx_global_var_init +; CHECK: call void @__asan_after_dynamic_init +; CHECK: ret diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s index e682db5..5c2a214 100644 --- a/test/MC/ARM/basic-arm-instructions.s +++ b/test/MC/ARM/basic-arm-instructions.s @@ -141,6 +141,14 @@ Lforward: @ CHECK: adr r2, #3 @ encoding: [0x03,0x20,0x8f,0xe2] @ CHECK: adr r2, #-3 @ encoding: [0x03,0x20,0x4f,0xe2] + adr r1, #-0x0 + adr r1, #-0x12000000 + adr r1, #0x12000000 + +@ CHECK: adr r1, #-0 @ encoding: [0x00,0x10,0x4f,0xe2] +@ CHECK: adr r1, #-301989888 @ encoding: [0x12,0x14,0x4f,0xe2] +@ CHECK: adr r1, #301989888 @ encoding: [0x12,0x14,0x8f,0xe2] + @------------------------------------------------------------------------------ @ ADD @@ -559,6 +567,23 @@ Lforward: @------------------------------------------------------------------------------ @ DMB @------------------------------------------------------------------------------ + dmb #0xf + dmb #0xe + dmb #0xd + dmb #0xc + dmb #0xb + dmb #0xa + dmb #0x9 + dmb #0x8 + dmb #0x7 + dmb #0x6 + dmb #0x5 + dmb #0x4 + dmb #0x3 + dmb #0x2 + dmb #0x1 + dmb #0x0 + dmb sy dmb st dmb sh @@ -575,6 +600,23 @@ Lforward: @ CHECK: dmb sy @ encoding: [0x5f,0xf0,0x7f,0xf5] @ CHECK: dmb st @ encoding: [0x5e,0xf0,0x7f,0xf5] +@ CHECK: dmb #0xd @ encoding: [0x5d,0xf0,0x7f,0xf5] +@ CHECK: dmb #0xc @ encoding: [0x5c,0xf0,0x7f,0xf5] +@ CHECK: dmb ish @ encoding: [0x5b,0xf0,0x7f,0xf5] +@ CHECK: dmb ishst @ encoding: [0x5a,0xf0,0x7f,0xf5] +@ CHECK: dmb #0x9 @ encoding: [0x59,0xf0,0x7f,0xf5] +@ CHECK: dmb #0x8 @ encoding: [0x58,0xf0,0x7f,0xf5] +@ CHECK: dmb nsh @ encoding: [0x57,0xf0,0x7f,0xf5] +@ CHECK: dmb nshst @ encoding: [0x56,0xf0,0x7f,0xf5] +@ CHECK: dmb #0x5 @ encoding: [0x55,0xf0,0x7f,0xf5] +@ CHECK: dmb #0x4 @ encoding: [0x54,0xf0,0x7f,0xf5] +@ CHECK: dmb osh @ encoding: [0x53,0xf0,0x7f,0xf5] +@ CHECK: dmb oshst @ encoding: [0x52,0xf0,0x7f,0xf5] +@ CHECK: dmb #0x1 @ encoding: [0x51,0xf0,0x7f,0xf5] +@ CHECK: dmb #0x0 @ encoding: [0x50,0xf0,0x7f,0xf5] + +@ CHECK: dmb sy @ encoding: [0x5f,0xf0,0x7f,0xf5] +@ CHECK: dmb st @ encoding: [0x5e,0xf0,0x7f,0xf5] @ CHECK: dmb ish @ encoding: [0x5b,0xf0,0x7f,0xf5] @ CHECK: dmb ish @ encoding: [0x5b,0xf0,0x7f,0xf5] @ CHECK: dmb ishst @ encoding: [0x5a,0xf0,0x7f,0xf5] @@ -590,6 +632,26 @@ Lforward: @------------------------------------------------------------------------------ @ DSB @------------------------------------------------------------------------------ + dsb #0xf + dsb #0xe + dsb #0xd + dsb #0xc + dsb #0xb + dsb #0xa + dsb #0x9 + dsb #0x8 + dsb #0x7 + dsb #0x6 + dsb #0x5 + dsb #0x4 + dsb #0x3 + dsb #0x2 + dsb #0x1 + dsb #0x0 + + dsb 8 + dsb 7 + dsb sy dsb st dsb sh @@ -606,6 +668,26 @@ Lforward: @ CHECK: dsb sy @ encoding: [0x4f,0xf0,0x7f,0xf5] @ CHECK: dsb st @ encoding: [0x4e,0xf0,0x7f,0xf5] +@ CHECK: dsb #0xd @ encoding: [0x4d,0xf0,0x7f,0xf5] +@ CHECK: dsb #0xc @ encoding: [0x4c,0xf0,0x7f,0xf5] +@ CHECK: dsb ish @ encoding: [0x4b,0xf0,0x7f,0xf5] +@ CHECK: dsb ishst @ encoding: [0x4a,0xf0,0x7f,0xf5] +@ CHECK: dsb #0x9 @ encoding: [0x49,0xf0,0x7f,0xf5] +@ CHECK: dsb #0x8 @ encoding: [0x48,0xf0,0x7f,0xf5] +@ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5] +@ CHECK: dsb nshst @ encoding: [0x46,0xf0,0x7f,0xf5] +@ CHECK: dsb #0x5 @ encoding: [0x45,0xf0,0x7f,0xf5] +@ CHECK: dsb #0x4 @ encoding: [0x44,0xf0,0x7f,0xf5] +@ CHECK: dsb osh @ encoding: [0x43,0xf0,0x7f,0xf5] +@ CHECK: dsb oshst @ encoding: [0x42,0xf0,0x7f,0xf5] +@ CHECK: dsb #0x1 @ encoding: [0x41,0xf0,0x7f,0xf5] +@ CHECK: dsb #0x0 @ encoding: [0x40,0xf0,0x7f,0xf5] + +@ CHECK: dsb #0x8 @ encoding: [0x48,0xf0,0x7f,0xf5] +@ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5] + +@ CHECK: dsb sy @ encoding: [0x4f,0xf0,0x7f,0xf5] +@ CHECK: dsb st @ encoding: [0x4e,0xf0,0x7f,0xf5] @ CHECK: dsb ish @ encoding: [0x4b,0xf0,0x7f,0xf5] @ CHECK: dsb ish @ encoding: [0x4b,0xf0,0x7f,0xf5] @ CHECK: dsb ishst @ encoding: [0x4a,0xf0,0x7f,0xf5] diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s index 4cfe2f2..23d9f59 100644 --- a/test/MC/ARM/basic-thumb2-instructions.s +++ b/test/MC/ARM/basic-thumb2-instructions.s @@ -135,9 +135,11 @@ _func: subw r11, pc, #3270 adr.w r11, #-826 + adr.w r1, #-0x0 @ CHECK: subw r11, pc, #3270 @ encoding: [0xaf,0xf6,0xc6,0x4b] @ CHECK: adr.w r11, #-826 @ encoding: [0xaf,0xf2,0x3a,0x3b] +@ CHECK: adr.w r1, #-0 @ encoding: [0xaf,0xf2,0x00,0x01] @------------------------------------------------------------------------------ @ AND (immediate) @@ -415,6 +417,23 @@ _func: @------------------------------------------------------------------------------ @ DMB @------------------------------------------------------------------------------ + dmb #0xf + dmb #0xe + dmb #0xd + dmb #0xc + dmb #0xb + dmb #0xa + dmb #0x9 + dmb #0x8 + dmb #0x7 + dmb #0x6 + dmb #0x5 + dmb #0x4 + dmb #0x3 + dmb #0x2 + dmb #0x1 + dmb #0x0 + dmb sy dmb st dmb sh @@ -431,6 +450,23 @@ _func: @ CHECK: dmb sy @ encoding: [0xbf,0xf3,0x5f,0x8f] @ CHECK: dmb st @ encoding: [0xbf,0xf3,0x5e,0x8f] +@ CHECK: dmb #0xd @ encoding: [0xbf,0xf3,0x5d,0x8f] +@ CHECK: dmb #0xc @ encoding: [0xbf,0xf3,0x5c,0x8f] +@ CHECK: dmb ish @ encoding: [0xbf,0xf3,0x5b,0x8f] +@ CHECK: dmb ishst @ encoding: [0xbf,0xf3,0x5a,0x8f] +@ CHECK: dmb #0x9 @ encoding: [0xbf,0xf3,0x59,0x8f] +@ CHECK: dmb #0x8 @ encoding: [0xbf,0xf3,0x58,0x8f] +@ CHECK: dmb nsh @ encoding: [0xbf,0xf3,0x57,0x8f] +@ CHECK: dmb nshst @ encoding: [0xbf,0xf3,0x56,0x8f] +@ CHECK: dmb #0x5 @ encoding: [0xbf,0xf3,0x55,0x8f] +@ CHECK: dmb #0x4 @ encoding: [0xbf,0xf3,0x54,0x8f] +@ CHECK: dmb osh @ encoding: [0xbf,0xf3,0x53,0x8f] +@ CHECK: dmb oshst @ encoding: [0xbf,0xf3,0x52,0x8f] +@ CHECK: dmb #0x1 @ encoding: [0xbf,0xf3,0x51,0x8f] +@ CHECK: dmb #0x0 @ encoding: [0xbf,0xf3,0x50,0x8f] + +@ CHECK: dmb sy @ encoding: [0xbf,0xf3,0x5f,0x8f] +@ CHECK: dmb st @ encoding: [0xbf,0xf3,0x5e,0x8f] @ CHECK: dmb ish @ encoding: [0xbf,0xf3,0x5b,0x8f] @ CHECK: dmb ish @ encoding: [0xbf,0xf3,0x5b,0x8f] @ CHECK: dmb ishst @ encoding: [0xbf,0xf3,0x5a,0x8f] @@ -447,6 +483,23 @@ _func: @------------------------------------------------------------------------------ @ DSB @------------------------------------------------------------------------------ + dsb #0xf + dsb #0xe + dsb #0xd + dsb #0xc + dsb #0xb + dsb #0xa + dsb #0x9 + dsb #0x8 + dsb #0x7 + dsb #0x6 + dsb #0x5 + dsb #0x4 + dsb #0x3 + dsb #0x2 + dsb #0x1 + dsb #0x0 + dsb sy dsb st dsb sh @@ -463,6 +516,23 @@ _func: @ CHECK: dsb sy @ encoding: [0xbf,0xf3,0x4f,0x8f] @ CHECK: dsb st @ encoding: [0xbf,0xf3,0x4e,0x8f] +@ CHECK: dsb #0xd @ encoding: [0xbf,0xf3,0x4d,0x8f] +@ CHECK: dsb #0xc @ encoding: [0xbf,0xf3,0x4c,0x8f] +@ CHECK: dsb ish @ encoding: [0xbf,0xf3,0x4b,0x8f] +@ CHECK: dsb ishst @ encoding: [0xbf,0xf3,0x4a,0x8f] +@ CHECK: dsb #0x9 @ encoding: [0xbf,0xf3,0x49,0x8f] +@ CHECK: dsb #0x8 @ encoding: [0xbf,0xf3,0x48,0x8f] +@ CHECK: dsb nsh @ encoding: [0xbf,0xf3,0x47,0x8f] +@ CHECK: dsb nshst @ encoding: [0xbf,0xf3,0x46,0x8f] +@ CHECK: dsb #0x5 @ encoding: [0xbf,0xf3,0x45,0x8f] +@ CHECK: dsb #0x4 @ encoding: [0xbf,0xf3,0x44,0x8f] +@ CHECK: dsb osh @ encoding: [0xbf,0xf3,0x43,0x8f] +@ CHECK: dsb oshst @ encoding: [0xbf,0xf3,0x42,0x8f] +@ CHECK: dsb #0x1 @ encoding: [0xbf,0xf3,0x41,0x8f] +@ CHECK: dsb #0x0 @ encoding: [0xbf,0xf3,0x40,0x8f] + +@ CHECK: dsb sy @ encoding: [0xbf,0xf3,0x4f,0x8f] +@ CHECK: dsb st @ encoding: [0xbf,0xf3,0x4e,0x8f] @ CHECK: dsb ish @ encoding: [0xbf,0xf3,0x4b,0x8f] @ CHECK: dsb ish @ encoding: [0xbf,0xf3,0x4b,0x8f] @ CHECK: dsb ishst @ encoding: [0xbf,0xf3,0x4a,0x8f] @@ -782,6 +852,9 @@ _func: ldrd r3, r5, [r6], #-8 ldrd r3, r5, [r6] ldrd r8, r1, [r3, #0] + ldrd r0, r1, [r2, #-0] + ldrd r0, r1, [r2, #-0]! + ldrd r0, r1, [r2], #-0 @ CHECK: ldrd r3, r5, [r6, #24] @ encoding: [0xd6,0xe9,0x06,0x35] @ CHECK: ldrd r3, r5, [r6, #24]! @ encoding: [0xf6,0xe9,0x06,0x35] @@ -789,6 +862,9 @@ _func: @ CHECK: ldrd r3, r5, [r6], #-8 @ encoding: [0x76,0xe8,0x02,0x35] @ CHECK: ldrd r3, r5, [r6] @ encoding: [0xd6,0xe9,0x00,0x35] @ CHECK: ldrd r8, r1, [r3] @ encoding: [0xd3,0xe9,0x00,0x81] +@ CHECK: ldrd r0, r1, [r2, #-0] @ encoding: [0x52,0xe9,0x00,0x01] +@ CHECK: ldrd r0, r1, [r2, #-0]! @ encoding: [0x72,0xe9,0x00,0x01] +@ CHECK: ldrd r0, r1, [r2], #-0 @ encoding: [0x72,0xe8,0x00,0x01] @------------------------------------------------------------------------------ @@ -2566,6 +2642,9 @@ _func: strd r3, r5, [r6], #-8 strd r3, r5, [r6] strd r8, r1, [r3, #0] + strd r0, r1, [r2, #-0] + strd r0, r1, [r2, #-0]! + strd r0, r1, [r2], #-0 @ CHECK: strd r3, r5, [r6, #24] @ encoding: [0xc6,0xe9,0x06,0x35] @ CHECK: strd r3, r5, [r6, #24]! @ encoding: [0xe6,0xe9,0x06,0x35] @@ -2573,6 +2652,9 @@ _func: @ CHECK: strd r3, r5, [r6], #-8 @ encoding: [0x66,0xe8,0x02,0x35] @ CHECK: strd r3, r5, [r6] @ encoding: [0xc6,0xe9,0x00,0x35] @ CHECK: strd r8, r1, [r3] @ encoding: [0xc3,0xe9,0x00,0x81] +@ CHECK: strd r0, r1, [r2, #-0] @ encoding: [0x42,0xe9,0x00,0x01] +@ CHECK: strd r0, r1, [r2, #-0]! @ encoding: [0x62,0xe9,0x00,0x01] +@ CHECK: strd r0, r1, [r2], #-0 @ encoding: [0x62,0xe8,0x00,0x01] @------------------------------------------------------------------------------ diff --git a/test/MC/ARM/vfp4.s b/test/MC/ARM/vfp4.s index cc87a38..0a1fe92 100644 --- a/test/MC/ARM/vfp4.s +++ b/test/MC/ARM/vfp4.s @@ -1,5 +1,6 @@ @ RUN: llvm-mc < %s -triple armv7-unknown-unknown -show-encoding -mattr=+neon,+vfp4 | FileCheck %s --check-prefix=ARM @ RUN: llvm-mc < %s -triple thumbv7-unknown-unknown -show-encoding -mattr=+neon,+vfp4 | FileCheck %s --check-prefix=THUMB +@ RUN: llvm-mc < %s -triple thumbv7-unknown-unknown -show-encoding -mcpu=cortex-m4 | FileCheck %s --check-prefix=THUMB_V7EM @ ARM: vfma.f64 d16, d18, d17 @ encoding: [0xa1,0x0b,0xe2,0xee] @ THUMB: vfma.f64 d16, d18, d17 @ encoding: [0xe2,0xee,0xa1,0x0b] @@ -7,6 +8,7 @@ vfma.f64 d16, d18, d17 @ ARM: vfma.f32 s2, s4, s0 @ encoding: [0x00,0x1a,0xa2,0xee] @ THUMB: vfma.f32 s2, s4, s0 @ encoding: [0xa2,0xee,0x00,0x1a] +@ THUMB_V7EM: vfma.f32 s2, s4, s0 @ encoding: [0xa2,0xee,0x00,0x1a] vfma.f32 s2, s4, s0 @ ARM: vfma.f32 d16, d18, d17 @ encoding: [0xb1,0x0c,0x42,0xf2] @@ -23,6 +25,7 @@ vfnma.f64 d16, d18, d17 @ ARM: vfnma.f32 s2, s4, s0 @ encoding: [0x40,0x1a,0x92,0xee] @ THUMB: vfnma.f32 s2, s4, s0 @ encoding: [0x92,0xee,0x40,0x1a] +@ THUMB_V7EM: vfnma.f32 s2, s4, s0 @ encoding: [0x92,0xee,0x40,0x1a] vfnma.f32 s2, s4, s0 @ ARM: vfms.f64 d16, d18, d17 @ encoding: [0xe1,0x0b,0xe2,0xee] @@ -31,6 +34,7 @@ vfms.f64 d16, d18, d17 @ ARM: vfms.f32 s2, s4, s0 @ encoding: [0x40,0x1a,0xa2,0xee] @ THUMB: vfms.f32 s2, s4, s0 @ encoding: [0xa2,0xee,0x40,0x1a] +@ THUMB_V7EM: vfms.f32 s2, s4, s0 @ encoding: [0xa2,0xee,0x40,0x1a] vfms.f32 s2, s4, s0 @ ARM: vfms.f32 d16, d18, d17 @ encoding: [0xb1,0x0c,0x62,0xf2] diff --git a/test/MC/AsmParser/bad-macro.s b/test/MC/AsmParser/bad-macro.s new file mode 100644 index 0000000..313607b --- /dev/null +++ b/test/MC/AsmParser/bad-macro.s @@ -0,0 +1,9 @@ +// RUN: not llvm-mc -triple x86_64-apple-darwin10 %s 2>&1 | FileCheck %s + +.macro 23 + +// CHECK: expected identifier in '.macro' directive + +.macro abc 33 + +// CHECK: expected identifier in '.macro' directive diff --git a/test/MC/AsmParser/macro-args.s b/test/MC/AsmParser/macro-args.s index 13b197a..6d08421 100644 --- a/test/MC/AsmParser/macro-args.s +++ b/test/MC/AsmParser/macro-args.s @@ -42,3 +42,15 @@ top bar, 42 // CHECK-NOT: fred // CHECK: _bar // CHECK-NEXT: fred = 42 + + +.macro foo +foo_$0_$1_$2_$3: + nop +.endm + +foo 1, 2, 3, 4 +foo 1, , 3, 4 + +// CHECK: foo_1_2_3_4: +// CHECK: foo_1__3_4: diff --git a/test/MC/AsmParser/macros.s b/test/MC/AsmParser/macros.s index 2957592..dd2cc1f 100644 --- a/test/MC/AsmParser/macros.s +++ b/test/MC/AsmParser/macros.s @@ -37,3 +37,24 @@ test3 1,2 3 // CHECK: .globl "ab)(,) -- (cd)" test4 a b)(,),(cd) + +.macro test5 _a +.globl "\_a" +.endm + +test5 zed1 +// CHECK: .globl zed1 + +.macro test6 $a +.globl "\$a" +.endm + +test6 zed2 +// CHECK: .globl zed2 + +.macro test7 .a +.globl "\.a" +.endm + +test7 zed3 +// CHECK: .globl zed3 diff --git a/test/MC/COFF/seh.s b/test/MC/COFF/seh.s index 8cafcb3..3f72805 100644 --- a/test/MC/COFF/seh.s +++ b/test/MC/COFF/seh.s @@ -14,7 +14,6 @@ // CHECK-NEXT: IMAGE_SCN_CNT_INITIALIZED_DATA // CHECK-NEXT: IMAGE_SCN_ALIGN_4BYTES // CHECK-NEXT: IMAGE_SCN_MEM_READ -// CHECK-NEXT: IMAGE_SCN_MEM_WRITE // CHECK-NEXT: SectionData // CHECK-NEXT: 09 12 08 03 00 03 0F 30 - 0E 88 00 00 09 64 02 00 // CHECK-NEXT: 04 22 00 1A 00 00 00 00 - 00 00 00 00 21 00 00 00 diff --git a/test/MC/Disassembler/ARM/basic-arm-instructions.txt b/test/MC/Disassembler/ARM/basic-arm-instructions.txt index 40eb4cd..1100ce6 100644 --- a/test/MC/Disassembler/ARM/basic-arm-instructions.txt +++ b/test/MC/Disassembler/ARM/basic-arm-instructions.txt @@ -169,9 +169,15 @@ #------------------------------------------------------------------------------ # CHECK: add r2, pc, #3 # CHECK: sub r2, pc, #3 +# CHECK: sub r1, pc, #0 +# CHECK: sub r1, pc, #301989888 +# CHECK: add r1, pc, #301989888 0x03 0x20 0x8f 0xe2 0x03 0x20 0x4f 0xe2 +0x00 0x10 0x4f 0xe2 +0x12 0x14 0x4f 0xe2 +0x12 0x14 0x8f 0xe2 #------------------------------------------------------------------------------ # AND @@ -469,47 +475,77 @@ #------------------------------------------------------------------------------ # DMB #------------------------------------------------------------------------------ -# CHECK: dmb sy -# CHECK: dmb st -# CHECK: dmb ish -# CHECK: dmb ishst -# CHECK: dmb nsh -# CHECK: dmb nshst -# CHECK: dmb osh + +# CHECK: dmb #0x0 +# CHECK: dmb #0x1 # CHECK: dmb oshst -# CHECK: dmb +# CHECK: dmb osh +# CHECK: dmb #0x4 +# CHECK: dmb #0x5 +# CHECK: dmb nshst +# CHECK: dmb nsh +# CHECK: dmb #0x8 +# CHECK: dmb #0x9 +# CHECK: dmb ishst +# CHECK: dmb ish +# CHECK: dmb #0xc +# CHECK: dmb #0xd +# CHECK: dmb st +# CHECK: dmb sy -0x5f 0xf0 0x7f 0xf5 -0x5e 0xf0 0x7f 0xf5 -0x5b 0xf0 0x7f 0xf5 -0x5a 0xf0 0x7f 0xf5 -0x57 0xf0 0x7f 0xf5 -0x56 0xf0 0x7f 0xf5 -0x53 0xf0 0x7f 0xf5 +0x50 0xf0 0x7f 0xf5 +0x51 0xf0 0x7f 0xf5 0x52 0xf0 0x7f 0xf5 +0x53 0xf0 0x7f 0xf5 +0x54 0xf0 0x7f 0xf5 +0x55 0xf0 0x7f 0xf5 +0x56 0xf0 0x7f 0xf5 +0x57 0xf0 0x7f 0xf5 +0x58 0xf0 0x7f 0xf5 +0x59 0xf0 0x7f 0xf5 +0x5a 0xf0 0x7f 0xf5 +0x5b 0xf0 0x7f 0xf5 +0x5c 0xf0 0x7f 0xf5 +0x5d 0xf0 0x7f 0xf5 +0x5e 0xf0 0x7f 0xf5 0x5f 0xf0 0x7f 0xf5 #------------------------------------------------------------------------------ # DSB #------------------------------------------------------------------------------ -# CHECK: dsb sy -# CHECK: dsb st -# CHECK: dsb ish -# CHECK: dsb ishst -# CHECK: dsb nsh -# CHECK: dsb nshst -# CHECK: dsb osh -# CHECK: dsb oshst -# CHECK: dsb -0x4f 0xf0 0x7f 0xf5 -0x4e 0xf0 0x7f 0xf5 -0x4b 0xf0 0x7f 0xf5 -0x4a 0xf0 0x7f 0xf5 -0x47 0xf0 0x7f 0xf5 -0x46 0xf0 0x7f 0xf5 -0x43 0xf0 0x7f 0xf5 +# CHECK: dsb #0x0 +# CHECK: dsb #0x1 +# CHECK: dsb oshst +# CHECK: dsb osh +# CHECK: dsb #0x4 +# CHECK: dsb #0x5 +# CHECK: dsb nshst +# CHECK: dsb nsh +# CHECK: dsb #0x8 +# CHECK: dsb #0x9 +# CHECK: dsb ishst +# CHECK: dsb ish +# CHECK: dsb #0xc +# CHECK: dsb #0xd +# CHECK: dsb st +# CHECK: dsb sy + +0x40 0xf0 0x7f 0xf5 +0x41 0xf0 0x7f 0xf5 0x42 0xf0 0x7f 0xf5 +0x43 0xf0 0x7f 0xf5 +0x44 0xf0 0x7f 0xf5 +0x45 0xf0 0x7f 0xf5 +0x46 0xf0 0x7f 0xf5 +0x47 0xf0 0x7f 0xf5 +0x48 0xf0 0x7f 0xf5 +0x49 0xf0 0x7f 0xf5 +0x4a 0xf0 0x7f 0xf5 +0x4b 0xf0 0x7f 0xf5 +0x4c 0xf0 0x7f 0xf5 +0x4d 0xf0 0x7f 0xf5 +0x4e 0xf0 0x7f 0xf5 0x4f 0xf0 0x7f 0xf5 #------------------------------------------------------------------------------ diff --git a/test/MC/Disassembler/ARM/neon.txt b/test/MC/Disassembler/ARM/neon.txt index 96f8303..649424a 100644 --- a/test/MC/Disassembler/ARM/neon.txt +++ b/test/MC/Disassembler/ARM/neon.txt @@ -1931,14 +1931,6 @@ # CHECK: vmov.f32 d0, #1.600000e+01 # CHECK: vmov.f32 q0, #1.600000e+01 -# rdar://10798451 -0xe7 0xf9 0x32 0x1d -# CHECK vld2.8 {d17[], d19[]}, [r7, :16], r2 -0xe7 0xf9 0x3d 0x1d -# CHECK vld2.8 {d17[], d19[]}, [r7, :16]! -0xe7 0xf9 0x3f 0x1d -# CHECK vld2.8 {d17[], d19[]}, [r7, :16] - # rdar://11034702 0x0d 0x87 0x04 0xf4 # CHECK: vst1.8 {d8}, [r4]! diff --git a/test/MC/Disassembler/ARM/neont2.txt b/test/MC/Disassembler/ARM/neont2.txt index e721984..7d7010f 100644 --- a/test/MC/Disassembler/ARM/neont2.txt +++ b/test/MC/Disassembler/ARM/neont2.txt @@ -2042,3 +2042,13 @@ # CHECK: vld2.16 {d0[], d2[]}, [r3], r4 0xa3 0xf9 0xa4 0x0d # CHECK: vld2.32 {d0[], d2[]}, [r3], r4 + + +# rdar://10798451 +0xe7 0xf9 0x32 0x1d +# CHECK: vld2.8 {d17[], d19[]}, [r7, :16], r2 +0xe7 0xf9 0x3d 0x1d +# CHECK: vld2.8 {d17[], d19[]}, [r7, :16]! +0xe7 0xf9 0x3f 0x1d +# CHECK: vld2.8 {d17[], d19[]}, [r7, :16] + diff --git a/test/MC/Disassembler/ARM/thumb2.txt b/test/MC/Disassembler/ARM/thumb2.txt index 4d1b398..42ebe58 100644 --- a/test/MC/Disassembler/ARM/thumb2.txt +++ b/test/MC/Disassembler/ARM/thumb2.txt @@ -92,9 +92,11 @@ #------------------------------------------------------------------------------ # CHECK: subw r11, pc, #3270 # CHECK: subw r11, pc, #826 +# CHECK: subw r1, pc, #0 0xaf 0xf6 0xc6 0x4b 0xaf 0xf2 0x3a 0x3b +0xaf 0xf2 0x00 0x01 #------------------------------------------------------------------------------ # AND (immediate) @@ -344,23 +346,37 @@ #------------------------------------------------------------------------------ #CHECK: dmb sy #CHECK: dmb st +#CHECK: dmb #0xd +#CHECK: dmb #0xc #CHECK: dmb ish #CHECK: dmb ishst +#CHECK: dmb #0x9 +#CHECK: dmb #0x8 #CHECK: dmb nsh #CHECK: dmb nshst +#CHECK: dmb #0x5 +#CHECK: dmb #0x4 #CHECK: dmb osh #CHECK: dmb oshst -#CHECK: dmb +#CHECK: dmb #0x1 +#CHECK: dmb #0x0 0xbf 0xf3 0x5f 0x8f 0xbf 0xf3 0x5e 0x8f +0xbf 0xf3 0x5d 0x8f +0xbf 0xf3 0x5c 0x8f 0xbf 0xf3 0x5b 0x8f 0xbf 0xf3 0x5a 0x8f +0xbf 0xf3 0x59 0x8f +0xbf 0xf3 0x58 0x8f 0xbf 0xf3 0x57 0x8f 0xbf 0xf3 0x56 0x8f +0xbf 0xf3 0x55 0x8f +0xbf 0xf3 0x54 0x8f 0xbf 0xf3 0x53 0x8f 0xbf 0xf3 0x52 0x8f -0xbf 0xf3 0x5f 0x8f +0xbf 0xf3 0x51 0x8f +0xbf 0xf3 0x50 0x8f #------------------------------------------------------------------------------ @@ -368,21 +384,37 @@ #------------------------------------------------------------------------------ #CHECK: dsb sy #CHECK: dsb st +#CHECK: dsb #0xd +#CHECK: dsb #0xc #CHECK: dsb ish #CHECK: dsb ishst +#CHECK: dsb #0x9 +#CHECK: dsb #0x8 #CHECK: dsb nsh #CHECK: dsb nshst +#CHECK: dsb #0x5 +#CHECK: dsb #0x4 #CHECK: dsb osh #CHECK: dsb oshst +#CHECK: dsb #0x1 +#CHECK: dsb #0x0 0xbf 0xf3 0x4f 0x8f 0xbf 0xf3 0x4e 0x8f +0xbf 0xf3 0x4d 0x8f +0xbf 0xf3 0x4c 0x8f 0xbf 0xf3 0x4b 0x8f 0xbf 0xf3 0x4a 0x8f +0xbf 0xf3 0x49 0x8f +0xbf 0xf3 0x48 0x8f 0xbf 0xf3 0x47 0x8f 0xbf 0xf3 0x46 0x8f +0xbf 0xf3 0x45 0x8f +0xbf 0xf3 0x44 0x8f 0xbf 0xf3 0x43 0x8f 0xbf 0xf3 0x42 0x8f +0xbf 0xf3 0x41 0x8f +0xbf 0xf3 0x40 0x8f #------------------------------------------------------------------------------ @@ -609,6 +641,9 @@ # CHECK: ldrd r3, r5, [r6], #-8 # CHECK: ldrd r3, r5, [r6] # CHECK: ldrd r8, r1, [r3] +# CHECK: ldrd r0, r1, [r2], #-0 +# CHECK: ldrd r0, r1, [r2, #-0]! +# CHECK: ldrd r0, r1, [r2, #-0] 0xd6 0xe9 0x06 0x35 0xf6 0xe9 0x06 0x35 @@ -616,6 +651,9 @@ 0x76 0xe8 0x02 0x35 0xd6 0xe9 0x00 0x35 0xd3 0xe9 0x00 0x81 +0x72 0xe8 0x00 0x01 +0x72 0xe9 0x00 0x01 +0x52 0xe9 0x00 0x01 #------------------------------------------------------------------------------ @@ -1790,12 +1828,16 @@ # STRD (immediate) #------------------------------------------------------------------------------ # CHECK: strd r6, r3, [r5], #-8 -# CHECK: strd r8, r5, [r5]{{$}} +# CHECK: strd r8, r5, [r5], #-0 # CHECK: strd r7, r4, [r5], #-4 +# CHECK: strd r0, r1, [r2, #-0]! +# CHECK: strd r0, r1, [r2, #-0] 0x65 0xe8 0x02 0x63 0x65 0xe8 0x00 0x85 0x65 0xe8 0x01 0x74 +0x62 0xe9 0x00 0x01 +0x42 0xe9 0x00 0x01 #------------------------------------------------------------------------------ # STREX/STREXB/STREXH/STREXD diff --git a/test/MC/Disassembler/X86/simple-tests.txt b/test/MC/Disassembler/X86/simple-tests.txt index 15e046f..672d239 100644 --- a/test/MC/Disassembler/X86/simple-tests.txt +++ b/test/MC/Disassembler/X86/simple-tests.txt @@ -123,10 +123,10 @@ # CHECK: vcvtss2sil %xmm0, %eax 0xc5 0xfa 0x2d 0xc0 -# CHECK: vcvtsd2si %xmm0, %eax +# CHECK: vcvtsd2sil %xmm0, %eax 0xc5 0xfb 0x2d 0xc0 -# CHECK: vcvtsd2si %xmm0, %rax +# CHECK: vcvtsd2siq %xmm0, %rax 0xc4 0xe1 0xfb 0x2d 0xc0 # CHECK: vmaskmovpd %xmm0, %xmm1, (%rax) @@ -437,10 +437,10 @@ # CHECK: vroundsd $0, %xmm0, %xmm0, %xmm0 0xc4 0xe3 0x7d 0x0b 0xc0 0x00 -# CHECK: vcvtsd2si %xmm0, %eax +# CHECK: vcvtsd2sil %xmm0, %eax 0xc4 0xe1 0x7f 0x2d 0xc0 -# CHECK: vcvtsd2si %xmm0, %rax +# CHECK: vcvtsd2siq %xmm0, %rax 0xc4 0xe1 0xff 0x2d 0xc0 # CHECK: vucomisd %xmm1, %xmm0 diff --git a/test/MC/Disassembler/X86/x86-32.txt b/test/MC/Disassembler/X86/x86-32.txt index 3ec55f9..899657b 100644 --- a/test/MC/Disassembler/X86/x86-32.txt +++ b/test/MC/Disassembler/X86/x86-32.txt @@ -159,10 +159,10 @@ # CHECK: vcvtss2sil %xmm0, %eax 0xc5 0xfa 0x2d 0xc0 -# CHECK: vcvtsd2si %xmm0, %eax +# CHECK: vcvtsd2sil %xmm0, %eax 0xc5 0xfb 0x2d 0xc0 -# CHECK: vcvtsd2si %xmm0, %eax +# CHECK: vcvtsd2sil %xmm0, %eax 0xc4 0xe1 0x7b 0x2d 0xc0 # CHECK: vmaskmovpd %xmm0, %xmm1, (%eax) @@ -460,10 +460,10 @@ # CHECK: vroundsd $0, %xmm0, %xmm0, %xmm0 0xc4 0xe3 0x7d 0x0b 0xc0 0x00 -# CHECK: vcvtsd2si %xmm0, %eax +# CHECK: vcvtsd2sil %xmm0, %eax 0xc4 0xe1 0x7f 0x2d 0xc0 -# CHECK: vcvtsd2si %xmm0, %eax +# CHECK: vcvtsd2sil %xmm0, %eax 0xc4 0xe1 0xff 0x2d 0xc0 # CHECK: vucomisd %xmm1, %xmm0 diff --git a/test/MC/ELF/fde.s b/test/MC/ELF/fde.s new file mode 100644 index 0000000..52ee33f --- /dev/null +++ b/test/MC/ELF/fde.s @@ -0,0 +1,28 @@ +# RUN: llvm-mc -filetype=obj %s -o %t.o -triple x86_64-pc-linux-gnu && llvm-objdump -s %t.o +# PR13581 + +# CHECK: Contents of section .debug_frame: +# CHECK-NEXT: 0000 14000000 ffffffff 01000178 100c0708 ...........x.... +# CHECK-NEXT: 0010 90010000 00000000 1c000000 00000000 ................ +# CHECK-NEXT: 0020 00000000 00000000 11000000 00000000 ................ +# CHECK-NEXT: 0030 410e1086 02430d06 A....C.. + +__cxx_global_var_init: # @__cxx_global_var_init + .cfi_startproc +.Lfunc_begin0: +# BB#0: # %entry + pushq %rbp +.Ltmp2: + .cfi_def_cfa_offset 16 +.Ltmp3: + .cfi_offset %rbp, -16 + movq %rsp, %rbp +.Ltmp4: + .cfi_def_cfa_register %rbp +.Ltmp5: + callq _Z2rsv@PLT + movl %eax, _ZL1i(%rip) + popq %rbp + ret + .cfi_endproc + .cfi_sections .debug_frame diff --git a/test/MC/MachO/ARM/thumb2-movw-fixup.s b/test/MC/MachO/ARM/thumb2-movw-fixup.s new file mode 100644 index 0000000..57973a8 --- /dev/null +++ b/test/MC/MachO/ARM/thumb2-movw-fixup.s @@ -0,0 +1,44 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple thumbv7-apple-darwin10 -filetype=obj -o - < %s | macho-dump | FileCheck %s + +@ rdar://10038370 + + .syntax unified + .text + .align 2 + .code 16 + .thumb_func _foo + movw r2, :lower16:L1 + movt r2, :upper16:L1 + movw r12, :lower16:L2 + movt r12, :upper16:L2 + .space 70000 + + .data +L1: .long 0 +L2: .long 0 + +@ CHECK: ('_relocations', [ +@ CHECK: # Relocation 0 +@ CHECK: (('word-0', 0xc), +@ CHECK: ('word-1', 0x86000002)), +@ CHECK: # Relocation 1 +@ CHECK: (('word-0', 0x1184), +@ CHECK: ('word-1', 0x16ffffff)), +@ CHECK: # Relocation 2 +@ CHECK: (('word-0', 0x8), +@ CHECK: ('word-1', 0x84000002)), +@ CHECK: # Relocation 3 +@ CHECK: (('word-0', 0x1), +@ CHECK: ('word-1', 0x14ffffff)), +@ CHECK: # Relocation 4 +@ CHECK: (('word-0', 0x4), +@ CHECK: ('word-1', 0x86000002)), +@ CHECK: # Relocation 5 +@ CHECK: (('word-0', 0x1180), +@ CHECK: ('word-1', 0x16ffffff)), +@ CHECK: # Relocation 6 +@ CHECK: (('word-0', 0x0), +@ CHECK: ('word-1', 0x84000002)), +@ CHECK: # Relocation 7 +@ CHECK: (('word-0', 0x1), +@ CHECK: ('word-1', 0x14ffffff)), diff --git a/test/MC/MachO/previous.s b/test/MC/MachO/previous.s new file mode 100644 index 0000000..41077cd --- /dev/null +++ b/test/MC/MachO/previous.s @@ -0,0 +1,13 @@ +// RUN: llvm-mc -triple i386-apple-darwin9 %s -o - | FileCheck %s + +.text +// CHECK: .section __TEXT,__text + +.data +// CHECK: .section __DATA,__data + +.previous +// CHECK: .section __TEXT,__text + +.previous +// CHECK: .section __DATA,__data diff --git a/test/MC/MachO/pushsection.s b/test/MC/MachO/pushsection.s new file mode 100644 index 0000000..6881323 --- /dev/null +++ b/test/MC/MachO/pushsection.s @@ -0,0 +1,16 @@ +// RUN: llvm-mc -triple i386-apple-darwin9 %s -o - | FileCheck %s + +.text +// CHECK: .section __TEXT,__text + +.pushsection __DATA, __data +// CHECK: .section __DATA,__data + +.pushsection __TEXT, initcode +// CHECK: .section __TEXT,initcode + +.popsection +// CHECK: .section __DATA,__data + +.popsection +// CHECK: .section __TEXT,__text diff --git a/test/MC/Mips/higher_highest.ll b/test/MC/Mips/higher_highest.ll new file mode 100644 index 0000000..81a89e3 --- /dev/null +++ b/test/MC/Mips/higher_highest.ll @@ -0,0 +1,27 @@ +; RUN: llc -march=mips64el -mcpu=mips64 -mattr=n64 -force-mips-long-branch -filetype=obj < %s -o - | elf-dump --dump-section-data | FileCheck %s + +; Check that the R_MIPS_HIGHER and R_MIPS_HIGHEST relocations were created. + +; CHECK: ('r_type', 0x1d) +; CHECK: ('r_type', 0x1d) +; CHECK: ('r_type', 0x1c) +; CHECK: ('r_type', 0x1c) + +@g0 = external global i32 + +define void @foo1(i32 %s) nounwind { +entry: + + %tobool = icmp eq i32 %s, 0 + br i1 %tobool, label %if.end, label %if.then + +if.then: ; preds = %entry + %0 = load i32* @g0, align 4 + %add = add nsw i32 %0, 12 + store i32 %add, i32* @g0, align 4 + br label %if.end + +if.end: ; preds = %entry, %if.then + ret void +} + diff --git a/test/MC/Mips/lea_64.ll b/test/MC/Mips/lea_64.ll new file mode 100644 index 0000000..2e7a37b --- /dev/null +++ b/test/MC/Mips/lea_64.ll @@ -0,0 +1,18 @@ +; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 %s -o - \ +; RUN: | llvm-objdump -disassemble -triple mips64el - \ +; RUN: | FileCheck %s + +@p = external global i32* + +define void @f1() nounwind { +entry: +; CHECK: .text: +; CHECK-NOT: addiu {{[0-9,a-f]+}}, {{[0-9,a-f]+}}, {{[0-9]+}} + + %a = alloca [10 x i32], align 4 + %arraydecay = getelementptr inbounds [10 x i32]* %a, i64 0, i64 0 + store i32* %arraydecay, i32** @p, align 8 + ret void + +; CHECK: jr $ra +} diff --git a/test/MC/Mips/sext_64_32.ll b/test/MC/Mips/sext_64_32.ll new file mode 100644 index 0000000..e5c57b8 --- /dev/null +++ b/test/MC/Mips/sext_64_32.ll @@ -0,0 +1,20 @@ +; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 %s -o - | llvm-objdump -disassemble -triple mips64el - | FileCheck %s + +; Sign extend from 32 to 64 was creating nonsense opcodes + +; CHECK: sll ${{[0-9]+}}, ${{[0-9]+}}, 0 + +define i64 @foo(i32 %ival) nounwind readnone { +entry: + %conv = sext i32 %ival to i64 + ret i64 %conv +} + +; CHECK: dsll32 ${{[0-9]+}}, ${{[0-9]+}}, 0 + +define i64 @foo_2(i32 %ival_2) nounwind readnone { +entry: + %conv_2 = zext i32 %ival_2 to i64 + ret i64 %conv_2 +} + diff --git a/test/MC/X86/x86-32-avx.s b/test/MC/X86/x86-32-avx.s index 9a7a506..586f3fe 100644 --- a/test/MC/X86/x86-32-avx.s +++ b/test/MC/X86/x86-32-avx.s @@ -3103,21 +3103,21 @@ // CHECK: encoding: [0xc5,0xf8,0x77] vzeroupper -// CHECK: vcvtsd2si %xmm4, %ecx +// CHECK: vcvtsd2sil %xmm4, %ecx // CHECK: encoding: [0xc5,0xfb,0x2d,0xcc] - vcvtsd2si %xmm4, %ecx + vcvtsd2sil %xmm4, %ecx -// CHECK: vcvtsd2si (%ecx), %ecx +// CHECK: vcvtsd2sil (%ecx), %ecx // CHECK: encoding: [0xc5,0xfb,0x2d,0x09] - vcvtsd2si (%ecx), %ecx + vcvtsd2sil (%ecx), %ecx -// CHECK: vcvtsi2sdl (%ebp), %xmm0, %xmm7 +// CHECK: vcvtsi2sd (%ebp), %xmm0, %xmm7 // CHECK: encoding: [0xc5,0xfb,0x2a,0x7d,0x00] - vcvtsi2sdl (%ebp), %xmm0, %xmm7 + vcvtsi2sd (%ebp), %xmm0, %xmm7 -// CHECK: vcvtsi2sdl (%esp), %xmm0, %xmm7 +// CHECK: vcvtsi2sd (%esp), %xmm0, %xmm7 // CHECK: encoding: [0xc5,0xfb,0x2a,0x3c,0x24] - vcvtsi2sdl (%esp), %xmm0, %xmm7 + vcvtsi2sd (%esp), %xmm0, %xmm7 // CHECK: vlddqu (%eax), %ymm2 // CHECK: encoding: [0xc5,0xff,0xf0,0x10] diff --git a/test/MC/X86/x86_64-avx-encoding.s b/test/MC/X86/x86_64-avx-encoding.s index 930e33b..46ff9ea 100644 --- a/test/MC/X86/x86_64-avx-encoding.s +++ b/test/MC/X86/x86_64-avx-encoding.s @@ -3860,29 +3860,29 @@ vdivpd -4(%rcx,%rbx,8), %xmm10, %xmm11 // CHECK: encoding: [0xc4,0x63,0x2d,0x06,0x18,0x07] vperm2f128 $7, (%rax), %ymm10, %ymm11 -// CHECK: vcvtsd2si %xmm8, %r8d +// CHECK: vcvtsd2sil %xmm8, %r8d // CHECK: encoding: [0xc4,0x41,0x7b,0x2d,0xc0] - vcvtsd2si %xmm8, %r8d + vcvtsd2sil %xmm8, %r8d -// CHECK: vcvtsd2si (%rcx), %ecx +// CHECK: vcvtsd2sil (%rcx), %ecx // CHECK: encoding: [0xc5,0xfb,0x2d,0x09] - vcvtsd2si (%rcx), %ecx + vcvtsd2sil (%rcx), %ecx -// CHECK: vcvtss2si %xmm4, %rcx +// CHECK: vcvtss2siq %xmm4, %rcx // CHECK: encoding: [0xc4,0xe1,0xfa,0x2d,0xcc] - vcvtss2si %xmm4, %rcx + vcvtss2siq %xmm4, %rcx -// CHECK: vcvtss2si (%rcx), %r8 +// CHECK: vcvtss2siq (%rcx), %r8 // CHECK: encoding: [0xc4,0x61,0xfa,0x2d,0x01] - vcvtss2si (%rcx), %r8 + vcvtss2siq (%rcx), %r8 -// CHECK: vcvtsi2sdl %r8d, %xmm8, %xmm15 +// CHECK: vcvtsi2sd %r8d, %xmm8, %xmm15 // CHECK: encoding: [0xc4,0x41,0x3b,0x2a,0xf8] - vcvtsi2sdl %r8d, %xmm8, %xmm15 + vcvtsi2sd %r8d, %xmm8, %xmm15 -// CHECK: vcvtsi2sdl (%rbp), %xmm8, %xmm15 +// CHECK: vcvtsi2sd (%rbp), %xmm8, %xmm15 // CHECK: encoding: [0xc5,0x3b,0x2a,0x7d,0x00] - vcvtsi2sdl (%rbp), %xmm8, %xmm15 + vcvtsi2sd (%rbp), %xmm8, %xmm15 // CHECK: vcvtsi2sdq %rcx, %xmm4, %xmm6 // CHECK: encoding: [0xc4,0xe1,0xdb,0x2a,0xf1] @@ -3900,21 +3900,21 @@ vdivpd -4(%rcx,%rbx,8), %xmm10, %xmm11 // CHECK: encoding: [0xc4,0xe1,0xda,0x2a,0x31] vcvtsi2ssq (%rcx), %xmm4, %xmm6 -// CHECK: vcvttsd2si %xmm4, %rcx +// CHECK: vcvttsd2siq %xmm4, %rcx // CHECK: encoding: [0xc4,0xe1,0xfb,0x2c,0xcc] - vcvttsd2si %xmm4, %rcx + vcvttsd2siq %xmm4, %rcx -// CHECK: vcvttsd2si (%rcx), %rcx +// CHECK: vcvttsd2siq (%rcx), %rcx // CHECK: encoding: [0xc4,0xe1,0xfb,0x2c,0x09] - vcvttsd2si (%rcx), %rcx + vcvttsd2siq (%rcx), %rcx -// CHECK: vcvttss2si %xmm4, %rcx +// CHECK: vcvttss2siq %xmm4, %rcx // CHECK: encoding: [0xc4,0xe1,0xfa,0x2c,0xcc] - vcvttss2si %xmm4, %rcx + vcvttss2siq %xmm4, %rcx -// CHECK: vcvttss2si (%rcx), %rcx +// CHECK: vcvttss2siq (%rcx), %rcx // CHECK: encoding: [0xc4,0xe1,0xfa,0x2c,0x09] - vcvttss2si (%rcx), %rcx + vcvttss2siq (%rcx), %rcx // CHECK: vlddqu (%rax), %ymm12 // CHECK: encoding: [0xc5,0x7f,0xf0,0x20] diff --git a/test/Makefile b/test/Makefile index 483db23..9ddfabf 100644 --- a/test/Makefile +++ b/test/Makefile @@ -62,6 +62,15 @@ clang-site-cfg: FORCE $(MAKE) -C $(PROJ_OBJ_DIR)/../tools/clang/test lit.site.cfg Unit/lit.site.cfg extra-site-cfgs:: clang-site-cfg endif + +ifeq ($(shell test -f $(PROJ_OBJ_DIR)/../tools/clang/tools/extra/Makefile && echo OK), OK) +LIT_ALL_TESTSUITES += $(PROJ_OBJ_DIR)/../tools/clang/tools/extra/test + +# Force creation of Clang Tools' lit.site.cfg. +clang-tools-site-cfg: FORCE + $(MAKE) -C $(PROJ_OBJ_DIR)/../tools/clang/tools/extra/test lit.site.cfg +extra-site-cfgs:: clang-tools-site-cfg +endif endif endif @@ -122,7 +131,7 @@ lit.site.cfg: FORCE @$(ECHOPATH) s=@SHLIBDIR@=$(SharedLibDir)=g >> lit.tmp @$(ECHOPATH) s=@SHLIBEXT@=$(SHLIBEXT)=g >> lit.tmp @$(ECHOPATH) s=@PYTHON_EXECUTABLE@=python=g >> lit.tmp - @$(ECHOPATH) s=@OCAMLOPT@=$(OCAMLOPT) -cc \"$(CXX_FOR_OCAMLOPT)\" -I $(LibDir)/ocaml=g >> lit.tmp + @$(ECHOPATH) s,@OCAMLOPT@,$(OCAMLOPT) -cc \\\\\"$(CXX_FOR_OCAMLOPT)\\\\\" -I $(LibDir)/ocaml,g >> lit.tmp @$(ECHOPATH) s=@ENABLE_SHARED@=$(ENABLE_SHARED)=g >> lit.tmp @$(ECHOPATH) s=@ENABLE_ASSERTIONS@=$(ENABLE_ASSERTIONS)=g >> lit.tmp @$(ECHOPATH) s=@TARGETS_TO_BUILD@=$(TARGETS_TO_BUILD)=g >> lit.tmp diff --git a/test/Object/Inputs/COFF/i386.yaml b/test/Object/Inputs/COFF/i386.yaml new file mode 100644 index 0000000..ca90222 --- /dev/null +++ b/test/Object/Inputs/COFF/i386.yaml @@ -0,0 +1,83 @@ +header: !Header + Machine: IMAGE_FILE_MACHINE_I386 # (0x14c) + +sections: + - !Section + Name: .text + Characteristics: [IMAGE_SCN_CNT_CODE, IMAGE_SCN_ALIGN_16BYTES, IMAGE_SCN_MEM_EXECUTE, IMAGE_SCN_MEM_READ, ] # 0x60500020 + SectionData: !hex "83EC0CC744240800000000C7042400000000E800000000E8000000008B44240883C40CC3" # |....D$.......$...............D$.....| + + Relocations: + - !Relocation + VirtualAddress: 0xe + SymbolTableIndex: 5 + Type: IMAGE_REL_I386_DIR32 + + - !Relocation + VirtualAddress: 0x13 + SymbolTableIndex: 6 + Type: IMAGE_REL_I386_REL32 + + - !Relocation + VirtualAddress: 0x18 + SymbolTableIndex: 7 + Type: IMAGE_REL_I386_REL32 + + - !Section + Name: .data + Characteristics: [IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_ALIGN_1BYTES, IMAGE_SCN_MEM_READ, IMAGE_SCN_MEM_WRITE, ] # 0xc0100040 + SectionData: !hex "48656C6C6F20576F726C642100" # |Hello World!.| + +symbols: + - !Symbol + Name: .text + Value: 0 + SectionNumber: 1 + SimpleType: IMAGE_SYM_TYPE_NULL # (0) + ComplexType: IMAGE_SYM_DTYPE_NULL # (0) + StorageClass: IMAGE_SYM_CLASS_STATIC # (3) + NumberOfAuxSymbols: 1 + AuxillaryData: !hex "240000000300000000000000010000000000" # |$.................| + + - !Symbol + Name: .data + Value: 0 + SectionNumber: 2 + SimpleType: IMAGE_SYM_TYPE_NULL # (0) + ComplexType: IMAGE_SYM_DTYPE_NULL # (0) + StorageClass: IMAGE_SYM_CLASS_STATIC # (3) + NumberOfAuxSymbols: 1 + AuxillaryData: !hex "0D0000000000000000000000020000000000" # |..................| + + - !Symbol + Name: _main + Value: 0 + SectionNumber: 1 + SimpleType: IMAGE_SYM_TYPE_NULL # (0) + ComplexType: IMAGE_SYM_DTYPE_FUNCTION # (2) + StorageClass: IMAGE_SYM_CLASS_EXTERNAL # (2) + + - !Symbol + Name: L_.str + Value: 0 + SectionNumber: 2 + SimpleType: IMAGE_SYM_TYPE_NULL # (0) + ComplexType: IMAGE_SYM_DTYPE_NULL # (0) + StorageClass: IMAGE_SYM_CLASS_STATIC # (3) + + - !Symbol + Name: _puts + Value: 0 + SectionNumber: 0 + SimpleType: IMAGE_SYM_TYPE_NULL # (0) + ComplexType: IMAGE_SYM_DTYPE_NULL # (0) + StorageClass: IMAGE_SYM_CLASS_EXTERNAL # (2) + + - !Symbol + Name: _SomeOtherFunction + Value: 0 + SectionNumber: 0 + SimpleType: IMAGE_SYM_TYPE_NULL # (0) + ComplexType: IMAGE_SYM_DTYPE_NULL # (0) + StorageClass: IMAGE_SYM_CLASS_EXTERNAL # (2) + diff --git a/test/Object/Inputs/COFF/x86-64.yaml b/test/Object/Inputs/COFF/x86-64.yaml new file mode 100644 index 0000000..0b1265f --- /dev/null +++ b/test/Object/Inputs/COFF/x86-64.yaml @@ -0,0 +1,83 @@ +header: !Header + Machine: IMAGE_FILE_MACHINE_AMD64 # (0x8664) + +sections: + - !Section + Name: .text + Characteristics: [IMAGE_SCN_CNT_CODE, IMAGE_SCN_ALIGN_16BYTES, IMAGE_SCN_MEM_EXECUTE, IMAGE_SCN_MEM_READ, ] # 0x60500020 + SectionData: !hex "4883EC28C744242400000000488D0D00000000E800000000E8000000008B4424244883C428C3" # |H..(.D$$....H.................D$$H..(.| + + Relocations: + - !Relocation + VirtualAddress: 0xf + SymbolTableIndex: 5 + Type: IMAGE_REL_AMD64_REL32 + + - !Relocation + VirtualAddress: 0x14 + SymbolTableIndex: 6 + Type: IMAGE_REL_AMD64_REL32 + + - !Relocation + VirtualAddress: 0x19 + SymbolTableIndex: 7 + Type: IMAGE_REL_AMD64_REL32 + + - !Section + Name: .data + Characteristics: [IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_ALIGN_1BYTES, IMAGE_SCN_MEM_READ, IMAGE_SCN_MEM_WRITE, ] # 0xc0100040 + SectionData: !hex "48656C6C6F20576F726C642100" # |Hello World!.| + +symbols: + - !Symbol + Name: .text + Value: 0 + SectionNumber: 1 + SimpleType: IMAGE_SYM_TYPE_NULL # (0) + ComplexType: IMAGE_SYM_DTYPE_NULL # (0) + StorageClass: IMAGE_SYM_CLASS_STATIC # (3) + NumberOfAuxSymbols: 1 + AuxillaryData: !hex "260000000300000000000000010000000000" # |&.................| + + - !Symbol + Name: .data + Value: 0 + SectionNumber: 2 + SimpleType: IMAGE_SYM_TYPE_NULL # (0) + ComplexType: IMAGE_SYM_DTYPE_NULL # (0) + StorageClass: IMAGE_SYM_CLASS_STATIC # (3) + NumberOfAuxSymbols: 1 + AuxillaryData: !hex "0D0000000000000000000000020000000000" # |..................| + + - !Symbol + Name: main + Value: 0 + SectionNumber: 1 + SimpleType: IMAGE_SYM_TYPE_NULL # (0) + ComplexType: IMAGE_SYM_DTYPE_FUNCTION # (2) + StorageClass: IMAGE_SYM_CLASS_EXTERNAL # (2) + + - !Symbol + Name: L.str + Value: 0 + SectionNumber: 2 + SimpleType: IMAGE_SYM_TYPE_NULL # (0) + ComplexType: IMAGE_SYM_DTYPE_NULL # (0) + StorageClass: IMAGE_SYM_CLASS_STATIC # (3) + + - !Symbol + Name: puts + Value: 0 + SectionNumber: 0 + SimpleType: IMAGE_SYM_TYPE_NULL # (0) + ComplexType: IMAGE_SYM_DTYPE_NULL # (0) + StorageClass: IMAGE_SYM_CLASS_EXTERNAL # (2) + + - !Symbol + Name: SomeOtherFunction + Value: 0 + SectionNumber: 0 + SimpleType: IMAGE_SYM_TYPE_NULL # (0) + ComplexType: IMAGE_SYM_DTYPE_NULL # (0) + StorageClass: IMAGE_SYM_CLASS_EXTERNAL # (2) + diff --git a/test/Object/Inputs/trivial-object-test.coff-i386 b/test/Object/Inputs/trivial-object-test.coff-i386 Binary files differindex 8cfd994..d4ab63b 100644 --- a/test/Object/Inputs/trivial-object-test.coff-i386 +++ b/test/Object/Inputs/trivial-object-test.coff-i386 diff --git a/test/Object/nm-trivial-object.test b/test/Object/nm-trivial-object.test index e5635ab..8fd1c04 100644 --- a/test/Object/nm-trivial-object.test +++ b/test/Object/nm-trivial-object.test @@ -1,7 +1,7 @@ -RUN: llvm-nm %p/Inputs/trivial-object-test.coff-i386 \ -RUN: | FileCheck %s -check-prefix COFF -RUN: llvm-nm %p/Inputs/trivial-object-test.coff-x86-64 \ +RUN: yaml2obj %p/Inputs/COFF/i386.yaml | llvm-nm \ RUN: | FileCheck %s -check-prefix COFF +RUN: yaml2obj %p/Inputs/COFF/x86-64.yaml | llvm-nm \ +RUN | FileCheck %s -check-prefix COFF RUN: llvm-nm %p/Inputs/trivial-object-test.elf-i386 \ RUN: | FileCheck %s -check-prefix ELF RUN: llvm-nm %p/Inputs/trivial-object-test.elf-x86-64 \ @@ -30,4 +30,4 @@ macho: 00000000 U _puts macho64: 00000028 s L_.str macho64: 00000000 u _SomeOtherFunction macho64: 00000000 s _main -macho64: 00000000 u _puts
\ No newline at end of file +macho64: 00000000 u _puts diff --git a/test/Object/objdump-file-header.test b/test/Object/objdump-file-header.test index 3fce3f4..a552113 100644 --- a/test/Object/objdump-file-header.test +++ b/test/Object/objdump-file-header.test @@ -1,5 +1,4 @@ -RUN: llvm-objdump -f %p/Inputs/trivial-object-test.coff-i386 \ -RUN: | FileCheck %s -check-prefix COFF-i386 +RUN: yaml2obj %p/Inputs/COFF/i386.yaml | llvm-objdump -f - | FileCheck %s -check-prefix COFF-i386 RUN: llvm-objdump -f %p/Inputs/trivial-object-test.elf-i386 \ RUN: | FileCheck %s -check-prefix ELF-i386 diff --git a/test/Object/objdump-section-content.test b/test/Object/objdump-section-content.test index 581e75e..f9c4f43 100644 --- a/test/Object/objdump-section-content.test +++ b/test/Object/objdump-section-content.test @@ -1,9 +1,8 @@ -RUN: llvm-objdump -s %p/Inputs/trivial-object-test.coff-i386 \ -RUN: | FileCheck %s -check-prefix COFF-i386 +RUN: yaml2obj %p/Inputs/COFF/i386.yaml | llvm-objdump -s - | FileCheck %s -check-prefix COFF-i386 RUN: llvm-objdump -s %p/Inputs/trivial-object-test.elf-i386 \ RUN: | FileCheck %s -check-prefix ELF-i386 -COFF-i386: trivial-object-test.coff-i386: file format +COFF-i386: file format COFF-i386: Contents of section .text: COFF-i386: 0000 83ec0cc7 44240800 000000c7 04240000 ....D$.......$.. COFF-i386: 0010 0000e800 000000e8 00000000 8b442408 .............D$. diff --git a/test/Object/objdump-symbol-table.test b/test/Object/objdump-symbol-table.test index 8a0f440..989ec04 100644 --- a/test/Object/objdump-symbol-table.test +++ b/test/Object/objdump-symbol-table.test @@ -1,17 +1,17 @@ -RUN: llvm-objdump -t %p/Inputs/trivial-object-test.coff-i386 \ +RUN: yaml2obj %p/Inputs/COFF/i386.yaml | llvm-objdump -t - \ RUN: | FileCheck %s -check-prefix COFF-i386 RUN: llvm-objdump -t %p/Inputs/trivial-object-test.elf-i386 \ RUN: | FileCheck %s -check-prefix ELF-i386 RUN: llvm-objdump -t %p/Inputs/trivial-object-test.macho-i386 \ RUN: | FileCheck %s -check-prefix macho-i386 -COFF-i386: trivial-object-test.coff-i386: file format +COFF-i386: file format COFF-i386: SYMBOL TABLE: COFF-i386: [ 0](sec 1)(fl 0x00)(ty 0)(scl 3) (nx 1) 0x00000000 .text COFF-i386: AUX scnlen 0x24 nreloc 3 nlnno 0 checksum 0x0 assoc 1 comdat 0 COFF-i386: [ 2](sec 2)(fl 0x00)(ty 0)(scl 3) (nx 1) 0x00000000 .data COFF-i386: AUX scnlen 0xd nreloc 0 nlnno 0 checksum 0x0 assoc 2 comdat 0 -COFF-i386: [ 4](sec 1)(fl 0x00)(ty 200)(scl 2) (nx 0) 0x00000000 _main +COFF-i386: [ 4](sec 1)(fl 0x00)(ty 20)(scl 2) (nx 0) 0x00000000 _main COFF-i386: [ 5](sec 2)(fl 0x00)(ty 0)(scl 3) (nx 0) 0x00000000 L_.str COFF-i386: [ 6](sec 0)(fl 0x00)(ty 0)(scl 2) (nx 0) 0x00000000 _puts COFF-i386: [ 7](sec 0)(fl 0x00)(ty 0)(scl 2) (nx 0) 0x00000000 _SomeOtherFunction @@ -30,4 +30,4 @@ macho-i386: trivial-object-test.macho-i386: file format Mach-O 32-bit i38 macho-i386: SYMBOL TABLE: macho-i386: 00000000 g F __TEXT,__text 00000024 _main macho-i386: 00000000 *UND* 00000000 _SomeOtherFunction -macho-i386: 00000000 *UND* 00000000 _puts
\ No newline at end of file +macho-i386: 00000000 *UND* 00000000 _puts diff --git a/test/Transforms/CodeGenPrepare/basic.ll b/test/Transforms/CodeGenPrepare/basic.ll index ebf10f0..c68e77e 100644 --- a/test/Transforms/CodeGenPrepare/basic.ll +++ b/test/Transforms/CodeGenPrepare/basic.ll @@ -5,7 +5,7 @@ target triple = "x86_64-apple-darwin10.0.0" ; CHECK: @test1 ; objectsize should fold to a constant, which causes the branch to fold to an -; uncond branch. +; uncond branch. Next, we fold the control flow alltogether. ; rdar://8785296 define i32 @test1(i8* %ptr) nounwind ssp noredzone align 2 { entry: @@ -13,8 +13,8 @@ entry: %1 = icmp ugt i64 %0, 3 br i1 %1, label %T, label %trap -; CHECK: entry: -; CHECK-NEXT: br label %T +; CHECK: T: +; CHECK-NOT: br label % trap: ; preds = %0, %entry tail call void @llvm.trap() noreturn nounwind diff --git a/test/Transforms/DeadStoreElimination/simple.ll b/test/Transforms/DeadStoreElimination/simple.ll index a386206..7a8cdd5 100644 --- a/test/Transforms/DeadStoreElimination/simple.ll +++ b/test/Transforms/DeadStoreElimination/simple.ll @@ -276,3 +276,37 @@ define void @test22(i1 %i, i32 %k, i32 %m) nounwind { ; CHECK-NEXT: ret void ret void } + +; PR13547 +; CHECK: @test23 +; CHECK: store i8 97 +; CHECK: store i8 0 +declare noalias i8* @strdup(i8* nocapture) nounwind +define noalias i8* @test23() nounwind uwtable ssp { + %x = alloca [2 x i8], align 1 + %arrayidx = getelementptr inbounds [2 x i8]* %x, i64 0, i64 0 + store i8 97, i8* %arrayidx, align 1 + %arrayidx1 = getelementptr inbounds [2 x i8]* %x, i64 0, i64 1 + store i8 0, i8* %arrayidx1, align 1 + %call = call i8* @strdup(i8* %arrayidx) nounwind + ret i8* %call +} + +; Make sure same sized store to later element is deleted +; CHECK: @test24 +; CHECK-NOT: store i32 0 +; CHECK-NOT: store i32 0 +; CHECK: store i32 %b +; CHECK: store i32 %c +; CHECK: ret void +define void @test24([2 x i32]* %a, i32 %b, i32 %c) nounwind { + %1 = getelementptr inbounds [2 x i32]* %a, i64 0, i64 0 + store i32 0, i32* %1, align 4 + %2 = getelementptr inbounds [2 x i32]* %a, i64 0, i64 1 + store i32 0, i32* %2, align 4 + %3 = getelementptr inbounds [2 x i32]* %a, i64 0, i64 0 + store i32 %b, i32* %3, align 4 + %4 = getelementptr inbounds [2 x i32]* %a, i64 0, i64 1 + store i32 %c, i32* %4, align 4 + ret void +} diff --git a/test/Transforms/GVN/edge.ll b/test/Transforms/GVN/edge.ll new file mode 100644 index 0000000..32392f3 --- /dev/null +++ b/test/Transforms/GVN/edge.ll @@ -0,0 +1,60 @@ +; RUN: opt %s -gvn -S -o - | FileCheck %s + +define i32 @f1(i32 %x) { + ; CHECK: define i32 @f1( +bb0: + %cmp = icmp eq i32 %x, 0 + br i1 %cmp, label %bb2, label %bb1 +bb1: + br label %bb2 +bb2: + %cond = phi i32 [ %x, %bb0 ], [ 0, %bb1 ] + %foo = add i32 %cond, %x + ret i32 %foo + ; CHECK: bb2: + ; CHECK: ret i32 %x +} + +define i32 @f2(i32 %x) { + ; CHECK: define i32 @f2( +bb0: + %cmp = icmp ne i32 %x, 0 + br i1 %cmp, label %bb1, label %bb2 +bb1: + br label %bb2 +bb2: + %cond = phi i32 [ %x, %bb0 ], [ 0, %bb1 ] + %foo = add i32 %cond, %x + ret i32 %foo + ; CHECK: bb2: + ; CHECK: ret i32 %x +} + +define i32 @f3(i32 %x) { + ; CHECK: define i32 @f3( +bb0: + switch i32 %x, label %bb1 [ i32 0, label %bb2] +bb1: + br label %bb2 +bb2: + %cond = phi i32 [ %x, %bb0 ], [ 0, %bb1 ] + %foo = add i32 %cond, %x + ret i32 %foo + ; CHECK: bb2: + ; CHECK: ret i32 %x +} + +declare void @g(i1) +define void @f4(i8 * %x) { +; CHECK: define void @f4( +bb0: + %y = icmp eq i8* null, %x + br i1 %y, label %bb2, label %bb1 +bb1: + br label %bb2 +bb2: + %zed = icmp eq i8* null, %x + call void @g(i1 %zed) +; CHECK: call void @g(i1 %y) + ret void +} diff --git a/test/Transforms/GVN/rle.ll b/test/Transforms/GVN/rle.ll index 9e08004..e764169 100644 --- a/test/Transforms/GVN/rle.ll +++ b/test/Transforms/GVN/rle.ll @@ -620,7 +620,7 @@ entry: ; CHECK-NOT: load ; CHECK: load i16* ; CHECK-NOT: load -; CHECK-ret i32 +; CHECK: ret i32 } define i32 @test_widening2() nounwind ssp noredzone { @@ -644,7 +644,7 @@ entry: ; CHECK-NOT: load ; CHECK: load i32* ; CHECK-NOT: load -; CHECK-ret i32 +; CHECK: ret i32 } declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind diff --git a/test/Transforms/GlobalOpt/cleanup-pointer-root-users.ll b/test/Transforms/GlobalOpt/cleanup-pointer-root-users.ll index f426120..a472f10 100644 --- a/test/Transforms/GlobalOpt/cleanup-pointer-root-users.ll +++ b/test/Transforms/GlobalOpt/cleanup-pointer-root-users.ll @@ -1,12 +1,12 @@ ; RUN: opt -globalopt -S -o - < %s | FileCheck %s -@test1 = internal global i8* null +@glbl = internal global i8* null define void @test1a() { ; CHECK: @test1a ; CHECK-NOT: store ; CHECK-NEXT: ret void - store i8* null, i8** @test1 + store i8* null, i8** @glbl ret void } @@ -14,6 +14,36 @@ define void @test1b(i8* %p) { ; CHECK: @test1b ; CHECK-NEXT: store ; CHECK-NEXT: ret void - store i8* %p, i8** @test1 + store i8* %p, i8** @glbl ret void } + +define void @test2() { +; CHECK: @test2 +; CHECK: alloca i8 + %txt = alloca i8 + call void @foo2(i8* %txt) + %call2 = call i8* @strdup(i8* %txt) + store i8* %call2, i8** @glbl + ret void +} +declare i8* @strdup(i8*) +declare void @foo2(i8*) + +define void @test3() uwtable { +; CHECK: @test3 +; CHECK-NOT: bb1: +; CHECK-NOT: bb2: +; CHECK: invoke + %ptr = invoke i8* @_Znwm(i64 1) + to label %bb1 unwind label %bb2 +bb1: + store i8* %ptr, i8** @glbl + unreachable +bb2: + %tmp1 = landingpad { i8*, i32 } personality i32 (i32, i64, i8*, i8*)* @__gxx_personality_v0 + cleanup + resume { i8*, i32 } %tmp1 +} +declare i32 @__gxx_personality_v0(i32, i64, i8*, i8*) +declare i8* @_Znwm(i64) diff --git a/test/Transforms/Inline/always-inline.ll b/test/Transforms/Inline/always-inline.ll index e0be41f..c918bc9 100644 --- a/test/Transforms/Inline/always-inline.ll +++ b/test/Transforms/Inline/always-inline.ll @@ -33,7 +33,6 @@ define void @outer2(i32 %N) { ; ; CHECK: @outer2 ; CHECK-NOT: call void @inner2 -; CHECK alloca i32, i32 %N ; CHECK-NOT: call void @inner2 ; CHECK: ret void diff --git a/test/Transforms/Inline/inline-byval-bonus.ll b/test/Transforms/Inline/inline-byval-bonus.ll new file mode 100644 index 0000000..f3ed819 --- /dev/null +++ b/test/Transforms/Inline/inline-byval-bonus.ll @@ -0,0 +1,193 @@ +; RUN: opt -S -inline -inline-threshold=275 < %s | FileCheck %s +; PR13095 + +; The performance of the c-ray benchmark largely depends on the inlining of a +; specific call to @ray_sphere. This test case is designed to verify that it's +; inlined at -O3. + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.8.0" + +%struct.sphere = type { %struct.vec3, double, %struct.material, %struct.sphere* } +%struct.vec3 = type { double, double, double } +%struct.material = type { %struct.vec3, double, double } +%struct.ray = type { %struct.vec3, %struct.vec3 } +%struct.spoint = type { %struct.vec3, %struct.vec3, %struct.vec3, double } + +define i32 @caller(%struct.sphere* %i) { + %shadow_ray = alloca %struct.ray, align 8 + call void @fix(%struct.ray* %shadow_ray) + + %call = call i32 @ray_sphere(%struct.sphere* %i, %struct.ray* byval align 8 %shadow_ray, %struct.spoint* null) + ret i32 %call + +; CHECK: @caller +; CHECK-NOT: call i32 @ray_sphere +; CHECK: ret i32 +} + +declare void @fix(%struct.ray*) + +define i32 @ray_sphere(%struct.sphere* nocapture %sph, %struct.ray* nocapture byval align 8 %ray, %struct.spoint* %sp) nounwind uwtable ssp { + %1 = getelementptr inbounds %struct.ray* %ray, i64 0, i32 1, i32 0 + %2 = load double* %1, align 8 + %3 = fmul double %2, %2 + %4 = getelementptr inbounds %struct.ray* %ray, i64 0, i32 1, i32 1 + %5 = load double* %4, align 8 + %6 = fmul double %5, %5 + %7 = fadd double %3, %6 + %8 = getelementptr inbounds %struct.ray* %ray, i64 0, i32 1, i32 2 + %9 = load double* %8, align 8 + %10 = fmul double %9, %9 + %11 = fadd double %7, %10 + %12 = fmul double %2, 2.000000e+00 + %13 = getelementptr inbounds %struct.ray* %ray, i64 0, i32 0, i32 0 + %14 = load double* %13, align 8 + %15 = getelementptr inbounds %struct.sphere* %sph, i64 0, i32 0, i32 0 + %16 = load double* %15, align 8 + %17 = fsub double %14, %16 + %18 = fmul double %12, %17 + %19 = fmul double %5, 2.000000e+00 + %20 = getelementptr inbounds %struct.ray* %ray, i64 0, i32 0, i32 1 + %21 = load double* %20, align 8 + %22 = getelementptr inbounds %struct.sphere* %sph, i64 0, i32 0, i32 1 + %23 = load double* %22, align 8 + %24 = fsub double %21, %23 + %25 = fmul double %19, %24 + %26 = fadd double %18, %25 + %27 = fmul double %9, 2.000000e+00 + %28 = getelementptr inbounds %struct.ray* %ray, i64 0, i32 0, i32 2 + %29 = load double* %28, align 8 + %30 = getelementptr inbounds %struct.sphere* %sph, i64 0, i32 0, i32 2 + %31 = load double* %30, align 8 + %32 = fsub double %29, %31 + %33 = fmul double %27, %32 + %34 = fadd double %26, %33 + %35 = fmul double %16, %16 + %36 = fmul double %23, %23 + %37 = fadd double %35, %36 + %38 = fmul double %31, %31 + %39 = fadd double %37, %38 + %40 = fmul double %14, %14 + %41 = fadd double %40, %39 + %42 = fmul double %21, %21 + %43 = fadd double %42, %41 + %44 = fmul double %29, %29 + %45 = fadd double %44, %43 + %46 = fsub double -0.000000e+00, %16 + %47 = fmul double %14, %46 + %48 = fmul double %21, %23 + %49 = fsub double %47, %48 + %50 = fmul double %29, %31 + %51 = fsub double %49, %50 + %52 = fmul double %51, 2.000000e+00 + %53 = fadd double %52, %45 + %54 = getelementptr inbounds %struct.sphere* %sph, i64 0, i32 1 + %55 = load double* %54, align 8 + %56 = fmul double %55, %55 + %57 = fsub double %53, %56 + %58 = fmul double %34, %34 + %59 = fmul double %11, 4.000000e+00 + %60 = fmul double %59, %57 + %61 = fsub double %58, %60 + %62 = fcmp olt double %61, 0.000000e+00 + br i1 %62, label %130, label %63 + +; <label>:63 ; preds = %0 + %64 = tail call double @sqrt(double %61) nounwind readnone + %65 = fsub double -0.000000e+00, %34 + %66 = fsub double %64, %34 + %67 = fmul double %11, 2.000000e+00 + %68 = fdiv double %66, %67 + %69 = fsub double %65, %64 + %70 = fdiv double %69, %67 + %71 = fcmp olt double %68, 1.000000e-06 + %72 = fcmp olt double %70, 1.000000e-06 + %or.cond = and i1 %71, %72 + br i1 %or.cond, label %130, label %73 + +; <label>:73 ; preds = %63 + %74 = fcmp ogt double %68, 1.000000e+00 + %75 = fcmp ogt double %70, 1.000000e+00 + %or.cond1 = and i1 %74, %75 + br i1 %or.cond1, label %130, label %76 + +; <label>:76 ; preds = %73 + %77 = icmp eq %struct.spoint* %sp, null + br i1 %77, label %130, label %78 + +; <label>:78 ; preds = %76 + %t1.0 = select i1 %71, double %70, double %68 + %t2.0 = select i1 %72, double %t1.0, double %70 + %79 = fcmp olt double %t1.0, %t2.0 + %80 = select i1 %79, double %t1.0, double %t2.0 + %81 = getelementptr inbounds %struct.spoint* %sp, i64 0, i32 3 + store double %80, double* %81, align 8 + %82 = fmul double %80, %2 + %83 = fadd double %14, %82 + %84 = getelementptr inbounds %struct.spoint* %sp, i64 0, i32 0, i32 0 + store double %83, double* %84, align 8 + %85 = fmul double %5, %80 + %86 = fadd double %21, %85 + %87 = getelementptr inbounds %struct.spoint* %sp, i64 0, i32 0, i32 1 + store double %86, double* %87, align 8 + %88 = fmul double %9, %80 + %89 = fadd double %29, %88 + %90 = getelementptr inbounds %struct.spoint* %sp, i64 0, i32 0, i32 2 + store double %89, double* %90, align 8 + %91 = load double* %15, align 8 + %92 = fsub double %83, %91 + %93 = load double* %54, align 8 + %94 = fdiv double %92, %93 + %95 = getelementptr inbounds %struct.spoint* %sp, i64 0, i32 1, i32 0 + store double %94, double* %95, align 8 + %96 = load double* %22, align 8 + %97 = fsub double %86, %96 + %98 = load double* %54, align 8 + %99 = fdiv double %97, %98 + %100 = getelementptr inbounds %struct.spoint* %sp, i64 0, i32 1, i32 1 + store double %99, double* %100, align 8 + %101 = load double* %30, align 8 + %102 = fsub double %89, %101 + %103 = load double* %54, align 8 + %104 = fdiv double %102, %103 + %105 = getelementptr inbounds %struct.spoint* %sp, i64 0, i32 1, i32 2 + store double %104, double* %105, align 8 + %106 = fmul double %2, %94 + %107 = fmul double %5, %99 + %108 = fadd double %106, %107 + %109 = fmul double %9, %104 + %110 = fadd double %108, %109 + %111 = fmul double %110, 2.000000e+00 + %112 = fmul double %94, %111 + %113 = fsub double %112, %2 + %114 = fsub double -0.000000e+00, %113 + %115 = fmul double %99, %111 + %116 = fsub double %115, %5 + %117 = fsub double -0.000000e+00, %116 + %118 = fmul double %104, %111 + %119 = fsub double %118, %9 + %120 = fsub double -0.000000e+00, %119 + %.06 = getelementptr inbounds %struct.spoint* %sp, i64 0, i32 2, i32 0 + %.18 = getelementptr inbounds %struct.spoint* %sp, i64 0, i32 2, i32 1 + %.210 = getelementptr inbounds %struct.spoint* %sp, i64 0, i32 2, i32 2 + %121 = fmul double %113, %113 + %122 = fmul double %116, %116 + %123 = fadd double %121, %122 + %124 = fmul double %119, %119 + %125 = fadd double %123, %124 + %126 = tail call double @sqrt(double %125) nounwind readnone + %127 = fdiv double %114, %126 + store double %127, double* %.06, align 8 + %128 = fdiv double %117, %126 + store double %128, double* %.18, align 8 + %129 = fdiv double %120, %126 + store double %129, double* %.210, align 8 + br label %130 + +; <label>:130 ; preds = %78, %76, %73, %63, %0 + %.0 = phi i32 [ 0, %0 ], [ 0, %73 ], [ 0, %63 ], [ 1, %76 ], [ 1, %78 ] + ret i32 %.0 +} + +declare double @sqrt(double) nounwind readnone diff --git a/test/Transforms/Inline/inline_constprop.ll b/test/Transforms/Inline/inline_constprop.ll index dc35b60..0b48a72 100644 --- a/test/Transforms/Inline/inline_constprop.ll +++ b/test/Transforms/Inline/inline_constprop.ll @@ -110,3 +110,65 @@ bb.merge: bb.false: ret i32 %sub } + + +define i32 @PR13412.main() { +; This is a somewhat complicated three layer subprogram that was reported to +; compute the wrong value for a branch due to assuming that an argument +; mid-inline couldn't be equal to another pointer. +; +; After inlining, the branch should point directly to the exit block, not to +; the intermediate block. +; CHECK: @PR13412.main +; CHECK: br i1 true, label %[[TRUE_DEST:.*]], label %[[FALSE_DEST:.*]] +; CHECK: [[FALSE_DEST]]: +; CHECK-NEXT: call void @PR13412.fail() +; CHECK: [[TRUE_DEST]]: +; CHECK-NEXT: ret i32 0 + +entry: + %i1 = alloca i64 + store i64 0, i64* %i1 + %arraydecay = bitcast i64* %i1 to i32* + %call = call i1 @PR13412.first(i32* %arraydecay, i32* %arraydecay) + br i1 %call, label %cond.end, label %cond.false + +cond.false: + call void @PR13412.fail() + br label %cond.end + +cond.end: + ret i32 0 +} + +define internal i1 @PR13412.first(i32* %a, i32* %b) { +entry: + %call = call i32* @PR13412.second(i32* %a, i32* %b) + %cmp = icmp eq i32* %call, %b + ret i1 %cmp +} + +declare void @PR13412.fail() + +define internal i32* @PR13412.second(i32* %a, i32* %b) { +entry: + %sub.ptr.lhs.cast = ptrtoint i32* %b to i64 + %sub.ptr.rhs.cast = ptrtoint i32* %a to i64 + %sub.ptr.sub = sub i64 %sub.ptr.lhs.cast, %sub.ptr.rhs.cast + %sub.ptr.div = ashr exact i64 %sub.ptr.sub, 2 + %cmp = icmp ugt i64 %sub.ptr.div, 1 + br i1 %cmp, label %if.then, label %if.end3 + +if.then: + %0 = load i32* %a + %1 = load i32* %b + %cmp1 = icmp eq i32 %0, %1 + br i1 %cmp1, label %return, label %if.end3 + +if.end3: + br label %return + +return: + %retval.0 = phi i32* [ %b, %if.end3 ], [ %a, %if.then ] + ret i32* %retval.0 +} diff --git a/test/Transforms/InstCombine/2008-11-08-FCmp.ll b/test/Transforms/InstCombine/2008-11-08-FCmp.ll index c636288..f33a1f5 100644 --- a/test/Transforms/InstCombine/2008-11-08-FCmp.ll +++ b/test/Transforms/InstCombine/2008-11-08-FCmp.ll @@ -45,3 +45,12 @@ define i1 @test6(i32 %val) { ret i1 %2 ; CHECK: ret i1 false } + +; Check that optimizing unsigned >= comparisons correctly distinguishes +; positive and negative constants. <rdar://problem/12029145> +define i1 @test7(i32 %val) { + %1 = uitofp i32 %val to double + %2 = fcmp oge double %1, 3.200000e+00 + ret i1 %2 +; CHECK: icmp ugt i32 %val, 3 +} diff --git a/test/Transforms/InstCombine/2012-07-25-LoadPart.ll b/test/Transforms/InstCombine/2012-07-25-LoadPart.ll new file mode 100644 index 0000000..73e5a66 --- /dev/null +++ b/test/Transforms/InstCombine/2012-07-25-LoadPart.ll @@ -0,0 +1,12 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s +; PR13442 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S128" + +@test = constant [4 x i32] [i32 1, i32 2, i32 3, i32 4] + +define i64 @foo() { + %ret = load i64* bitcast (i8* getelementptr (i8* bitcast ([4 x i32]* @test to i8*), i64 2) to i64*), align 1 + ret i64 %ret + ; CHECK: ret i64 844424930263040 +} diff --git a/test/Transforms/InstCombine/2012-07-30-addrsp-bitcast.ll b/test/Transforms/InstCombine/2012-07-30-addrsp-bitcast.ll new file mode 100644 index 0000000..6f3df5b --- /dev/null +++ b/test/Transforms/InstCombine/2012-07-30-addrsp-bitcast.ll @@ -0,0 +1,10 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s +; CHECK: bitcast + +@base = internal addrspace(3) unnamed_addr global [16 x i32] zeroinitializer, align 16 +declare void @foo(i32*) + +define void @test() nounwind { + call void @foo(i32* getelementptr (i32* bitcast ([16 x i32] addrspace(3)* @base to i32*), i64 2147483647)) nounwind + ret void +} diff --git a/test/Transforms/InstCombine/crash.ll b/test/Transforms/InstCombine/crash.ll index d5af532..2ef6ac6 100644 --- a/test/Transforms/InstCombine/crash.ll +++ b/test/Transforms/InstCombine/crash.ll @@ -132,12 +132,14 @@ define i32 @test5a() { } define void @test5() { - store i1 true, i1* undef - %1 = invoke i32 @test5a() to label %exit unwind label %exit + store i1 true, i1* undef + %r = invoke i32 @test5a() to label %exit unwind label %unwind +unwind: + %exn = landingpad {i8*, i32} personality i32 (...)* @__gxx_personality_v0 + cleanup + br label %exit exit: - %exn = landingpad {i8*, i32} personality i32 (...)* @__gxx_personality_v0 - cleanup - ret void + ret void } diff --git a/test/Transforms/InstCombine/fcmp.ll b/test/Transforms/InstCombine/fcmp.ll index d08cbf5..fc1ced0 100644 --- a/test/Transforms/InstCombine/fcmp.ll +++ b/test/Transforms/InstCombine/fcmp.ll @@ -69,3 +69,93 @@ define float @test8(float %x) nounwind readnone optsize ssp { ; CHECK: @test8 ; CHECK-NEXT: fcmp olt float %x, 0.000000e+00 } + +declare double @fabs(double) nounwind readnone + +define i32 @test9(double %a) nounwind { + %call = tail call double @fabs(double %a) nounwind + %cmp = fcmp olt double %call, 0.000000e+00 + %conv = zext i1 %cmp to i32 + ret i32 %conv +; CHECK: @test9 +; CHECK-NOT: fabs +; CHECK: ret i32 0 +} + +define i32 @test10(double %a) nounwind { + %call = tail call double @fabs(double %a) nounwind + %cmp = fcmp ole double %call, 0.000000e+00 + %conv = zext i1 %cmp to i32 + ret i32 %conv +; CHECK: @test10 +; CHECK-NOT: fabs +; CHECK: fcmp oeq double %a, 0.000000e+00 +} + +define i32 @test11(double %a) nounwind { + %call = tail call double @fabs(double %a) nounwind + %cmp = fcmp ogt double %call, 0.000000e+00 + %conv = zext i1 %cmp to i32 + ret i32 %conv +; CHECK: @test11 +; CHECK-NOT: fabs +; CHECK: fcmp one double %a, 0.000000e+00 +} + +define i32 @test12(double %a) nounwind { + %call = tail call double @fabs(double %a) nounwind + %cmp = fcmp oge double %call, 0.000000e+00 + %conv = zext i1 %cmp to i32 + ret i32 %conv +; CHECK: @test12 +; CHECK-NOT: fabs +; CHECK: fcmp ord double %a, 0.000000e+00 +} + +define i32 @test13(double %a) nounwind { + %call = tail call double @fabs(double %a) nounwind + %cmp = fcmp une double %call, 0.000000e+00 + %conv = zext i1 %cmp to i32 + ret i32 %conv +; CHECK: @test13 +; CHECK-NOT: fabs +; CHECK: fcmp une double %a, 0.000000e+00 +} + +define i32 @test14(double %a) nounwind { + %call = tail call double @fabs(double %a) nounwind + %cmp = fcmp oeq double %call, 0.000000e+00 + %conv = zext i1 %cmp to i32 + ret i32 %conv +; CHECK: @test14 +; CHECK-NOT: fabs +; CHECK: fcmp oeq double %a, 0.000000e+00 +} + +define i32 @test15(double %a) nounwind { + %call = tail call double @fabs(double %a) nounwind + %cmp = fcmp one double %call, 0.000000e+00 + %conv = zext i1 %cmp to i32 + ret i32 %conv +; CHECK: @test15 +; CHECK-NOT: fabs +; CHECK: fcmp one double %a, 0.000000e+00 +} + +define i32 @test16(double %a) nounwind { + %call = tail call double @fabs(double %a) nounwind + %cmp = fcmp ueq double %call, 0.000000e+00 + %conv = zext i1 %cmp to i32 + ret i32 %conv +; CHECK: @test16 +; CHECK-NOT: fabs +; CHECK: fcmp ueq double %a, 0.000000e+00 +} + +; Don't crash. +define i32 @test17(double %a, double (double)* %p) nounwind { + %call = tail call double %p(double %a) nounwind + %cmp = fcmp ueq double %call, 0.000000e+00 + %conv = zext i1 %cmp to i32 + ret i32 %conv +} diff --git a/test/Transforms/ScalarRepl/memcpy-from-global.ll b/test/Transforms/InstCombine/memcpy-from-global.ll index 5557a8f..83c893e 100644 --- a/test/Transforms/ScalarRepl/memcpy-from-global.ll +++ b/test/Transforms/InstCombine/memcpy-from-global.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -scalarrepl -S | FileCheck %s +; RUN: opt < %s -instcombine -S | FileCheck %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" @C.0.1248 = internal constant [128 x float] [ float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float -1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float -1.000000e+00, float 1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float -1.000000e+00, float 0.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00 ], align 32 ; <[128 x float]*> [#uses=1] @@ -6,13 +6,11 @@ define float @test1(i32 %hash, float %x, float %y, float %z, float %w) { entry: %lookupTable = alloca [128 x float], align 16 ; <[128 x float]*> [#uses=5] %lookupTable1 = bitcast [128 x float]* %lookupTable to i8* ; <i8*> [#uses=1] - call void @llvm.memcpy.i32( i8* %lookupTable1, i8* bitcast ([128 x float]* @C.0.1248 to i8*), i32 512, i32 16 ) + call void @llvm.memcpy.p0i8.p0i8.i64(i8* %lookupTable1, i8* bitcast ([128 x float]* @C.0.1248 to i8*), i64 512, i32 16, i1 false) ; CHECK: @test1 ; CHECK-NOT: alloca ; CHECK-NOT: call{{.*}}@llvm.memcpy -; CHECK: %lookupTable1 = bitcast [128 x float]* @C.0.1248 to i8* -; CHECK-NOT: call{{.*}}@llvm.memcpy %tmp3 = shl i32 %hash, 2 ; <i32> [#uses=1] %tmp5 = and i32 %tmp3, 124 ; <i32> [#uses=4] @@ -38,10 +36,6 @@ entry: ret float %tmp43 } -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) - - - declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind %T = type { i8, [123 x i8] } @@ -59,10 +53,11 @@ define void @test2() { ; CHECK: @test2 ; %A alloca is deleted -; CHECK-NEXT: %B = alloca %T +; CHECK-NEXT: alloca [124 x i8] +; CHECK-NEXT: getelementptr inbounds [124 x i8]* ; use @G instead of %A -; CHECK-NEXT: %a = bitcast %T* @G to i8* +; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* %{{.*}}, i8* getelementptr inbounds (%T* @G, i64 0, i32 0) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast (%T* @G to i8*), i64 124, i32 4, i1 false) call void @llvm.memcpy.p0i8.p0i8.i64(i8* %b, i8* %a, i64 124, i32 4, i1 false) call void @bar(i8* %b) @@ -79,8 +74,7 @@ define void @test3() { call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast (%T* @G to i8*), i64 124, i32 4, i1 false) call void @bar(i8* %a) readonly ; CHECK: @test3 -; CHECK-NEXT: %a = bitcast %T* @G to i8* -; CHECK-NEXT: call void @bar(i8* %a) +; CHECK-NEXT: call void @bar(i8* getelementptr inbounds (%T* @G, i64 0, i32 0)) ret void } @@ -90,8 +84,7 @@ define void @test4() { call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast (%T* @G to i8*), i64 124, i32 4, i1 false) call void @baz(i8* byval %a) ; CHECK: @test4 -; CHECK-NEXT: %a = bitcast %T* @G to i8* -; CHECK-NEXT: call void @baz(i8* byval %a) +; CHECK-NEXT: call void @baz(i8* byval getelementptr inbounds (%T* @G, i64 0, i32 0)) ret void } @@ -103,8 +96,7 @@ define void @test5() { call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast (%T* @G to i8*), i64 124, i32 4, i1 false) call void @baz(i8* byval %a) ; CHECK: @test5 -; CHECK-NEXT: %a = bitcast %T* @G to i8* -; CHECK-NEXT: call void @baz(i8* byval %a) +; CHECK-NEXT: call void @baz(i8* byval getelementptr inbounds (%T* @G, i64 0, i32 0)) ret void } @@ -118,8 +110,7 @@ define void @test6() { call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast ([2 x %U]* @H to i8*), i64 20, i32 16, i1 false) call void @bar(i8* %a) readonly ; CHECK: @test6 -; CHECK-NEXT: %a = bitcast -; CHECK-NEXT: call void @bar(i8* %a) +; CHECK-NEXT: call void @bar(i8* bitcast ([2 x %U]* @H to i8*)) ret void } @@ -129,8 +120,7 @@ define void @test7() { call void @llvm.memcpy.p0i8.p0i8.i64(i8* %a, i8* bitcast (%U* getelementptr ([2 x %U]* @H, i64 0, i32 0) to i8*), i64 20, i32 4, i1 false) call void @bar(i8* %a) readonly ; CHECK: @test7 -; CHECK-NEXT: %a = bitcast -; CHECK-NEXT: call void @bar(i8* %a) +; CHECK-NEXT: call void @bar(i8* bitcast ([2 x %U]* @H to i8*)) ret void } diff --git a/test/Transforms/InstCombine/memcpy.ll b/test/Transforms/InstCombine/memcpy.ll index 8a2e3aa..3a68ff9 100644 --- a/test/Transforms/InstCombine/memcpy.ll +++ b/test/Transforms/InstCombine/memcpy.ll @@ -1,6 +1,7 @@ ; RUN: opt < %s -instcombine -S | FileCheck %s declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind define void @test1(i8* %a) { tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %a, i8* %a, i32 100, i32 1, i1 false) @@ -17,3 +18,10 @@ define void @test2(i8* %a) { ; CHECK: define void @test2 ; CHECK-NEXT: call void @llvm.memcpy } + +define void @test3(i8* %d, i8* %s) { + tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %d, i8* %s, i64 17179869184, i32 4, i1 false) + ret void +; CHECK: define void @test3 +; CHECK-NEXT: call void @llvm.memcpy +} diff --git a/test/Transforms/InstCombine/objsize.ll b/test/Transforms/InstCombine/objsize.ll index f5a4581..31a3cb4 100644 --- a/test/Transforms/InstCombine/objsize.ll +++ b/test/Transforms/InstCombine/objsize.ll @@ -171,3 +171,88 @@ define i32 @test8(i8** %esc) { ; CHECK: ret i32 30 ret i32 %objsize } + +declare noalias i8* @strdup(i8* nocapture) nounwind +declare noalias i8* @strndup(i8* nocapture, i32) nounwind + +; CHECK: @test9 +define i32 @test9(i8** %esc) { + %call = tail call i8* @strdup(i8* getelementptr inbounds ([8 x i8]* @.str, i64 0, i64 0)) nounwind + store i8* %call, i8** %esc, align 8 + %1 = tail call i32 @llvm.objectsize.i32(i8* %call, i1 true) +; CHECK: ret i32 8 + ret i32 %1 +} + +; CHECK: @test10 +define i32 @test10(i8** %esc) { + %call = tail call i8* @strndup(i8* getelementptr inbounds ([8 x i8]* @.str, i64 0, i64 0), i32 3) nounwind + store i8* %call, i8** %esc, align 8 + %1 = tail call i32 @llvm.objectsize.i32(i8* %call, i1 true) +; CHECK: ret i32 4 + ret i32 %1 +} + +; CHECK: @test11 +define i32 @test11(i8** %esc) { + %call = tail call i8* @strndup(i8* getelementptr inbounds ([8 x i8]* @.str, i64 0, i64 0), i32 7) nounwind + store i8* %call, i8** %esc, align 8 + %1 = tail call i32 @llvm.objectsize.i32(i8* %call, i1 true) +; CHECK: ret i32 8 + ret i32 %1 +} + +; CHECK: @test12 +define i32 @test12(i8** %esc) { + %call = tail call i8* @strndup(i8* getelementptr inbounds ([8 x i8]* @.str, i64 0, i64 0), i32 8) nounwind + store i8* %call, i8** %esc, align 8 + %1 = tail call i32 @llvm.objectsize.i32(i8* %call, i1 true) +; CHECK: ret i32 8 + ret i32 %1 +} + +; CHECK: @test13 +define i32 @test13(i8** %esc) { + %call = tail call i8* @strndup(i8* getelementptr inbounds ([8 x i8]* @.str, i64 0, i64 0), i32 57) nounwind + store i8* %call, i8** %esc, align 8 + %1 = tail call i32 @llvm.objectsize.i32(i8* %call, i1 true) +; CHECK: ret i32 8 + ret i32 %1 +} + +; CHECK: @PR13390 +define i32 @PR13390(i1 %bool, i8* %a) { +entry: + %cond = or i1 %bool, true + br i1 %cond, label %return, label %xpto + +xpto: + %select = select i1 %bool, i8* %select, i8* %a + %select2 = select i1 %bool, i8* %a, i8* %select2 + %0 = tail call i32 @llvm.objectsize.i32(i8* %select, i1 true) + %1 = tail call i32 @llvm.objectsize.i32(i8* %select2, i1 true) + %2 = add i32 %0, %1 +; CHECK: ret i32 undef + ret i32 %2 + +return: + ret i32 42 +} + +; CHECK: @PR13621 +define i32 @PR13621(i1 %bool) nounwind { +entry: + %cond = or i1 %bool, true + br i1 %cond, label %return, label %xpto + +; technically reachable, but this malformed IR may appear as a result of constant propagation +xpto: + %gep2 = getelementptr i8* %gep, i32 1 + %gep = getelementptr i8* %gep2, i32 1 + %o = call i32 @llvm.objectsize.i32(i8* %gep, i1 true) +; CHECK: ret i32 undef + ret i32 %o + +return: + ret i32 7 +} diff --git a/test/Transforms/InstCombine/select-crash.ll b/test/Transforms/InstCombine/select-crash.ll index 18af152..946ea2b 100644 --- a/test/Transforms/InstCombine/select-crash.ll +++ b/test/Transforms/InstCombine/select-crash.ll @@ -30,3 +30,20 @@ define <4 x float> @foo(i1 %b, <4 x float> %x, <4 x float> %y, <4 x float> %z) { %sel = select i1 %b, <4 x float> %a, <4 x float> %sub ret <4 x float> %sel } + +; CHECK: @test3 +define i32 @test3(i1 %bool, i32 %a) { +entry: + %cond = or i1 %bool, true + br i1 %cond, label %return, label %xpto + +; technically reachable, but this malformed IR may appear as a result of constant propagation +xpto: + %select = select i1 %bool, i32 %a, i32 %select + %select2 = select i1 %bool, i32 %select2, i32 %a + %sum = add i32 %select, %select2 + ret i32 %sum + +return: + ret i32 7 +} diff --git a/test/Transforms/InstCombine/vec_demanded_elts.ll b/test/Transforms/InstCombine/vec_demanded_elts.ll index cc63371..0019a57 100644 --- a/test/Transforms/InstCombine/vec_demanded_elts.ll +++ b/test/Transforms/InstCombine/vec_demanded_elts.ll @@ -162,4 +162,51 @@ entry: ret <4 x float> %shuffle9.i } +define <2 x float> @test_fptrunc(double %f) { +; CHECK: @test_fptrunc +; CHECK: insertelement +; CHECK: insertelement +; CHECK-NOT: insertelement + %tmp9 = insertelement <4 x double> undef, double %f, i32 0 + %tmp10 = insertelement <4 x double> %tmp9, double 0.000000e+00, i32 1 + %tmp11 = insertelement <4 x double> %tmp10, double 0.000000e+00, i32 2 + %tmp12 = insertelement <4 x double> %tmp11, double 0.000000e+00, i32 3 + %tmp5 = fptrunc <4 x double> %tmp12 to <4 x float> + %ret = shufflevector <4 x float> %tmp5, <4 x float> undef, <2 x i32> <i32 0, i32 1> + ret <2 x float> %ret +} + +define <2 x double> @test_fpext(float %f) { +; CHECK: @test_fpext +; CHECK: insertelement +; CHECK: insertelement +; CHECK-NOT: insertelement + %tmp9 = insertelement <4 x float> undef, float %f, i32 0 + %tmp10 = insertelement <4 x float> %tmp9, float 0.000000e+00, i32 1 + %tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2 + %tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3 + %tmp5 = fpext <4 x float> %tmp12 to <4 x double> + %ret = shufflevector <4 x double> %tmp5, <4 x double> undef, <2 x i32> <i32 0, i32 1> + ret <2 x double> %ret +} + +define <4 x float> @test_select(float %f, float %g) { +; CHECK: @test_select +; CHECK: %a0 = insertelement <4 x float> undef, float %f, i32 0 +; CHECK-NOT: insertelement +; CHECK: %a3 = insertelement <4 x float> %a0, float 3.000000e+00, i32 3 +; CHECK-NOT: insertelement +; CHECK: %ret = select <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x float> %a3, <4 x float> <float undef, float 4.000000e+00, float 5.000000e+00, float undef> + %a0 = insertelement <4 x float> undef, float %f, i32 0 + %a1 = insertelement <4 x float> %a0, float 1.000000e+00, i32 1 + %a2 = insertelement <4 x float> %a1, float 2.000000e+00, i32 2 + %a3 = insertelement <4 x float> %a2, float 3.000000e+00, i32 3 + %b0 = insertelement <4 x float> undef, float %g, i32 0 + %b1 = insertelement <4 x float> %b0, float 4.000000e+00, i32 1 + %b2 = insertelement <4 x float> %b1, float 5.000000e+00, i32 2 + %b3 = insertelement <4 x float> %b2, float 6.000000e+00, i32 3 + %ret = select <4 x i1> <i1 true, i1 false, i1 false, i1 true>, <4 x float> %a3, <4 x float> %b3 + ret <4 x float> %ret +} + diff --git a/test/Transforms/LICM/promote-order.ll b/test/Transforms/LICM/promote-order.ll new file mode 100644 index 0000000..b016265 --- /dev/null +++ b/test/Transforms/LICM/promote-order.ll @@ -0,0 +1,41 @@ +; RUN: opt -tbaa -basicaa -licm -S < %s | FileCheck %s + +; LICM should keep the stores in their original order when it sinks/promotes them. +; rdar://12045203 + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.8.0" + +@p = external global i8* + +define i32* @_Z4doiti(i32 %n, float* %tmp1, i32* %tmp3) nounwind { +entry: + %cmp1 = icmp slt i32 0, %n + br i1 %cmp1, label %for.body.lr.ph, label %for.end + +for.body.lr.ph: ; preds = %entry + br label %for.body + +for.body: ; preds = %for.body, %for.body.lr.ph + %i.02 = phi i32 [ 0, %for.body.lr.ph ], [ %inc, %for.body ] + store float 1.000000e+00, float* %tmp1, align 4, !tbaa !1 + store i32 1, i32* %tmp3, align 4, !tbaa !2 + %inc = add nsw i32 %i.02, 1 + %cmp = icmp slt i32 %inc, %n + br i1 %cmp, label %for.body, label %for.cond.for.end_crit_edge + +; CHECK: for.cond.for.end_crit_edge: +; CHECK: store float 1.000000e+00, float* %tmp1 +; CHECK: store i32 1, i32* %tmp3 +for.cond.for.end_crit_edge: ; preds = %for.body + %split = phi i32* [ %tmp3, %for.body ] + br label %for.end + +for.end: ; preds = %for.cond.for.end_crit_edge, %entry + %r.0.lcssa = phi i32* [ %split, %for.cond.for.end_crit_edge ], [ undef, %entry ] + ret i32* %r.0.lcssa +} + +!0 = metadata !{metadata !"minimal TBAA"} +!1 = metadata !{metadata !"float", metadata !0} +!2 = metadata !{metadata !"int", metadata !0} diff --git a/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll b/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll index 70ead33..b5124ea 100644 --- a/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll +++ b/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll @@ -44,7 +44,7 @@ declare %s* @getstruct() nounwind ; CHECK: @main ; Check that the loop preheader contains no address computation. -; CHECK: %entry +; CHECK: %end_of_chain ; CHECK-NOT: add{{.*}}lsl ; CHECK: ldr{{.*}}lsl #2 ; CHECK: ldr{{.*}}lsl #2 @@ -65,15 +65,15 @@ while.cond: while.body: %v3 = load i32* @ncol, align 4, !tbaa !0 - br label %while.cond.i + br label %end_of_chain -while.cond.i: +end_of_chain: %state.i = getelementptr inbounds %s* %call18, i32 0, i32 0 %v4 = load i32** %state.i, align 4, !tbaa !3 br label %while.cond.i.i while.cond.i.i: - %counter.0.i.i = phi i32 [ %v3, %while.cond.i ], [ %dec.i.i, %land.rhs.i.i ] + %counter.0.i.i = phi i32 [ %v3, %end_of_chain ], [ %dec.i.i, %land.rhs.i.i ] %dec.i.i = add nsw i32 %counter.0.i.i, -1 %tobool.i.i = icmp eq i32 %counter.0.i.i, 0 br i1 %tobool.i.i, label %where.exit, label %land.rhs.i.i diff --git a/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll b/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll index a9b815f..c3b8b89 100644 --- a/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll +++ b/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll @@ -99,7 +99,6 @@ while.end: ; preds = %entry ; CHECK: %for.body3.lr.ph.us.i.loopexit ; CHECK-NEXT: in Loop: Header ; CHECK-NEXT: incq -; CHECK-NEXT: .align ; CHECK-NEXT: %for.body3.us.i ; CHECK-NEXT: Inner Loop ; CHECK: testb diff --git a/test/Transforms/ObjCARC/basic.ll b/test/Transforms/ObjCARC/basic.ll index d9bb3f2..0a7ba5d 100644 --- a/test/Transforms/ObjCARC/basic.ll +++ b/test/Transforms/ObjCARC/basic.ll @@ -1272,7 +1272,7 @@ g: ; Delete retain,release pairs around loops. ; CHECK: define void @test39( -; CHECK_NOT: @objc_ +; CHECK-NOT: @objc_ ; CHECK: } define void @test39(i8* %p) { entry: @@ -1290,7 +1290,7 @@ exit: ; preds = %loop ; Delete retain,release pairs around loops containing uses. ; CHECK: define void @test39b( -; CHECK_NOT: @objc_ +; CHECK-NOT: @objc_ ; CHECK: } define void @test39b(i8* %p) { entry: @@ -1309,7 +1309,7 @@ exit: ; preds = %loop ; Delete retain,release pairs around loops containing potential decrements. ; CHECK: define void @test39c( -; CHECK_NOT: @objc_ +; CHECK-NOT: @objc_ ; CHECK: } define void @test39c(i8* %p) { entry: @@ -1329,7 +1329,7 @@ exit: ; preds = %loop ; the successors are in a different order. ; CHECK: define void @test40( -; CHECK_NOT: @objc_ +; CHECK-NOT: @objc_ ; CHECK: } define void @test40(i8* %p) { entry: diff --git a/test/Transforms/ObjCARC/invoke.ll b/test/Transforms/ObjCARC/invoke.ll index 76e82a5..1a58e34 100644 --- a/test/Transforms/ObjCARC/invoke.ll +++ b/test/Transforms/ObjCARC/invoke.ll @@ -76,12 +76,12 @@ done: ; CHECK: define void @test2() { ; CHECK: invoke.cont: ; CHECK-NEXT: call i8* @objc_retain -; CHEK-NOT: @objc +; CHECK-NOT: @objc_r ; CHECK: finally.cont: ; CHECK-NEXT: call void @objc_release -; CHEK-NOT: @objc +; CHECK-NOT: @objc ; CHECK: finally.rethrow: -; CHEK-NOT: @objc +; CHECK-NOT: @objc ; CHECK: } define void @test2() { entry: diff --git a/test/Transforms/PruneEH/2003-09-14-ExternalCall.ll b/test/Transforms/PruneEH/2003-09-14-ExternalCall.ll deleted file mode 100644 index 64aba46..0000000 --- a/test/Transforms/PruneEH/2003-09-14-ExternalCall.ll +++ /dev/null @@ -1,14 +0,0 @@ -; RUN: opt < %s -prune-eh -S | grep invoke - -declare void @External() - -define void @foo() { - invoke void @External( ) - to label %Cont unwind label %Cont -Cont: ; preds = %0, %0 - %exn = landingpad {i8*, i32} personality i32 (...)* @__gxx_personality_v0 - cleanup - ret void -} - -declare i32 @__gxx_personality_v0(...) diff --git a/test/Transforms/Reassociate/2012-05-08-UndefLeak.ll b/test/Transforms/Reassociate/2012-05-08-UndefLeak.ll index 1e522e6..2f5a53e 100644 --- a/test/Transforms/Reassociate/2012-05-08-UndefLeak.ll +++ b/test/Transforms/Reassociate/2012-05-08-UndefLeak.ll @@ -1,6 +1,8 @@ ; RUN: opt < %s -reassociate -S | FileCheck %s ; PR12169 ; PR12764 +; XFAIL: * +; Transform disabled until PR13021 is fixed. define i64 @f(i64 %x0) { ; CHECK: @f diff --git a/test/Transforms/Reassociate/mightymul.ll b/test/Transforms/Reassociate/mightymul.ll new file mode 100644 index 0000000..cfbc485 --- /dev/null +++ b/test/Transforms/Reassociate/mightymul.ll @@ -0,0 +1,35 @@ +; RUN: opt < %s -reassociate +; PR13021 + +define i32 @foo(i32 %x) { + %t0 = mul i32 %x, %x + %t1 = mul i32 %t0, %t0 + %t2 = mul i32 %t1, %t1 + %t3 = mul i32 %t2, %t2 + %t4 = mul i32 %t3, %t3 + %t5 = mul i32 %t4, %t4 + %t6 = mul i32 %t5, %t5 + %t7 = mul i32 %t6, %t6 + %t8 = mul i32 %t7, %t7 + %t9 = mul i32 %t8, %t8 + %t10 = mul i32 %t9, %t9 + %t11 = mul i32 %t10, %t10 + %t12 = mul i32 %t11, %t11 + %t13 = mul i32 %t12, %t12 + %t14 = mul i32 %t13, %t13 + %t15 = mul i32 %t14, %t14 + %t16 = mul i32 %t15, %t15 + %t17 = mul i32 %t16, %t16 + %t18 = mul i32 %t17, %t17 + %t19 = mul i32 %t18, %t18 + %t20 = mul i32 %t19, %t19 + %t21 = mul i32 %t20, %t20 + %t22 = mul i32 %t21, %t21 + %t23 = mul i32 %t22, %t22 + %t24 = mul i32 %t23, %t23 + %t25 = mul i32 %t24, %t24 + %t26 = mul i32 %t25, %t25 + %t27 = mul i32 %t26, %t26 + %t28 = mul i32 %t27, %t27 + ret i32 %t28 +} diff --git a/test/Transforms/ScalarRepl/crash.ll b/test/Transforms/ScalarRepl/crash.ll index cd4dc32..58c5a3a 100644 --- a/test/Transforms/ScalarRepl/crash.ll +++ b/test/Transforms/ScalarRepl/crash.ll @@ -260,5 +260,27 @@ entry: ret void } +; rdar://11861001 - The dynamic GEP here was incorrectly making all accesses +; to the alloca think they were also dynamic. Inserts and extracts created to +; access the vector were all being based from the dynamic access, even in BBs +; not dominated by the GEP. +define fastcc void @test() optsize inlinehint ssp align 2 { +entry: + %alloc.0.0 = alloca <4 x float>, align 16 + %bitcast = bitcast <4 x float>* %alloc.0.0 to [4 x float]* + %idx3 = getelementptr inbounds [4 x float]* %bitcast, i32 0, i32 3 + store float 0.000000e+00, float* %idx3, align 4 + br label %for.body10 + +for.body10: ; preds = %for.body10, %entry + %loopidx = phi i32 [ 0, %entry ], [ undef, %for.body10 ] + %unusedidx = getelementptr inbounds <4 x float>* %alloc.0.0, i32 0, i32 %loopidx + br i1 undef, label %for.end, label %for.body10 + +for.end: ; preds = %for.body10 + store <4 x float> <float -1.000000e+00, float -1.000000e+00, float -1.000000e+00, float 0.000000e+00>, <4 x float>* %alloc.0.0, align 16 + ret void +} + declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind diff --git a/test/Transforms/SimplifyCFG/2003-08-05-MishandleInvoke.ll b/test/Transforms/SimplifyCFG/2003-08-05-MishandleInvoke.ll deleted file mode 100644 index bc61a75..0000000 --- a/test/Transforms/SimplifyCFG/2003-08-05-MishandleInvoke.ll +++ /dev/null @@ -1,15 +0,0 @@ -; Do not remove the invoke! -; -; RUN: opt < %s -simplifycfg -S | grep invoke - -define i32 @test() { - invoke i32 @test( ) - to label %Ret unwind label %Ret ; <i32>:1 [#uses=0] -Ret: ; preds = %0, %0 - %val = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) - catch i8* null - %A = add i32 0, 1 ; <i32> [#uses=1] - ret i32 %A -} - -declare i32 @__gxx_personality_v0(...) diff --git a/test/Transforms/SimplifyCFG/2006-10-29-InvokeCrash.ll b/test/Transforms/SimplifyCFG/2006-10-29-InvokeCrash.ll deleted file mode 100644 index 27d9d8f..0000000 --- a/test/Transforms/SimplifyCFG/2006-10-29-InvokeCrash.ll +++ /dev/null @@ -1,567 +0,0 @@ -; RUN: opt < %s -simplifycfg -disable-output -; END. - %struct..4._102 = type { %struct.QVectorData* } - %struct..5._125 = type { %struct.QMapData* } - %struct.QAbstractTextDocumentLayout = type { %struct.QObject } - %struct.QBasicAtomic = type { i32 } - %struct.QFont = type { %struct.QFontPrivate*, i32 } - %struct.QFontMetrics = type { %struct.QFontPrivate* } - %struct.QFontPrivate = type opaque - %"struct.QFragmentMap<QTextBlockData>" = type { %struct.QFragmentMapData } - %struct.QFragmentMapData = type { %"struct.QFragmentMapData::._154", i32 } - %"struct.QFragmentMapData::._154" = type { %"struct.QFragmentMapData::Header"* } - %"struct.QFragmentMapData::Header" = type { i32, i32, i32, i32, i32, i32, i32, i32 } - %"struct.QHash<uint,QHashDummyValue>" = type { %"struct.QHash<uint,QHashDummyValue>::._152" } - %"struct.QHash<uint,QHashDummyValue>::._152" = type { %struct.QHashData* } - %struct.QHashData = type { %"struct.QHashData::Node"*, %"struct.QHashData::Node"**, %struct.QBasicAtomic, i32, i32, i16, i16, i32, i8 } - %"struct.QHashData::Node" = type { %"struct.QHashData::Node"*, i32 } - %"struct.QList<QObject*>::._92" = type { %struct.QListData } - %"struct.QList<QPointer<QObject> >" = type { %"struct.QList<QObject*>::._92" } - %struct.QListData = type { %"struct.QListData::Data"* } - %"struct.QListData::Data" = type { %struct.QBasicAtomic, i32, i32, i32, i8, [1 x i8*] } - %"struct.QMap<QUrl,QVariant>" = type { %struct..5._125 } - %struct.QMapData = type { %"struct.QMapData::Node"*, [12 x %"struct.QMapData::Node"*], %struct.QBasicAtomic, i32, i32, i32, i8 } - %"struct.QMapData::Node" = type { %"struct.QMapData::Node"*, [1 x %"struct.QMapData::Node"*] } - %struct.QObject = type { i32 (...)**, %struct.QObjectData* } - %struct.QObjectData = type { i32 (...)**, %struct.QObject*, %struct.QObject*, %"struct.QList<QPointer<QObject> >", i8, [3 x i8], i32, i32 } - %struct.QObjectPrivate = type { %struct.QObjectData, i32, %struct.QObject*, %"struct.QList<QPointer<QObject> >", %"struct.QVector<QAbstractTextDocumentLayout::Selection>", %struct.QString } - %struct.QPaintDevice = type { i32 (...)**, i16 } - %struct.QPainter = type { %struct.QPainterPrivate* } - %struct.QPainterPrivate = type opaque - %struct.QPointF = type { double, double } - %struct.QPrinter = type { %struct.QPaintDevice, %struct.QPrinterPrivate* } - %struct.QPrinterPrivate = type opaque - %struct.QRectF = type { double, double, double, double } - %"struct.QSet<uint>" = type { %"struct.QHash<uint,QHashDummyValue>" } - %"struct.QSharedDataPointer<QTextFormatPrivate>" = type { %struct.QTextFormatPrivate* } - %struct.QString = type { %"struct.QString::Data"* } - %"struct.QString::Data" = type { %struct.QBasicAtomic, i32, i32, i16*, i8, i8, [1 x i16] } - %struct.QTextBlockFormat = type { %struct.QTextFormat } - %struct.QTextBlockGroup = type { %struct.QAbstractTextDocumentLayout } - %struct.QTextDocumentConfig = type { %struct.QString } - %struct.QTextDocumentPrivate = type { %struct.QObjectPrivate, %struct.QString, %"struct.QVector<QAbstractTextDocumentLayout::Selection>", i1, i32, i32, i1, i32, i32, i32, i32, i1, %struct.QTextFormatCollection, %struct.QTextBlockGroup*, %struct.QAbstractTextDocumentLayout*, %"struct.QFragmentMap<QTextBlockData>", %"struct.QFragmentMap<QTextBlockData>", i32, %"struct.QList<QPointer<QObject> >", %"struct.QList<QPointer<QObject> >", %"struct.QMap<QUrl,QVariant>", %"struct.QMap<QUrl,QVariant>", %"struct.QMap<QUrl,QVariant>", %struct.QTextDocumentConfig, i1, i1, %struct.QPointF } - %struct.QTextFormat = type { %"struct.QSharedDataPointer<QTextFormatPrivate>", i32 } - %struct.QTextFormatCollection = type { %"struct.QVector<QAbstractTextDocumentLayout::Selection>", %"struct.QVector<QAbstractTextDocumentLayout::Selection>", %"struct.QSet<uint>", %struct.QFont } - %struct.QTextFormatPrivate = type opaque - %"struct.QVector<QAbstractTextDocumentLayout::Selection>" = type { %struct..4._102 } - %struct.QVectorData = type { %struct.QBasicAtomic, i32, i32, i8 } - -define void @_ZNK13QTextDocument5printEP8QPrinter(%struct.QAbstractTextDocumentLayout* %this, %struct.QPrinter* %printer) { -entry: - %tmp = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=2] - %tmp.upgrd.1 = alloca %struct.QRectF, align 16 ; <%struct.QRectF*> [#uses=5] - %tmp2 = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=3] - %tmp.upgrd.2 = alloca %struct.QFontMetrics, align 16 ; <%struct.QFontMetrics*> [#uses=4] - %tmp.upgrd.3 = alloca %struct.QFont, align 16 ; <%struct.QFont*> [#uses=4] - %tmp3 = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=2] - %p = alloca %struct.QPainter, align 16 ; <%struct.QPainter*> [#uses=14] - %body = alloca %struct.QRectF, align 16 ; <%struct.QRectF*> [#uses=9] - %pageNumberPos = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=4] - %scaledPageSize = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=6] - %printerPageSize = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=3] - %fmt = alloca %struct.QTextBlockFormat, align 16 ; <%struct.QTextBlockFormat*> [#uses=5] - %font = alloca %struct.QFont, align 16 ; <%struct.QFont*> [#uses=5] - %tmp.upgrd.4 = call %struct.QTextDocumentPrivate* @_ZNK13QTextDocument6d_funcEv( %struct.QAbstractTextDocumentLayout* %this ) ; <%struct.QTextDocumentPrivate*> [#uses=5] - %tmp.upgrd.5 = getelementptr %struct.QPrinter* %printer, i32 0, i32 0 ; <%struct.QPaintDevice*> [#uses=1] - call void @_ZN8QPainterC1EP12QPaintDevice( %struct.QPainter* %p, %struct.QPaintDevice* %tmp.upgrd.5 ) - %tmp.upgrd.6 = invoke i1 @_ZNK8QPainter8isActiveEv( %struct.QPainter* %p ) - to label %invcont unwind label %cleanup329 ; <i1> [#uses=1] -invcont: ; preds = %entry - br i1 %tmp.upgrd.6, label %cond_next, label %cleanup328 -cond_next: ; preds = %invcont - %tmp8 = invoke %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument14documentLayoutEv( %struct.QAbstractTextDocumentLayout* %this ) - to label %invcont7 unwind label %cleanup329 ; <%struct.QAbstractTextDocumentLayout*> [#uses=0] -invcont7: ; preds = %cond_next - %tmp10 = getelementptr %struct.QTextDocumentPrivate* %tmp.upgrd.4, i32 0, i32 26 ; <%struct.QPointF*> [#uses=1] - call void @_ZN7QPointFC1Edd( %struct.QPointF* %tmp, double 0.000000e+00, double 0.000000e+00 ) - call void @_ZN6QRectFC1ERK7QPointFRK6QSizeF( %struct.QRectF* %body, %struct.QPointF* %tmp, %struct.QPointF* %tmp10 ) - call void @_ZN7QPointFC1Ev( %struct.QPointF* %pageNumberPos ) - %tmp12 = getelementptr %struct.QTextDocumentPrivate* %tmp.upgrd.4, i32 0, i32 26 ; <%struct.QPointF*> [#uses=1] - %tmp13 = call i1 @_ZNK6QSizeF7isValidEv( %struct.QPointF* %tmp12 ) ; <i1> [#uses=1] - br i1 %tmp13, label %cond_next15, label %bb -cond_next15: ; preds = %invcont7 - %tmp17 = getelementptr %struct.QTextDocumentPrivate* %tmp.upgrd.4, i32 0, i32 26 ; <%struct.QPointF*> [#uses=1] - %tmp.upgrd.7 = call double @_ZNK6QSizeF6heightEv( %struct.QPointF* %tmp17 ) ; <double> [#uses=1] - %tmp18 = fcmp oeq double %tmp.upgrd.7, 0x41DFFFFFFFC00000 ; <i1> [#uses=1] - br i1 %tmp18, label %bb, label %cond_next20 -cond_next20: ; preds = %cond_next15 - br label %bb21 -bb: ; preds = %cond_next15, %invcont7 - br label %bb21 -bb21: ; preds = %bb, %cond_next20 - %iftmp.406.0 = phi i1 [ false, %bb ], [ true, %cond_next20 ] ; <i1> [#uses=1] - br i1 %iftmp.406.0, label %cond_true24, label %cond_false -cond_true24: ; preds = %bb21 - %tmp.upgrd.8 = invoke i32 @_Z13qt_defaultDpiv( ) - to label %invcont25 unwind label %cleanup329 ; <i32> [#uses=1] -invcont25: ; preds = %cond_true24 - %tmp26 = sitofp i32 %tmp.upgrd.8 to double ; <double> [#uses=2] - %tmp30 = invoke %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument14documentLayoutEv( %struct.QAbstractTextDocumentLayout* %this ) - to label %invcont29 unwind label %cleanup329 ; <%struct.QAbstractTextDocumentLayout*> [#uses=1] -invcont29: ; preds = %invcont25 - %tmp32 = invoke %struct.QPaintDevice* @_ZNK27QAbstractTextDocumentLayout11paintDeviceEv( %struct.QAbstractTextDocumentLayout* %tmp30 ) - to label %invcont31 unwind label %cleanup329 ; <%struct.QPaintDevice*> [#uses=3] -invcont31: ; preds = %invcont29 - %tmp34 = icmp eq %struct.QPaintDevice* %tmp32, null ; <i1> [#uses=1] - br i1 %tmp34, label %cond_next42, label %cond_true35 -cond_true35: ; preds = %invcont31 - %tmp38 = invoke i32 @_ZNK12QPaintDevice11logicalDpiXEv( %struct.QPaintDevice* %tmp32 ) - to label %invcont37 unwind label %cleanup329 ; <i32> [#uses=1] -invcont37: ; preds = %cond_true35 - %tmp38.upgrd.9 = sitofp i32 %tmp38 to double ; <double> [#uses=1] - %tmp41 = invoke i32 @_ZNK12QPaintDevice11logicalDpiYEv( %struct.QPaintDevice* %tmp32 ) - to label %invcont40 unwind label %cleanup329 ; <i32> [#uses=1] -invcont40: ; preds = %invcont37 - %tmp41.upgrd.10 = sitofp i32 %tmp41 to double ; <double> [#uses=1] - br label %cond_next42 -cond_next42: ; preds = %invcont40, %invcont31 - %sourceDpiY.2 = phi double [ %tmp41.upgrd.10, %invcont40 ], [ %tmp26, %invcont31 ] ; <double> [#uses=1] - %sourceDpiX.2 = phi double [ %tmp38.upgrd.9, %invcont40 ], [ %tmp26, %invcont31 ] ; <double> [#uses=1] - %tmp44 = getelementptr %struct.QPrinter* %printer, i32 0, i32 0 ; <%struct.QPaintDevice*> [#uses=1] - %tmp46 = invoke i32 @_ZNK12QPaintDevice11logicalDpiXEv( %struct.QPaintDevice* %tmp44 ) - to label %invcont45 unwind label %cleanup329 ; <i32> [#uses=1] -invcont45: ; preds = %cond_next42 - %tmp46.upgrd.11 = sitofp i32 %tmp46 to double ; <double> [#uses=1] - %tmp48 = fdiv double %tmp46.upgrd.11, %sourceDpiX.2 ; <double> [#uses=2] - %tmp50 = getelementptr %struct.QPrinter* %printer, i32 0, i32 0 ; <%struct.QPaintDevice*> [#uses=1] - %tmp52 = invoke i32 @_ZNK12QPaintDevice11logicalDpiYEv( %struct.QPaintDevice* %tmp50 ) - to label %invcont51 unwind label %cleanup329 ; <i32> [#uses=1] -invcont51: ; preds = %invcont45 - %tmp52.upgrd.12 = sitofp i32 %tmp52 to double ; <double> [#uses=1] - %tmp54 = fdiv double %tmp52.upgrd.12, %sourceDpiY.2 ; <double> [#uses=2] - invoke void @_ZN8QPainter5scaleEdd( %struct.QPainter* %p, double %tmp48, double %tmp54 ) - to label %invcont57 unwind label %cleanup329 -invcont57: ; preds = %invcont51 - %tmp.upgrd.13 = getelementptr %struct.QPointF* %scaledPageSize, i32 0, i32 0 ; <double*> [#uses=1] - %tmp60 = getelementptr %struct.QTextDocumentPrivate* %tmp.upgrd.4, i32 0, i32 26, i32 0 ; <double*> [#uses=1] - %tmp61 = load double* %tmp60 ; <double> [#uses=1] - store double %tmp61, double* %tmp.upgrd.13 - %tmp62 = getelementptr %struct.QPointF* %scaledPageSize, i32 0, i32 1 ; <double*> [#uses=1] - %tmp63 = getelementptr %struct.QTextDocumentPrivate* %tmp.upgrd.4, i32 0, i32 26, i32 1 ; <double*> [#uses=1] - %tmp64 = load double* %tmp63 ; <double> [#uses=1] - store double %tmp64, double* %tmp62 - %tmp65 = call double* @_ZN6QSizeF6rwidthEv( %struct.QPointF* %scaledPageSize ) ; <double*> [#uses=2] - %tmp67 = load double* %tmp65 ; <double> [#uses=1] - %tmp69 = fmul double %tmp67, %tmp48 ; <double> [#uses=1] - store double %tmp69, double* %tmp65 - %tmp71 = call double* @_ZN6QSizeF7rheightEv( %struct.QPointF* %scaledPageSize ) ; <double*> [#uses=2] - %tmp73 = load double* %tmp71 ; <double> [#uses=1] - %tmp75 = fmul double %tmp73, %tmp54 ; <double> [#uses=1] - store double %tmp75, double* %tmp71 - %tmp78 = getelementptr %struct.QPrinter* %printer, i32 0, i32 0 ; <%struct.QPaintDevice*> [#uses=1] - %tmp80 = invoke i32 @_ZNK12QPaintDevice6heightEv( %struct.QPaintDevice* %tmp78 ) - to label %invcont79 unwind label %cleanup329 ; <i32> [#uses=1] -invcont79: ; preds = %invcont57 - %tmp82 = getelementptr %struct.QPrinter* %printer, i32 0, i32 0 ; <%struct.QPaintDevice*> [#uses=1] - %tmp84 = invoke i32 @_ZNK12QPaintDevice5widthEv( %struct.QPaintDevice* %tmp82 ) - to label %invcont83 unwind label %cleanup329 ; <i32> [#uses=1] -invcont83: ; preds = %invcont79 - %tmp80.upgrd.14 = sitofp i32 %tmp80 to double ; <double> [#uses=1] - %tmp84.upgrd.15 = sitofp i32 %tmp84 to double ; <double> [#uses=1] - call void @_ZN6QSizeFC1Edd( %struct.QPointF* %printerPageSize, double %tmp84.upgrd.15, double %tmp80.upgrd.14 ) - %tmp85 = call double @_ZNK6QSizeF6heightEv( %struct.QPointF* %printerPageSize ) ; <double> [#uses=1] - %tmp86 = call double @_ZNK6QSizeF6heightEv( %struct.QPointF* %scaledPageSize ) ; <double> [#uses=1] - %tmp87 = fdiv double %tmp85, %tmp86 ; <double> [#uses=1] - %tmp88 = call double @_ZNK6QSizeF5widthEv( %struct.QPointF* %printerPageSize ) ; <double> [#uses=1] - %tmp89 = call double @_ZNK6QSizeF5widthEv( %struct.QPointF* %scaledPageSize ) ; <double> [#uses=1] - %tmp90 = fdiv double %tmp88, %tmp89 ; <double> [#uses=1] - invoke void @_ZN8QPainter5scaleEdd( %struct.QPainter* %p, double %tmp90, double %tmp87 ) - to label %cond_next194 unwind label %cleanup329 -cond_false: ; preds = %bb21 - %tmp.upgrd.16 = getelementptr %struct.QAbstractTextDocumentLayout* %this, i32 0, i32 0 ; <%struct.QObject*> [#uses=1] - %tmp95 = invoke %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument5cloneEP7QObject( %struct.QAbstractTextDocumentLayout* %this, %struct.QObject* %tmp.upgrd.16 ) - to label %invcont94 unwind label %cleanup329 ; <%struct.QAbstractTextDocumentLayout*> [#uses=9] -invcont94: ; preds = %cond_false - %tmp99 = invoke %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument14documentLayoutEv( %struct.QAbstractTextDocumentLayout* %tmp95 ) - to label %invcont98 unwind label %cleanup329 ; <%struct.QAbstractTextDocumentLayout*> [#uses=1] -invcont98: ; preds = %invcont94 - %tmp101 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p ) - to label %invcont100 unwind label %cleanup329 ; <%struct.QPaintDevice*> [#uses=1] -invcont100: ; preds = %invcont98 - invoke void @_ZN27QAbstractTextDocumentLayout14setPaintDeviceEP12QPaintDevice( %struct.QAbstractTextDocumentLayout* %tmp99, %struct.QPaintDevice* %tmp101 ) - to label %invcont103 unwind label %cleanup329 -invcont103: ; preds = %invcont100 - %tmp105 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p ) - to label %invcont104 unwind label %cleanup329 ; <%struct.QPaintDevice*> [#uses=1] -invcont104: ; preds = %invcont103 - %tmp107 = invoke i32 @_ZNK12QPaintDevice11logicalDpiYEv( %struct.QPaintDevice* %tmp105 ) - to label %invcont106 unwind label %cleanup329 ; <i32> [#uses=1] -invcont106: ; preds = %invcont104 - %tmp108 = sitofp i32 %tmp107 to double ; <double> [#uses=1] - %tmp109 = fmul double %tmp108, 0x3FE93264C993264C ; <double> [#uses=1] - %tmp109.upgrd.17 = fptosi double %tmp109 to i32 ; <i32> [#uses=3] - %tmp.upgrd.18 = call %struct.QTextBlockGroup* @_ZNK13QTextDocument9rootFrameEv( %struct.QAbstractTextDocumentLayout* %tmp95 ) ; <%struct.QTextBlockGroup*> [#uses=1] - invoke void @_ZNK10QTextFrame11frameFormatEv( %struct.QTextBlockFormat* sret %fmt, %struct.QTextBlockGroup* %tmp.upgrd.18 ) - to label %invcont111 unwind label %cleanup329 -invcont111: ; preds = %invcont106 - %tmp112 = sitofp i32 %tmp109.upgrd.17 to double ; <double> [#uses=1] - invoke void @_ZN16QTextFrameFormat9setMarginEd( %struct.QTextBlockFormat* %fmt, double %tmp112 ) - to label %invcont114 unwind label %cleanup192 -invcont114: ; preds = %invcont111 - %tmp116 = call %struct.QTextBlockGroup* @_ZNK13QTextDocument9rootFrameEv( %struct.QAbstractTextDocumentLayout* %tmp95 ) ; <%struct.QTextBlockGroup*> [#uses=1] - invoke void @_ZN10QTextFrame14setFrameFormatERK16QTextFrameFormat( %struct.QTextBlockGroup* %tmp116, %struct.QTextBlockFormat* %fmt ) - to label %invcont117 unwind label %cleanup192 -invcont117: ; preds = %invcont114 - %tmp119 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p ) - to label %invcont118 unwind label %cleanup192 ; <%struct.QPaintDevice*> [#uses=1] -invcont118: ; preds = %invcont117 - %tmp121 = invoke i32 @_ZNK12QPaintDevice6heightEv( %struct.QPaintDevice* %tmp119 ) - to label %invcont120 unwind label %cleanup192 ; <i32> [#uses=1] -invcont120: ; preds = %invcont118 - %tmp121.upgrd.19 = sitofp i32 %tmp121 to double ; <double> [#uses=1] - %tmp123 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p ) - to label %invcont122 unwind label %cleanup192 ; <%struct.QPaintDevice*> [#uses=1] -invcont122: ; preds = %invcont120 - %tmp125 = invoke i32 @_ZNK12QPaintDevice5widthEv( %struct.QPaintDevice* %tmp123 ) - to label %invcont124 unwind label %cleanup192 ; <i32> [#uses=1] -invcont124: ; preds = %invcont122 - %tmp125.upgrd.20 = sitofp i32 %tmp125 to double ; <double> [#uses=1] - call void @_ZN6QRectFC1Edddd( %struct.QRectF* %tmp.upgrd.1, double 0.000000e+00, double 0.000000e+00, double %tmp125.upgrd.20, double %tmp121.upgrd.19 ) - %tmp126 = getelementptr %struct.QRectF* %body, i32 0, i32 0 ; <double*> [#uses=1] - %tmp127 = getelementptr %struct.QRectF* %tmp.upgrd.1, i32 0, i32 0 ; <double*> [#uses=1] - %tmp128 = load double* %tmp127 ; <double> [#uses=1] - store double %tmp128, double* %tmp126 - %tmp129 = getelementptr %struct.QRectF* %body, i32 0, i32 1 ; <double*> [#uses=1] - %tmp130 = getelementptr %struct.QRectF* %tmp.upgrd.1, i32 0, i32 1 ; <double*> [#uses=1] - %tmp131 = load double* %tmp130 ; <double> [#uses=1] - store double %tmp131, double* %tmp129 - %tmp132 = getelementptr %struct.QRectF* %body, i32 0, i32 2 ; <double*> [#uses=1] - %tmp133 = getelementptr %struct.QRectF* %tmp.upgrd.1, i32 0, i32 2 ; <double*> [#uses=1] - %tmp134 = load double* %tmp133 ; <double> [#uses=1] - store double %tmp134, double* %tmp132 - %tmp135 = getelementptr %struct.QRectF* %body, i32 0, i32 3 ; <double*> [#uses=1] - %tmp136 = getelementptr %struct.QRectF* %tmp.upgrd.1, i32 0, i32 3 ; <double*> [#uses=1] - %tmp137 = load double* %tmp136 ; <double> [#uses=1] - store double %tmp137, double* %tmp135 - %tmp138 = call double @_ZNK6QRectF6heightEv( %struct.QRectF* %body ) ; <double> [#uses=1] - %tmp139 = sitofp i32 %tmp109.upgrd.17 to double ; <double> [#uses=1] - %tmp140 = fsub double %tmp138, %tmp139 ; <double> [#uses=1] - %tmp142 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p ) - to label %invcont141 unwind label %cleanup192 ; <%struct.QPaintDevice*> [#uses=1] -invcont141: ; preds = %invcont124 - invoke void @_ZNK13QTextDocument11defaultFontEv( %struct.QFont* sret %tmp.upgrd.3, %struct.QAbstractTextDocumentLayout* %tmp95 ) - to label %invcont144 unwind label %cleanup192 -invcont144: ; preds = %invcont141 - invoke void @_ZN12QFontMetricsC1ERK5QFontP12QPaintDevice( %struct.QFontMetrics* %tmp.upgrd.2, %struct.QFont* %tmp.upgrd.3, %struct.QPaintDevice* %tmp142 ) - to label %invcont146 unwind label %cleanup173 -invcont146: ; preds = %invcont144 - %tmp149 = invoke i32 @_ZNK12QFontMetrics6ascentEv( %struct.QFontMetrics* %tmp.upgrd.2 ) - to label %invcont148 unwind label %cleanup168 ; <i32> [#uses=1] -invcont148: ; preds = %invcont146 - %tmp149.upgrd.21 = sitofp i32 %tmp149 to double ; <double> [#uses=1] - %tmp150 = fadd double %tmp140, %tmp149.upgrd.21 ; <double> [#uses=1] - %tmp152 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p ) - to label %invcont151 unwind label %cleanup168 ; <%struct.QPaintDevice*> [#uses=1] -invcont151: ; preds = %invcont148 - %tmp154 = invoke i32 @_ZNK12QPaintDevice11logicalDpiYEv( %struct.QPaintDevice* %tmp152 ) - to label %invcont153 unwind label %cleanup168 ; <i32> [#uses=1] -invcont153: ; preds = %invcont151 - %tmp155 = mul i32 %tmp154, 5 ; <i32> [#uses=1] - %tmp156 = sdiv i32 %tmp155, 72 ; <i32> [#uses=1] - %tmp156.upgrd.22 = sitofp i32 %tmp156 to double ; <double> [#uses=1] - %tmp157 = fadd double %tmp150, %tmp156.upgrd.22 ; <double> [#uses=1] - %tmp158 = call double @_ZNK6QRectF5widthEv( %struct.QRectF* %body ) ; <double> [#uses=1] - %tmp159 = sitofp i32 %tmp109.upgrd.17 to double ; <double> [#uses=1] - %tmp160 = fsub double %tmp158, %tmp159 ; <double> [#uses=1] - call void @_ZN7QPointFC1Edd( %struct.QPointF* %tmp2, double %tmp160, double %tmp157 ) - %tmp161 = getelementptr %struct.QPointF* %pageNumberPos, i32 0, i32 0 ; <double*> [#uses=1] - %tmp162 = getelementptr %struct.QPointF* %tmp2, i32 0, i32 0 ; <double*> [#uses=1] - %tmp163 = load double* %tmp162 ; <double> [#uses=1] - store double %tmp163, double* %tmp161 - %tmp164 = getelementptr %struct.QPointF* %pageNumberPos, i32 0, i32 1 ; <double*> [#uses=1] - %tmp165 = getelementptr %struct.QPointF* %tmp2, i32 0, i32 1 ; <double*> [#uses=1] - %tmp166 = load double* %tmp165 ; <double> [#uses=1] - store double %tmp166, double* %tmp164 - invoke void @_ZN12QFontMetricsD1Ev( %struct.QFontMetrics* %tmp.upgrd.2 ) - to label %cleanup171 unwind label %cleanup173 -cleanup168: ; preds = %invcont151, %invcont148, %invcont146 - %val168 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) - cleanup - invoke void @_ZN12QFontMetricsD1Ev( %struct.QFontMetrics* %tmp.upgrd.2 ) - to label %cleanup173 unwind label %cleanup173 -cleanup171: ; preds = %invcont153 - invoke void @_ZN5QFontD1Ev( %struct.QFont* %tmp.upgrd.3 ) - to label %finally170 unwind label %cleanup192 -cleanup173: ; preds = %cleanup168, %cleanup168, %invcont153, %invcont144 - %val173 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) - cleanup - invoke void @_ZN5QFontD1Ev( %struct.QFont* %tmp.upgrd.3 ) - to label %cleanup192 unwind label %cleanup192 -finally170: ; preds = %cleanup171 - invoke void @_ZNK13QTextDocument11defaultFontEv( %struct.QFont* sret %font, %struct.QAbstractTextDocumentLayout* %tmp95 ) - to label %invcont177 unwind label %cleanup192 -invcont177: ; preds = %finally170 - invoke void @_ZN5QFont12setPointSizeEi( %struct.QFont* %font, i32 10 ) - to label %invcont179 unwind label %cleanup187 -invcont179: ; preds = %invcont177 - invoke void @_ZN13QTextDocument14setDefaultFontERK5QFont( %struct.QAbstractTextDocumentLayout* %tmp95, %struct.QFont* %font ) - to label %invcont181 unwind label %cleanup187 -invcont181: ; preds = %invcont179 - call void @_ZNK6QRectF4sizeEv( %struct.QPointF* sret %tmp3, %struct.QRectF* %body ) - invoke void @_ZN13QTextDocument11setPageSizeERK6QSizeF( %struct.QAbstractTextDocumentLayout* %tmp95, %struct.QPointF* %tmp3 ) - to label %cleanup185 unwind label %cleanup187 -cleanup185: ; preds = %invcont181 - invoke void @_ZN5QFontD1Ev( %struct.QFont* %font ) - to label %cleanup190 unwind label %cleanup192 -cleanup187: ; preds = %invcont181, %invcont179, %invcont177 - %val187 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) - cleanup - invoke void @_ZN5QFontD1Ev( %struct.QFont* %font ) - to label %cleanup192 unwind label %cleanup192 -cleanup190: ; preds = %cleanup185 - invoke void @_ZN16QTextFrameFormatD1Ev( %struct.QTextBlockFormat* %fmt ) - to label %cond_next194 unwind label %cleanup329 -cleanup192: ; preds = %cleanup187, %cleanup187, %cleanup185, %finally170, %cleanup173, %cleanup173, %cleanup171, %invcont141, %invcont124, %invcont122, %invcont120, %invcont118, %invcont117, %invcont114, %invcont111 - %val192 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) - cleanup - invoke void @_ZN16QTextFrameFormatD1Ev( %struct.QTextBlockFormat* %fmt ) - to label %cleanup329 unwind label %cleanup329 -cond_next194: ; preds = %cleanup190, %invcont83 - %clonedDoc.1 = phi %struct.QAbstractTextDocumentLayout* [ null, %invcont83 ], [ %tmp95, %cleanup190 ] ; <%struct.QAbstractTextDocumentLayout*> [#uses=3] - %doc.1 = phi %struct.QAbstractTextDocumentLayout* [ %this, %invcont83 ], [ %tmp95, %cleanup190 ] ; <%struct.QAbstractTextDocumentLayout*> [#uses=2] - %tmp197 = invoke i1 @_ZNK8QPrinter13collateCopiesEv( %struct.QPrinter* %printer ) - to label %invcont196 unwind label %cleanup329 ; <i1> [#uses=1] -invcont196: ; preds = %cond_next194 - br i1 %tmp197, label %cond_true200, label %cond_false204 -cond_true200: ; preds = %invcont196 - %tmp203 = invoke i32 @_ZNK8QPrinter9numCopiesEv( %struct.QPrinter* %printer ) - to label %invcont202 unwind label %cleanup329 ; <i32> [#uses=1] -invcont202: ; preds = %cond_true200 - br label %cond_next208 -cond_false204: ; preds = %invcont196 - %tmp207 = invoke i32 @_ZNK8QPrinter9numCopiesEv( %struct.QPrinter* %printer ) - to label %invcont206 unwind label %cleanup329 ; <i32> [#uses=1] -invcont206: ; preds = %cond_false204 - br label %cond_next208 -cond_next208: ; preds = %invcont206, %invcont202 - %pageCopies.0 = phi i32 [ %tmp203, %invcont202 ], [ 1, %invcont206 ] ; <i32> [#uses=2] - %docCopies.0 = phi i32 [ 1, %invcont202 ], [ %tmp207, %invcont206 ] ; <i32> [#uses=2] - %tmp211 = invoke i32 @_ZNK8QPrinter8fromPageEv( %struct.QPrinter* %printer ) - to label %invcont210 unwind label %cleanup329 ; <i32> [#uses=3] -invcont210: ; preds = %cond_next208 - %tmp214 = invoke i32 @_ZNK8QPrinter6toPageEv( %struct.QPrinter* %printer ) - to label %invcont213 unwind label %cleanup329 ; <i32> [#uses=3] -invcont213: ; preds = %invcont210 - %tmp216 = icmp eq i32 %tmp211, 0 ; <i1> [#uses=1] - br i1 %tmp216, label %cond_true217, label %cond_next225 -cond_true217: ; preds = %invcont213 - %tmp219 = icmp eq i32 %tmp214, 0 ; <i1> [#uses=1] - br i1 %tmp219, label %cond_true220, label %cond_next225 -cond_true220: ; preds = %cond_true217 - %tmp223 = invoke i32 @_ZNK13QTextDocument9pageCountEv( %struct.QAbstractTextDocumentLayout* %doc.1 ) - to label %invcont222 unwind label %cleanup329 ; <i32> [#uses=1] -invcont222: ; preds = %cond_true220 - br label %cond_next225 -cond_next225: ; preds = %invcont222, %cond_true217, %invcont213 - %toPage.1 = phi i32 [ %tmp223, %invcont222 ], [ %tmp214, %cond_true217 ], [ %tmp214, %invcont213 ] ; <i32> [#uses=2] - %fromPage.1 = phi i32 [ 1, %invcont222 ], [ %tmp211, %cond_true217 ], [ %tmp211, %invcont213 ] ; <i32> [#uses=2] - %tmp.page = invoke i32 @_ZNK8QPrinter9pageOrderEv( %struct.QPrinter* %printer ) - to label %invcont227 unwind label %cleanup329 ; <i32> [#uses=1] -invcont227: ; preds = %cond_next225 - %tmp228 = icmp eq i32 %tmp.page, 1 ; <i1> [#uses=1] - br i1 %tmp228, label %cond_true230, label %cond_next234 -cond_true230: ; preds = %invcont227 - br label %cond_next234 -cond_next234: ; preds = %cond_true230, %invcont227 - %ascending.1 = phi i1 [ false, %cond_true230 ], [ true, %invcont227 ] ; <i1> [#uses=1] - %toPage.2 = phi i32 [ %fromPage.1, %cond_true230 ], [ %toPage.1, %invcont227 ] ; <i32> [#uses=1] - %fromPage.2 = phi i32 [ %toPage.1, %cond_true230 ], [ %fromPage.1, %invcont227 ] ; <i32> [#uses=1] - br label %bb309 -bb237: ; preds = %cond_true313, %cond_next293 - %iftmp.410.4 = phi i1 [ %iftmp.410.5, %cond_true313 ], [ %iftmp.410.1, %cond_next293 ] ; <i1> [#uses=1] - %page.4 = phi i32 [ %fromPage.2, %cond_true313 ], [ %page.3, %cond_next293 ] ; <i32> [#uses=4] - br label %bb273 -invcont240: ; preds = %cond_true277 - %tmp242 = icmp eq i32 %tmp241, 2 ; <i1> [#uses=1] - br i1 %tmp242, label %bb252, label %cond_next244 -cond_next244: ; preds = %invcont240 - %tmp247 = invoke i32 @_ZNK8QPrinter12printerStateEv( %struct.QPrinter* %printer ) - to label %invcont246 unwind label %cleanup329 ; <i32> [#uses=1] -invcont246: ; preds = %cond_next244 - %tmp248 = icmp eq i32 %tmp247, 3 ; <i1> [#uses=1] - br i1 %tmp248, label %bb252, label %bb253 -bb252: ; preds = %invcont246, %invcont240 - br label %bb254 -bb253: ; preds = %invcont246 - br label %bb254 -bb254: ; preds = %bb253, %bb252 - %iftmp.410.0 = phi i1 [ true, %bb252 ], [ false, %bb253 ] ; <i1> [#uses=2] - br i1 %iftmp.410.0, label %UserCanceled, label %cond_next258 -cond_next258: ; preds = %bb254 - invoke fastcc void @_Z9printPageiP8QPainterPK13QTextDocumentRK6QRectFRK7QPointF( i32 %page.4, %struct.QPainter* %p, %struct.QAbstractTextDocumentLayout* %doc.1, %struct.QRectF* %body, %struct.QPointF* %pageNumberPos ) - to label %invcont261 unwind label %cleanup329 -invcont261: ; preds = %cond_next258 - %tmp263 = add i32 %pageCopies.0, -1 ; <i32> [#uses=1] - %tmp265 = icmp sgt i32 %tmp263, %j.4 ; <i1> [#uses=1] - br i1 %tmp265, label %cond_true266, label %cond_next270 -cond_true266: ; preds = %invcont261 - %tmp269 = invoke i1 @_ZN8QPrinter7newPageEv( %struct.QPrinter* %printer ) - to label %cond_next270 unwind label %cleanup329 ; <i1> [#uses=0] -cond_next270: ; preds = %cond_true266, %invcont261 - %tmp272 = add i32 %j.4, 1 ; <i32> [#uses=1] - br label %bb273 -bb273: ; preds = %cond_next270, %bb237 - %iftmp.410.1 = phi i1 [ %iftmp.410.4, %bb237 ], [ %iftmp.410.0, %cond_next270 ] ; <i1> [#uses=2] - %j.4 = phi i32 [ 0, %bb237 ], [ %tmp272, %cond_next270 ] ; <i32> [#uses=3] - %tmp276 = icmp slt i32 %j.4, %pageCopies.0 ; <i1> [#uses=1] - br i1 %tmp276, label %cond_true277, label %bb280 -cond_true277: ; preds = %bb273 - %tmp241 = invoke i32 @_ZNK8QPrinter12printerStateEv( %struct.QPrinter* %printer ) - to label %invcont240 unwind label %cleanup329 ; <i32> [#uses=1] -bb280: ; preds = %bb273 - %tmp283 = icmp eq i32 %page.4, %toPage.2 ; <i1> [#uses=1] - br i1 %tmp283, label %bb297, label %cond_next285 -cond_next285: ; preds = %bb280 - br i1 %ascending.1, label %cond_true287, label %cond_false290 -cond_true287: ; preds = %cond_next285 - %tmp289 = add i32 %page.4, 1 ; <i32> [#uses=1] - br label %cond_next293 -cond_false290: ; preds = %cond_next285 - %tmp292 = add i32 %page.4, -1 ; <i32> [#uses=1] - br label %cond_next293 -cond_next293: ; preds = %cond_false290, %cond_true287 - %page.3 = phi i32 [ %tmp289, %cond_true287 ], [ %tmp292, %cond_false290 ] ; <i32> [#uses=1] - %tmp296 = invoke i1 @_ZN8QPrinter7newPageEv( %struct.QPrinter* %printer ) - to label %bb237 unwind label %cleanup329 ; <i1> [#uses=0] -bb297: ; preds = %bb280 - %tmp299 = add i32 %docCopies.0, -1 ; <i32> [#uses=1] - %tmp301 = icmp sgt i32 %tmp299, %i.1 ; <i1> [#uses=1] - br i1 %tmp301, label %cond_true302, label %cond_next306 -cond_true302: ; preds = %bb297 - %tmp305 = invoke i1 @_ZN8QPrinter7newPageEv( %struct.QPrinter* %printer ) - to label %cond_next306 unwind label %cleanup329 ; <i1> [#uses=0] -cond_next306: ; preds = %cond_true302, %bb297 - %tmp308 = add i32 %i.1, 1 ; <i32> [#uses=1] - br label %bb309 -bb309: ; preds = %cond_next306, %cond_next234 - %iftmp.410.5 = phi i1 [ undef, %cond_next234 ], [ %iftmp.410.1, %cond_next306 ] ; <i1> [#uses=1] - %i.1 = phi i32 [ 0, %cond_next234 ], [ %tmp308, %cond_next306 ] ; <i32> [#uses=3] - %tmp312 = icmp slt i32 %i.1, %docCopies.0 ; <i1> [#uses=1] - br i1 %tmp312, label %cond_true313, label %UserCanceled -cond_true313: ; preds = %bb309 - br label %bb237 -UserCanceled: ; preds = %bb309, %bb254 - %tmp318 = icmp eq %struct.QAbstractTextDocumentLayout* %clonedDoc.1, null ; <i1> [#uses=1] - br i1 %tmp318, label %cleanup327, label %cond_true319 -cond_true319: ; preds = %UserCanceled - %tmp.upgrd.23 = getelementptr %struct.QAbstractTextDocumentLayout* %clonedDoc.1, i32 0, i32 0, i32 0 ; <i32 (...)***> [#uses=1] - %tmp.upgrd.24 = load i32 (...)*** %tmp.upgrd.23 ; <i32 (...)**> [#uses=1] - %tmp322 = getelementptr i32 (...)** %tmp.upgrd.24, i32 4 ; <i32 (...)**> [#uses=1] - %tmp.upgrd.25 = load i32 (...)** %tmp322 ; <i32 (...)*> [#uses=1] - %tmp.upgrd.26 = bitcast i32 (...)* %tmp.upgrd.25 to void (%struct.QAbstractTextDocumentLayout*)* ; <void (%struct.QAbstractTextDocumentLayout*)*> [#uses=1] - invoke void %tmp.upgrd.26( %struct.QAbstractTextDocumentLayout* %clonedDoc.1 ) - to label %cleanup327 unwind label %cleanup329 -cleanup327: ; preds = %cond_true319, %UserCanceled - call void @_ZN8QPainterD1Ev( %struct.QPainter* %p ) - ret void -cleanup328: ; preds = %invcont - call void @_ZN8QPainterD1Ev( %struct.QPainter* %p ) - ret void -cleanup329: ; preds = %cond_true319, %cond_true302, %cond_next293, %cond_true277, %cond_true266, %cond_next258, %cond_next244, %cond_next225, %cond_true220, %invcont210, %cond_next208, %cond_false204, %cond_true200, %cond_next194, %cleanup192, %cleanup192, %cleanup190, %invcont106, %invcont104, %invcont103, %invcont100, %invcont98, %invcont94, %cond_false, %invcont83, %invcont79, %invcont57, %invcont51, %invcont45, %cond_next42, %invcont37, %cond_true35, %invcont29, %invcont25, %cond_true24, %cond_next, %entry - %val = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) - cleanup - call void @_ZN8QPainterD1Ev( %struct.QPainter* %p ) - resume { i8*, i32 } %val -} - -declare void @_ZN6QSizeFC1Edd(%struct.QPointF*, double, double) - -declare i1 @_ZNK6QSizeF7isValidEv(%struct.QPointF*) - -declare double @_ZNK6QSizeF5widthEv(%struct.QPointF*) - -declare double @_ZNK6QSizeF6heightEv(%struct.QPointF*) - -declare double* @_ZN6QSizeF6rwidthEv(%struct.QPointF*) - -declare double* @_ZN6QSizeF7rheightEv(%struct.QPointF*) - -declare %struct.QTextDocumentPrivate* @_ZNK13QTextDocument6d_funcEv(%struct.QAbstractTextDocumentLayout*) - -declare void @_ZN7QPointFC1Ev(%struct.QPointF*) - -declare void @_ZN7QPointFC1Edd(%struct.QPointF*, double, double) - -declare void @_ZN16QTextFrameFormat9setMarginEd(%struct.QTextBlockFormat*, double) - -declare void @_ZN6QRectFC1Edddd(%struct.QRectF*, double, double, double, double) - -declare void @_ZN6QRectFC1ERK7QPointFRK6QSizeF(%struct.QRectF*, %struct.QPointF*, %struct.QPointF*) - -declare double @_ZNK6QRectF5widthEv(%struct.QRectF*) - -declare double @_ZNK6QRectF6heightEv(%struct.QRectF*) - -declare void @_ZNK6QRectF4sizeEv(%struct.QPointF*, %struct.QRectF*) - -declare void @_ZN16QTextFrameFormatD1Ev(%struct.QTextBlockFormat*) - -declare void @_ZNK10QTextFrame11frameFormatEv(%struct.QTextBlockFormat*, %struct.QTextBlockGroup*) - -declare void @_ZN10QTextFrame14setFrameFormatERK16QTextFrameFormat(%struct.QTextBlockGroup*, %struct.QTextBlockFormat*) - -declare i32 @_ZNK12QPaintDevice5widthEv(%struct.QPaintDevice*) - -declare i32 @_ZNK12QPaintDevice6heightEv(%struct.QPaintDevice*) - -declare i32 @_ZNK12QPaintDevice11logicalDpiXEv(%struct.QPaintDevice*) - -declare i32 @_ZNK12QPaintDevice11logicalDpiYEv(%struct.QPaintDevice*) - -declare %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument5cloneEP7QObject(%struct.QAbstractTextDocumentLayout*, %struct.QObject*) - -declare void @_ZN5QFontD1Ev(%struct.QFont*) - -declare %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument14documentLayoutEv(%struct.QAbstractTextDocumentLayout*) - -declare %struct.QTextBlockGroup* @_ZNK13QTextDocument9rootFrameEv(%struct.QAbstractTextDocumentLayout*) - -declare i32 @_ZNK13QTextDocument9pageCountEv(%struct.QAbstractTextDocumentLayout*) - -declare void @_ZNK13QTextDocument11defaultFontEv(%struct.QFont*, %struct.QAbstractTextDocumentLayout*) - -declare void @_ZN13QTextDocument14setDefaultFontERK5QFont(%struct.QAbstractTextDocumentLayout*, %struct.QFont*) - -declare void @_ZN13QTextDocument11setPageSizeERK6QSizeF(%struct.QAbstractTextDocumentLayout*, %struct.QPointF*) - -declare void @_Z9printPageiP8QPainterPK13QTextDocumentRK6QRectFRK7QPointF(i32, %struct.QPainter*, %struct.QAbstractTextDocumentLayout*, %struct.QRectF*, %struct.QPointF*) - -declare void @_ZN12QFontMetricsD1Ev(%struct.QFontMetrics*) - -declare void @_ZN8QPainterC1EP12QPaintDevice(%struct.QPainter*, %struct.QPaintDevice*) - -declare i1 @_ZNK8QPainter8isActiveEv(%struct.QPainter*) - -declare i32 @_Z13qt_defaultDpiv() - -declare %struct.QPaintDevice* @_ZNK27QAbstractTextDocumentLayout11paintDeviceEv(%struct.QAbstractTextDocumentLayout*) - -declare void @_ZN8QPainter5scaleEdd(%struct.QPainter*, double, double) - -declare %struct.QPaintDevice* @_ZNK8QPainter6deviceEv(%struct.QPainter*) - -declare void @_ZN27QAbstractTextDocumentLayout14setPaintDeviceEP12QPaintDevice(%struct.QAbstractTextDocumentLayout*, %struct.QPaintDevice*) - -declare void @_ZN12QFontMetricsC1ERK5QFontP12QPaintDevice(%struct.QFontMetrics*, %struct.QFont*, %struct.QPaintDevice*) - -declare i32 @_ZNK12QFontMetrics6ascentEv(%struct.QFontMetrics*) - -declare void @_ZN5QFont12setPointSizeEi(%struct.QFont*, i32) - -declare i1 @_ZNK8QPrinter13collateCopiesEv(%struct.QPrinter*) - -declare i32 @_ZNK8QPrinter9numCopiesEv(%struct.QPrinter*) - -declare i32 @_ZNK8QPrinter8fromPageEv(%struct.QPrinter*) - -declare i32 @_ZNK8QPrinter6toPageEv(%struct.QPrinter*) - -declare i32 @_ZNK8QPrinter9pageOrderEv(%struct.QPrinter*) - -declare i32 @_ZNK8QPrinter12printerStateEv(%struct.QPrinter*) - -declare i1 @_ZN8QPrinter7newPageEv(%struct.QPrinter*) - -declare void @_ZN8QPainterD1Ev(%struct.QPainter*) - -declare i32 @__gxx_personality_v0(...) diff --git a/test/Transforms/SimplifyCFG/2009-06-15-InvokeCrash.ll b/test/Transforms/SimplifyCFG/2009-06-15-InvokeCrash.ll deleted file mode 100644 index abf4455..0000000 --- a/test/Transforms/SimplifyCFG/2009-06-15-InvokeCrash.ll +++ /dev/null @@ -1,569 +0,0 @@ -; RUN: opt < %s -simplifycfg -disable-output -; END. - %struct..4._102 = type { %struct.QVectorData* } - %struct..5._125 = type { %struct.QMapData* } - %struct.QAbstractTextDocumentLayout = type { %struct.QObject } - %struct.QBasicAtomic = type { i32 } - %struct.QFont = type { %struct.QFontPrivate*, i32 } - %struct.QFontMetrics = type { %struct.QFontPrivate* } - %struct.QFontPrivate = type opaque - %"struct.QFragmentMap<QTextBlockData>" = type { %struct.QFragmentMapData } - %struct.QFragmentMapData = type { %"struct.QFragmentMapData::._154", i32 } - %"struct.QFragmentMapData::._154" = type { %"struct.QFragmentMapData::Header"* } - %"struct.QFragmentMapData::Header" = type { i32, i32, i32, i32, i32, i32, i32, i32 } - %"struct.QHash<uint,QHashDummyValue>" = type { %"struct.QHash<uint,QHashDummyValue>::._152" } - %"struct.QHash<uint,QHashDummyValue>::._152" = type { %struct.QHashData* } - %struct.QHashData = type { %"struct.QHashData::Node"*, %"struct.QHashData::Node"**, %struct.QBasicAtomic, i32, i32, i16, i16, i32, i8 } - %"struct.QHashData::Node" = type { %"struct.QHashData::Node"*, i32 } - %"struct.QList<QObject*>::._92" = type { %struct.QListData } - %"struct.QList<QPointer<QObject> >" = type { %"struct.QList<QObject*>::._92" } - %struct.QListData = type { %"struct.QListData::Data"* } - %"struct.QListData::Data" = type { %struct.QBasicAtomic, i32, i32, i32, i8, [1 x i8*] } - %"struct.QMap<QUrl,QVariant>" = type { %struct..5._125 } - %struct.QMapData = type { %"struct.QMapData::Node"*, [12 x %"struct.QMapData::Node"*], %struct.QBasicAtomic, i32, i32, i32, i8 } - %"struct.QMapData::Node" = type { %"struct.QMapData::Node"*, [1 x %"struct.QMapData::Node"*] } - %struct.QObject = type { i32 (...)**, %struct.QObjectData* } - %struct.QObjectData = type { i32 (...)**, %struct.QObject*, %struct.QObject*, %"struct.QList<QPointer<QObject> >", i8, [3 x i8], i32, i32 } - %struct.QObjectPrivate = type { %struct.QObjectData, i32, %struct.QObject*, %"struct.QList<QPointer<QObject> >", %"struct.QVector<QAbstractTextDocumentLayout::Selection>", %struct.QString } - %struct.QPaintDevice = type { i32 (...)**, i16 } - %struct.QPainter = type { %struct.QPainterPrivate* } - %struct.QPainterPrivate = type opaque - %struct.QPointF = type { double, double } - %struct.QPrinter = type { %struct.QPaintDevice, %struct.QPrinterPrivate* } - %struct.QPrinterPrivate = type opaque - %struct.QRectF = type { double, double, double, double } - %"struct.QSet<uint>" = type { %"struct.QHash<uint,QHashDummyValue>" } - %"struct.QSharedDataPointer<QTextFormatPrivate>" = type { %struct.QTextFormatPrivate* } - %struct.QString = type { %"struct.QString::Data"* } - %"struct.QString::Data" = type { %struct.QBasicAtomic, i32, i32, i16*, i8, i8, [1 x i16] } - %struct.QTextBlockFormat = type { %struct.QTextFormat } - %struct.QTextBlockGroup = type { %struct.QAbstractTextDocumentLayout } - %struct.QTextDocumentConfig = type { %struct.QString } - %struct.QTextDocumentPrivate = type { %struct.QObjectPrivate, %struct.QString, %"struct.QVector<QAbstractTextDocumentLayout::Selection>", i1, i32, i32, i1, i32, i32, i32, i32, i1, %struct.QTextFormatCollection, %struct.QTextBlockGroup*, %struct.QAbstractTextDocumentLayout*, %"struct.QFragmentMap<QTextBlockData>", %"struct.QFragmentMap<QTextBlockData>", i32, %"struct.QList<QPointer<QObject> >", %"struct.QList<QPointer<QObject> >", %"struct.QMap<QUrl,QVariant>", %"struct.QMap<QUrl,QVariant>", %"struct.QMap<QUrl,QVariant>", %struct.QTextDocumentConfig, i1, i1, %struct.QPointF } - %struct.QTextFormat = type { %"struct.QSharedDataPointer<QTextFormatPrivate>", i32 } - %struct.QTextFormatCollection = type { %"struct.QVector<QAbstractTextDocumentLayout::Selection>", %"struct.QVector<QAbstractTextDocumentLayout::Selection>", %"struct.QSet<uint>", %struct.QFont } - %struct.QTextFormatPrivate = type opaque - %"struct.QVector<QAbstractTextDocumentLayout::Selection>" = type { %struct..4._102 } - %struct.QVectorData = type { %struct.QBasicAtomic, i32, i32, i8 } - -define void @_ZNK13QTextDocument5printEP8QPrinter(%struct.QAbstractTextDocumentLayout* %this, %struct.QPrinter* %printer) { -entry: - %tmp = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=2] - %tmp.upgrd.1 = alloca %struct.QRectF, align 16 ; <%struct.QRectF*> [#uses=5] - %tmp2 = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=3] - %tmp.upgrd.2 = alloca %struct.QFontMetrics, align 16 ; <%struct.QFontMetrics*> [#uses=4] - %tmp.upgrd.3 = alloca %struct.QFont, align 16 ; <%struct.QFont*> [#uses=4] - %tmp3 = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=2] - %p = alloca %struct.QPainter, align 16 ; <%struct.QPainter*> [#uses=14] - %body = alloca %struct.QRectF, align 16 ; <%struct.QRectF*> [#uses=9] - %foo = alloca double, align 8 - %bar = alloca double, align 8 - %pageNumberPos = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=4] - %scaledPageSize = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=6] - %printerPageSize = alloca %struct.QPointF, align 16 ; <%struct.QPointF*> [#uses=3] - %fmt = alloca %struct.QTextBlockFormat, align 16 ; <%struct.QTextBlockFormat*> [#uses=5] - %font = alloca %struct.QFont, align 16 ; <%struct.QFont*> [#uses=5] - %tmp.upgrd.4 = call %struct.QTextDocumentPrivate* @_ZNK13QTextDocument6d_funcEv( %struct.QAbstractTextDocumentLayout* %this ) ; <%struct.QTextDocumentPrivate*> [#uses=5] - %tmp.upgrd.5 = getelementptr %struct.QPrinter* %printer, i32 0, i32 0 ; <%struct.QPaintDevice*> [#uses=1] - call void @_ZN8QPainterC1EP12QPaintDevice( %struct.QPainter* %p, %struct.QPaintDevice* %tmp.upgrd.5 ) - %tmp.upgrd.6 = invoke i1 @_ZNK8QPainter8isActiveEv( %struct.QPainter* %p ) - to label %invcont unwind label %cleanup329 ; <i1> [#uses=1] -invcont: ; preds = %entry - br i1 %tmp.upgrd.6, label %cond_next, label %cleanup328 -cond_next: ; preds = %invcont - %tmp8 = invoke %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument14documentLayoutEv( %struct.QAbstractTextDocumentLayout* %this ) - to label %invcont7 unwind label %cleanup329 ; <%struct.QAbstractTextDocumentLayout*> [#uses=0] -invcont7: ; preds = %cond_next - %tmp10 = getelementptr %struct.QTextDocumentPrivate* %tmp.upgrd.4, i32 0, i32 26 ; <%struct.QPointF*> [#uses=1] - call void @_ZN7QPointFC1Edd( %struct.QPointF* %tmp, double 0.000000e+00, double 0.000000e+00 ) - call void @_ZN6QRectFC1ERK7QPointFRK6QSizeF( %struct.QRectF* %body, %struct.QPointF* %tmp, %struct.QPointF* %tmp10 ) - call void @_ZN7QPointFC1Ev( %struct.QPointF* %pageNumberPos ) - %tmp12 = getelementptr %struct.QTextDocumentPrivate* %tmp.upgrd.4, i32 0, i32 26 ; <%struct.QPointF*> [#uses=1] - %tmp13 = call i1 @_ZNK6QSizeF7isValidEv( %struct.QPointF* %tmp12 ) ; <i1> [#uses=1] - br i1 %tmp13, label %cond_next15, label %bb -cond_next15: ; preds = %invcont7 - %tmp17 = getelementptr %struct.QTextDocumentPrivate* %tmp.upgrd.4, i32 0, i32 26 ; <%struct.QPointF*> [#uses=1] - %tmp.upgrd.7 = call double @_ZNK6QSizeF6heightEv( %struct.QPointF* %tmp17 ) ; <double> [#uses=1] - %tmp18 = fcmp oeq double %tmp.upgrd.7, 0x41DFFFFFFFC00000 ; <i1> [#uses=1] - br i1 %tmp18, label %bb, label %cond_next20 -cond_next20: ; preds = %cond_next15 - br label %bb21 -bb: ; preds = %cond_next15, %invcont7 - br label %bb21 -bb21: ; preds = %bb, %cond_next20 - %iftmp.406.0 = phi i1 [ false, %bb ], [ true, %cond_next20 ] ; <i1> [#uses=1] - br i1 %iftmp.406.0, label %cond_true24, label %cond_false -cond_true24: ; preds = %bb21 - %tmp.upgrd.8 = invoke i32 @_Z13qt_defaultDpiv( ) - to label %invcont25 unwind label %cleanup329 ; <i32> [#uses=1] -invcont25: ; preds = %cond_true24 - %tmp26 = sitofp i32 %tmp.upgrd.8 to double ; <double> [#uses=2] - %tmp30 = invoke %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument14documentLayoutEv( %struct.QAbstractTextDocumentLayout* %this ) - to label %invcont29 unwind label %cleanup329 ; <%struct.QAbstractTextDocumentLayout*> [#uses=1] -invcont29: ; preds = %invcont25 - %tmp32 = invoke %struct.QPaintDevice* @_ZNK27QAbstractTextDocumentLayout11paintDeviceEv( %struct.QAbstractTextDocumentLayout* %tmp30 ) - to label %invcont31 unwind label %cleanup329 ; <%struct.QPaintDevice*> [#uses=3] -invcont31: ; preds = %invcont29 - %tmp34 = icmp eq %struct.QPaintDevice* %tmp32, null ; <i1> [#uses=1] - br i1 %tmp34, label %cond_next42, label %cond_true35 -cond_true35: ; preds = %invcont31 - %tmp38 = invoke i32 @_ZNK12QPaintDevice11logicalDpiXEv( %struct.QPaintDevice* %tmp32 ) - to label %invcont37 unwind label %cleanup329 ; <i32> [#uses=1] -invcont37: ; preds = %cond_true35 - %tmp38.upgrd.9 = sitofp i32 %tmp38 to double ; <double> [#uses=1] - %tmp41 = invoke i32 @_ZNK12QPaintDevice11logicalDpiYEv( %struct.QPaintDevice* %tmp32 ) - to label %invcont40 unwind label %cleanup329 ; <i32> [#uses=1] -invcont40: ; preds = %invcont37 - %tmp41.upgrd.10 = sitofp i32 %tmp41 to double ; <double> [#uses=1] - br label %cond_next42 -cond_next42: ; preds = %invcont40, %invcont31 - %sourceDpiY.2 = phi double [ %tmp41.upgrd.10, %invcont40 ], [ %tmp26, %invcont31 ] ; <double> [#uses=1] - %sourceDpiX.2 = phi double [ %tmp38.upgrd.9, %invcont40 ], [ %tmp26, %invcont31 ] ; <double> [#uses=1] - %tmp44 = getelementptr %struct.QPrinter* %printer, i32 0, i32 0 ; <%struct.QPaintDevice*> [#uses=1] - %tmp46 = invoke i32 @_ZNK12QPaintDevice11logicalDpiXEv( %struct.QPaintDevice* %tmp44 ) - to label %invcont45 unwind label %cleanup329 ; <i32> [#uses=1] -invcont45: ; preds = %cond_next42 - %tmp46.upgrd.11 = sitofp i32 %tmp46 to double ; <double> [#uses=1] - %tmp48 = fdiv double %tmp46.upgrd.11, %sourceDpiX.2 ; <double> [#uses=2] - %tmp50 = getelementptr %struct.QPrinter* %printer, i32 0, i32 0 ; <%struct.QPaintDevice*> [#uses=1] - %tmp52 = invoke i32 @_ZNK12QPaintDevice11logicalDpiYEv( %struct.QPaintDevice* %tmp50 ) - to label %invcont51 unwind label %cleanup329 ; <i32> [#uses=1] -invcont51: ; preds = %invcont45 - %tmp52.upgrd.12 = sitofp i32 %tmp52 to double ; <double> [#uses=1] - %tmp54 = fdiv double %tmp52.upgrd.12, %sourceDpiY.2 ; <double> [#uses=2] - invoke void @_ZN8QPainter5scaleEdd( %struct.QPainter* %p, double %tmp48, double %tmp54 ) - to label %invcont57 unwind label %cleanup329 -invcont57: ; preds = %invcont51 - %tmp.upgrd.13 = getelementptr %struct.QPointF* %scaledPageSize, i32 0, i32 0 ; <double*> [#uses=1] - %tmp60 = getelementptr %struct.QTextDocumentPrivate* %tmp.upgrd.4, i32 0, i32 26, i32 0 ; <double*> [#uses=1] - %tmp61 = load double* %tmp60 ; <double> [#uses=1] - store double %tmp61, double* %tmp.upgrd.13 - %tmp62 = getelementptr %struct.QPointF* %scaledPageSize, i32 0, i32 1 ; <double*> [#uses=1] - %tmp63 = getelementptr %struct.QTextDocumentPrivate* %tmp.upgrd.4, i32 0, i32 26, i32 1 ; <double*> [#uses=1] - %tmp64 = load double* %tmp63 ; <double> [#uses=1] - store double %tmp64, double* %tmp62 - %tmp65 = call double* @_ZN6QSizeF6rwidthEv( %struct.QPointF* %scaledPageSize ) ; <double*> [#uses=2] - %tmp67 = load double* %tmp65 ; <double> [#uses=1] - %tmp69 = fmul double %tmp67, %tmp48 ; <double> [#uses=1] - store double %tmp69, double* %tmp65 - %tmp71 = call double* @_ZN6QSizeF7rheightEv( %struct.QPointF* %scaledPageSize ) ; <double*> [#uses=2] - %tmp73 = load double* %tmp71 ; <double> [#uses=1] - %tmp75 = fmul double %tmp73, %tmp54 ; <double> [#uses=1] - store double %tmp75, double* %tmp71 - %tmp78 = getelementptr %struct.QPrinter* %printer, i32 0, i32 0 ; <%struct.QPaintDevice*> [#uses=1] - %tmp80 = invoke i32 @_ZNK12QPaintDevice6heightEv( %struct.QPaintDevice* %tmp78 ) - to label %invcont79 unwind label %cleanup329 ; <i32> [#uses=1] -invcont79: ; preds = %invcont57 - %tmp82 = getelementptr %struct.QPrinter* %printer, i32 0, i32 0 ; <%struct.QPaintDevice*> [#uses=1] - %tmp84 = invoke i32 @_ZNK12QPaintDevice5widthEv( %struct.QPaintDevice* %tmp82 ) - to label %invcont83 unwind label %cleanup329 ; <i32> [#uses=1] -invcont83: ; preds = %invcont79 - %tmp80.upgrd.14 = sitofp i32 %tmp80 to double ; <double> [#uses=1] - %tmp84.upgrd.15 = sitofp i32 %tmp84 to double ; <double> [#uses=1] - call void @_ZN6QSizeFC1Edd( %struct.QPointF* %printerPageSize, double %tmp84.upgrd.15, double %tmp80.upgrd.14 ) - %tmp85 = call double @_ZNK6QSizeF6heightEv( %struct.QPointF* %printerPageSize ) ; <double> [#uses=1] - %tmp86 = call double @_ZNK6QSizeF6heightEv( %struct.QPointF* %scaledPageSize ) ; <double> [#uses=1] - %tmp87 = fdiv double %tmp85, %tmp86 ; <double> [#uses=1] - %tmp88 = call double @_ZNK6QSizeF5widthEv( %struct.QPointF* %printerPageSize ) ; <double> [#uses=1] - %tmp89 = call double @_ZNK6QSizeF5widthEv( %struct.QPointF* %scaledPageSize ) ; <double> [#uses=1] - %tmp90 = fdiv double %tmp88, %tmp89 ; <double> [#uses=1] - invoke void @_ZN8QPainter5scaleEdd( %struct.QPainter* %p, double %tmp90, double %tmp87 ) - to label %cond_next194 unwind label %cleanup329 -cond_false: ; preds = %bb21 - %tmp.upgrd.16 = getelementptr %struct.QAbstractTextDocumentLayout* %this, i32 0, i32 0 ; <%struct.QObject*> [#uses=1] - %tmp95 = invoke %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument5cloneEP7QObject( %struct.QAbstractTextDocumentLayout* %this, %struct.QObject* %tmp.upgrd.16 ) - to label %invcont94 unwind label %cleanup329 ; <%struct.QAbstractTextDocumentLayout*> [#uses=9] -invcont94: ; preds = %cond_false - %tmp99 = invoke %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument14documentLayoutEv( %struct.QAbstractTextDocumentLayout* %tmp95 ) - to label %invcont98 unwind label %cleanup329 ; <%struct.QAbstractTextDocumentLayout*> [#uses=1] -invcont98: ; preds = %invcont94 - %tmp101 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p ) - to label %invcont100 unwind label %cleanup329 ; <%struct.QPaintDevice*> [#uses=1] -invcont100: ; preds = %invcont98 - invoke void @_ZN27QAbstractTextDocumentLayout14setPaintDeviceEP12QPaintDevice( %struct.QAbstractTextDocumentLayout* %tmp99, %struct.QPaintDevice* %tmp101 ) - to label %invcont103 unwind label %cleanup329 -invcont103: ; preds = %invcont100 - %tmp105 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p ) - to label %invcont104 unwind label %cleanup329 ; <%struct.QPaintDevice*> [#uses=1] -invcont104: ; preds = %invcont103 - %tmp107 = invoke i32 @_ZNK12QPaintDevice11logicalDpiYEv( %struct.QPaintDevice* %tmp105 ) - to label %invcont106 unwind label %cleanup329 ; <i32> [#uses=1] -invcont106: ; preds = %invcont104 - %tmp108 = sitofp i32 %tmp107 to double ; <double> [#uses=1] - %tmp109 = fmul double %tmp108, 0x3FE93264C993264C ; <double> [#uses=1] - %tmp109.upgrd.17 = fptosi double %tmp109 to i32 ; <i32> [#uses=3] - %tmp.upgrd.18 = call %struct.QTextBlockGroup* @_ZNK13QTextDocument9rootFrameEv( %struct.QAbstractTextDocumentLayout* %tmp95 ) ; <%struct.QTextBlockGroup*> [#uses=1] - invoke void @_ZNK10QTextFrame11frameFormatEv( %struct.QTextBlockFormat* sret %fmt, %struct.QTextBlockGroup* %tmp.upgrd.18 ) - to label %invcont111 unwind label %cleanup329 -invcont111: ; preds = %invcont106 - %tmp112 = sitofp i32 %tmp109.upgrd.17 to double ; <double> [#uses=1] - invoke void @_ZN16QTextFrameFormat9setMarginEd( %struct.QTextBlockFormat* %fmt, double %tmp112 ) - to label %invcont114 unwind label %cleanup192 -invcont114: ; preds = %invcont111 - %tmp116 = call %struct.QTextBlockGroup* @_ZNK13QTextDocument9rootFrameEv( %struct.QAbstractTextDocumentLayout* %tmp95 ) ; <%struct.QTextBlockGroup*> [#uses=1] - invoke void @_ZN10QTextFrame14setFrameFormatERK16QTextFrameFormat( %struct.QTextBlockGroup* %tmp116, %struct.QTextBlockFormat* %fmt ) - to label %invcont117 unwind label %cleanup192 -invcont117: ; preds = %invcont114 - %tmp119 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p ) - to label %invcont118 unwind label %cleanup192 ; <%struct.QPaintDevice*> [#uses=1] -invcont118: ; preds = %invcont117 - %tmp121 = invoke i32 @_ZNK12QPaintDevice6heightEv( %struct.QPaintDevice* %tmp119 ) - to label %invcont120 unwind label %cleanup192 ; <i32> [#uses=1] -invcont120: ; preds = %invcont118 - %tmp121.upgrd.19 = sitofp i32 %tmp121 to double ; <double> [#uses=1] - %tmp123 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p ) - to label %invcont122 unwind label %cleanup192 ; <%struct.QPaintDevice*> [#uses=1] -invcont122: ; preds = %invcont120 - %tmp125 = invoke i32 @_ZNK12QPaintDevice5widthEv( %struct.QPaintDevice* %tmp123 ) - to label %invcont124 unwind label %cleanup192 ; <i32> [#uses=1] -invcont124: ; preds = %invcont122 - %tmp125.upgrd.20 = sitofp i32 %tmp125 to double ; <double> [#uses=1] - call void @_ZN6QRectFC1Edddd( %struct.QRectF* %tmp.upgrd.1, double 0.000000e+00, double 0.000000e+00, double %tmp125.upgrd.20, double %tmp121.upgrd.19 ) - %tmp126 = getelementptr %struct.QRectF* %body, i32 0, i32 0 ; <double*> [#uses=1] - %tmp127 = getelementptr %struct.QRectF* %tmp.upgrd.1, i32 0, i32 0 ; <double*> [#uses=1] - %tmp128 = load double* %tmp127 ; <double> [#uses=1] - store double %tmp128, double* %tmp126 - %tmp129 = getelementptr %struct.QRectF* %body, i32 0, i32 1 ; <double*> [#uses=1] - %tmp130 = getelementptr %struct.QRectF* %tmp.upgrd.1, i32 0, i32 1 ; <double*> [#uses=1] - %tmp131 = load double* %tmp130 ; <double> [#uses=1] - store double %tmp131, double* %tmp129 - %tmp132 = getelementptr %struct.QRectF* %body, i32 0, i32 2 ; <double*> [#uses=1] - %tmp133 = getelementptr %struct.QRectF* %tmp.upgrd.1, i32 0, i32 2 ; <double*> [#uses=1] - %tmp134 = load double* %tmp133 ; <double> [#uses=1] - store double %tmp134, double* %tmp132 - %tmp135 = getelementptr %struct.QRectF* %body, i32 0, i32 3 ; <double*> [#uses=1] - %tmp136 = getelementptr %struct.QRectF* %tmp.upgrd.1, i32 0, i32 3 ; <double*> [#uses=1] - %tmp137 = load double* %tmp136 ; <double> [#uses=1] - store double %tmp137, double* %tmp135 - %tmp138 = call double @_ZNK6QRectF6heightEv( %struct.QRectF* %body ) ; <double> [#uses=1] - %tmp139 = sitofp i32 %tmp109.upgrd.17 to double ; <double> [#uses=1] - %tmp140 = fsub double %tmp138, %tmp139 ; <double> [#uses=1] - %tmp142 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p ) - to label %invcont141 unwind label %cleanup192 ; <%struct.QPaintDevice*> [#uses=1] -invcont141: ; preds = %invcont124 - invoke void @_ZNK13QTextDocument11defaultFontEv( %struct.QFont* sret %tmp.upgrd.3, %struct.QAbstractTextDocumentLayout* %tmp95 ) - to label %invcont144 unwind label %cleanup192 -invcont144: ; preds = %invcont141 - invoke void @_ZN12QFontMetricsC1ERK5QFontP12QPaintDevice( %struct.QFontMetrics* %tmp.upgrd.2, %struct.QFont* %tmp.upgrd.3, %struct.QPaintDevice* %tmp142 ) - to label %invcont146 unwind label %cleanup173 -invcont146: ; preds = %invcont144 - %tmp149 = invoke i32 @_ZNK12QFontMetrics6ascentEv( %struct.QFontMetrics* %tmp.upgrd.2 ) - to label %invcont148 unwind label %cleanup168 ; <i32> [#uses=1] -invcont148: ; preds = %invcont146 - %tmp149.upgrd.21 = sitofp i32 %tmp149 to double ; <double> [#uses=1] - %tmp150 = fadd double %tmp140, %tmp149.upgrd.21 ; <double> [#uses=1] - %tmp152 = invoke %struct.QPaintDevice* @_ZNK8QPainter6deviceEv( %struct.QPainter* %p ) - to label %invcont151 unwind label %cleanup168 ; <%struct.QPaintDevice*> [#uses=1] -invcont151: ; preds = %invcont148 - %tmp154 = invoke i32 @_ZNK12QPaintDevice11logicalDpiYEv( %struct.QPaintDevice* %tmp152 ) - to label %invcont153 unwind label %cleanup168 ; <i32> [#uses=1] -invcont153: ; preds = %invcont151 - %tmp155 = mul i32 %tmp154, 5 ; <i32> [#uses=1] - %tmp156 = sdiv i32 %tmp155, 72 ; <i32> [#uses=1] - %tmp156.upgrd.22 = sitofp i32 %tmp156 to double ; <double> [#uses=1] - %tmp157 = fadd double %tmp150, %tmp156.upgrd.22 ; <double> [#uses=1] - %tmp158 = call double @_ZNK6QRectF5widthEv( %struct.QRectF* %body ) ; <double> [#uses=1] - %tmp159 = sitofp i32 %tmp109.upgrd.17 to double ; <double> [#uses=1] - %tmp160 = fsub double %tmp158, %tmp159 ; <double> [#uses=1] - call void @_ZN7QPointFC1Edd( %struct.QPointF* %tmp2, double %tmp160, double %tmp157 ) - %tmp161 = getelementptr %struct.QPointF* %pageNumberPos, i32 0, i32 0 ; <double*> [#uses=1] - %tmp162 = getelementptr %struct.QPointF* %tmp2, i32 0, i32 0 ; <double*> [#uses=1] - %tmp163 = load double* %tmp162 ; <double> [#uses=1] - store double %tmp163, double* %tmp161 - %tmp164 = getelementptr %struct.QPointF* %pageNumberPos, i32 0, i32 1 ; <double*> [#uses=1] - %tmp165 = getelementptr %struct.QPointF* %tmp2, i32 0, i32 1 ; <double*> [#uses=1] - %tmp166 = load double* %tmp165 ; <double> [#uses=1] - store double %tmp166, double* %tmp164 - invoke void @_ZN12QFontMetricsD1Ev( %struct.QFontMetrics* %tmp.upgrd.2 ) - to label %cleanup171 unwind label %cleanup173 -cleanup168: ; preds = %invcont151, %invcont148, %invcont146 - %val168 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) - cleanup - invoke void @_ZN12QFontMetricsD1Ev( %struct.QFontMetrics* %tmp.upgrd.2 ) - to label %cleanup173 unwind label %cleanup173 -cleanup171: ; preds = %invcont153 - invoke void @_ZN5QFontD1Ev( %struct.QFont* %tmp.upgrd.3 ) - to label %finally170 unwind label %cleanup192 -cleanup173: ; preds = %cleanup168, %cleanup168, %invcont153, %invcont144 - %val173 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) - cleanup - invoke void @_ZN5QFontD1Ev( %struct.QFont* %tmp.upgrd.3 ) - to label %cleanup192 unwind label %cleanup192 -finally170: ; preds = %cleanup171 - invoke void @_ZNK13QTextDocument11defaultFontEv( %struct.QFont* sret %font, %struct.QAbstractTextDocumentLayout* %tmp95 ) - to label %invcont177 unwind label %cleanup192 -invcont177: ; preds = %finally170 - invoke void @_ZN5QFont12setPointSizeEi( %struct.QFont* %font, i32 10 ) - to label %invcont179 unwind label %cleanup187 -invcont179: ; preds = %invcont177 - invoke void @_ZN13QTextDocument14setDefaultFontERK5QFont( %struct.QAbstractTextDocumentLayout* %tmp95, %struct.QFont* %font ) - to label %invcont181 unwind label %cleanup187 -invcont181: ; preds = %invcont179 - call void @_ZNK6QRectF4sizeEv( %struct.QPointF* sret %tmp3, %struct.QRectF* %body ) - invoke void @_ZN13QTextDocument11setPageSizeERK6QSizeF( %struct.QAbstractTextDocumentLayout* %tmp95, %struct.QPointF* %tmp3 ) - to label %cleanup185 unwind label %cleanup187 -cleanup185: ; preds = %invcont181 - invoke void @_ZN5QFontD1Ev( %struct.QFont* %font ) - to label %cleanup190 unwind label %cleanup192 -cleanup187: ; preds = %invcont181, %invcont179, %invcont177 - %val187 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) - cleanup - invoke void @_ZN5QFontD1Ev( %struct.QFont* %font ) - to label %cleanup192 unwind label %cleanup192 -cleanup190: ; preds = %cleanup185 - invoke void @_ZN16QTextFrameFormatD1Ev( %struct.QTextBlockFormat* %fmt ) - to label %cond_next194 unwind label %cleanup329 -cleanup192: ; preds = %cleanup187, %cleanup187, %cleanup185, %finally170, %cleanup173, %cleanup173, %cleanup171, %invcont141, %invcont124, %invcont122, %invcont120, %invcont118, %invcont117, %invcont114, %invcont111 - %val192 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) - cleanup - invoke void @_ZN16QTextFrameFormatD1Ev( %struct.QTextBlockFormat* %fmt ) - to label %cleanup329 unwind label %cleanup329 -cond_next194: ; preds = %cleanup190, %invcont83 - %clonedDoc.1 = phi %struct.QAbstractTextDocumentLayout* [ null, %invcont83 ], [ %tmp95, %cleanup190 ] ; <%struct.QAbstractTextDocumentLayout*> [#uses=3] - %doc.1 = phi %struct.QAbstractTextDocumentLayout* [ %this, %invcont83 ], [ %tmp95, %cleanup190 ] ; <%struct.QAbstractTextDocumentLayout*> [#uses=2] - %tmp197 = invoke i1 @_ZNK8QPrinter13collateCopiesEv( %struct.QPrinter* %printer ) - to label %invcont196 unwind label %cleanup329 ; <i1> [#uses=1] -invcont196: ; preds = %cond_next194 - br i1 %tmp197, label %cond_true200, label %cond_false204 -cond_true200: ; preds = %invcont196 - %tmp2000 = load double* %foo - store double %tmp2000, double* %bar - %tmp203 = invoke i32 @_ZNK8QPrinter9numCopiesEv( %struct.QPrinter* %printer ) - to label %cond_next208 unwind label %cleanup329 ; <i32> [#uses=1] -cond_false204: ; preds = %invcont196 - %tmp2001 = load double* %foo - store double %tmp2001, double* %bar - %tmp207 = invoke i32 @_ZNK8QPrinter9numCopiesEv( %struct.QPrinter* %printer ) - to label %cond_next208 unwind label %cleanup329 ; <i32> [#uses=1] -cond_next208: ; preds = %invcont206, %invcont202 - %pageCopies.0 = phi i32 [ %tmp203, %cond_true200 ], [ 1, %cond_false204 ] ; <i32> [#uses=2] - %docCopies.0 = phi i32 [ 1, %cond_true200 ], [ %tmp207, %cond_false204 ] ; <i32> [#uses=2] - %tmp211 = invoke i32 @_ZNK8QPrinter8fromPageEv( %struct.QPrinter* %printer ) - to label %invcont210 unwind label %cleanup329 ; <i32> [#uses=3] -invcont210: ; preds = %cond_next208 - %tmp214 = invoke i32 @_ZNK8QPrinter6toPageEv( %struct.QPrinter* %printer ) - to label %invcont213 unwind label %cleanup329 ; <i32> [#uses=3] -invcont213: ; preds = %invcont210 - %tmp216 = icmp eq i32 %tmp211, 0 ; <i1> [#uses=1] - br i1 %tmp216, label %cond_true217, label %cond_next225 -cond_true217: ; preds = %invcont213 - %tmp219 = icmp eq i32 %tmp214, 0 ; <i1> [#uses=1] - br i1 %tmp219, label %cond_true220, label %cond_next225 -cond_true220: ; preds = %cond_true217 - %tmp223 = invoke i32 @_ZNK13QTextDocument9pageCountEv( %struct.QAbstractTextDocumentLayout* %doc.1 ) - to label %invcont222 unwind label %cleanup329 ; <i32> [#uses=1] -invcont222: ; preds = %cond_true220 - br label %cond_next225 -cond_next225: ; preds = %invcont222, %cond_true217, %invcont213 - %toPage.1 = phi i32 [ %tmp223, %invcont222 ], [ %tmp214, %cond_true217 ], [ %tmp214, %invcont213 ] ; <i32> [#uses=2] - %fromPage.1 = phi i32 [ 1, %invcont222 ], [ %tmp211, %cond_true217 ], [ %tmp211, %invcont213 ] ; <i32> [#uses=2] - %tmp.page = invoke i32 @_ZNK8QPrinter9pageOrderEv( %struct.QPrinter* %printer ) - to label %invcont227 unwind label %cleanup329 ; <i32> [#uses=1] -invcont227: ; preds = %cond_next225 - %tmp228 = icmp eq i32 %tmp.page, 1 ; <i1> [#uses=1] - br i1 %tmp228, label %cond_true230, label %cond_next234 -cond_true230: ; preds = %invcont227 - br label %cond_next234 -cond_next234: ; preds = %cond_true230, %invcont227 - %ascending.1 = phi i1 [ false, %cond_true230 ], [ true, %invcont227 ] ; <i1> [#uses=1] - %toPage.2 = phi i32 [ %fromPage.1, %cond_true230 ], [ %toPage.1, %invcont227 ] ; <i32> [#uses=1] - %fromPage.2 = phi i32 [ %toPage.1, %cond_true230 ], [ %fromPage.1, %invcont227 ] ; <i32> [#uses=1] - br label %bb309 -bb237: ; preds = %cond_true313, %cond_next293 - %iftmp.410.4 = phi i1 [ %iftmp.410.5, %cond_true313 ], [ %iftmp.410.1, %cond_next293 ] ; <i1> [#uses=1] - %page.4 = phi i32 [ %fromPage.2, %cond_true313 ], [ %page.3, %cond_next293 ] ; <i32> [#uses=4] - br label %bb273 -invcont240: ; preds = %cond_true277 - %tmp242 = icmp eq i32 %tmp241, 2 ; <i1> [#uses=1] - br i1 %tmp242, label %bb252, label %cond_next244 -cond_next244: ; preds = %invcont240 - %tmp247 = invoke i32 @_ZNK8QPrinter12printerStateEv( %struct.QPrinter* %printer ) - to label %invcont246 unwind label %cleanup329 ; <i32> [#uses=1] -invcont246: ; preds = %cond_next244 - %tmp248 = icmp eq i32 %tmp247, 3 ; <i1> [#uses=1] - br i1 %tmp248, label %bb252, label %bb253 -bb252: ; preds = %invcont246, %invcont240 - br label %bb254 -bb253: ; preds = %invcont246 - br label %bb254 -bb254: ; preds = %bb253, %bb252 - %iftmp.410.0 = phi i1 [ true, %bb252 ], [ false, %bb253 ] ; <i1> [#uses=2] - br i1 %iftmp.410.0, label %UserCanceled, label %cond_next258 -cond_next258: ; preds = %bb254 - invoke fastcc void @_Z9printPageiP8QPainterPK13QTextDocumentRK6QRectFRK7QPointF( i32 %page.4, %struct.QPainter* %p, %struct.QAbstractTextDocumentLayout* %doc.1, %struct.QRectF* %body, %struct.QPointF* %pageNumberPos ) - to label %invcont261 unwind label %cleanup329 -invcont261: ; preds = %cond_next258 - %tmp263 = add i32 %pageCopies.0, -1 ; <i32> [#uses=1] - %tmp265 = icmp sgt i32 %tmp263, %j.4 ; <i1> [#uses=1] - br i1 %tmp265, label %cond_true266, label %cond_next270 -cond_true266: ; preds = %invcont261 - %tmp269 = invoke i1 @_ZN8QPrinter7newPageEv( %struct.QPrinter* %printer ) - to label %cond_next270 unwind label %cleanup329 ; <i1> [#uses=0] -cond_next270: ; preds = %cond_true266, %invcont261 - %tmp272 = add i32 %j.4, 1 ; <i32> [#uses=1] - br label %bb273 -bb273: ; preds = %cond_next270, %bb237 - %iftmp.410.1 = phi i1 [ %iftmp.410.4, %bb237 ], [ %iftmp.410.0, %cond_next270 ] ; <i1> [#uses=2] - %j.4 = phi i32 [ 0, %bb237 ], [ %tmp272, %cond_next270 ] ; <i32> [#uses=3] - %tmp276 = icmp slt i32 %j.4, %pageCopies.0 ; <i1> [#uses=1] - br i1 %tmp276, label %cond_true277, label %bb280 -cond_true277: ; preds = %bb273 - %tmp241 = invoke i32 @_ZNK8QPrinter12printerStateEv( %struct.QPrinter* %printer ) - to label %invcont240 unwind label %cleanup329 ; <i32> [#uses=1] -bb280: ; preds = %bb273 - %tmp283 = icmp eq i32 %page.4, %toPage.2 ; <i1> [#uses=1] - br i1 %tmp283, label %bb297, label %cond_next285 -cond_next285: ; preds = %bb280 - br i1 %ascending.1, label %cond_true287, label %cond_false290 -cond_true287: ; preds = %cond_next285 - %tmp289 = add i32 %page.4, 1 ; <i32> [#uses=1] - br label %cond_next293 -cond_false290: ; preds = %cond_next285 - %tmp292 = add i32 %page.4, -1 ; <i32> [#uses=1] - br label %cond_next293 -cond_next293: ; preds = %cond_false290, %cond_true287 - %page.3 = phi i32 [ %tmp289, %cond_true287 ], [ %tmp292, %cond_false290 ] ; <i32> [#uses=1] - %tmp296 = invoke i1 @_ZN8QPrinter7newPageEv( %struct.QPrinter* %printer ) - to label %bb237 unwind label %cleanup329 ; <i1> [#uses=0] -bb297: ; preds = %bb280 - %tmp299 = add i32 %docCopies.0, -1 ; <i32> [#uses=1] - %tmp301 = icmp sgt i32 %tmp299, %i.1 ; <i1> [#uses=1] - br i1 %tmp301, label %cond_true302, label %cond_next306 -cond_true302: ; preds = %bb297 - %tmp305 = invoke i1 @_ZN8QPrinter7newPageEv( %struct.QPrinter* %printer ) - to label %cond_next306 unwind label %cleanup329 ; <i1> [#uses=0] -cond_next306: ; preds = %cond_true302, %bb297 - %tmp308 = add i32 %i.1, 1 ; <i32> [#uses=1] - br label %bb309 -bb309: ; preds = %cond_next306, %cond_next234 - %iftmp.410.5 = phi i1 [ undef, %cond_next234 ], [ %iftmp.410.1, %cond_next306 ] ; <i1> [#uses=1] - %i.1 = phi i32 [ 0, %cond_next234 ], [ %tmp308, %cond_next306 ] ; <i32> [#uses=3] - %tmp312 = icmp slt i32 %i.1, %docCopies.0 ; <i1> [#uses=1] - br i1 %tmp312, label %cond_true313, label %UserCanceled -cond_true313: ; preds = %bb309 - br label %bb237 -UserCanceled: ; preds = %bb309, %bb254 - %tmp318 = icmp eq %struct.QAbstractTextDocumentLayout* %clonedDoc.1, null ; <i1> [#uses=1] - br i1 %tmp318, label %cleanup327, label %cond_true319 -cond_true319: ; preds = %UserCanceled - %tmp.upgrd.23 = getelementptr %struct.QAbstractTextDocumentLayout* %clonedDoc.1, i32 0, i32 0, i32 0 ; <i32 (...)***> [#uses=1] - %tmp.upgrd.24 = load i32 (...)*** %tmp.upgrd.23 ; <i32 (...)**> [#uses=1] - %tmp322 = getelementptr i32 (...)** %tmp.upgrd.24, i32 4 ; <i32 (...)**> [#uses=1] - %tmp.upgrd.25 = load i32 (...)** %tmp322 ; <i32 (...)*> [#uses=1] - %tmp.upgrd.26 = bitcast i32 (...)* %tmp.upgrd.25 to void (%struct.QAbstractTextDocumentLayout*)* ; <void (%struct.QAbstractTextDocumentLayout*)*> [#uses=1] - invoke void %tmp.upgrd.26( %struct.QAbstractTextDocumentLayout* %clonedDoc.1 ) - to label %cleanup327 unwind label %cleanup329 -cleanup327: ; preds = %cond_true319, %UserCanceled - call void @_ZN8QPainterD1Ev( %struct.QPainter* %p ) - ret void -cleanup328: ; preds = %invcont - call void @_ZN8QPainterD1Ev( %struct.QPainter* %p ) - ret void -cleanup329: ; preds = %cond_true319, %cond_true302, %cond_next293, %cond_true277, %cond_true266, %cond_next258, %cond_next244, %cond_next225, %cond_true220, %invcont210, %cond_next208, %cond_false204, %cond_true200, %cond_next194, %cleanup192, %cleanup192, %cleanup190, %invcont106, %invcont104, %invcont103, %invcont100, %invcont98, %invcont94, %cond_false, %invcont83, %invcont79, %invcont57, %invcont51, %invcont45, %cond_next42, %invcont37, %cond_true35, %invcont29, %invcont25, %cond_true24, %cond_next, %entry - %val329 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) - cleanup - call void @_ZN8QPainterD1Ev( %struct.QPainter* %p ) - resume { i8*, i32 } %val329 -} - -declare void @_ZN6QSizeFC1Edd(%struct.QPointF*, double, double) - -declare i1 @_ZNK6QSizeF7isValidEv(%struct.QPointF*) - -declare double @_ZNK6QSizeF5widthEv(%struct.QPointF*) - -declare double @_ZNK6QSizeF6heightEv(%struct.QPointF*) - -declare double* @_ZN6QSizeF6rwidthEv(%struct.QPointF*) - -declare double* @_ZN6QSizeF7rheightEv(%struct.QPointF*) - -declare %struct.QTextDocumentPrivate* @_ZNK13QTextDocument6d_funcEv(%struct.QAbstractTextDocumentLayout*) - -declare void @_ZN7QPointFC1Ev(%struct.QPointF*) - -declare void @_ZN7QPointFC1Edd(%struct.QPointF*, double, double) - -declare void @_ZN16QTextFrameFormat9setMarginEd(%struct.QTextBlockFormat*, double) - -declare void @_ZN6QRectFC1Edddd(%struct.QRectF*, double, double, double, double) - -declare void @_ZN6QRectFC1ERK7QPointFRK6QSizeF(%struct.QRectF*, %struct.QPointF*, %struct.QPointF*) - -declare double @_ZNK6QRectF5widthEv(%struct.QRectF*) - -declare double @_ZNK6QRectF6heightEv(%struct.QRectF*) - -declare void @_ZNK6QRectF4sizeEv(%struct.QPointF*, %struct.QRectF*) - -declare void @_ZN16QTextFrameFormatD1Ev(%struct.QTextBlockFormat*) - -declare void @_ZNK10QTextFrame11frameFormatEv(%struct.QTextBlockFormat*, %struct.QTextBlockGroup*) - -declare void @_ZN10QTextFrame14setFrameFormatERK16QTextFrameFormat(%struct.QTextBlockGroup*, %struct.QTextBlockFormat*) - -declare i32 @_ZNK12QPaintDevice5widthEv(%struct.QPaintDevice*) - -declare i32 @_ZNK12QPaintDevice6heightEv(%struct.QPaintDevice*) - -declare i32 @_ZNK12QPaintDevice11logicalDpiXEv(%struct.QPaintDevice*) - -declare i32 @_ZNK12QPaintDevice11logicalDpiYEv(%struct.QPaintDevice*) - -declare %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument5cloneEP7QObject(%struct.QAbstractTextDocumentLayout*, %struct.QObject*) - -declare void @_ZN5QFontD1Ev(%struct.QFont*) - -declare %struct.QAbstractTextDocumentLayout* @_ZNK13QTextDocument14documentLayoutEv(%struct.QAbstractTextDocumentLayout*) - -declare %struct.QTextBlockGroup* @_ZNK13QTextDocument9rootFrameEv(%struct.QAbstractTextDocumentLayout*) - -declare i32 @_ZNK13QTextDocument9pageCountEv(%struct.QAbstractTextDocumentLayout*) - -declare void @_ZNK13QTextDocument11defaultFontEv(%struct.QFont*, %struct.QAbstractTextDocumentLayout*) - -declare void @_ZN13QTextDocument14setDefaultFontERK5QFont(%struct.QAbstractTextDocumentLayout*, %struct.QFont*) - -declare void @_ZN13QTextDocument11setPageSizeERK6QSizeF(%struct.QAbstractTextDocumentLayout*, %struct.QPointF*) - -declare void @_Z9printPageiP8QPainterPK13QTextDocumentRK6QRectFRK7QPointF(i32, %struct.QPainter*, %struct.QAbstractTextDocumentLayout*, %struct.QRectF*, %struct.QPointF*) - -declare void @_ZN12QFontMetricsD1Ev(%struct.QFontMetrics*) - -declare void @_ZN8QPainterC1EP12QPaintDevice(%struct.QPainter*, %struct.QPaintDevice*) - -declare i1 @_ZNK8QPainter8isActiveEv(%struct.QPainter*) - -declare i32 @_Z13qt_defaultDpiv() - -declare %struct.QPaintDevice* @_ZNK27QAbstractTextDocumentLayout11paintDeviceEv(%struct.QAbstractTextDocumentLayout*) - -declare void @_ZN8QPainter5scaleEdd(%struct.QPainter*, double, double) - -declare %struct.QPaintDevice* @_ZNK8QPainter6deviceEv(%struct.QPainter*) - -declare void @_ZN27QAbstractTextDocumentLayout14setPaintDeviceEP12QPaintDevice(%struct.QAbstractTextDocumentLayout*, %struct.QPaintDevice*) - -declare void @_ZN12QFontMetricsC1ERK5QFontP12QPaintDevice(%struct.QFontMetrics*, %struct.QFont*, %struct.QPaintDevice*) - -declare i32 @_ZNK12QFontMetrics6ascentEv(%struct.QFontMetrics*) - -declare void @_ZN5QFont12setPointSizeEi(%struct.QFont*, i32) - -declare i1 @_ZNK8QPrinter13collateCopiesEv(%struct.QPrinter*) - -declare i32 @_ZNK8QPrinter9numCopiesEv(%struct.QPrinter*) - -declare i32 @_ZNK8QPrinter8fromPageEv(%struct.QPrinter*) - -declare i32 @_ZNK8QPrinter6toPageEv(%struct.QPrinter*) - -declare i32 @_ZNK8QPrinter9pageOrderEv(%struct.QPrinter*) - -declare i32 @_ZNK8QPrinter12printerStateEv(%struct.QPrinter*) - -declare i1 @_ZN8QPrinter7newPageEv(%struct.QPrinter*) - -declare void @_ZN8QPainterD1Ev(%struct.QPainter*) - -declare i32 @__gxx_personality_v0(...) diff --git a/test/Transforms/SimplifyLibCalls/floor.ll b/test/Transforms/SimplifyLibCalls/floor.ll index 03dcdf5..93c62c2 100644 --- a/test/Transforms/SimplifyLibCalls/floor.ll +++ b/test/Transforms/SimplifyLibCalls/floor.ll @@ -9,6 +9,8 @@ ; DO-SIMPLIFY: call float @ceilf( ; DO-SIMPLIFY: call float @roundf( ; DO-SIMPLIFY: call float @nearbyintf( +; DO-SIMPLIFY: call float @truncf( +; DO-SIMPLIFY: call float @fabsf( ; C89-SIMPLIFY: call float @floorf( ; C89-SIMPLIFY: call float @ceilf( @@ -19,6 +21,8 @@ ; DONT-SIMPLIFY: call double @ceil( ; DONT-SIMPLIFY: call double @round( ; DONT-SIMPLIFY: call double @nearbyint( +; DONT-SIMPLIFY: call double @trunc( +; DONT-SIMPLIFY: call double @fabs( declare double @floor(double) @@ -28,6 +32,10 @@ declare double @round(double) declare double @nearbyint(double) +declare double @trunc(double) + +declare double @fabs(double) + define float @test_floor(float %C) { %D = fpext float %C to double ; <double> [#uses=1] ; --> floorf @@ -60,3 +68,18 @@ define float @test_nearbyint(float %C) { ret float %F } +define float @test_trunc(float %C) { + %D = fpext float %C to double + ; --> truncf + %E = call double @trunc(double %D) + %F = fptrunc double %E to float + ret float %F +} + +define float @test_fabs(float %C) { + %D = fpext float %C to double + ; --> fabsf + %E = call double @fabs(double %D) + %F = fptrunc double %E to float + ret float %F +} diff --git a/test/Verifier/invoke.ll b/test/Verifier/invoke.ll index 06f40f0..c2750bb 100644 --- a/test/Verifier/invoke.ll +++ b/test/Verifier/invoke.ll @@ -19,7 +19,6 @@ L2: ; preds = %0 br label %L L: ; preds = %L2, %L1, %L1 ; CHECK: The unwind destination does not have a landingpad instruction -; CHECK: Instruction does not dominate all uses ret i32 %A } @@ -34,9 +33,12 @@ define void @f1() { entry: ; OK invoke void @llvm.donothing() - to label %cont unwind label %cont + to label %conta unwind label %contb -cont: +conta: + ret void + +contb: %0 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) filter [0 x i8*] zeroinitializer ret void @@ -63,3 +65,15 @@ entry: %call = call i32 @fn(i8 (i8, i8)* @llvm.expect.i8) ret i32 %call } + +define void @f4() { +entry: + invoke void @llvm.donothing() + to label %cont unwind label %cont + +cont: +; CHECK: Block containing LandingPadInst must be jumped to only by the unwind edge of an invoke. + %0 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) + filter [0 x i8*] zeroinitializer + ret void +} |