diff options
Diffstat (limited to 'test')
990 files changed, 35006 insertions, 10007 deletions
diff --git a/test/Analysis/BasicAA/invariant_load.ll b/test/Analysis/BasicAA/invariant_load.ll index cd6ddb9..09b5401 100644 --- a/test/Analysis/BasicAA/invariant_load.ll +++ b/test/Analysis/BasicAA/invariant_load.ll @@ -10,10 +10,10 @@ define i32 @foo(i32* nocapture %p, i8* nocapture %q) { entry: - %0 = load i32* %p, align 4, !tbaa !0, !invariant.load !3 + %0 = load i32* %p, align 4, !invariant.load !3 %conv = trunc i32 %0 to i8 - store i8 %conv, i8* %q, align 1, !tbaa !1 - %1 = load i32* %p, align 4, !tbaa !0, !invariant.load !3 + store i8 %conv, i8* %q, align 1 + %1 = load i32* %p, align 4, !invariant.load !3 %add = add nsw i32 %1, 1 ret i32 %add @@ -23,7 +23,4 @@ entry: ; CHECK: %add = add nsw i32 %0, 1 } -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} !3 = metadata !{} diff --git a/test/Analysis/BasicAA/phi-spec-order.ll b/test/Analysis/BasicAA/phi-spec-order.ll index 27d47bc..4172d09 100644 --- a/test/Analysis/BasicAA/phi-spec-order.ll +++ b/test/Analysis/BasicAA/phi-spec-order.ll @@ -24,23 +24,23 @@ for.body4: ; preds = %for.body4, %for.con %lsr.iv46 = bitcast [16000 x double]* %lsr.iv4 to <4 x double>* %lsr.iv12 = bitcast [16000 x double]* %lsr.iv1 to <4 x double>* %scevgep11 = getelementptr <4 x double>* %lsr.iv46, i64 -2 - %i6 = load <4 x double>* %scevgep11, align 32, !tbaa !0 + %i6 = load <4 x double>* %scevgep11, align 32 %add = fadd <4 x double> %i6, <double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00> - store <4 x double> %add, <4 x double>* %lsr.iv12, align 32, !tbaa !0 + store <4 x double> %add, <4 x double>* %lsr.iv12, align 32 %scevgep10 = getelementptr <4 x double>* %lsr.iv46, i64 -1 - %i7 = load <4 x double>* %scevgep10, align 32, !tbaa !0 + %i7 = load <4 x double>* %scevgep10, align 32 %add.4 = fadd <4 x double> %i7, <double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00> %scevgep9 = getelementptr <4 x double>* %lsr.iv12, i64 1 - store <4 x double> %add.4, <4 x double>* %scevgep9, align 32, !tbaa !0 - %i8 = load <4 x double>* %lsr.iv46, align 32, !tbaa !0 + store <4 x double> %add.4, <4 x double>* %scevgep9, align 32 + %i8 = load <4 x double>* %lsr.iv46, align 32 %add.8 = fadd <4 x double> %i8, <double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00> %scevgep8 = getelementptr <4 x double>* %lsr.iv12, i64 2 - store <4 x double> %add.8, <4 x double>* %scevgep8, align 32, !tbaa !0 + store <4 x double> %add.8, <4 x double>* %scevgep8, align 32 %scevgep7 = getelementptr <4 x double>* %lsr.iv46, i64 1 - %i9 = load <4 x double>* %scevgep7, align 32, !tbaa !0 + %i9 = load <4 x double>* %scevgep7, align 32 %add.12 = fadd <4 x double> %i9, <double 1.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00> %scevgep3 = getelementptr <4 x double>* %lsr.iv12, i64 3 - store <4 x double> %add.12, <4 x double>* %scevgep3, align 32, !tbaa !0 + store <4 x double> %add.12, <4 x double>* %scevgep3, align 32 ; CHECK: NoAlias:{{[ \t]+}}<4 x double>* %scevgep11, <4 x double>* %scevgep7 ; CHECK: NoAlias:{{[ \t]+}}<4 x double>* %scevgep10, <4 x double>* %scevgep7 @@ -65,7 +65,3 @@ for.end: ; preds = %for.body4 for.end10: ; preds = %for.end ret i32 0 } - -!0 = metadata !{metadata !"double", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/Analysis/CostModel/ARM/cast.ll b/test/Analysis/CostModel/ARM/cast.ll index 96eb335..0cdd61c 100644 --- a/test/Analysis/CostModel/ARM/cast.ll +++ b/test/Analysis/CostModel/ARM/cast.ll @@ -152,18 +152,32 @@ define i32 @casts() { ; CHECK: cost of 10 {{.*}} uitofp %r69 = uitofp i64 undef to double - ; Vector cast cost of instructions lowering the cast to the stack. - ; CHECK: cost of 24 {{.*}} sext + ; CHECK: cost of 3 {{.*}} sext %r70 = sext <8 x i8> undef to <8 x i32> - ; CHECK: cost of 48 {{.*}} sext + ; CHECK: cost of 6 {{.*}} sext %r71 = sext <16 x i8> undef to <16 x i32> - ; CHECK: cost of 22 {{.*}} zext + ; CHECK: cost of 3 {{.*}} zext %r72 = zext <8 x i8> undef to <8 x i32> - ; CHECK: cost of 44 {{.*}} zext + ; CHECK: cost of 6 {{.*}} zext %r73 = zext <16 x i8> undef to <16 x i32> - ; CHECK: cost of 19 {{.*}} trunc + + ; CHECK: cost of 7 {{.*}} sext + %rext_0 = sext <8 x i8> undef to <8 x i64> + ; CHECK: cost of 7 {{.*}} zext + %rext_1 = zext <8 x i8> undef to <8 x i64> + ; CHECK: cost of 6 {{.*}} sext + %rext_2 = sext <8 x i16> undef to <8 x i64> + ; CHECK: cost of 6 {{.*}} zext + %rext_3 = zext <8 x i16> undef to <8 x i64> + ; CHECK: cost of 3 {{.*}} sext + %rext_4 = sext <4 x i16> undef to <4 x i64> + ; CHECK: cost of 3 {{.*}} zext + %rext_5 = zext <4 x i16> undef to <4 x i64> + + ; Vector cast cost of instructions lowering the cast to the stack. + ; CHECK: cost of 3 {{.*}} trunc %r74 = trunc <8 x i32> undef to <8 x i8> - ; CHECK: cost of 38 {{.*}} trunc + ; CHECK: cost of 6 {{.*}} trunc %r75 = trunc <16 x i32> undef to <16 x i8> ; Floating point truncation costs. diff --git a/test/Analysis/CostModel/ARM/divrem.ll b/test/Analysis/CostModel/ARM/divrem.ll new file mode 100644 index 0000000..c4ac59b --- /dev/null +++ b/test/Analysis/CostModel/ARM/divrem.ll @@ -0,0 +1,450 @@ +; RUN: opt < %s -cost-model -analyze -mtriple=thumbv7-apple-ios6.0.0 -mcpu=cortex-a9 | FileCheck %s + +define <2 x i8> @sdiv_v2_i8(<2 x i8> %a, <2 x i8> %b) { + ; CHECK: sdiv_v2_i8 + ; CHECK: cost of 40 {{.*}} sdiv + + %1 = sdiv <2 x i8> %a, %b + ret <2 x i8> %1 +} +define <2 x i16> @sdiv_v2_i16(<2 x i16> %a, <2 x i16> %b) { + ; CHECK: sdiv_v2_i16 + ; CHECK: cost of 40 {{.*}} sdiv + + %1 = sdiv <2 x i16> %a, %b + ret <2 x i16> %1 +} +define <2 x i32> @sdiv_v2_i32(<2 x i32> %a, <2 x i32> %b) { + ; CHECK: sdiv_v2_i32 + ; CHECK: cost of 40 {{.*}} sdiv + + %1 = sdiv <2 x i32> %a, %b + ret <2 x i32> %1 +} +define <2 x i64> @sdiv_v2_i64(<2 x i64> %a, <2 x i64> %b) { + ; CHECK: sdiv_v2_i64 + ; CHECK: cost of 40 {{.*}} sdiv + + %1 = sdiv <2 x i64> %a, %b + ret <2 x i64> %1 +} +define <4 x i8> @sdiv_v4_i8(<4 x i8> %a, <4 x i8> %b) { + ; CHECK: sdiv_v4_i8 + ; CHECK: cost of 10 {{.*}} sdiv + + %1 = sdiv <4 x i8> %a, %b + ret <4 x i8> %1 +} +define <4 x i16> @sdiv_v4_i16(<4 x i16> %a, <4 x i16> %b) { + ; CHECK: sdiv_v4_i16 + ; CHECK: cost of 10 {{.*}} sdiv + + %1 = sdiv <4 x i16> %a, %b + ret <4 x i16> %1 +} +define <4 x i32> @sdiv_v4_i32(<4 x i32> %a, <4 x i32> %b) { + ; CHECK: sdiv_v4_i32 + ; CHECK: cost of 80 {{.*}} sdiv + + %1 = sdiv <4 x i32> %a, %b + ret <4 x i32> %1 +} +define <4 x i64> @sdiv_v4_i64(<4 x i64> %a, <4 x i64> %b) { + ; CHECK: sdiv_v4_i64 + ; CHECK: cost of 80 {{.*}} sdiv + + %1 = sdiv <4 x i64> %a, %b + ret <4 x i64> %1 +} +define <8 x i8> @sdiv_v8_i8(<8 x i8> %a, <8 x i8> %b) { + ; CHECK: sdiv_v8_i8 + ; CHECK: cost of 10 {{.*}} sdiv + + %1 = sdiv <8 x i8> %a, %b + ret <8 x i8> %1 +} +define <8 x i16> @sdiv_v8_i16(<8 x i16> %a, <8 x i16> %b) { + ; CHECK: sdiv_v8_i16 + ; CHECK: cost of 160 {{.*}} sdiv + + %1 = sdiv <8 x i16> %a, %b + ret <8 x i16> %1 +} +define <8 x i32> @sdiv_v8_i32(<8 x i32> %a, <8 x i32> %b) { + ; CHECK: sdiv_v8_i32 + ; CHECK: cost of 160 {{.*}} sdiv + + %1 = sdiv <8 x i32> %a, %b + ret <8 x i32> %1 +} +define <8 x i64> @sdiv_v8_i64(<8 x i64> %a, <8 x i64> %b) { + ; CHECK: sdiv_v8_i64 + ; CHECK: cost of 160 {{.*}} sdiv + + %1 = sdiv <8 x i64> %a, %b + ret <8 x i64> %1 +} +define <16 x i8> @sdiv_v16_i8(<16 x i8> %a, <16 x i8> %b) { + ; CHECK: sdiv_v16_i8 + ; CHECK: cost of 320 {{.*}} sdiv + + %1 = sdiv <16 x i8> %a, %b + ret <16 x i8> %1 +} +define <16 x i16> @sdiv_v16_i16(<16 x i16> %a, <16 x i16> %b) { + ; CHECK: sdiv_v16_i16 + ; CHECK: cost of 320 {{.*}} sdiv + + %1 = sdiv <16 x i16> %a, %b + ret <16 x i16> %1 +} +define <16 x i32> @sdiv_v16_i32(<16 x i32> %a, <16 x i32> %b) { + ; CHECK: sdiv_v16_i32 + ; CHECK: cost of 320 {{.*}} sdiv + + %1 = sdiv <16 x i32> %a, %b + ret <16 x i32> %1 +} +define <16 x i64> @sdiv_v16_i64(<16 x i64> %a, <16 x i64> %b) { + ; CHECK: sdiv_v16_i64 + ; CHECK: cost of 320 {{.*}} sdiv + + %1 = sdiv <16 x i64> %a, %b + ret <16 x i64> %1 +} +define <2 x i8> @udiv_v2_i8(<2 x i8> %a, <2 x i8> %b) { + ; CHECK: udiv_v2_i8 + ; CHECK: cost of 40 {{.*}} udiv + + %1 = udiv <2 x i8> %a, %b + ret <2 x i8> %1 +} +define <2 x i16> @udiv_v2_i16(<2 x i16> %a, <2 x i16> %b) { + ; CHECK: udiv_v2_i16 + ; CHECK: cost of 40 {{.*}} udiv + + %1 = udiv <2 x i16> %a, %b + ret <2 x i16> %1 +} +define <2 x i32> @udiv_v2_i32(<2 x i32> %a, <2 x i32> %b) { + ; CHECK: udiv_v2_i32 + ; CHECK: cost of 40 {{.*}} udiv + + %1 = udiv <2 x i32> %a, %b + ret <2 x i32> %1 +} +define <2 x i64> @udiv_v2_i64(<2 x i64> %a, <2 x i64> %b) { + ; CHECK: udiv_v2_i64 + ; CHECK: cost of 40 {{.*}} udiv + + %1 = udiv <2 x i64> %a, %b + ret <2 x i64> %1 +} +define <4 x i8> @udiv_v4_i8(<4 x i8> %a, <4 x i8> %b) { + ; CHECK: udiv_v4_i8 + ; CHECK: cost of 10 {{.*}} udiv + + %1 = udiv <4 x i8> %a, %b + ret <4 x i8> %1 +} +define <4 x i16> @udiv_v4_i16(<4 x i16> %a, <4 x i16> %b) { + ; CHECK: udiv_v4_i16 + ; CHECK: cost of 10 {{.*}} udiv + + %1 = udiv <4 x i16> %a, %b + ret <4 x i16> %1 +} +define <4 x i32> @udiv_v4_i32(<4 x i32> %a, <4 x i32> %b) { + ; CHECK: udiv_v4_i32 + ; CHECK: cost of 80 {{.*}} udiv + + %1 = udiv <4 x i32> %a, %b + ret <4 x i32> %1 +} +define <4 x i64> @udiv_v4_i64(<4 x i64> %a, <4 x i64> %b) { + ; CHECK: udiv_v4_i64 + ; CHECK: cost of 80 {{.*}} udiv + + %1 = udiv <4 x i64> %a, %b + ret <4 x i64> %1 +} +define <8 x i8> @udiv_v8_i8(<8 x i8> %a, <8 x i8> %b) { + ; CHECK: udiv_v8_i8 + ; CHECK: cost of 10 {{.*}} udiv + + %1 = udiv <8 x i8> %a, %b + ret <8 x i8> %1 +} +define <8 x i16> @udiv_v8_i16(<8 x i16> %a, <8 x i16> %b) { + ; CHECK: udiv_v8_i16 + ; CHECK: cost of 160 {{.*}} udiv + + %1 = udiv <8 x i16> %a, %b + ret <8 x i16> %1 +} +define <8 x i32> @udiv_v8_i32(<8 x i32> %a, <8 x i32> %b) { + ; CHECK: udiv_v8_i32 + ; CHECK: cost of 160 {{.*}} udiv + + %1 = udiv <8 x i32> %a, %b + ret <8 x i32> %1 +} +define <8 x i64> @udiv_v8_i64(<8 x i64> %a, <8 x i64> %b) { + ; CHECK: udiv_v8_i64 + ; CHECK: cost of 160 {{.*}} udiv + + %1 = udiv <8 x i64> %a, %b + ret <8 x i64> %1 +} +define <16 x i8> @udiv_v16_i8(<16 x i8> %a, <16 x i8> %b) { + ; CHECK: udiv_v16_i8 + ; CHECK: cost of 320 {{.*}} udiv + + %1 = udiv <16 x i8> %a, %b + ret <16 x i8> %1 +} +define <16 x i16> @udiv_v16_i16(<16 x i16> %a, <16 x i16> %b) { + ; CHECK: udiv_v16_i16 + ; CHECK: cost of 320 {{.*}} udiv + + %1 = udiv <16 x i16> %a, %b + ret <16 x i16> %1 +} +define <16 x i32> @udiv_v16_i32(<16 x i32> %a, <16 x i32> %b) { + ; CHECK: udiv_v16_i32 + ; CHECK: cost of 320 {{.*}} udiv + + %1 = udiv <16 x i32> %a, %b + ret <16 x i32> %1 +} +define <16 x i64> @udiv_v16_i64(<16 x i64> %a, <16 x i64> %b) { + ; CHECK: udiv_v16_i64 + ; CHECK: cost of 320 {{.*}} udiv + + %1 = udiv <16 x i64> %a, %b + ret <16 x i64> %1 +} +define <2 x i8> @srem_v2_i8(<2 x i8> %a, <2 x i8> %b) { + ; CHECK: srem_v2_i8 + ; CHECK: cost of 40 {{.*}} srem + + %1 = srem <2 x i8> %a, %b + ret <2 x i8> %1 +} +define <2 x i16> @srem_v2_i16(<2 x i16> %a, <2 x i16> %b) { + ; CHECK: srem_v2_i16 + ; CHECK: cost of 40 {{.*}} srem + + %1 = srem <2 x i16> %a, %b + ret <2 x i16> %1 +} +define <2 x i32> @srem_v2_i32(<2 x i32> %a, <2 x i32> %b) { + ; CHECK: srem_v2_i32 + ; CHECK: cost of 40 {{.*}} srem + + %1 = srem <2 x i32> %a, %b + ret <2 x i32> %1 +} +define <2 x i64> @srem_v2_i64(<2 x i64> %a, <2 x i64> %b) { + ; CHECK: srem_v2_i64 + ; CHECK: cost of 40 {{.*}} srem + + %1 = srem <2 x i64> %a, %b + ret <2 x i64> %1 +} +define <4 x i8> @srem_v4_i8(<4 x i8> %a, <4 x i8> %b) { + ; CHECK: srem_v4_i8 + ; CHECK: cost of 80 {{.*}} srem + + %1 = srem <4 x i8> %a, %b + ret <4 x i8> %1 +} +define <4 x i16> @srem_v4_i16(<4 x i16> %a, <4 x i16> %b) { + ; CHECK: srem_v4_i16 + ; CHECK: cost of 80 {{.*}} srem + + %1 = srem <4 x i16> %a, %b + ret <4 x i16> %1 +} +define <4 x i32> @srem_v4_i32(<4 x i32> %a, <4 x i32> %b) { + ; CHECK: srem_v4_i32 + ; CHECK: cost of 80 {{.*}} srem + + %1 = srem <4 x i32> %a, %b + ret <4 x i32> %1 +} +define <4 x i64> @srem_v4_i64(<4 x i64> %a, <4 x i64> %b) { + ; CHECK: srem_v4_i64 + ; CHECK: cost of 80 {{.*}} srem + + %1 = srem <4 x i64> %a, %b + ret <4 x i64> %1 +} +define <8 x i8> @srem_v8_i8(<8 x i8> %a, <8 x i8> %b) { + ; CHECK: srem_v8_i8 + ; CHECK: cost of 160 {{.*}} srem + + %1 = srem <8 x i8> %a, %b + ret <8 x i8> %1 +} +define <8 x i16> @srem_v8_i16(<8 x i16> %a, <8 x i16> %b) { + ; CHECK: srem_v8_i16 + ; CHECK: cost of 160 {{.*}} srem + + %1 = srem <8 x i16> %a, %b + ret <8 x i16> %1 +} +define <8 x i32> @srem_v8_i32(<8 x i32> %a, <8 x i32> %b) { + ; CHECK: srem_v8_i32 + ; CHECK: cost of 160 {{.*}} srem + + %1 = srem <8 x i32> %a, %b + ret <8 x i32> %1 +} +define <8 x i64> @srem_v8_i64(<8 x i64> %a, <8 x i64> %b) { + ; CHECK: srem_v8_i64 + ; CHECK: cost of 160 {{.*}} srem + + %1 = srem <8 x i64> %a, %b + ret <8 x i64> %1 +} +define <16 x i8> @srem_v16_i8(<16 x i8> %a, <16 x i8> %b) { + ; CHECK: srem_v16_i8 + ; CHECK: cost of 320 {{.*}} srem + + %1 = srem <16 x i8> %a, %b + ret <16 x i8> %1 +} +define <16 x i16> @srem_v16_i16(<16 x i16> %a, <16 x i16> %b) { + ; CHECK: srem_v16_i16 + ; CHECK: cost of 320 {{.*}} srem + + %1 = srem <16 x i16> %a, %b + ret <16 x i16> %1 +} +define <16 x i32> @srem_v16_i32(<16 x i32> %a, <16 x i32> %b) { + ; CHECK: srem_v16_i32 + ; CHECK: cost of 320 {{.*}} srem + + %1 = srem <16 x i32> %a, %b + ret <16 x i32> %1 +} +define <16 x i64> @srem_v16_i64(<16 x i64> %a, <16 x i64> %b) { + ; CHECK: srem_v16_i64 + ; CHECK: cost of 320 {{.*}} srem + + %1 = srem <16 x i64> %a, %b + ret <16 x i64> %1 +} +define <2 x i8> @urem_v2_i8(<2 x i8> %a, <2 x i8> %b) { + ; CHECK: urem_v2_i8 + ; CHECK: cost of 40 {{.*}} urem + + %1 = urem <2 x i8> %a, %b + ret <2 x i8> %1 +} +define <2 x i16> @urem_v2_i16(<2 x i16> %a, <2 x i16> %b) { + ; CHECK: urem_v2_i16 + ; CHECK: cost of 40 {{.*}} urem + + %1 = urem <2 x i16> %a, %b + ret <2 x i16> %1 +} +define <2 x i32> @urem_v2_i32(<2 x i32> %a, <2 x i32> %b) { + ; CHECK: urem_v2_i32 + ; CHECK: cost of 40 {{.*}} urem + + %1 = urem <2 x i32> %a, %b + ret <2 x i32> %1 +} +define <2 x i64> @urem_v2_i64(<2 x i64> %a, <2 x i64> %b) { + ; CHECK: urem_v2_i64 + ; CHECK: cost of 40 {{.*}} urem + + %1 = urem <2 x i64> %a, %b + ret <2 x i64> %1 +} +define <4 x i8> @urem_v4_i8(<4 x i8> %a, <4 x i8> %b) { + ; CHECK: urem_v4_i8 + ; CHECK: cost of 80 {{.*}} urem + + %1 = urem <4 x i8> %a, %b + ret <4 x i8> %1 +} +define <4 x i16> @urem_v4_i16(<4 x i16> %a, <4 x i16> %b) { + ; CHECK: urem_v4_i16 + ; CHECK: cost of 80 {{.*}} urem + + %1 = urem <4 x i16> %a, %b + ret <4 x i16> %1 +} +define <4 x i32> @urem_v4_i32(<4 x i32> %a, <4 x i32> %b) { + ; CHECK: urem_v4_i32 + ; CHECK: cost of 80 {{.*}} urem + + %1 = urem <4 x i32> %a, %b + ret <4 x i32> %1 +} +define <4 x i64> @urem_v4_i64(<4 x i64> %a, <4 x i64> %b) { + ; CHECK: urem_v4_i64 + ; CHECK: cost of 80 {{.*}} urem + + %1 = urem <4 x i64> %a, %b + ret <4 x i64> %1 +} +define <8 x i8> @urem_v8_i8(<8 x i8> %a, <8 x i8> %b) { + ; CHECK: urem_v8_i8 + ; CHECK: cost of 160 {{.*}} urem + + %1 = urem <8 x i8> %a, %b + ret <8 x i8> %1 +} +define <8 x i16> @urem_v8_i16(<8 x i16> %a, <8 x i16> %b) { + ; CHECK: urem_v8_i16 + ; CHECK: cost of 160 {{.*}} urem + + %1 = urem <8 x i16> %a, %b + ret <8 x i16> %1 +} +define <8 x i32> @urem_v8_i32(<8 x i32> %a, <8 x i32> %b) { + ; CHECK: urem_v8_i32 + ; CHECK: cost of 160 {{.*}} urem + + %1 = urem <8 x i32> %a, %b + ret <8 x i32> %1 +} +define <8 x i64> @urem_v8_i64(<8 x i64> %a, <8 x i64> %b) { + ; CHECK: urem_v8_i64 + ; CHECK: cost of 160 {{.*}} urem + + %1 = urem <8 x i64> %a, %b + ret <8 x i64> %1 +} +define <16 x i8> @urem_v16_i8(<16 x i8> %a, <16 x i8> %b) { + ; CHECK: urem_v16_i8 + ; CHECK: cost of 320 {{.*}} urem + + %1 = urem <16 x i8> %a, %b + ret <16 x i8> %1 +} +define <16 x i16> @urem_v16_i16(<16 x i16> %a, <16 x i16> %b) { + ; CHECK: urem_v16_i16 + ; CHECK: cost of 320 {{.*}} urem + + %1 = urem <16 x i16> %a, %b + ret <16 x i16> %1 +} +define <16 x i32> @urem_v16_i32(<16 x i32> %a, <16 x i32> %b) { + ; CHECK: urem_v16_i32 + ; CHECK: cost of 320 {{.*}} urem + + %1 = urem <16 x i32> %a, %b + ret <16 x i32> %1 +} +define <16 x i64> @urem_v16_i64(<16 x i64> %a, <16 x i64> %b) { + ; CHECK: urem_v16_i64 + ; CHECK: cost of 320 {{.*}} urem + + %1 = urem <16 x i64> %a, %b + ret <16 x i64> %1 +} diff --git a/test/Analysis/CostModel/X86/arith.ll b/test/Analysis/CostModel/X86/arith.ll index f0521ba..92f5a1e 100644 --- a/test/Analysis/CostModel/X86/arith.ll +++ b/test/Analysis/CostModel/X86/arith.ll @@ -66,9 +66,63 @@ define void @avx2mull() { ; CHECK: fmul define i32 @fmul(i32 %arg) { - ;CHECK: cost of 1 {{.*}} fmul + ;CHECK: cost of 2 {{.*}} fmul %A = fmul <4 x float> undef, undef - ;CHECK: cost of 1 {{.*}} fmul + ;CHECK: cost of 2 {{.*}} fmul %B = fmul <8 x float> undef, undef ret i32 undef } + +; AVX: shift +; AVX2: shift +define void @shift() { + ; AVX: cost of 2 {{.*}} shl + ; AVX2: cost of 1 {{.*}} shl + %A0 = shl <4 x i32> undef, undef + ; AVX: cost of 2 {{.*}} shl + ; AVX2: cost of 1 {{.*}} shl + %A1 = shl <2 x i64> undef, undef + + ; AVX: cost of 2 {{.*}} lshr + ; AVX2: cost of 1 {{.*}} lshr + %B0 = lshr <4 x i32> undef, undef + ; AVX: cost of 2 {{.*}} lshr + ; AVX2: cost of 1 {{.*}} lshr + %B1 = lshr <2 x i64> undef, undef + + ; AVX: cost of 2 {{.*}} ashr + ; AVX2: cost of 1 {{.*}} ashr + %C0 = ashr <4 x i32> undef, undef + ; AVX: cost of 6 {{.*}} ashr + ; AVX2: cost of 20 {{.*}} ashr + %C1 = ashr <2 x i64> undef, undef + + ret void +} + +; AVX: avx2shift +; AVX2: avx2shift +define void @avx2shift() { + ; AVX: cost of 2 {{.*}} shl + ; AVX2: cost of 1 {{.*}} shl + %A0 = shl <8 x i32> undef, undef + ; AVX: cost of 2 {{.*}} shl + ; AVX2: cost of 1 {{.*}} shl + %A1 = shl <4 x i64> undef, undef + + ; AVX: cost of 2 {{.*}} lshr + ; AVX2: cost of 1 {{.*}} lshr + %B0 = lshr <8 x i32> undef, undef + ; AVX: cost of 2 {{.*}} lshr + ; AVX2: cost of 1 {{.*}} lshr + %B1 = lshr <4 x i64> undef, undef + + ; AVX: cost of 2 {{.*}} ashr + ; AVX2: cost of 1 {{.*}} ashr + %C0 = ashr <8 x i32> undef, undef + ; AVX: cost of 12 {{.*}} ashr + ; AVX2: cost of 40 {{.*}} ashr + %C1 = ashr <4 x i64> undef, undef + + ret void +} diff --git a/test/Analysis/CostModel/X86/cast.ll b/test/Analysis/CostModel/X86/cast.ll index bacc778..b69b3bf 100644 --- a/test/Analysis/CostModel/X86/cast.ll +++ b/test/Analysis/CostModel/X86/cast.ll @@ -44,9 +44,9 @@ define i32 @zext_sext(<8 x i1> %in) { %B = zext <8 x i16> undef to <8 x i32> ;CHECK: cost of 1 {{.*}} sext %C = sext <4 x i32> undef to <4 x i64> - ;CHECK: cost of 8 {{.*}} sext + ;CHECK: cost of 6 {{.*}} sext %C1 = sext <4 x i8> undef to <4 x i64> - ;CHECK: cost of 8 {{.*}} sext + ;CHECK: cost of 6 {{.*}} sext %C2 = sext <4 x i16> undef to <4 x i64> ;CHECK: cost of 1 {{.*}} zext @@ -77,3 +77,78 @@ define i32 @masks4(<4 x i1> %in) { ret i32 undef } +define void @sitofp4(<4 x i1> %a, <4 x i8> %b, <4 x i16> %c, <4 x i32> %d) { + ; CHECK: cost of 3 {{.*}} sitofp + %A1 = sitofp <4 x i1> %a to <4 x float> + ; CHECK: cost of 3 {{.*}} sitofp + %A2 = sitofp <4 x i1> %a to <4 x double> + + ; CHECK: cost of 3 {{.*}} sitofp + %B1 = sitofp <4 x i8> %b to <4 x float> + ; CHECK: cost of 3 {{.*}} sitofp + %B2 = sitofp <4 x i8> %b to <4 x double> + + ; CHECK: cost of 3 {{.*}} sitofp + %C1 = sitofp <4 x i16> %c to <4 x float> + ; CHECK: cost of 3 {{.*}} sitofp + %C2 = sitofp <4 x i16> %c to <4 x double> + + ; CHECK: cost of 1 {{.*}} sitofp + %D1 = sitofp <4 x i32> %d to <4 x float> + ; CHECK: cost of 1 {{.*}} sitofp + %D2 = sitofp <4 x i32> %d to <4 x double> + ret void +} + +define void @sitofp8(<8 x i1> %a, <8 x i8> %b, <8 x i16> %c, <8 x i32> %d) { + ; CHECK: cost of 8 {{.*}} sitofp + %A1 = sitofp <8 x i1> %a to <8 x float> + + ; CHECK: cost of 8 {{.*}} sitofp + %B1 = sitofp <8 x i8> %b to <8 x float> + + ; CHECK: cost of 5 {{.*}} sitofp + %C1 = sitofp <8 x i16> %c to <8 x float> + + ; CHECK: cost of 1 {{.*}} sitofp + %D1 = sitofp <8 x i32> %d to <8 x float> + ret void +} + +define void @uitofp4(<4 x i1> %a, <4 x i8> %b, <4 x i16> %c, <4 x i32> %d) { + ; CHECK: cost of 7 {{.*}} uitofp + %A1 = uitofp <4 x i1> %a to <4 x float> + ; CHECK: cost of 7 {{.*}} uitofp + %A2 = uitofp <4 x i1> %a to <4 x double> + + ; CHECK: cost of 2 {{.*}} uitofp + %B1 = uitofp <4 x i8> %b to <4 x float> + ; CHECK: cost of 2 {{.*}} uitofp + %B2 = uitofp <4 x i8> %b to <4 x double> + + ; CHECK: cost of 2 {{.*}} uitofp + %C1 = uitofp <4 x i16> %c to <4 x float> + ; CHECK: cost of 2 {{.*}} uitofp + %C2 = uitofp <4 x i16> %c to <4 x double> + + ; CHECK: cost of 6 {{.*}} uitofp + %D1 = uitofp <4 x i32> %d to <4 x float> + ; CHECK: cost of 6 {{.*}} uitofp + %D2 = uitofp <4 x i32> %d to <4 x double> + ret void +} + +define void @uitofp8(<8 x i1> %a, <8 x i8> %b, <8 x i16> %c, <8 x i32> %d) { + ; CHECK: cost of 6 {{.*}} uitofp + %A1 = uitofp <8 x i1> %a to <8 x float> + + ; CHECK: cost of 5 {{.*}} uitofp + %B1 = uitofp <8 x i8> %b to <8 x float> + + ; CHECK: cost of 5 {{.*}} uitofp + %C1 = uitofp <8 x i16> %c to <8 x float> + + ; CHECK: cost of 9 {{.*}} uitofp + %D1 = uitofp <8 x i32> %d to <8 x float> + ret void +} diff --git a/test/Analysis/CostModel/X86/loop_v2.ll b/test/Analysis/CostModel/X86/loop_v2.ll index 260a606..348444e 100644 --- a/test/Analysis/CostModel/X86/loop_v2.ll +++ b/test/Analysis/CostModel/X86/loop_v2.ll @@ -20,10 +20,10 @@ vector.body: ; preds = %vector.body, %vecto ;CHECK: cost of 1 {{.*}} extract %6 = extractelement <2 x i64> %3, i32 1 %7 = getelementptr inbounds i32* %A, i64 %6 - %8 = load i32* %5, align 4, !tbaa !0 + %8 = load i32* %5, align 4 ;CHECK: cost of 1 {{.*}} insert %9 = insertelement <2 x i32> undef, i32 %8, i32 0 - %10 = load i32* %7, align 4, !tbaa !0 + %10 = load i32* %7, align 4 ;CHECK: cost of 1 {{.*}} insert %11 = insertelement <2 x i32> %9, i32 %10, i32 1 %12 = add nsw <2 x i32> %11, %vec.phi @@ -37,7 +37,3 @@ for.end: ; preds = %vector.body %16 = add i32 %14, %15 ret i32 %16 } - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/Analysis/CostModel/X86/sitofp.ll b/test/Analysis/CostModel/X86/sitofp.ll new file mode 100644 index 0000000..338d974 --- /dev/null +++ b/test/Analysis/CostModel/X86/sitofp.ll @@ -0,0 +1,281 @@ +; RUN: opt -mtriple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s + +define <2 x double> @sitofpv2i8v2double(<2 x i8> %a) { + ; SSE2: sitofpv2i8v2double + ; SSE2: cost of 20 {{.*}} sitofp + %1 = sitofp <2 x i8> %a to <2 x double> + ret <2 x double> %1 +} + +define <4 x double> @sitofpv4i8v4double(<4 x i8> %a) { + ; SSE2: sitofpv4i8v4double + ; SSE2: cost of 40 {{.*}} sitofp + %1 = sitofp <4 x i8> %a to <4 x double> + ret <4 x double> %1 +} + +define <8 x double> @sitofpv8i8v8double(<8 x i8> %a) { + ; SSE2: sitofpv8i8v8double + ; SSE2: cost of 80 {{.*}} sitofp +%1 = sitofp <8 x i8> %a to <8 x double> + ret <8 x double> %1 +} + +define <16 x double> @sitofpv16i8v16double(<16 x i8> %a) { + ; SSE2: sitofpv16i8v16double + ; SSE2: cost of 160 {{.*}} sitofp + %1 = sitofp <16 x i8> %a to <16 x double> + ret <16 x double> %1 +} + +define <32 x double> @sitofpv32i8v32double(<32 x i8> %a) { + ; SSE2: sitofpv32i8v32double + ; SSE2: cost of 320 {{.*}} sitofp + %1 = sitofp <32 x i8> %a to <32 x double> + ret <32 x double> %1 +} + +define <2 x double> @sitofpv2i16v2double(<2 x i16> %a) { + ; SSE2: sitofpv2i16v2double + ; SSE2: cost of 20 {{.*}} sitofp + %1 = sitofp <2 x i16> %a to <2 x double> + ret <2 x double> %1 +} + +define <4 x double> @sitofpv4i16v4double(<4 x i16> %a) { + ; SSE2: sitofpv4i16v4double + ; SSE2: cost of 40 {{.*}} sitofp + %1 = sitofp <4 x i16> %a to <4 x double> + ret <4 x double> %1 +} + +define <8 x double> @sitofpv8i16v8double(<8 x i16> %a) { + ; SSE2: sitofpv8i16v8double + ; SSE2: cost of 80 {{.*}} sitofp + %1 = sitofp <8 x i16> %a to <8 x double> + ret <8 x double> %1 +} + +define <16 x double> @sitofpv16i16v16double(<16 x i16> %a) { + ; SSE2: sitofpv16i16v16double + ; SSE2: cost of 160 {{.*}} sitofp + %1 = sitofp <16 x i16> %a to <16 x double> + ret <16 x double> %1 +} + +define <32 x double> @sitofpv32i16v32double(<32 x i16> %a) { + ; SSE2: sitofpv32i16v32double + ; SSE2: cost of 320 {{.*}} sitofp + %1 = sitofp <32 x i16> %a to <32 x double> + ret <32 x double> %1 +} + +define <2 x double> @sitofpv2i32v2double(<2 x i32> %a) { + ; SSE2: sitofpv2i32v2double + ; SSE2: cost of 20 {{.*}} sitofp + %1 = sitofp <2 x i32> %a to <2 x double> + ret <2 x double> %1 +} + +define <4 x double> @sitofpv4i32v4double(<4 x i32> %a) { + ; SSE2: sitofpv4i32v4double + ; SSE2: cost of 40 {{.*}} sitofp + %1 = sitofp <4 x i32> %a to <4 x double> + ret <4 x double> %1 +} + +define <8 x double> @sitofpv8i32v8double(<8 x i32> %a) { + ; SSE2: sitofpv8i32v8double + ; SSE2: cost of 80 {{.*}} sitofp + %1 = sitofp <8 x i32> %a to <8 x double> + ret <8 x double> %1 +} + +define <16 x double> @sitofpv16i32v16double(<16 x i32> %a) { + ; SSE2: sitofpv16i32v16double + ; SSE2: cost of 160 {{.*}} sitofp + %1 = sitofp <16 x i32> %a to <16 x double> + ret <16 x double> %1 +} + +define <32 x double> @sitofpv32i32v32double(<32 x i32> %a) { + ; SSE2: sitofpv32i32v32double + ; SSE2: cost of 320 {{.*}} sitofp + %1 = sitofp <32 x i32> %a to <32 x double> + ret <32 x double> %1 +} + +define <2 x double> @sitofpv2i64v2double(<2 x i64> %a) { + ; SSE2: sitofpv2i64v2double + ; SSE2: cost of 20 {{.*}} sitofp + %1 = sitofp <2 x i64> %a to <2 x double> + ret <2 x double> %1 +} + +define <4 x double> @sitofpv4i64v4double(<4 x i64> %a) { + ; SSE2: sitofpv4i64v4double + ; SSE2: cost of 40 {{.*}} sitofp + %1 = sitofp <4 x i64> %a to <4 x double> + ret <4 x double> %1 +} + +define <8 x double> @sitofpv8i64v8double(<8 x i64> %a) { + %1 = sitofp <8 x i64> %a to <8 x double> + ; SSE2: sitofpv8i64v8double + ; SSE2: cost of 80 {{.*}} sitofp + ret <8 x double> %1 +} + +define <16 x double> @sitofpv16i64v16double(<16 x i64> %a) { + ; SSE2: sitofpv16i64v16double + ; SSE2: cost of 160 {{.*}} sitofp + %1 = sitofp <16 x i64> %a to <16 x double> + ret <16 x double> %1 +} + +define <32 x double> @sitofpv32i64v32double(<32 x i64> %a) { + ; SSE2: sitofpv32i64v32double + ; SSE2: cost of 320 {{.*}} sitofp + %1 = sitofp <32 x i64> %a to <32 x double> + ret <32 x double> %1 +} + +define <2 x float> @sitofpv2i8v2float(<2 x i8> %a) { + ; SSE2: sitofpv2i8v2float + ; SSE2: cost of 15 {{.*}} sitofp + %1 = sitofp <2 x i8> %a to <2 x float> + ret <2 x float> %1 +} + +define <4 x float> @sitofpv4i8v4float(<4 x i8> %a) { + ; SSE2: sitofpv4i8v4float + ; SSE2: cost of 15 {{.*}} sitofp + %1 = sitofp <4 x i8> %a to <4 x float> + ret <4 x float> %1 +} + +define <8 x float> @sitofpv8i8v8float(<8 x i8> %a) { + ; SSE2: sitofpv8i8v8float + ; SSE2: cost of 15 {{.*}} sitofp + %1 = sitofp <8 x i8> %a to <8 x float> + ret <8 x float> %1 +} + +define <16 x float> @sitofpv16i8v16float(<16 x i8> %a) { + ; SSE2: sitofpv16i8v16float + ; SSE2: cost of 8 {{.*}} sitofp + %1 = sitofp <16 x i8> %a to <16 x float> + ret <16 x float> %1 +} + +define <32 x float> @sitofpv32i8v32float(<32 x i8> %a) { + ; SSE2: sitofpv32i8v32float + ; SSE2: cost of 16 {{.*}} sitofp + %1 = sitofp <32 x i8> %a to <32 x float> + ret <32 x float> %1 +} + +define <2 x float> @sitofpv2i16v2float(<2 x i16> %a) { + ; SSE2: sitofpv2i16v2float + ; SSE2: cost of 15 {{.*}} sitofp + %1 = sitofp <2 x i16> %a to <2 x float> + ret <2 x float> %1 +} + +define <4 x float> @sitofpv4i16v4float(<4 x i16> %a) { + ; SSE2: sitofpv4i16v4float + ; SSE2: cost of 15 {{.*}} sitofp + %1 = sitofp <4 x i16> %a to <4 x float> + ret <4 x float> %1 +} + +define <8 x float> @sitofpv8i16v8float(<8 x i16> %a) { + ; SSE2: sitofpv8i16v8float + ; SSE2: cost of 15 {{.*}} sitofp + %1 = sitofp <8 x i16> %a to <8 x float> + ret <8 x float> %1 +} + +define <16 x float> @sitofpv16i16v16float(<16 x i16> %a) { + ; SSE2: sitofpv16i16v16float + ; SSE2: cost of 30 {{.*}} sitofp + %1 = sitofp <16 x i16> %a to <16 x float> + ret <16 x float> %1 +} + +define <32 x float> @sitofpv32i16v32float(<32 x i16> %a) { + ; SSE2: sitofpv32i16v32float + ; SSE2: cost of 60 {{.*}} sitofp + %1 = sitofp <32 x i16> %a to <32 x float> + ret <32 x float> %1 +} + +define <2 x float> @sitofpv2i32v2float(<2 x i32> %a) { + ; SSE2: sitofpv2i32v2float + ; SSE2: cost of 15 {{.*}} sitofp + %1 = sitofp <2 x i32> %a to <2 x float> + ret <2 x float> %1 +} + +define <4 x float> @sitofpv4i32v4float(<4 x i32> %a) { + ; SSE2: sitofpv4i32v4float + ; SSE2: cost of 15 {{.*}} sitofp + %1 = sitofp <4 x i32> %a to <4 x float> + ret <4 x float> %1 +} + +define <8 x float> @sitofpv8i32v8float(<8 x i32> %a) { + ; SSE2: sitofpv8i32v8float + ; SSE2: cost of 30 {{.*}} sitofp + %1 = sitofp <8 x i32> %a to <8 x float> + ret <8 x float> %1 +} + +define <16 x float> @sitofpv16i32v16float(<16 x i32> %a) { + ; SSE2: sitofpv16i32v16float + ; SSE2: cost of 60 {{.*}} sitofp + %1 = sitofp <16 x i32> %a to <16 x float> + ret <16 x float> %1 +} + +define <32 x float> @sitofpv32i32v32float(<32 x i32> %a) { + ; SSE2: sitofpv32i32v32float + ; SSE2: cost of 120 {{.*}} sitofp + %1 = sitofp <32 x i32> %a to <32 x float> + ret <32 x float> %1 +} + +define <2 x float> @sitofpv2i64v2float(<2 x i64> %a) { + ; SSE2: sitofpv2i64v2float + ; SSE2: cost of 15 {{.*}} sitofp + %1 = sitofp <2 x i64> %a to <2 x float> + ret <2 x float> %1 +} + +define <4 x float> @sitofpv4i64v4float(<4 x i64> %a) { + ; SSE2: sitofpv4i64v4float + ; SSE2: cost of 30 {{.*}} sitofp + %1 = sitofp <4 x i64> %a to <4 x float> + ret <4 x float> %1 +} + +define <8 x float> @sitofpv8i64v8float(<8 x i64> %a) { + ; SSE2: sitofpv8i64v8float + ; SSE2: cost of 60 {{.*}} sitofp + %1 = sitofp <8 x i64> %a to <8 x float> + ret <8 x float> %1 +} + +define <16 x float> @sitofpv16i64v16float(<16 x i64> %a) { + ; SSE2: sitofpv16i64v16float + ; SSE2: cost of 120 {{.*}} sitofp + %1 = sitofp <16 x i64> %a to <16 x float> + ret <16 x float> %1 +} + +define <32 x float> @sitofpv32i64v32float(<32 x i64> %a) { + ; SSE2: sitofpv32i64v32float + ; SSE2: cost of 240 {{.*}} sitofp + %1 = sitofp <32 x i64> %a to <32 x float> + ret <32 x float> %1 +} diff --git a/test/Analysis/CostModel/X86/testshiftashr.ll b/test/Analysis/CostModel/X86/testshiftashr.ll new file mode 100644 index 0000000..d96a92f --- /dev/null +++ b/test/Analysis/CostModel/X86/testshiftashr.ll @@ -0,0 +1,531 @@ +; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=core2 < %s | FileCheck --check-prefix=SSE2-CODEGEN %s +; RUN: opt -mtriple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s + +%shifttype = type <2 x i16> +define %shifttype @shift2i16(%shifttype %a, %shifttype %b) { +entry: + ; SSE2: shift2i16 + ; SSE2: cost of 20 {{.*}} ashr + ; SSE2-CODEGEN: shift2i16 + ; SSE2-CODEGEN: sarq %cl + + %0 = ashr %shifttype %a , %b + ret %shifttype %0 +} + +%shifttype4i16 = type <4 x i16> +define %shifttype4i16 @shift4i16(%shifttype4i16 %a, %shifttype4i16 %b) { +entry: + ; SSE2: shift4i16 + ; SSE2: cost of 40 {{.*}} ashr + ; SSE2-CODEGEN: shift4i16 + ; SSE2-CODEGEN: sarl %cl + + %0 = ashr %shifttype4i16 %a , %b + ret %shifttype4i16 %0 +} + +%shifttype8i16 = type <8 x i16> +define %shifttype8i16 @shift8i16(%shifttype8i16 %a, %shifttype8i16 %b) { +entry: + ; SSE2: shift8i16 + ; SSE2: cost of 80 {{.*}} ashr + ; SSE2-CODEGEN: shift8i16 + ; SSE2-CODEGEN: sarw %cl + + %0 = ashr %shifttype8i16 %a , %b + ret %shifttype8i16 %0 +} + +%shifttype16i16 = type <16 x i16> +define %shifttype16i16 @shift16i16(%shifttype16i16 %a, %shifttype16i16 %b) { +entry: + ; SSE2: shift16i16 + ; SSE2: cost of 160 {{.*}} ashr + ; SSE2-CODEGEN: shift16i16 + ; SSE2-CODEGEN: sarw %cl + + %0 = ashr %shifttype16i16 %a , %b + ret %shifttype16i16 %0 +} + +%shifttype32i16 = type <32 x i16> +define %shifttype32i16 @shift32i16(%shifttype32i16 %a, %shifttype32i16 %b) { +entry: + ; SSE2: shift32i16 + ; SSE2: cost of 320 {{.*}} ashr + ; SSE2-CODEGEN: shift32i16 + ; SSE2-CODEGEN: sarw %cl + + %0 = ashr %shifttype32i16 %a , %b + ret %shifttype32i16 %0 +} + +%shifttype2i32 = type <2 x i32> +define %shifttype2i32 @shift2i32(%shifttype2i32 %a, %shifttype2i32 %b) { +entry: + ; SSE2: shift2i32 + ; SSE2: cost of 20 {{.*}} ashr + ; SSE2-CODEGEN: shift2i32 + ; SSE2-CODEGEN: sarq %cl + + %0 = ashr %shifttype2i32 %a , %b + ret %shifttype2i32 %0 +} + +%shifttype4i32 = type <4 x i32> +define %shifttype4i32 @shift4i32(%shifttype4i32 %a, %shifttype4i32 %b) { +entry: + ; SSE2: shift4i32 + ; SSE2: cost of 40 {{.*}} ashr + ; SSE2-CODEGEN: shift4i32 + ; SSE2-CODEGEN: sarl %cl + + %0 = ashr %shifttype4i32 %a , %b + ret %shifttype4i32 %0 +} + +%shifttype8i32 = type <8 x i32> +define %shifttype8i32 @shift8i32(%shifttype8i32 %a, %shifttype8i32 %b) { +entry: + ; SSE2: shift8i32 + ; SSE2: cost of 80 {{.*}} ashr + ; SSE2-CODEGEN: shift8i32 + ; SSE2-CODEGEN: sarl %cl + + %0 = ashr %shifttype8i32 %a , %b + ret %shifttype8i32 %0 +} + +%shifttype16i32 = type <16 x i32> +define %shifttype16i32 @shift16i32(%shifttype16i32 %a, %shifttype16i32 %b) { +entry: + ; SSE2: shift16i32 + ; SSE2: cost of 160 {{.*}} ashr + ; SSE2-CODEGEN: shift16i32 + ; SSE2-CODEGEN: sarl %cl + + %0 = ashr %shifttype16i32 %a , %b + ret %shifttype16i32 %0 +} + +%shifttype32i32 = type <32 x i32> +define %shifttype32i32 @shift32i32(%shifttype32i32 %a, %shifttype32i32 %b) { +entry: + ; SSE2: shift32i32 + ; SSE2: cost of 320 {{.*}} ashr + ; SSE2-CODEGEN: shift32i32 + ; SSE2-CODEGEN: sarl %cl + + %0 = ashr %shifttype32i32 %a , %b + ret %shifttype32i32 %0 +} + +%shifttype2i64 = type <2 x i64> +define %shifttype2i64 @shift2i64(%shifttype2i64 %a, %shifttype2i64 %b) { +entry: + ; SSE2: shift2i64 + ; SSE2: cost of 20 {{.*}} ashr + ; SSE2-CODEGEN: shift2i64 + ; SSE2-CODEGEN: sarq %cl + + %0 = ashr %shifttype2i64 %a , %b + ret %shifttype2i64 %0 +} + +%shifttype4i64 = type <4 x i64> +define %shifttype4i64 @shift4i64(%shifttype4i64 %a, %shifttype4i64 %b) { +entry: + ; SSE2: shift4i64 + ; SSE2: cost of 40 {{.*}} ashr + ; SSE2-CODEGEN: shift4i64 + ; SSE2-CODEGEN: sarq %cl + + %0 = ashr %shifttype4i64 %a , %b + ret %shifttype4i64 %0 +} + +%shifttype8i64 = type <8 x i64> +define %shifttype8i64 @shift8i64(%shifttype8i64 %a, %shifttype8i64 %b) { +entry: + ; SSE2: shift8i64 + ; SSE2: cost of 80 {{.*}} ashr + ; SSE2-CODEGEN: shift8i64 + ; SSE2-CODEGEN: sarq %cl + + %0 = ashr %shifttype8i64 %a , %b + ret %shifttype8i64 %0 +} + +%shifttype16i64 = type <16 x i64> +define %shifttype16i64 @shift16i64(%shifttype16i64 %a, %shifttype16i64 %b) { +entry: + ; SSE2: shift16i64 + ; SSE2: cost of 160 {{.*}} ashr + ; SSE2-CODEGEN: shift16i64 + ; SSE2-CODEGEN: sarq %cl + + %0 = ashr %shifttype16i64 %a , %b + ret %shifttype16i64 %0 +} + +%shifttype32i64 = type <32 x i64> +define %shifttype32i64 @shift32i64(%shifttype32i64 %a, %shifttype32i64 %b) { +entry: + ; SSE2: shift32i64 + ; SSE2: cost of 320 {{.*}} ashr + ; SSE2-CODEGEN: shift32i64 + ; SSE2-CODEGEN: sarq %cl + + %0 = ashr %shifttype32i64 %a , %b + ret %shifttype32i64 %0 +} + +%shifttype2i8 = type <2 x i8> +define %shifttype2i8 @shift2i8(%shifttype2i8 %a, %shifttype2i8 %b) { +entry: + ; SSE2: shift2i8 + ; SSE2: cost of 20 {{.*}} ashr + ; SSE2-CODEGEN: shift2i8 + ; SSE2-CODEGEN: sarq %cl + + %0 = ashr %shifttype2i8 %a , %b + ret %shifttype2i8 %0 +} + +%shifttype4i8 = type <4 x i8> +define %shifttype4i8 @shift4i8(%shifttype4i8 %a, %shifttype4i8 %b) { +entry: + ; SSE2: shift4i8 + ; SSE2: cost of 40 {{.*}} ashr + ; SSE2-CODEGEN: shift4i8 + ; SSE2-CODEGEN: sarl %cl + + %0 = ashr %shifttype4i8 %a , %b + ret %shifttype4i8 %0 +} + +%shifttype8i8 = type <8 x i8> +define %shifttype8i8 @shift8i8(%shifttype8i8 %a, %shifttype8i8 %b) { +entry: + ; SSE2: shift8i8 + ; SSE2: cost of 80 {{.*}} ashr + ; SSE2-CODEGEN: shift8i8 + ; SSE2-CODEGEN: sarw %cl + + %0 = ashr %shifttype8i8 %a , %b + ret %shifttype8i8 %0 +} + +%shifttype16i8 = type <16 x i8> +define %shifttype16i8 @shift16i8(%shifttype16i8 %a, %shifttype16i8 %b) { +entry: + ; SSE2: shift16i8 + ; SSE2: cost of 160 {{.*}} ashr + ; SSE2-CODEGEN: shift16i8 + ; SSE2-CODEGEN: sarb %cl + + %0 = ashr %shifttype16i8 %a , %b + ret %shifttype16i8 %0 +} + +%shifttype32i8 = type <32 x i8> +define %shifttype32i8 @shift32i8(%shifttype32i8 %a, %shifttype32i8 %b) { +entry: + ; SSE2: shift32i8 + ; SSE2: cost of 320 {{.*}} ashr + ; SSE2-CODEGEN: shift32i8 + ; SSE2-CODEGEN: sarb %cl + + %0 = ashr %shifttype32i8 %a , %b + ret %shifttype32i8 %0 +} + +; Test shift by a constant a value. + +%shifttypec = type <2 x i16> +define %shifttypec @shift2i16const(%shifttypec %a, %shifttypec %b) { +entry: + ; SSE2: shift2i16const + ; SSE2: cost of 20 {{.*}} ashr + ; SSE2-CODEGEN: shift2i16const + ; SSE2-CODEGEN: sarq $ + + %0 = ashr %shifttypec %a , <i16 3, i16 3> + ret %shifttypec %0 +} + +%shifttypec4i16 = type <4 x i16> +define %shifttypec4i16 @shift4i16const(%shifttypec4i16 %a, %shifttypec4i16 %b) { +entry: + ; SSE2: shift4i16const + ; SSE2: cost of 1 {{.*}} ashr + ; SSE2-CODEGEN: shift4i16const + ; SSE2-CODEGEN: psrad $3 + + %0 = ashr %shifttypec4i16 %a , <i16 3, i16 3, i16 3, i16 3> + ret %shifttypec4i16 %0 +} + +%shifttypec8i16 = type <8 x i16> +define %shifttypec8i16 @shift8i16const(%shifttypec8i16 %a, %shifttypec8i16 %b) { +entry: + ; SSE2: shift8i16const + ; SSE2: cost of 1 {{.*}} ashr + ; SSE2-CODEGEN: shift8i16const + ; SSE2-CODEGEN: psraw $3 + + %0 = ashr %shifttypec8i16 %a , <i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3> + ret %shifttypec8i16 %0 +} + +%shifttypec16i16 = type <16 x i16> +define %shifttypec16i16 @shift16i16const(%shifttypec16i16 %a, + %shifttypec16i16 %b) { +entry: + ; SSE2: shift16i16const + ; SSE2: cost of 2 {{.*}} ashr + ; SSE2-CODEGEN: shift16i16const + ; SSE2-CODEGEN: psraw $3 + + %0 = ashr %shifttypec16i16 %a , <i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3> + ret %shifttypec16i16 %0 +} + +%shifttypec32i16 = type <32 x i16> +define %shifttypec32i16 @shift32i16const(%shifttypec32i16 %a, + %shifttypec32i16 %b) { +entry: + ; SSE2: shift32i16const + ; SSE2: cost of 4 {{.*}} ashr + ; SSE2-CODEGEN: shift32i16const + ; SSE2-CODEGEN: psraw $3 + + %0 = ashr %shifttypec32i16 %a , <i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3> + ret %shifttypec32i16 %0 +} + +%shifttypec2i32 = type <2 x i32> +define %shifttypec2i32 @shift2i32c(%shifttypec2i32 %a, %shifttypec2i32 %b) { +entry: + ; SSE2: shift2i32c + ; SSE2: cost of 20 {{.*}} ashr + ; SSE2-CODEGEN: shift2i32c + ; SSE2-CODEGEN: sarq $3 + + %0 = ashr %shifttypec2i32 %a , <i32 3, i32 3> + ret %shifttypec2i32 %0 +} + +%shifttypec4i32 = type <4 x i32> +define %shifttypec4i32 @shift4i32c(%shifttypec4i32 %a, %shifttypec4i32 %b) { +entry: + ; SSE2: shift4i32c + ; SSE2: cost of 1 {{.*}} ashr + ; SSE2-CODEGEN: shift4i32c + ; SSE2-CODEGEN: psrad $3 + + %0 = ashr %shifttypec4i32 %a , <i32 3, i32 3, i32 3, i32 3> + ret %shifttypec4i32 %0 +} + +%shifttypec8i32 = type <8 x i32> +define %shifttypec8i32 @shift8i32c(%shifttypec8i32 %a, %shifttypec8i32 %b) { +entry: + ; SSE2: shift8i32c + ; SSE2: cost of 2 {{.*}} ashr + ; SSE2-CODEGEN: shift8i32c + ; SSE2-CODEGEN: psrad $3 + + %0 = ashr %shifttypec8i32 %a , <i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3> + ret %shifttypec8i32 %0 +} + +%shifttypec16i32 = type <16 x i32> +define %shifttypec16i32 @shift16i32c(%shifttypec16i32 %a, %shifttypec16i32 %b) { +entry: + ; SSE2: shift16i32c + ; SSE2: cost of 4 {{.*}} ashr + ; SSE2-CODEGEN: shift16i32c + ; SSE2-CODEGEN: psrad $3 + + %0 = ashr %shifttypec16i32 %a , <i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3> + ret %shifttypec16i32 %0 +} + +%shifttypec32i32 = type <32 x i32> +define %shifttypec32i32 @shift32i32c(%shifttypec32i32 %a, %shifttypec32i32 %b) { +entry: + ; SSE2: shift32i32c + ; getTypeConversion fails here and promotes this to a i64. + ; SSE2: cost of 8 {{.*}} ashr + ; SSE2-CODEGEN: shift32i32c + ; SSE2-CODEGEN: psrad $3 + %0 = ashr %shifttypec32i32 %a , <i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3> + ret %shifttypec32i32 %0 +} + +%shifttypec2i64 = type <2 x i64> +define %shifttypec2i64 @shift2i64c(%shifttypec2i64 %a, %shifttypec2i64 %b) { +entry: + ; SSE2: shift2i64c + ; SSE2: cost of 20 {{.*}} ashr + ; SSE2-CODEGEN: shift2i64c + ; SSE2-CODEGEN: sarq $3 + + %0 = ashr %shifttypec2i64 %a , <i64 3, i64 3> + ret %shifttypec2i64 %0 +} + +%shifttypec4i64 = type <4 x i64> +define %shifttypec4i64 @shift4i64c(%shifttypec4i64 %a, %shifttypec4i64 %b) { +entry: + ; SSE2: shift4i64c + ; SSE2: cost of 40 {{.*}} ashr + ; SSE2-CODEGEN: shift4i64c + ; SSE2-CODEGEN: sarq $3 + + %0 = ashr %shifttypec4i64 %a , <i64 3, i64 3, i64 3, i64 3> + ret %shifttypec4i64 %0 +} + +%shifttypec8i64 = type <8 x i64> +define %shifttypec8i64 @shift8i64c(%shifttypec8i64 %a, %shifttypec8i64 %b) { +entry: + ; SSE2: shift8i64c + ; SSE2: cost of 80 {{.*}} ashr + ; SSE2-CODEGEN: shift8i64c + ; SSE2-CODEGEN: sarq $3 + + %0 = ashr %shifttypec8i64 %a , <i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3> + ret %shifttypec8i64 %0 +} + +%shifttypec16i64 = type <16 x i64> +define %shifttypec16i64 @shift16i64c(%shifttypec16i64 %a, %shifttypec16i64 %b) { +entry: + ; SSE2: shift16i64c + ; SSE2: cost of 160 {{.*}} ashr + ; SSE2-CODEGEN: shift16i64c + ; SSE2-CODEGEN: sarq $3 + + %0 = ashr %shifttypec16i64 %a , <i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3> + ret %shifttypec16i64 %0 +} + +%shifttypec32i64 = type <32 x i64> +define %shifttypec32i64 @shift32i64c(%shifttypec32i64 %a, %shifttypec32i64 %b) { +entry: + ; SSE2: shift32i64c + ; SSE2: cost of 320 {{.*}} ashr + ; SSE2-CODEGEN: shift32i64c + ; SSE2-CODEGEN: sarq $3 + + %0 = ashr %shifttypec32i64 %a ,<i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3> + ret %shifttypec32i64 %0 +} + +%shifttypec2i8 = type <2 x i8> +define %shifttypec2i8 @shift2i8c(%shifttypec2i8 %a, %shifttypec2i8 %b) { +entry: + ; SSE2: shift2i8c + ; SSE2: cost of 20 {{.*}} ashr + ; SSE2-CODEGEN: shift2i8c + ; SSE2-CODEGEN: sarq $3 + + %0 = ashr %shifttypec2i8 %a , <i8 3, i8 3> + ret %shifttypec2i8 %0 +} + +%shifttypec4i8 = type <4 x i8> +define %shifttypec4i8 @shift4i8c(%shifttypec4i8 %a, %shifttypec4i8 %b) { +entry: + ; SSE2: shift4i8c + ; SSE2: cost of 1 {{.*}} ashr + ; SSE2-CODEGEN: shift4i8c + ; SSE2-CODEGEN: psrad $3 + + %0 = ashr %shifttypec4i8 %a , <i8 3, i8 3, i8 3, i8 3> + ret %shifttypec4i8 %0 +} + +%shifttypec8i8 = type <8 x i8> +define %shifttypec8i8 @shift8i8c(%shifttypec8i8 %a, %shifttypec8i8 %b) { +entry: + ; SSE2: shift8i8c + ; SSE2: cost of 1 {{.*}} ashr + ; SSE2-CODEGEN: shift8i8c + ; SSE2-CODEGEN: psraw $3 + + %0 = ashr %shifttypec8i8 %a , <i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3> + ret %shifttypec8i8 %0 +} + +%shifttypec16i8 = type <16 x i8> +define %shifttypec16i8 @shift16i8c(%shifttypec16i8 %a, %shifttypec16i8 %b) { +entry: + ; SSE2: shift16i8c + ; SSE2: cost of 4 {{.*}} ashr + ; SSE2-CODEGEN: shift16i8c + ; SSE2-CODEGEN: psrlw $3 + + %0 = ashr %shifttypec16i8 %a , <i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3> + ret %shifttypec16i8 %0 +} + +%shifttypec32i8 = type <32 x i8> +define %shifttypec32i8 @shift32i8c(%shifttypec32i8 %a, %shifttypec32i8 %b) { +entry: + ; SSE2: shift32i8c + ; SSE2: cost of 8 {{.*}} ashr + ; SSE2-CODEGEN: shift32i8c + ; SSE2-CODEGEN: psrlw $3 + + %0 = ashr %shifttypec32i8 %a , <i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3> + ret %shifttypec32i8 %0 +} + diff --git a/test/Analysis/CostModel/X86/testshiftlshr.ll b/test/Analysis/CostModel/X86/testshiftlshr.ll new file mode 100644 index 0000000..7bc8d89 --- /dev/null +++ b/test/Analysis/CostModel/X86/testshiftlshr.ll @@ -0,0 +1,529 @@ +; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=core2 < %s | FileCheck --check-prefix=SSE2-CODEGEN %s +; RUN: opt -mtriple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s + +%shifttype = type <2 x i16> +define %shifttype @shift2i16(%shifttype %a, %shifttype %b) { +entry: + ; SSE2: shift2i16 + ; SSE2: cost of 20 {{.*}} lshr + ; SSE2-CODEGEN: shift2i16 + ; SSE2-CODEGEN: shrq %cl + + %0 = lshr %shifttype %a , %b + ret %shifttype %0 +} + +%shifttype4i16 = type <4 x i16> +define %shifttype4i16 @shift4i16(%shifttype4i16 %a, %shifttype4i16 %b) { +entry: + ; SSE2: shift4i16 + ; SSE2: cost of 40 {{.*}} lshr + ; SSE2-CODEGEN: shift4i16 + ; SSE2-CODEGEN: shrl %cl + + %0 = lshr %shifttype4i16 %a , %b + ret %shifttype4i16 %0 +} + +%shifttype8i16 = type <8 x i16> +define %shifttype8i16 @shift8i16(%shifttype8i16 %a, %shifttype8i16 %b) { +entry: + ; SSE2: shift8i16 + ; SSE2: cost of 80 {{.*}} lshr + ; SSE2-CODEGEN: shift8i16 + ; SSE2-CODEGEN: shrl %cl + + %0 = lshr %shifttype8i16 %a , %b + ret %shifttype8i16 %0 +} + +%shifttype16i16 = type <16 x i16> +define %shifttype16i16 @shift16i16(%shifttype16i16 %a, %shifttype16i16 %b) { +entry: + ; SSE2: shift16i16 + ; SSE2: cost of 160 {{.*}} lshr + ; SSE2-CODEGEN: shift16i16 + ; SSE2-CODEGEN: shrl %cl + + %0 = lshr %shifttype16i16 %a , %b + ret %shifttype16i16 %0 +} + +%shifttype32i16 = type <32 x i16> +define %shifttype32i16 @shift32i16(%shifttype32i16 %a, %shifttype32i16 %b) { +entry: + ; SSE2: shift32i16 + ; SSE2: cost of 320 {{.*}} lshr + ; SSE2-CODEGEN: shift32i16 + ; SSE2-CODEGEN: shrl %cl + + %0 = lshr %shifttype32i16 %a , %b + ret %shifttype32i16 %0 +} + +%shifttype2i32 = type <2 x i32> +define %shifttype2i32 @shift2i32(%shifttype2i32 %a, %shifttype2i32 %b) { +entry: + ; SSE2: shift2i32 + ; SSE2: cost of 20 {{.*}} lshr + ; SSE2-CODEGEN: shift2i32 + ; SSE2-CODEGEN: shrq %cl + + %0 = lshr %shifttype2i32 %a , %b + ret %shifttype2i32 %0 +} + +%shifttype4i32 = type <4 x i32> +define %shifttype4i32 @shift4i32(%shifttype4i32 %a, %shifttype4i32 %b) { +entry: + ; SSE2: shift4i32 + ; SSE2: cost of 40 {{.*}} lshr + ; SSE2-CODEGEN: shift4i32 + ; SSE2-CODEGEN: shrl %cl + + %0 = lshr %shifttype4i32 %a , %b + ret %shifttype4i32 %0 +} + +%shifttype8i32 = type <8 x i32> +define %shifttype8i32 @shift8i32(%shifttype8i32 %a, %shifttype8i32 %b) { +entry: + ; SSE2: shift8i32 + ; SSE2: cost of 80 {{.*}} lshr + ; SSE2-CODEGEN: shift8i32 + ; SSE2-CODEGEN: shrl %cl + + %0 = lshr %shifttype8i32 %a , %b + ret %shifttype8i32 %0 +} + +%shifttype16i32 = type <16 x i32> +define %shifttype16i32 @shift16i32(%shifttype16i32 %a, %shifttype16i32 %b) { +entry: + ; SSE2: shift16i32 + ; SSE2: cost of 160 {{.*}} lshr + ; SSE2-CODEGEN: shift16i32 + ; SSE2-CODEGEN: shrl %cl + + %0 = lshr %shifttype16i32 %a , %b + ret %shifttype16i32 %0 +} + +%shifttype32i32 = type <32 x i32> +define %shifttype32i32 @shift32i32(%shifttype32i32 %a, %shifttype32i32 %b) { +entry: + ; SSE2: shift32i32 + ; SSE2: cost of 320 {{.*}} lshr + ; SSE2-CODEGEN: shift32i32 + ; SSE2-CODEGEN: shrl %cl + + %0 = lshr %shifttype32i32 %a , %b + ret %shifttype32i32 %0 +} + +%shifttype2i64 = type <2 x i64> +define %shifttype2i64 @shift2i64(%shifttype2i64 %a, %shifttype2i64 %b) { +entry: + ; SSE2: shift2i64 + ; SSE2: cost of 20 {{.*}} lshr + ; SSE2-CODEGEN: shift2i64 + ; SSE2-CODEGEN: shrq %cl + + %0 = lshr %shifttype2i64 %a , %b + ret %shifttype2i64 %0 +} + +%shifttype4i64 = type <4 x i64> +define %shifttype4i64 @shift4i64(%shifttype4i64 %a, %shifttype4i64 %b) { +entry: + ; SSE2: shift4i64 + ; SSE2: cost of 40 {{.*}} lshr + ; SSE2-CODEGEN: shift4i64 + ; SSE2-CODEGEN: shrq %cl + + %0 = lshr %shifttype4i64 %a , %b + ret %shifttype4i64 %0 +} + +%shifttype8i64 = type <8 x i64> +define %shifttype8i64 @shift8i64(%shifttype8i64 %a, %shifttype8i64 %b) { +entry: + ; SSE2: shift8i64 + ; SSE2: cost of 80 {{.*}} lshr + ; SSE2-CODEGEN: shift8i64 + ; SSE2-CODEGEN: shrq %cl + + %0 = lshr %shifttype8i64 %a , %b + ret %shifttype8i64 %0 +} + +%shifttype16i64 = type <16 x i64> +define %shifttype16i64 @shift16i64(%shifttype16i64 %a, %shifttype16i64 %b) { +entry: + ; SSE2: shift16i64 + ; SSE2: cost of 160 {{.*}} lshr + ; SSE2-CODEGEN: shift16i64 + ; SSE2-CODEGEN: shrq %cl + + %0 = lshr %shifttype16i64 %a , %b + ret %shifttype16i64 %0 +} + +%shifttype32i64 = type <32 x i64> +define %shifttype32i64 @shift32i64(%shifttype32i64 %a, %shifttype32i64 %b) { +entry: + ; SSE2: shift32i64 + ; SSE2: cost of 320 {{.*}} lshr + ; SSE2-CODEGEN: shift32i64 + ; SSE2-CODEGEN: shrq %cl + + %0 = lshr %shifttype32i64 %a , %b + ret %shifttype32i64 %0 +} + +%shifttype2i8 = type <2 x i8> +define %shifttype2i8 @shift2i8(%shifttype2i8 %a, %shifttype2i8 %b) { +entry: + ; SSE2: shift2i8 + ; SSE2: cost of 20 {{.*}} lshr + ; SSE2-CODEGEN: shift2i8 + ; SSE2-CODEGEN: shrq %cl + + %0 = lshr %shifttype2i8 %a , %b + ret %shifttype2i8 %0 +} + +%shifttype4i8 = type <4 x i8> +define %shifttype4i8 @shift4i8(%shifttype4i8 %a, %shifttype4i8 %b) { +entry: + ; SSE2: shift4i8 + ; SSE2: cost of 40 {{.*}} lshr + ; SSE2-CODEGEN: shift4i8 + ; SSE2-CODEGEN: shrl %cl + + %0 = lshr %shifttype4i8 %a , %b + ret %shifttype4i8 %0 +} + +%shifttype8i8 = type <8 x i8> +define %shifttype8i8 @shift8i8(%shifttype8i8 %a, %shifttype8i8 %b) { +entry: + ; SSE2: shift8i8 + ; SSE2: cost of 80 {{.*}} lshr + ; SSE2-CODEGEN: shift8i8 + ; SSE2-CODEGEN: shrl %cl + + %0 = lshr %shifttype8i8 %a , %b + ret %shifttype8i8 %0 +} + +%shifttype16i8 = type <16 x i8> +define %shifttype16i8 @shift16i8(%shifttype16i8 %a, %shifttype16i8 %b) { +entry: + ; SSE2: shift16i8 + ; SSE2: cost of 160 {{.*}} lshr + ; SSE2-CODEGEN: shift16i8 + ; SSE2-CODEGEN: shrb %cl + + %0 = lshr %shifttype16i8 %a , %b + ret %shifttype16i8 %0 +} + +%shifttype32i8 = type <32 x i8> +define %shifttype32i8 @shift32i8(%shifttype32i8 %a, %shifttype32i8 %b) { +entry: + ; SSE2: shift32i8 + ; SSE2: cost of 320 {{.*}} lshr + ; SSE2-CODEGEN: shift32i8 + ; SSE2-CODEGEN: shrb %cl + + %0 = lshr %shifttype32i8 %a , %b + ret %shifttype32i8 %0 +} + +; Test shift by a constant vector. + +%shifttypec = type <2 x i16> +define %shifttypec @shift2i16const(%shifttypec %a, %shifttypec %b) { +entry: + ; SSE2: shift2i16const + ; SSE2: cost of 1 {{.*}} lshr + ; SSE2-CODEGEN: shift2i16const + ; SSE2-CODEGEN: psrlq $3 + + %0 = lshr %shifttypec %a , <i16 3, i16 3> + ret %shifttypec %0 +} + +%shifttypec4i16 = type <4 x i16> +define %shifttypec4i16 @shift4i16const(%shifttypec4i16 %a, %shifttypec4i16 %b) { +entry: + ; SSE2: shift4i16const + ; SSE2: cost of 1 {{.*}} lshr + ; SSE2-CODEGEN: shift4i16const + ; SSE2-CODEGEN: psrld $3 + + %0 = lshr %shifttypec4i16 %a , <i16 3, i16 3, i16 3, i16 3> + ret %shifttypec4i16 %0 +} + +%shifttypec8i16 = type <8 x i16> +define %shifttypec8i16 @shift8i16const(%shifttypec8i16 %a, %shifttypec8i16 %b) { +entry: + ; SSE2: shift8i16const + ; SSE2: cost of 1 {{.*}} lshr + ; SSE2-CODEGEN: shift8i16const + ; SSE2-CODEGEN: psrlw $3 + + %0 = lshr %shifttypec8i16 %a , <i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3> + ret %shifttypec8i16 %0 +} + +%shifttypec16i16 = type <16 x i16> +define %shifttypec16i16 @shift16i16const(%shifttypec16i16 %a, + %shifttypec16i16 %b) { +entry: + ; SSE2: shift16i16const + ; SSE2: cost of 2 {{.*}} lshr + ; SSE2-CODEGEN: shift16i16const + ; SSE2-CODEGEN: psrlw $3 + + %0 = lshr %shifttypec16i16 %a , <i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3> + ret %shifttypec16i16 %0 +} + +%shifttypec32i16 = type <32 x i16> +define %shifttypec32i16 @shift32i16const(%shifttypec32i16 %a, + %shifttypec32i16 %b) { +entry: + ; SSE2: shift32i16const + ; SSE2: cost of 4 {{.*}} lshr + ; SSE2-CODEGEN: shift32i16const + ; SSE2-CODEGEN: psrlw $3 + + %0 = lshr %shifttypec32i16 %a , <i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3> + ret %shifttypec32i16 %0 +} + +%shifttypec2i32 = type <2 x i32> +define %shifttypec2i32 @shift2i32c(%shifttypec2i32 %a, %shifttypec2i32 %b) { +entry: + ; SSE2: shift2i32c + ; SSE2: cost of 1 {{.*}} lshr + ; SSE2-CODEGEN: shift2i32c + ; SSE2-CODEGEN: psrlq $3 + + %0 = lshr %shifttypec2i32 %a , <i32 3, i32 3> + ret %shifttypec2i32 %0 +} + +%shifttypec4i32 = type <4 x i32> +define %shifttypec4i32 @shift4i32c(%shifttypec4i32 %a, %shifttypec4i32 %b) { +entry: + ; SSE2: shift4i32c + ; SSE2: cost of 1 {{.*}} lshr + ; SSE2-CODEGEN: shift4i32c + ; SSE2-CODEGEN: psrld $3 + + %0 = lshr %shifttypec4i32 %a , <i32 3, i32 3, i32 3, i32 3> + ret %shifttypec4i32 %0 +} + +%shifttypec8i32 = type <8 x i32> +define %shifttypec8i32 @shift8i32c(%shifttypec8i32 %a, %shifttypec8i32 %b) { +entry: + ; SSE2: shift8i32c + ; SSE2: cost of 2 {{.*}} lshr + ; SSE2-CODEGEN: shift8i32c + ; SSE2-CODEGEN: psrld $3 + + %0 = lshr %shifttypec8i32 %a , <i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3> + ret %shifttypec8i32 %0 +} + +%shifttypec16i32 = type <16 x i32> +define %shifttypec16i32 @shift16i32c(%shifttypec16i32 %a, %shifttypec16i32 %b) { +entry: + ; SSE2: shift16i32c + ; SSE2: cost of 4 {{.*}} lshr + ; SSE2-CODEGEN: shift16i32c + ; SSE2-CODEGEN: psrld $3 + + %0 = lshr %shifttypec16i32 %a , <i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3> + ret %shifttypec16i32 %0 +} + +%shifttypec32i32 = type <32 x i32> +define %shifttypec32i32 @shift32i32c(%shifttypec32i32 %a, %shifttypec32i32 %b) { +entry: + ; SSE2: shift32i32c + ; SSE2: cost of 8 {{.*}} lshr + ; SSE2-CODEGEN: shift32i32c + ; SSE2-CODEGEN: psrld $3 + %0 = lshr %shifttypec32i32 %a , <i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3> + ret %shifttypec32i32 %0 +} + +%shifttypec2i64 = type <2 x i64> +define %shifttypec2i64 @shift2i64c(%shifttypec2i64 %a, %shifttypec2i64 %b) { +entry: + ; SSE2: shift2i64c + ; SSE2: cost of 1 {{.*}} lshr + ; SSE2-CODEGEN: shift2i64c + ; SSE2-CODEGEN: psrlq $3 + + %0 = lshr %shifttypec2i64 %a , <i64 3, i64 3> + ret %shifttypec2i64 %0 +} + +%shifttypec4i64 = type <4 x i64> +define %shifttypec4i64 @shift4i64c(%shifttypec4i64 %a, %shifttypec4i64 %b) { +entry: + ; SSE2: shift4i64c + ; SSE2: cost of 2 {{.*}} lshr + ; SSE2-CODEGEN: shift4i64c + ; SSE2-CODEGEN: psrlq $3 + + %0 = lshr %shifttypec4i64 %a , <i64 3, i64 3, i64 3, i64 3> + ret %shifttypec4i64 %0 +} + +%shifttypec8i64 = type <8 x i64> +define %shifttypec8i64 @shift8i64c(%shifttypec8i64 %a, %shifttypec8i64 %b) { +entry: + ; SSE2: shift8i64c + ; SSE2: cost of 4 {{.*}} lshr + ; SSE2-CODEGEN: shift8i64c + ; SSE2-CODEGEN: psrlq $3 + + %0 = lshr %shifttypec8i64 %a , <i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3> + ret %shifttypec8i64 %0 +} + +%shifttypec16i64 = type <16 x i64> +define %shifttypec16i64 @shift16i64c(%shifttypec16i64 %a, %shifttypec16i64 %b) { +entry: + ; SSE2: shift16i64c + ; SSE2: cost of 8 {{.*}} lshr + ; SSE2-CODEGEN: shift16i64c + ; SSE2-CODEGEN: psrlq $3 + + %0 = lshr %shifttypec16i64 %a , <i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3> + ret %shifttypec16i64 %0 +} + +%shifttypec32i64 = type <32 x i64> +define %shifttypec32i64 @shift32i64c(%shifttypec32i64 %a, %shifttypec32i64 %b) { +entry: + ; SSE2: shift32i64c + ; SSE2: cost of 16 {{.*}} lshr + ; SSE2-CODEGEN: shift32i64c + ; SSE2-CODEGEN: psrlq $3 + + %0 = lshr %shifttypec32i64 %a ,<i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3> + ret %shifttypec32i64 %0 +} + +%shifttypec2i8 = type <2 x i8> +define %shifttypec2i8 @shift2i8c(%shifttypec2i8 %a, %shifttypec2i8 %b) { +entry: + ; SSE2: shift2i8c + ; SSE2: cost of 1 {{.*}} lshr + ; SSE2-CODEGEN: shift2i8c + ; SSE2-CODEGEN: psrlq $3 + + %0 = lshr %shifttypec2i8 %a , <i8 3, i8 3> + ret %shifttypec2i8 %0 +} + +%shifttypec4i8 = type <4 x i8> +define %shifttypec4i8 @shift4i8c(%shifttypec4i8 %a, %shifttypec4i8 %b) { +entry: + ; SSE2: shift4i8c + ; SSE2: cost of 1 {{.*}} lshr + ; SSE2-CODEGEN: shift4i8c + ; SSE2-CODEGEN: psrld $3 + + %0 = lshr %shifttypec4i8 %a , <i8 3, i8 3, i8 3, i8 3> + ret %shifttypec4i8 %0 +} + +%shifttypec8i8 = type <8 x i8> +define %shifttypec8i8 @shift8i8c(%shifttypec8i8 %a, %shifttypec8i8 %b) { +entry: + ; SSE2: shift8i8c + ; SSE2: cost of 1 {{.*}} lshr + ; SSE2-CODEGEN: shift8i8c + ; SSE2-CODEGEN: psrlw $3 + + %0 = lshr %shifttypec8i8 %a , <i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3> + ret %shifttypec8i8 %0 +} + +%shifttypec16i8 = type <16 x i8> +define %shifttypec16i8 @shift16i8c(%shifttypec16i8 %a, %shifttypec16i8 %b) { +entry: + ; SSE2: shift16i8c + ; SSE2: cost of 1 {{.*}} lshr + ; SSE2-CODEGEN: shift16i8c + ; SSE2-CODEGEN: psrlw $3 + + %0 = lshr %shifttypec16i8 %a , <i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3> + ret %shifttypec16i8 %0 +} + +%shifttypec32i8 = type <32 x i8> +define %shifttypec32i8 @shift32i8c(%shifttypec32i8 %a, %shifttypec32i8 %b) { +entry: + ; SSE2: shift32i8c + ; SSE2: cost of 2 {{.*}} lshr + ; SSE2-CODEGEN: shift32i8c + ; SSE2-CODEGEN: psrlw $3 + + %0 = lshr %shifttypec32i8 %a , <i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3> + ret %shifttypec32i8 %0 +} diff --git a/test/Analysis/CostModel/X86/testshiftshl.ll b/test/Analysis/CostModel/X86/testshiftshl.ll new file mode 100644 index 0000000..40effd0 --- /dev/null +++ b/test/Analysis/CostModel/X86/testshiftshl.ll @@ -0,0 +1,529 @@ +; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=core2 < %s | FileCheck --check-prefix=SSE2-CODEGEN %s +; RUN: opt -mtriple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s + +%shifttype = type <2 x i16> +define %shifttype @shift2i16(%shifttype %a, %shifttype %b) { +entry: + ; SSE2: shift2i16 + ; SSE2: cost of 20 {{.*}} shl + ; SSE2-CODEGEN: shift2i16 + ; SSE2-CODEGEN: shlq %cl + + %0 = shl %shifttype %a , %b + ret %shifttype %0 +} + +%shifttype4i16 = type <4 x i16> +define %shifttype4i16 @shift4i16(%shifttype4i16 %a, %shifttype4i16 %b) { +entry: + ; SSE2: shift4i16 + ; SSE2: cost of 10 {{.*}} shl + ; SSE2-CODEGEN: shift4i16 + ; SSE2-CODEGEN: pmuludq + + %0 = shl %shifttype4i16 %a , %b + ret %shifttype4i16 %0 +} + +%shifttype8i16 = type <8 x i16> +define %shifttype8i16 @shift8i16(%shifttype8i16 %a, %shifttype8i16 %b) { +entry: + ; SSE2: shift8i16 + ; SSE2: cost of 80 {{.*}} shl + ; SSE2-CODEGEN: shift8i16 + ; SSE2-CODEGEN: shll %cl + + %0 = shl %shifttype8i16 %a , %b + ret %shifttype8i16 %0 +} + +%shifttype16i16 = type <16 x i16> +define %shifttype16i16 @shift16i16(%shifttype16i16 %a, %shifttype16i16 %b) { +entry: + ; SSE2: shift16i16 + ; SSE2: cost of 160 {{.*}} shl + ; SSE2-CODEGEN: shift16i16 + ; SSE2-CODEGEN: shll %cl + + %0 = shl %shifttype16i16 %a , %b + ret %shifttype16i16 %0 +} + +%shifttype32i16 = type <32 x i16> +define %shifttype32i16 @shift32i16(%shifttype32i16 %a, %shifttype32i16 %b) { +entry: + ; SSE2: shift32i16 + ; SSE2: cost of 320 {{.*}} shl + ; SSE2-CODEGEN: shift32i16 + ; SSE2-CODEGEN: shll %cl + + %0 = shl %shifttype32i16 %a , %b + ret %shifttype32i16 %0 +} + +%shifttype2i32 = type <2 x i32> +define %shifttype2i32 @shift2i32(%shifttype2i32 %a, %shifttype2i32 %b) { +entry: + ; SSE2: shift2i32 + ; SSE2: cost of 20 {{.*}} shl + ; SSE2-CODEGEN: shift2i32 + ; SSE2-CODEGEN: shlq %cl + + %0 = shl %shifttype2i32 %a , %b + ret %shifttype2i32 %0 +} + +%shifttype4i32 = type <4 x i32> +define %shifttype4i32 @shift4i32(%shifttype4i32 %a, %shifttype4i32 %b) { +entry: + ; SSE2: shift4i32 + ; SSE2: cost of 10 {{.*}} shl + ; SSE2-CODEGEN: shift4i32 + ; SSE2-CODEGEN: pmuludq + + %0 = shl %shifttype4i32 %a , %b + ret %shifttype4i32 %0 +} + +%shifttype8i32 = type <8 x i32> +define %shifttype8i32 @shift8i32(%shifttype8i32 %a, %shifttype8i32 %b) { +entry: + ; SSE2: shift8i32 + ; SSE2: cost of 20 {{.*}} shl + ; SSE2-CODEGEN: shift8i32 + ; SSE2-CODEGEN: pmuludq + + %0 = shl %shifttype8i32 %a , %b + ret %shifttype8i32 %0 +} + +%shifttype16i32 = type <16 x i32> +define %shifttype16i32 @shift16i32(%shifttype16i32 %a, %shifttype16i32 %b) { +entry: + ; SSE2: shift16i32 + ; SSE2: cost of 40 {{.*}} shl + ; SSE2-CODEGEN: shift16i32 + ; SSE2-CODEGEN: pmuludq + + %0 = shl %shifttype16i32 %a , %b + ret %shifttype16i32 %0 +} + +%shifttype32i32 = type <32 x i32> +define %shifttype32i32 @shift32i32(%shifttype32i32 %a, %shifttype32i32 %b) { +entry: + ; SSE2: shift32i32 + ; SSE2: cost of 80 {{.*}} shl + ; SSE2-CODEGEN: shift32i32 + ; SSE2-CODEGEN: pmuludq + + %0 = shl %shifttype32i32 %a , %b + ret %shifttype32i32 %0 +} + +%shifttype2i64 = type <2 x i64> +define %shifttype2i64 @shift2i64(%shifttype2i64 %a, %shifttype2i64 %b) { +entry: + ; SSE2: shift2i64 + ; SSE2: cost of 20 {{.*}} shl + ; SSE2-CODEGEN: shift2i64 + ; SSE2-CODEGEN: shlq %cl + + %0 = shl %shifttype2i64 %a , %b + ret %shifttype2i64 %0 +} + +%shifttype4i64 = type <4 x i64> +define %shifttype4i64 @shift4i64(%shifttype4i64 %a, %shifttype4i64 %b) { +entry: + ; SSE2: shift4i64 + ; SSE2: cost of 40 {{.*}} shl + ; SSE2-CODEGEN: shift4i64 + ; SSE2-CODEGEN: shlq %cl + + %0 = shl %shifttype4i64 %a , %b + ret %shifttype4i64 %0 +} + +%shifttype8i64 = type <8 x i64> +define %shifttype8i64 @shift8i64(%shifttype8i64 %a, %shifttype8i64 %b) { +entry: + ; SSE2: shift8i64 + ; SSE2: cost of 80 {{.*}} shl + ; SSE2-CODEGEN: shift8i64 + ; SSE2-CODEGEN: shlq %cl + + %0 = shl %shifttype8i64 %a , %b + ret %shifttype8i64 %0 +} + +%shifttype16i64 = type <16 x i64> +define %shifttype16i64 @shift16i64(%shifttype16i64 %a, %shifttype16i64 %b) { +entry: + ; SSE2: shift16i64 + ; SSE2: cost of 160 {{.*}} shl + ; SSE2-CODEGEN: shift16i64 + ; SSE2-CODEGEN: shlq %cl + + %0 = shl %shifttype16i64 %a , %b + ret %shifttype16i64 %0 +} + +%shifttype32i64 = type <32 x i64> +define %shifttype32i64 @shift32i64(%shifttype32i64 %a, %shifttype32i64 %b) { +entry: + ; SSE2: shift32i64 + ; SSE2: cost of 320 {{.*}} shl + ; SSE2-CODEGEN: shift32i64 + ; SSE2-CODEGEN: shlq %cl + + %0 = shl %shifttype32i64 %a , %b + ret %shifttype32i64 %0 +} + +%shifttype2i8 = type <2 x i8> +define %shifttype2i8 @shift2i8(%shifttype2i8 %a, %shifttype2i8 %b) { +entry: + ; SSE2: shift2i8 + ; SSE2: cost of 20 {{.*}} shl + ; SSE2-CODEGEN: shift2i8 + ; SSE2-CODEGEN: shlq %cl + + %0 = shl %shifttype2i8 %a , %b + ret %shifttype2i8 %0 +} + +%shifttype4i8 = type <4 x i8> +define %shifttype4i8 @shift4i8(%shifttype4i8 %a, %shifttype4i8 %b) { +entry: + ; SSE2: shift4i8 + ; SSE2: cost of 10 {{.*}} shl + ; SSE2-CODEGEN: shift4i8 + ; SSE2-CODEGEN: pmuludq + + %0 = shl %shifttype4i8 %a , %b + ret %shifttype4i8 %0 +} + +%shifttype8i8 = type <8 x i8> +define %shifttype8i8 @shift8i8(%shifttype8i8 %a, %shifttype8i8 %b) { +entry: + ; SSE2: shift8i8 + ; SSE2: cost of 80 {{.*}} shl + ; SSE2-CODEGEN: shift8i8 + ; SSE2-CODEGEN: shll + + %0 = shl %shifttype8i8 %a , %b + ret %shifttype8i8 %0 +} + +%shifttype16i8 = type <16 x i8> +define %shifttype16i8 @shift16i8(%shifttype16i8 %a, %shifttype16i8 %b) { +entry: + ; SSE2: shift16i8 + ; SSE2: cost of 30 {{.*}} shl + ; SSE2-CODEGEN: shift16i8 + ; SSE2-CODEGEN: cmpeqb + + %0 = shl %shifttype16i8 %a , %b + ret %shifttype16i8 %0 +} + +%shifttype32i8 = type <32 x i8> +define %shifttype32i8 @shift32i8(%shifttype32i8 %a, %shifttype32i8 %b) { +entry: + ; SSE2: shift32i8 + ; SSE2: cost of 60 {{.*}} shl + ; SSE2-CODEGEN: shift32i8 + ; SSE2-CODEGEN: cmpeqb + + %0 = shl %shifttype32i8 %a , %b + ret %shifttype32i8 %0 +} + +; Test shift by a constant vector. + +%shifttypec = type <2 x i16> +define %shifttypec @shift2i16const(%shifttypec %a, %shifttypec %b) { +entry: + ; SSE2: shift2i16const + ; SSE2: cost of 1 {{.*}} shl + ; SSE2-CODEGEN: shift2i16const + ; SSE2-CODEGEN: psllq $3 + + %0 = shl %shifttypec %a , <i16 3, i16 3> + ret %shifttypec %0 +} + +%shifttypec4i16 = type <4 x i16> +define %shifttypec4i16 @shift4i16const(%shifttypec4i16 %a, %shifttypec4i16 %b) { +entry: + ; SSE2: shift4i16const + ; SSE2: cost of 1 {{.*}} shl + ; SSE2-CODEGEN: shift4i16const + ; SSE2-CODEGEN: pslld $3 + + %0 = shl %shifttypec4i16 %a , <i16 3, i16 3, i16 3, i16 3> + ret %shifttypec4i16 %0 +} + +%shifttypec8i16 = type <8 x i16> +define %shifttypec8i16 @shift8i16const(%shifttypec8i16 %a, %shifttypec8i16 %b) { +entry: + ; SSE2: shift8i16const + ; SSE2: cost of 1 {{.*}} shl + ; SSE2-CODEGEN: shift8i16const + ; SSE2-CODEGEN: psllw $3 + + %0 = shl %shifttypec8i16 %a , <i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3> + ret %shifttypec8i16 %0 +} + +%shifttypec16i16 = type <16 x i16> +define %shifttypec16i16 @shift16i16const(%shifttypec16i16 %a, + %shifttypec16i16 %b) { +entry: + ; SSE2: shift16i16const + ; SSE2: cost of 2 {{.*}} shl + ; SSE2-CODEGEN: shift16i16const + ; SSE2-CODEGEN: psllw $3 + + %0 = shl %shifttypec16i16 %a , <i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3> + ret %shifttypec16i16 %0 +} + +%shifttypec32i16 = type <32 x i16> +define %shifttypec32i16 @shift32i16const(%shifttypec32i16 %a, + %shifttypec32i16 %b) { +entry: + ; SSE2: shift32i16const + ; SSE2: cost of 4 {{.*}} shl + ; SSE2-CODEGEN: shift32i16const + ; SSE2-CODEGEN: psllw $3 + + %0 = shl %shifttypec32i16 %a , <i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3, + i16 3, i16 3, i16 3, i16 3> + ret %shifttypec32i16 %0 +} + +%shifttypec2i32 = type <2 x i32> +define %shifttypec2i32 @shift2i32c(%shifttypec2i32 %a, %shifttypec2i32 %b) { +entry: + ; SSE2: shift2i32c + ; SSE2: cost of 1 {{.*}} shl + ; SSE2-CODEGEN: shift2i32c + ; SSE2-CODEGEN: psllq $3 + + %0 = shl %shifttypec2i32 %a , <i32 3, i32 3> + ret %shifttypec2i32 %0 +} + +%shifttypec4i32 = type <4 x i32> +define %shifttypec4i32 @shift4i32c(%shifttypec4i32 %a, %shifttypec4i32 %b) { +entry: + ; SSE2: shift4i32c + ; SSE2: cost of 1 {{.*}} shl + ; SSE2-CODEGEN: shift4i32c + ; SSE2-CODEGEN: pslld $3 + + %0 = shl %shifttypec4i32 %a , <i32 3, i32 3, i32 3, i32 3> + ret %shifttypec4i32 %0 +} + +%shifttypec8i32 = type <8 x i32> +define %shifttypec8i32 @shift8i32c(%shifttypec8i32 %a, %shifttypec8i32 %b) { +entry: + ; SSE2: shift8i32c + ; SSE2: cost of 2 {{.*}} shl + ; SSE2-CODEGEN: shift8i32c + ; SSE2-CODEGEN: pslld $3 + + %0 = shl %shifttypec8i32 %a , <i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3> + ret %shifttypec8i32 %0 +} + +%shifttypec16i32 = type <16 x i32> +define %shifttypec16i32 @shift16i32c(%shifttypec16i32 %a, %shifttypec16i32 %b) { +entry: + ; SSE2: shift16i32c + ; SSE2: cost of 4 {{.*}} shl + ; SSE2-CODEGEN: shift16i32c + ; SSE2-CODEGEN: pslld $3 + + %0 = shl %shifttypec16i32 %a , <i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3> + ret %shifttypec16i32 %0 +} + +%shifttypec32i32 = type <32 x i32> +define %shifttypec32i32 @shift32i32c(%shifttypec32i32 %a, %shifttypec32i32 %b) { +entry: + ; SSE2: shift32i32c + ; SSE2: cost of 8 {{.*}} shl + ; SSE2-CODEGEN: shift32i32c + ; SSE2-CODEGEN: pslld $3 + %0 = shl %shifttypec32i32 %a , <i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3, + i32 3, i32 3, i32 3, i32 3> + ret %shifttypec32i32 %0 +} + +%shifttypec2i64 = type <2 x i64> +define %shifttypec2i64 @shift2i64c(%shifttypec2i64 %a, %shifttypec2i64 %b) { +entry: + ; SSE2: shift2i64c + ; SSE2: cost of 1 {{.*}} shl + ; SSE2-CODEGEN: shift2i64c + ; SSE2-CODEGEN: psllq $3 + + %0 = shl %shifttypec2i64 %a , <i64 3, i64 3> + ret %shifttypec2i64 %0 +} + +%shifttypec4i64 = type <4 x i64> +define %shifttypec4i64 @shift4i64c(%shifttypec4i64 %a, %shifttypec4i64 %b) { +entry: + ; SSE2: shift4i64c + ; SSE2: cost of 2 {{.*}} shl + ; SSE2-CODEGEN: shift4i64c + ; SSE2-CODEGEN: psllq $3 + + %0 = shl %shifttypec4i64 %a , <i64 3, i64 3, i64 3, i64 3> + ret %shifttypec4i64 %0 +} + +%shifttypec8i64 = type <8 x i64> +define %shifttypec8i64 @shift8i64c(%shifttypec8i64 %a, %shifttypec8i64 %b) { +entry: + ; SSE2: shift8i64c + ; SSE2: cost of 4 {{.*}} shl + ; SSE2-CODEGEN: shift8i64c + ; SSE2-CODEGEN: psllq $3 + + %0 = shl %shifttypec8i64 %a , <i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3> + ret %shifttypec8i64 %0 +} + +%shifttypec16i64 = type <16 x i64> +define %shifttypec16i64 @shift16i64c(%shifttypec16i64 %a, %shifttypec16i64 %b) { +entry: + ; SSE2: shift16i64c + ; SSE2: cost of 8 {{.*}} shl + ; SSE2-CODEGEN: shift16i64c + ; SSE2-CODEGEN: psllq $3 + + %0 = shl %shifttypec16i64 %a , <i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3> + ret %shifttypec16i64 %0 +} + +%shifttypec32i64 = type <32 x i64> +define %shifttypec32i64 @shift32i64c(%shifttypec32i64 %a, %shifttypec32i64 %b) { +entry: + ; SSE2: shift32i64c + ; SSE2: cost of 16 {{.*}} shl + ; SSE2-CODEGEN: shift32i64c + ; SSE2-CODEGEN: psllq $3 + + %0 = shl %shifttypec32i64 %a ,<i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3, + i64 3, i64 3, i64 3, i64 3> + ret %shifttypec32i64 %0 +} + +%shifttypec2i8 = type <2 x i8> +define %shifttypec2i8 @shift2i8c(%shifttypec2i8 %a, %shifttypec2i8 %b) { +entry: + ; SSE2: shift2i8c + ; SSE2: cost of 1 {{.*}} shl + ; SSE2-CODEGEN: shift2i8c + ; SSE2-CODEGEN: psllq $3 + + %0 = shl %shifttypec2i8 %a , <i8 3, i8 3> + ret %shifttypec2i8 %0 +} + +%shifttypec4i8 = type <4 x i8> +define %shifttypec4i8 @shift4i8c(%shifttypec4i8 %a, %shifttypec4i8 %b) { +entry: + ; SSE2: shift4i8c + ; SSE2: cost of 1 {{.*}} shl + ; SSE2-CODEGEN: shift4i8c + ; SSE2-CODEGEN: pslld $3 + + %0 = shl %shifttypec4i8 %a , <i8 3, i8 3, i8 3, i8 3> + ret %shifttypec4i8 %0 +} + +%shifttypec8i8 = type <8 x i8> +define %shifttypec8i8 @shift8i8c(%shifttypec8i8 %a, %shifttypec8i8 %b) { +entry: + ; SSE2: shift8i8c + ; SSE2: cost of 1 {{.*}} shl + ; SSE2-CODEGEN: shift8i8c + ; SSE2-CODEGEN: psllw $3 + + %0 = shl %shifttypec8i8 %a , <i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3> + ret %shifttypec8i8 %0 +} + +%shifttypec16i8 = type <16 x i8> +define %shifttypec16i8 @shift16i8c(%shifttypec16i8 %a, %shifttypec16i8 %b) { +entry: + ; SSE2: shift16i8c + ; SSE2: cost of 1 {{.*}} shl + ; SSE2-CODEGEN: shift16i8c + ; SSE2-CODEGEN: psllw $3 + + %0 = shl %shifttypec16i8 %a , <i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3> + ret %shifttypec16i8 %0 +} + +%shifttypec32i8 = type <32 x i8> +define %shifttypec32i8 @shift32i8c(%shifttypec32i8 %a, %shifttypec32i8 %b) { +entry: + ; SSE2: shift32i8c + ; SSE2: cost of 2 {{.*}} shl + ; SSE2-CODEGEN: shift32i8c + ; SSE2-CODEGEN: psllw $3 + + %0 = shl %shifttypec32i8 %a , <i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3, + i8 3, i8 3, i8 3, i8 3> + ret %shifttypec32i8 %0 +} diff --git a/test/Analysis/CostModel/X86/uitofp.ll b/test/Analysis/CostModel/X86/uitofp.ll new file mode 100644 index 0000000..a41a04d --- /dev/null +++ b/test/Analysis/CostModel/X86/uitofp.ll @@ -0,0 +1,368 @@ +; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=core2 < %s | FileCheck --check-prefix=SSE2-CODEGEN %s +; RUN: opt -mtriple=x86_64-apple-darwin -mcpu=core2 -cost-model -analyze < %s | FileCheck --check-prefix=SSE2 %s + +; In X86TargetTransformInfo::getCastInstrCost we have code that depends on +; getSimpleVT on a value type. On AVX2 we execute this code. Make sure we exit +; early if the type is not a simple value type before we call this function. +; RUN: opt -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -cost-model -analyze < %s + +define <2 x double> @uitofpv2i8v2double(<2 x i8> %a) { + ; SSE2: uitofpv2i8v2double + ; SSE2: cost of 20 {{.*}} uitofp + ; SSE2-CODEGEN: uitofpv2i8v2double + ; SSE2-CODEGEN: movapd LCPI + ; SSE2-CODEGEN: subpd + ; SSE2-CODEGEN: addpd + %1 = uitofp <2 x i8> %a to <2 x double> + ret <2 x double> %1 +} + +define <4 x double> @uitofpv4i8v4double(<4 x i8> %a) { + ; SSE2: uitofpv4i8v4double + ; SSE2: cost of 40 {{.*}} uitofp + ; SSE2-CODEGEN: uitofpv4i8v4double + ; SSE2-CODEGEN: movapd LCPI + ; SSE2-CODEGEN: subpd + ; SSE2-CODEGEN: addpd + %1 = uitofp <4 x i8> %a to <4 x double> + ret <4 x double> %1 +} + +define <8 x double> @uitofpv8i8v8double(<8 x i8> %a) { + ; SSE2: uitofpv8i8v8double + ; SSE2: cost of 80 {{.*}} uitofp + ; SSE2-CODEGEN: uitofpv8i8v8double + ; SSE2-CODEGEN: movapd LCPI + ; SSE2-CODEGEN: subpd + ; SSE2-CODEGEN: addpd +%1 = uitofp <8 x i8> %a to <8 x double> + ret <8 x double> %1 +} + +define <16 x double> @uitofpv16i8v16double(<16 x i8> %a) { + ; SSE2: uitofpv16i8v16double + ; SSE2: cost of 160 {{.*}} uitofp + ; SSE2-CODEGEN: uitofpv16i8v16double + ; SSE2-CODEGEN: movapd LCPI + ; SSE2-CODEGEN: subpd + ; SSE2-CODEGEN: addpd + %1 = uitofp <16 x i8> %a to <16 x double> + ret <16 x double> %1 +} + +define <32 x double> @uitofpv32i8v32double(<32 x i8> %a) { + ; SSE2: uitofpv32i8v32double + ; SSE2: cost of 320 {{.*}} uitofp + ; SSE2-CODEGEN: uitofpv32i8v32double + ; SSE2-CODEGEN: movapd LCPI + ; SSE2-CODEGEN: subpd + ; SSE2-CODEGEN: addpd + %1 = uitofp <32 x i8> %a to <32 x double> + ret <32 x double> %1 +} + +define <2 x double> @uitofpv2i16v2double(<2 x i16> %a) { + ; SSE2: uitofpv2i16v2double + ; SSE2: cost of 20 {{.*}} uitofp + ; SSE2-CODEGEN: uitofpv2i16v2double + ; SSE2-CODEGEN: movapd LCPI + ; SSE2-CODEGEN: subpd + ; SSE2-CODEGEN: addpd + %1 = uitofp <2 x i16> %a to <2 x double> + ret <2 x double> %1 +} + +define <4 x double> @uitofpv4i16v4double(<4 x i16> %a) { + ; SSE2: uitofpv4i16v4double + ; SSE2: cost of 40 {{.*}} uitofp + ; SSE2-CODEGEN: uitofpv4i16v4double + ; SSE2-CODEGEN: movapd LCPI + ; SSE2-CODEGEN: subpd + ; SSE2-CODEGEN: addpd + %1 = uitofp <4 x i16> %a to <4 x double> + ret <4 x double> %1 +} + +define <8 x double> @uitofpv8i16v8double(<8 x i16> %a) { + ; SSE2: uitofpv8i16v8double + ; SSE2: cost of 80 {{.*}} uitofp + ; SSE2-CODEGEN: uitofpv8i16v8double + ; SSE2-CODEGEN: movapd LCPI + ; SSE2-CODEGEN: subpd + ; SSE2-CODEGEN: addpd + %1 = uitofp <8 x i16> %a to <8 x double> + ret <8 x double> %1 +} + +define <16 x double> @uitofpv16i16v16double(<16 x i16> %a) { + ; SSE2: uitofpv16i16v16double + ; SSE2: cost of 160 {{.*}} uitofp + ; SSE2-CODEGEN: uitofpv16i16v16double + ; SSE2-CODEGEN: movapd LCPI + ; SSE2-CODEGEN: subpd + ; SSE2-CODEGEN: addpd + %1 = uitofp <16 x i16> %a to <16 x double> + ret <16 x double> %1 +} + +define <32 x double> @uitofpv32i16v32double(<32 x i16> %a) { + ; SSE2: uitofpv32i16v32double + ; SSE2: cost of 320 {{.*}} uitofp + ; SSE2-CODEGEN: uitofpv32i16v32double + ; SSE2-CODEGEN: movapd LCPI + ; SSE2-CODEGEN: subpd + ; SSE2-CODEGEN: addpd + %1 = uitofp <32 x i16> %a to <32 x double> + ret <32 x double> %1 +} + +define <2 x double> @uitofpv2i32v2double(<2 x i32> %a) { + ; SSE2: uitofpv2i32v2double + ; SSE2: cost of 20 {{.*}} uitofp + ; SSE2-CODEGEN: uitofpv2i32v2double + ; SSE2-CODEGEN: movapd LCPI + ; SSE2-CODEGEN: subpd + ; SSE2-CODEGEN: addpd + %1 = uitofp <2 x i32> %a to <2 x double> + ret <2 x double> %1 +} + +define <4 x double> @uitofpv4i32v4double(<4 x i32> %a) { + ; SSE2: uitofpv4i32v4double + ; SSE2: cost of 40 {{.*}} uitofp + ; SSE2-CODEGEN: uitofpv4i32v4double + ; SSE2-CODEGEN: movapd LCPI + ; SSE2-CODEGEN: subpd + ; SSE2-CODEGEN: addpd + %1 = uitofp <4 x i32> %a to <4 x double> + ret <4 x double> %1 +} + +define <8 x double> @uitofpv8i32v8double(<8 x i32> %a) { + ; SSE2: uitofpv8i32v8double + ; SSE2: cost of 80 {{.*}} uitofp + ; SSE2-CODEGEN: uitofpv8i32v8double + ; SSE2-CODEGEN: movapd LCPI + ; SSE2-CODEGEN: subpd + ; SSE2-CODEGEN: addpd + %1 = uitofp <8 x i32> %a to <8 x double> + ret <8 x double> %1 +} + +define <16 x double> @uitofpv16i32v16double(<16 x i32> %a) { + ; SSE2: uitofpv16i32v16double + ; SSE2: cost of 160 {{.*}} uitofp + ; SSE2-CODEGEN: uitofpv16i32v16double + ; SSE2-CODEGEN: movapd LCPI + ; SSE2-CODEGEN: subpd + ; SSE2-CODEGEN: addpd + %1 = uitofp <16 x i32> %a to <16 x double> + ret <16 x double> %1 +} + +define <32 x double> @uitofpv32i32v32double(<32 x i32> %a) { + ; SSE2: uitofpv32i32v32double + ; SSE2: cost of 320 {{.*}} uitofp + ; SSE2-CODEGEN: uitofpv32i32v32double + ; SSE2-CODEGEN: movapd LCPI + ; SSE2-CODEGEN: subpd + ; SSE2-CODEGEN: addpd + %1 = uitofp <32 x i32> %a to <32 x double> + ret <32 x double> %1 +} + +define <2 x double> @uitofpv2i64v2double(<2 x i64> %a) { + ; SSE2: uitofpv2i64v2double + ; SSE2: cost of 20 {{.*}} uitofp + ; SSE2-CODEGEN: uitofpv2i64v2double + ; SSE2-CODEGEN: movapd LCPI + ; SSE2-CODEGEN: subpd + ; SSE2-CODEGEN: addpd + %1 = uitofp <2 x i64> %a to <2 x double> + ret <2 x double> %1 +} + +define <4 x double> @uitofpv4i64v4double(<4 x i64> %a) { + ; SSE2: uitofpv4i64v4double + ; SSE2: cost of 40 {{.*}} uitofp + ; SSE2-CODEGEN: uitofpv4i64v4double + ; SSE2-CODEGEN: movapd LCPI + ; SSE2-CODEGEN: subpd + ; SSE2-CODEGEN: addpd + %1 = uitofp <4 x i64> %a to <4 x double> + ret <4 x double> %1 +} + +define <8 x double> @uitofpv8i64v8double(<8 x i64> %a) { + %1 = uitofp <8 x i64> %a to <8 x double> + ; SSE2: uitofpv8i64v8double + ; SSE2: cost of 80 {{.*}} uitofp + ; SSE2-CODEGEN: uitofpv8i64v8double + ; SSE2-CODEGEN: movapd LCPI + ; SSE2-CODEGEN: subpd + ; SSE2-CODEGEN: addpd + ret <8 x double> %1 +} + +define <16 x double> @uitofpv16i64v16double(<16 x i64> %a) { + ; SSE2: uitofpv16i64v16double + ; SSE2: cost of 160 {{.*}} uitofp + ; SSE2-CODEGEN: uitofpv16i64v16double + ; SSE2-CODEGEN: movapd LCPI + ; SSE2-CODEGEN: subpd + ; SSE2-CODEGEN: addpd + %1 = uitofp <16 x i64> %a to <16 x double> + ret <16 x double> %1 +} + +define <32 x double> @uitofpv32i64v32double(<32 x i64> %a) { + ; SSE2: uitofpv32i64v32double + ; SSE2: cost of 320 {{.*}} uitofp + ; SSE2-CODEGEN: uitofpv32i64v32double + ; SSE2-CODEGEN: movapd LCPI + ; SSE2-CODEGEN: subpd + ; SSE2-CODEGEN: addpd + %1 = uitofp <32 x i64> %a to <32 x double> + ret <32 x double> %1 +} + +define <2 x float> @uitofpv2i8v2float(<2 x i8> %a) { + ; SSE2: uitofpv2i8v2float + ; SSE2: cost of 15 {{.*}} uitofp + %1 = uitofp <2 x i8> %a to <2 x float> + ret <2 x float> %1 +} + +define <4 x float> @uitofpv4i8v4float(<4 x i8> %a) { + ; SSE2: uitofpv4i8v4float + ; SSE2: cost of 15 {{.*}} uitofp + %1 = uitofp <4 x i8> %a to <4 x float> + ret <4 x float> %1 +} + +define <8 x float> @uitofpv8i8v8float(<8 x i8> %a) { + ; SSE2: uitofpv8i8v8float + ; SSE2: cost of 15 {{.*}} uitofp + %1 = uitofp <8 x i8> %a to <8 x float> + ret <8 x float> %1 +} + +define <16 x float> @uitofpv16i8v16float(<16 x i8> %a) { + ; SSE2: uitofpv16i8v16float + ; SSE2: cost of 8 {{.*}} uitofp + %1 = uitofp <16 x i8> %a to <16 x float> + ret <16 x float> %1 +} + +define <32 x float> @uitofpv32i8v32float(<32 x i8> %a) { + ; SSE2: uitofpv32i8v32float + ; SSE2: cost of 16 {{.*}} uitofp + %1 = uitofp <32 x i8> %a to <32 x float> + ret <32 x float> %1 +} + +define <2 x float> @uitofpv2i16v2float(<2 x i16> %a) { + ; SSE2: uitofpv2i16v2float + ; SSE2: cost of 15 {{.*}} uitofp + %1 = uitofp <2 x i16> %a to <2 x float> + ret <2 x float> %1 +} + +define <4 x float> @uitofpv4i16v4float(<4 x i16> %a) { + ; SSE2: uitofpv4i16v4float + ; SSE2: cost of 15 {{.*}} uitofp + %1 = uitofp <4 x i16> %a to <4 x float> + ret <4 x float> %1 +} + +define <8 x float> @uitofpv8i16v8float(<8 x i16> %a) { + ; SSE2: uitofpv8i16v8float + ; SSE2: cost of 15 {{.*}} uitofp + %1 = uitofp <8 x i16> %a to <8 x float> + ret <8 x float> %1 +} + +define <16 x float> @uitofpv16i16v16float(<16 x i16> %a) { + ; SSE2: uitofpv16i16v16float + ; SSE2: cost of 30 {{.*}} uitofp + %1 = uitofp <16 x i16> %a to <16 x float> + ret <16 x float> %1 +} + +define <32 x float> @uitofpv32i16v32float(<32 x i16> %a) { + ; SSE2: uitofpv32i16v32float + ; SSE2: cost of 60 {{.*}} uitofp + %1 = uitofp <32 x i16> %a to <32 x float> + ret <32 x float> %1 +} + +define <2 x float> @uitofpv2i32v2float(<2 x i32> %a) { + ; SSE2: uitofpv2i32v2float + ; SSE2: cost of 15 {{.*}} uitofp + %1 = uitofp <2 x i32> %a to <2 x float> + ret <2 x float> %1 +} + +define <4 x float> @uitofpv4i32v4float(<4 x i32> %a) { + ; SSE2: uitofpv4i32v4float + ; SSE2: cost of 15 {{.*}} uitofp + %1 = uitofp <4 x i32> %a to <4 x float> + ret <4 x float> %1 +} + +define <8 x float> @uitofpv8i32v8float(<8 x i32> %a) { + ; SSE2: uitofpv8i32v8float + ; SSE2: cost of 30 {{.*}} uitofp + %1 = uitofp <8 x i32> %a to <8 x float> + ret <8 x float> %1 +} + +define <16 x float> @uitofpv16i32v16float(<16 x i32> %a) { + ; SSE2: uitofpv16i32v16float + ; SSE2: cost of 60 {{.*}} uitofp + %1 = uitofp <16 x i32> %a to <16 x float> + ret <16 x float> %1 +} + +define <32 x float> @uitofpv32i32v32float(<32 x i32> %a) { + ; SSE2: uitofpv32i32v32float + ; SSE2: cost of 120 {{.*}} uitofp + %1 = uitofp <32 x i32> %a to <32 x float> + ret <32 x float> %1 +} + +define <2 x float> @uitofpv2i64v2float(<2 x i64> %a) { + ; SSE2: uitofpv2i64v2float + ; SSE2: cost of 15 {{.*}} uitofp + %1 = uitofp <2 x i64> %a to <2 x float> + ret <2 x float> %1 +} + +define <4 x float> @uitofpv4i64v4float(<4 x i64> %a) { + ; SSE2: uitofpv4i64v4float + ; SSE2: cost of 30 {{.*}} uitofp + %1 = uitofp <4 x i64> %a to <4 x float> + ret <4 x float> %1 +} + +define <8 x float> @uitofpv8i64v8float(<8 x i64> %a) { + ; SSE2: uitofpv8i64v8float + ; SSE2: cost of 60 {{.*}} uitofp + %1 = uitofp <8 x i64> %a to <8 x float> + ret <8 x float> %1 +} + +define <16 x float> @uitofpv16i64v16float(<16 x i64> %a) { + ; SSE2: uitofpv16i64v16float + ; SSE2: cost of 120 {{.*}} uitofp + %1 = uitofp <16 x i64> %a to <16 x float> + ret <16 x float> %1 +} + +define <32 x float> @uitofpv32i64v32float(<32 x i64> %a) { + ; SSE2: uitofpv32i64v32float + ; SSE2: cost of 240 {{.*}} uitofp + %1 = uitofp <32 x i64> %a to <32 x float> + ret <32 x float> %1 +} + diff --git a/test/Analysis/CostModel/X86/vectorized-loop.ll b/test/Analysis/CostModel/X86/vectorized-loop.ll index 25b1114..af7d1df 100644 --- a/test/Analysis/CostModel/X86/vectorized-loop.ll +++ b/test/Analysis/CostModel/X86/vectorized-loop.ll @@ -54,14 +54,14 @@ for.body: ; preds = %middle.block, %for. %13 = add nsw i64 %indvars.iv, 2 %arrayidx = getelementptr inbounds i32* %B, i64 %13 ;CHECK: cost of 1 {{.*}} load - %14 = load i32* %arrayidx, align 4, !tbaa !0 + %14 = load i32* %arrayidx, align 4 ;CHECK: cost of 1 {{.*}} mul %mul = mul nsw i32 %14, 5 %arrayidx2 = getelementptr inbounds i32* %A, i64 %indvars.iv ;CHECK: cost of 1 {{.*}} load - %15 = load i32* %arrayidx2, align 4, !tbaa !0 + %15 = load i32* %arrayidx2, align 4 %add3 = add nsw i32 %15, %mul - store i32 %add3, i32* %arrayidx2, align 4, !tbaa !0 + store i32 %add3, i32* %arrayidx2, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 ;CHECK: cost of 0 {{.*}} trunc %16 = trunc i64 %indvars.iv.next to i32 @@ -73,7 +73,3 @@ for.end: ; preds = %middle.block, %for. ;CHECK: cost of 0 {{.*}} ret ret i32 undef } - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/Analysis/GlobalsModRef/volatile-instrs.ll b/test/Analysis/GlobalsModRef/volatile-instrs.ll index 49bce67..46d3d76 100644 --- a/test/Analysis/GlobalsModRef/volatile-instrs.ll +++ b/test/Analysis/GlobalsModRef/volatile-instrs.ll @@ -22,13 +22,9 @@ declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, define i32 @main() nounwind uwtable ssp { main_entry: tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* bitcast (%struct.anon* @b to i8*), i8* bitcast (%struct.anon* @a to i8*), i64 12, i32 4, i1 false) - %0 = load volatile i32* getelementptr inbounds (%struct.anon* @b, i64 0, i32 0), align 4, !tbaa !0 - store i32 %0, i32* @c, align 4, !tbaa !0 + %0 = load volatile i32* getelementptr inbounds (%struct.anon* @b, i64 0, i32 0), align 4 + store i32 %0, i32* @c, align 4 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* bitcast (%struct.anon* @b to i8*), i8* bitcast (%struct.anon* @a to i8*), i64 12, i32 4, i1 false) nounwind %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([4 x i8]* @.str, i64 0, i64 0), i32 %0) nounwind ret i32 0 } - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/Analysis/Profiling/lit.local.cfg b/test/Analysis/Profiling/lit.local.cfg index d507d3f..444b7dc 100644 --- a/test/Analysis/Profiling/lit.local.cfg +++ b/test/Analysis/Profiling/lit.local.cfg @@ -11,3 +11,6 @@ root = getRoot(config) # doesn't have any JIT at present so they will fail when run there. if root.host_arch in ['AArch64']: config.unsupported = True + +if 'hexagon' in root.target_triple: + config.unsupported = True diff --git a/test/Analysis/ScalarEvolution/2012-03-26-LoadConstant.ll b/test/Analysis/ScalarEvolution/2012-03-26-LoadConstant.ll index 138c015..b88e33f 100644 --- a/test/Analysis/ScalarEvolution/2012-03-26-LoadConstant.ll +++ b/test/Analysis/ScalarEvolution/2012-03-26-LoadConstant.ll @@ -15,24 +15,24 @@ entry: lbl_818: ; preds = %for.end, %entry call void (...)* @func_27() - store i32 0, i32* @g_814, align 4, !tbaa !0 + store i32 0, i32* @g_814, align 4 br label %for.cond for.cond: ; preds = %for.body, %lbl_818 - %0 = load i32* @g_814, align 4, !tbaa !0 + %0 = load i32* @g_814, align 4 %cmp = icmp sle i32 %0, 0 br i1 %cmp, label %for.body, label %for.end for.body: ; preds = %for.cond %idxprom = sext i32 %0 to i64 %arrayidx = getelementptr inbounds [0 x i32]* getelementptr inbounds ([1 x [0 x i32]]* @g_244, i32 0, i64 0), i32 0, i64 %idxprom - %1 = load i32* %arrayidx, align 1, !tbaa !0 - store i32 %1, i32* @func_21_l_773, align 4, !tbaa !0 - store i32 1, i32* @g_814, align 4, !tbaa !0 + %1 = load i32* %arrayidx, align 1 + store i32 %1, i32* @func_21_l_773, align 4 + store i32 1, i32* @g_814, align 4 br label %for.cond for.end: ; preds = %for.cond - %2 = load i32* @func_21_l_773, align 4, !tbaa !0 + %2 = load i32* @func_21_l_773, align 4 %tobool = icmp ne i32 %2, 0 br i1 %tobool, label %lbl_818, label %if.end @@ -41,7 +41,3 @@ if.end: ; preds = %for.end } declare void @func_27(...) - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/Analysis/ScalarEvolution/scev-invalid.ll b/test/Analysis/ScalarEvolution/scev-invalid.ll new file mode 100644 index 0000000..aac0d31 --- /dev/null +++ b/test/Analysis/ScalarEvolution/scev-invalid.ll @@ -0,0 +1,34 @@ +; RUN: opt < %s -S -indvars -loop-unroll | FileCheck %s +; +; PR15570: SEGV: SCEV back-edge info invalid after dead code removal. +; +; Indvars creates a SCEV expression for the loop's back edge taken +; count, then determines that the comparison is always true and +; removes it. +; +; When loop-unroll asks for the expression, it contains a NULL +; SCEVUnknkown (as a CallbackVH). +; +; forgetMemoizedResults should invalidate the backedge taken count expression. + +; CHECK: @test +; CHECK-NOT: phi +; CHECK-NOT: icmp +; CHECK: ret void +define void @test() { +entry: + %xor1 = xor i32 0, 1 + br label %b17 + +b17: + br i1 undef, label %b22, label %b18 + +b18: + %phi1 = phi i32 [ %add1, %b18 ], [ %xor1, %b17 ] + %add1 = add nsw i32 %phi1, -1 + %cmp1 = icmp sgt i32 %add1, 0 + br i1 %cmp1, label %b18, label %b22 + +b22: + ret void +} diff --git a/test/Analysis/TypeBasedAliasAnalysis/placement-tbaa.ll b/test/Analysis/TypeBasedAliasAnalysis/placement-tbaa.ll new file mode 100644 index 0000000..f1edb44 --- /dev/null +++ b/test/Analysis/TypeBasedAliasAnalysis/placement-tbaa.ll @@ -0,0 +1,104 @@ +; RUN: opt < %s -tbaa -basicaa -aa-eval -evaluate-tbaa -print-no-aliases -print-may-aliases -disable-output 2>&1 | FileCheck %s + +; Generated with "clang -cc1 -disable-llvm-optzns -O1 -emit-llvm" +; #include <new> +; struct Foo { long i; }; +; struct Bar { void *p; }; +; long foo(int n) { +; Foo *f = new Foo; +; f->i = 1; +; for (int i=0; i<n; ++i) { +; Bar *b = new (f) Bar; +; b->p = 0; +; f = new (f) Foo; +; f->i = i; +; } +; return f->i; +; } + +; Basic AA says MayAlias, TBAA says NoAlias +; CHECK: MayAlias: i64* %i5, i8** %p +; CHECK: NoAlias: store i64 %conv, i64* %i5, align 8, !tbaa !4 <-> store i8* null, i8** %p, align 8, !tbaa !3 + +%struct.Foo = type { i64 } +%struct.Bar = type { i8* } + +define i64 @_Z3fooi(i32 %n) #0 { +entry: + %n.addr = alloca i32, align 4 + %f = alloca %struct.Foo*, align 8 + %i1 = alloca i32, align 4 + %b = alloca %struct.Bar*, align 8 + store i32 %n, i32* %n.addr, align 4, !tbaa !0 + %call = call noalias i8* @_Znwm(i64 8) + %0 = bitcast i8* %call to %struct.Foo* + store %struct.Foo* %0, %struct.Foo** %f, align 8, !tbaa !3 + %1 = load %struct.Foo** %f, align 8, !tbaa !3 + %i = getelementptr inbounds %struct.Foo* %1, i32 0, i32 0 + store i64 1, i64* %i, align 8, !tbaa !4 + store i32 0, i32* %i1, align 4, !tbaa !0 + br label %for.cond + +for.cond: + %2 = load i32* %i1, align 4, !tbaa !0 + %3 = load i32* %n.addr, align 4, !tbaa !0 + %cmp = icmp slt i32 %2, %3 + br i1 %cmp, label %for.body, label %for.end + +for.body: + %4 = load %struct.Foo** %f, align 8, !tbaa !3 + %5 = bitcast %struct.Foo* %4 to i8* + %new.isnull = icmp eq i8* %5, null + br i1 %new.isnull, label %new.cont, label %new.notnull + +new.notnull: + %6 = bitcast i8* %5 to %struct.Bar* + br label %new.cont + +new.cont: + %7 = phi %struct.Bar* [ %6, %new.notnull ], [ null, %for.body ] + store %struct.Bar* %7, %struct.Bar** %b, align 8, !tbaa !3 + %8 = load %struct.Bar** %b, align 8, !tbaa !3 + %p = getelementptr inbounds %struct.Bar* %8, i32 0, i32 0 + store i8* null, i8** %p, align 8, !tbaa !3 + %9 = load %struct.Foo** %f, align 8, !tbaa !3 + %10 = bitcast %struct.Foo* %9 to i8* + %new.isnull2 = icmp eq i8* %10, null + br i1 %new.isnull2, label %new.cont4, label %new.notnull3 + +new.notnull3: + %11 = bitcast i8* %10 to %struct.Foo* + br label %new.cont4 + +new.cont4: + %12 = phi %struct.Foo* [ %11, %new.notnull3 ], [ null, %new.cont ] + store %struct.Foo* %12, %struct.Foo** %f, align 8, !tbaa !3 + %13 = load i32* %i1, align 4, !tbaa !0 + %conv = sext i32 %13 to i64 + %14 = load %struct.Foo** %f, align 8, !tbaa !3 + %i5 = getelementptr inbounds %struct.Foo* %14, i32 0, i32 0 + store i64 %conv, i64* %i5, align 8, !tbaa !4 + br label %for.inc + +for.inc: + %15 = load i32* %i1, align 4, !tbaa !0 + %inc = add nsw i32 %15, 1 + store i32 %inc, i32* %i1, align 4, !tbaa !0 + br label %for.cond + +for.end: + %16 = load %struct.Foo** %f, align 8, !tbaa !3 + %i6 = getelementptr inbounds %struct.Foo* %16, i32 0, i32 0 + %17 = load i64* %i6, align 8, !tbaa !4 + ret i64 %17 +} + +declare noalias i8* @_Znwm(i64) + +attributes #0 = { nounwind } + +!0 = metadata !{metadata !"int", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA"} +!3 = metadata !{metadata !"any pointer", metadata !1} +!4 = metadata !{metadata !"long", metadata !1} diff --git a/test/Analysis/TypeBasedAliasAnalysis/tbaa-path.ll b/test/Analysis/TypeBasedAliasAnalysis/tbaa-path.ll new file mode 100644 index 0000000..ee52763 --- /dev/null +++ b/test/Analysis/TypeBasedAliasAnalysis/tbaa-path.ll @@ -0,0 +1,392 @@ +; RUN: opt < %s -tbaa -basicaa -struct-path-tbaa -aa-eval -evaluate-tbaa -print-no-aliases -print-may-aliases -disable-output 2>&1 | FileCheck %s +; RUN: opt < %s -tbaa -basicaa -struct-path-tbaa -gvn -S | FileCheck %s --check-prefix=OPT +; Generated from clang/test/CodeGen/tbaa.cpp with "-O1 -struct-path-tbaa -disable-llvm-optzns". + +%struct.StructA = type { i16, i32, i16, i32 } +%struct.StructB = type { i16, %struct.StructA, i32 } +%struct.StructS = type { i16, i32 } +%struct.StructS2 = type { i16, i32 } +%struct.StructC = type { i16, %struct.StructB, i32 } +%struct.StructD = type { i16, %struct.StructB, i32, i8 } + +define i32 @_Z1gPjP7StructAy(i32* %s, %struct.StructA* %A, i64 %count) #0 { +entry: +; Access to i32* and &(A->f32). +; CHECK: Function +; CHECK: MayAlias: store i32 4, i32* %f32, align 4, !tbaa !8 <-> store i32 1, i32* %0, align 4, !tbaa !6 +; OPT: define +; OPT: store i32 1 +; OPT: store i32 4 +; OPT: %[[RET:.*]] = load i32* +; OPT: ret i32 %[[RET]] + %s.addr = alloca i32*, align 8 + %A.addr = alloca %struct.StructA*, align 8 + %count.addr = alloca i64, align 8 + store i32* %s, i32** %s.addr, align 8, !tbaa !0 + store %struct.StructA* %A, %struct.StructA** %A.addr, align 8, !tbaa !0 + store i64 %count, i64* %count.addr, align 8, !tbaa !4 + %0 = load i32** %s.addr, align 8, !tbaa !0 + store i32 1, i32* %0, align 4, !tbaa !6 + %1 = load %struct.StructA** %A.addr, align 8, !tbaa !0 + %f32 = getelementptr inbounds %struct.StructA* %1, i32 0, i32 1 + store i32 4, i32* %f32, align 4, !tbaa !8 + %2 = load i32** %s.addr, align 8, !tbaa !0 + %3 = load i32* %2, align 4, !tbaa !6 + ret i32 %3 +} + +define i32 @_Z2g2PjP7StructAy(i32* %s, %struct.StructA* %A, i64 %count) #0 { +entry: +; Access to i32* and &(A->f16). +; CHECK: Function +; CHECK: NoAlias: store i16 4, i16* %f16, align 2, !tbaa !8 <-> store i32 1, i32* %0, align 4, !tbaa !6 +; OPT: define +; OPT: store i32 1 +; OPT: store i16 4 +; Remove a load and propogate the value from store. +; OPT: ret i32 1 + %s.addr = alloca i32*, align 8 + %A.addr = alloca %struct.StructA*, align 8 + %count.addr = alloca i64, align 8 + store i32* %s, i32** %s.addr, align 8, !tbaa !0 + store %struct.StructA* %A, %struct.StructA** %A.addr, align 8, !tbaa !0 + store i64 %count, i64* %count.addr, align 8, !tbaa !4 + %0 = load i32** %s.addr, align 8, !tbaa !0 + store i32 1, i32* %0, align 4, !tbaa !6 + %1 = load %struct.StructA** %A.addr, align 8, !tbaa !0 + %f16 = getelementptr inbounds %struct.StructA* %1, i32 0, i32 0 + store i16 4, i16* %f16, align 2, !tbaa !11 + %2 = load i32** %s.addr, align 8, !tbaa !0 + %3 = load i32* %2, align 4, !tbaa !6 + ret i32 %3 +} + +define i32 @_Z2g3P7StructAP7StructBy(%struct.StructA* %A, %struct.StructB* %B, i64 %count) #0 { +entry: +; Access to &(A->f32) and &(B->a.f32). +; CHECK: Function +; CHECK: MayAlias: store i32 4, i32* %f321, align 4, !tbaa !10 <-> store i32 1, i32* %f32, align 4, !tbaa !6 +; OPT: define +; OPT: store i32 1 +; OPT: store i32 4 +; OPT: %[[RET:.*]] = load i32* +; OPT: ret i32 %[[RET]] + %A.addr = alloca %struct.StructA*, align 8 + %B.addr = alloca %struct.StructB*, align 8 + %count.addr = alloca i64, align 8 + store %struct.StructA* %A, %struct.StructA** %A.addr, align 8, !tbaa !0 + store %struct.StructB* %B, %struct.StructB** %B.addr, align 8, !tbaa !0 + store i64 %count, i64* %count.addr, align 8, !tbaa !4 + %0 = load %struct.StructA** %A.addr, align 8, !tbaa !0 + %f32 = getelementptr inbounds %struct.StructA* %0, i32 0, i32 1 + store i32 1, i32* %f32, align 4, !tbaa !8 + %1 = load %struct.StructB** %B.addr, align 8, !tbaa !0 + %a = getelementptr inbounds %struct.StructB* %1, i32 0, i32 1 + %f321 = getelementptr inbounds %struct.StructA* %a, i32 0, i32 1 + store i32 4, i32* %f321, align 4, !tbaa !12 + %2 = load %struct.StructA** %A.addr, align 8, !tbaa !0 + %f322 = getelementptr inbounds %struct.StructA* %2, i32 0, i32 1 + %3 = load i32* %f322, align 4, !tbaa !8 + ret i32 %3 +} + +define i32 @_Z2g4P7StructAP7StructBy(%struct.StructA* %A, %struct.StructB* %B, i64 %count) #0 { +entry: +; Access to &(A->f32) and &(B->a.f16). +; CHECK: Function +; CHECK: NoAlias: store i16 4, i16* %f16, align 2, !tbaa !10 <-> store i32 1, i32* %f32, align 4, !tbaa !6 +; OPT: define +; OPT: store i32 1 +; OPT: store i16 4 +; Remove a load and propogate the value from store. +; OPT: ret i32 1 + %A.addr = alloca %struct.StructA*, align 8 + %B.addr = alloca %struct.StructB*, align 8 + %count.addr = alloca i64, align 8 + store %struct.StructA* %A, %struct.StructA** %A.addr, align 8, !tbaa !0 + store %struct.StructB* %B, %struct.StructB** %B.addr, align 8, !tbaa !0 + store i64 %count, i64* %count.addr, align 8, !tbaa !4 + %0 = load %struct.StructA** %A.addr, align 8, !tbaa !0 + %f32 = getelementptr inbounds %struct.StructA* %0, i32 0, i32 1 + store i32 1, i32* %f32, align 4, !tbaa !8 + %1 = load %struct.StructB** %B.addr, align 8, !tbaa !0 + %a = getelementptr inbounds %struct.StructB* %1, i32 0, i32 1 + %f16 = getelementptr inbounds %struct.StructA* %a, i32 0, i32 0 + store i16 4, i16* %f16, align 2, !tbaa !14 + %2 = load %struct.StructA** %A.addr, align 8, !tbaa !0 + %f321 = getelementptr inbounds %struct.StructA* %2, i32 0, i32 1 + %3 = load i32* %f321, align 4, !tbaa !8 + ret i32 %3 +} + +define i32 @_Z2g5P7StructAP7StructBy(%struct.StructA* %A, %struct.StructB* %B, i64 %count) #0 { +entry: +; Access to &(A->f32) and &(B->f32). +; CHECK: Function +; CHECK: NoAlias: store i32 4, i32* %f321, align 4, !tbaa !10 <-> store i32 1, i32* %f32, align 4, !tbaa !6 +; OPT: define +; OPT: store i32 1 +; OPT: store i32 4 +; Remove a load and propogate the value from store. +; OPT: ret i32 1 + %A.addr = alloca %struct.StructA*, align 8 + %B.addr = alloca %struct.StructB*, align 8 + %count.addr = alloca i64, align 8 + store %struct.StructA* %A, %struct.StructA** %A.addr, align 8, !tbaa !0 + store %struct.StructB* %B, %struct.StructB** %B.addr, align 8, !tbaa !0 + store i64 %count, i64* %count.addr, align 8, !tbaa !4 + %0 = load %struct.StructA** %A.addr, align 8, !tbaa !0 + %f32 = getelementptr inbounds %struct.StructA* %0, i32 0, i32 1 + store i32 1, i32* %f32, align 4, !tbaa !8 + %1 = load %struct.StructB** %B.addr, align 8, !tbaa !0 + %f321 = getelementptr inbounds %struct.StructB* %1, i32 0, i32 2 + store i32 4, i32* %f321, align 4, !tbaa !15 + %2 = load %struct.StructA** %A.addr, align 8, !tbaa !0 + %f322 = getelementptr inbounds %struct.StructA* %2, i32 0, i32 1 + %3 = load i32* %f322, align 4, !tbaa !8 + ret i32 %3 +} + +define i32 @_Z2g6P7StructAP7StructBy(%struct.StructA* %A, %struct.StructB* %B, i64 %count) #0 { +entry: +; Access to &(A->f32) and &(B->a.f32_2). +; CHECK: Function +; CHECK: NoAlias: store i32 4, i32* %f32_2, align 4, !tbaa !10 <-> store i32 1, i32* %f32, align 4, !tbaa !6 +; OPT: define +; OPT: store i32 1 +; OPT: store i32 4 +; Remove a load and propogate the value from store. +; OPT: ret i32 1 + %A.addr = alloca %struct.StructA*, align 8 + %B.addr = alloca %struct.StructB*, align 8 + %count.addr = alloca i64, align 8 + store %struct.StructA* %A, %struct.StructA** %A.addr, align 8, !tbaa !0 + store %struct.StructB* %B, %struct.StructB** %B.addr, align 8, !tbaa !0 + store i64 %count, i64* %count.addr, align 8, !tbaa !4 + %0 = load %struct.StructA** %A.addr, align 8, !tbaa !0 + %f32 = getelementptr inbounds %struct.StructA* %0, i32 0, i32 1 + store i32 1, i32* %f32, align 4, !tbaa !8 + %1 = load %struct.StructB** %B.addr, align 8, !tbaa !0 + %a = getelementptr inbounds %struct.StructB* %1, i32 0, i32 1 + %f32_2 = getelementptr inbounds %struct.StructA* %a, i32 0, i32 3 + store i32 4, i32* %f32_2, align 4, !tbaa !16 + %2 = load %struct.StructA** %A.addr, align 8, !tbaa !0 + %f321 = getelementptr inbounds %struct.StructA* %2, i32 0, i32 1 + %3 = load i32* %f321, align 4, !tbaa !8 + ret i32 %3 +} + +define i32 @_Z2g7P7StructAP7StructSy(%struct.StructA* %A, %struct.StructS* %S, i64 %count) #0 { +entry: +; Access to &(A->f32) and &(S->f32). +; CHECK: Function +; CHECK: NoAlias: store i32 4, i32* %f321, align 4, !tbaa !10 <-> store i32 1, i32* %f32, align 4, !tbaa !6 +; OPT: define +; OPT: store i32 1 +; OPT: store i32 4 +; Remove a load and propogate the value from store. +; OPT: ret i32 1 + %A.addr = alloca %struct.StructA*, align 8 + %S.addr = alloca %struct.StructS*, align 8 + %count.addr = alloca i64, align 8 + store %struct.StructA* %A, %struct.StructA** %A.addr, align 8, !tbaa !0 + store %struct.StructS* %S, %struct.StructS** %S.addr, align 8, !tbaa !0 + store i64 %count, i64* %count.addr, align 8, !tbaa !4 + %0 = load %struct.StructA** %A.addr, align 8, !tbaa !0 + %f32 = getelementptr inbounds %struct.StructA* %0, i32 0, i32 1 + store i32 1, i32* %f32, align 4, !tbaa !8 + %1 = load %struct.StructS** %S.addr, align 8, !tbaa !0 + %f321 = getelementptr inbounds %struct.StructS* %1, i32 0, i32 1 + store i32 4, i32* %f321, align 4, !tbaa !17 + %2 = load %struct.StructA** %A.addr, align 8, !tbaa !0 + %f322 = getelementptr inbounds %struct.StructA* %2, i32 0, i32 1 + %3 = load i32* %f322, align 4, !tbaa !8 + ret i32 %3 +} + +define i32 @_Z2g8P7StructAP7StructSy(%struct.StructA* %A, %struct.StructS* %S, i64 %count) #0 { +entry: +; Access to &(A->f32) and &(S->f16). +; CHECK: Function +; CHECK: NoAlias: store i16 4, i16* %f16, align 2, !tbaa !10 <-> store i32 1, i32* %f32, align 4, !tbaa !6 +; OPT: define +; OPT: store i32 1 +; OPT: store i16 4 +; Remove a load and propogate the value from store. +; OPT: ret i32 1 + %A.addr = alloca %struct.StructA*, align 8 + %S.addr = alloca %struct.StructS*, align 8 + %count.addr = alloca i64, align 8 + store %struct.StructA* %A, %struct.StructA** %A.addr, align 8, !tbaa !0 + store %struct.StructS* %S, %struct.StructS** %S.addr, align 8, !tbaa !0 + store i64 %count, i64* %count.addr, align 8, !tbaa !4 + %0 = load %struct.StructA** %A.addr, align 8, !tbaa !0 + %f32 = getelementptr inbounds %struct.StructA* %0, i32 0, i32 1 + store i32 1, i32* %f32, align 4, !tbaa !8 + %1 = load %struct.StructS** %S.addr, align 8, !tbaa !0 + %f16 = getelementptr inbounds %struct.StructS* %1, i32 0, i32 0 + store i16 4, i16* %f16, align 2, !tbaa !19 + %2 = load %struct.StructA** %A.addr, align 8, !tbaa !0 + %f321 = getelementptr inbounds %struct.StructA* %2, i32 0, i32 1 + %3 = load i32* %f321, align 4, !tbaa !8 + ret i32 %3 +} + +define i32 @_Z2g9P7StructSP8StructS2y(%struct.StructS* %S, %struct.StructS2* %S2, i64 %count) #0 { +entry: +; Access to &(S->f32) and &(S2->f32). +; CHECK: Function +; CHECK: NoAlias: store i32 4, i32* %f321, align 4, !tbaa !10 <-> store i32 1, i32* %f32, align 4, !tbaa !6 +; OPT: define +; OPT: store i32 1 +; OPT: store i32 4 +; Remove a load and propogate the value from store. +; OPT: ret i32 1 + %S.addr = alloca %struct.StructS*, align 8 + %S2.addr = alloca %struct.StructS2*, align 8 + %count.addr = alloca i64, align 8 + store %struct.StructS* %S, %struct.StructS** %S.addr, align 8, !tbaa !0 + store %struct.StructS2* %S2, %struct.StructS2** %S2.addr, align 8, !tbaa !0 + store i64 %count, i64* %count.addr, align 8, !tbaa !4 + %0 = load %struct.StructS** %S.addr, align 8, !tbaa !0 + %f32 = getelementptr inbounds %struct.StructS* %0, i32 0, i32 1 + store i32 1, i32* %f32, align 4, !tbaa !17 + %1 = load %struct.StructS2** %S2.addr, align 8, !tbaa !0 + %f321 = getelementptr inbounds %struct.StructS2* %1, i32 0, i32 1 + store i32 4, i32* %f321, align 4, !tbaa !20 + %2 = load %struct.StructS** %S.addr, align 8, !tbaa !0 + %f322 = getelementptr inbounds %struct.StructS* %2, i32 0, i32 1 + %3 = load i32* %f322, align 4, !tbaa !17 + ret i32 %3 +} + +define i32 @_Z3g10P7StructSP8StructS2y(%struct.StructS* %S, %struct.StructS2* %S2, i64 %count) #0 { +entry: +; Access to &(S->f32) and &(S2->f16). +; CHECK: Function +; CHECK: NoAlias: store i16 4, i16* %f16, align 2, !tbaa !10 <-> store i32 1, i32* %f32, align 4, !tbaa !6 +; OPT: define +; OPT: store i32 1 +; OPT: store i16 4 +; Remove a load and propogate the value from store. +; OPT: ret i32 1 + %S.addr = alloca %struct.StructS*, align 8 + %S2.addr = alloca %struct.StructS2*, align 8 + %count.addr = alloca i64, align 8 + store %struct.StructS* %S, %struct.StructS** %S.addr, align 8, !tbaa !0 + store %struct.StructS2* %S2, %struct.StructS2** %S2.addr, align 8, !tbaa !0 + store i64 %count, i64* %count.addr, align 8, !tbaa !4 + %0 = load %struct.StructS** %S.addr, align 8, !tbaa !0 + %f32 = getelementptr inbounds %struct.StructS* %0, i32 0, i32 1 + store i32 1, i32* %f32, align 4, !tbaa !17 + %1 = load %struct.StructS2** %S2.addr, align 8, !tbaa !0 + %f16 = getelementptr inbounds %struct.StructS2* %1, i32 0, i32 0 + store i16 4, i16* %f16, align 2, !tbaa !22 + %2 = load %struct.StructS** %S.addr, align 8, !tbaa !0 + %f321 = getelementptr inbounds %struct.StructS* %2, i32 0, i32 1 + %3 = load i32* %f321, align 4, !tbaa !17 + ret i32 %3 +} + +define i32 @_Z3g11P7StructCP7StructDy(%struct.StructC* %C, %struct.StructD* %D, i64 %count) #0 { +entry: +; Access to &(C->b.a.f32) and &(D->b.a.f32). +; CHECK: Function +; CHECK: NoAlias: store i32 4, i32* %f323, align 4, !tbaa !12 <-> store i32 1, i32* %f32, align 4, !tbaa !6 +; OPT: define +; OPT: store i32 1 +; OPT: store i32 4 +; Remove a load and propogate the value from store. +; OPT: ret i32 1 + %C.addr = alloca %struct.StructC*, align 8 + %D.addr = alloca %struct.StructD*, align 8 + %count.addr = alloca i64, align 8 + store %struct.StructC* %C, %struct.StructC** %C.addr, align 8, !tbaa !0 + store %struct.StructD* %D, %struct.StructD** %D.addr, align 8, !tbaa !0 + store i64 %count, i64* %count.addr, align 8, !tbaa !4 + %0 = load %struct.StructC** %C.addr, align 8, !tbaa !0 + %b = getelementptr inbounds %struct.StructC* %0, i32 0, i32 1 + %a = getelementptr inbounds %struct.StructB* %b, i32 0, i32 1 + %f32 = getelementptr inbounds %struct.StructA* %a, i32 0, i32 1 + store i32 1, i32* %f32, align 4, !tbaa !23 + %1 = load %struct.StructD** %D.addr, align 8, !tbaa !0 + %b1 = getelementptr inbounds %struct.StructD* %1, i32 0, i32 1 + %a2 = getelementptr inbounds %struct.StructB* %b1, i32 0, i32 1 + %f323 = getelementptr inbounds %struct.StructA* %a2, i32 0, i32 1 + store i32 4, i32* %f323, align 4, !tbaa !25 + %2 = load %struct.StructC** %C.addr, align 8, !tbaa !0 + %b4 = getelementptr inbounds %struct.StructC* %2, i32 0, i32 1 + %a5 = getelementptr inbounds %struct.StructB* %b4, i32 0, i32 1 + %f326 = getelementptr inbounds %struct.StructA* %a5, i32 0, i32 1 + %3 = load i32* %f326, align 4, !tbaa !23 + ret i32 %3 +} + +define i32 @_Z3g12P7StructCP7StructDy(%struct.StructC* %C, %struct.StructD* %D, i64 %count) #0 { +entry: +; Access to &(b1->a.f32) and &(b2->a.f32). +; CHECK: Function +; CHECK: MayAlias: store i32 4, i32* %f325, align 4, !tbaa !6 <-> store i32 1, i32* %f32, align 4, !tbaa !6 +; OPT: define +; OPT: store i32 1 +; OPT: store i32 4 +; OPT: %[[RET:.*]] = load i32* +; OPT: ret i32 %[[RET]] + %C.addr = alloca %struct.StructC*, align 8 + %D.addr = alloca %struct.StructD*, align 8 + %count.addr = alloca i64, align 8 + %b1 = alloca %struct.StructB*, align 8 + %b2 = alloca %struct.StructB*, align 8 + store %struct.StructC* %C, %struct.StructC** %C.addr, align 8, !tbaa !0 + store %struct.StructD* %D, %struct.StructD** %D.addr, align 8, !tbaa !0 + store i64 %count, i64* %count.addr, align 8, !tbaa !4 + %0 = load %struct.StructC** %C.addr, align 8, !tbaa !0 + %b = getelementptr inbounds %struct.StructC* %0, i32 0, i32 1 + store %struct.StructB* %b, %struct.StructB** %b1, align 8, !tbaa !0 + %1 = load %struct.StructD** %D.addr, align 8, !tbaa !0 + %b3 = getelementptr inbounds %struct.StructD* %1, i32 0, i32 1 + store %struct.StructB* %b3, %struct.StructB** %b2, align 8, !tbaa !0 + %2 = load %struct.StructB** %b1, align 8, !tbaa !0 + %a = getelementptr inbounds %struct.StructB* %2, i32 0, i32 1 + %f32 = getelementptr inbounds %struct.StructA* %a, i32 0, i32 1 + store i32 1, i32* %f32, align 4, !tbaa !12 + %3 = load %struct.StructB** %b2, align 8, !tbaa !0 + %a4 = getelementptr inbounds %struct.StructB* %3, i32 0, i32 1 + %f325 = getelementptr inbounds %struct.StructA* %a4, i32 0, i32 1 + store i32 4, i32* %f325, align 4, !tbaa !12 + %4 = load %struct.StructB** %b1, align 8, !tbaa !0 + %a6 = getelementptr inbounds %struct.StructB* %4, i32 0, i32 1 + %f327 = getelementptr inbounds %struct.StructA* %a6, i32 0, i32 1 + %5 = load i32* %f327, align 4, !tbaa !12 + ret i32 %5 +} + +attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } + +!0 = metadata !{metadata !1, metadata !1, i64 0} +!1 = metadata !{metadata !"any pointer", metadata !2} +!2 = metadata !{metadata !"omnipotent char", metadata !3} +!3 = metadata !{metadata !"Simple C/C++ TBAA"} +!4 = metadata !{metadata !5, metadata !5, i64 0} +!5 = metadata !{metadata !"long long", metadata !2} +!6 = metadata !{metadata !7, metadata !7, i64 0} +!7 = metadata !{metadata !"int", metadata !2} +!8 = metadata !{metadata !9, metadata !7, i64 4} +!9 = metadata !{metadata !"_ZTS7StructA", metadata !10, i64 0, metadata !7, i64 4, metadata !10, i64 8, metadata !7, i64 12} +!10 = metadata !{metadata !"short", metadata !2} +!11 = metadata !{metadata !9, metadata !10, i64 0} +!12 = metadata !{metadata !13, metadata !7, i64 8} +!13 = metadata !{metadata !"_ZTS7StructB", metadata !10, i64 0, metadata !9, i64 4, metadata !7, i64 20} +!14 = metadata !{metadata !13, metadata !10, i64 4} +!15 = metadata !{metadata !13, metadata !7, i64 20} +!16 = metadata !{metadata !13, metadata !7, i64 16} +!17 = metadata !{metadata !18, metadata !7, i64 4} +!18 = metadata !{metadata !"_ZTS7StructS", metadata !10, i64 0, metadata !7, i64 4} +!19 = metadata !{metadata !18, metadata !10, i64 0} +!20 = metadata !{metadata !21, metadata !7, i64 4} +!21 = metadata !{metadata !"_ZTS8StructS2", metadata !10, i64 0, metadata !7, i64 4} +!22 = metadata !{metadata !21, metadata !10, i64 0} +!23 = metadata !{metadata !24, metadata !7, i64 12} +!24 = metadata !{metadata !"_ZTS7StructC", metadata !10, i64 0, metadata !13, i64 4, metadata !7, i64 28} +!25 = metadata !{metadata !26, metadata !7, i64 12} +!26 = metadata !{metadata !"_ZTS7StructD", metadata !10, i64 0, metadata !13, i64 4, metadata !7, i64 28, metadata !2, i64 32} diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt index 8faec8b..728213f 100644 --- a/test/CMakeLists.txt +++ b/test/CMakeLists.txt @@ -29,7 +29,7 @@ set(LLVM_TEST_DEPENDS UnitTests macho-dump opt profile_rt-shared FileCheck count not - yaml2obj) + yaml2obj obj2yaml) # If Intel JIT events are supported, depend on a tool that tests the listener. if( LLVM_USE_INTEL_JITEVENTS ) diff --git a/test/CodeGen/AArch64/adrp-relocation.ll b/test/CodeGen/AArch64/adrp-relocation.ll index c33b442..cf41116 100644 --- a/test/CodeGen/AArch64/adrp-relocation.ll +++ b/test/CodeGen/AArch64/adrp-relocation.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=aarch64-none-linux-gnu -verify-machineinstrs -filetype=obj < %s | elf-dump | FileCheck %s +; RUN: llc -mtriple=aarch64-none-linux-gnu -verify-machineinstrs -filetype=obj < %s | llvm-readobj -s -r | FileCheck %s define i64 @testfn() nounwind { entry: @@ -19,17 +19,9 @@ entry: ; relative offsets of testfn and foo) because its value depends on where this ; object file's .text section gets relocated in memory. -; CHECK: .rela.text - -; CHECK: # Relocation 0 -; CHECK-NEXT: (('r_offset', 0x0000000000000010) -; CHECK-NEXT: ('r_sym', 0x00000007) -; CHECK-NEXT: ('r_type', 0x00000113) -; CHECK-NEXT: ('r_addend', 0x0000000000000000) -; CHECK-NEXT: ), -; CHECK-NEXT: Relocation 1 -; CHECK-NEXT: (('r_offset', 0x0000000000000014) -; CHECK-NEXT: ('r_sym', 0x00000007) -; CHECK-NEXT: ('r_type', 0x00000115) -; CHECK-NEXT: ('r_addend', 0x0000000000000000) -; CHECK-NEXT: ), +; CHECK: Relocations [ +; CHECK-NEXT: Section (1) .text { +; CHECK-NEXT: 0x10 R_AARCH64_ADR_PREL_PG_HI21 testfn 0x0 +; CHECK-NEXT: 0x14 R_AARCH64_ADD_ABS_LO12_NC testfn 0x0 +; CHECK-NEXT: } +; CHECK-NEXT: ] diff --git a/test/CodeGen/AArch64/alloca.ll b/test/CodeGen/AArch64/alloca.ll index 6421769..c62edf6 100644 --- a/test/CodeGen/AArch64/alloca.ll +++ b/test/CodeGen/AArch64/alloca.ll @@ -71,8 +71,8 @@ define void @test_variadic_alloca(i64 %n, ...) { ; CHECK: sub sp, sp, #208 ; CHECK: stp x29, x30, [sp, #192] ; CHECK: add x29, sp, #192 -; CHECK: sub x9, x29, #192 -; CHECK: add x8, x9, #0 +; CHECK: sub [[TMP:x[0-9]+]], x29, #192 +; CHECK: add x8, [[TMP]], #0 ; CHECK: str q7, [x8, #112] ; [...] ; CHECK: str q1, [x8, #16] @@ -131,4 +131,4 @@ define void @test_scoped_alloca(i64 %n) { ; CHECK: mov sp, [[SAVED_SP]] ret void -}
\ No newline at end of file +} diff --git a/test/CodeGen/AArch64/atomic-ops-not-barriers.ll b/test/CodeGen/AArch64/atomic-ops-not-barriers.ll index 3c03e47..9888a74 100644 --- a/test/CodeGen/AArch64/atomic-ops-not-barriers.ll +++ b/test/CodeGen/AArch64/atomic-ops-not-barriers.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=aarch64-none-linux-gnu < %s | FileCheck %s +; RUN: llc -mtriple=aarch64-none-linux-gnu -verify-machineinstrs < %s | FileCheck %s define i32 @foo(i32* %var, i1 %cond) { ; CHECK: foo: @@ -9,7 +9,9 @@ simple_ver: store i32 %newval, i32* %var br label %somewhere atomic_ver: - %val = atomicrmw add i32* %var, i32 -1 seq_cst + fence seq_cst + %val = atomicrmw add i32* %var, i32 -1 monotonic + fence seq_cst br label %somewhere ; CHECK: dmb ; CHECK: ldxr diff --git a/test/CodeGen/AArch64/atomic-ops.ll b/test/CodeGen/AArch64/atomic-ops.ll index f3c1617..5e87f21 100644 --- a/test/CodeGen/AArch64/atomic-ops.ll +++ b/test/CodeGen/AArch64/atomic-ops.ll @@ -8,18 +8,18 @@ define i8 @test_atomic_load_add_i8(i8 %offset) nounwind { ; CHECK: test_atomic_load_add_i8: %old = atomicrmw add i8* @var8, i8 %offset seq_cst -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var8 ; CHECK: .LBB{{[0-9]+}}_1: -; CHECK-NEXT: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]] ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: add [[NEW:w[0-9]+]], w[[OLD]], w0 -; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] +; CHECK-NEXT: stlxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i8 %old @@ -27,19 +27,19 @@ define i8 @test_atomic_load_add_i8(i8 %offset) nounwind { define i16 @test_atomic_load_add_i16(i16 %offset) nounwind { ; CHECK: test_atomic_load_add_i16: - %old = atomicrmw add i16* @var16, i16 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw add i16* @var16, i16 %offset acquire +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var16 ; CHECK: .LBB{{[0-9]+}}_1: -; CHECK-NEXT: ldxrh w[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]] ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: add [[NEW:w[0-9]+]], w[[OLD]], w0 ; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i16 %old @@ -47,8 +47,8 @@ define i16 @test_atomic_load_add_i16(i16 %offset) nounwind { define i32 @test_atomic_load_add_i32(i32 %offset) nounwind { ; CHECK: test_atomic_load_add_i32: - %old = atomicrmw add i32* @var32, i32 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw add i32* @var32, i32 %offset release +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var32 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var32 @@ -57,9 +57,9 @@ define i32 @test_atomic_load_add_i32(i32 %offset) nounwind { ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: add [[NEW:w[0-9]+]], w[[OLD]], w0 -; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] +; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i32 %old @@ -67,8 +67,8 @@ define i32 @test_atomic_load_add_i32(i32 %offset) nounwind { define i64 @test_atomic_load_add_i64(i64 %offset) nounwind { ; CHECK: test_atomic_load_add_i64: - %old = atomicrmw add i64* @var64, i64 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw add i64* @var64, i64 %offset monotonic +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var64 @@ -79,7 +79,7 @@ define i64 @test_atomic_load_add_i64(i64 %offset) nounwind { ; CHECK-NEXT: add [[NEW:x[0-9]+]], x[[OLD]], x0 ; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i64 %old @@ -87,8 +87,8 @@ define i64 @test_atomic_load_add_i64(i64 %offset) nounwind { define i8 @test_atomic_load_sub_i8(i8 %offset) nounwind { ; CHECK: test_atomic_load_sub_i8: - %old = atomicrmw sub i8* @var8, i8 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw sub i8* @var8, i8 %offset monotonic +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var8 @@ -99,7 +99,7 @@ define i8 @test_atomic_load_sub_i8(i8 %offset) nounwind { ; CHECK-NEXT: sub [[NEW:w[0-9]+]], w[[OLD]], w0 ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i8 %old @@ -107,8 +107,8 @@ define i8 @test_atomic_load_sub_i8(i8 %offset) nounwind { define i16 @test_atomic_load_sub_i16(i16 %offset) nounwind { ; CHECK: test_atomic_load_sub_i16: - %old = atomicrmw sub i16* @var16, i16 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw sub i16* @var16, i16 %offset release +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var16 @@ -117,9 +117,9 @@ define i16 @test_atomic_load_sub_i16(i16 %offset) nounwind { ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: sub [[NEW:w[0-9]+]], w[[OLD]], w0 -; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] +; CHECK-NEXT: stlxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i16 %old @@ -127,19 +127,19 @@ define i16 @test_atomic_load_sub_i16(i16 %offset) nounwind { define i32 @test_atomic_load_sub_i32(i32 %offset) nounwind { ; CHECK: test_atomic_load_sub_i32: - %old = atomicrmw sub i32* @var32, i32 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw sub i32* @var32, i32 %offset acquire +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var32 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var32 ; CHECK: .LBB{{[0-9]+}}_1: -; CHECK-NEXT: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]] ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: sub [[NEW:w[0-9]+]], w[[OLD]], w0 ; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i32 %old @@ -148,18 +148,18 @@ define i32 @test_atomic_load_sub_i32(i32 %offset) nounwind { define i64 @test_atomic_load_sub_i64(i64 %offset) nounwind { ; CHECK: test_atomic_load_sub_i64: %old = atomicrmw sub i64* @var64, i64 %offset seq_cst -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var64 ; CHECK: .LBB{{[0-9]+}}_1: -; CHECK-NEXT: ldxr x[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxr x[[OLD:[0-9]+]], [x[[ADDR]]] ; x0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: sub [[NEW:x[0-9]+]], x[[OLD]], x0 -; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] +; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i64 %old @@ -167,8 +167,8 @@ define i64 @test_atomic_load_sub_i64(i64 %offset) nounwind { define i8 @test_atomic_load_and_i8(i8 %offset) nounwind { ; CHECK: test_atomic_load_and_i8: - %old = atomicrmw and i8* @var8, i8 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw and i8* @var8, i8 %offset release +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var8 @@ -177,9 +177,9 @@ define i8 @test_atomic_load_and_i8(i8 %offset) nounwind { ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: and [[NEW:w[0-9]+]], w[[OLD]], w0 -; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] +; CHECK-NEXT: stlxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i8 %old @@ -187,8 +187,8 @@ define i8 @test_atomic_load_and_i8(i8 %offset) nounwind { define i16 @test_atomic_load_and_i16(i16 %offset) nounwind { ; CHECK: test_atomic_load_and_i16: - %old = atomicrmw and i16* @var16, i16 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw and i16* @var16, i16 %offset monotonic +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var16 @@ -199,7 +199,7 @@ define i16 @test_atomic_load_and_i16(i16 %offset) nounwind { ; CHECK-NEXT: and [[NEW:w[0-9]+]], w[[OLD]], w0 ; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i16 %old @@ -208,18 +208,18 @@ define i16 @test_atomic_load_and_i16(i16 %offset) nounwind { define i32 @test_atomic_load_and_i32(i32 %offset) nounwind { ; CHECK: test_atomic_load_and_i32: %old = atomicrmw and i32* @var32, i32 %offset seq_cst -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var32 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var32 ; CHECK: .LBB{{[0-9]+}}_1: -; CHECK-NEXT: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]] ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: and [[NEW:w[0-9]+]], w[[OLD]], w0 -; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] +; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i32 %old @@ -227,19 +227,19 @@ define i32 @test_atomic_load_and_i32(i32 %offset) nounwind { define i64 @test_atomic_load_and_i64(i64 %offset) nounwind { ; CHECK: test_atomic_load_and_i64: - %old = atomicrmw and i64* @var64, i64 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw and i64* @var64, i64 %offset acquire +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var64 ; CHECK: .LBB{{[0-9]+}}_1: -; CHECK-NEXT: ldxr x[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxr x[[OLD:[0-9]+]], [x[[ADDR]]] ; x0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: and [[NEW:x[0-9]+]], x[[OLD]], x0 ; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i64 %old @@ -248,18 +248,18 @@ define i64 @test_atomic_load_and_i64(i64 %offset) nounwind { define i8 @test_atomic_load_or_i8(i8 %offset) nounwind { ; CHECK: test_atomic_load_or_i8: %old = atomicrmw or i8* @var8, i8 %offset seq_cst -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var8 ; CHECK: .LBB{{[0-9]+}}_1: -; CHECK-NEXT: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]] ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: orr [[NEW:w[0-9]+]], w[[OLD]], w0 -; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] +; CHECK-NEXT: stlxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i8 %old @@ -267,8 +267,8 @@ define i8 @test_atomic_load_or_i8(i8 %offset) nounwind { define i16 @test_atomic_load_or_i16(i16 %offset) nounwind { ; CHECK: test_atomic_load_or_i16: - %old = atomicrmw or i16* @var16, i16 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw or i16* @var16, i16 %offset monotonic +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var16 @@ -279,7 +279,7 @@ define i16 @test_atomic_load_or_i16(i16 %offset) nounwind { ; CHECK-NEXT: orr [[NEW:w[0-9]+]], w[[OLD]], w0 ; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i16 %old @@ -287,19 +287,19 @@ define i16 @test_atomic_load_or_i16(i16 %offset) nounwind { define i32 @test_atomic_load_or_i32(i32 %offset) nounwind { ; CHECK: test_atomic_load_or_i32: - %old = atomicrmw or i32* @var32, i32 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw or i32* @var32, i32 %offset acquire +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var32 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var32 ; CHECK: .LBB{{[0-9]+}}_1: -; CHECK-NEXT: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]] ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: orr [[NEW:w[0-9]+]], w[[OLD]], w0 ; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i32 %old @@ -307,8 +307,8 @@ define i32 @test_atomic_load_or_i32(i32 %offset) nounwind { define i64 @test_atomic_load_or_i64(i64 %offset) nounwind { ; CHECK: test_atomic_load_or_i64: - %old = atomicrmw or i64* @var64, i64 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw or i64* @var64, i64 %offset release +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var64 @@ -317,9 +317,9 @@ define i64 @test_atomic_load_or_i64(i64 %offset) nounwind { ; x0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: orr [[NEW:x[0-9]+]], x[[OLD]], x0 -; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] +; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i64 %old @@ -327,19 +327,19 @@ define i64 @test_atomic_load_or_i64(i64 %offset) nounwind { define i8 @test_atomic_load_xor_i8(i8 %offset) nounwind { ; CHECK: test_atomic_load_xor_i8: - %old = atomicrmw xor i8* @var8, i8 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw xor i8* @var8, i8 %offset acquire +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var8 ; CHECK: .LBB{{[0-9]+}}_1: -; CHECK-NEXT: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]] ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: eor [[NEW:w[0-9]+]], w[[OLD]], w0 ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i8 %old @@ -347,8 +347,8 @@ define i8 @test_atomic_load_xor_i8(i8 %offset) nounwind { define i16 @test_atomic_load_xor_i16(i16 %offset) nounwind { ; CHECK: test_atomic_load_xor_i16: - %old = atomicrmw xor i16* @var16, i16 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw xor i16* @var16, i16 %offset release +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var16 @@ -357,9 +357,9 @@ define i16 @test_atomic_load_xor_i16(i16 %offset) nounwind { ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: eor [[NEW:w[0-9]+]], w[[OLD]], w0 -; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] +; CHECK-NEXT: stlxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i16 %old @@ -368,18 +368,18 @@ define i16 @test_atomic_load_xor_i16(i16 %offset) nounwind { define i32 @test_atomic_load_xor_i32(i32 %offset) nounwind { ; CHECK: test_atomic_load_xor_i32: %old = atomicrmw xor i32* @var32, i32 %offset seq_cst -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var32 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var32 ; CHECK: .LBB{{[0-9]+}}_1: -; CHECK-NEXT: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]] ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: eor [[NEW:w[0-9]+]], w[[OLD]], w0 -; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] +; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i32 %old @@ -387,8 +387,8 @@ define i32 @test_atomic_load_xor_i32(i32 %offset) nounwind { define i64 @test_atomic_load_xor_i64(i64 %offset) nounwind { ; CHECK: test_atomic_load_xor_i64: - %old = atomicrmw xor i64* @var64, i64 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw xor i64* @var64, i64 %offset monotonic +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var64 @@ -399,7 +399,7 @@ define i64 @test_atomic_load_xor_i64(i64 %offset) nounwind { ; CHECK-NEXT: eor [[NEW:x[0-9]+]], x[[OLD]], x0 ; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i64 %old @@ -407,8 +407,8 @@ define i64 @test_atomic_load_xor_i64(i64 %offset) nounwind { define i8 @test_atomic_load_xchg_i8(i8 %offset) nounwind { ; CHECK: test_atomic_load_xchg_i8: - %old = atomicrmw xchg i8* @var8, i8 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw xchg i8* @var8, i8 %offset monotonic +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var8 @@ -418,7 +418,7 @@ define i8 @test_atomic_load_xchg_i8(i8 %offset) nounwind { ; function there. ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], w0, [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i8 %old @@ -427,17 +427,17 @@ define i8 @test_atomic_load_xchg_i8(i8 %offset) nounwind { define i16 @test_atomic_load_xchg_i16(i16 %offset) nounwind { ; CHECK: test_atomic_load_xchg_i16: %old = atomicrmw xchg i16* @var16, i16 %offset seq_cst -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var16 ; CHECK: .LBB{{[0-9]+}}_1: -; CHECK-NEXT: ldxrh w[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]] ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. -; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], w0, [x[[ADDR]]] +; CHECK-NEXT: stlxrh [[STATUS:w[0-9]+]], w0, [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i16 %old @@ -445,8 +445,8 @@ define i16 @test_atomic_load_xchg_i16(i16 %offset) nounwind { define i32 @test_atomic_load_xchg_i32(i32 %offset) nounwind { ; CHECK: test_atomic_load_xchg_i32: - %old = atomicrmw xchg i32* @var32, i32 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw xchg i32* @var32, i32 %offset release +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var32 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var32 @@ -454,9 +454,9 @@ define i32 @test_atomic_load_xchg_i32(i32 %offset) nounwind { ; CHECK-NEXT: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]] ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. -; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], w0, [x[[ADDR]]] +; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], w0, [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i32 %old @@ -464,18 +464,18 @@ define i32 @test_atomic_load_xchg_i32(i32 %offset) nounwind { define i64 @test_atomic_load_xchg_i64(i64 %offset) nounwind { ; CHECK: test_atomic_load_xchg_i64: - %old = atomicrmw xchg i64* @var64, i64 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw xchg i64* @var64, i64 %offset acquire +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var64 ; CHECK: .LBB{{[0-9]+}}_1: -; CHECK-NEXT: ldxr x[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxr x[[OLD:[0-9]+]], [x[[ADDR]]] ; x0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], x0, [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i64 %old @@ -484,20 +484,20 @@ define i64 @test_atomic_load_xchg_i64(i64 %offset) nounwind { define i8 @test_atomic_load_min_i8(i8 %offset) nounwind { ; CHECK: test_atomic_load_min_i8: - %old = atomicrmw min i8* @var8, i8 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw min i8* @var8, i8 %offset acquire +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var8 ; CHECK: .LBB{{[0-9]+}}_1: -; CHECK-NEXT: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]] ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: cmp w0, w[[OLD]], sxtb ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, gt ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i8 %old @@ -505,8 +505,8 @@ define i8 @test_atomic_load_min_i8(i8 %offset) nounwind { define i16 @test_atomic_load_min_i16(i16 %offset) nounwind { ; CHECK: test_atomic_load_min_i16: - %old = atomicrmw min i16* @var16, i16 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw min i16* @var16, i16 %offset release +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var16 @@ -516,9 +516,9 @@ define i16 @test_atomic_load_min_i16(i16 %offset) nounwind { ; function there. ; CHECK-NEXT: cmp w0, w[[OLD]], sxth ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, gt -; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] +; CHECK-NEXT: stlxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i16 %old @@ -526,8 +526,8 @@ define i16 @test_atomic_load_min_i16(i16 %offset) nounwind { define i32 @test_atomic_load_min_i32(i32 %offset) nounwind { ; CHECK: test_atomic_load_min_i32: - %old = atomicrmw min i32* @var32, i32 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw min i32* @var32, i32 %offset monotonic +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var32 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var32 @@ -539,7 +539,7 @@ define i32 @test_atomic_load_min_i32(i32 %offset) nounwind { ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, gt ; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i32 %old @@ -548,19 +548,19 @@ define i32 @test_atomic_load_min_i32(i32 %offset) nounwind { define i64 @test_atomic_load_min_i64(i64 %offset) nounwind { ; CHECK: test_atomic_load_min_i64: %old = atomicrmw min i64* @var64, i64 %offset seq_cst -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var64 ; CHECK: .LBB{{[0-9]+}}_1: -; CHECK-NEXT: ldxr x[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxr x[[OLD:[0-9]+]], [x[[ADDR]]] ; x0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: cmp x0, x[[OLD]] ; CHECK-NEXT: csel [[NEW:x[0-9]+]], x[[OLD]], x0, gt -; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] +; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i64 %old @@ -569,19 +569,19 @@ define i64 @test_atomic_load_min_i64(i64 %offset) nounwind { define i8 @test_atomic_load_max_i8(i8 %offset) nounwind { ; CHECK: test_atomic_load_max_i8: %old = atomicrmw max i8* @var8, i8 %offset seq_cst -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var8 ; CHECK: .LBB{{[0-9]+}}_1: -; CHECK-NEXT: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]] ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: cmp w0, w[[OLD]], sxtb ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, lt -; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] +; CHECK-NEXT: stlxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i8 %old @@ -589,20 +589,20 @@ define i8 @test_atomic_load_max_i8(i8 %offset) nounwind { define i16 @test_atomic_load_max_i16(i16 %offset) nounwind { ; CHECK: test_atomic_load_max_i16: - %old = atomicrmw max i16* @var16, i16 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw max i16* @var16, i16 %offset acquire +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var16 ; CHECK: .LBB{{[0-9]+}}_1: -; CHECK-NEXT: ldxrh w[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]] ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: cmp w0, w[[OLD]], sxth ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, lt ; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i16 %old @@ -610,8 +610,8 @@ define i16 @test_atomic_load_max_i16(i16 %offset) nounwind { define i32 @test_atomic_load_max_i32(i32 %offset) nounwind { ; CHECK: test_atomic_load_max_i32: - %old = atomicrmw max i32* @var32, i32 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw max i32* @var32, i32 %offset release +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var32 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var32 @@ -621,9 +621,9 @@ define i32 @test_atomic_load_max_i32(i32 %offset) nounwind { ; function there. ; CHECK-NEXT: cmp w0, w[[OLD]] ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, lt -; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] +; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i32 %old @@ -631,8 +631,8 @@ define i32 @test_atomic_load_max_i32(i32 %offset) nounwind { define i64 @test_atomic_load_max_i64(i64 %offset) nounwind { ; CHECK: test_atomic_load_max_i64: - %old = atomicrmw max i64* @var64, i64 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw max i64* @var64, i64 %offset monotonic +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var64 @@ -644,7 +644,7 @@ define i64 @test_atomic_load_max_i64(i64 %offset) nounwind { ; CHECK-NEXT: csel [[NEW:x[0-9]+]], x[[OLD]], x0, lt ; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i64 %old @@ -652,8 +652,8 @@ define i64 @test_atomic_load_max_i64(i64 %offset) nounwind { define i8 @test_atomic_load_umin_i8(i8 %offset) nounwind { ; CHECK: test_atomic_load_umin_i8: - %old = atomicrmw umin i8* @var8, i8 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw umin i8* @var8, i8 %offset monotonic +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var8 @@ -665,7 +665,7 @@ define i8 @test_atomic_load_umin_i8(i8 %offset) nounwind { ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, hi ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i8 %old @@ -673,20 +673,20 @@ define i8 @test_atomic_load_umin_i8(i8 %offset) nounwind { define i16 @test_atomic_load_umin_i16(i16 %offset) nounwind { ; CHECK: test_atomic_load_umin_i16: - %old = atomicrmw umin i16* @var16, i16 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw umin i16* @var16, i16 %offset acquire +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var16 ; CHECK: .LBB{{[0-9]+}}_1: -; CHECK-NEXT: ldxrh w[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]] ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: cmp w0, w[[OLD]], uxth ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, hi ; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i16 %old @@ -695,19 +695,19 @@ define i16 @test_atomic_load_umin_i16(i16 %offset) nounwind { define i32 @test_atomic_load_umin_i32(i32 %offset) nounwind { ; CHECK: test_atomic_load_umin_i32: %old = atomicrmw umin i32* @var32, i32 %offset seq_cst -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var32 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var32 ; CHECK: .LBB{{[0-9]+}}_1: -; CHECK-NEXT: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]] ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: cmp w0, w[[OLD]] ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, hi -; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] +; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i32 %old @@ -715,20 +715,20 @@ define i32 @test_atomic_load_umin_i32(i32 %offset) nounwind { define i64 @test_atomic_load_umin_i64(i64 %offset) nounwind { ; CHECK: test_atomic_load_umin_i64: - %old = atomicrmw umin i64* @var64, i64 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw umin i64* @var64, i64 %offset acq_rel +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var64 ; CHECK: .LBB{{[0-9]+}}_1: -; CHECK-NEXT: ldxr x[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxr x[[OLD:[0-9]+]], [x[[ADDR]]] ; x0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: cmp x0, x[[OLD]] ; CHECK-NEXT: csel [[NEW:x[0-9]+]], x[[OLD]], x0, hi -; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] +; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i64 %old @@ -736,20 +736,20 @@ define i64 @test_atomic_load_umin_i64(i64 %offset) nounwind { define i8 @test_atomic_load_umax_i8(i8 %offset) nounwind { ; CHECK: test_atomic_load_umax_i8: - %old = atomicrmw umax i8* @var8, i8 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw umax i8* @var8, i8 %offset acq_rel +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var8 ; CHECK: .LBB{{[0-9]+}}_1: -; CHECK-NEXT: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]] ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: cmp w0, w[[OLD]], uxtb ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, lo -; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] +; CHECK-NEXT: stlxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i8 %old @@ -757,8 +757,8 @@ define i8 @test_atomic_load_umax_i8(i8 %offset) nounwind { define i16 @test_atomic_load_umax_i16(i16 %offset) nounwind { ; CHECK: test_atomic_load_umax_i16: - %old = atomicrmw umax i16* @var16, i16 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw umax i16* @var16, i16 %offset monotonic +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var16 @@ -770,7 +770,7 @@ define i16 @test_atomic_load_umax_i16(i16 %offset) nounwind { ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, lo ; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i16 %old @@ -779,19 +779,19 @@ define i16 @test_atomic_load_umax_i16(i16 %offset) nounwind { define i32 @test_atomic_load_umax_i32(i32 %offset) nounwind { ; CHECK: test_atomic_load_umax_i32: %old = atomicrmw umax i32* @var32, i32 %offset seq_cst -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var32 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var32 ; CHECK: .LBB{{[0-9]+}}_1: -; CHECK-NEXT: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]] ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: cmp w0, w[[OLD]] ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, lo -; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] +; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i32 %old @@ -799,8 +799,8 @@ define i32 @test_atomic_load_umax_i32(i32 %offset) nounwind { define i64 @test_atomic_load_umax_i64(i64 %offset) nounwind { ; CHECK: test_atomic_load_umax_i64: - %old = atomicrmw umax i64* @var64, i64 %offset seq_cst -; CHECK: dmb ish + %old = atomicrmw umax i64* @var64, i64 %offset release +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var64 @@ -810,9 +810,9 @@ define i64 @test_atomic_load_umax_i64(i64 %offset) nounwind { ; function there. ; CHECK-NEXT: cmp x0, x[[OLD]] ; CHECK-NEXT: csel [[NEW:x[0-9]+]], x[[OLD]], x0, lo -; CHECK-NEXT: stxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] +; CHECK-NEXT: stlxr [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], .LBB{{[0-9]+}}_1 -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i64 %old @@ -820,13 +820,13 @@ define i64 @test_atomic_load_umax_i64(i64 %offset) nounwind { define i8 @test_atomic_cmpxchg_i8(i8 %wanted, i8 %new) nounwind { ; CHECK: test_atomic_cmpxchg_i8: - %old = cmpxchg i8* @var8, i8 %wanted, i8 %new seq_cst -; CHECK: dmb ish + %old = cmpxchg i8* @var8, i8 %wanted, i8 %new acquire +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var8 ; CHECK: [[STARTAGAIN:.LBB[0-9]+_[0-9]+]]: -; CHECK-NEXT: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]] ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: cmp w[[OLD]], w0 @@ -834,7 +834,7 @@ define i8 @test_atomic_cmpxchg_i8(i8 %wanted, i8 %new) nounwind { ; As above, w1 is a reasonable guess. ; CHECK: stxrb [[STATUS:w[0-9]+]], w1, [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], [[STARTAGAIN]] -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i8 %old @@ -843,20 +843,20 @@ define i8 @test_atomic_cmpxchg_i8(i8 %wanted, i8 %new) nounwind { define i16 @test_atomic_cmpxchg_i16(i16 %wanted, i16 %new) nounwind { ; CHECK: test_atomic_cmpxchg_i16: %old = cmpxchg i16* @var16, i16 %wanted, i16 %new seq_cst -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var16 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var16 ; CHECK: [[STARTAGAIN:.LBB[0-9]+_[0-9]+]]: -; CHECK-NEXT: ldxrh w[[OLD:[0-9]+]], [x[[ADDR]]] +; CHECK-NEXT: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]] ; w0 below is a reasonable guess but could change: it certainly comes into the ; function there. ; CHECK-NEXT: cmp w[[OLD]], w0 ; CHECK-NEXT: b.ne [[GET_OUT:.LBB[0-9]+_[0-9]+]] ; As above, w1 is a reasonable guess. -; CHECK: stxrh [[STATUS:w[0-9]+]], w1, [x[[ADDR]]] +; CHECK: stlxrh [[STATUS:w[0-9]+]], w1, [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], [[STARTAGAIN]] -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i16 %old @@ -864,8 +864,8 @@ define i16 @test_atomic_cmpxchg_i16(i16 %wanted, i16 %new) nounwind { define i32 @test_atomic_cmpxchg_i32(i32 %wanted, i32 %new) nounwind { ; CHECK: test_atomic_cmpxchg_i32: - %old = cmpxchg i32* @var32, i32 %wanted, i32 %new seq_cst -; CHECK: dmb ish + %old = cmpxchg i32* @var32, i32 %wanted, i32 %new release +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var32 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var32 @@ -876,9 +876,9 @@ define i32 @test_atomic_cmpxchg_i32(i32 %wanted, i32 %new) nounwind { ; CHECK-NEXT: cmp w[[OLD]], w0 ; CHECK-NEXT: b.ne [[GET_OUT:.LBB[0-9]+_[0-9]+]] ; As above, w1 is a reasonable guess. -; CHECK: stxr [[STATUS:w[0-9]+]], w1, [x[[ADDR]]] +; CHECK: stlxr [[STATUS:w[0-9]+]], w1, [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], [[STARTAGAIN]] -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i32 %old @@ -886,8 +886,8 @@ define i32 @test_atomic_cmpxchg_i32(i32 %wanted, i32 %new) nounwind { define i64 @test_atomic_cmpxchg_i64(i64 %wanted, i64 %new) nounwind { ; CHECK: test_atomic_cmpxchg_i64: - %old = cmpxchg i64* @var64, i64 %wanted, i64 %new seq_cst -; CHECK: dmb ish + %old = cmpxchg i64* @var64, i64 %wanted, i64 %new monotonic +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var64 ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var64 @@ -900,7 +900,7 @@ define i64 @test_atomic_cmpxchg_i64(i64 %wanted, i64 %new) nounwind { ; As above, w1 is a reasonable guess. ; CHECK: stxr [[STATUS:w[0-9]+]], x1, [x[[ADDR]]] ; CHECK-NEXT: cbnz [[STATUS]], [[STARTAGAIN]] -; CHECK: dmb ish +; CHECK-NOT: dmb ; CHECK: mov x0, x[[OLD]] ret i64 %old @@ -933,19 +933,26 @@ define i8 @test_atomic_load_monotonic_regoff_i8(i64 %base, i64 %off) nounwind { define i8 @test_atomic_load_acquire_i8() nounwind { ; CHECK: test_atomic_load_acquire_i8: %val = load atomic i8* @var8 acquire, align 1 +; CHECK-NOT: dmb ; CHECK: adrp [[TMPADDR:x[0-9]+]], var8 +; CHECK-NOT: dmb ; CHECK: add x[[ADDR:[0-9]+]], [[TMPADDR]], #:lo12:var8 - +; CHECK-NOT: dmb ; CHECK: ldarb w0, [x[[ADDR]]] +; CHECK-NOT: dmb ret i8 %val } define i8 @test_atomic_load_seq_cst_i8() nounwind { ; CHECK: test_atomic_load_seq_cst_i8: %val = load atomic i8* @var8 seq_cst, align 1 -; CHECK: adrp x[[HIADDR:[0-9]+]], var8 -; CHECK: ldrb w0, [x[[HIADDR]], #:lo12:var8] -; CHECK: dmb ish +; CHECK-NOT: dmb +; CHECK: adrp [[HIADDR:x[0-9]+]], var8 +; CHECK-NOT: dmb +; CHECK: add x[[ADDR:[0-9]+]], [[HIADDR]], #:lo12:var8 +; CHECK-NOT: dmb +; CHECK: ldarb w0, [x[[ADDR]]] +; CHECK-NOT: dmb ret i8 %val } @@ -954,6 +961,7 @@ define i16 @test_atomic_load_monotonic_i16() nounwind { %val = load atomic i16* @var16 monotonic, align 2 ; CHECK-NOT: dmb ; CHECK: adrp x[[HIADDR:[0-9]+]], var16 +; CHECK-NOT: dmb ; CHECK: ldrh w0, [x[[HIADDR]], #:lo12:var16] ; CHECK-NOT: dmb @@ -976,9 +984,13 @@ define i32 @test_atomic_load_monotonic_regoff_i32(i64 %base, i64 %off) nounwind define i64 @test_atomic_load_seq_cst_i64() nounwind { ; CHECK: test_atomic_load_seq_cst_i64: %val = load atomic i64* @var64 seq_cst, align 8 -; CHECK: adrp x[[HIADDR:[0-9]+]], var64 -; CHECK: ldr x0, [x[[HIADDR]], #:lo12:var64] -; CHECK: dmb ish +; CHECK-NOT: dmb +; CHECK: adrp [[HIADDR:x[0-9]+]], var64 +; CHECK-NOT: dmb +; CHECK: add x[[ADDR:[0-9]+]], [[HIADDR]], #:lo12:var64 +; CHECK-NOT: dmb +; CHECK: ldar x0, [x[[ADDR]]] +; CHECK-NOT: dmb ret i64 %val } @@ -1005,20 +1017,26 @@ define void @test_atomic_store_monotonic_regoff_i8(i64 %base, i64 %off, i8 %val) define void @test_atomic_store_release_i8(i8 %val) nounwind { ; CHECK: test_atomic_store_release_i8: store atomic i8 %val, i8* @var8 release, align 1 +; CHECK-NOT: dmb ; CHECK: adrp [[HIADDR:x[0-9]+]], var8 +; CHECK-NOT: dmb ; CHECK: add x[[ADDR:[0-9]+]], [[HIADDR]], #:lo12:var8 +; CHECK-NOT: dmb ; CHECK: stlrb w0, [x[[ADDR]]] - +; CHECK-NOT: dmb ret void } define void @test_atomic_store_seq_cst_i8(i8 %val) nounwind { ; CHECK: test_atomic_store_seq_cst_i8: store atomic i8 %val, i8* @var8 seq_cst, align 1 +; CHECK-NOT: dmb ; CHECK: adrp [[HIADDR:x[0-9]+]], var8 +; CHECK-NOT: dmb ; CHECK: add x[[ADDR:[0-9]+]], [[HIADDR]], #:lo12:var8 +; CHECK-NOT: dmb ; CHECK: stlrb w0, [x[[ADDR]]] -; CHECK: dmb ish +; CHECK-NOT: dmb ret void } @@ -1026,9 +1044,11 @@ define void @test_atomic_store_seq_cst_i8(i8 %val) nounwind { define void @test_atomic_store_monotonic_i16(i16 %val) nounwind { ; CHECK: test_atomic_store_monotonic_i16: store atomic i16 %val, i16* @var16 monotonic, align 2 +; CHECK-NOT: dmb ; CHECK: adrp x[[HIADDR:[0-9]+]], var16 +; CHECK-NOT: dmb ; CHECK: strh w0, [x[[HIADDR]], #:lo12:var16] - +; CHECK-NOT: dmb ret void } @@ -1039,7 +1059,9 @@ define void @test_atomic_store_monotonic_regoff_i32(i64 %base, i64 %off, i32 %va %addr = inttoptr i64 %addr_int to i32* store atomic i32 %val, i32* %addr monotonic, align 4 +; CHECK-NOT: dmb ; CHECK: str w2, [x0, x1] +; CHECK-NOT: dmb ret void } @@ -1047,9 +1069,12 @@ define void @test_atomic_store_monotonic_regoff_i32(i64 %base, i64 %off, i32 %va define void @test_atomic_store_release_i64(i64 %val) nounwind { ; CHECK: test_atomic_store_release_i64: store atomic i64 %val, i64* @var64 release, align 8 +; CHECK-NOT: dmb ; CHECK: adrp [[HIADDR:x[0-9]+]], var64 +; CHECK-NOT: dmb ; CHECK: add x[[ADDR:[0-9]+]], [[HIADDR]], #:lo12:var64 +; CHECK-NOT: dmb ; CHECK: stlr x0, [x[[ADDR]]] - +; CHECK-NOT: dmb ret void } diff --git a/test/CodeGen/AArch64/elf-extern.ll b/test/CodeGen/AArch64/elf-extern.ll index ee89d8d..8bf1b2f 100644 --- a/test/CodeGen/AArch64/elf-extern.ll +++ b/test/CodeGen/AArch64/elf-extern.ll @@ -1,4 +1,4 @@ -; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -filetype=obj | elf-dump | FileCheck %s +; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -filetype=obj | llvm-readobj -r | FileCheck %s ; External symbols are a different concept to global variables but should still ; get relocations and so on when used. @@ -10,12 +10,8 @@ define i32 @check_extern() { ret i32 0 } -; CHECK: .rela.text -; CHECK: ('r_sym', 0x00000009) -; CHECK-NEXT: ('r_type', 0x0000011b) - -; CHECK: .symtab -; CHECK: Symbol 9 -; CHECK-NEXT: memcpy - - +; CHECK: Relocations [ +; CHECK: Section (1) .text { +; CHECK: 0x{{[0-9,A-F]+}} R_AARCH64_CALL26 memcpy +; CHECK: } +; CHECK: ] diff --git a/test/CodeGen/AArch64/jump-table.ll b/test/CodeGen/AArch64/jump-table.ll index dcf9f4e..d3299e1 100644 --- a/test/CodeGen/AArch64/jump-table.ll +++ b/test/CodeGen/AArch64/jump-table.ll @@ -1,5 +1,5 @@ ; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s -; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -filetype=obj | elf-dump | FileCheck %s -check-prefix=CHECK-ELF +; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -filetype=obj | llvm-readobj -r | FileCheck %s -check-prefix=CHECK-ELF define i32 @test_jumptable(i32 %in) { ; CHECK: test_jumptable @@ -44,13 +44,15 @@ lbl4: ; ELF tests: ; First make sure we get a page/lo12 pair in .text to pick up the jump-table -; CHECK-ELF: .rela.text -; CHECK-ELF: ('r_sym', 0x00000008) -; CHECK-ELF-NEXT: ('r_type', 0x00000113) -; CHECK-ELF: ('r_sym', 0x00000008) -; CHECK-ELF-NEXT: ('r_type', 0x00000115) + +; CHECK-ELF: Relocations [ +; CHECK-ELF: Section ({{[0-9]+}}) .text { +; CHECK-ELF-NEXT: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 .rodata +; CHECK-ELF-NEXT: 0x{{[0-9,A-F]+}} R_AARCH64_ADD_ABS_LO12_NC .rodata +; CHECK-ELF: } ; Also check the targets in .rodata are relocated -; CHECK-ELF: .rela.rodata -; CHECK-ELF: ('r_sym', 0x00000005) -; CHECK-ELF-NEXT: ('r_type', 0x00000101)
\ No newline at end of file +; CHECK-ELF: Section ({{[0-9]+}}) .rodata { +; CHECK-ELF-NEXT: 0x{{[0-9,A-F]+}} R_AARCH64_ABS64 .text +; CHECK-ELF: } +; CHECK-ELF: ] diff --git a/test/CodeGen/ARM/2010-06-21-nondarwin-tc.ll b/test/CodeGen/ARM/2010-06-21-nondarwin-tc.ll index ac8e809..ac8e809 100755..100644 --- a/test/CodeGen/ARM/2010-06-21-nondarwin-tc.ll +++ b/test/CodeGen/ARM/2010-06-21-nondarwin-tc.ll diff --git a/test/CodeGen/ARM/2010-08-04-StackVariable.ll b/test/CodeGen/ARM/2010-08-04-StackVariable.ll index 9269d64..112512f 100644 --- a/test/CodeGen/ARM/2010-08-04-StackVariable.ll +++ b/test/CodeGen/ARM/2010-08-04-StackVariable.ll @@ -76,27 +76,27 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!3} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"SVal", metadata !"SVal", metadata !"", metadata !2, i32 11, metadata !14, i1 false, i1 false, i32 0, i32 0, null, i1 false, i1 false, null} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786478, metadata !1, metadata !"SVal", metadata !"SVal", metadata !"", metadata !2, i32 11, metadata !14, i1 false, i1 false, i32 0, i32 0, null, i1 false, i1 false, null} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786451, metadata !2, metadata !"SVal", metadata !2, i32 1, i64 128, i64 64, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_structure_type ] !2 = metadata !{i32 786473, metadata !48} ; [ DW_TAG_file_type ] -!3 = metadata !{i32 786449, i32 0, i32 4, metadata !2, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 false, metadata !"", i32 0, metadata !47, metadata !47, metadata !46, metadata !47, metadata !""} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 786449, i32 4, metadata !2, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 false, metadata !"", i32 0, metadata !47, metadata !47, metadata !46, metadata !47, metadata !47, metadata !""} ; [ DW_TAG_compile_unit ] !4 = metadata !{metadata !5, metadata !7, metadata !0, metadata !9} !5 = metadata !{i32 786445, metadata !1, metadata !"Data", metadata !2, i32 7, i64 64, i64 64, i64 0, i32 0, metadata !6} ; [ DW_TAG_member ] !6 = metadata !{i32 786447, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ] !7 = metadata !{i32 786445, metadata !1, metadata !"Kind", metadata !2, i32 8, i64 32, i64 32, i64 64, i32 0, metadata !8} ; [ DW_TAG_member ] !8 = metadata !{i32 786468, metadata !2, metadata !"unsigned int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] -!9 = metadata !{i32 786478, i32 0, metadata !1, metadata !"~SVal", metadata !"~SVal", metadata !"", metadata !2, i32 12, metadata !10, i1 false, i1 false, i32 0, i32 0, null, i1 false, i1 false, null} ; [ DW_TAG_subprogram ] +!9 = metadata !{i32 786478, metadata !1, metadata !"~SVal", metadata !"~SVal", metadata !"", metadata !2, i32 12, metadata !10, i1 false, i1 false, i32 0, i32 0, null, i1 false, i1 false, null} ; [ DW_TAG_subprogram ] !10 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_subroutine_type ] !11 = metadata !{null, metadata !12, metadata !13} !12 = metadata !{i32 786447, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !1} ; [ DW_TAG_pointer_type ] !13 = metadata !{i32 786468, metadata !2, metadata !"int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !14 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !15, i32 0, null} ; [ DW_TAG_subroutine_type ] !15 = metadata !{null, metadata !12} -!16 = metadata !{i32 786478, i32 0, metadata !1, metadata !"SVal", metadata !"SVal", metadata !"_ZN4SValC1Ev", metadata !2, i32 11, metadata !14, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, void (%struct.SVal*)* @_ZN4SValC1Ev} ; [ DW_TAG_subprogram ] -!17 = metadata !{i32 786478, i32 0, metadata !2, metadata !"foo", metadata !"foo", metadata !"_Z3fooi4SVal", metadata !2, i32 16, metadata !18, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 (i32, %struct.SVal*)* @_Z3fooi4SVal} ; [ DW_TAG_subprogram ] +!16 = metadata !{i32 786478, metadata !1, metadata !"SVal", metadata !"SVal", metadata !"_ZN4SValC1Ev", metadata !2, i32 11, metadata !14, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, void (%struct.SVal*)* @_ZN4SValC1Ev} ; [ DW_TAG_subprogram ] +!17 = metadata !{i32 786478, metadata !2, metadata !"foo", metadata !"foo", metadata !"_Z3fooi4SVal", metadata !2, i32 16, metadata !18, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 (i32, %struct.SVal*)* @_Z3fooi4SVal} ; [ DW_TAG_subprogram ] !18 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !19, i32 0, null} ; [ DW_TAG_subroutine_type ] !19 = metadata !{metadata !13, metadata !13, metadata !1} -!20 = metadata !{i32 786478, i32 0, metadata !2, metadata !"main", metadata !"main", metadata !"main", metadata !2, i32 23, metadata !21, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!20 = metadata !{i32 786478, metadata !2, metadata !"main", metadata !"main", metadata !"main", metadata !2, i32 23, metadata !21, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] !21 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !22, i32 0, null} ; [ DW_TAG_subroutine_type ] !22 = metadata !{metadata !13} !23 = metadata !{i32 786689, metadata !17, metadata !"i", metadata !2, i32 16, metadata !13, i32 0, i32 0} ; [ DW_TAG_arg_variable ] @@ -104,7 +104,7 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !25 = metadata !{i32 786689, metadata !17, metadata !"location", metadata !2, i32 16, metadata !26, i32 0, i32 0} ; [ DW_TAG_arg_variable ] !26 = metadata !{i32 786448, metadata !2, metadata !"SVal", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !1} ; [ DW_TAG_reference_type ] !27 = metadata !{i32 17, i32 0, metadata !28, null} -!28 = metadata !{i32 786443, metadata !17, i32 16, i32 0, metadata !2, i32 2} ; [ DW_TAG_lexical_block ] +!28 = metadata !{i32 786443, metadata !2, metadata !17, i32 16, i32 0, i32 2} ; [ DW_TAG_lexical_block ] !29 = metadata !{i32 18, i32 0, metadata !28, null} !30 = metadata !{i32 20, i32 0, metadata !28, null} !31 = metadata !{i32 786689, metadata !16, metadata !"this", metadata !2, i32 11, metadata !32, i32 0, i32 0} ; [ DW_TAG_arg_variable ] @@ -112,11 +112,11 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !33 = metadata !{i32 786447, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !1} ; [ DW_TAG_pointer_type ] !34 = metadata !{i32 11, i32 0, metadata !16, null} !35 = metadata !{i32 11, i32 0, metadata !36, null} -!36 = metadata !{i32 786443, metadata !37, i32 11, i32 0, metadata !2, i32 1} ; [ DW_TAG_lexical_block ] -!37 = metadata !{i32 786443, metadata !16, i32 11, i32 0, metadata !2, i32 0} ; [ DW_TAG_lexical_block ] +!36 = metadata !{i32 786443, metadata !2, metadata !37, i32 11, i32 0, i32 1} ; [ DW_TAG_lexical_block ] +!37 = metadata !{i32 786443, metadata !2, metadata !16, i32 11, i32 0, i32 0} ; [ DW_TAG_lexical_block ] !38 = metadata !{i32 786688, metadata !39, metadata !"v", metadata !2, i32 24, metadata !1, i32 0, i32 0} ; [ DW_TAG_auto_variable ] -!39 = metadata !{i32 786443, metadata !40, i32 23, i32 0, metadata !2, i32 4} ; [ DW_TAG_lexical_block ] -!40 = metadata !{i32 786443, metadata !20, i32 23, i32 0, metadata !2, i32 3} ; [ DW_TAG_lexical_block ] +!39 = metadata !{i32 786443, metadata !2, metadata !40, i32 23, i32 0, i32 4} ; [ DW_TAG_lexical_block ] +!40 = metadata !{i32 786443, metadata !2, metadata !20, i32 23, i32 0, i32 3} ; [ DW_TAG_lexical_block ] !41 = metadata !{i32 24, i32 0, metadata !39, null} !42 = metadata !{i32 25, i32 0, metadata !39, null} !43 = metadata !{i32 26, i32 0, metadata !39, null} diff --git a/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll b/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll index 36d1575..b253fef 100644 --- a/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll +++ b/test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll @@ -1,36 +1,47 @@ ; RUN: llc %s -mtriple=arm-linux-gnueabi -filetype=obj -o - | \ -; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=BASIC %s +; RUN: llvm-readobj -s -sd | FileCheck -check-prefix=BASIC %s ; RUN: llc %s -mtriple=armv7-linux-gnueabi -march=arm -mcpu=cortex-a8 \ ; RUN: -mattr=-neon,-vfp3,+vfp2 \ ; RUN: -arm-reserve-r9 -filetype=obj -o - | \ -; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=CORTEXA8 %s +; RUN: llvm-readobj -s -sd | FileCheck -check-prefix=CORTEXA8 %s ; This tests that the extpected ARM attributes are emitted. ; -; BASIC: .ARM.attributes -; BASIC-NEXT: 0x70000003 -; BASIC-NEXT: 0x00000000 -; BASIC-NEXT: 0x00000000 -; BASIC-NEXT: 0x0000003c -; BASIC-NEXT: 0x00000022 -; BASIC-NEXT: 0x00000000 -; BASIC-NEXT: 0x00000000 -; BASIC-NEXT: 0x00000001 -; BASIC-NEXT: 0x00000000 -; BASIC-NEXT: '41210000 00616561 62690001 17000000 060a0741 08010902 14011501 17031801 1901' +; BASIC: Section { +; BASIC: Name: .ARM.attributes +; BASIC-NEXT: Type: SHT_ARM_ATTRIBUTES +; BASIC-NEXT: Flags [ (0x0) +; BASIC-NEXT: ] +; BASIC-NEXT: Address: 0x0 +; BASIC-NEXT: Offset: 0x3C +; BASIC-NEXT: Size: 34 +; BASIC-NEXT: Link: 0 +; BASIC-NEXT: Info: 0 +; BASIC-NEXT: AddressAlignment: 1 +; BASIC-NEXT: EntrySize: 0 +; BASIC-NEXT: SectionData ( +; BASIC-NEXT: 0000: 41210000 00616561 62690001 17000000 +; BASIC-NEXT: 0010: 060A0741 08010902 14011501 17031801 +; BASIC-NEXT: 0020: 1901 +; BASIC-NEXT: ) -; CORTEXA8: .ARM.attributes -; CORTEXA8-NEXT: 0x70000003 -; CORTEXA8-NEXT: 0x00000000 -; CORTEXA8-NEXT: 0x00000000 -; CORTEXA8-NEXT: 0x0000003c -; CORTEXA8-NEXT: 0x0000002f -; CORTEXA8-NEXT: 0x00000000 -; CORTEXA8-NEXT: 0x00000000 -; CORTEXA8-NEXT: 0x00000001 -; CORTEXA8-NEXT: 0x00000000 -; CORTEXA8-NEXT: '412e0000 00616561 62690001 24000000 05434f52 5445582d 41380006 0a074108 0109020a 02140115 01170318 011901' +; CORTEXA8: Name: .ARM.attributes +; CORTEXA8-NEXT: Type: SHT_ARM_ATTRIBUTES +; CORTEXA8-NEXT: Flags [ (0x0) +; CORTEXA8-NEXT: ] +; CORTEXA8-NEXT: Address: 0x0 +; CORTEXA8-NEXT: Offset: 0x3C +; CORTEXA8-NEXT: Size: 47 +; CORTEXA8-NEXT: Link: 0 +; CORTEXA8-NEXT: Info: 0 +; CORTEXA8-NEXT: AddressAlignment: 1 +; CORTEXA8-NEXT: EntrySize: 0 +; CORTEXA8-NEXT: SectionData ( +; CORTEXA8-NEXT: 0000: 412E0000 00616561 62690001 24000000 +; CORTEXA8-NEXT: 0010: 05434F52 5445582D 41380006 0A074108 +; CORTEXA8-NEXT: 0020: 0109020A 02140115 01170318 011901 +; CORTEXA8-NEXT: ) define i32 @f(i64 %z) { ret i32 0 diff --git a/test/CodeGen/ARM/2010-11-30-reloc-movt.ll b/test/CodeGen/ARM/2010-11-30-reloc-movt.ll index 94a0541..9eecd04 100644 --- a/test/CodeGen/ARM/2010-11-30-reloc-movt.ll +++ b/test/CodeGen/ARM/2010-11-30-reloc-movt.ll @@ -1,5 +1,5 @@ ; RUN: llc %s -mtriple=armv7-linux-gnueabi -filetype=obj -o - | \ -; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=OBJ %s +; RUN: llvm-readobj -s -sr -sd | FileCheck -check-prefix=OBJ %s target triple = "armv7-none-linux-gnueabi" @@ -9,32 +9,17 @@ define arm_aapcs_vfpcc i32 @barf() nounwind { entry: %0 = tail call arm_aapcs_vfpcc i32 @foo(i8* @a) nounwind ret i32 %0 -; OBJ: '.text' -; OBJ-NEXT: 'sh_type' -; OBJ-NEXT: 'sh_flags' -; OBJ-NEXT: 'sh_addr' -; OBJ-NEXT: 'sh_offset' -; OBJ-NEXT: 'sh_size' -; OBJ-NEXT: 'sh_link' -; OBJ-NEXT: 'sh_info' -; OBJ-NEXT: 'sh_addralign' -; OBJ-NEXT: 'sh_entsize' -; OBJ-NEXT: '_section_data', '00482de9 000000e3 000040e3 feffffeb 0088bde8' - -; OBJ: Relocation 0 -; OBJ-NEXT: 'r_offset', 0x00000004 -; OBJ-NEXT: 'r_sym', 0x000009 -; OBJ-NEXT: 'r_type', 0x2b - -; OBJ: Relocation 1 -; OBJ-NEXT: 'r_offset', 0x00000008 -; OBJ-NEXT: 'r_sym' -; OBJ-NEXT: 'r_type', 0x2c - -; OBJ: # Relocation 2 -; OBJ-NEXT: 'r_offset', 0x0000000c -; OBJ-NEXT: 'r_sym', 0x00000a -; OBJ-NEXT: 'r_type', 0x1c +; OBJ: Section { +; OBJ: Name: .text +; OBJ: Relocations [ +; OBJ-NEXT: 0x4 R_ARM_MOVW_ABS_NC a +; OBJ-NEXT: 0x8 R_ARM_MOVT_ABS +; OBJ-NEXT: 0xC R_ARM_CALL foo +; OBJ-NEXT: ] +; OBJ-NEXT: SectionData ( +; OBJ-NEXT: 0000: 00482DE9 000000E3 000040E3 FEFFFFEB +; OBJ-NEXT: 0010: 0088BDE8 +; OBJ-NEXT: ) } diff --git a/test/CodeGen/ARM/2010-12-08-tpsoft.ll b/test/CodeGen/ARM/2010-12-08-tpsoft.ll index b8ed819..1351a26 100644 --- a/test/CodeGen/ARM/2010-12-08-tpsoft.ll +++ b/test/CodeGen/ARM/2010-12-08-tpsoft.ll @@ -1,9 +1,9 @@ ; RUN: llc %s -mtriple=armv7-linux-gnueabi -o - | \ ; RUN: FileCheck -check-prefix=ELFASM %s ; RUN: llc %s -mtriple=armv7-linux-gnueabi -filetype=obj -o - | \ -; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=ELFOBJ %s +; RUN: llvm-readobj -s -sd | FileCheck -check-prefix=ELFOBJ %s -;; Make sure that bl __aeabi_read_tp is materiazlied and fixed up correctly +;; Make sure that bl __aeabi_read_tp is materialized and fixed up correctly ;; in the obj case. @i = external thread_local global i32 @@ -24,19 +24,13 @@ bb: ; preds = %entry ; ELFASM: bl __aeabi_read_tp -; ELFOBJ: '.text' -; ELFOBJ-NEXT: 'sh_type' -; ELFOBJ-NEXT: 'sh_flags' -; ELFOBJ-NEXT: 'sh_addr' -; ELFOBJ-NEXT: 'sh_offset' -; ELFOBJ-NEXT: 'sh_size' -; ELFOBJ-NEXT: 'sh_link' -; ELFOBJ-NEXT: 'sh_info' -; ELFOBJ-NEXT: 'sh_addralign' -; ELFOBJ-NEXT: 'sh_entsize' -;;; BL __aeabi_read_tp is ---+ -;;; V -; ELFOBJ-NEXT: 00482de9 3c009fe5 00109fe7 feffffeb +; ELFOBJ: Sections [ +; ELFOBJ: Section { +; ELFOBJ: Name: .text +; ELFOBJ: SectionData ( +;;; BL __aeabi_read_tp is ---------+ +;;; V +; ELFOBJ-NEXT: 0000: 00482DE9 3C009FE5 00109FE7 FEFFFFEB bb1: ; preds = %entry diff --git a/test/CodeGen/ARM/2010-12-15-elf-lcomm.ll b/test/CodeGen/ARM/2010-12-15-elf-lcomm.ll index 1272a25..f13bc12 100644 --- a/test/CodeGen/ARM/2010-12-15-elf-lcomm.ll +++ b/test/CodeGen/ARM/2010-12-15-elf-lcomm.ll @@ -1,5 +1,5 @@ ; RUN: llc %s -mtriple=armv7-linux-gnueabi -filetype=obj -o - | \ -; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=OBJ %s +; RUN: llvm-readobj -s -t | FileCheck -check-prefix=OBJ %s ; RUN: llc %s -mtriple=armv7-linux-gnueabi -o - | \ ; RUN: FileCheck -check-prefix=ASM %s @@ -15,17 +15,20 @@ ; ASM-NEXT: .type _MergedGlobals,%object @ @_MergedGlobals - -; OBJ: Section 4 -; OBJ-NEXT: '.bss' - -; OBJ: 'array00' -; OBJ-NEXT: 'st_value', 0x00000000 -; OBJ-NEXT: 'st_size', 0x00000050 -; OBJ-NEXT: 'st_bind', 0x0 -; OBJ-NEXT: 'st_type', 0x1 -; OBJ-NEXT: 'st_other', 0x00 -; OBJ-NEXT: 'st_shndx', 0x0004 +; OBJ: Sections [ +; OBJ: Section { +; OBJ: Index: 4 +; OBJ-NEXT: Name: .bss + +; OBJ: Symbols [ +; OBJ: Symbol { +; OBJ: Name: array00 +; OBJ-NEXT: Value: 0x0 +; OBJ-NEXT: Size: 80 +; OBJ-NEXT: Binding: Local +; OBJ-NEXT: Type: Object +; OBJ-NEXT: Other: 0 +; OBJ-NEXT: Section: .bss define i32 @main(i32 %argc) nounwind { %1 = load i32* @sum, align 4 diff --git a/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll b/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll index 3c98585..98c0af3 100644 --- a/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll +++ b/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll @@ -77,16 +77,16 @@ entry: !llvm.dbg.cu = !{!2} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"get1", metadata !"get1", metadata !"get1", metadata !1, i32 4, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i8 (i8)* @get1, null, null, metadata !42, i32 4} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786478, metadata !1, metadata !"get1", metadata !"get1", metadata !"get1", metadata !1, i32 4, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i8 (i8)* @get1, null, null, metadata !42, i32 4} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786473, metadata !47} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 1, metadata !1, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build 2369.8)", i1 true, metadata !"", i32 0, null, null, metadata !40, metadata !41, metadata !""} ; [ DW_TAG_compile_unit ] -!3 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!2 = metadata !{i32 786449, metadata !47, i32 1, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build 2369.8)", i1 true, metadata !"", i32 0, null, null, metadata !40, metadata !41, metadata !41, metadata !""} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 786453, metadata !1, metadata !1, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] !4 = metadata !{metadata !5, metadata !5} -!5 = metadata !{i32 786468, metadata !1, metadata !"_Bool", metadata !1, i32 0, i64 8, i64 8, i64 0, i32 0, i32 2} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 786478, i32 0, metadata !1, metadata !"get2", metadata !"get2", metadata !"get2", metadata !1, i32 7, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i8 (i8)* @get2, null, null, metadata !43, i32 7} ; [ DW_TAG_subprogram ] -!7 = metadata !{i32 786478, i32 0, metadata !1, metadata !"get3", metadata !"get3", metadata !"get3", metadata !1, i32 10, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i8 (i8)* @get3, null, null, metadata !44, i32 10} ; [ DW_TAG_subprogram ] -!8 = metadata !{i32 786478, i32 0, metadata !1, metadata !"get4", metadata !"get4", metadata !"get4", metadata !1, i32 13, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i8 (i8)* @get4, null, null, metadata !45, i32 13} ; [ DW_TAG_subprogram ] -!9 = metadata !{i32 786478, i32 0, metadata !1, metadata !"get5", metadata !"get5", metadata !"get5", metadata !1, i32 16, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i8 (i8)* @get5, null, null, metadata !46, i32 16} ; [ DW_TAG_subprogram ] +!5 = metadata !{i32 786468, metadata !1, metadata !1, metadata !"_Bool", i32 0, i64 8, i64 8, i64 0, i32 0, i32 2} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 786478, metadata !1, metadata !"get2", metadata !"get2", metadata !"get2", metadata !1, i32 7, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i8 (i8)* @get2, null, null, metadata !43, i32 7} ; [ DW_TAG_subprogram ] +!7 = metadata !{i32 786478, metadata !1, metadata !"get3", metadata !"get3", metadata !"get3", metadata !1, i32 10, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i8 (i8)* @get3, null, null, metadata !44, i32 10} ; [ DW_TAG_subprogram ] +!8 = metadata !{i32 786478, metadata !1, metadata !"get4", metadata !"get4", metadata !"get4", metadata !1, i32 13, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i8 (i8)* @get4, null, null, metadata !45, i32 13} ; [ DW_TAG_subprogram ] +!9 = metadata !{i32 786478, metadata !1, metadata !"get5", metadata !"get5", metadata !"get5", metadata !1, i32 16, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i8 (i8)* @get5, null, null, metadata !46, i32 16} ; [ DW_TAG_subprogram ] !10 = metadata !{i32 786689, metadata !0, metadata !"a", metadata !1, i32 4, metadata !5, i32 0, null} ; [ DW_TAG_arg_variable ] !11 = metadata !{i32 786688, metadata !12, metadata !"b", metadata !1, i32 4, metadata !5, i32 0, null} ; [ DW_TAG_auto_variable ] !12 = metadata !{i32 786443, metadata !0, i32 4, i32 0, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] diff --git a/test/CodeGen/ARM/2011-08-02-MergedGlobalDbg.ll b/test/CodeGen/ARM/2011-08-02-MergedGlobalDbg.ll index 10f85e8..7a7ca8e 100644 --- a/test/CodeGen/ARM/2011-08-02-MergedGlobalDbg.ll +++ b/test/CodeGen/ARM/2011-08-02-MergedGlobalDbg.ll @@ -74,16 +74,16 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !2, metadata !"clang", i1 true, metadata !"", i32 0, null, null, metadata !40, metadata !41, null} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 786478, i32 0, metadata !2, metadata !"get1", metadata !"get1", metadata !"", metadata !2, i32 5, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32)* @get1, null, null, metadata !42, i32 5} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786449, metadata !47, i32 12, metadata !"clang", i1 true, metadata !"", i32 0, null, null, metadata !40, metadata !41, metadata !41, null} ; [ DW_TAG_compile_unit ] +!1 = metadata !{i32 786478, metadata !2, metadata !"get1", metadata !"get1", metadata !"", metadata !2, i32 5, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32)* @get1, null, null, metadata !42, i32 5} ; [ DW_TAG_subprogram ] !2 = metadata !{i32 786473, metadata !47} ; [ DW_TAG_file_type ] -!3 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!3 = metadata !{i32 786453, metadata !2, metadata !2, metadata !"", i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !4 = metadata !{metadata !5} -!5 = metadata !{i32 786468, metadata !0, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 786478, i32 0, metadata !2, metadata !"get2", metadata !"get2", metadata !"", metadata !2, i32 8, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32)* @get2, null, null, metadata !43, i32 8} ; [ DW_TAG_subprogram ] -!7 = metadata !{i32 786478, i32 0, metadata !2, metadata !"get3", metadata !"get3", metadata !"", metadata !2, i32 11, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32)* @get3, null, null, metadata !44, i32 11} ; [ DW_TAG_subprogram ] -!8 = metadata !{i32 786478, i32 0, metadata !2, metadata !"get4", metadata !"get4", metadata !"", metadata !2, i32 14, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32)* @get4, null, null, metadata !45, i32 14} ; [ DW_TAG_subprogram ] -!9 = metadata !{i32 786478, i32 0, metadata !2, metadata !"get5", metadata !"get5", metadata !"", metadata !2, i32 17, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32)* @get5, null, null, metadata !46, i32 17} ; [ DW_TAG_subprogram ] +!5 = metadata !{i32 786468, null, metadata !0, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 786478, metadata !2, metadata !"get2", metadata !"get2", metadata !"", metadata !2, i32 8, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32)* @get2, null, null, metadata !43, i32 8} ; [ DW_TAG_subprogram ] +!7 = metadata !{i32 786478, metadata !2, metadata !"get3", metadata !"get3", metadata !"", metadata !2, i32 11, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32)* @get3, null, null, metadata !44, i32 11} ; [ DW_TAG_subprogram ] +!8 = metadata !{i32 786478, metadata !2, metadata !"get4", metadata !"get4", metadata !"", metadata !2, i32 14, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32)* @get4, null, null, metadata !45, i32 14} ; [ DW_TAG_subprogram ] +!9 = metadata !{i32 786478, metadata !2, metadata !"get5", metadata !"get5", metadata !"", metadata !2, i32 17, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32)* @get5, null, null, metadata !46, i32 17} ; [ DW_TAG_subprogram ] !10 = metadata !{i32 786689, metadata !1, metadata !"a", metadata !2, i32 16777221, metadata !5, i32 0, null} ; [ DW_TAG_arg_variable ] !11 = metadata !{i32 786688, metadata !12, metadata !"b", metadata !2, i32 5, metadata !5, i32 0, null} ; [ DW_TAG_auto_variable ] !12 = metadata !{i32 786443, metadata !1, i32 5, i32 19, metadata !2, i32 0} ; [ DW_TAG_lexical_block ] diff --git a/test/CodeGen/ARM/2011-12-14-machine-sink.ll b/test/CodeGen/ARM/2011-12-14-machine-sink.ll index 1b21f75..9334bf3 100644 --- a/test/CodeGen/ARM/2011-12-14-machine-sink.ll +++ b/test/CodeGen/ARM/2011-12-14-machine-sink.ll @@ -15,13 +15,13 @@ for.cond: ; preds = %for.body, %entry for.body: ; preds = %for.cond %v.5 = select i1 undef, i32 undef, i32 0 - %0 = load i8* undef, align 1, !tbaa !0 + %0 = load i8* undef, align 1 %conv88 = zext i8 %0 to i32 %sub89 = sub nsw i32 0, %conv88 %v.8 = select i1 undef, i32 undef, i32 %sub89 - %1 = load i8* null, align 1, !tbaa !0 + %1 = load i8* null, align 1 %conv108 = zext i8 %1 to i32 - %2 = load i8* undef, align 1, !tbaa !0 + %2 = load i8* undef, align 1 %conv110 = zext i8 %2 to i32 %sub111 = sub nsw i32 %conv108, %conv110 %cmp112 = icmp slt i32 %sub111, 0 @@ -44,6 +44,3 @@ if.end299: ; preds = %for.body, %for.cond %s.10 = phi i32 [ %add172, %for.body ], [ 0, %for.cond ] ret i32 %s.10 } - -!0 = metadata !{metadata !"omnipotent char", metadata !1} -!1 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/ARM/2012-01-23-PostRA-LICM.ll b/test/CodeGen/ARM/2012-01-23-PostRA-LICM.ll index 926daaf..0f1c452 100644 --- a/test/CodeGen/ARM/2012-01-23-PostRA-LICM.ll +++ b/test/CodeGen/ARM/2012-01-23-PostRA-LICM.ll @@ -18,7 +18,7 @@ bb3: ; preds = %bb4, %bb2 br i1 %tmp, label %bb4, label %bb67 bb4: ; preds = %bb3 - %tmp5 = load <4 x i32>* undef, align 16, !tbaa !0 + %tmp5 = load <4 x i32>* undef, align 16 %tmp6 = and <4 x i32> %tmp5, <i32 8388607, i32 8388607, i32 8388607, i32 8388607> %tmp7 = or <4 x i32> %tmp6, <i32 1065353216, i32 1065353216, i32 1065353216, i32 1065353216> %tmp8 = bitcast <4 x i32> %tmp7 to <4 x float> @@ -41,9 +41,9 @@ bb4: ; preds = %bb3 %tmp24 = trunc i128 %tmp23 to i64 %tmp25 = insertvalue [2 x i64] undef, i64 %tmp24, 0 %tmp26 = insertvalue [2 x i64] %tmp25, i64 0, 1 - %tmp27 = load float* undef, align 4, !tbaa !2 + %tmp27 = load float* undef, align 4 %tmp28 = insertelement <4 x float> undef, float %tmp27, i32 3 - %tmp29 = load <4 x i32>* undef, align 16, !tbaa !0 + %tmp29 = load <4 x i32>* undef, align 16 %tmp30 = and <4 x i32> %tmp29, <i32 8388607, i32 8388607, i32 8388607, i32 8388607> %tmp31 = or <4 x i32> %tmp30, <i32 1065353216, i32 1065353216, i32 1065353216, i32 1065353216> %tmp32 = bitcast <4 x i32> %tmp31 to <4 x float> @@ -52,10 +52,10 @@ bb4: ; preds = %bb3 %tmp35 = fmul <4 x float> %tmp34, undef %tmp36 = fmul <4 x float> %tmp35, undef %tmp37 = call arm_aapcs_vfpcc i8* undef(i8* undef) nounwind - %tmp38 = load float* undef, align 4, !tbaa !2 + %tmp38 = load float* undef, align 4 %tmp39 = insertelement <2 x float> undef, float %tmp38, i32 0 %tmp40 = call arm_aapcs_vfpcc i8* undef(i8* undef) nounwind - %tmp41 = load float* undef, align 4, !tbaa !2 + %tmp41 = load float* undef, align 4 %tmp42 = insertelement <4 x float> undef, float %tmp41, i32 3 %tmp43 = shufflevector <2 x float> %tmp39, <2 x float> undef, <4 x i32> zeroinitializer %tmp44 = fmul <4 x float> %tmp33, %tmp43 @@ -64,10 +64,10 @@ bb4: ; preds = %bb3 %tmp47 = fmul <4 x float> %tmp46, %tmp36 %tmp48 = fadd <4 x float> undef, %tmp47 %tmp49 = call arm_aapcs_vfpcc i8* undef(i8* undef) nounwind - %tmp50 = load float* undef, align 4, !tbaa !2 + %tmp50 = load float* undef, align 4 %tmp51 = insertelement <4 x float> undef, float %tmp50, i32 3 %tmp52 = call arm_aapcs_vfpcc float* null(i8* undef) nounwind - %tmp54 = load float* %tmp52, align 4, !tbaa !2 + %tmp54 = load float* %tmp52, align 4 %tmp55 = insertelement <4 x float> undef, float %tmp54, i32 3 %tmp56 = fsub <4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>, %tmp22 %tmp57 = call <4 x float> @llvm.arm.neon.vmins.v4f32(<4 x float> %tmp56, <4 x float> %tmp55) nounwind @@ -99,7 +99,3 @@ declare <4 x float> @llvm.arm.neon.vmins.v4f32(<4 x float>, <4 x float>) nounwin declare <4 x float> @llvm.arm.neon.vrecps.v4f32(<4 x float>, <4 x float>) nounwind readnone declare <4 x float> @llvm.arm.neon.vrecpe.v4f32(<4 x float>) nounwind readnone - -!0 = metadata !{metadata !"omnipotent char", metadata !1} -!1 = metadata !{metadata !"Simple C/C++ TBAA", null} -!2 = metadata !{metadata !"float", metadata !0} diff --git a/test/CodeGen/ARM/2012-01-24-RegSequenceLiveRange.ll b/test/CodeGen/ARM/2012-01-24-RegSequenceLiveRange.ll index f1c85f1..61623ec 100644 --- a/test/CodeGen/ARM/2012-01-24-RegSequenceLiveRange.ll +++ b/test/CodeGen/ARM/2012-01-24-RegSequenceLiveRange.ll @@ -7,7 +7,7 @@ target triple = "armv7-none-linux-eabi" ; This test case is exercising REG_SEQUENCE, and chains of REG_SEQUENCE. define arm_aapcs_vfpcc void @foo(i8* nocapture %arg, i8* %arg1) nounwind align 2 { bb: - %tmp = load <2 x float>* undef, align 8, !tbaa !0 + %tmp = load <2 x float>* undef, align 8 %tmp2 = extractelement <2 x float> %tmp, i32 0 %tmp3 = insertelement <4 x float> undef, float %tmp2, i32 0 %tmp4 = insertelement <4 x float> %tmp3, float 0.000000e+00, i32 1 @@ -70,6 +70,3 @@ entry: declare arm_aapcs_vfpcc void @bar(i8*, float, float, float) declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>, i32) nounwind declare void @llvm.arm.neon.vst2.v4f32(i8*, <4 x float>, <4 x float>, i32) nounwind - -!0 = metadata !{metadata !"omnipotent char", metadata !1} -!1 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/ARM/2012-01-26-CopyPropKills.ll b/test/CodeGen/ARM/2012-01-26-CopyPropKills.ll index 5f24e42..a9e2ebb 100644 --- a/test/CodeGen/ARM/2012-01-26-CopyPropKills.ll +++ b/test/CodeGen/ARM/2012-01-26-CopyPropKills.ll @@ -56,9 +56,9 @@ bb3: ; preds = %bb2 %tmp39 = shufflevector <2 x i64> %tmp38, <2 x i64> undef, <1 x i32> zeroinitializer %tmp40 = bitcast <1 x i64> %tmp39 to <2 x float> %tmp41 = shufflevector <2 x float> %tmp40, <2 x float> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> - %tmp42 = load <4 x float>* null, align 16, !tbaa !0 + %tmp42 = load <4 x float>* null, align 16 %tmp43 = fmul <4 x float> %tmp42, %tmp41 - %tmp44 = load <4 x float>* undef, align 16, !tbaa !0 + %tmp44 = load <4 x float>* undef, align 16 %tmp45 = fadd <4 x float> undef, %tmp43 %tmp46 = fadd <4 x float> undef, %tmp45 %tmp47 = bitcast <4 x float> %tmp36 to <2 x i64> @@ -108,7 +108,7 @@ bb3: ; preds = %bb2 %tmp89 = fmul <4 x float> undef, %tmp88 %tmp90 = fadd <4 x float> %tmp89, undef %tmp91 = fadd <4 x float> undef, %tmp90 - store <4 x float> %tmp91, <4 x float>* undef, align 16, !tbaa !0 + store <4 x float> %tmp91, <4 x float>* undef, align 16 unreachable bb92: ; preds = %bb2 @@ -116,6 +116,3 @@ bb92: ; preds = %bb2 } declare arm_aapcs_vfpcc void @bar(i8* noalias nocapture sret, [8 x i64]) nounwind uwtable inlinehint - -!0 = metadata !{metadata !"omnipotent char", metadata !1} -!1 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/ARM/2012-04-02-TwoAddrInstrCrash.ll b/test/CodeGen/ARM/2012-04-02-TwoAddrInstrCrash.ll index 33ad187..0843fdc 100644 --- a/test/CodeGen/ARM/2012-04-02-TwoAddrInstrCrash.ll +++ b/test/CodeGen/ARM/2012-04-02-TwoAddrInstrCrash.ll @@ -9,16 +9,13 @@ define arm_aapcs_vfpcc void @foo() nounwind align 2 { ; <label>:1 ; preds = %0 %2 = shufflevector <1 x i64> zeroinitializer, <1 x i64> undef, <2 x i32> <i32 0, i32 1> %3 = bitcast <2 x i64> %2 to <4 x float> - store <4 x float> zeroinitializer, <4 x float>* undef, align 16, !tbaa !0 - store <4 x float> zeroinitializer, <4 x float>* undef, align 16, !tbaa !0 - store <4 x float> %3, <4 x float>* undef, align 16, !tbaa !0 + store <4 x float> zeroinitializer, <4 x float>* undef, align 16 + store <4 x float> zeroinitializer, <4 x float>* undef, align 16 + store <4 x float> %3, <4 x float>* undef, align 16 %4 = insertelement <4 x float> %3, float 8.000000e+00, i32 2 - store <4 x float> %4, <4 x float>* undef, align 16, !tbaa !0 + store <4 x float> %4, <4 x float>* undef, align 16 unreachable ; <label>:5 ; preds = %0 ret void } - -!0 = metadata !{metadata !"omnipotent char", metadata !1} -!1 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/ARM/2012-04-10-DAGCombine.ll b/test/CodeGen/ARM/2012-04-10-DAGCombine.ll index 6f50f27..089dc91 100644 --- a/test/CodeGen/ARM/2012-04-10-DAGCombine.ll +++ b/test/CodeGen/ARM/2012-04-10-DAGCombine.ll @@ -20,12 +20,9 @@ bb5: ; preds = %bb4 %tmp15 = shufflevector <2 x float> %tmp14, <2 x float> undef, <4 x i32> zeroinitializer %tmp16 = fmul <4 x float> zeroinitializer, %tmp15 %tmp17 = fadd <4 x float> %tmp16, %arg - store <4 x float> %tmp17, <4 x float>* undef, align 8, !tbaa !0 + store <4 x float> %tmp17, <4 x float>* undef, align 8 br label %bb18 bb18: ; preds = %bb5, %bb4 ret void } - -!0 = metadata !{metadata !"omnipotent char", metadata !1} -!1 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/ARM/2012-06-12-SchedMemLatency.ll b/test/CodeGen/ARM/2012-06-12-SchedMemLatency.ll index ca0964a..a288015 100644 --- a/test/CodeGen/ARM/2012-06-12-SchedMemLatency.ll +++ b/test/CodeGen/ARM/2012-06-12-SchedMemLatency.ll @@ -26,18 +26,14 @@ ; CHECK: Successors: define i32 @f1(i32* nocapture %p1, i32* nocapture %p2) nounwind { entry: - store volatile i32 65540, i32* %p1, align 4, !tbaa !0 - %0 = load volatile i32* %p2, align 4, !tbaa !0 + store volatile i32 65540, i32* %p1, align 4 + %0 = load volatile i32* %p2, align 4 ret i32 %0 } define i32 @f2(i32* nocapture %p1, i32* nocapture %p2) nounwind { entry: - store i32 65540, i32* %p1, align 4, !tbaa !0 - %0 = load i32* %p2, align 4, !tbaa !0 + store i32 65540, i32* %p1, align 4 + %0 = load i32* %p2, align 4 ret i32 %0 } - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/ARM/2012-08-04-DtripleSpillReload.ll b/test/CodeGen/ARM/2012-08-04-DtripleSpillReload.ll index e4ad45b..adb5c7e 100644 --- a/test/CodeGen/ARM/2012-08-04-DtripleSpillReload.ll +++ b/test/CodeGen/ARM/2012-08-04-DtripleSpillReload.ll @@ -129,7 +129,7 @@ define arm_aapcs_vfpcc void @foo(float, i1 zeroext, i1 zeroext) nounwind uwtable %45 = fmul <4 x float> undef, undef %46 = fmul <4 x float> %45, %43 %47 = fmul <4 x float> undef, %44 - %48 = load <4 x float>* undef, align 8, !tbaa !1 + %48 = load <4 x float>* undef, align 8 %49 = bitcast <4 x float> %48 to <2 x i64> %50 = shufflevector <2 x i64> %49, <2 x i64> undef, <1 x i32> <i32 1> %51 = bitcast <1 x i64> %50 to <2 x float> @@ -145,10 +145,10 @@ define arm_aapcs_vfpcc void @foo(float, i1 zeroext, i1 zeroext) nounwind uwtable %61 = fmul <4 x float> %59, %60 %62 = fmul <4 x float> %61, <float 6.000000e+01, float 6.000000e+01, float 6.000000e+01, float 6.000000e+01> %63 = fadd <4 x float> %47, %62 - store <4 x float> %46, <4 x float>* undef, align 8, !tbaa !1 + store <4 x float> %46, <4 x float>* undef, align 8 call arm_aapcs_vfpcc void @bar(%0* undef, float 0.000000e+00) nounwind call arm_aapcs_vfpcc void @bar(%0* undef, float 0.000000e+00) nounwind - store <4 x float> %63, <4 x float>* undef, align 8, !tbaa !1 + store <4 x float> %63, <4 x float>* undef, align 8 unreachable ; <label>:64 ; preds = %41, %40 @@ -170,5 +170,3 @@ define arm_aapcs_vfpcc void @foo(float, i1 zeroext, i1 zeroext) nounwind uwtable declare arm_aapcs_vfpcc void @bar(%0*, float) !0 = metadata !{metadata !"branch_weights", i32 64, i32 4} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/ARM/2012-10-04-AAPCS-byval-align8.ll b/test/CodeGen/ARM/2012-10-04-AAPCS-byval-align8.ll index b5f6d31..b0644d1 100644 --- a/test/CodeGen/ARM/2012-10-04-AAPCS-byval-align8.ll +++ b/test/CodeGen/ARM/2012-10-04-AAPCS-byval-align8.ll @@ -19,7 +19,7 @@ entry: ; CHECK: bfc [[REG]], #0, #3 %0 = va_arg i8** %g, double call void @llvm.va_end(i8* %g1) - + ret void } diff --git a/test/CodeGen/ARM/2013-01-21-PR14992.ll b/test/CodeGen/ARM/2013-01-21-PR14992.ll index 38b9e0e..05abded 100644 --- a/test/CodeGen/ARM/2013-01-21-PR14992.ll +++ b/test/CodeGen/ARM/2013-01-21-PR14992.ll @@ -6,11 +6,11 @@ ;CHECK: foo: define i32 @foo(i32* %a) nounwind optsize { entry: - %0 = load i32* %a, align 4, !tbaa !0 + %0 = load i32* %a, align 4 %arrayidx1 = getelementptr inbounds i32* %a, i32 1 - %1 = load i32* %arrayidx1, align 4, !tbaa !0 + %1 = load i32* %arrayidx1, align 4 %arrayidx2 = getelementptr inbounds i32* %a, i32 2 - %2 = load i32* %arrayidx2, align 4, !tbaa !0 + %2 = load i32* %arrayidx2, align 4 %add.ptr = getelementptr inbounds i32* %a, i32 3 ;Make sure we do not have a duplicated register in the front of the reg list ;EXPECTED: ldm [[BASE:r[0-9]+]]!, {[[REG:r[0-9]+]], {{r[0-9]+}}, @@ -22,7 +22,3 @@ entry: } declare void @bar(i32*) optsize - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/ARM/2013-04-16-AAPCS-C4-vs-VFP.ll b/test/CodeGen/ARM/2013-04-16-AAPCS-C4-vs-VFP.ll new file mode 100644 index 0000000..38d515f --- /dev/null +++ b/test/CodeGen/ARM/2013-04-16-AAPCS-C4-vs-VFP.ll @@ -0,0 +1,95 @@ +;Check 5.5 Parameter Passing --> Stage C --> C.4 statement, when NSAA is not +;equal to SP. +; +; Our purpose: make NSAA != SP, and only after start to use GPRs. +; +;Co-Processor register candidates may be either in VFP or in stack, so after +;all VFP are allocated, stack is used. We can use stack without GPR allocation +;in that case, passing 9 f64 params, for example. +;First eight params goes to d0-d7, ninth one goes to the stack. +;Now, as 10th parameter, we pass i32, and it must go to R0. +; +;5.5 Parameter Passing, Stage C: +; +;C.2.cp If the argument is a CPRC then any co-processor registers in that class +;that are unallocated are marked as unavailable. The NSAA is adjusted upwards +;until it is correctly aligned for the argument and the argument is copied to +;the memory at the adjusted NSAA. The NSAA is further incremented by the size +;of the argument. The argument has now been allocated. +;... +;C.4 If the size in words of the argument is not more than r4 minus NCRN, the +;argument is copied into core registers, starting at the NCRN. The NCRN is +;incremented by the number of registers used. Successive registers hold the +;parts of the argument they would hold if its value were loaded into those +;registers from memory using an LDM instruction. The argument has now been +;allocated. +; +;What is actually checked here: +;Here we check that i32 param goes to r0. +; +;Current test-case was produced with command: +;arm-linux-gnueabihf-clang -mcpu=cortex-a9 params-to-GPR.c -S -O1 -emit-llvm +; +;// params-to-GRP.c: +; +;void fooUseI32(unsigned); +; +;void foo(long double p0, +; long double p1, +; long double p2, +; long double p3, +; long double p4, +; long double p5, +; long double p6, +; long double p7, +; long double p8, +; unsigned p9) { +; fooUseI32(p9); +;} +; +;void doFoo() { +; foo( 1,2,3,4,5,6,7,8,9, 43 ); +;} + +;RUN: llc -mtriple=thumbv7-linux-gnueabihf -float-abi=hard < %s | FileCheck %s +; +;CHECK: foo: +;CHECK-NOT: mov r0 +;CHECK-NOT: ldr r0 +;CHECK: bl fooUseI32 +;CHECK: doFoo: +;CHECK: movs r0, #43 +;CHECK: bl foo + +define void @foo(double %p0, ; --> D0 + double %p1, ; --> D1 + double %p2, ; --> D2 + double %p3, ; --> D3 + double %p4, ; --> D4 + double %p5, ; --> D5 + double %p6, ; --> D6 + double %p7, ; --> D7 + double %p8, ; --> Stack + i32 %p9) #0 { ; --> R0, not Stack+8 +entry: + tail call void @fooUseI32(i32 %p9) + ret void +} + +declare void @fooUseI32(i32) + +define void @doFoo() { +entry: + tail call void @foo(double 23.0, ; --> D0 + double 23.1, ; --> D1 + double 23.2, ; --> D2 + double 23.3, ; --> D3 + double 23.4, ; --> D4 + double 23.5, ; --> D5 + double 23.6, ; --> D6 + double 23.7, ; --> D7 + double 23.8, ; --> Stack + i32 43) ; --> R0, not Stack+8 + ret void +} + diff --git a/test/CodeGen/ARM/2013-04-16-AAPCS-C5-vs-VFP.ll b/test/CodeGen/ARM/2013-04-16-AAPCS-C5-vs-VFP.ll new file mode 100644 index 0000000..446403d --- /dev/null +++ b/test/CodeGen/ARM/2013-04-16-AAPCS-C5-vs-VFP.ll @@ -0,0 +1,61 @@ +;Check 5.5 Parameter Passing --> Stage C --> C.5 statement, when NSAA is not +;equal to SP. +; +; Our purpose: make NSAA != SP, and only after start to use GPRs, then pass +; byval parameter and check that it goes to stack only. +; +;Co-Processor register candidates may be either in VFP or in stack, so after +;all VFP are allocated, stack is used. We can use stack without GPR allocation +;in that case, passing 9 f64 params, for example. +;First eight params goes to d0-d7, ninth one goes to the stack. +;Now, as 10th parameter, we pass i32, and it must go to R0. +; +;For more information, +;please, read 5.5 Parameter Passing, Stage C, stages C.2.cp, C.4 and C.5 +; +; +;RUN: llc -mtriple=thumbv7-linux-gnueabihf -float-abi=hard < %s | FileCheck %s + +%struct_t = type { i32, i32, i32, i32 } +@static_val = constant %struct_t { i32 777, i32 888, i32 999, i32 1000 } +declare void @fooUseStruct(%struct_t*) + +define void @foo2(double %p0, ; --> D0 + double %p1, ; --> D1 + double %p2, ; --> D2 + double %p3, ; --> D3 + double %p4, ; --> D4 + double %p5, ; --> D5 + double %p6, ; --> D6 + double %p7, ; --> D7 + double %p8, ; --> Stack + i32 %p9, ; --> R0 + %struct_t* byval %p10) ; --> Stack+8 +{ +entry: +;CHECK: push.w {r11, lr} +;CHECK-NOT: stm +;CHECK: add r0, sp, #16 +;CHECK: bl fooUseStruct + call void @fooUseStruct(%struct_t* %p10) + + ret void +} + +define void @doFoo2() { +entry: +;CHECK-NOT: ldm + tail call void @foo2(double 23.0, ; --> D0 + double 23.1, ; --> D1 + double 23.2, ; --> D2 + double 23.3, ; --> D3 + double 23.4, ; --> D4 + double 23.5, ; --> D5 + double 23.6, ; --> D6 + double 23.7, ; --> D7 + double 23.8, ; --> Stack + i32 43, ; --> R0, not Stack+8 + %struct_t* byval @static_val) ; --> Stack+8, not R1 + ret void +} + diff --git a/test/CodeGen/ARM/2013-04-18-load-overlap-PR14824.ll b/test/CodeGen/ARM/2013-04-18-load-overlap-PR14824.ll new file mode 100644 index 0000000..4599928 --- /dev/null +++ b/test/CodeGen/ARM/2013-04-18-load-overlap-PR14824.ll @@ -0,0 +1,82 @@ +; RUN: llc < %s -mtriple=thumbv7-none-linux-gnueabi -mcpu=cortex-a9 -mattr=+neon,+neonfp | FileCheck %s +; PR14824. The test is presented by Jiangning Liu. If the ld/st optimization algorithm is changed, this test case may fail. +; Also if the machine code for ld/st optimizor is changed, this test case may fail. If so, remove this test. + +define void @sample_test(<8 x i64> * %secondSource, <8 x i64> * %source, <8 x i64> * %dest) nounwind { +; CHECK: sample_test +; CHECK-NOT: vldmia +; CHECK: add +entry: + +; Load %source + %s0 = load <8 x i64> * %source, align 64 + %arrayidx64 = getelementptr inbounds <8 x i64> * %source, i32 6 + %s120 = load <8 x i64> * %arrayidx64, align 64 + %s122 = bitcast <8 x i64> %s120 to i512 + %data.i.i677.48.extract.shift = lshr i512 %s122, 384 + %data.i.i677.48.extract.trunc = trunc i512 %data.i.i677.48.extract.shift to i64 + %s123 = insertelement <8 x i64> undef, i64 %data.i.i677.48.extract.trunc, i32 0 + %data.i.i677.32.extract.shift = lshr i512 %s122, 256 + %data.i.i677.32.extract.trunc = trunc i512 %data.i.i677.32.extract.shift to i64 + %s124 = insertelement <8 x i64> %s123, i64 %data.i.i677.32.extract.trunc, i32 1 + %data.i.i677.16.extract.shift = lshr i512 %s122, 128 + %data.i.i677.16.extract.trunc = trunc i512 %data.i.i677.16.extract.shift to i64 + %s125 = insertelement <8 x i64> %s124, i64 %data.i.i677.16.extract.trunc, i32 2 + %data.i.i677.56.extract.shift = lshr i512 %s122, 448 + %data.i.i677.56.extract.trunc = trunc i512 %data.i.i677.56.extract.shift to i64 + %s126 = insertelement <8 x i64> %s125, i64 %data.i.i677.56.extract.trunc, i32 3 + %data.i.i677.24.extract.shift = lshr i512 %s122, 192 + %data.i.i677.24.extract.trunc = trunc i512 %data.i.i677.24.extract.shift to i64 + %s127 = insertelement <8 x i64> %s126, i64 %data.i.i677.24.extract.trunc, i32 4 + %s128 = insertelement <8 x i64> %s127, i64 %data.i.i677.32.extract.trunc, i32 5 + %s129 = insertelement <8 x i64> %s128, i64 %data.i.i677.16.extract.trunc, i32 6 + %s130 = insertelement <8 x i64> %s129, i64 %data.i.i677.56.extract.trunc, i32 7 + +; Load %secondSource + %s1 = load <8 x i64> * %secondSource, align 64 + %arrayidx67 = getelementptr inbounds <8 x i64> * %secondSource, i32 6 + %s121 = load <8 x i64> * %arrayidx67, align 64 + %s131 = bitcast <8 x i64> %s121 to i512 + %data.i1.i676.48.extract.shift = lshr i512 %s131, 384 + %data.i1.i676.48.extract.trunc = trunc i512 %data.i1.i676.48.extract.shift to i64 + %s132 = insertelement <8 x i64> undef, i64 %data.i1.i676.48.extract.trunc, i32 0 + %data.i1.i676.32.extract.shift = lshr i512 %s131, 256 + %data.i1.i676.32.extract.trunc = trunc i512 %data.i1.i676.32.extract.shift to i64 + %s133 = insertelement <8 x i64> %s132, i64 %data.i1.i676.32.extract.trunc, i32 1 + %data.i1.i676.16.extract.shift = lshr i512 %s131, 128 + %data.i1.i676.16.extract.trunc = trunc i512 %data.i1.i676.16.extract.shift to i64 + %s134 = insertelement <8 x i64> %s133, i64 %data.i1.i676.16.extract.trunc, i32 2 + %data.i1.i676.56.extract.shift = lshr i512 %s131, 448 + %data.i1.i676.56.extract.trunc = trunc i512 %data.i1.i676.56.extract.shift to i64 + %s135 = insertelement <8 x i64> %s134, i64 %data.i1.i676.56.extract.trunc, i32 3 + %data.i1.i676.24.extract.shift = lshr i512 %s131, 192 + %data.i1.i676.24.extract.trunc = trunc i512 %data.i1.i676.24.extract.shift to i64 + %s136 = insertelement <8 x i64> %s135, i64 %data.i1.i676.24.extract.trunc, i32 4 + %s137 = insertelement <8 x i64> %s136, i64 %data.i1.i676.32.extract.trunc, i32 5 + %s138 = insertelement <8 x i64> %s137, i64 %data.i1.i676.16.extract.trunc, i32 6 + %s139 = insertelement <8 x i64> %s138, i64 %data.i1.i676.56.extract.trunc, i32 7 + +; Operations about %Source and %secondSource + %vecinit28.i.i699 = shufflevector <8 x i64> %s139, <8 x i64> %s130, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 12, i32 undef, i32 undef, i32 undef> + %vecinit35.i.i700 = shufflevector <8 x i64> %vecinit28.i.i699, <8 x i64> %s139, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 13, i32 undef, i32 undef> + %vecinit42.i.i701 = shufflevector <8 x i64> %vecinit35.i.i700, <8 x i64> %s139, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 14, i32 undef> + %vecinit49.i.i702 = shufflevector <8 x i64> %vecinit42.i.i701, <8 x i64> %s130, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 15> + %arrayidx72 = getelementptr inbounds <8 x i64> * %dest, i32 6 + store <8 x i64> %vecinit49.i.i702, <8 x i64> * %arrayidx72, align 64 + %arrayidx78 = getelementptr inbounds <8 x i64> * %secondSource, i32 7 + %s141 = load <8 x i64> * %arrayidx78, align 64 + %s151 = bitcast <8 x i64> %s141 to i512 + %data.i1.i649.32.extract.shift = lshr i512 %s151, 256 + %data.i1.i649.32.extract.trunc = trunc i512 %data.i1.i649.32.extract.shift to i64 + %s152 = insertelement <8 x i64> undef, i64 %data.i1.i649.32.extract.trunc, i32 0 + %s153 = insertelement <8 x i64> %s152, i64 %data.i1.i649.32.extract.trunc, i32 1 + %data.i1.i649.16.extract.shift = lshr i512 %s151, 128 + %data.i1.i649.16.extract.trunc = trunc i512 %data.i1.i649.16.extract.shift to i64 + %s154 = insertelement <8 x i64> %s153, i64 %data.i1.i649.16.extract.trunc, i32 2 + %data.i1.i649.8.extract.shift = lshr i512 %s151, 64 + %data.i1.i649.8.extract.trunc = trunc i512 %data.i1.i649.8.extract.shift to i64 + %s155 = insertelement <8 x i64> %s154, i64 %data.i1.i649.8.extract.trunc, i32 3 + %arrayidx83 = getelementptr inbounds <8 x i64> * %dest, i32 7 + store <8 x i64> %s155, <8 x i64> * %arrayidx83, align 64 + ret void +} diff --git a/test/CodeGen/ARM/2013-04-21-AAPCS-VA-C.1.cp.ll b/test/CodeGen/ARM/2013-04-21-AAPCS-VA-C.1.cp.ll new file mode 100644 index 0000000..de5fd31 --- /dev/null +++ b/test/CodeGen/ARM/2013-04-21-AAPCS-VA-C.1.cp.ll @@ -0,0 +1,28 @@ +;Check 5.5 Parameter Passing --> Stage C --> C.1.cp statement for VA functions. +;Note: There are no VFP CPRCs in a variadic procedure. +;Check that after %C was sent to stack, we set Next Core Register Number to R4. + +;This test is simplified IR version of +;test-suite/SingleSource/UnitTests/2002-05-02-ManyArguments.c + +;RUN: llc -mtriple=thumbv7-linux-gnueabihf -float-abi=hard < %s | FileCheck %s + +@.str = private unnamed_addr constant [13 x i8] c"%d %d %f %i\0A\00", align 1 + +;CHECK: printfn: +define void @printfn(i32 %a, i16 signext %b, double %C, i8 signext %E) { +entry: + %conv = sext i16 %b to i32 + %conv1 = sext i8 %E to i32 + %call = tail call i32 (i8*, ...)* @printf( + i8* getelementptr inbounds ([13 x i8]* @.str, i32 0, i32 0), ; --> R0 + i32 %a, ; --> R1 + i32 %conv, ; --> R2 + double %C, ; --> SP, NCRN := R4 +;CHECK: str r2, [sp, #8] + i32 %conv1) ; --> SP+8 + ret void +} + +declare i32 @printf(i8* nocapture, ...) + diff --git a/test/CodeGen/ARM/MergeConsecutiveStores.ll b/test/CodeGen/ARM/MergeConsecutiveStores.ll new file mode 100644 index 0000000..06c87e9 --- /dev/null +++ b/test/CodeGen/ARM/MergeConsecutiveStores.ll @@ -0,0 +1,98 @@ +; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s + +; Make sure that we merge the consecutive load/store sequence below and use a +; word (16 bit) instead of a byte copy. +; CHECK: MergeLoadStoreBaseIndexOffset +; CHECK: ldrh [[REG:r[0-9]+]], [{{.*}}] +; CHECK: strh [[REG]], [r1], #2 +define void @MergeLoadStoreBaseIndexOffset(i32* %a, i8* %b, i8* %c, i32 %n) { + br label %1 + +; <label>:1 + %.09 = phi i32 [ %n, %0 ], [ %11, %1 ] + %.08 = phi i8* [ %b, %0 ], [ %10, %1 ] + %.0 = phi i32* [ %a, %0 ], [ %2, %1 ] + %2 = getelementptr inbounds i32* %.0, i32 1 + %3 = load i32* %.0, align 1 + %4 = getelementptr inbounds i8* %c, i32 %3 + %5 = load i8* %4, align 1 + %6 = add i32 %3, 1 + %7 = getelementptr inbounds i8* %c, i32 %6 + %8 = load i8* %7, align 1 + store i8 %5, i8* %.08, align 1 + %9 = getelementptr inbounds i8* %.08, i32 1 + store i8 %8, i8* %9, align 1 + %10 = getelementptr inbounds i8* %.08, i32 2 + %11 = add nsw i32 %.09, -1 + %12 = icmp eq i32 %11, 0 + br i1 %12, label %13, label %1 + +; <label>:13 + ret void +} + +; Make sure that we merge the consecutive load/store sequence below and use a +; word (16 bit) instead of a byte copy even if there are intermediate sign +; extensions. +; CHECK: MergeLoadStoreBaseIndexOffsetSext +; CHECK: ldrh [[REG:r[0-9]+]], [{{.*}}] +; CHECK: strh [[REG]], [r1], #2 +define void @MergeLoadStoreBaseIndexOffsetSext(i8* %a, i8* %b, i8* %c, i32 %n) { + br label %1 + +; <label>:1 + %.09 = phi i32 [ %n, %0 ], [ %12, %1 ] + %.08 = phi i8* [ %b, %0 ], [ %11, %1 ] + %.0 = phi i8* [ %a, %0 ], [ %2, %1 ] + %2 = getelementptr inbounds i8* %.0, i32 1 + %3 = load i8* %.0, align 1 + %4 = sext i8 %3 to i32 + %5 = getelementptr inbounds i8* %c, i32 %4 + %6 = load i8* %5, align 1 + %7 = add i32 %4, 1 + %8 = getelementptr inbounds i8* %c, i32 %7 + %9 = load i8* %8, align 1 + store i8 %6, i8* %.08, align 1 + %10 = getelementptr inbounds i8* %.08, i32 1 + store i8 %9, i8* %10, align 1 + %11 = getelementptr inbounds i8* %.08, i32 2 + %12 = add nsw i32 %.09, -1 + %13 = icmp eq i32 %12, 0 + br i1 %13, label %14, label %1 + +; <label>:14 + ret void +} + +; However, we can only merge ignore sign extensions when they are on all memory +; computations; +; CHECK: loadStoreBaseIndexOffsetSextNoSex +; CHECK-NOT: ldrh [[REG:r[0-9]+]], [{{.*}}] +; CHECK-NOT: strh [[REG]], [r1], #2 +define void @loadStoreBaseIndexOffsetSextNoSex(i8* %a, i8* %b, i8* %c, i32 %n) { + br label %1 + +; <label>:1 + %.09 = phi i32 [ %n, %0 ], [ %12, %1 ] + %.08 = phi i8* [ %b, %0 ], [ %11, %1 ] + %.0 = phi i8* [ %a, %0 ], [ %2, %1 ] + %2 = getelementptr inbounds i8* %.0, i32 1 + %3 = load i8* %.0, align 1 + %4 = sext i8 %3 to i32 + %5 = getelementptr inbounds i8* %c, i32 %4 + %6 = load i8* %5, align 1 + %7 = add i8 %3, 1 + %wrap.4 = sext i8 %7 to i32 + %8 = getelementptr inbounds i8* %c, i32 %wrap.4 + %9 = load i8* %8, align 1 + store i8 %6, i8* %.08, align 1 + %10 = getelementptr inbounds i8* %.08, i32 1 + store i8 %9, i8* %10, align 1 + %11 = getelementptr inbounds i8* %.08, i32 2 + %12 = add nsw i32 %.09, -1 + %13 = icmp eq i32 %12, 0 + br i1 %13, label %14, label %1 + +; <label>:14 + ret void +} diff --git a/test/CodeGen/ARM/a15-SD-dep.ll b/test/CodeGen/ARM/a15-SD-dep.ll index 17e3eba..a52468e 100644 --- a/test/CodeGen/ARM/a15-SD-dep.ll +++ b/test/CodeGen/ARM/a15-SD-dep.ll @@ -5,7 +5,7 @@ ; CHECK-DISABLED: t1: define <2 x float> @t1(float %f) { ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0] - ; CHECK-DISABLED: vmov.32 d0[1], r{{.}} + ; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0] %i1 = insertelement <2 x float> undef, float %f, i32 1 %i2 = fadd <2 x float> %i1, %i1 ret <2 x float> %i2 @@ -15,7 +15,7 @@ define <2 x float> @t1(float %f) { ; CHECK-DISABLED: t2: define <4 x float> @t2(float %g, float %f) { ; CHECK-ENABLED: vdup.32 q{{[0-9]*}}, d0[0] - ; CHECK-DISABLED: vmov.32 d0[1], r{{.}} + ; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0] %i1 = insertelement <4 x float> undef, float %f, i32 1 %i2 = fadd <4 x float> %i1, %i1 ret <4 x float> %i2 @@ -25,6 +25,7 @@ define <4 x float> @t2(float %g, float %f) { ; CHECK-DISABLED: t3: define arm_aapcs_vfpcc <2 x float> @t3(float %f) { ; CHECK-ENABLED: vdup.32 d{{[0-9]*}}, d0[0] + ; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0] %i1 = insertelement <2 x float> undef, float %f, i32 1 %i2 = fadd <2 x float> %i1, %i1 ret <2 x float> %i2 diff --git a/test/CodeGen/ARM/a15-partial-update.ll b/test/CodeGen/ARM/a15-partial-update.ll new file mode 100644 index 0000000..6306790 --- /dev/null +++ b/test/CodeGen/ARM/a15-partial-update.ll @@ -0,0 +1,38 @@ +; RUN: llc -O1 -mcpu=cortex-a15 -mtriple=armv7-linux-gnueabi -verify-machineinstrs < %s | FileCheck %s + +; CHECK: t1: +define <2 x float> @t1(float* %A, <2 x float> %B) { +; The generated code for this test uses a vld1.32 instruction +; to write the lane 1 of a D register containing the value of +; <2 x float> %B. Since the D register is defined, it would +; be incorrect to fully write it (with a vmov.f64) before the +; vld1.32 instruction. The test checks that a vmov.f64 was not +; generated. + +; CHECK-NOT: vmov.{{.*}} d{{[0-9]+}}, + %tmp2 = load float* %A, align 4 + %tmp3 = insertelement <2 x float> %B, float %tmp2, i32 1 + ret <2 x float> %tmp3 +} + +; CHECK: t2: +define void @t2(<4 x i8> *%in, <4 x i8> *%out, i32 %n) { +entry: + br label %loop +loop: +; The code generated by this test uses a vld1.32 instruction. +; We check that a dependency breaking vmov* instruction was +; generated. + +; CHECK: vmov.{{.*}} d{{[0-9]+}}, + %oldcount = phi i32 [0, %entry], [%newcount, %loop] + %newcount = add i32 %oldcount, 1 + %p1 = getelementptr <4 x i8> *%in, i32 %newcount + %p2 = getelementptr <4 x i8> *%out, i32 %newcount + %tmp1 = load <4 x i8> *%p1, align 4 + store <4 x i8> %tmp1, <4 x i8> *%p2 + %cmp = icmp eq i32 %newcount, %n + br i1 %cmp, label %loop, label %ret +ret: + ret void +} diff --git a/test/CodeGen/ARM/avoid-cpsr-rmw.ll b/test/CodeGen/ARM/avoid-cpsr-rmw.ll index d98925e..c14f530 100644 --- a/test/CodeGen/ARM/avoid-cpsr-rmw.ll +++ b/test/CodeGen/ARM/avoid-cpsr-rmw.ll @@ -83,3 +83,34 @@ while.body: while.end: ret void } + +; Avoid producing tMOVi8 after a high-latency flag-setting operation. +; <rdar://problem/13468102> +define void @t4(i32* nocapture %p, double* nocapture %q) { +entry: +; CHECK: t4 +; CHECK: vmrs APSR_nzcv, fpscr +; CHECK: if.then +; CHECK-NOT: movs + %0 = load double* %q, align 4 + %cmp = fcmp olt double %0, 1.000000e+01 + %incdec.ptr1 = getelementptr inbounds i32* %p, i32 1 + br i1 %cmp, label %if.then, label %if.else + +if.then: + store i32 7, i32* %p, align 4 + %incdec.ptr2 = getelementptr inbounds i32* %p, i32 2 + store i32 8, i32* %incdec.ptr1, align 4 + store i32 9, i32* %incdec.ptr2, align 4 + br label %if.end + +if.else: + store i32 3, i32* %p, align 4 + %incdec.ptr5 = getelementptr inbounds i32* %p, i32 2 + store i32 5, i32* %incdec.ptr1, align 4 + store i32 6, i32* %incdec.ptr5, align 4 + br label %if.end + +if.end: + ret void +} diff --git a/test/CodeGen/ARM/commute-movcc.ll b/test/CodeGen/ARM/commute-movcc.ll index 7316452..fbc25b4 100644 --- a/test/CodeGen/ARM/commute-movcc.ll +++ b/test/CodeGen/ARM/commute-movcc.ll @@ -1,5 +1,5 @@ -; RUN: llc -mtriple=thumbv7-apple-ios -disable-code-place < %s | FileCheck %s -; RUN: llc -mtriple=armv7-apple-ios -disable-code-place < %s | FileCheck %s +; RUN: llc -mtriple=thumbv7-apple-ios -disable-block-placement < %s | FileCheck %s +; RUN: llc -mtriple=armv7-apple-ios -disable-block-placement < %s | FileCheck %s ; LLVM IR optimizers canonicalize icmp+select this way. ; Make sure that TwoAddressInstructionPass can commute the corresponding @@ -32,7 +32,7 @@ for.body: ; preds = %entry, %if.end8 %BestCost.011 = phi i32 [ -1, %entry ], [ %BestCost.1, %if.end8 ] %BestIdx.010 = phi i32 [ 0, %entry ], [ %BestIdx.1, %if.end8 ] %arrayidx = getelementptr inbounds i32* %a, i32 %i.012 - %0 = load i32* %arrayidx, align 4, !tbaa !0 + %0 = load i32* %arrayidx, align 4 %mul = mul i32 %0, %0 %sub = add nsw i32 %i.012, -5 %cmp2 = icmp eq i32 %sub, %Pref @@ -53,7 +53,7 @@ if.else: ; preds = %for.body if.end8: ; preds = %if.else, %if.then %BestIdx.1 = phi i32 [ %i.0.BestIdx.0, %if.then ], [ %BestIdx.0.i.0, %if.else ] %BestCost.1 = phi i32 [ %mul.BestCost.0, %if.then ], [ %BestCost.0.mul, %if.else ] - store i32 %mul, i32* %arrayidx, align 4, !tbaa !0 + store i32 %mul, i32* %arrayidx, align 4 %inc = add i32 %i.012, 1 %cmp = icmp eq i32 %inc, 11 br i1 %cmp, label %for.end, label %for.body @@ -61,7 +61,3 @@ if.end8: ; preds = %if.else, %if.then for.end: ; preds = %if.end8 ret i32 %BestIdx.1 } - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/ARM/dagcombine-concatvector.ll b/test/CodeGen/ARM/dagcombine-concatvector.ll new file mode 100644 index 0000000..e9e0fe3 --- /dev/null +++ b/test/CodeGen/ARM/dagcombine-concatvector.ll @@ -0,0 +1,23 @@ +; RUN: llc < %s -mtriple=thumbv7s-apple-ios3.0.0 | FileCheck %s + +; PR15525 +; CHECK: test1: +; CHECK: ldr.w [[REG:r[0-9]+]], [sp] +; CHECK-NEXT: vmov {{d[0-9]+}}, r1, r2 +; CHECK-NEXT: vmov {{d[0-9]+}}, r3, [[REG]] +; CHECK-NEXT: vst1.8 {{{d[0-9]+}}, {{d[0-9]+}}}, [r0] +; CHECK-NEXT: bx lr +define void @test1(i8* %arg, [4 x i64] %vec.coerce) { +bb: + %tmp = extractvalue [4 x i64] %vec.coerce, 0 + %tmp2 = bitcast i64 %tmp to <8 x i8> + %tmp3 = shufflevector <8 x i8> %tmp2, <8 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> + %tmp4 = extractvalue [4 x i64] %vec.coerce, 1 + %tmp5 = bitcast i64 %tmp4 to <8 x i8> + %tmp6 = shufflevector <8 x i8> %tmp5, <8 x i8> undef, <16 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> + %tmp7 = shufflevector <16 x i8> %tmp6, <16 x i8> %tmp3, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> + tail call void @llvm.arm.neon.vst1.v16i8(i8* %arg, <16 x i8> %tmp7, i32 2) + ret void +} + +declare void @llvm.arm.neon.vst1.v16i8(i8*, <16 x i8>, i32) diff --git a/test/CodeGen/ARM/debug-info-arg.ll b/test/CodeGen/ARM/debug-info-arg.ll index 168443f..c162260 100644 --- a/test/CodeGen/ARM/debug-info-arg.ll +++ b/test/CodeGen/ARM/debug-info-arg.ll @@ -31,23 +31,23 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !2, metadata !"Apple clang version 3.0 (tags/Apple/clang-211.10.1) (based on LLVM 3.0svn)", i1 true, metadata !"", i32 0, null, null, metadata !30, null, null} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 786478, i32 0, metadata !2, metadata !"foo", metadata !"foo", metadata !"", metadata !2, i32 11, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, void (%struct.tag_s*, %struct.tag_s*, i64, i64, %struct.tag_s*, %struct.tag_s*)* @foo, null, null, metadata !31, i32 11} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786449, metadata !32, i32 12, metadata !"Apple clang version 3.0 (tags/Apple/clang-211.10.1) (based on LLVM 3.0svn)", i1 true, metadata !"", i32 0, null, null, metadata !30, null, null, null} ; [ DW_TAG_compile_unit ] +!1 = metadata !{i32 786478, metadata !2, metadata !2, metadata !"foo", metadata !"foo", metadata !"", i32 11, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, void (%struct.tag_s*, %struct.tag_s*, i64, i64, %struct.tag_s*, %struct.tag_s*)* @foo, null, null, metadata !31, i32 11} ; [ DW_TAG_subprogram ] !2 = metadata !{i32 786473, metadata !32} ; [ DW_TAG_file_type ] -!3 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!3 = metadata !{i32 786453, metadata !32, metadata !2, metadata !"", i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !4 = metadata !{null} !5 = metadata !{i32 786689, metadata !1, metadata !"this", metadata !2, i32 16777227, metadata !6, i32 0, null} ; [ DW_TAG_arg_variable ] -!6 = metadata !{i32 786447, metadata !0, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !7} ; [ DW_TAG_pointer_type ] -!7 = metadata !{i32 786451, metadata !0, metadata !"tag_s", metadata !2, i32 5, i64 96, i64 32, i32 0, i32 0, i32 0, metadata !8, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!6 = metadata !{i32 786447, null, metadata !0, metadata !"", i32 0, i64 32, i64 32, i64 0, i32 0, metadata !7} ; [ DW_TAG_pointer_type ] +!7 = metadata !{i32 786451, metadata !32, metadata !0, metadata !"tag_s", i32 5, i64 96, i64 32, i32 0, i32 0, i32 0, metadata !8, i32 0, i32 0} ; [ DW_TAG_structure_type ] !8 = metadata !{metadata !9, metadata !11, metadata !12} -!9 = metadata !{i32 786445, metadata !7, metadata !"x", metadata !2, i32 6, i64 32, i64 32, i64 0, i32 0, metadata !10} ; [ DW_TAG_member ] -!10 = metadata !{i32 786468, metadata !0, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!11 = metadata !{i32 786445, metadata !7, metadata !"y", metadata !2, i32 7, i64 32, i64 32, i64 32, i32 0, metadata !10} ; [ DW_TAG_member ] -!12 = metadata !{i32 786445, metadata !7, metadata !"z", metadata !2, i32 8, i64 32, i64 32, i64 64, i32 0, metadata !10} ; [ DW_TAG_member ] +!9 = metadata !{i32 786445, metadata !32, metadata !7, metadata !"x", i32 6, i64 32, i64 32, i64 0, i32 0, metadata !10} ; [ DW_TAG_member ] +!10 = metadata !{i32 786468, null, metadata !0, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!11 = metadata !{i32 786445, metadata !32, metadata !7, metadata !"y", i32 7, i64 32, i64 32, i64 32, i32 0, metadata !10} ; [ DW_TAG_member ] +!12 = metadata !{i32 786445, metadata !32, metadata !7, metadata !"z", i32 8, i64 32, i64 32, i64 64, i32 0, metadata !10} ; [ DW_TAG_member ] !13 = metadata !{i32 786689, metadata !1, metadata !"c", metadata !2, i32 33554443, metadata !6, i32 0, null} ; [ DW_TAG_arg_variable ] !14 = metadata !{i32 786689, metadata !1, metadata !"x", metadata !2, i32 50331659, metadata !15, i32 0, null} ; [ DW_TAG_arg_variable ] -!15 = metadata !{i32 786454, metadata !0, metadata !"UInt64", metadata !2, i32 1, i64 0, i64 0, i64 0, i32 0, metadata !16} ; [ DW_TAG_typedef ] -!16 = metadata !{i32 786468, metadata !0, metadata !"long long unsigned int", null, i32 0, i64 64, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] +!15 = metadata !{i32 786454, metadata !32, metadata !0, metadata !"UInt64", i32 1, i64 0, i64 0, i64 0, i32 0, metadata !16} ; [ DW_TAG_typedef ] +!16 = metadata !{i32 786468, null, metadata !0, metadata !"long long unsigned int", i32 0, i64 64, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] !17 = metadata !{i32 786689, metadata !1, metadata !"y", metadata !2, i32 67108875, metadata !15, i32 0, null} ; [ DW_TAG_arg_variable ] !18 = metadata !{i32 786689, metadata !1, metadata !"ptr1", metadata !2, i32 83886091, metadata !6, i32 0, null} ; [ DW_TAG_arg_variable ] !19 = metadata !{i32 786689, metadata !1, metadata !"ptr2", metadata !2, i32 100663307, metadata !6, i32 0, null} ; [ DW_TAG_arg_variable ] diff --git a/test/CodeGen/ARM/debug-info-blocks.ll b/test/CodeGen/ARM/debug-info-blocks.ll index ae59f9f..d0bfecc 100644 --- a/test/CodeGen/ARM/debug-info-blocks.ll +++ b/test/CodeGen/ARM/debug-info-blocks.ll @@ -94,134 +94,134 @@ define hidden void @foobar_func_block_invoke_0(i8* %.block_descriptor, %0* %load !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 16, metadata !40, metadata !"Apple clang version 2.1", i1 false, metadata !"", i32 2, metadata !147, null, metadata !148, null, metadata !""} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 786433, metadata !0, metadata !"", metadata !2, i32 248, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !3, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] +!0 = metadata !{i32 786449, i32 16, metadata !40, metadata !"Apple clang version 2.1", i1 false, metadata !"", i32 2, metadata !147, null, metadata !148, null, metadata !""} ; [ DW_TAG_compile_unit ] +!1 = metadata !{i32 786433, metadata !160, metadata !0, metadata !"", i32 248, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !3, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] !2 = metadata !{i32 786473, metadata !160} ; [ DW_TAG_file_type ] !3 = metadata !{metadata !4} !4 = metadata !{i32 786472, metadata !"Ver1", i64 0} ; [ DW_TAG_enumerator ] -!5 = metadata !{i32 786433, metadata !0, metadata !"Mode", metadata !6, i32 79, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !7, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] +!5 = metadata !{i32 786433, metadata !160, metadata !0, metadata !"Mode", i32 79, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !7, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] !6 = metadata !{i32 786473, metadata !161} ; [ DW_TAG_file_type ] !7 = metadata !{metadata !8} !8 = metadata !{i32 786472, metadata !"One", i64 0} ; [ DW_TAG_enumerator ] -!9 = metadata !{i32 786433, metadata !0, metadata !"", metadata !10, i32 15, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !11, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] +!9 = metadata !{i32 786433, metadata !149, metadata !0, metadata !"", i32 15, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !11, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] !10 = metadata !{i32 786473, metadata !149} ; [ DW_TAG_file_type ] !11 = metadata !{metadata !12, metadata !13} !12 = metadata !{i32 786472, metadata !"Unknown", i64 0} ; [ DW_TAG_enumerator ] !13 = metadata !{i32 786472, metadata !"Known", i64 1} ; [ DW_TAG_enumerator ] -!14 = metadata !{i32 786433, metadata !0, metadata !"", metadata !15, i32 20, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !16, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] +!14 = metadata !{i32 786433, metadata !150, metadata !0, metadata !"", i32 20, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !16, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] !15 = metadata !{i32 786473, metadata !150} ; [ DW_TAG_file_type ] !16 = metadata !{metadata !17, metadata !18} !17 = metadata !{i32 786472, metadata !"Single", i64 0} ; [ DW_TAG_enumerator ] !18 = metadata !{i32 786472, metadata !"Double", i64 1} ; [ DW_TAG_enumerator ] -!19 = metadata !{i32 786433, metadata !0, metadata !"", metadata !20, i32 14, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !21, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] +!19 = metadata !{i32 786433, metadata !151, metadata !0, metadata !"", i32 14, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !21, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] !20 = metadata !{i32 786473, metadata !151} ; [ DW_TAG_file_type ] !21 = metadata !{metadata !22} !22 = metadata !{i32 786472, metadata !"Eleven", i64 0} ; [ DW_TAG_enumerator ] -!23 = metadata !{i32 786478, i32 0, metadata !24, metadata !"foobar_func_block_invoke_0", metadata !"foobar_func_block_invoke_0", metadata !"", metadata !24, i32 609, metadata !25, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void (i8*, %0*, [4 x i32], [4 x i32])* @foobar_func_block_invoke_0, null, null, null, i32 609} ; [ DW_TAG_subprogram ] +!23 = metadata !{i32 786478, metadata !24, metadata !"foobar_func_block_invoke_0", metadata !"foobar_func_block_invoke_0", metadata !"", metadata !24, i32 609, metadata !25, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void (i8*, %0*, [4 x i32], [4 x i32])* @foobar_func_block_invoke_0, null, null, null, i32 609} ; [ DW_TAG_subprogram ] !24 = metadata !{i32 786473, metadata !152} ; [ DW_TAG_file_type ] -!25 = metadata !{i32 786453, metadata !24, metadata !"", metadata !24, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !26, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!25 = metadata !{i32 786453, metadata !152, metadata !24, metadata !"", i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !26, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !26 = metadata !{null} !27 = metadata !{i32 786689, metadata !23, metadata !".block_descriptor", metadata !24, i32 16777825, metadata !28, i32 64, null} ; [ DW_TAG_arg_variable ] -!28 = metadata !{i32 786447, metadata !0, metadata !"", null, i32 0, i64 32, i64 0, i64 0, i32 0, metadata !29} ; [ DW_TAG_pointer_type ] -!29 = metadata !{i32 786451, metadata !24, metadata !"__block_literal_14", metadata !24, i32 609, i64 256, i64 32, i32 0, i32 0, i32 0, metadata !30, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!28 = metadata !{i32 786447, null, metadata !0, metadata !"", i32 0, i64 32, i64 0, i64 0, i32 0, metadata !29} ; [ DW_TAG_pointer_type ] +!29 = metadata !{i32 786451, metadata !152, metadata !24, metadata !"__block_literal_14", i32 609, i64 256, i64 32, i32 0, i32 0, i32 0, metadata !30, i32 0, i32 0} ; [ DW_TAG_structure_type ] !30 = metadata !{metadata !31, metadata !33, metadata !35, metadata !36, metadata !37, metadata !48, metadata !89, metadata !124} -!31 = metadata !{i32 786445, metadata !24, metadata !"__isa", metadata !24, i32 609, i64 32, i64 32, i64 0, i32 0, metadata !32} ; [ DW_TAG_member ] -!32 = metadata !{i32 786447, metadata !0, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ] -!33 = metadata !{i32 786445, metadata !24, metadata !"__flags", metadata !24, i32 609, i64 32, i64 32, i64 32, i32 0, metadata !34} ; [ DW_TAG_member ] -!34 = metadata !{i32 786468, metadata !0, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!35 = metadata !{i32 786445, metadata !24, metadata !"__reserved", metadata !24, i32 609, i64 32, i64 32, i64 64, i32 0, metadata !34} ; [ DW_TAG_member ] -!36 = metadata !{i32 786445, metadata !24, metadata !"__FuncPtr", metadata !24, i32 609, i64 32, i64 32, i64 96, i32 0, metadata !32} ; [ DW_TAG_member ] -!37 = metadata !{i32 786445, metadata !24, metadata !"__descriptor", metadata !24, i32 609, i64 32, i64 32, i64 128, i32 0, metadata !38} ; [ DW_TAG_member ] -!38 = metadata !{i32 786447, metadata !0, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !39} ; [ DW_TAG_pointer_type ] -!39 = metadata !{i32 786451, metadata !0, metadata !"__block_descriptor_withcopydispose", metadata !40, i32 307, i64 128, i64 32, i32 0, i32 0, i32 0, metadata !41, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!31 = metadata !{i32 786445, metadata !152, metadata !24, metadata !"__isa", i32 609, i64 32, i64 32, i64 0, i32 0, metadata !32} ; [ DW_TAG_member ] +!32 = metadata !{i32 786447, null, metadata !0, metadata !"", i32 0, i64 32, i64 32, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ] +!33 = metadata !{i32 786445, metadata !152, metadata !24, metadata !"__flags", i32 609, i64 32, i64 32, i64 32, i32 0, metadata !34} ; [ DW_TAG_member ] +!34 = metadata !{i32 786468, null, metadata !0, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!35 = metadata !{i32 786445, metadata !152, metadata !24, metadata !"__reserved", i32 609, i64 32, i64 32, i64 64, i32 0, metadata !34} ; [ DW_TAG_member ] +!36 = metadata !{i32 786445, metadata !152, metadata !24, metadata !"__FuncPtr", i32 609, i64 32, i64 32, i64 96, i32 0, metadata !32} ; [ DW_TAG_member ] +!37 = metadata !{i32 786445, metadata !152, metadata !24, metadata !"__descriptor", i32 609, i64 32, i64 32, i64 128, i32 0, metadata !38} ; [ DW_TAG_member ] +!38 = metadata !{i32 786447, null, metadata !0, metadata !"", i32 0, i64 32, i64 32, i64 0, i32 0, metadata !39} ; [ DW_TAG_pointer_type ] +!39 = metadata !{i32 786451, metadata !153, metadata !0, metadata !"__block_descriptor_withcopydispose", i32 307, i64 128, i64 32, i32 0, i32 0, i32 0, metadata !41, i32 0, i32 0} ; [ DW_TAG_structure_type ] !40 = metadata !{i32 786473, metadata !153} ; [ DW_TAG_file_type ] !41 = metadata !{metadata !42, metadata !44, metadata !45, metadata !47} -!42 = metadata !{i32 786445, metadata !40, metadata !"reserved", metadata !40, i32 307, i64 32, i64 32, i64 0, i32 0, metadata !43} ; [ DW_TAG_member ] -!43 = metadata !{i32 786468, metadata !0, metadata !"long unsigned int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] -!44 = metadata !{i32 786445, metadata !40, metadata !"Size", metadata !40, i32 307, i64 32, i64 32, i64 32, i32 0, metadata !43} ; [ DW_TAG_member ] -!45 = metadata !{i32 786445, metadata !40, metadata !"CopyFuncPtr", metadata !40, i32 307, i64 32, i64 32, i64 64, i32 0, metadata !46} ; [ DW_TAG_member ] -!46 = metadata !{i32 786447, metadata !0, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !32} ; [ DW_TAG_pointer_type ] -!47 = metadata !{i32 786445, metadata !40, metadata !"DestroyFuncPtr", metadata !40, i32 307, i64 32, i64 32, i64 96, i32 0, metadata !46} ; [ DW_TAG_member ] -!48 = metadata !{i32 786445, metadata !24, metadata !"mydata", metadata !24, i32 609, i64 32, i64 32, i64 160, i32 0, metadata !49} ; [ DW_TAG_member ] -!49 = metadata !{i32 786447, metadata !0, metadata !"", null, i32 0, i64 32, i64 0, i64 0, i32 0, metadata !50} ; [ DW_TAG_pointer_type ] -!50 = metadata !{i32 786451, metadata !24, metadata !"", metadata !24, i32 0, i64 224, i64 0, i32 0, i32 16, i32 0, metadata !51, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!42 = metadata !{i32 786445, metadata !153, metadata !40, metadata !"reserved", i32 307, i64 32, i64 32, i64 0, i32 0, metadata !43} ; [ DW_TAG_member ] +!43 = metadata !{i32 786468, null, metadata !0, metadata !"long unsigned int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] +!44 = metadata !{i32 786445, metadata !153, metadata !40, metadata !"Size", i32 307, i64 32, i64 32, i64 32, i32 0, metadata !43} ; [ DW_TAG_member ] +!45 = metadata !{i32 786445, metadata !153, metadata !40, metadata !"CopyFuncPtr", i32 307, i64 32, i64 32, i64 64, i32 0, metadata !46} ; [ DW_TAG_member ] +!46 = metadata !{i32 786447, null, metadata !0, metadata !"", i32 0, i64 32, i64 32, i64 0, i32 0, metadata !32} ; [ DW_TAG_pointer_type ] +!47 = metadata !{i32 786445, metadata !153, metadata !40, metadata !"DestroyFuncPtr", i32 307, i64 32, i64 32, i64 96, i32 0, metadata !46} ; [ DW_TAG_member ] +!48 = metadata !{i32 786445, metadata !152, metadata !24, metadata !"mydata", i32 609, i64 32, i64 32, i64 160, i32 0, metadata !49} ; [ DW_TAG_member ] +!49 = metadata !{i32 786447, null, metadata !0, metadata !"", i32 0, i64 32, i64 0, i64 0, i32 0, metadata !50} ; [ DW_TAG_pointer_type ] +!50 = metadata !{i32 786451, metadata !152, metadata !24, metadata !"", i32 0, i64 224, i64 0, i32 0, i32 16, i32 0, metadata !51, i32 0, i32 0} ; [ DW_TAG_structure_type ] !51 = metadata !{metadata !52, metadata !53, metadata !54, metadata !55, metadata !56, metadata !57, metadata !58} -!52 = metadata !{i32 786445, metadata !24, metadata !"__isa", metadata !24, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !32} ; [ DW_TAG_member ] -!53 = metadata !{i32 786445, metadata !24, metadata !"__forwarding", metadata !24, i32 0, i64 32, i64 32, i64 32, i32 0, metadata !32} ; [ DW_TAG_member ] -!54 = metadata !{i32 786445, metadata !24, metadata !"__flags", metadata !24, i32 0, i64 32, i64 32, i64 64, i32 0, metadata !34} ; [ DW_TAG_member ] -!55 = metadata !{i32 786445, metadata !24, metadata !"__size", metadata !24, i32 0, i64 32, i64 32, i64 96, i32 0, metadata !34} ; [ DW_TAG_member ] -!56 = metadata !{i32 786445, metadata !24, metadata !"__copy_helper", metadata !24, i32 0, i64 32, i64 32, i64 128, i32 0, metadata !32} ; [ DW_TAG_member ] -!57 = metadata !{i32 786445, metadata !24, metadata !"__destroy_helper", metadata !24, i32 0, i64 32, i64 32, i64 160, i32 0, metadata !32} ; [ DW_TAG_member ] -!58 = metadata !{i32 786445, metadata !24, metadata !"mydata", metadata !24, i32 0, i64 32, i64 32, i64 192, i32 0, metadata !59} ; [ DW_TAG_member ] -!59 = metadata !{i32 786447, metadata !0, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !60} ; [ DW_TAG_pointer_type ] -!60 = metadata !{i32 786451, metadata !24, metadata !"UIMydata", metadata !61, i32 26, i64 128, i64 32, i32 0, i32 0, i32 0, metadata !62, i32 16, i32 0} ; [ DW_TAG_structure_type ] +!52 = metadata !{i32 786445, metadata !152, metadata !24, metadata !"__isa", i32 0, i64 32, i64 32, i64 0, i32 0, metadata !32} ; [ DW_TAG_member ] +!53 = metadata !{i32 786445, metadata !152, metadata !24, metadata !"__forwarding", i32 0, i64 32, i64 32, i64 32, i32 0, metadata !32} ; [ DW_TAG_member ] +!54 = metadata !{i32 786445, metadata !152, metadata !24, metadata !"__flags", i32 0, i64 32, i64 32, i64 64, i32 0, metadata !34} ; [ DW_TAG_member ] +!55 = metadata !{i32 786445, metadata !152, metadata !24, metadata !"__size", i32 0, i64 32, i64 32, i64 96, i32 0, metadata !34} ; [ DW_TAG_member ] +!56 = metadata !{i32 786445, metadata !152, metadata !24, metadata !"__copy_helper", i32 0, i64 32, i64 32, i64 128, i32 0, metadata !32} ; [ DW_TAG_member ] +!57 = metadata !{i32 786445, metadata !152, metadata !24, metadata !"__destroy_helper", i32 0, i64 32, i64 32, i64 160, i32 0, metadata !32} ; [ DW_TAG_member ] +!58 = metadata !{i32 786445, metadata !152, metadata !24, metadata !"mydata", i32 0, i64 32, i64 32, i64 192, i32 0, metadata !59} ; [ DW_TAG_member ] +!59 = metadata !{i32 786447, null, metadata !0, metadata !"", i32 0, i64 32, i64 32, i64 0, i32 0, metadata !60} ; [ DW_TAG_pointer_type ] +!60 = metadata !{i32 786451, metadata !154, metadata !24, metadata !"UIMydata", i32 26, i64 128, i64 32, i32 0, i32 0, i32 0, metadata !62, i32 16, i32 0} ; [ DW_TAG_structure_type ] !61 = metadata !{i32 786473, metadata !154} ; [ DW_TAG_file_type ] !62 = metadata !{metadata !63, metadata !71, metadata !75, metadata !79} !63 = metadata !{i32 786460, metadata !60, null, metadata !61, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !64} ; [ DW_TAG_inheritance ] -!64 = metadata !{i32 786451, metadata !40, metadata !"NSO", metadata !65, i32 66, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !66, i32 16, i32 0} ; [ DW_TAG_structure_type ] +!64 = metadata !{i32 786451, metadata !155, metadata !40, metadata !"NSO", i32 66, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !66, i32 16, i32 0} ; [ DW_TAG_structure_type ] !65 = metadata !{i32 786473, metadata !155} ; [ DW_TAG_file_type ] !66 = metadata !{metadata !67} -!67 = metadata !{i32 786445, metadata !65, metadata !"isa", metadata !65, i32 67, i64 32, i64 32, i64 0, i32 2, metadata !68, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] +!67 = metadata !{i32 786445, metadata !155, metadata !65, metadata !"isa", i32 67, i64 32, i64 32, i64 0, i32 2, metadata !68, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] !68 = metadata !{i32 786454, metadata !0, metadata !"Class", metadata !40, i32 197, i64 0, i64 0, i64 0, i32 0, metadata !69} ; [ DW_TAG_typedef ] -!69 = metadata !{i32 786447, metadata !0, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !70} ; [ DW_TAG_pointer_type ] -!70 = metadata !{i32 786451, metadata !0, metadata !"objc_class", metadata !40, i32 0, i64 0, i64 0, i32 0, i32 4, i32 0, null, i32 0, i32 0} ; [ DW_TAG_structure_type ] -!71 = metadata !{i32 786445, metadata !61, metadata !"_mydataRef", metadata !61, i32 28, i64 32, i64 32, i64 32, i32 0, metadata !72, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] +!69 = metadata !{i32 786447, null, metadata !0, metadata !"", i32 0, i64 32, i64 32, i64 0, i32 0, metadata !70} ; [ DW_TAG_pointer_type ] +!70 = metadata !{i32 786451, metadata !40, metadata !0, metadata !"objc_class", i32 0, i64 0, i64 0, i32 0, i32 4, i32 0, null, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!71 = metadata !{i32 786445, metadata !154, metadata !61, metadata !"_mydataRef", i32 28, i64 32, i64 32, i64 32, i32 0, metadata !72, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] !72 = metadata !{i32 786454, metadata !0, metadata !"CFTypeRef", metadata !24, i32 313, i64 0, i64 0, i64 0, i32 0, metadata !73} ; [ DW_TAG_typedef ] -!73 = metadata !{i32 786447, metadata !0, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !74} ; [ DW_TAG_pointer_type ] -!74 = metadata !{i32 786470, metadata !0, metadata !"", null, i32 0, i64 0, i64 0, i64 0, i32 0, null} ; [ DW_TAG_const_type ] -!75 = metadata !{i32 786445, metadata !61, metadata !"_scale", metadata !61, i32 29, i64 32, i64 32, i64 64, i32 0, metadata !76, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] +!73 = metadata !{i32 786447, null, metadata !0, metadata !"", i32 0, i64 32, i64 32, i64 0, i32 0, metadata !74} ; [ DW_TAG_pointer_type ] +!74 = metadata !{i32 786470, null, metadata !0, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null} ; [ DW_TAG_const_type ] +!75 = metadata !{i32 786445, metadata !154, metadata !61, metadata !"_scale", i32 29, i64 32, i64 32, i64 64, i32 0, metadata !76, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] !76 = metadata !{i32 786454, metadata !0, metadata !"Float", metadata !77, i32 89, i64 0, i64 0, i64 0, i32 0, metadata !78} ; [ DW_TAG_typedef ] !77 = metadata !{i32 786473, metadata !156} ; [ DW_TAG_file_type ] -!78 = metadata !{i32 786468, metadata !0, metadata !"float", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!79 = metadata !{i32 786445, metadata !61, metadata !"_mydataFlags", metadata !61, i32 37, i64 8, i64 8, i64 96, i32 0, metadata !80, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] -!80 = metadata !{i32 786451, metadata !0, metadata !"", metadata !61, i32 30, i64 8, i64 8, i32 0, i32 0, i32 0, metadata !81, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!78 = metadata !{i32 786468, null, metadata !0, metadata !"float", i32 0, i64 32, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] +!79 = metadata !{i32 786445, metadata !154, metadata !61, metadata !"_mydataFlags", i32 37, i64 8, i64 8, i64 96, i32 0, metadata !80, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] +!80 = metadata !{i32 786451, metadata !154, metadata !0, metadata !"", i32 30, i64 8, i64 8, i32 0, i32 0, i32 0, metadata !81, i32 0, i32 0} ; [ DW_TAG_structure_type ] !81 = metadata !{metadata !82, metadata !84, metadata !85, metadata !86, metadata !87, metadata !88} -!82 = metadata !{i32 786445, metadata !61, metadata !"named", metadata !61, i32 31, i64 1, i64 32, i64 0, i32 0, metadata !83} ; [ DW_TAG_member ] -!83 = metadata !{i32 786468, metadata !0, metadata !"unsigned int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] -!84 = metadata !{i32 786445, metadata !61, metadata !"mydataO", metadata !61, i32 32, i64 3, i64 32, i64 1, i32 0, metadata !83} ; [ DW_TAG_member ] -!85 = metadata !{i32 786445, metadata !61, metadata !"cached", metadata !61, i32 33, i64 1, i64 32, i64 4, i32 0, metadata !83} ; [ DW_TAG_member ] -!86 = metadata !{i32 786445, metadata !61, metadata !"hasBeenCached", metadata !61, i32 34, i64 1, i64 32, i64 5, i32 0, metadata !83} ; [ DW_TAG_member ] -!87 = metadata !{i32 786445, metadata !61, metadata !"hasPattern", metadata !61, i32 35, i64 1, i64 32, i64 6, i32 0, metadata !83} ; [ DW_TAG_member ] -!88 = metadata !{i32 786445, metadata !61, metadata !"isCIMydata", metadata !61, i32 36, i64 1, i64 32, i64 7, i32 0, metadata !83} ; [ DW_TAG_member ] -!89 = metadata !{i32 786445, metadata !24, metadata !"self", metadata !24, i32 609, i64 32, i64 32, i64 192, i32 0, metadata !90} ; [ DW_TAG_member ] -!90 = metadata !{i32 786447, metadata !0, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !91} ; [ DW_TAG_pointer_type ] -!91 = metadata !{i32 786451, metadata !40, metadata !"MyWork", metadata !24, i32 36, i64 384, i64 32, i32 0, i32 0, i32 0, metadata !92, i32 16, i32 0} ; [ DW_TAG_structure_type ] +!82 = metadata !{i32 786445, metadata !154, metadata !61, metadata !"named", i32 31, i64 1, i64 32, i64 0, i32 0, metadata !83} ; [ DW_TAG_member ] +!83 = metadata !{i32 786468, null, metadata !0, metadata !"unsigned int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] +!84 = metadata !{i32 786445, metadata !154, metadata !61, metadata !"mydataO", i32 32, i64 3, i64 32, i64 1, i32 0, metadata !83} ; [ DW_TAG_member ] +!85 = metadata !{i32 786445, metadata !154, metadata !61, metadata !"cached", i32 33, i64 1, i64 32, i64 4, i32 0, metadata !83} ; [ DW_TAG_member ] +!86 = metadata !{i32 786445, metadata !154, metadata !61, metadata !"hasBeenCached", i32 34, i64 1, i64 32, i64 5, i32 0, metadata !83} ; [ DW_TAG_member ] +!87 = metadata !{i32 786445, metadata !154, metadata !61, metadata !"hasPattern", i32 35, i64 1, i64 32, i64 6, i32 0, metadata !83} ; [ DW_TAG_member ] +!88 = metadata !{i32 786445, metadata !154, metadata !61, metadata !"isCIMydata", i32 36, i64 1, i64 32, i64 7, i32 0, metadata !83} ; [ DW_TAG_member ] +!89 = metadata !{i32 786445, metadata !152, metadata !24, metadata !"self", i32 609, i64 32, i64 32, i64 192, i32 0, metadata !90} ; [ DW_TAG_member ] +!90 = metadata !{i32 786447, null, metadata !0, metadata !"", i32 0, i64 32, i64 32, i64 0, i32 0, metadata !91} ; [ DW_TAG_pointer_type ] +!91 = metadata !{i32 786451, metadata !152, metadata !40, metadata !"MyWork", i32 36, i64 384, i64 32, i32 0, i32 0, i32 0, metadata !92, i32 16, i32 0} ; [ DW_TAG_structure_type ] !92 = metadata !{metadata !93, metadata !98, metadata !101, metadata !107, metadata !123} !93 = metadata !{i32 786460, metadata !91, null, metadata !24, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !94} ; [ DW_TAG_inheritance ] -!94 = metadata !{i32 786451, metadata !40, metadata !"twork", metadata !95, i32 43, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !96, i32 16, i32 0} ; [ DW_TAG_structure_type ] +!94 = metadata !{i32 786451, metadata !157, metadata !40, metadata !"twork", i32 43, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !96, i32 16, i32 0} ; [ DW_TAG_structure_type ] !95 = metadata !{i32 786473, metadata !157} ; [ DW_TAG_file_type ] !96 = metadata !{metadata !97} !97 = metadata !{i32 786460, metadata !94, null, metadata !95, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !64} ; [ DW_TAG_inheritance ] -!98 = metadata !{i32 786445, metadata !24, metadata !"_itemID", metadata !24, i32 38, i64 64, i64 32, i64 32, i32 1, metadata !99, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] +!98 = metadata !{i32 786445, metadata !152, metadata !24, metadata !"_itemID", i32 38, i64 64, i64 32, i64 32, i32 1, metadata !99, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] !99 = metadata !{i32 786454, metadata !0, metadata !"uint64_t", metadata !40, i32 55, i64 0, i64 0, i64 0, i32 0, metadata !100} ; [ DW_TAG_typedef ] -!100 = metadata !{i32 786468, metadata !0, metadata !"long long unsigned int", null, i32 0, i64 64, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] -!101 = metadata !{i32 786445, metadata !24, metadata !"_library", metadata !24, i32 39, i64 32, i64 32, i64 96, i32 1, metadata !102, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] -!102 = metadata !{i32 786447, metadata !0, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !103} ; [ DW_TAG_pointer_type ] -!103 = metadata !{i32 786451, metadata !40, metadata !"MyLibrary2", metadata !104, i32 22, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !105, i32 16, i32 0} ; [ DW_TAG_structure_type ] +!100 = metadata !{i32 786468, null, metadata !0, metadata !"long long unsigned int", i32 0, i64 64, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] +!101 = metadata !{i32 786445, metadata !152, metadata !24, metadata !"_library", i32 39, i64 32, i64 32, i64 96, i32 1, metadata !102, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] +!102 = metadata !{i32 786447, null, metadata !0, metadata !"", i32 0, i64 32, i64 32, i64 0, i32 0, metadata !103} ; [ DW_TAG_pointer_type ] +!103 = metadata !{i32 786451, metadata !158, metadata !40, metadata !"MyLibrary2", i32 22, i64 32, i64 32, i32 0, i32 0, i32 0, metadata !105, i32 16, i32 0} ; [ DW_TAG_structure_type ] !104 = metadata !{i32 786473, metadata !158} ; [ DW_TAG_file_type ] !105 = metadata !{metadata !106} !106 = metadata !{i32 786460, metadata !103, null, metadata !104, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !64} ; [ DW_TAG_inheritance ] -!107 = metadata !{i32 786445, metadata !24, metadata !"_bounds", metadata !24, i32 40, i64 128, i64 32, i64 128, i32 1, metadata !108, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] +!107 = metadata !{i32 786445, metadata !152, metadata !24, metadata !"_bounds", i32 40, i64 128, i64 32, i64 128, i32 1, metadata !108, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] !108 = metadata !{i32 786454, metadata !0, metadata !"CR", metadata !40, i32 33, i64 0, i64 0, i64 0, i32 0, metadata !109} ; [ DW_TAG_typedef ] -!109 = metadata !{i32 786451, metadata !0, metadata !"CR", metadata !77, i32 29, i64 128, i64 32, i32 0, i32 0, i32 0, metadata !110, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!109 = metadata !{i32 786451, metadata !156, metadata !0, metadata !"CR", i32 29, i64 128, i64 32, i32 0, i32 0, i32 0, metadata !110, i32 0, i32 0} ; [ DW_TAG_structure_type ] !110 = metadata !{metadata !111, metadata !117} -!111 = metadata !{i32 786445, metadata !77, metadata !"origin", metadata !77, i32 30, i64 64, i64 32, i64 0, i32 0, metadata !112} ; [ DW_TAG_member ] +!111 = metadata !{i32 786445, metadata !156, metadata !77, metadata !"origin", i32 30, i64 64, i64 32, i64 0, i32 0, metadata !112} ; [ DW_TAG_member ] !112 = metadata !{i32 786454, metadata !0, metadata !"CP", metadata !77, i32 17, i64 0, i64 0, i64 0, i32 0, metadata !113} ; [ DW_TAG_typedef ] -!113 = metadata !{i32 786451, metadata !0, metadata !"CP", metadata !77, i32 13, i64 64, i64 32, i32 0, i32 0, i32 0, metadata !114, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!113 = metadata !{i32 786451, metadata !156, metadata !0, metadata !"CP", i32 13, i64 64, i64 32, i32 0, i32 0, i32 0, metadata !114, i32 0, i32 0} ; [ DW_TAG_structure_type ] !114 = metadata !{metadata !115, metadata !116} -!115 = metadata !{i32 786445, metadata !77, metadata !"x", metadata !77, i32 14, i64 32, i64 32, i64 0, i32 0, metadata !76} ; [ DW_TAG_member ] -!116 = metadata !{i32 786445, metadata !77, metadata !"y", metadata !77, i32 15, i64 32, i64 32, i64 32, i32 0, metadata !76} ; [ DW_TAG_member ] -!117 = metadata !{i32 786445, metadata !77, metadata !"size", metadata !77, i32 31, i64 64, i64 32, i64 64, i32 0, metadata !118} ; [ DW_TAG_member ] +!115 = metadata !{i32 786445, metadata !156, metadata !77, metadata !"x", i32 14, i64 32, i64 32, i64 0, i32 0, metadata !76} ; [ DW_TAG_member ] +!116 = metadata !{i32 786445, metadata !156, metadata !77, metadata !"y", i32 15, i64 32, i64 32, i64 32, i32 0, metadata !76} ; [ DW_TAG_member ] +!117 = metadata !{i32 786445, metadata !156, metadata !77, metadata !"size", i32 31, i64 64, i64 32, i64 64, i32 0, metadata !118} ; [ DW_TAG_member ] !118 = metadata !{i32 786454, metadata !0, metadata !"Size", metadata !77, i32 25, i64 0, i64 0, i64 0, i32 0, metadata !119} ; [ DW_TAG_typedef ] -!119 = metadata !{i32 786451, metadata !0, metadata !"Size", metadata !77, i32 21, i64 64, i64 32, i32 0, i32 0, i32 0, metadata !120, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!119 = metadata !{i32 786451, metadata !156, metadata !0, metadata !"Size", i32 21, i64 64, i64 32, i32 0, i32 0, i32 0, metadata !120, i32 0, i32 0} ; [ DW_TAG_structure_type ] !120 = metadata !{metadata !121, metadata !122} -!121 = metadata !{i32 786445, metadata !77, metadata !"width", metadata !77, i32 22, i64 32, i64 32, i64 0, i32 0, metadata !76} ; [ DW_TAG_member ] -!122 = metadata !{i32 786445, metadata !77, metadata !"height", metadata !77, i32 23, i64 32, i64 32, i64 32, i32 0, metadata !76} ; [ DW_TAG_member ] -!123 = metadata !{i32 786445, metadata !24, metadata !"_data", metadata !24, i32 40, i64 128, i64 32, i64 256, i32 1, metadata !108, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] -!124 = metadata !{i32 786445, metadata !24, metadata !"semi", metadata !24, i32 609, i64 32, i64 32, i64 224, i32 0, metadata !125} ; [ DW_TAG_member ] +!121 = metadata !{i32 786445, metadata !156, metadata !77, metadata !"width", i32 22, i64 32, i64 32, i64 0, i32 0, metadata !76} ; [ DW_TAG_member ] +!122 = metadata !{i32 786445, metadata !156, metadata !77, metadata !"height", i32 23, i64 32, i64 32, i64 32, i32 0, metadata !76} ; [ DW_TAG_member ] +!123 = metadata !{i32 786445, metadata !152, metadata !24, metadata !"_data", i32 40, i64 128, i64 32, i64 256, i32 1, metadata !108, metadata !"", metadata !"", metadata !"", i32 0} ; [ DW_TAG_member ] +!124 = metadata !{i32 786445, metadata !152, metadata !24, metadata !"semi", i32 609, i64 32, i64 32, i64 224, i32 0, metadata !125} ; [ DW_TAG_member ] !125 = metadata !{i32 786454, metadata !0, metadata !"d_t", metadata !24, i32 35, i64 0, i64 0, i64 0, i32 0, metadata !126} ; [ DW_TAG_typedef ] -!126 = metadata !{i32 786447, metadata !0, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !127} ; [ DW_TAG_pointer_type ] -!127 = metadata !{i32 786451, metadata !0, metadata !"my_struct", metadata !128, i32 49, i64 0, i64 0, i32 0, i32 4, i32 0, null, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!126 = metadata !{i32 786447, null, metadata !0, metadata !"", i32 0, i64 32, i64 32, i64 0, i32 0, metadata !127} ; [ DW_TAG_pointer_type ] +!127 = metadata !{i32 786451, metadata !159, metadata !0, metadata !"my_struct", i32 49, i64 0, i64 0, i32 0, i32 4, i32 0, null, i32 0, i32 0} ; [ DW_TAG_structure_type ] !128 = metadata !{i32 786473, metadata !159} ; [ DW_TAG_file_type ] !129 = metadata !{i32 609, i32 144, metadata !23, null} !130 = metadata !{i32 786689, metadata !23, metadata !"loadedMydata", metadata !24, i32 33555041, metadata !59, i32 0, null} ; [ DW_TAG_arg_variable ] diff --git a/test/CodeGen/ARM/debug-info-branch-folding.ll b/test/CodeGen/ARM/debug-info-branch-folding.ll index 6a474c7..38945ac 100644 --- a/test/CodeGen/ARM/debug-info-branch-folding.ll +++ b/test/CodeGen/ARM/debug-info-branch-folding.ll @@ -40,52 +40,52 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"test0001", metadata !"test0001", metadata !"", metadata !1, i32 3, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, <4 x float> (float)* @test0001, null, null, metadata !51, i32 0} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786473, metadata !54} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 12, metadata !1, metadata !"clang version 3.0 (trunk 129915)", i1 true, metadata !"", i32 0, null, null, metadata !50, null, null} ; [ DW_TAG_compile_unit ] -!3 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!2 = metadata !{i32 786449, metadata !54, i32 12, metadata !"clang version 3.0 (trunk 129915)", i1 true, metadata !"", i32 0, null, null, metadata !50, null, null, null} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 786453, metadata !54, metadata !1, metadata !"", i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !4 = metadata !{metadata !5} -!5 = metadata !{i32 786454, metadata !2, metadata !"v4f32", metadata !1, i32 14, i64 0, i64 0, i64 0, i32 0, metadata !6} ; [ DW_TAG_typedef ] +!5 = metadata !{i32 786454, metadata !54, metadata !2, metadata !"v4f32", i32 14, i64 0, i64 0, i64 0, i32 0, metadata !6} ; [ DW_TAG_typedef ] !6 = metadata !{i32 786691, metadata !2, metadata !"", metadata !2, i32 0, i64 128, i64 128, i32 0, i32 0, metadata !7, metadata !8, i32 0, i32 0} ; [ DW_TAG_vector_type ] -!7 = metadata !{i32 786468, metadata !2, metadata !"float", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] +!7 = metadata !{i32 786468, null, metadata !2, metadata !"float", i32 0, i64 32, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] !8 = metadata !{metadata !9} !9 = metadata !{i32 786465, i64 0, i64 4} ; [ DW_TAG_subrange_type ] !10 = metadata !{i32 786478, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 59, metadata !11, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32, i8**, i1)* @main, null, null, metadata !52, i32 0} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !12, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!11 = metadata !{i32 786453, metadata !54, metadata !1, metadata !"", i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !12, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !12 = metadata !{metadata !13} -!13 = metadata !{i32 786468, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!13 = metadata !{i32 786468, null, metadata !2, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !14 = metadata !{i32 786478, i32 0, metadata !15, metadata !"printFV", metadata !"printFV", metadata !"", metadata !15, i32 41, metadata !16, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, null, null, null, metadata !53, i32 0} ; [ DW_TAG_subprogram ] !15 = metadata !{i32 786473, metadata !55} ; [ DW_TAG_file_type ] -!16 = metadata !{i32 786453, metadata !15, metadata !"", metadata !15, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !17, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!16 = metadata !{i32 786453, metadata !55, metadata !15, metadata !"", i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !17, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !17 = metadata !{null} !18 = metadata !{i32 786689, metadata !0, metadata !"a", metadata !1, i32 16777219, metadata !7, i32 0, null} ; [ DW_TAG_arg_variable ] !19 = metadata !{i32 786689, metadata !10, metadata !"argc", metadata !1, i32 16777275, metadata !13, i32 0, null} ; [ DW_TAG_arg_variable ] !20 = metadata !{i32 786689, metadata !10, metadata !"argv", metadata !1, i32 33554491, metadata !21, i32 0, null} ; [ DW_TAG_arg_variable ] -!21 = metadata !{i32 786447, metadata !2, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !22} ; [ DW_TAG_pointer_type ] -!22 = metadata !{i32 786447, metadata !2, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !23} ; [ DW_TAG_pointer_type ] -!23 = metadata !{i32 786468, metadata !2, metadata !"char", null, i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ] +!21 = metadata !{i32 786447, null, metadata !2, metadata !"", i32 0, i64 32, i64 32, i64 0, i32 0, metadata !22} ; [ DW_TAG_pointer_type ] +!22 = metadata !{i32 786447, null, metadata !2, metadata !"", i32 0, i64 32, i64 32, i64 0, i32 0, metadata !23} ; [ DW_TAG_pointer_type ] +!23 = metadata !{i32 786468, null, metadata !2, metadata !"char", i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ] !24 = metadata !{i32 786688, metadata !25, metadata !"i", metadata !1, i32 60, metadata !13, i32 0, null} ; [ DW_TAG_auto_variable ] -!25 = metadata !{i32 786443, metadata !10, i32 59, i32 33, metadata !1, i32 14} ; [ DW_TAG_lexical_block ] +!25 = metadata !{i32 786443, metadata !1, metadata !10, i32 59, i32 33, i32 14} ; [ DW_TAG_lexical_block ] !26 = metadata !{i32 786688, metadata !25, metadata !"j", metadata !1, i32 60, metadata !13, i32 0, null} ; [ DW_TAG_auto_variable ] !27 = metadata !{i32 786688, metadata !25, metadata !"x", metadata !1, i32 61, metadata !5, i32 0, null} ; [ DW_TAG_auto_variable ] !28 = metadata !{i32 786688, metadata !25, metadata !"y", metadata !1, i32 62, metadata !5, i32 0, null} ; [ DW_TAG_auto_variable ] !29 = metadata !{i32 786688, metadata !25, metadata !"z", metadata !1, i32 63, metadata !5, i32 0, null} ; [ DW_TAG_auto_variable ] !30 = metadata !{i32 786689, metadata !14, metadata !"F", metadata !15, i32 16777257, metadata !31, i32 0, null} ; [ DW_TAG_arg_variable ] -!31 = metadata !{i32 786447, metadata !2, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !32} ; [ DW_TAG_pointer_type ] -!32 = metadata !{i32 786454, metadata !2, metadata !"FV", metadata !15, i32 25, i64 0, i64 0, i64 0, i32 0, metadata !33} ; [ DW_TAG_typedef ] -!33 = metadata !{i32 786455, metadata !2, metadata !"", metadata !15, i32 22, i64 128, i64 128, i64 0, i32 0, i32 0, metadata !34, i32 0, i32 0} ; [ DW_TAG_union_type ] +!31 = metadata !{i32 786447, null, metadata !2, metadata !"", i32 0, i64 32, i64 32, i64 0, i32 0, metadata !32} ; [ DW_TAG_pointer_type ] +!32 = metadata !{i32 786454, metadata !55, metadata !2, metadata !"FV", i32 25, i64 0, i64 0, i64 0, i32 0, metadata !33} ; [ DW_TAG_typedef ] +!33 = metadata !{i32 786455, metadata !55, metadata !2, metadata !"", i32 22, i64 128, i64 128, i64 0, i32 0, i32 0, metadata !34, i32 0, i32 0} ; [ DW_TAG_union_type ] !34 = metadata !{metadata !35, metadata !37} -!35 = metadata !{i32 786445, metadata !15, metadata !"V", metadata !15, i32 23, i64 128, i64 128, i64 0, i32 0, metadata !36} ; [ DW_TAG_member ] -!36 = metadata !{i32 786454, metadata !2, metadata !"v4sf", metadata !15, i32 3, i64 0, i64 0, i64 0, i32 0, metadata !6} ; [ DW_TAG_typedef ] -!37 = metadata !{i32 786445, metadata !15, metadata !"A", metadata !15, i32 24, i64 128, i64 32, i64 0, i32 0, metadata !38} ; [ DW_TAG_member ] -!38 = metadata !{i32 786433, metadata !2, metadata !"", metadata !2, i32 0, i64 128, i64 32, i32 0, i32 0, metadata !7, metadata !8, i32 0, i32 0} ; [ DW_TAG_array_type ] +!35 = metadata !{i32 786445, metadata !55, metadata !15, metadata !"V", i32 23, i64 128, i64 128, i64 0, i32 0, metadata !36} ; [ DW_TAG_member ] +!36 = metadata !{i32 786454, metadata !55, metadata !2, metadata !"v4sf", i32 3, i64 0, i64 0, i64 0, i32 0, metadata !6} ; [ DW_TAG_typedef ] +!37 = metadata !{i32 786445, metadata !55, metadata !15, metadata !"A", i32 24, i64 128, i64 32, i64 0, i32 0, metadata !38} ; [ DW_TAG_member ] +!38 = metadata !{i32 786433, null, metadata !2, metadata !"", i32 0, i64 128, i64 32, i32 0, i32 0, metadata !7, metadata !8, i32 0, i32 0} ; [ DW_TAG_array_type ] !39 = metadata !{i32 79, i32 7, metadata !40, null} -!40 = metadata !{i32 786443, metadata !41, i32 75, i32 35, metadata !1, i32 18} ; [ DW_TAG_lexical_block ] -!41 = metadata !{i32 786443, metadata !42, i32 75, i32 5, metadata !1, i32 17} ; [ DW_TAG_lexical_block ] -!42 = metadata !{i32 786443, metadata !43, i32 71, i32 32, metadata !1, i32 16} ; [ DW_TAG_lexical_block ] -!43 = metadata !{i32 786443, metadata !25, i32 71, i32 3, metadata !1, i32 15} ; [ DW_TAG_lexical_block ] +!40 = metadata !{i32 786443, metadata !1, metadata !41, i32 75, i32 35, i32 18} ; [ DW_TAG_lexical_block ] +!41 = metadata !{i32 786443, metadata !1, metadata !42, i32 75, i32 5, i32 17} ; [ DW_TAG_lexical_block ] +!42 = metadata !{i32 786443, metadata !1, metadata !43, i32 71, i32 32, i32 16} ; [ DW_TAG_lexical_block ] +!43 = metadata !{i32 786443, metadata !1, metadata !25, i32 71, i32 3, i32 15} ; [ DW_TAG_lexical_block ] !44 = metadata !{i32 75, i32 5, metadata !42, null} !45 = metadata !{i32 42, i32 2, metadata !46, metadata !48} -!46 = metadata !{i32 786443, metadata !47, i32 42, i32 2, metadata !15, i32 20} ; [ DW_TAG_lexical_block ] -!47 = metadata !{i32 786443, metadata !14, i32 41, i32 28, metadata !15, i32 19} ; [ DW_TAG_lexical_block ] +!46 = metadata !{i32 786443, metadata !15, metadata !47, i32 42, i32 2, i32 20} ; [ DW_TAG_lexical_block ] +!47 = metadata !{i32 786443, metadata !15, metadata !14, i32 41, i32 28, i32 19} ; [ DW_TAG_lexical_block ] !48 = metadata !{i32 95, i32 3, metadata !25, null} !49 = metadata !{i32 99, i32 3, metadata !25, null} !50 = metadata !{metadata !0, metadata !10, metadata !14} diff --git a/test/CodeGen/ARM/debug-info-d16-reg.ll b/test/CodeGen/ARM/debug-info-d16-reg.ll index 20c4b72..e4040fa 100644 --- a/test/CodeGen/ARM/debug-info-d16-reg.ll +++ b/test/CodeGen/ARM/debug-info-d16-reg.ll @@ -58,17 +58,17 @@ declare i32 @puts(i8* nocapture) nounwind !llvm.dbg.cu = !{!2} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"printer", metadata !"printer", metadata !"printer", metadata !1, i32 12, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i32 (i8*, double, i8)* @printer, null, null, metadata !43, i32 12} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786478, metadata !1, metadata !"printer", metadata !"printer", metadata !"printer", metadata !1, i32 12, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i32 (i8*, double, i8)* @printer, null, null, metadata !43, i32 12} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786473, metadata !46} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 1, metadata !1, metadata !"(LLVM build 00)", i1 true, metadata !"", i32 0, null, null, metadata !42, null, metadata !""} ; [ DW_TAG_compile_unit ] +!2 = metadata !{i32 786449, i32 1, metadata !1, metadata !"(LLVM build 00)", i1 true, metadata !"", i32 0, null, null, metadata !42, null, null, metadata !""} ; [ DW_TAG_compile_unit ] !3 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] !4 = metadata !{metadata !5, metadata !6, metadata !7, metadata !8} !5 = metadata !{i32 786468, metadata !1, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !6 = metadata !{i32 786447, metadata !1, metadata !"", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ] !7 = metadata !{i32 786468, metadata !1, metadata !"double", metadata !1, i32 0, i64 64, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] !8 = metadata !{i32 786468, metadata !1, metadata !"unsigned char", metadata !1, i32 0, i64 8, i64 8, i64 0, i32 0, i32 8} ; [ DW_TAG_base_type ] -!9 = metadata !{i32 786478, i32 0, metadata !1, metadata !"inlineprinter", metadata !"inlineprinter", metadata !"inlineprinter", metadata !1, i32 5, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i32 (i8*, double, i8)* @inlineprinter, null, null, metadata !44, i32 5} ; [ DW_TAG_subprogram ] -!10 = metadata !{i32 786478, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"main", metadata !1, i32 18, metadata !11, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i32 (i32, i8**)* @main, null, null, metadata !45, i32 18} ; [ DW_TAG_subprogram ] +!9 = metadata !{i32 786478, metadata !1, metadata !"inlineprinter", metadata !"inlineprinter", metadata !"inlineprinter", metadata !1, i32 5, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i32 (i8*, double, i8)* @inlineprinter, null, null, metadata !44, i32 5} ; [ DW_TAG_subprogram ] +!10 = metadata !{i32 786478, metadata !1, metadata !"main", metadata !"main", metadata !"main", metadata !1, i32 18, metadata !11, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i32 (i32, i8**)* @main, null, null, metadata !45, i32 18} ; [ DW_TAG_subprogram ] !11 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] !12 = metadata !{metadata !5, metadata !5, metadata !13} !13 = metadata !{i32 786447, metadata !1, metadata !"", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !14} ; [ DW_TAG_pointer_type ] @@ -83,14 +83,14 @@ declare i32 @puts(i8* nocapture) nounwind !22 = metadata !{i32 786689, metadata !10, metadata !"argc", metadata !1, i32 17, metadata !5, i32 0, null} ; [ DW_TAG_arg_variable ] !23 = metadata !{i32 786689, metadata !10, metadata !"argv", metadata !1, i32 17, metadata !13, i32 0, null} ; [ DW_TAG_arg_variable ] !24 = metadata !{i32 786688, metadata !25, metadata !"dval", metadata !1, i32 19, metadata !7, i32 0, null} ; [ DW_TAG_auto_variable ] -!25 = metadata !{i32 786443, metadata !10, i32 18, i32 0, metadata !1, i32 2} ; [ DW_TAG_lexical_block ] +!25 = metadata !{i32 786443, metadata !1, metadata !10, i32 18, i32 0, i32 2} ; [ DW_TAG_lexical_block ] !26 = metadata !{i32 4, i32 0, metadata !9, null} !27 = metadata !{i32 6, i32 0, metadata !28, null} -!28 = metadata !{i32 786443, metadata !9, i32 5, i32 0, metadata !1, i32 1} ; [ DW_TAG_lexical_block ] +!28 = metadata !{i32 786443, metadata !1, metadata !9, i32 5, i32 0, i32 1} ; [ DW_TAG_lexical_block ] !29 = metadata !{i32 7, i32 0, metadata !28, null} !30 = metadata !{i32 11, i32 0, metadata !0, null} !31 = metadata !{i32 13, i32 0, metadata !32, null} -!32 = metadata !{i32 786443, metadata !0, i32 12, i32 0, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!32 = metadata !{i32 786443, metadata !1, metadata !0, i32 12, i32 0, i32 0} ; [ DW_TAG_lexical_block ] !33 = metadata !{i32 14, i32 0, metadata !32, null} !34 = metadata !{i32 17, i32 0, metadata !10, null} !35 = metadata !{i32 19, i32 0, metadata !25, null} diff --git a/test/CodeGen/ARM/debug-info-qreg.ll b/test/CodeGen/ARM/debug-info-qreg.ll index 59bac05..1de6ffa 100644 --- a/test/CodeGen/ARM/debug-info-qreg.ll +++ b/test/CodeGen/ARM/debug-info-qreg.ll @@ -37,54 +37,54 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!2} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"test0001", metadata !"test0001", metadata !"", metadata !1, i32 3, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, <4 x float> (float)* @test0001, null, null, metadata !51, i32 3} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786478, metadata !1, metadata !"test0001", metadata !"test0001", metadata !"", metadata !1, i32 3, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, <4 x float> (float)* @test0001, null, null, metadata !51, i32 3} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786473, metadata !54} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 12, metadata !1, metadata !"clang version 3.0 (trunk 129915)", i1 true, metadata !"", i32 0, null, null, metadata !50, null, null} ; [ DW_TAG_compile_unit ] -!3 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!2 = metadata !{i32 786449, metadata !54, i32 12, metadata !"clang version 3.0 (trunk 129915)", i1 true, metadata !"", i32 0, null, null, metadata !50, null, null, null} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 786453, metadata !54, metadata !1, metadata !"", i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !4 = metadata !{metadata !5} -!5 = metadata !{i32 786454, metadata !2, metadata !"v4f32", metadata !1, i32 14, i64 0, i64 0, i64 0, i32 0, metadata !6} ; [ DW_TAG_typedef ] +!5 = metadata !{i32 786454, metadata !54, metadata !2, metadata !"v4f32", i32 14, i64 0, i64 0, i64 0, i32 0, metadata !6} ; [ DW_TAG_typedef ] !6 = metadata !{i32 786691, metadata !2, metadata !"", metadata !2, i32 0, i64 128, i64 128, i32 0, i32 0, metadata !7, metadata !8, i32 0, i32 0} ; [ DW_TAG_vector_type ] -!7 = metadata !{i32 786468, metadata !2, metadata !"float", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] +!7 = metadata !{i32 786468, null, metadata !2, metadata !"float", i32 0, i64 32, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] !8 = metadata !{metadata !9} !9 = metadata !{i32 786465, i64 0, i64 4} ; [ DW_TAG_subrange_type ] -!10 = metadata !{i32 786478, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 59, metadata !11, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32, i8**)* @main, null, null, metadata !52, i32 59} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !12, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!10 = metadata !{i32 786478, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 59, metadata !11, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32, i8**)* @main, null, null, metadata !52, i32 59} ; [ DW_TAG_subprogram ] +!11 = metadata !{i32 786453, metadata !54, metadata !1, metadata !"", i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !12, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !12 = metadata !{metadata !13} -!13 = metadata !{i32 786468, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!14 = metadata !{i32 786478, i32 0, metadata !15, metadata !"printFV", metadata !"printFV", metadata !"", metadata !15, i32 41, metadata !16, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, null, null, null, metadata !53, i32 41} ; [ DW_TAG_subprogram ] +!13 = metadata !{i32 786468, null, metadata !2, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!14 = metadata !{i32 786478, metadata !15, metadata !"printFV", metadata !"printFV", metadata !"", metadata !15, i32 41, metadata !16, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, null, null, null, metadata !53, i32 41} ; [ DW_TAG_subprogram ] !15 = metadata !{i32 786473, metadata !55} ; [ DW_TAG_file_type ] -!16 = metadata !{i32 786453, metadata !15, metadata !"", metadata !15, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !17, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!16 = metadata !{i32 786453, metadata !55, metadata !15, metadata !"", i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !17, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !17 = metadata !{null} !18 = metadata !{i32 786689, metadata !0, metadata !"a", metadata !1, i32 16777219, metadata !7, i32 0, null} ; [ DW_TAG_arg_variable ] !19 = metadata !{i32 786689, metadata !10, metadata !"argc", metadata !1, i32 16777275, metadata !13, i32 0, null} ; [ DW_TAG_arg_variable ] !20 = metadata !{i32 786689, metadata !10, metadata !"argv", metadata !1, i32 33554491, metadata !21, i32 0, null} ; [ DW_TAG_arg_variable ] -!21 = metadata !{i32 786447, metadata !2, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !22} ; [ DW_TAG_pointer_type ] -!22 = metadata !{i32 786447, metadata !2, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !23} ; [ DW_TAG_pointer_type ] -!23 = metadata !{i32 786468, metadata !2, metadata !"char", null, i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ] +!21 = metadata !{i32 786447, null, metadata !2, metadata !"", i32 0, i64 32, i64 32, i64 0, i32 0, metadata !22} ; [ DW_TAG_pointer_type ] +!22 = metadata !{i32 786447, null, metadata !2, metadata !"", i32 0, i64 32, i64 32, i64 0, i32 0, metadata !23} ; [ DW_TAG_pointer_type ] +!23 = metadata !{i32 786468, null, metadata !2, metadata !"char", i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ] !24 = metadata !{i32 786688, metadata !25, metadata !"i", metadata !1, i32 60, metadata !13, i32 0, null} ; [ DW_TAG_auto_variable ] -!25 = metadata !{i32 786443, metadata !10, i32 59, i32 33, metadata !1, i32 14} ; [ DW_TAG_lexical_block ] +!25 = metadata !{i32 786443, metadata !1, metadata !10, i32 59, i32 33, i32 14} ; [ DW_TAG_lexical_block ] !26 = metadata !{i32 786688, metadata !25, metadata !"j", metadata !1, i32 60, metadata !13, i32 0, null} ; [ DW_TAG_auto_variable ] !27 = metadata !{i32 786688, metadata !25, metadata !"x", metadata !1, i32 61, metadata !5, i32 0, null} ; [ DW_TAG_auto_variable ] !28 = metadata !{i32 786688, metadata !25, metadata !"y", metadata !1, i32 62, metadata !5, i32 0, null} ; [ DW_TAG_auto_variable ] !29 = metadata !{i32 786688, metadata !25, metadata !"z", metadata !1, i32 63, metadata !5, i32 0, null} ; [ DW_TAG_auto_variable ] !30 = metadata !{i32 786689, metadata !14, metadata !"F", metadata !15, i32 16777257, metadata !31, i32 0, null} ; [ DW_TAG_arg_variable ] -!31 = metadata !{i32 786447, metadata !2, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !32} ; [ DW_TAG_pointer_type ] -!32 = metadata !{i32 786454, metadata !2, metadata !"FV", metadata !15, i32 25, i64 0, i64 0, i64 0, i32 0, metadata !33} ; [ DW_TAG_typedef ] -!33 = metadata !{i32 786455, metadata !2, metadata !"", metadata !15, i32 22, i64 128, i64 128, i64 0, i32 0, i32 0, metadata !34, i32 0, i32 0} ; [ DW_TAG_union_type ] +!31 = metadata !{i32 786447, null, metadata !2, metadata !"", i32 0, i64 32, i64 32, i64 0, i32 0, metadata !32} ; [ DW_TAG_pointer_type ] +!32 = metadata !{i32 786454, metadata !55, metadata !2, metadata !"FV", i32 25, i64 0, i64 0, i64 0, i32 0, metadata !33} ; [ DW_TAG_typedef ] +!33 = metadata !{i32 786455, metadata !55, metadata !2, metadata !"", i32 22, i64 128, i64 128, i64 0, i32 0, i32 0, metadata !34, i32 0, i32 0} ; [ DW_TAG_union_type ] !34 = metadata !{metadata !35, metadata !37} -!35 = metadata !{i32 786445, metadata !15, metadata !"V", metadata !15, i32 23, i64 128, i64 128, i64 0, i32 0, metadata !36} ; [ DW_TAG_member ] -!36 = metadata !{i32 786454, metadata !2, metadata !"v4sf", metadata !15, i32 3, i64 0, i64 0, i64 0, i32 0, metadata !6} ; [ DW_TAG_typedef ] -!37 = metadata !{i32 786445, metadata !15, metadata !"A", metadata !15, i32 24, i64 128, i64 32, i64 0, i32 0, metadata !38} ; [ DW_TAG_member ] -!38 = metadata !{i32 786433, metadata !2, metadata !"", metadata !2, i32 0, i64 128, i64 32, i32 0, i32 0, metadata !7, metadata !8, i32 0, i32 0} ; [ DW_TAG_array_type ] +!35 = metadata !{i32 786445, metadata !55, metadata !15, metadata !"V", i32 23, i64 128, i64 128, i64 0, i32 0, metadata !36} ; [ DW_TAG_member ] +!36 = metadata !{i32 786454, metadata !55, metadata !2, metadata !"v4sf", i32 3, i64 0, i64 0, i64 0, i32 0, metadata !6} ; [ DW_TAG_typedef ] +!37 = metadata !{i32 786445, metadata !55, metadata !15, metadata !"A", i32 24, i64 128, i64 32, i64 0, i32 0, metadata !38} ; [ DW_TAG_member ] +!38 = metadata !{i32 786433, null, metadata !2, metadata !"", i32 0, i64 128, i64 32, i32 0, i32 0, metadata !7, metadata !8, i32 0, i32 0} ; [ DW_TAG_array_type ] !39 = metadata !{i32 79, i32 7, metadata !40, null} -!40 = metadata !{i32 786443, metadata !41, i32 75, i32 35, metadata !1, i32 18} ; [ DW_TAG_lexical_block ] -!41 = metadata !{i32 786443, metadata !42, i32 75, i32 5, metadata !1, i32 17} ; [ DW_TAG_lexical_block ] -!42 = metadata !{i32 786443, metadata !43, i32 71, i32 32, metadata !1, i32 16} ; [ DW_TAG_lexical_block ] -!43 = metadata !{i32 786443, metadata !25, i32 71, i32 3, metadata !1, i32 15} ; [ DW_TAG_lexical_block ] +!40 = metadata !{i32 786443, metadata !1, metadata !41, i32 75, i32 35, i32 18} ; [ DW_TAG_lexical_block ] +!41 = metadata !{i32 786443, metadata !1, metadata !42, i32 75, i32 5, i32 17} ; [ DW_TAG_lexical_block ] +!42 = metadata !{i32 786443, metadata !1, metadata !43, i32 71, i32 32, i32 16} ; [ DW_TAG_lexical_block ] +!43 = metadata !{i32 786443, metadata !1, metadata !25, i32 71, i32 3, i32 15} ; [ DW_TAG_lexical_block ] !44 = metadata !{i32 75, i32 5, metadata !42, null} !45 = metadata !{i32 42, i32 2, metadata !46, metadata !48} -!46 = metadata !{i32 786443, metadata !47, i32 42, i32 2, metadata !15, i32 20} ; [ DW_TAG_lexical_block ] -!47 = metadata !{i32 786443, metadata !14, i32 41, i32 28, metadata !15, i32 19} ; [ DW_TAG_lexical_block ] +!46 = metadata !{i32 786443, metadata !15, metadata !47, i32 42, i32 2, i32 20} ; [ DW_TAG_lexical_block ] +!47 = metadata !{i32 786443, metadata !15, metadata !14, i32 41, i32 28, i32 19} ; [ DW_TAG_lexical_block ] !48 = metadata !{i32 95, i32 3, metadata !25, null} !49 = metadata !{i32 99, i32 3, metadata !25, null} !50 = metadata !{metadata !0, metadata !10, metadata !14} diff --git a/test/CodeGen/ARM/debug-info-s16-reg.ll b/test/CodeGen/ARM/debug-info-s16-reg.ll index 270a28c..1868942 100644 --- a/test/CodeGen/ARM/debug-info-s16-reg.ll +++ b/test/CodeGen/ARM/debug-info-s16-reg.ll @@ -63,14 +63,14 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!2} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"inlineprinter", metadata !"inlineprinter", metadata !"", metadata !1, i32 5, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i8*, float, i8)* @inlineprinter, null, null, metadata !48, i32 5} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786478, metadata !1, metadata !"inlineprinter", metadata !"inlineprinter", metadata !"", metadata !1, i32 5, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i8*, float, i8)* @inlineprinter, null, null, metadata !48, i32 5} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786473, metadata !51} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 12, metadata !1, metadata !"clang version 3.0 (trunk 129915)", i1 true, metadata !"", i32 0, null, null, metadata !47, null, null} ; [ DW_TAG_compile_unit ] +!2 = metadata !{i32 786449, i32 12, metadata !1, metadata !"clang version 3.0 (trunk 129915)", i1 true, metadata !"", i32 0, null, null, metadata !47, null, null, null} ; [ DW_TAG_compile_unit ] !3 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !4 = metadata !{metadata !5} !5 = metadata !{i32 786468, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 786478, i32 0, metadata !1, metadata !"printer", metadata !"printer", metadata !"", metadata !1, i32 12, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i8*, float, i8)* @printer, null, null, metadata !49, i32 12} ; [ DW_TAG_subprogram ] -!7 = metadata !{i32 786478, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 18, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32, i8**)* @main, null, null, metadata !50, i32 18} ; [ DW_TAG_subprogram ] +!6 = metadata !{i32 786478, metadata !1, metadata !"printer", metadata !"printer", metadata !"", metadata !1, i32 12, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i8*, float, i8)* @printer, null, null, metadata !49, i32 12} ; [ DW_TAG_subprogram ] +!7 = metadata !{i32 786478, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 18, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32, i8**)* @main, null, null, metadata !50, i32 18} ; [ DW_TAG_subprogram ] !8 = metadata !{i32 786689, metadata !0, metadata !"ptr", metadata !1, i32 16777220, metadata !9, i32 0, null} ; [ DW_TAG_arg_variable ] !9 = metadata !{i32 786447, metadata !2, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ] !10 = metadata !{i32 786689, metadata !0, metadata !"val", metadata !1, i32 33554436, metadata !11, i32 0, null} ; [ DW_TAG_arg_variable ] @@ -86,18 +86,18 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !20 = metadata !{i32 786447, metadata !2, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !21} ; [ DW_TAG_pointer_type ] !21 = metadata !{i32 786468, metadata !2, metadata !"char", null, i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ] !22 = metadata !{i32 786688, metadata !23, metadata !"dval", metadata !1, i32 19, metadata !11, i32 0, null} ; [ DW_TAG_auto_variable ] -!23 = metadata !{i32 786443, metadata !7, i32 18, i32 1, metadata !1, i32 2} ; [ DW_TAG_lexical_block ] +!23 = metadata !{i32 786443, metadata !1, metadata !7, i32 18, i32 1, i32 2} ; [ DW_TAG_lexical_block ] !24 = metadata !{i32 4, i32 22, metadata !0, null} !25 = metadata !{i32 4, i32 33, metadata !0, null} !26 = metadata !{i32 4, i32 52, metadata !0, null} !27 = metadata !{i32 6, i32 3, metadata !28, null} -!28 = metadata !{i32 786443, metadata !0, i32 5, i32 1, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!28 = metadata !{i32 786443, metadata !1, metadata !0, i32 5, i32 1, i32 0} ; [ DW_TAG_lexical_block ] !29 = metadata !{i32 7, i32 3, metadata !28, null} !30 = metadata !{i32 11, i32 42, metadata !6, null} !31 = metadata !{i32 11, i32 53, metadata !6, null} !32 = metadata !{i32 11, i32 72, metadata !6, null} !33 = metadata !{i32 13, i32 3, metadata !34, null} -!34 = metadata !{i32 786443, metadata !6, i32 12, i32 1, metadata !1, i32 1} ; [ DW_TAG_lexical_block ] +!34 = metadata !{i32 786443, metadata !1, metadata !6, i32 12, i32 1, i32 1} ; [ DW_TAG_lexical_block ] !35 = metadata !{i32 14, i32 3, metadata !34, null} !36 = metadata !{i32 17, i32 15, metadata !7, null} !37 = metadata !{i32 17, i32 28, metadata !7, null} diff --git a/test/CodeGen/ARM/debug-info-sreg2.ll b/test/CodeGen/ARM/debug-info-sreg2.ll index 87514df..ba83f79 100644 --- a/test/CodeGen/ARM/debug-info-sreg2.ll +++ b/test/CodeGen/ARM/debug-info-sreg2.ll @@ -41,17 +41,17 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !2, metadata !"clang version 3.0 (trunk 130845)", i1 true, metadata !"", i32 0, null, null, metadata !16, null, null} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 786478, i32 0, metadata !2, metadata !"foo", metadata !"foo", metadata !"_Z3foov", metadata !2, i32 5, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, void ()* @_Z3foov, null, null, metadata !17, i32 5} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786449, i32 4, metadata !2, metadata !"clang version 3.0 (trunk 130845)", i1 true, metadata !"", i32 0, null, null, metadata !16, null, null, null} ; [ DW_TAG_compile_unit ] +!1 = metadata !{i32 786478, metadata !2, metadata !"foo", metadata !"foo", metadata !"_Z3foov", metadata !2, i32 5, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, void ()* @_Z3foov, null, null, metadata !17, i32 5} ; [ DW_TAG_subprogram ] !2 = metadata !{i32 786473, metadata !18} ; [ DW_TAG_file_type ] !3 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !4 = metadata !{null} !5 = metadata !{i32 786688, metadata !6, metadata !"k", metadata !2, i32 6, metadata !7, i32 0, null} ; [ DW_TAG_auto_variable ] -!6 = metadata !{i32 786443, metadata !1, i32 5, i32 12, metadata !2, i32 0} ; [ DW_TAG_lexical_block ] +!6 = metadata !{i32 786443, metadata !2, metadata !1, i32 5, i32 12, i32 0} ; [ DW_TAG_lexical_block ] !7 = metadata !{i32 786468, metadata !0, metadata !"float", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] !8 = metadata !{i32 786688, metadata !9, metadata !"y", metadata !2, i32 8, metadata !7, i32 0, null} ; [ DW_TAG_auto_variable ] -!9 = metadata !{i32 786443, metadata !10, i32 7, i32 25, metadata !2, i32 2} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 786443, metadata !6, i32 7, i32 3, metadata !2, i32 1} ; [ DW_TAG_lexical_block ] +!9 = metadata !{i32 786443, metadata !2, metadata !10, i32 7, i32 25, i32 2} ; [ DW_TAG_lexical_block ] +!10 = metadata !{i32 786443, metadata !2, metadata !6, i32 7, i32 3, i32 1} ; [ DW_TAG_lexical_block ] !11 = metadata !{i32 6, i32 18, metadata !6, null} !12 = metadata !{i32 7, i32 3, metadata !6, null} !13 = metadata !{i32 8, i32 20, metadata !9, null} diff --git a/test/CodeGen/ARM/ehabi-filters.ll b/test/CodeGen/ARM/ehabi-filters.ll index c42839d..4c92a29 100644 --- a/test/CodeGen/ARM/ehabi-filters.ll +++ b/test/CodeGen/ARM/ehabi-filters.ll @@ -19,7 +19,7 @@ define i32 @main() { entry: %exception.i = tail call i8* @__cxa_allocate_exception(i32 4) nounwind %0 = bitcast i8* %exception.i to i32* - store i32 42, i32* %0, align 4, !tbaa !0 + store i32 42, i32* %0, align 4 invoke void @__cxa_throw(i8* %exception.i, i8* bitcast (i8** @_ZTIi to i8*), i8* null) noreturn to label %unreachable.i unwind label %lpad.i @@ -71,7 +71,3 @@ declare i32 @llvm.eh.typeid.for(i8*) nounwind readnone declare i8* @__cxa_begin_catch(i8*) declare void @__cxa_end_catch() - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/ARM/ehabi-mc-compact-pr0.ll b/test/CodeGen/ARM/ehabi-mc-compact-pr0.ll new file mode 100644 index 0000000..11f3e6d --- /dev/null +++ b/test/CodeGen/ARM/ehabi-mc-compact-pr0.ll @@ -0,0 +1,49 @@ +; RUN: llc -mtriple armv7-unknown-linux-gnueabi \ +; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \ +; RUN: -disable-fp-elim -filetype=obj -o - %s \ +; RUN: | llvm-objdump -s - \ +; RUN: | FileCheck %s --check-prefix=CHECK + +; RUN: llc -mtriple armv7-unknown-linux-gnueabi \ +; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \ +; RUN: -filetype=obj -o - %s \ +; RUN: | llvm-objdump -s - \ +; RUN: | FileCheck %s --check-prefix=CHECK-FP-ELIM + +; RUN: llc -mtriple armv7-unknown-linux-gnueabi \ +; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \ +; RUN: -disable-fp-elim -filetype=obj -o - %s \ +; RUN: | llvm-objdump -r - \ +; RUN: | FileCheck %s --check-prefix=CHECK-RELOC + +; RUN: llc -mtriple armv7-unknown-linux-gnueabi \ +; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \ +; RUN: -filetype=obj -o - %s \ +; RUN: | llvm-objdump -r - \ +; RUN: | FileCheck %s --check-prefix=CHECK-RELOC + +define void @_Z4testv() { +entry: + tail call void @_Z15throw_exceptionv() + ret void +} + +declare void @_Z15throw_exceptionv() + +; CHECK-NOT: section .ARM.extab +; CHECK: section .text +; CHECK-NOT: section .ARM.extab +; CHECK: section .ARM.exidx +; CHECK-NEXT: 0000 00000000 80849b80 +; CHECK-NOT: section .ARM.extab + +; CHECK-FP-ELIM-NOT: section .ARM.extab +; CHECK-FP-ELIM: section .text +; CHECK-FP-ELIM-NOT: section .ARM.extab +; CHECK-FP-ELIM: section .ARM.exidx +; CHECK-FP-ELIM-NEXT: 0000 00000000 b0808480 +; CHECK-FP-ELIM-NOT: section .ARM.extab + +; CHECK-RELOC: RELOCATION RECORDS FOR [.ARM.exidx] +; CHECK-RELOC-NEXT: 0 R_ARM_PREL31 .text +; CHECK-RELOC-NEXT: 0 R_ARM_NONE __aeabi_unwind_cpp_pr0 diff --git a/test/CodeGen/ARM/ehabi-mc-compact-pr1.ll b/test/CodeGen/ARM/ehabi-mc-compact-pr1.ll new file mode 100644 index 0000000..79dba08 --- /dev/null +++ b/test/CodeGen/ARM/ehabi-mc-compact-pr1.ll @@ -0,0 +1,62 @@ +; RUN: llc -mtriple armv7-unknown-linux-gnueabi \ +; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \ +; RUN: -disable-fp-elim -filetype=obj -o - %s \ +; RUN: | llvm-objdump -s - \ +; RUN: | FileCheck %s --check-prefix=CHECK + +; RUN: llc -mtriple armv7-unknown-linux-gnueabi \ +; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \ +; RUN: -filetype=obj -o - %s \ +; RUN: | llvm-objdump -s - \ +; RUN: | FileCheck %s --check-prefix=CHECK-FP-ELIM + +; RUN: llc -mtriple armv7-unknown-linux-gnueabi \ +; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \ +; RUN: -disable-fp-elim -filetype=obj -o - %s \ +; RUN: | llvm-objdump -r - \ +; RUN: | FileCheck %s --check-prefix=CHECK-RELOC + +; RUN: llc -mtriple armv7-unknown-linux-gnueabi \ +; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \ +; RUN: -filetype=obj -o - %s \ +; RUN: | llvm-objdump -r - \ +; RUN: | FileCheck %s --check-prefix=CHECK-FP-ELIM-RELOC + +define i32 @_Z3addiiiiiiii(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h) { +entry: + %add = add nsw i32 %b, %a + %add1 = add nsw i32 %add, %c + %add2 = add nsw i32 %add1, %d + tail call void @_Z15throw_exceptioni(i32 %add2) + %add3 = add nsw i32 %f, %e + %add4 = add nsw i32 %add3, %g + %add5 = add nsw i32 %add4, %h + tail call void @_Z15throw_exceptioni(i32 %add5) + %add6 = add nsw i32 %add5, %add2 + ret i32 %add6 +} + +declare void @_Z15throw_exceptioni(i32) + +; CHECK-NOT: section .ARM.extab +; CHECK: section .text +; CHECK: section .ARM.extab +; CHECK-NEXT: 0000 419b0181 b0b08384 +; CHECK: section .ARM.exidx +; CHECK-NEXT: 0000 00000000 00000000 +; CHECK-NOT: section .ARM.extab + +; CHECK-FP-ELIM-NOT: section .ARM.extab +; CHECK-FP-ELIM: section .text +; CHECK-FP-ELIM-NOT: section .ARM.extab +; CHECK-FP-ELIM: section .ARM.exidx +; CHECK-FP-ELIM-NEXT: 0000 00000000 b0838480 +; CHECK-FP-ELIM-NOT: section .ARM.extab + +; CHECK-RELOC: RELOCATION RECORDS FOR [.ARM.exidx] +; CHECK-RELOC-NEXT: 0 R_ARM_PREL31 .text +; CHECK-RELOC-NEXT: 0 R_ARM_NONE __aeabi_unwind_cpp_pr1 + +; CHECK-FP-ELIM-RELOC: RELOCATION RECORDS FOR [.ARM.exidx] +; CHECK-FP-ELIM-RELOC-NEXT: 0 R_ARM_PREL31 .text +; CHECK-FP-ELIM-RELOC-NEXT: 0 R_ARM_NONE __aeabi_unwind_cpp_pr0 diff --git a/test/CodeGen/ARM/ehabi-mc-section-group.ll b/test/CodeGen/ARM/ehabi-mc-section-group.ll index 5e4b509..616aa1b 100644 --- a/test/CodeGen/ARM/ehabi-mc-section-group.ll +++ b/test/CodeGen/ARM/ehabi-mc-section-group.ll @@ -8,7 +8,7 @@ ; RUN: llc -mtriple arm-unknown-linux-gnueabi \ ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \ ; RUN: -filetype=obj -o - %s \ -; RUN: | elf-dump --dump-section-data \ +; RUN: | llvm-readobj -s -sd \ ; RUN: | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64" @@ -68,12 +68,21 @@ declare void @__cxa_end_catch() declare void @_ZSt9terminatev() -; CHECK: # Section 1 -; CHECK-NEXT: (('sh_name', 0x0000002f) # '.group' -; CHECK: ('_section_data', '01000000 0a000000 0c000000 0e000000') -; CHECK: # Section 10 -; CHECK-NEXT: (('sh_name', 0x000000e1) # '.text._Z4testIidEvT_S0_S0_S0_S0_T0_S1_S1_S1_S1_' -; CHECK: # Section 12 -; CHECK-NEXT: (('sh_name', 0x000000d7) # '.ARM.extab.text._Z4testIidEvT_S0_S0_S0_S0_T0_S1_S1_S1_S1_' -; CHECK: # Section 14 -; CHECK-NEXT: (('sh_name', 0x00000065) # '.ARM.exidx.text._Z4testIidEvT_S0_S0_S0_S0_T0_S1_S1_S1_S1_' +; CHECK: Section { +; CHECK: Index: 1 +; CHECK-NEXT: Name: .group (47) +; CHECK: SectionData ( +; CHECK-NEXT: 0000: 01000000 09000000 0B000000 0D000000 +; CHECK-NEXT: ) + +; CHECK: Section { +; CHECK: Index: 9 +; CHECK-NEXT: Name: .text._Z4testIidEvT_S0_S0_S0_S0_T0_S1_S1_S1_S1_ (214) + +; CHECK: Section { +; CHECK: Index: 11 +; CHECK-NEXT: Name: .ARM.extab.text._Z4testIidEvT_S0_S0_S0_S0_T0_S1_S1_S1_S1_ (204) + +; CHECK: Section { +; CHECK: Index: 13 +; CHECK-NEXT: Name: .ARM.exidx.text._Z4testIidEvT_S0_S0_S0_S0_T0_S1_S1_S1_S1_ (90) diff --git a/test/CodeGen/ARM/ehabi-mc-section.ll b/test/CodeGen/ARM/ehabi-mc-section.ll index fc51b24..4e6e468 100644 --- a/test/CodeGen/ARM/ehabi-mc-section.ll +++ b/test/CodeGen/ARM/ehabi-mc-section.ll @@ -1,8 +1,14 @@ -; RUN: llc -mtriple arm-unknown-linux-gnueabi \ +; RUN: llc -mtriple armv7-unknown-linux-gnueabi \ +; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \ +; RUN: -disable-fp-elim -filetype=obj -o - %s \ +; RUN: | llvm-objdump -s - \ +; RUN: | FileCheck %s --check-prefix=CHECK + +; RUN: llc -mtriple armv7-unknown-linux-gnueabi \ ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \ ; RUN: -filetype=obj -o - %s \ ; RUN: | llvm-objdump -s - \ -; RUN: | FileCheck %s +; RUN: | FileCheck %s --check-prefix=CHECK-FP-ELIM define void @_Z4testiiiiiddddd(i32 %u1, i32 %u2, i32 %u3, i32 %u4, i32 %u5, double %v1, double %v2, double %v3, double %v4, double %v5) section ".test_section" { entry: @@ -54,6 +60,12 @@ declare void @_ZSt9terminatev() ; CHECK: section .test_section ; CHECK: section .ARM.extab.test_section -; CHECK-NEXT: 0000 00000000 b0b0b000 +; CHECK-NEXT: 0000 00000000 c9409b01 b0818484 ; CHECK: section .ARM.exidx.test_section ; CHECK-NEXT: 0000 00000000 00000000 + +; CHECK-FP-ELIM: section .test_section +; CHECK-FP-ELIM: section .ARM.extab.test_section +; CHECK-FP-ELIM-NEXT: 0000 00000000 84c90501 b0b0b0a8 +; CHECK-FP-ELIM: section .ARM.exidx.test_section +; CHECK-FP-ELIM-NEXT: 0000 00000000 00000000 diff --git a/test/CodeGen/ARM/ehabi-mc-sh_link.ll b/test/CodeGen/ARM/ehabi-mc-sh_link.ll index f90e5f3..ac0a0fc 100644 --- a/test/CodeGen/ARM/ehabi-mc-sh_link.ll +++ b/test/CodeGen/ARM/ehabi-mc-sh_link.ll @@ -7,7 +7,7 @@ ; RUN: llc -mtriple arm-unknown-linux-gnueabi \ ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \ ; RUN: -filetype=obj -o - %s \ -; RUN: | elf-dump --dump-section-data \ +; RUN: | llvm-readobj -s \ ; RUN: | FileCheck %s define void @test1() nounwind { @@ -20,28 +20,39 @@ entry: ret void } -; CHECK: # Section 1 -; CHECK-NEXT: (('sh_name', 0x00000010) # '.text' - -; CHECK: (('sh_name', 0x00000005) # '.ARM.exidx' -; CHECK-NEXT: ('sh_type', 0x70000001) -; CHECK-NEXT: ('sh_flags', 0x00000082) -; CHECK-NEXT: ('sh_addr', 0x00000000) -; CHECK-NEXT: ('sh_offset', 0x0000005c) -; CHECK-NEXT: ('sh_size', 0x00000008) -; CHECK-NEXT: ('sh_link', 0x00000001) -; CHECK-NEXT: ('sh_info', 0x00000000) -; CHECK-NEXT: ('sh_addralign', 0x00000004) - -; CHECK: # Section 7 -; CHECK-NEXT: (('sh_name', 0x00000039) # '.test_section' - -; CHECK: (('sh_name', 0x0000002f) # '.ARM.exidx.test_section' -; CHECK-NEXT: ('sh_type', 0x70000001) -; CHECK-NEXT: ('sh_flags', 0x00000082) -; CHECK-NEXT: ('sh_addr', 0x00000000) -; CHECK-NEXT: ('sh_offset', 0x00000068) -; CHECK-NEXT: ('sh_size', 0x00000008) -; CHECK-NEXT: ('sh_link', 0x00000007) -; CHECK-NEXT: ('sh_info', 0x00000000) -; CHECK-NEXT: ('sh_addralign', 0x00000004) +; CHECK: Sections [ +; CHECK: Section { +; CHECK: Index: 1 +; CHECK-NEXT: Name: .text (16) + +; CHECK: Section { +; CHECK: Name: .ARM.exidx (5) +; CHECK-NEXT: Type: SHT_ARM_EXIDX +; CHECK-NEXT: Flags [ (0x82) +; CHECK-NEXT: SHF_ALLOC +; CHECK-NEXT: SHF_LINK_ORDER +; CHECK-NEXT: ] +; CHECK-NEXT: Address: 0x0 +; CHECK-NEXT: Offset: 0x5C +; CHECK-NEXT: Size: 8 +; CHECK-NEXT: Link: 1 +; CHECK-NEXT: Info: 0 +; CHECK-NEXT: AddressAlignment: 4 + +; CHECK: Section { +; CHECK: Index: 7 +; CHECK-NEXT: Name: .test_section (57) + +; CHECK: Section { +; CHECK: Name: .ARM.exidx.test_section (47) +; CHECK-NEXT: Type: SHT_ARM_EXIDX +; CHECK-NEXT: Flags [ (0x82) +; CHECK-NEXT: SHF_ALLOC +; CHECK-NEXT: SHF_LINK_ORDER +; CHECK-NEXT: ] +; CHECK-NEXT: Address: 0x0 +; CHECK-NEXT: Offset: 0x68 +; CHECK-NEXT: Size: 8 +; CHECK-NEXT: Link: 7 +; CHECK-NEXT: Info: 0 +; CHECK-NEXT: AddressAlignment: 4 diff --git a/test/CodeGen/ARM/ehabi-mc.ll b/test/CodeGen/ARM/ehabi-mc.ll index 0dc2ef7..83b8425 100644 --- a/test/CodeGen/ARM/ehabi-mc.ll +++ b/test/CodeGen/ARM/ehabi-mc.ll @@ -1,8 +1,14 @@ -; RUN: llc -mtriple arm-unknown-linux-gnueabi \ +; RUN: llc -mtriple armv7-unknown-linux-gnueabi \ +; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \ +; RUN: -disable-fp-elim -filetype=obj -o - %s \ +; RUN: | llvm-objdump -s - \ +; RUN: | FileCheck %s --check-prefix=CHECK + +; RUN: llc -mtriple armv7-unknown-linux-gnueabi \ ; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \ ; RUN: -filetype=obj -o - %s \ ; RUN: | llvm-objdump -s - \ -; RUN: | FileCheck %s +; RUN: | FileCheck %s --check-prefix=CHECK-FP-ELIM define void @_Z4testiiiiiddddd(i32 %u1, i32 %u2, i32 %u3, i32 %u4, i32 %u5, double %v1, double %v2, double %v3, double %v4, double %v5) { entry: @@ -54,6 +60,12 @@ declare void @_ZSt9terminatev() ; CHECK: section .text ; CHECK: section .ARM.extab -; CHECK-NEXT: 0000 00000000 b0b0b000 +; CHECK-NEXT: 0000 00000000 c9409b01 b0818484 ; CHECK: section .ARM.exidx ; CHECK-NEXT: 0000 00000000 00000000 + +; CHECK-FP-ELIM: section .text +; CHECK-FP-ELIM: section .ARM.extab +; CHECK-FP-ELIM-NEXT: 0000 00000000 84c90501 b0b0b0a8 +; CHECK-FP-ELIM: section .ARM.exidx +; CHECK-FP-ELIM-NEXT: 0000 00000000 00000000 diff --git a/test/CodeGen/ARM/fadds.ll b/test/CodeGen/ARM/fadds.ll index 48ef5ed..c7e2f5d 100644 --- a/test/CodeGen/ARM/fadds.ll +++ b/test/CodeGen/ARM/fadds.ll @@ -1,6 +1,8 @@ ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NFP0 -; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8 +; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8 +; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math | FileCheck %s -check-prefix=CORTEXA8U +; RUN: llc < %s -mtriple=arm-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8U ; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=CORTEXA9 define float @test(float %a, float %b) { @@ -18,6 +20,8 @@ entry: ; NFP0: vadd.f32 s ; CORTEXA8: test: -; CORTEXA8: vadd.f32 d +; CORTEXA8: vadd.f32 s +; CORTEXA8U: test: +; CORTEXA8U: vadd.f32 d ; CORTEXA9: test: -; CORTEXA9: vadd.f32 s{{.}}, s{{.}}, s{{.}} +; CORTEXA9: vadd.f32 s diff --git a/test/CodeGen/ARM/fmuls.ll b/test/CodeGen/ARM/fmuls.ll index 1566a92..f5245c9 100644 --- a/test/CodeGen/ARM/fmuls.ll +++ b/test/CodeGen/ARM/fmuls.ll @@ -1,6 +1,8 @@ ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NFP0 -; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8 +; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8 +; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math | FileCheck %s -check-prefix=CORTEXA8U +; RUN: llc < %s -mtriple=arm-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8U ; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=CORTEXA9 define float @test(float %a, float %b) { @@ -18,9 +20,11 @@ entry: ; NFP0: vmul.f32 s ; CORTEXA8: test: -; CORTEXA8: vmul.f32 d +; CORTEXA8: vmul.f32 s +; CORTEXA8U: test: +; CORTEXA8U: vmul.f32 d ; CORTEXA9: test: -; CORTEXA9: vmul.f32 s{{.}}, s{{.}}, s{{.}} +; CORTEXA9: vmul.f32 s ; VFP2: test2 define float @test2(float %a) nounwind { diff --git a/test/CodeGen/ARM/fnegs.ll b/test/CodeGen/ARM/fnegs.ll index 418b598..d84690b 100644 --- a/test/CodeGen/ARM/fnegs.ll +++ b/test/CodeGen/ARM/fnegs.ll @@ -1,6 +1,8 @@ ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NFP0 -; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8 +; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8 +; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math | FileCheck %s -check-prefix=CORTEXA8U +; RUN: llc < %s -mtriple=arm-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8U ; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=CORTEXA9 define float @test1(float* %a) { @@ -22,7 +24,10 @@ entry: ; NFP0: vneg.f32 s{{.*}}, s{{.*}} ; CORTEXA8: test1: -; CORTEXA8: vneg.f32 d{{.*}}, d{{.*}} +; CORTEXA8: vneg.f32 s{{.*}}, s{{.*}} + +; CORTEXA8U: test1: +; CORTEXA8U: vneg.f32 d{{.*}}, d{{.*}} ; CORTEXA9: test1: ; CORTEXA9: vneg.f32 s{{.*}}, s{{.*}} @@ -46,7 +51,10 @@ entry: ; NFP0: vneg.f32 s{{.*}}, s{{.*}} ; CORTEXA8: test2: -; CORTEXA8: vneg.f32 d{{.*}}, d{{.*}} +; CORTEXA8: vneg.f32 s{{.*}}, s{{.*}} + +; CORTEXA8U: test2: +; CORTEXA8U: vneg.f32 d{{.*}}, d{{.*}} ; CORTEXA9: test2: ; CORTEXA9: vneg.f32 s{{.*}}, s{{.*}} diff --git a/test/CodeGen/ARM/fnmscs.ll b/test/CodeGen/ARM/fnmscs.ll index 9ce9b7a..c308061 100644 --- a/test/CodeGen/ARM/fnmscs.ll +++ b/test/CodeGen/ARM/fnmscs.ll @@ -1,7 +1,9 @@ ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NEON -; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=A8 -; RUN: llc < %s -march=arm -mcpu=cortex-a8 -regalloc=basic | FileCheck %s -check-prefix=A8 +; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 | FileCheck %s -check-prefix=A8 +; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 -regalloc=basic | FileCheck %s -check-prefix=A8 +; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math | FileCheck %s -check-prefix=A8U +; RUN: llc < %s -mtriple=arm-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=A8U define float @t1(float %acc, float %a, float %b) nounwind { entry: @@ -11,9 +13,13 @@ entry: ; NEON: t1: ; NEON: vnmla.f32 +; A8U: t1: +; A8U: vnmul.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}} +; A8U: vsub.f32 d{{[0-9]}}, d{{[0-9]}}, d{{[0-9]}} + ; A8: t1: ; A8: vnmul.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}} -; A8: vsub.f32 d{{[0-9]}}, d{{[0-9]}}, d{{[0-9]}} +; A8: vsub.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}} %0 = fmul float %a, %b %1 = fsub float -0.0, %0 %2 = fsub float %1, %acc @@ -28,9 +34,13 @@ entry: ; NEON: t2: ; NEON: vnmla.f32 +; A8U: t2: +; A8U: vnmul.f32 s{{[01234]}}, s{{[01234]}}, s{{[01234]}} +; A8U: vsub.f32 d{{[0-9]}}, d{{[0-9]}}, d{{[0-9]}} + ; A8: t2: ; A8: vnmul.f32 s{{[01234]}}, s{{[01234]}}, s{{[01234]}} -; A8: vsub.f32 d{{[0-9]}}, d{{[0-9]}}, d{{[0-9]}} +; A8: vsub.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}} %0 = fmul float %a, %b %1 = fmul float -1.0, %0 %2 = fsub float %1, %acc @@ -45,6 +55,10 @@ entry: ; NEON: t3: ; NEON: vnmla.f64 +; A8U: t3: +; A8U: vnmul.f64 d +; A8U: vsub.f64 d + ; A8: t3: ; A8: vnmul.f64 d ; A8: vsub.f64 d @@ -62,6 +76,10 @@ entry: ; NEON: t4: ; NEON: vnmla.f64 +; A8U: t4: +; A8U: vnmul.f64 d +; A8U: vsub.f64 d + ; A8: t4: ; A8: vnmul.f64 d ; A8: vsub.f64 d diff --git a/test/CodeGen/ARM/fp_convert.ll b/test/CodeGen/ARM/fp_convert.ll index 44298b9..3c47eb5 100644 --- a/test/CodeGen/ARM/fp_convert.ll +++ b/test/CodeGen/ARM/fp_convert.ll @@ -1,6 +1,8 @@ ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2 ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=VFP2 -; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=NEON +; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 | FileCheck %s -check-prefix=VFP2 +; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math | FileCheck %s -check-prefix=NEON +; RUN: llc < %s -mtriple=arm-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=NEON ; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=VFP2 define i32 @test1(float %a, float %b) { diff --git a/test/CodeGen/ARM/fsubs.ll b/test/CodeGen/ARM/fsubs.ll index f039e74..617b018 100644 --- a/test/CodeGen/ARM/fsubs.ll +++ b/test/CodeGen/ARM/fsubs.ll @@ -1,5 +1,7 @@ ; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2 -; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=NFP1 +; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 | FileCheck %s -check-prefix=NFP1 +; RUN: llc < %s -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math | FileCheck %s -check-prefix=NFP1U +; RUN: llc < %s -mtriple=arm-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=NFP1U ; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NFP0 define float @test(float %a, float %b) { @@ -9,5 +11,6 @@ entry: } ; VFP2: vsub.f32 s -; NFP1: vsub.f32 d +; NFP1U: vsub.f32 d +; NFP1: vsub.f32 s ; NFP0: vsub.f32 s diff --git a/test/CodeGen/ARM/gpr-paired-spill-thumbinst.ll b/test/CodeGen/ARM/gpr-paired-spill-thumbinst.ll new file mode 100644 index 0000000..0002711 --- /dev/null +++ b/test/CodeGen/ARM/gpr-paired-spill-thumbinst.ll @@ -0,0 +1,30 @@ +; REQUIRES: asserts +; RUN: llc -mtriple=thumbv7-none-linux-gnueabi -debug -o /dev/null < %s 2>&1 | FileCheck %s + +; This test makes sure spills of 64-bit pairs in Thumb mode actually +; generate thumb instructions. Previously we were inserting an ARM +; STMIA which happened to have the same encoding. + +define void @foo(i64* %addr) { + %val1 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr) + %val2 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr) + %val3 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr) + %val4 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr) + %val5 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr) + %val6 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr) + %val7 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr) + + ; Make sure we are actually creating the Thumb versions of the spill + ; instructions. +; CHECK: t2STRDi8 +; CHECK: t2LDRDi8 + + store volatile i64 %val1, i64* %addr + store volatile i64 %val2, i64* %addr + store volatile i64 %val3, i64* %addr + store volatile i64 %val4, i64* %addr + store volatile i64 %val5, i64* %addr + store volatile i64 %val6, i64* %addr + store volatile i64 %val7, i64* %addr + ret void +} diff --git a/test/CodeGen/ARM/gpr-paired-spill.ll b/test/CodeGen/ARM/gpr-paired-spill.ll new file mode 100644 index 0000000..ef3e5a5 --- /dev/null +++ b/test/CodeGen/ARM/gpr-paired-spill.ll @@ -0,0 +1,44 @@ +; RUN: llc -mtriple=armv7-none-linux-gnueabi -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK-WITH-LDRD +; RUN: llc -mtriple=armv4-none-linux-gnueabi -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK-WITHOUT-LDRD +; RUN: llc -mtriple=thumbv7-none-linux-gnueabi -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK-WITH-LDRD + +define void @foo(i64* %addr) { + %val1 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr) + %val2 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr) + %val3 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr) + %val4 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr) + %val5 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr) + %val6 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr) + %val7 = tail call i64 asm sideeffect "ldrexd $0, ${0:H}, [r0]", "=&r,r"(i64* %addr) + + ; Key point is that enough 64-bit paired GPR values are live that + ; one of them has to be spilled. This used to cause an abort because + ; an LDMIA was created with both a FrameIndex and an offset, which + ; is not allowed. + +; CHECK-WITH-LDRD: strd {{r[0-9]+}}, {{r[0-9]+}}, [sp, #8] +; CHECK-WITH-LDRD: strd {{r[0-9]+}}, {{r[0-9]+}}, [sp] + +; CHECK-WITH-LDRD: ldrd {{r[0-9]+}}, {{r[0-9]+}}, [sp, #8] +; CHECK-WITH-LDRD: ldrd {{r[0-9]+}}, {{r[0-9]+}}, [sp] + + ; We also want to ensure the register scavenger is working (i.e. an + ; offset from sp can be generated), so we need two spills. +; CHECK-WITHOUT-LDRD: add [[ADDRREG:[a-z0-9]+]], sp, #{{[0-9]+}} +; CHECK-WITHOUT-LDRD: stm [[ADDRREG]], {r{{[0-9]+}}, r{{[0-9]+}}} +; CHECK-WITHOUT-LDRD: stm sp, {r{{[0-9]+}}, r{{[0-9]+}}} + + ; In principle LLVM may have to recalculate the offset. At the moment + ; it reuses the original though. +; CHECK-WITHOUT-LDRD: ldm [[ADDRREG]], {r{{[0-9]+}}, r{{[0-9]+}}} +; CHECK-WITHOUT-LDRD: ldm sp, {r{{[0-9]+}}, r{{[0-9]+}}} + + store volatile i64 %val1, i64* %addr + store volatile i64 %val2, i64* %addr + store volatile i64 %val3, i64* %addr + store volatile i64 %val4, i64* %addr + store volatile i64 %val5, i64* %addr + store volatile i64 %val6, i64* %addr + store volatile i64 %val7, i64* %addr + ret void +} diff --git a/test/CodeGen/ARM/lsr-icmp-imm.ll b/test/CodeGen/ARM/lsr-icmp-imm.ll index 5283f57..248c4bd 100644 --- a/test/CodeGen/ARM/lsr-icmp-imm.ll +++ b/test/CodeGen/ARM/lsr-icmp-imm.ll @@ -1,5 +1,5 @@ -; RUN: llc -mtriple=thumbv7-apple-ios -disable-code-place < %s | FileCheck %s -; RUN: llc -mtriple=armv7-apple-ios -disable-code-place < %s | FileCheck %s +; RUN: llc -mtriple=thumbv7-apple-ios -disable-block-placement < %s | FileCheck %s +; RUN: llc -mtriple=armv7-apple-ios -disable-block-placement < %s | FileCheck %s ; LSR should compare against the post-incremented induction variable. ; In this case, the immediate value is -2 which requires a cmn instruction. diff --git a/test/CodeGen/ARM/lsr-unfolded-offset.ll b/test/CodeGen/ARM/lsr-unfolded-offset.ll index 5b4cf9d..9b0f3e5 100644 --- a/test/CodeGen/ARM/lsr-unfolded-offset.ll +++ b/test/CodeGen/ARM/lsr-unfolded-offset.ll @@ -26,8 +26,8 @@ outer.loop: ; preds = %for.inc69, %entry %0 = phi i32 [ %inc71, %for.inc69 ], [ 0, %entry ] %offset = getelementptr %struct.partition_entry* %part, i32 %0, i32 2 %len = getelementptr %struct.partition_entry* %part, i32 %0, i32 3 - %tmp5 = load i64* %offset, align 4, !tbaa !0 - %tmp15 = load i64* %len, align 4, !tbaa !0 + %tmp5 = load i64* %offset, align 4 + %tmp15 = load i64* %len, align 4 %add = add nsw i64 %tmp15, %tmp5 br label %inner.loop @@ -40,8 +40,8 @@ inner.loop: ; preds = %for.inc, %outer.loo if.end: ; preds = %inner.loop %len39 = getelementptr %struct.partition_entry* %part, i32 %1, i32 3 %offset28 = getelementptr %struct.partition_entry* %part, i32 %1, i32 2 - %tmp29 = load i64* %offset28, align 4, !tbaa !0 - %tmp40 = load i64* %len39, align 4, !tbaa !0 + %tmp29 = load i64* %offset28, align 4 + %tmp40 = load i64* %len39, align 4 %add41 = add nsw i64 %tmp40, %tmp29 %cmp44 = icmp sge i64 %tmp29, %tmp5 %cmp47 = icmp slt i64 %tmp29, %add @@ -74,7 +74,3 @@ for.end72: ; preds = %for.inc69, %entry %overlap.0.lcssa = phi i32 [ 0, %entry ], [ %overlap.4, %for.inc69 ] ret i32 %overlap.0.lcssa } - -!0 = metadata !{metadata !"long long", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/ARM/misched-copy-arm.ll b/test/CodeGen/ARM/misched-copy-arm.ll new file mode 100644 index 0000000..4b15326 --- /dev/null +++ b/test/CodeGen/ARM/misched-copy-arm.ll @@ -0,0 +1,30 @@ +; REQUIRES: asserts +; RUN: llc < %s -march=thumb -mcpu=swift -pre-RA-sched=source -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s +; +; Loop counter copies should be eliminated. +; There is also a MUL here, but we don't care where it is scheduled. +; CHECK: postinc +; CHECK: *** Final schedule for BB#2 *** +; CHECK: t2LDRs +; CHECK: t2ADDrr +; CHECK: t2CMPrr +; CHECK: COPY +define i32 @postinc(i32 %a, i32* nocapture %d, i32 %s) nounwind { +entry: + %cmp4 = icmp eq i32 %a, 0 + br i1 %cmp4, label %for.end, label %for.body + +for.body: ; preds = %entry, %for.body + %indvars.iv = phi i32 [ %indvars.iv.next, %for.body ], [ 0, %entry ] + %s.05 = phi i32 [ %mul, %for.body ], [ 0, %entry ] + %indvars.iv.next = add i32 %indvars.iv, %s + %arrayidx = getelementptr inbounds i32* %d, i32 %indvars.iv + %0 = load i32* %arrayidx, align 4 + %mul = mul nsw i32 %0, %s.05 + %exitcond = icmp eq i32 %indvars.iv.next, %a + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + %s.0.lcssa = phi i32 [ 0, %entry ], [ %mul, %for.body ] + ret i32 %s.0.lcssa +} diff --git a/test/CodeGen/ARM/neon-spfp.ll b/test/CodeGen/ARM/neon-spfp.ll new file mode 100644 index 0000000..c00f0d1 --- /dev/null +++ b/test/CodeGen/ARM/neon-spfp.ll @@ -0,0 +1,76 @@ +; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a5 | FileCheck %s -check-prefix=LINUXA5 +; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a8 | FileCheck %s -check-prefix=LINUXA8 +; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a9 | FileCheck %s -check-prefix=LINUXA9 +; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a15 | FileCheck %s -check-prefix=LINUXA15 +; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=swift | FileCheck %s -check-prefix=LINUXSWIFT + +; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a5 --enable-unsafe-fp-math | FileCheck %s -check-prefix=UNSAFEA5 +; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a8 --enable-unsafe-fp-math | FileCheck %s -check-prefix=UNSAFEA8 +; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a9 --enable-unsafe-fp-math | FileCheck %s -check-prefix=UNSAFEA9 +; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a15 --enable-unsafe-fp-math | FileCheck %s -check-prefix=UNSAFEA15 +; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=swift --enable-unsafe-fp-math | FileCheck %s -check-prefix=UNSAFESWIFT + +; RUN: llc < %s -mtriple armv7a-none-darwin -mcpu=cortex-a5 | FileCheck %s -check-prefix=DARWINA5 +; RUN: llc < %s -mtriple armv7a-none-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=DARWINA8 +; RUN: llc < %s -mtriple armv7a-none-darwin -mcpu=cortex-a9 | FileCheck %s -check-prefix=DARWINA9 +; RUN: llc < %s -mtriple armv7a-none-darwin -mcpu=cortex-a15 | FileCheck %s -check-prefix=DARWINA15 +; RUN: llc < %s -mtriple armv7a-none-darwin -mcpu=swift | FileCheck %s -check-prefix=DARWINSWIFT + +; This test makes sure we're not lowering VMUL.f32 D* (aka. NEON) for single-prec. FP ops, since +; NEON is not fully IEEE 754 compliant, unless unsafe-math is selected. + +@.str = private unnamed_addr constant [12 x i8] c"S317\09%.5g \0A\00", align 1 + +; CHECK-LINUXA5: main: +; CHECK-LINUXA8: main: +; CHECK-LINUXA9: main: +; CHECK-LINUXA15: main: +; CHECK-LINUXSWIFT: main: +; CHECK-UNSAFEA5: main: +; CHECK-UNSAFEA8: main: +; CHECK-UNSAFEA9: main: +; CHECK-UNSAFEA15: main: +; CHECK-UNSAFESWIFT: main: +; CHECK-DARWINA5: main: +; CHECK-DARWINA8: main: +; CHECK-DARWINA9: main: +; CHECK-DARWINA15: main: +; CHECK-DARWINSWIFT: main: +define i32 @main() { +entry: + br label %for.body + +for.body: ; preds = %for.body, %entry + %i.04 = phi i32 [ 0, %entry ], [ %inc, %for.body ] + %q.03 = phi float [ 1.000000e+00, %entry ], [ %mul, %for.body ] + %mul = fmul float %q.03, 0x3FEFAE1480000000 +; CHECK-LINUXA5: vmul.f32 s{{[0-9]*}} +; CHECK-LINUXA8: vmul.f32 s{{[0-9]*}} +; CHECK-LINUXA9: vmul.f32 s{{[0-9]*}} +; CHECK-LINUXA15: vmul.f32 s{{[0-9]*}} +; Swift is *always* unsafe +; CHECK-LINUXSWIFT: vmul.f32 d{{[0-9]*}} + +; CHECK-UNSAFEA5: vmul.f32 d{{[0-9]*}} +; CHECK-UNSAFEA8: vmul.f32 d{{[0-9]*}} +; A9 and A15 don't need this +; CHECK-UNSAFEA9: vmul.f32 s{{[0-9]*}} +; CHECK-UNSAFEA15: vmul.f32 s{{[0-9]*}} +; CHECK-UNSAFESWIFT: vmul.f32 d{{[0-9]*}} + +; CHECK-DARWINA5: vmul.f32 d{{[0-9]*}} +; CHECK-DARWINA8: vmul.f32 d{{[0-9]*}} +; CHECK-DARWINA9: vmul.f32 s{{[0-9]*}} +; CHECK-DARWINA15: vmul.f32 s{{[0-9]*}} +; CHECK-DARWINSWIFT: vmul.f32 d{{[0-9]*}} + %conv = fpext float %mul to double + %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([12 x i8]* @.str, i32 0, i32 0), double %conv) #1 + %inc = add nsw i32 %i.04, 1 + %exitcond = icmp eq i32 %inc, 16000 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body + ret i32 0 +} + +declare i32 @printf(i8* nocapture, ...) diff --git a/test/CodeGen/ARM/neon_minmax.ll b/test/CodeGen/ARM/neon_minmax.ll index d301c6a..0a7c8b2 100644 --- a/test/CodeGen/ARM/neon_minmax.ll +++ b/test/CodeGen/ARM/neon_minmax.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s +; RUN: llc < %s -march=arm -mcpu=swift | FileCheck %s define float @fmin_ole(float %x) nounwind { ;CHECK: fmin_ole: diff --git a/test/CodeGen/ARM/neon_vabs.ll b/test/CodeGen/ARM/neon_vabs.ll new file mode 100644 index 0000000..bf2770b --- /dev/null +++ b/test/CodeGen/ARM/neon_vabs.ll @@ -0,0 +1,91 @@ +; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s + +define <4 x i32> @test1(<4 x i32> %a) nounwind { +; CHECK: test1: +; CHECK: vabs.s32 q + %tmp1neg = sub <4 x i32> zeroinitializer, %a + %b = icmp sgt <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1> + %abs = select <4 x i1> %b, <4 x i32> %a, <4 x i32> %tmp1neg + ret <4 x i32> %abs +} + +define <4 x i32> @test2(<4 x i32> %a) nounwind { +; CHECK: test2: +; CHECK: vabs.s32 q + %tmp1neg = sub <4 x i32> zeroinitializer, %a + %b = icmp sge <4 x i32> %a, zeroinitializer + %abs = select <4 x i1> %b, <4 x i32> %a, <4 x i32> %tmp1neg + ret <4 x i32> %abs +} + +define <8 x i16> @test3(<8 x i16> %a) nounwind { +; CHECK: test3: +; CHECK: vabs.s16 q + %tmp1neg = sub <8 x i16> zeroinitializer, %a + %b = icmp sgt <8 x i16> %a, zeroinitializer + %abs = select <8 x i1> %b, <8 x i16> %a, <8 x i16> %tmp1neg + ret <8 x i16> %abs +} + +define <16 x i8> @test4(<16 x i8> %a) nounwind { +; CHECK: test4: +; CHECK: vabs.s8 q + %tmp1neg = sub <16 x i8> zeroinitializer, %a + %b = icmp slt <16 x i8> %a, zeroinitializer + %abs = select <16 x i1> %b, <16 x i8> %tmp1neg, <16 x i8> %a + ret <16 x i8> %abs +} + +define <4 x i32> @test5(<4 x i32> %a) nounwind { +; CHECK: test5: +; CHECK: vabs.s32 q + %tmp1neg = sub <4 x i32> zeroinitializer, %a + %b = icmp sle <4 x i32> %a, zeroinitializer + %abs = select <4 x i1> %b, <4 x i32> %tmp1neg, <4 x i32> %a + ret <4 x i32> %abs +} + +define <2 x i32> @test6(<2 x i32> %a) nounwind { +; CHECK: test6: +; CHECK: vabs.s32 d + %tmp1neg = sub <2 x i32> zeroinitializer, %a + %b = icmp sgt <2 x i32> %a, <i32 -1, i32 -1> + %abs = select <2 x i1> %b, <2 x i32> %a, <2 x i32> %tmp1neg + ret <2 x i32> %abs +} + +define <2 x i32> @test7(<2 x i32> %a) nounwind { +; CHECK: test7: +; CHECK: vabs.s32 d + %tmp1neg = sub <2 x i32> zeroinitializer, %a + %b = icmp sge <2 x i32> %a, zeroinitializer + %abs = select <2 x i1> %b, <2 x i32> %a, <2 x i32> %tmp1neg + ret <2 x i32> %abs +} + +define <4 x i16> @test8(<4 x i16> %a) nounwind { +; CHECK: test8: +; CHECK: vabs.s16 d + %tmp1neg = sub <4 x i16> zeroinitializer, %a + %b = icmp sgt <4 x i16> %a, zeroinitializer + %abs = select <4 x i1> %b, <4 x i16> %a, <4 x i16> %tmp1neg + ret <4 x i16> %abs +} + +define <8 x i8> @test9(<8 x i8> %a) nounwind { +; CHECK: test9: +; CHECK: vabs.s8 d + %tmp1neg = sub <8 x i8> zeroinitializer, %a + %b = icmp slt <8 x i8> %a, zeroinitializer + %abs = select <8 x i1> %b, <8 x i8> %tmp1neg, <8 x i8> %a + ret <8 x i8> %abs +} + +define <2 x i32> @test10(<2 x i32> %a) nounwind { +; CHECK: test10: +; CHECK: vabs.s32 d + %tmp1neg = sub <2 x i32> zeroinitializer, %a + %b = icmp sle <2 x i32> %a, zeroinitializer + %abs = select <2 x i1> %b, <2 x i32> %tmp1neg, <2 x i32> %a + ret <2 x i32> %abs +} diff --git a/test/CodeGen/ARM/nop_concat_vectors.ll b/test/CodeGen/ARM/nop_concat_vectors.ll new file mode 100644 index 0000000..c810900 --- /dev/null +++ b/test/CodeGen/ARM/nop_concat_vectors.ll @@ -0,0 +1,13 @@ +; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s + +;CHECK: _foo +;CHECK-NOT: vld1.32 +;CHECK-NOT: vst1.32 +;CHECK: bx +define void @foo(<16 x i8>* %J) { + %A = load <16 x i8>* %J + %T1 = shufflevector <16 x i8> %A, <16 x i8> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> + %T2 = shufflevector <8 x i8> %T1, <8 x i8> undef, <16 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> + store <16 x i8> %T2, <16 x i8>* %J + ret void +} diff --git a/test/CodeGen/ARM/private.ll b/test/CodeGen/ARM/private.ll index f93ffe7..94578d8 100644 --- a/test/CodeGen/ARM/private.ll +++ b/test/CodeGen/ARM/private.ll @@ -1,10 +1,11 @@ ; Test to make sure that the 'private' is used correctly. ; -; RUN: llc < %s -mtriple=arm-linux-gnueabi > %t -; RUN: grep .Lfoo: %t -; RUN: egrep bl.*\.Lfoo %t -; RUN: grep .Lbaz: %t -; RUN: grep long.*\.Lbaz %t +; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s +; CHECK: .Lfoo: +; CHECK: bar: +; CHECK: bl .Lfoo +; CHECK: .long .Lbaz +; CHECK: .Lbaz: define private void @foo() { ret void diff --git a/test/CodeGen/ARM/returned-ext.ll b/test/CodeGen/ARM/returned-ext.ll new file mode 100644 index 0000000..670b12f --- /dev/null +++ b/test/CodeGen/ARM/returned-ext.ll @@ -0,0 +1,178 @@ +; RUN: llc < %s -mtriple=armv6-linux-gnueabi -arm-tail-calls | FileCheck %s -check-prefix=CHECKELF +; RUN: llc < %s -mtriple=thumbv7-apple-ios -arm-tail-calls | FileCheck %s -check-prefix=CHECKT2D + +declare i16 @identity16(i16 returned %x) +declare i32 @identity32(i32 returned %x) +declare zeroext i16 @retzext16(i16 returned %x) +declare i16 @paramzext16(i16 zeroext returned %x) +declare zeroext i16 @bothzext16(i16 zeroext returned %x) + +; The zeroext param attribute below is meant to have no effect +define i16 @test_identity(i16 zeroext %x) { +entry: +; CHECKELF: test_identity: +; CHECKELF: mov [[SAVEX:r[0-9]+]], r0 +; CHECKELF: bl identity16 +; CHECKELF: uxth r0, r0 +; CHECKELF: bl identity32 +; CHECKELF: mov r0, [[SAVEX]] +; CHECKT2D: test_identity: +; CHECKT2D: mov [[SAVEX:r[0-9]+]], r0 +; CHECKT2D: blx _identity16 +; CHECKT2D: uxth r0, r0 +; CHECKT2D: blx _identity32 +; CHECKT2D: mov r0, [[SAVEX]] + %call = tail call i16 @identity16(i16 %x) + %b = zext i16 %call to i32 + %call2 = tail call i32 @identity32(i32 %b) + ret i16 %x +} + +; FIXME: This ought not to require register saving but currently does because +; x is not considered equal to %call (see SelectionDAGBuilder.cpp) +define i16 @test_matched_ret(i16 %x) { +entry: +; CHECKELF: test_matched_ret: + +; This shouldn't be required +; CHECKELF: mov [[SAVEX:r[0-9]+]], r0 + +; CHECKELF: bl retzext16 +; CHECKELF-NOT: uxth r0, {{r[0-9]+}} +; CHECKELF: bl identity32 + +; This shouldn't be required +; CHECKELF: mov r0, [[SAVEX]] + +; CHECKT2D: test_matched_ret: + +; This shouldn't be required +; CHECKT2D: mov [[SAVEX:r[0-9]+]], r0 + +; CHECKT2D: blx _retzext16 +; CHECKT2D-NOT: uxth r0, {{r[0-9]+}} +; CHECKT2D: blx _identity32 + +; This shouldn't be required +; CHECKT2D: mov r0, [[SAVEX]] + + %call = tail call i16 @retzext16(i16 %x) + %b = zext i16 %call to i32 + %call2 = tail call i32 @identity32(i32 %b) + ret i16 %x +} + +define i16 @test_mismatched_ret(i16 %x) { +entry: +; CHECKELF: test_mismatched_ret: +; CHECKELF: mov [[SAVEX:r[0-9]+]], r0 +; CHECKELF: bl retzext16 +; CHECKELF: sxth r0, {{r[0-9]+}} +; CHECKELF: bl identity32 +; CHECKELF: mov r0, [[SAVEX]] +; CHECKT2D: test_mismatched_ret: +; CHECKT2D: mov [[SAVEX:r[0-9]+]], r0 +; CHECKT2D: blx _retzext16 +; CHECKT2D: sxth r0, {{r[0-9]+}} +; CHECKT2D: blx _identity32 +; CHECKT2D: mov r0, [[SAVEX]] + %call = tail call i16 @retzext16(i16 %x) + %b = sext i16 %call to i32 + %call2 = tail call i32 @identity32(i32 %b) + ret i16 %x +} + +define i16 @test_matched_paramext(i16 %x) { +entry: +; CHECKELF: test_matched_paramext: +; CHECKELF: uxth r0, r0 +; CHECKELF: bl paramzext16 +; CHECKELF: uxth r0, r0 +; CHECKELF: bl identity32 +; CHECKELF: b paramzext16 +; CHECKT2D: test_matched_paramext: +; CHECKT2D: uxth r0, r0 +; CHECKT2D: blx _paramzext16 +; CHECKT2D: uxth r0, r0 +; CHECKT2D: blx _identity32 +; CHECKT2D: b.w _paramzext16 + %call = tail call i16 @paramzext16(i16 %x) + %b = zext i16 %call to i32 + %call2 = tail call i32 @identity32(i32 %b) + %call3 = tail call i16 @paramzext16(i16 %call) + ret i16 %call3 +} + +; FIXME: This theoretically ought to optimize to exact same output as the +; version above, but doesn't currently (see SelectionDAGBuilder.cpp) +define i16 @test_matched_paramext2(i16 %x) { +entry: + +; Since there doesn't seem to be an unambiguous optimal selection and +; scheduling of uxth and mov instructions below in lieu of the 'returned' +; optimization, don't bother checking: just verify that the calls are made +; in the correct order as a basic sanity check + +; CHECKELF: test_matched_paramext2: +; CHECKELF: bl paramzext16 +; CHECKELF: bl identity32 +; CHECKELF: b paramzext16 +; CHECKT2D: test_matched_paramext2: +; CHECKT2D: blx _paramzext16 +; CHECKT2D: blx _identity32 +; CHECKT2D: b.w _paramzext16 + %call = tail call i16 @paramzext16(i16 %x) + +; Should make no difference if %x is used below rather than %call, but it does + %b = zext i16 %x to i32 + + %call2 = tail call i32 @identity32(i32 %b) + %call3 = tail call i16 @paramzext16(i16 %call) + ret i16 %call3 +} + +define i16 @test_matched_bothext(i16 %x) { +entry: +; CHECKELF: test_matched_bothext: +; CHECKELF: uxth r0, r0 +; CHECKELF: bl bothzext16 +; CHECKELF-NOT: uxth r0, r0 + +; FIXME: Tail call should be OK here +; CHECKELF: bl identity32 + +; CHECKT2D: test_matched_bothext: +; CHECKT2D: uxth r0, r0 +; CHECKT2D: blx _bothzext16 +; CHECKT2D-NOT: uxth r0, r0 + +; FIXME: Tail call should be OK here +; CHECKT2D: blx _identity32 + + %call = tail call i16 @bothzext16(i16 %x) + %b = zext i16 %x to i32 + %call2 = tail call i32 @identity32(i32 %b) + ret i16 %call +} + +define i16 @test_mismatched_bothext(i16 %x) { +entry: +; CHECKELF: test_mismatched_bothext: +; CHECKELF: mov [[SAVEX:r[0-9]+]], r0 +; CHECKELF: uxth r0, {{r[0-9]+}} +; CHECKELF: bl bothzext16 +; CHECKELF: sxth r0, [[SAVEX]] +; CHECKELF: bl identity32 +; CHECKELF: mov r0, [[SAVEX]] +; CHECKT2D: test_mismatched_bothext: +; CHECKT2D: mov [[SAVEX:r[0-9]+]], r0 +; CHECKT2D: uxth r0, {{r[0-9]+}} +; CHECKT2D: blx _bothzext16 +; CHECKT2D: sxth r0, [[SAVEX]] +; CHECKT2D: blx _identity32 +; CHECKT2D: mov r0, [[SAVEX]] + %call = tail call i16 @bothzext16(i16 %x) + %b = sext i16 %x to i32 + %call2 = tail call i32 @identity32(i32 %b) + ret i16 %x +} diff --git a/test/CodeGen/ARM/tail-dup.ll b/test/CodeGen/ARM/tail-dup.ll index e015bf0..eb4d0ba 100644 --- a/test/CodeGen/ARM/tail-dup.ll +++ b/test/CodeGen/ARM/tail-dup.ll @@ -11,19 +11,19 @@ define i32 @fn(i32* nocapture %opcodes) nounwind readonly ssp { entry: - %0 = load i32* %opcodes, align 4, !tbaa !0 + %0 = load i32* %opcodes, align 4 %arrayidx = getelementptr inbounds [3 x i8*]* @fn.codetable, i32 0, i32 %0 br label %indirectgoto INCREMENT: ; preds = %indirectgoto %inc = add nsw i32 %result.0, 1 - %1 = load i32* %opcodes.addr.0, align 4, !tbaa !0 + %1 = load i32* %opcodes.addr.0, align 4 %arrayidx2 = getelementptr inbounds [3 x i8*]* @fn.codetable, i32 0, i32 %1 br label %indirectgoto DECREMENT: ; preds = %indirectgoto %dec = add nsw i32 %result.0, -1 - %2 = load i32* %opcodes.addr.0, align 4, !tbaa !0 + %2 = load i32* %opcodes.addr.0, align 4 %arrayidx4 = getelementptr inbounds [3 x i8*]* @fn.codetable, i32 0, i32 %2 br label %indirectgoto @@ -38,7 +38,3 @@ indirectgoto: ; preds = %DECREMENT, %INCREME RETURN: ; preds = %indirectgoto ret i32 %result.0 } - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/ARM/this-return.ll b/test/CodeGen/ARM/this-return.ll new file mode 100644 index 0000000..f06e4a4 --- /dev/null +++ b/test/CodeGen/ARM/this-return.ll @@ -0,0 +1,105 @@ +; RUN: llc < %s -mtriple=armv6-linux-gnueabi -arm-tail-calls | FileCheck %s -check-prefix=CHECKELF +; RUN: llc < %s -mtriple=thumbv7-apple-ios -arm-tail-calls | FileCheck %s -check-prefix=CHECKT2D + +%struct.A = type { i8 } +%struct.B = type { i32 } +%struct.C = type { %struct.B } +%struct.D = type { %struct.B } +%struct.E = type { %struct.B, %struct.B } + +declare %struct.A* @A_ctor_base(%struct.A* returned) +declare %struct.B* @B_ctor_base(%struct.B* returned, i32) +declare %struct.B* @B_ctor_complete(%struct.B* returned, i32) + +declare %struct.A* @A_ctor_base_nothisret(%struct.A*) +declare %struct.B* @B_ctor_base_nothisret(%struct.B*, i32) +declare %struct.B* @B_ctor_complete_nothisret(%struct.B*, i32) + +define %struct.C* @C_ctor_base(%struct.C* returned %this, i32 %x) { +entry: +; CHECKELF: C_ctor_base: +; CHECKELF-NOT: mov {{r[0-9]+}}, r0 +; CHECKELF: bl A_ctor_base +; CHECKELF-NOT: mov r0, {{r[0-9]+}} +; CHECKELF: b B_ctor_base +; CHECKT2D: C_ctor_base: +; CHECKT2D-NOT: mov {{r[0-9]+}}, r0 +; CHECKT2D: blx _A_ctor_base +; CHECKT2D-NOT: mov r0, {{r[0-9]+}} +; CHECKT2D: b.w _B_ctor_base + %0 = bitcast %struct.C* %this to %struct.A* + %call = tail call %struct.A* @A_ctor_base(%struct.A* %0) + %1 = getelementptr inbounds %struct.C* %this, i32 0, i32 0 + %call2 = tail call %struct.B* @B_ctor_base(%struct.B* %1, i32 %x) + ret %struct.C* %this +} + +define %struct.C* @C_ctor_base_nothisret(%struct.C* %this, i32 %x) { +entry: +; CHECKELF: C_ctor_base_nothisret: +; CHECKELF: mov [[SAVETHIS:r[0-9]+]], r0 +; CHECKELF: bl A_ctor_base_nothisret +; CHECKELF: mov r0, [[SAVETHIS]] +; CHECKELF-NOT: b B_ctor_base_nothisret +; CHECKT2D: C_ctor_base_nothisret: +; CHECKT2D: mov [[SAVETHIS:r[0-9]+]], r0 +; CHECKT2D: blx _A_ctor_base_nothisret +; CHECKT2D: mov r0, [[SAVETHIS]] +; CHECKT2D-NOT: b.w _B_ctor_base_nothisret + %0 = bitcast %struct.C* %this to %struct.A* + %call = tail call %struct.A* @A_ctor_base_nothisret(%struct.A* %0) + %1 = getelementptr inbounds %struct.C* %this, i32 0, i32 0 + %call2 = tail call %struct.B* @B_ctor_base_nothisret(%struct.B* %1, i32 %x) + ret %struct.C* %this +} + +define %struct.C* @C_ctor_complete(%struct.C* %this, i32 %x) { +entry: +; CHECKELF: C_ctor_complete: +; CHECKELF: b C_ctor_base +; CHECKT2D: C_ctor_complete: +; CHECKT2D: b.w _C_ctor_base + %call = tail call %struct.C* @C_ctor_base(%struct.C* %this, i32 %x) + ret %struct.C* %this +} + +define %struct.C* @C_ctor_complete_nothisret(%struct.C* %this, i32 %x) { +entry: +; CHECKELF: C_ctor_complete_nothisret: +; CHECKELF-NOT: b C_ctor_base_nothisret +; CHECKT2D: C_ctor_complete_nothisret: +; CHECKT2D-NOT: b.w _C_ctor_base_nothisret + %call = tail call %struct.C* @C_ctor_base_nothisret(%struct.C* %this, i32 %x) + ret %struct.C* %this +} + +define %struct.D* @D_ctor_base(%struct.D* %this, i32 %x) { +entry: +; CHECKELF: D_ctor_base: +; CHECKELF-NOT: mov {{r[0-9]+}}, r0 +; CHECKELF: bl B_ctor_complete +; CHECKELF-NOT: mov r0, {{r[0-9]+}} +; CHECKELF: b B_ctor_complete +; CHECKT2D: D_ctor_base: +; CHECKT2D-NOT: mov {{r[0-9]+}}, r0 +; CHECKT2D: blx _B_ctor_complete +; CHECKT2D-NOT: mov r0, {{r[0-9]+}} +; CHECKT2D: b.w _B_ctor_complete + %b = getelementptr inbounds %struct.D* %this, i32 0, i32 0 + %call = tail call %struct.B* @B_ctor_complete(%struct.B* %b, i32 %x) + %call2 = tail call %struct.B* @B_ctor_complete(%struct.B* %b, i32 %x) + ret %struct.D* %this +} + +define %struct.E* @E_ctor_base(%struct.E* %this, i32 %x) { +entry: +; CHECKELF: E_ctor_base: +; CHECKELF-NOT: b B_ctor_complete +; CHECKT2D: E_ctor_base: +; CHECKT2D-NOT: b.w _B_ctor_complete + %b = getelementptr inbounds %struct.E* %this, i32 0, i32 0 + %call = tail call %struct.B* @B_ctor_complete(%struct.B* %b, i32 %x) + %b2 = getelementptr inbounds %struct.E* %this, i32 0, i32 1 + %call2 = tail call %struct.B* @B_ctor_complete(%struct.B* %b2, i32 %x) + ret %struct.E* %this +} diff --git a/test/CodeGen/ARM/v1-constant-fold.ll b/test/CodeGen/ARM/v1-constant-fold.ll new file mode 100644 index 0000000..b86d5db --- /dev/null +++ b/test/CodeGen/ARM/v1-constant-fold.ll @@ -0,0 +1,18 @@ +; RUN: llc < %s -mtriple=armv7-none-linux-gnueabi -mattr=+v7,+vfp3,-neon | FileCheck %s + +; PR15611. Check that we don't crash when constant folding v1i32 types. + +; CHECK: foo: +define void @foo(i32 %arg) { +bb: + %tmp = insertelement <4 x i32> undef, i32 %arg, i32 0 + %tmp1 = insertelement <4 x i32> %tmp, i32 0, i32 1 + %tmp2 = insertelement <4 x i32> %tmp1, i32 0, i32 2 + %tmp3 = insertelement <4 x i32> %tmp2, i32 0, i32 3 + %tmp4 = add <4 x i32> %tmp3, <i32 -1, i32 -1, i32 -1, i32 -1> +; CHECK: bl bar + tail call void @bar(<4 x i32> %tmp4) + ret void +} + +declare void @bar(<4 x i32>) diff --git a/test/CodeGen/ARM/vcvt-cost.ll b/test/CodeGen/ARM/vcvt-cost.ll new file mode 100644 index 0000000..0d45c40 --- /dev/null +++ b/test/CodeGen/ARM/vcvt-cost.ll @@ -0,0 +1,153 @@ +; We currently estimate the cost of sext/zext/trunc v8(v16)i32 <-> v8(v16)i8 +; instructions as expensive. If lowering is improved the cost model needs to +; change. +; RUN: opt < %s -cost-model -analyze -mtriple=thumbv7-apple-ios6.0.0 -march=arm -mcpu=cortex-a8 | FileCheck %s --check-prefix=COST +%T0_5 = type <8 x i8> +%T1_5 = type <8 x i32> +; CHECK: func_cvt5: +define void @func_cvt5(%T0_5* %loadaddr, %T1_5* %storeaddr) { +; CHECK: vmovl.s8 +; CHECK: vmovl.s16 +; CHECK: vmovl.s16 + %v0 = load %T0_5* %loadaddr +; COST: func_cvt5 +; COST: cost of 3 {{.*}} sext + %r = sext %T0_5 %v0 to %T1_5 + store %T1_5 %r, %T1_5* %storeaddr + ret void +} +;; We currently estimate the cost of this instruction as expensive. If lowering +;; is improved the cost needs to change. +%TA0_5 = type <8 x i8> +%TA1_5 = type <8 x i32> +; CHECK: func_cvt1: +define void @func_cvt1(%TA0_5* %loadaddr, %TA1_5* %storeaddr) { +; CHECK: vmovl.u8 +; CHECK: vmovl.u16 +; CHECK: vmovl.u16 + %v0 = load %TA0_5* %loadaddr +; COST: func_cvt1 +; COST: cost of 3 {{.*}} zext + %r = zext %TA0_5 %v0 to %TA1_5 + store %TA1_5 %r, %TA1_5* %storeaddr + ret void +} + +%T0_51 = type <8 x i32> +%T1_51 = type <8 x i8> +; CHECK: func_cvt51: +define void @func_cvt51(%T0_51* %loadaddr, %T1_51* %storeaddr) { +; CHECK: vmovn.i32 +; CHECK: vmovn.i32 +; CHECK: vmovn.i16 + %v0 = load %T0_51* %loadaddr +; COST: func_cvt51 +; COST: cost of 3 {{.*}} trunc + %r = trunc %T0_51 %v0 to %T1_51 + store %T1_51 %r, %T1_51* %storeaddr + ret void +} + +%TT0_5 = type <16 x i8> +%TT1_5 = type <16 x i32> +; CHECK: func_cvt52: +define void @func_cvt52(%TT0_5* %loadaddr, %TT1_5* %storeaddr) { +; CHECK: vmovl.s16 +; CHECK: vmovl.s16 +; CHECK: vmovl.s16 +; CHECK: vmovl.s16 + %v0 = load %TT0_5* %loadaddr +; COST: func_cvt52 +; COST: cost of 6 {{.*}} sext + %r = sext %TT0_5 %v0 to %TT1_5 + store %TT1_5 %r, %TT1_5* %storeaddr + ret void +} +;; We currently estimate the cost of this instruction as expensive. If lowering +;; is improved the cost needs to change. +%TTA0_5 = type <16 x i8> +%TTA1_5 = type <16 x i32> +; CHECK: func_cvt12: +define void @func_cvt12(%TTA0_5* %loadaddr, %TTA1_5* %storeaddr) { +; CHECK: vmovl.u16 +; CHECK: vmovl.u16 +; CHECK: vmovl.u16 +; CHECK: vmovl.u16 + %v0 = load %TTA0_5* %loadaddr +; COST: func_cvt12 +; COST: cost of 6 {{.*}} zext + %r = zext %TTA0_5 %v0 to %TTA1_5 + store %TTA1_5 %r, %TTA1_5* %storeaddr + ret void +} + +%TT0_51 = type <16 x i32> +%TT1_51 = type <16 x i8> +; CHECK: func_cvt512: +define void @func_cvt512(%TT0_51* %loadaddr, %TT1_51* %storeaddr) { +; CHECK: vmovn.i32 +; CHECK: vmovn.i32 +; CHECK: vmovn.i32 +; CHECK: vmovn.i32 +; CHECK: vmovn.i16 +; CHECK: vmovn.i16 + %v0 = load %TT0_51* %loadaddr +; COST: func_cvt512 +; COST: cost of 6 {{.*}} trunc + %r = trunc %TT0_51 %v0 to %TT1_51 + store %TT1_51 %r, %TT1_51* %storeaddr + ret void +} + +; CHECK: sext_v4i16_v4i64: +define void @sext_v4i16_v4i64(<4 x i16>* %loadaddr, <4 x i64>* %storeaddr) { +; CHECK: vmovl.s32 +; CHECK: vmovl.s32 + %v0 = load <4 x i16>* %loadaddr +; COST: sext_v4i16_v4i64 +; COST: cost of 3 {{.*}} sext + %r = sext <4 x i16> %v0 to <4 x i64> + store <4 x i64> %r, <4 x i64>* %storeaddr + ret void +} + +; CHECK: zext_v4i16_v4i64: +define void @zext_v4i16_v4i64(<4 x i16>* %loadaddr, <4 x i64>* %storeaddr) { +; CHECK: vmovl.u32 +; CHECK: vmovl.u32 + %v0 = load <4 x i16>* %loadaddr +; COST: zext_v4i16_v4i64 +; COST: cost of 3 {{.*}} zext + %r = zext <4 x i16> %v0 to <4 x i64> + store <4 x i64> %r, <4 x i64>* %storeaddr + ret void +} + +; CHECK: sext_v8i16_v8i64: +define void @sext_v8i16_v8i64(<8 x i16>* %loadaddr, <8 x i64>* %storeaddr) { +; CHECK: vmovl.s32 +; CHECK: vmovl.s32 +; CHECK: vmovl.s32 +; CHECK: vmovl.s32 + %v0 = load <8 x i16>* %loadaddr +; COST: sext_v8i16_v8i64 +; COST: cost of 6 {{.*}} sext + %r = sext <8 x i16> %v0 to <8 x i64> + store <8 x i64> %r, <8 x i64>* %storeaddr + ret void +} + +; CHECK: zext_v8i16_v8i64: +define void @zext_v8i16_v8i64(<8 x i16>* %loadaddr, <8 x i64>* %storeaddr) { +; CHECK: vmovl.u32 +; CHECK: vmovl.u32 +; CHECK: vmovl.u32 +; CHECK: vmovl.u32 + %v0 = load <8 x i16>* %loadaddr +; COST: zext_v8i16_v8i64 +; COST: cost of 6 {{.*}} zext + %r = zext <8 x i16> %v0 to <8 x i64> + store <8 x i64> %r, <8 x i64>* %storeaddr + ret void +} + diff --git a/test/CodeGen/ARM/vcvt.ll b/test/CodeGen/ARM/vcvt.ll index 72d3645..c078f49 100644 --- a/test/CodeGen/ARM/vcvt.ll +++ b/test/CodeGen/ARM/vcvt.ll @@ -156,156 +156,3 @@ define <4 x i16> @vcvt_f32tof16(<4 x float>* %A) nounwind { declare <4 x float> @llvm.arm.neon.vcvthf2fp(<4 x i16>) nounwind readnone declare <4 x i16> @llvm.arm.neon.vcvtfp2hf(<4 x float>) nounwind readnone - -; We currently estimate the cost of sext/zext/trunc v8(v16)i32 <-> v8(v16)i8 -; instructions as expensive. If lowering is improved the cost model needs to -; change. -; RUN: opt < %s -cost-model -analyze -mtriple=thumbv7-apple-ios6.0.0 -march=arm -mcpu=cortex-a8 | FileCheck %s --check-prefix=COST -%T0_5 = type <8 x i8> -%T1_5 = type <8 x i32> -; CHECK: func_cvt5: -define void @func_cvt5(%T0_5* %loadaddr, %T1_5* %storeaddr) { -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh - %v0 = load %T0_5* %loadaddr -; COST: func_cvt5 -; COST: cost of 24 {{.*}} sext - %r = sext %T0_5 %v0 to %T1_5 - store %T1_5 %r, %T1_5* %storeaddr - ret void -} -;; We currently estimate the cost of this instruction as expensive. If lowering -;; is improved the cost needs to change. -%TA0_5 = type <8 x i8> -%TA1_5 = type <8 x i32> -; CHECK: func_cvt1: -define void @func_cvt1(%TA0_5* %loadaddr, %TA1_5* %storeaddr) { -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh - %v0 = load %TA0_5* %loadaddr -; COST: func_cvt1 -; COST: cost of 22 {{.*}} zext - %r = zext %TA0_5 %v0 to %TA1_5 - store %TA1_5 %r, %TA1_5* %storeaddr - ret void -} -;; We currently estimate the cost of this instruction as expensive. If lowering -;; is improved the cost needs to change. -%T0_51 = type <8 x i32> -%T1_51 = type <8 x i8> -; CHECK: func_cvt51: -define void @func_cvt51(%T0_51* %loadaddr, %T1_51* %storeaddr) { -; CHECK: strb -; CHECK: strb -; CHECK: strb -; CHECK: strb -; CHECK: strb -; CHECK: strb -; CHECK: strb -; CHECK: strb - %v0 = load %T0_51* %loadaddr -; COST: func_cvt51 -; COST: cost of 19 {{.*}} trunc - %r = trunc %T0_51 %v0 to %T1_51 - store %T1_51 %r, %T1_51* %storeaddr - ret void -} -;; We currently estimate the cost of this instruction as expensive. If lowering -;; is improved the cost needs to change. -%TT0_5 = type <16 x i8> -%TT1_5 = type <16 x i32> -; CHECK: func_cvt52: -define void @func_cvt52(%TT0_5* %loadaddr, %TT1_5* %storeaddr) { -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh - %v0 = load %TT0_5* %loadaddr -; COST: func_cvt52 -; COST: cost of 48 {{.*}} sext - %r = sext %TT0_5 %v0 to %TT1_5 - store %TT1_5 %r, %TT1_5* %storeaddr - ret void -} -;; We currently estimate the cost of this instruction as expensive. If lowering -;; is improved the cost needs to change. -%TTA0_5 = type <16 x i8> -%TTA1_5 = type <16 x i32> -; CHECK: func_cvt12: -define void @func_cvt12(%TTA0_5* %loadaddr, %TTA1_5* %storeaddr) { -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh -; CHECK: strh - %v0 = load %TTA0_5* %loadaddr -; COST: func_cvt12 -; COST: cost of 44 {{.*}} zext - %r = zext %TTA0_5 %v0 to %TTA1_5 - store %TTA1_5 %r, %TTA1_5* %storeaddr - ret void -} -;; We currently estimate the cost of this instruction as expensive. If lowering -;; is improved the cost needs to change. -%TT0_51 = type <16 x i32> -%TT1_51 = type <16 x i8> -; CHECK: func_cvt512: -define void @func_cvt512(%TT0_51* %loadaddr, %TT1_51* %storeaddr) { -; CHECK: strb -; CHECK: strb -; CHECK: strb -; CHECK: strb -; CHECK: strb -; CHECK: strb -; CHECK: strb -; CHECK: strb -; CHECK: strb -; CHECK: strb -; CHECK: strb -; CHECK: strb -; CHECK: strb -; CHECK: strb -; CHECK: strb -; CHECK: strb - %v0 = load %TT0_51* %loadaddr -; COST: func_cvt512 -; COST: cost of 38 {{.*}} trunc - %r = trunc %TT0_51 %v0 to %TT1_51 - store %TT1_51 %r, %TT1_51* %storeaddr - ret void -} diff --git a/test/CodeGen/ARM/vcvt_combine.ll b/test/CodeGen/ARM/vcvt_combine.ll index 3009e50..07ba230 100644 --- a/test/CodeGen/ARM/vcvt_combine.ll +++ b/test/CodeGen/ARM/vcvt_combine.ll @@ -7,7 +7,7 @@ ; CHECK-NOT: vmul define void @t0() nounwind { entry: - %tmp = load float* @in, align 4, !tbaa !0 + %tmp = load float* @in, align 4 %vecinit.i = insertelement <2 x float> undef, float %tmp, i32 0 %vecinit2.i = insertelement <2 x float> %vecinit.i, float %tmp, i32 1 %mul.i = fmul <2 x float> %vecinit2.i, <float 8.000000e+00, float 8.000000e+00> @@ -23,7 +23,7 @@ declare void @foo_int32x2_t(<2 x i32>) ; CHECK-NOT: vmul define void @t1() nounwind { entry: - %tmp = load float* @in, align 4, !tbaa !0 + %tmp = load float* @in, align 4 %vecinit.i = insertelement <2 x float> undef, float %tmp, i32 0 %vecinit2.i = insertelement <2 x float> %vecinit.i, float %tmp, i32 1 %mul.i = fmul <2 x float> %vecinit2.i, <float 8.000000e+00, float 8.000000e+00> @@ -39,7 +39,7 @@ declare void @foo_uint32x2_t(<2 x i32>) ; CHECK: vmul define void @t2() nounwind { entry: - %tmp = load float* @in, align 4, !tbaa !0 + %tmp = load float* @in, align 4 %vecinit.i = insertelement <2 x float> undef, float %tmp, i32 0 %vecinit2.i = insertelement <2 x float> %vecinit.i, float %tmp, i32 1 %mul.i = fmul <2 x float> %vecinit2.i, <float 0x401B333340000000, float 0x401B333340000000> @@ -53,7 +53,7 @@ entry: ; CHECK: vmul define void @t3() nounwind { entry: - %tmp = load float* @in, align 4, !tbaa !0 + %tmp = load float* @in, align 4 %vecinit.i = insertelement <2 x float> undef, float %tmp, i32 0 %vecinit2.i = insertelement <2 x float> %vecinit.i, float %tmp, i32 1 %mul.i = fmul <2 x float> %vecinit2.i, <float 0x4200000000000000, float 0x4200000000000000> @@ -67,7 +67,7 @@ entry: ; CHECK-NOT: vmul define void @t4() nounwind { entry: - %tmp = load float* @in, align 4, !tbaa !0 + %tmp = load float* @in, align 4 %vecinit.i = insertelement <2 x float> undef, float %tmp, i32 0 %vecinit2.i = insertelement <2 x float> %vecinit.i, float %tmp, i32 1 %mul.i = fmul <2 x float> %vecinit2.i, <float 0x41F0000000000000, float 0x41F0000000000000> @@ -81,7 +81,7 @@ entry: ; CHECK-NOT: vmul define void @t5() nounwind { entry: - %tmp = load float* @in, align 4, !tbaa !0 + %tmp = load float* @in, align 4 %vecinit.i = insertelement <4 x float> undef, float %tmp, i32 0 %vecinit2.i = insertelement <4 x float> %vecinit.i, float %tmp, i32 1 %vecinit4.i = insertelement <4 x float> %vecinit2.i, float %tmp, i32 2 @@ -93,7 +93,3 @@ entry: } declare void @foo_int32x4_t(<4 x i32>) - -!0 = metadata !{metadata !"float", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/ARM/vdiv_combine.ll b/test/CodeGen/ARM/vdiv_combine.ll index 7fddbed..e6f1338 100644 --- a/test/CodeGen/ARM/vdiv_combine.ll +++ b/test/CodeGen/ARM/vdiv_combine.ll @@ -11,7 +11,7 @@ declare void @foo_int32x4_t(<4 x i32>) ; CHECK-NOT: {{vdiv|vmul}} define void @t1() nounwind { entry: - %tmp = load i32* @iin, align 4, !tbaa !3 + %tmp = load i32* @iin, align 4 %vecinit.i = insertelement <2 x i32> undef, i32 %tmp, i32 0 %vecinit2.i = insertelement <2 x i32> %vecinit.i, i32 %tmp, i32 1 %vcvt.i = sitofp <2 x i32> %vecinit2.i to <2 x float> @@ -27,7 +27,7 @@ declare void @foo_float32x2_t(<2 x float>) ; CHECK-NOT: {{vdiv|vmul}} define void @t2() nounwind { entry: - %tmp = load i32* @uin, align 4, !tbaa !3 + %tmp = load i32* @uin, align 4 %vecinit.i = insertelement <2 x i32> undef, i32 %tmp, i32 0 %vecinit2.i = insertelement <2 x i32> %vecinit.i, i32 %tmp, i32 1 %vcvt.i = uitofp <2 x i32> %vecinit2.i to <2 x float> @@ -41,7 +41,7 @@ entry: ; CHECK: {{vdiv|vmul}} define void @t3() nounwind { entry: - %tmp = load i32* @iin, align 4, !tbaa !3 + %tmp = load i32* @iin, align 4 %vecinit.i = insertelement <2 x i32> undef, i32 %tmp, i32 0 %vecinit2.i = insertelement <2 x i32> %vecinit.i, i32 %tmp, i32 1 %vcvt.i = sitofp <2 x i32> %vecinit2.i to <2 x float> @@ -55,7 +55,7 @@ entry: ; CHECK: {{vdiv|vmul}} define void @t4() nounwind { entry: - %tmp = load i32* @iin, align 4, !tbaa !3 + %tmp = load i32* @iin, align 4 %vecinit.i = insertelement <2 x i32> undef, i32 %tmp, i32 0 %vecinit2.i = insertelement <2 x i32> %vecinit.i, i32 %tmp, i32 1 %vcvt.i = sitofp <2 x i32> %vecinit2.i to <2 x float> @@ -69,7 +69,7 @@ entry: ; CHECK-NOT: {{vdiv|vmul}} define void @t5() nounwind { entry: - %tmp = load i32* @iin, align 4, !tbaa !3 + %tmp = load i32* @iin, align 4 %vecinit.i = insertelement <2 x i32> undef, i32 %tmp, i32 0 %vecinit2.i = insertelement <2 x i32> %vecinit.i, i32 %tmp, i32 1 %vcvt.i = sitofp <2 x i32> %vecinit2.i to <2 x float> @@ -83,7 +83,7 @@ entry: ; CHECK-NOT: {{vdiv|vmul}} define void @t6() nounwind { entry: - %tmp = load i32* @iin, align 4, !tbaa !3 + %tmp = load i32* @iin, align 4 %vecinit.i = insertelement <4 x i32> undef, i32 %tmp, i32 0 %vecinit2.i = insertelement <4 x i32> %vecinit.i, i32 %tmp, i32 1 %vecinit4.i = insertelement <4 x i32> %vecinit2.i, i32 %tmp, i32 2 @@ -95,8 +95,3 @@ entry: } declare void @foo_float32x4_t(<4 x float>) - -!0 = metadata !{metadata !"float", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} -!3 = metadata !{metadata !"int", metadata !1} diff --git a/test/CodeGen/ARM/widen-vmovs.ll b/test/CodeGen/ARM/widen-vmovs.ll index 679e3f4..1efbc73 100644 --- a/test/CodeGen/ARM/widen-vmovs.ll +++ b/test/CodeGen/ARM/widen-vmovs.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -widen-vmovs -mcpu=cortex-a8 -verify-machineinstrs -disable-code-place | FileCheck %s +; RUN: llc < %s -widen-vmovs -mcpu=cortex-a8 -verify-machineinstrs -disable-block-placement | FileCheck %s target triple = "thumbv7-apple-ios" ; The 1.0e+10 constant is loaded from the constant pool and kept in a register. diff --git a/test/CodeGen/ARM/zextload_demandedbits.ll b/test/CodeGen/ARM/zextload_demandedbits.ll new file mode 100644 index 0000000..3d3269c --- /dev/null +++ b/test/CodeGen/ARM/zextload_demandedbits.ll @@ -0,0 +1,35 @@ +; RUN: llc < %s -march=arm -mtriple="thumbv7-apple-ios3.0.0" | FileCheck %s + +target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32" + +%struct.eggs = type { %struct.spam, i16 } +%struct.spam = type { [3 x i32] } +%struct.barney = type { [2 x i32], [2 x i32] } + +; Make sure that the sext op does not get lost due to ComputeMaskedBits. +; CHECK: quux +; CHECK: lsl +; CHECK: asr +; CHECK: bl +; CHECK: pop +define void @quux(%struct.eggs* %arg) { +bb: + %tmp1 = getelementptr inbounds %struct.eggs* %arg, i32 0, i32 1 + %0 = load i16* %tmp1, align 2 + %tobool = icmp eq i16 %0, 0 + br i1 %tobool, label %bb16, label %bb3 + +bb3: ; preds = %bb + %tmp4 = bitcast i16* %tmp1 to i8* + %tmp5 = ptrtoint i16* %tmp1 to i32 + %tmp6 = shl i32 %tmp5, 20 + %tmp7 = ashr exact i32 %tmp6, 20 + %tmp14 = getelementptr inbounds %struct.barney* undef, i32 %tmp7 + %tmp15 = tail call i32 @widget(%struct.barney* %tmp14, i8* %tmp4, i32 %tmp7) + br label %bb16 + +bb16: ; preds = %bb3, %bb + ret void +} + +declare i32 @widget(%struct.barney*, i8*, i32) diff --git a/test/CodeGen/Generic/2008-02-20-MatchingMem.ll b/test/CodeGen/Generic/2008-02-20-MatchingMem.ll index da1aeb5..7ffb734 100644 --- a/test/CodeGen/Generic/2008-02-20-MatchingMem.ll +++ b/test/CodeGen/Generic/2008-02-20-MatchingMem.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s ; PR1133 +; XFAIL: hexagon define void @test(i32* %X) nounwind { entry: %tmp1 = getelementptr i32* %X, i32 10 ; <i32*> [#uses=2] diff --git a/test/CodeGen/Generic/2013-03-20-APFloatCrash.ll b/test/CodeGen/Generic/2013-03-20-APFloatCrash.ll new file mode 100644 index 0000000..a1aed0e --- /dev/null +++ b/test/CodeGen/Generic/2013-03-20-APFloatCrash.ll @@ -0,0 +1,7 @@ +; RUN: llc < %s + +define internal i1 @f(float %s) { +entry: + %c = fcmp ogt float %s, 0x41EFFFFFE0000000 + ret i1 %c +} diff --git a/test/CodeGen/Generic/crash.ll b/test/CodeGen/Generic/crash.ll index d889389..d3fc204 100644 --- a/test/CodeGen/Generic/crash.ll +++ b/test/CodeGen/Generic/crash.ll @@ -51,7 +51,7 @@ for.body.i: ; preds = %for.body.i, %entry func_74.exit.for.cond29.thread_crit_edge: ; preds = %for.body.i %f13576.pre = getelementptr inbounds %struct.S0* undef, i64 0, i32 1 - store i8 0, i8* %f13576.pre, align 4, !tbaa !0 + store i8 0, i8* %f13576.pre, align 4 br label %lbl_468 lbl_468: ; preds = %lbl_468, %func_74.exit.for.cond29.thread_crit_edge @@ -63,6 +63,3 @@ lbl_468: ; preds = %lbl_468, %func_74.e for.end74: ; preds = %lbl_468 ret void } - -!0 = metadata !{metadata !"omnipotent char", metadata !1} -!1 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/Generic/multiple-return-values-cross-block-with-invoke.ll b/test/CodeGen/Generic/multiple-return-values-cross-block-with-invoke.ll index e709080..a135c62 100644 --- a/test/CodeGen/Generic/multiple-return-values-cross-block-with-invoke.ll +++ b/test/CodeGen/Generic/multiple-return-values-cross-block-with-invoke.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s - +; XFAIL: hexagon declare { i64, double } @wild() define void @foo(i64* %p, double* %q) nounwind { diff --git a/test/CodeGen/Generic/select-cc.ll b/test/CodeGen/Generic/select-cc.ll index b653e2a..7510f70 100644 --- a/test/CodeGen/Generic/select-cc.ll +++ b/test/CodeGen/Generic/select-cc.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s ; PR2504 - +; XFAIL: hexagon define <2 x double> @vector_select(<2 x double> %x, <2 x double> %y) nounwind { %x.lo = extractelement <2 x double> %x, i32 0 ; <double> [#uses=1] %x.lo.ge = fcmp oge double %x.lo, 0.000000e+00 ; <i1> [#uses=1] diff --git a/test/CodeGen/Generic/vector.ll b/test/CodeGen/Generic/vector.ll index 84814a1..bc7c7d0 100644 --- a/test/CodeGen/Generic/vector.ll +++ b/test/CodeGen/Generic/vector.ll @@ -1,6 +1,6 @@ ; Test that vectors are scalarized/lowered correctly. ; RUN: llc < %s - +; XFAIL: hexagon %d8 = type <8 x double> %f1 = type <1 x float> diff --git a/test/CodeGen/Hexagon/absimm.ll b/test/CodeGen/Hexagon/absimm.ll new file mode 100644 index 0000000..b8f5edc --- /dev/null +++ b/test/CodeGen/Hexagon/absimm.ll @@ -0,0 +1,18 @@ +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; Check that we generate absolute addressing mode instructions +; with immediate value. + +define i32 @f1(i32 %i) nounwind { +; CHECK: memw(##786432){{ *}}={{ *}}r{{[0-9]+}} +entry: + store volatile i32 %i, i32* inttoptr (i32 786432 to i32*), align 262144 + ret i32 %i +} + +define i32* @f2(i32* nocapture %i) nounwind { +entry: +; CHECK: r{{[0-9]+}}{{ *}}={{ *}}memw(##786432) + %0 = load volatile i32* inttoptr (i32 786432 to i32*), align 262144 + %1 = inttoptr i32 %0 to i32* + ret i32* %1 + } diff --git a/test/CodeGen/Hexagon/always-ext.ll b/test/CodeGen/Hexagon/always-ext.ll new file mode 100644 index 0000000..9c8d708 --- /dev/null +++ b/test/CodeGen/Hexagon/always-ext.ll @@ -0,0 +1,45 @@ +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s + +; Check that we don't generate an invalid packet with too many instructions +; due to a store that has a must-extend operand. + +; CHECK: CuSuiteAdd.exit.us +; CHECK: { +; CHECK-NOT: call abort +; CHECK: memw(##0) +; CHECK: memw(r{{[0-9+]}}<<#2+##4) +; CHECK: } + +%struct.CuTest.1.28.31.37.40.43.52.55.67.85.111 = type { i8*, void (%struct.CuTest.1.28.31.37.40.43.52.55.67.85.111*)*, i32, i32, i8*, [23 x i32]* } +%struct.CuSuite.2.29.32.38.41.44.53.56.68.86.112 = type { i32, [1024 x %struct.CuTest.1.28.31.37.40.43.52.55.67.85.111*], i32 } + +@__func__.CuSuiteAdd = external unnamed_addr constant [11 x i8], align 8 +@.str24 = external unnamed_addr constant [140 x i8], align 8 + +declare void @_Assert() + +define void @CuSuiteAddSuite() nounwind { +entry: + br i1 undef, label %for.body.us, label %for.end + +for.body.us: ; preds = %entry + %0 = load %struct.CuTest.1.28.31.37.40.43.52.55.67.85.111** null, align 4 + %1 = load i32* undef, align 4 + %cmp.i.us = icmp slt i32 %1, 1024 + br i1 %cmp.i.us, label %CuSuiteAdd.exit.us, label %cond.false6.i.us + +cond.false6.i.us: ; preds = %for.body.us + tail call void @_Assert() nounwind + unreachable + +CuSuiteAdd.exit.us: ; preds = %for.body.us + %arrayidx.i.us = getelementptr inbounds %struct.CuSuite.2.29.32.38.41.44.53.56.68.86.112* null, i32 0, i32 1, i32 %1 + store %struct.CuTest.1.28.31.37.40.43.52.55.67.85.111* %0, %struct.CuTest.1.28.31.37.40.43.52.55.67.85.111** %arrayidx.i.us, align 4 + call void @llvm.trap() + unreachable + +for.end: ; preds = %entry + ret void +} + +declare void @llvm.trap() noreturn nounwind diff --git a/test/CodeGen/Hexagon/ashift-left-right.ll b/test/CodeGen/Hexagon/ashift-left-right.ll new file mode 100644 index 0000000..7c41bc7 --- /dev/null +++ b/test/CodeGen/Hexagon/ashift-left-right.ll @@ -0,0 +1,21 @@ +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s + +define i32 @foo(i32 %a, i32 %b) nounwind readnone { +; CHECK: lsl +; CHECK: aslh +entry: + %shl1 = shl i32 16, %a + %shl2 = shl i32 %b, 16 + %ret = mul i32 %shl1, %shl2 + ret i32 %ret +} + +define i32 @bar(i32 %a, i32 %b) nounwind readnone { +; CHECK: asrh +; CHECK: lsr +entry: + %shl1 = ashr i32 16, %a + %shl2 = ashr i32 %b, 16 + %ret = mul i32 %shl1, %shl2 + ret i32 %ret +} diff --git a/test/CodeGen/Hexagon/cmp_pred2.ll b/test/CodeGen/Hexagon/cmp_pred2.ll new file mode 100644 index 0000000..a20b9f0 --- /dev/null +++ b/test/CodeGen/Hexagon/cmp_pred2.ll @@ -0,0 +1,87 @@ +; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s +; Make sure that the assembler mapped compare instructions are correctly generated. + +@c = common global i32 0, align 4 + +define i32 @test1(i32 %a, i32 %b) nounwind { +; CHECK-NOT: cmp.ge +; CHECK: cmp.gt +entry: + %cmp = icmp slt i32 %a, 100 + br i1 %cmp, label %if.then, label %entry.if.end_crit_edge + +entry.if.end_crit_edge: + %.pre = load i32* @c, align 4 + br label %if.end + +if.then: + %sub = add nsw i32 %a, -10 + store i32 %sub, i32* @c, align 4 + br label %if.end + +if.end: + %0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %sub, %if.then ] + ret i32 %0 +} + +define i32 @test2(i32 %a, i32 %b) nounwind { +; CHECK-NOT: cmp.lt +; CHECK: cmp.gt +entry: + %cmp = icmp sge i32 %a, %b + br i1 %cmp, label %entry.if.end_crit_edge, label %if.then + +entry.if.end_crit_edge: + %.pre = load i32* @c, align 4 + br label %if.end + +if.then: + %sub = add nsw i32 %a, -10 + store i32 %sub, i32* @c, align 4 + br label %if.end + +if.end: + %0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %sub, %if.then ] + ret i32 %0 +} + +define i32 @test4(i32 %a, i32 %b) nounwind { +; CHECK-NOT: cmp.ltu +; CHECK: cmp.gtu +entry: + %cmp = icmp uge i32 %a, %b + br i1 %cmp, label %entry.if.end_crit_edge, label %if.then + +entry.if.end_crit_edge: + %.pre = load i32* @c, align 4 + br label %if.end + +if.then: + %sub = add i32 %a, -10 + store i32 %sub, i32* @c, align 4 + br label %if.end + +if.end: + %0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %sub, %if.then ] + ret i32 %0 +} + +define i32 @test5(i32 %a, i32 %b) nounwind { +; CHECK: cmp.gtu +entry: + %cmp = icmp uge i32 %a, 29999 + br i1 %cmp, label %if.then, label %entry.if.end_crit_edge + +entry.if.end_crit_edge: + %.pre = load i32* @c, align 4 + br label %if.end + +if.then: + %sub = add i32 %a, -10 + store i32 %sub, i32* @c, align 4 + br label %if.end + +if.end: + %0 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %sub, %if.then ] + ret i32 %0 +} diff --git a/test/CodeGen/Hexagon/cmpb_pred.ll b/test/CodeGen/Hexagon/cmpb_pred.ll index 1e61447..0960da1 100644 --- a/test/CodeGen/Hexagon/cmpb_pred.ll +++ b/test/CodeGen/Hexagon/cmpb_pred.ll @@ -16,7 +16,7 @@ entry: define i32 @Func_3b(i32) nounwind readonly { entry: ; CHECK-NOT: mux - %1 = load i8* @Enum_global, align 1, !tbaa !0 + %1 = load i8* @Enum_global, align 1 %2 = trunc i32 %0 to i8 %cmp = icmp ne i8 %1, %2 %selv = zext i1 %cmp to i32 @@ -35,7 +35,7 @@ entry: define i32 @Func_3d(i32) nounwind readonly { entry: ; CHECK-NOT: mux - %1 = load i8* @Enum_global, align 1, !tbaa !0 + %1 = load i8* @Enum_global, align 1 %2 = trunc i32 %0 to i8 %cmp = icmp eq i8 %1, %2 %selv = zext i1 %cmp to i32 @@ -45,7 +45,7 @@ entry: define i32 @Func_3e(i32) nounwind readonly { entry: ; CHECK-NOT: mux - %1 = load i8* @Enum_global, align 1, !tbaa !0 + %1 = load i8* @Enum_global, align 1 %2 = trunc i32 %0 to i8 %cmp = icmp eq i8 %1, %2 %selv = zext i1 %cmp to i32 @@ -87,6 +87,3 @@ entry: %selv = zext i1 %cmp to i32 ret i32 %selv } - -!0 = metadata !{metadata !"omnipotent char", metadata !1} -!1 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/Hexagon/combine_ir.ll b/test/CodeGen/Hexagon/combine_ir.ll index 921ce99..8b99ef7 100644 --- a/test/CodeGen/Hexagon/combine_ir.ll +++ b/test/CodeGen/Hexagon/combine_ir.ll @@ -6,12 +6,7 @@ define void @word(i32* nocapture %a) nounwind { entry: %0 = load i32* %a, align 4, !tbaa !0 %1 = zext i32 %0 to i64 - %add.ptr = getelementptr inbounds i32* %a, i32 1 - %2 = load i32* %add.ptr, align 4, !tbaa !0 - %3 = zext i32 %2 to i64 - %4 = shl nuw i64 %3, 32 - %ins = or i64 %4, %1 - tail call void @bar(i64 %ins) nounwind + tail call void @bar(i64 %1) nounwind ret void } diff --git a/test/CodeGen/Hexagon/gp-rel.ll b/test/CodeGen/Hexagon/gp-rel.ll new file mode 100644 index 0000000..561869e --- /dev/null +++ b/test/CodeGen/Hexagon/gp-rel.ll @@ -0,0 +1,33 @@ +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; Check that gp-relative instructions are being generated. + +@a = common global i32 0, align 4 +@b = common global i32 0, align 4 +@c = common global i32 0, align 4 + +define i32 @foo(i32 %p) #0 { +entry: +; CHECK: r{{[0-9]+}}{{ *}}={{ *}}memw(#a) +; CHECK: r{{[0-9]+}}{{ *}}={{ *}}memw(#b) +; CHECK: if{{ *}}(p{{[0-3]}}) memw(##c){{ *}}={{ *}}r{{[0-9]+}} + %0 = load i32* @a, align 4 + %1 = load i32* @b, align 4 + %add = add nsw i32 %1, %0 + %cmp = icmp eq i32 %0, %1 + br i1 %cmp, label %if.then, label %entry.if.end_crit_edge + +entry.if.end_crit_edge: + %.pre = load i32* @c, align 4 + br label %if.end + +if.then: + %add1 = add nsw i32 %add, %0 + store i32 %add1, i32* @c, align 4 + br label %if.end + +if.end: + %2 = phi i32 [ %.pre, %entry.if.end_crit_edge ], [ %add1, %if.then ] + %cmp2 = icmp eq i32 %add, %2 + %sel1 = select i1 %cmp2, i32 %2, i32 %1 + ret i32 %sel1 +} diff --git a/test/CodeGen/Hexagon/hwloop-const.ll b/test/CodeGen/Hexagon/hwloop-const.ll index a621c58..8204dde 100644 --- a/test/CodeGen/Hexagon/hwloop-const.ll +++ b/test/CodeGen/Hexagon/hwloop-const.ll @@ -15,9 +15,9 @@ entry: for.body: ; preds = %for.body, %entry %i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ] %arrayidx = getelementptr inbounds [25000 x i32]* @b, i32 0, i32 %i.02 - store i32 %i.02, i32* %arrayidx, align 4, !tbaa !0 + store i32 %i.02, i32* %arrayidx, align 4 %arrayidx1 = getelementptr inbounds [25000 x i32]* @a, i32 0, i32 %i.02 - store i32 %i.02, i32* %arrayidx1, align 4, !tbaa !0 + store i32 %i.02, i32* %arrayidx1, align 4 %inc = add nsw i32 %i.02, 1 %exitcond = icmp eq i32 %inc, 25000 br i1 %exitcond, label %for.end, label %for.body @@ -25,7 +25,3 @@ for.body: ; preds = %for.body, %entry for.end: ; preds = %for.body ret i32 0 } - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/Hexagon/hwloop-dbg.ll b/test/CodeGen/Hexagon/hwloop-dbg.ll index eaffa07..17fe7b9 100644 --- a/test/CodeGen/Hexagon/hwloop-dbg.ll +++ b/test/CodeGen/Hexagon/hwloop-dbg.ll @@ -19,8 +19,8 @@ for.body: ; preds = %for.body, %entry %b.addr.01 = phi i32* [ %b, %entry ], [ %incdec.ptr, %for.body ] %incdec.ptr = getelementptr inbounds i32* %b.addr.01, i32 1, !dbg !21 tail call void @llvm.dbg.value(metadata !{i32* %incdec.ptr}, i64 0, metadata !14), !dbg !21 - %0 = load i32* %b.addr.01, align 4, !dbg !21, !tbaa !23 - store i32 %0, i32* %arrayidx.phi, align 4, !dbg !21, !tbaa !23 + %0 = load i32* %b.addr.01, align 4, !dbg !21 + store i32 %0, i32* %arrayidx.phi, align 4, !dbg !21 %inc = add nsw i32 %i.02, 1, !dbg !26 tail call void @llvm.dbg.value(metadata !{i32 %inc}, i64 0, metadata !15), !dbg !26 %exitcond = icmp eq i32 %inc, 10, !dbg !19 @@ -33,7 +33,6 @@ for.end: ; preds = %for.body declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone -!llvm.dbg.cu = !{!0} !0 = metadata !{i32 786449, i32 0, i32 12, metadata !"hwloop-dbg.c", metadata !"/usr2/kparzysz/s.hex/t", metadata !"QuIC LLVM Hexagon Clang version 6.1-pre-unknown, (git://git-hexagon-aus.quicinc.com/llvm/clang-mainline.git e9382867661454cdf44addb39430741578e9765c) (llvm/llvm-mainline.git 36412bb1fcf03ed426d4437b41198bae066675ac)", i1 true, i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1} ; [ DW_TAG_compile_unit ] [/usr2/kparzysz/s.hex/t/hwloop-dbg.c] [DW_LANG_C99] !1 = metadata !{metadata !2} @@ -58,8 +57,5 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !20 = metadata !{i32 786443, metadata !16, i32 3, i32 3, metadata !6, i32 1} ; [ DW_TAG_lexical_block ] [/usr2/kparzysz/s.hex/t/hwloop-dbg.c] !21 = metadata !{i32 4, i32 5, metadata !22, null} !22 = metadata !{i32 786443, metadata !20, i32 3, i32 28, metadata !6, i32 2} ; [ DW_TAG_lexical_block ] [/usr2/kparzysz/s.hex/t/hwloop-dbg.c] -!23 = metadata !{metadata !"int", metadata !24} -!24 = metadata !{metadata !"omnipotent char", metadata !25} -!25 = metadata !{metadata !"Simple C/C++ TBAA"} !26 = metadata !{i32 3, i32 23, metadata !20, null} !27 = metadata !{i32 6, i32 1, metadata !16, null} diff --git a/test/CodeGen/Hexagon/memops.ll b/test/CodeGen/Hexagon/memops.ll new file mode 100644 index 0000000..5498848 --- /dev/null +++ b/test/CodeGen/Hexagon/memops.ll @@ -0,0 +1,1369 @@ +; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s +; Generate MemOps for V4 and above. + +define void @memop_unsigned_char_add5(i8* nocapture %p) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5 + %0 = load i8* %p, align 1, !tbaa !0 + %conv = zext i8 %0 to i32 + %add = add nsw i32 %conv, 5 + %conv1 = trunc i32 %add to i8 + store i8 %conv1, i8* %p, align 1, !tbaa !0 + ret void +} + +define void @memop_unsigned_char_add(i8* nocapture %p, i8 zeroext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}} + %conv = zext i8 %x to i32 + %0 = load i8* %p, align 1, !tbaa !0 + %conv1 = zext i8 %0 to i32 + %add = add nsw i32 %conv1, %conv + %conv2 = trunc i32 %add to i8 + store i8 %conv2, i8* %p, align 1, !tbaa !0 + ret void +} + +define void @memop_unsigned_char_sub(i8* nocapture %p, i8 zeroext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}} + %conv = zext i8 %x to i32 + %0 = load i8* %p, align 1, !tbaa !0 + %conv1 = zext i8 %0 to i32 + %sub = sub nsw i32 %conv1, %conv + %conv2 = trunc i32 %sub to i8 + store i8 %conv2, i8* %p, align 1, !tbaa !0 + ret void +} + +define void @memop_unsigned_char_or(i8* nocapture %p, i8 zeroext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}} + %0 = load i8* %p, align 1, !tbaa !0 + %or3 = or i8 %0, %x + store i8 %or3, i8* %p, align 1, !tbaa !0 + ret void +} + +define void @memop_unsigned_char_and(i8* nocapture %p, i8 zeroext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}} + %0 = load i8* %p, align 1, !tbaa !0 + %and3 = and i8 %0, %x + store i8 %and3, i8* %p, align 1, !tbaa !0 + ret void +} + +define void @memop_unsigned_char_clrbit(i8* nocapture %p) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}}) + %0 = load i8* %p, align 1, !tbaa !0 + %conv = zext i8 %0 to i32 + %and = and i32 %conv, 223 + %conv1 = trunc i32 %and to i8 + store i8 %conv1, i8* %p, align 1, !tbaa !0 + ret void +} + +define void @memop_unsigned_char_setbit(i8* nocapture %p) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}}) + %0 = load i8* %p, align 1, !tbaa !0 + %conv = zext i8 %0 to i32 + %or = or i32 %conv, 128 + %conv1 = trunc i32 %or to i8 + store i8 %conv1, i8* %p, align 1, !tbaa !0 + ret void +} + +define void @memop_unsigned_char_add5_index(i8* nocapture %p, i32 %i) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5 + %add.ptr = getelementptr inbounds i8* %p, i32 %i + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %conv = zext i8 %0 to i32 + %add = add nsw i32 %conv, 5 + %conv1 = trunc i32 %add to i8 + store i8 %conv1, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_unsigned_char_add_index(i8* nocapture %p, i32 %i, i8 zeroext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}} + %conv = zext i8 %x to i32 + %add.ptr = getelementptr inbounds i8* %p, i32 %i + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %conv1 = zext i8 %0 to i32 + %add = add nsw i32 %conv1, %conv + %conv2 = trunc i32 %add to i8 + store i8 %conv2, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_unsigned_char_sub_index(i8* nocapture %p, i32 %i, i8 zeroext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}} + %conv = zext i8 %x to i32 + %add.ptr = getelementptr inbounds i8* %p, i32 %i + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %conv1 = zext i8 %0 to i32 + %sub = sub nsw i32 %conv1, %conv + %conv2 = trunc i32 %sub to i8 + store i8 %conv2, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_unsigned_char_or_index(i8* nocapture %p, i32 %i, i8 zeroext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i8* %p, i32 %i + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %or3 = or i8 %0, %x + store i8 %or3, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_unsigned_char_and_index(i8* nocapture %p, i32 %i, i8 zeroext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i8* %p, i32 %i + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %and3 = and i8 %0, %x + store i8 %and3, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_unsigned_char_clrbit_index(i8* nocapture %p, i32 %i) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}}) + %add.ptr = getelementptr inbounds i8* %p, i32 %i + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %conv = zext i8 %0 to i32 + %and = and i32 %conv, 223 + %conv1 = trunc i32 %and to i8 + store i8 %conv1, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_unsigned_char_setbit_index(i8* nocapture %p, i32 %i) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}}) + %add.ptr = getelementptr inbounds i8* %p, i32 %i + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %conv = zext i8 %0 to i32 + %or = or i32 %conv, 128 + %conv1 = trunc i32 %or to i8 + store i8 %conv1, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_unsigned_char_add5_index5(i8* nocapture %p) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}+={{ *}}#5 + %add.ptr = getelementptr inbounds i8* %p, i32 5 + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %conv = zext i8 %0 to i32 + %add = add nsw i32 %conv, 5 + %conv1 = trunc i32 %add to i8 + store i8 %conv1, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_unsigned_char_add_index5(i8* nocapture %p, i8 zeroext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}+={{ *}}r{{[0-9]+}} + %conv = zext i8 %x to i32 + %add.ptr = getelementptr inbounds i8* %p, i32 5 + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %conv1 = zext i8 %0 to i32 + %add = add nsw i32 %conv1, %conv + %conv2 = trunc i32 %add to i8 + store i8 %conv2, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_unsigned_char_sub_index5(i8* nocapture %p, i8 zeroext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}-={{ *}}r{{[0-9]+}} + %conv = zext i8 %x to i32 + %add.ptr = getelementptr inbounds i8* %p, i32 5 + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %conv1 = zext i8 %0 to i32 + %sub = sub nsw i32 %conv1, %conv + %conv2 = trunc i32 %sub to i8 + store i8 %conv2, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_unsigned_char_or_index5(i8* nocapture %p, i8 zeroext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}|={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i8* %p, i32 5 + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %or3 = or i8 %0, %x + store i8 %or3, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_unsigned_char_and_index5(i8* nocapture %p, i8 zeroext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}&={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i8* %p, i32 5 + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %and3 = and i8 %0, %x + store i8 %and3, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_unsigned_char_clrbit_index5(i8* nocapture %p) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}={{ *}}clrbit({{ *}}#5{{ *}}) + %add.ptr = getelementptr inbounds i8* %p, i32 5 + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %conv = zext i8 %0 to i32 + %and = and i32 %conv, 223 + %conv1 = trunc i32 %and to i8 + store i8 %conv1, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_unsigned_char_setbit_index5(i8* nocapture %p) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}={{ *}}setbit({{ *}}#7{{ *}}) + %add.ptr = getelementptr inbounds i8* %p, i32 5 + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %conv = zext i8 %0 to i32 + %or = or i32 %conv, 128 + %conv1 = trunc i32 %or to i8 + store i8 %conv1, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_signed_char_add5(i8* nocapture %p) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5 + %0 = load i8* %p, align 1, !tbaa !0 + %conv2 = zext i8 %0 to i32 + %add = add nsw i32 %conv2, 5 + %conv1 = trunc i32 %add to i8 + store i8 %conv1, i8* %p, align 1, !tbaa !0 + ret void +} + +define void @memop_signed_char_add(i8* nocapture %p, i8 signext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}} + %conv4 = zext i8 %x to i32 + %0 = load i8* %p, align 1, !tbaa !0 + %conv13 = zext i8 %0 to i32 + %add = add nsw i32 %conv13, %conv4 + %conv2 = trunc i32 %add to i8 + store i8 %conv2, i8* %p, align 1, !tbaa !0 + ret void +} + +define void @memop_signed_char_sub(i8* nocapture %p, i8 signext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}} + %conv4 = zext i8 %x to i32 + %0 = load i8* %p, align 1, !tbaa !0 + %conv13 = zext i8 %0 to i32 + %sub = sub nsw i32 %conv13, %conv4 + %conv2 = trunc i32 %sub to i8 + store i8 %conv2, i8* %p, align 1, !tbaa !0 + ret void +} + +define void @memop_signed_char_or(i8* nocapture %p, i8 signext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}} + %0 = load i8* %p, align 1, !tbaa !0 + %or3 = or i8 %0, %x + store i8 %or3, i8* %p, align 1, !tbaa !0 + ret void +} + +define void @memop_signed_char_and(i8* nocapture %p, i8 signext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}} + %0 = load i8* %p, align 1, !tbaa !0 + %and3 = and i8 %0, %x + store i8 %and3, i8* %p, align 1, !tbaa !0 + ret void +} + +define void @memop_signed_char_clrbit(i8* nocapture %p) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}}) + %0 = load i8* %p, align 1, !tbaa !0 + %conv2 = zext i8 %0 to i32 + %and = and i32 %conv2, 223 + %conv1 = trunc i32 %and to i8 + store i8 %conv1, i8* %p, align 1, !tbaa !0 + ret void +} + +define void @memop_signed_char_setbit(i8* nocapture %p) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}}) + %0 = load i8* %p, align 1, !tbaa !0 + %conv2 = zext i8 %0 to i32 + %or = or i32 %conv2, 128 + %conv1 = trunc i32 %or to i8 + store i8 %conv1, i8* %p, align 1, !tbaa !0 + ret void +} + +define void @memop_signed_char_add5_index(i8* nocapture %p, i32 %i) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5 + %add.ptr = getelementptr inbounds i8* %p, i32 %i + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %conv2 = zext i8 %0 to i32 + %add = add nsw i32 %conv2, 5 + %conv1 = trunc i32 %add to i8 + store i8 %conv1, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_signed_char_add_index(i8* nocapture %p, i32 %i, i8 signext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}} + %conv4 = zext i8 %x to i32 + %add.ptr = getelementptr inbounds i8* %p, i32 %i + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %conv13 = zext i8 %0 to i32 + %add = add nsw i32 %conv13, %conv4 + %conv2 = trunc i32 %add to i8 + store i8 %conv2, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_signed_char_sub_index(i8* nocapture %p, i32 %i, i8 signext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}} + %conv4 = zext i8 %x to i32 + %add.ptr = getelementptr inbounds i8* %p, i32 %i + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %conv13 = zext i8 %0 to i32 + %sub = sub nsw i32 %conv13, %conv4 + %conv2 = trunc i32 %sub to i8 + store i8 %conv2, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_signed_char_or_index(i8* nocapture %p, i32 %i, i8 signext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i8* %p, i32 %i + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %or3 = or i8 %0, %x + store i8 %or3, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_signed_char_and_index(i8* nocapture %p, i32 %i, i8 signext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i8* %p, i32 %i + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %and3 = and i8 %0, %x + store i8 %and3, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_signed_char_clrbit_index(i8* nocapture %p, i32 %i) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}}) + %add.ptr = getelementptr inbounds i8* %p, i32 %i + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %conv2 = zext i8 %0 to i32 + %and = and i32 %conv2, 223 + %conv1 = trunc i32 %and to i8 + store i8 %conv1, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_signed_char_setbit_index(i8* nocapture %p, i32 %i) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}}) + %add.ptr = getelementptr inbounds i8* %p, i32 %i + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %conv2 = zext i8 %0 to i32 + %or = or i32 %conv2, 128 + %conv1 = trunc i32 %or to i8 + store i8 %conv1, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_signed_char_add5_index5(i8* nocapture %p) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}+={{ *}}#5 + %add.ptr = getelementptr inbounds i8* %p, i32 5 + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %conv2 = zext i8 %0 to i32 + %add = add nsw i32 %conv2, 5 + %conv1 = trunc i32 %add to i8 + store i8 %conv1, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_signed_char_add_index5(i8* nocapture %p, i8 signext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}+={{ *}}r{{[0-9]+}} + %conv4 = zext i8 %x to i32 + %add.ptr = getelementptr inbounds i8* %p, i32 5 + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %conv13 = zext i8 %0 to i32 + %add = add nsw i32 %conv13, %conv4 + %conv2 = trunc i32 %add to i8 + store i8 %conv2, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_signed_char_sub_index5(i8* nocapture %p, i8 signext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}-={{ *}}r{{[0-9]+}} + %conv4 = zext i8 %x to i32 + %add.ptr = getelementptr inbounds i8* %p, i32 5 + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %conv13 = zext i8 %0 to i32 + %sub = sub nsw i32 %conv13, %conv4 + %conv2 = trunc i32 %sub to i8 + store i8 %conv2, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_signed_char_or_index5(i8* nocapture %p, i8 signext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}|={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i8* %p, i32 5 + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %or3 = or i8 %0, %x + store i8 %or3, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_signed_char_and_index5(i8* nocapture %p, i8 signext %x) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}&={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i8* %p, i32 5 + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %and3 = and i8 %0, %x + store i8 %and3, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_signed_char_clrbit_index5(i8* nocapture %p) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}={{ *}}clrbit({{ *}}#5{{ *}}) + %add.ptr = getelementptr inbounds i8* %p, i32 5 + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %conv2 = zext i8 %0 to i32 + %and = and i32 %conv2, 223 + %conv1 = trunc i32 %and to i8 + store i8 %conv1, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_signed_char_setbit_index5(i8* nocapture %p) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#5){{ *}}={{ *}}setbit({{ *}}#7{{ *}}) + %add.ptr = getelementptr inbounds i8* %p, i32 5 + %0 = load i8* %add.ptr, align 1, !tbaa !0 + %conv2 = zext i8 %0 to i32 + %or = or i32 %conv2, 128 + %conv1 = trunc i32 %or to i8 + store i8 %conv1, i8* %add.ptr, align 1, !tbaa !0 + ret void +} + +define void @memop_unsigned_short_add5(i16* nocapture %p) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5 + %0 = load i16* %p, align 2, !tbaa !2 + %conv = zext i16 %0 to i32 + %add = add nsw i32 %conv, 5 + %conv1 = trunc i32 %add to i16 + store i16 %conv1, i16* %p, align 2, !tbaa !2 + ret void +} + +define void @memop_unsigned_short_add(i16* nocapture %p, i16 zeroext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}} + %conv = zext i16 %x to i32 + %0 = load i16* %p, align 2, !tbaa !2 + %conv1 = zext i16 %0 to i32 + %add = add nsw i32 %conv1, %conv + %conv2 = trunc i32 %add to i16 + store i16 %conv2, i16* %p, align 2, !tbaa !2 + ret void +} + +define void @memop_unsigned_short_sub(i16* nocapture %p, i16 zeroext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}} + %conv = zext i16 %x to i32 + %0 = load i16* %p, align 2, !tbaa !2 + %conv1 = zext i16 %0 to i32 + %sub = sub nsw i32 %conv1, %conv + %conv2 = trunc i32 %sub to i16 + store i16 %conv2, i16* %p, align 2, !tbaa !2 + ret void +} + +define void @memop_unsigned_short_or(i16* nocapture %p, i16 zeroext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}} + %0 = load i16* %p, align 2, !tbaa !2 + %or3 = or i16 %0, %x + store i16 %or3, i16* %p, align 2, !tbaa !2 + ret void +} + +define void @memop_unsigned_short_and(i16* nocapture %p, i16 zeroext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}} + %0 = load i16* %p, align 2, !tbaa !2 + %and3 = and i16 %0, %x + store i16 %and3, i16* %p, align 2, !tbaa !2 + ret void +} + +define void @memop_unsigned_short_clrbit(i16* nocapture %p) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}}) + %0 = load i16* %p, align 2, !tbaa !2 + %conv = zext i16 %0 to i32 + %and = and i32 %conv, 65503 + %conv1 = trunc i32 %and to i16 + store i16 %conv1, i16* %p, align 2, !tbaa !2 + ret void +} + +define void @memop_unsigned_short_setbit(i16* nocapture %p) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}}) + %0 = load i16* %p, align 2, !tbaa !2 + %conv = zext i16 %0 to i32 + %or = or i32 %conv, 128 + %conv1 = trunc i32 %or to i16 + store i16 %conv1, i16* %p, align 2, !tbaa !2 + ret void +} + +define void @memop_unsigned_short_add5_index(i16* nocapture %p, i32 %i) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5 + %add.ptr = getelementptr inbounds i16* %p, i32 %i + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %conv = zext i16 %0 to i32 + %add = add nsw i32 %conv, 5 + %conv1 = trunc i32 %add to i16 + store i16 %conv1, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_unsigned_short_add_index(i16* nocapture %p, i32 %i, i16 zeroext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}} + %conv = zext i16 %x to i32 + %add.ptr = getelementptr inbounds i16* %p, i32 %i + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %conv1 = zext i16 %0 to i32 + %add = add nsw i32 %conv1, %conv + %conv2 = trunc i32 %add to i16 + store i16 %conv2, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_unsigned_short_sub_index(i16* nocapture %p, i32 %i, i16 zeroext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}} + %conv = zext i16 %x to i32 + %add.ptr = getelementptr inbounds i16* %p, i32 %i + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %conv1 = zext i16 %0 to i32 + %sub = sub nsw i32 %conv1, %conv + %conv2 = trunc i32 %sub to i16 + store i16 %conv2, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_unsigned_short_or_index(i16* nocapture %p, i32 %i, i16 zeroext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i16* %p, i32 %i + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %or3 = or i16 %0, %x + store i16 %or3, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_unsigned_short_and_index(i16* nocapture %p, i32 %i, i16 zeroext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i16* %p, i32 %i + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %and3 = and i16 %0, %x + store i16 %and3, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_unsigned_short_clrbit_index(i16* nocapture %p, i32 %i) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}}) + %add.ptr = getelementptr inbounds i16* %p, i32 %i + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %conv = zext i16 %0 to i32 + %and = and i32 %conv, 65503 + %conv1 = trunc i32 %and to i16 + store i16 %conv1, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_unsigned_short_setbit_index(i16* nocapture %p, i32 %i) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}}) + %add.ptr = getelementptr inbounds i16* %p, i32 %i + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %conv = zext i16 %0 to i32 + %or = or i32 %conv, 128 + %conv1 = trunc i32 %or to i16 + store i16 %conv1, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_unsigned_short_add5_index5(i16* nocapture %p) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}+={{ *}}#5 + %add.ptr = getelementptr inbounds i16* %p, i32 5 + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %conv = zext i16 %0 to i32 + %add = add nsw i32 %conv, 5 + %conv1 = trunc i32 %add to i16 + store i16 %conv1, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_unsigned_short_add_index5(i16* nocapture %p, i16 zeroext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}+={{ *}}r{{[0-9]+}} + %conv = zext i16 %x to i32 + %add.ptr = getelementptr inbounds i16* %p, i32 5 + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %conv1 = zext i16 %0 to i32 + %add = add nsw i32 %conv1, %conv + %conv2 = trunc i32 %add to i16 + store i16 %conv2, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_unsigned_short_sub_index5(i16* nocapture %p, i16 zeroext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}-={{ *}}r{{[0-9]+}} + %conv = zext i16 %x to i32 + %add.ptr = getelementptr inbounds i16* %p, i32 5 + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %conv1 = zext i16 %0 to i32 + %sub = sub nsw i32 %conv1, %conv + %conv2 = trunc i32 %sub to i16 + store i16 %conv2, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_unsigned_short_or_index5(i16* nocapture %p, i16 zeroext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}|={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i16* %p, i32 5 + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %or3 = or i16 %0, %x + store i16 %or3, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_unsigned_short_and_index5(i16* nocapture %p, i16 zeroext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}&={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i16* %p, i32 5 + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %and3 = and i16 %0, %x + store i16 %and3, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_unsigned_short_clrbit_index5(i16* nocapture %p) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}={{ *}}clrbit({{ *}}#5{{ *}}) + %add.ptr = getelementptr inbounds i16* %p, i32 5 + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %conv = zext i16 %0 to i32 + %and = and i32 %conv, 65503 + %conv1 = trunc i32 %and to i16 + store i16 %conv1, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_unsigned_short_setbit_index5(i16* nocapture %p) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}={{ *}}setbit({{ *}}#7{{ *}}) + %add.ptr = getelementptr inbounds i16* %p, i32 5 + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %conv = zext i16 %0 to i32 + %or = or i32 %conv, 128 + %conv1 = trunc i32 %or to i16 + store i16 %conv1, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_signed_short_add5(i16* nocapture %p) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5 + %0 = load i16* %p, align 2, !tbaa !2 + %conv2 = zext i16 %0 to i32 + %add = add nsw i32 %conv2, 5 + %conv1 = trunc i32 %add to i16 + store i16 %conv1, i16* %p, align 2, !tbaa !2 + ret void +} + +define void @memop_signed_short_add(i16* nocapture %p, i16 signext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}} + %conv4 = zext i16 %x to i32 + %0 = load i16* %p, align 2, !tbaa !2 + %conv13 = zext i16 %0 to i32 + %add = add nsw i32 %conv13, %conv4 + %conv2 = trunc i32 %add to i16 + store i16 %conv2, i16* %p, align 2, !tbaa !2 + ret void +} + +define void @memop_signed_short_sub(i16* nocapture %p, i16 signext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}} + %conv4 = zext i16 %x to i32 + %0 = load i16* %p, align 2, !tbaa !2 + %conv13 = zext i16 %0 to i32 + %sub = sub nsw i32 %conv13, %conv4 + %conv2 = trunc i32 %sub to i16 + store i16 %conv2, i16* %p, align 2, !tbaa !2 + ret void +} + +define void @memop_signed_short_or(i16* nocapture %p, i16 signext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}} + %0 = load i16* %p, align 2, !tbaa !2 + %or3 = or i16 %0, %x + store i16 %or3, i16* %p, align 2, !tbaa !2 + ret void +} + +define void @memop_signed_short_and(i16* nocapture %p, i16 signext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}} + %0 = load i16* %p, align 2, !tbaa !2 + %and3 = and i16 %0, %x + store i16 %and3, i16* %p, align 2, !tbaa !2 + ret void +} + +define void @memop_signed_short_clrbit(i16* nocapture %p) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}}) + %0 = load i16* %p, align 2, !tbaa !2 + %conv2 = zext i16 %0 to i32 + %and = and i32 %conv2, 65503 + %conv1 = trunc i32 %and to i16 + store i16 %conv1, i16* %p, align 2, !tbaa !2 + ret void +} + +define void @memop_signed_short_setbit(i16* nocapture %p) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}}) + %0 = load i16* %p, align 2, !tbaa !2 + %conv2 = zext i16 %0 to i32 + %or = or i32 %conv2, 128 + %conv1 = trunc i32 %or to i16 + store i16 %conv1, i16* %p, align 2, !tbaa !2 + ret void +} + +define void @memop_signed_short_add5_index(i16* nocapture %p, i32 %i) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5 + %add.ptr = getelementptr inbounds i16* %p, i32 %i + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %conv2 = zext i16 %0 to i32 + %add = add nsw i32 %conv2, 5 + %conv1 = trunc i32 %add to i16 + store i16 %conv1, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_signed_short_add_index(i16* nocapture %p, i32 %i, i16 signext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}} + %conv4 = zext i16 %x to i32 + %add.ptr = getelementptr inbounds i16* %p, i32 %i + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %conv13 = zext i16 %0 to i32 + %add = add nsw i32 %conv13, %conv4 + %conv2 = trunc i32 %add to i16 + store i16 %conv2, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_signed_short_sub_index(i16* nocapture %p, i32 %i, i16 signext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}} + %conv4 = zext i16 %x to i32 + %add.ptr = getelementptr inbounds i16* %p, i32 %i + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %conv13 = zext i16 %0 to i32 + %sub = sub nsw i32 %conv13, %conv4 + %conv2 = trunc i32 %sub to i16 + store i16 %conv2, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_signed_short_or_index(i16* nocapture %p, i32 %i, i16 signext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i16* %p, i32 %i + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %or3 = or i16 %0, %x + store i16 %or3, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_signed_short_and_index(i16* nocapture %p, i32 %i, i16 signext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i16* %p, i32 %i + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %and3 = and i16 %0, %x + store i16 %and3, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_signed_short_clrbit_index(i16* nocapture %p, i32 %i) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}}) + %add.ptr = getelementptr inbounds i16* %p, i32 %i + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %conv2 = zext i16 %0 to i32 + %and = and i32 %conv2, 65503 + %conv1 = trunc i32 %and to i16 + store i16 %conv1, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_signed_short_setbit_index(i16* nocapture %p, i32 %i) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}}) + %add.ptr = getelementptr inbounds i16* %p, i32 %i + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %conv2 = zext i16 %0 to i32 + %or = or i32 %conv2, 128 + %conv1 = trunc i32 %or to i16 + store i16 %conv1, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_signed_short_add5_index5(i16* nocapture %p) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}+={{ *}}#5 + %add.ptr = getelementptr inbounds i16* %p, i32 5 + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %conv2 = zext i16 %0 to i32 + %add = add nsw i32 %conv2, 5 + %conv1 = trunc i32 %add to i16 + store i16 %conv1, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_signed_short_add_index5(i16* nocapture %p, i16 signext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}+={{ *}}r{{[0-9]+}} + %conv4 = zext i16 %x to i32 + %add.ptr = getelementptr inbounds i16* %p, i32 5 + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %conv13 = zext i16 %0 to i32 + %add = add nsw i32 %conv13, %conv4 + %conv2 = trunc i32 %add to i16 + store i16 %conv2, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_signed_short_sub_index5(i16* nocapture %p, i16 signext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}-={{ *}}r{{[0-9]+}} + %conv4 = zext i16 %x to i32 + %add.ptr = getelementptr inbounds i16* %p, i32 5 + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %conv13 = zext i16 %0 to i32 + %sub = sub nsw i32 %conv13, %conv4 + %conv2 = trunc i32 %sub to i16 + store i16 %conv2, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_signed_short_or_index5(i16* nocapture %p, i16 signext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}|={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i16* %p, i32 5 + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %or3 = or i16 %0, %x + store i16 %or3, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_signed_short_and_index5(i16* nocapture %p, i16 signext %x) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}&={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i16* %p, i32 5 + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %and3 = and i16 %0, %x + store i16 %and3, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_signed_short_clrbit_index5(i16* nocapture %p) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}={{ *}}clrbit({{ *}}#5{{ *}}) + %add.ptr = getelementptr inbounds i16* %p, i32 5 + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %conv2 = zext i16 %0 to i32 + %and = and i32 %conv2, 65503 + %conv1 = trunc i32 %and to i16 + store i16 %conv1, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_signed_short_setbit_index5(i16* nocapture %p) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}={{ *}}setbit({{ *}}#7{{ *}}) + %add.ptr = getelementptr inbounds i16* %p, i32 5 + %0 = load i16* %add.ptr, align 2, !tbaa !2 + %conv2 = zext i16 %0 to i32 + %or = or i32 %conv2, 128 + %conv1 = trunc i32 %or to i16 + store i16 %conv1, i16* %add.ptr, align 2, !tbaa !2 + ret void +} + +define void @memop_signed_int_add5(i32* nocapture %p) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5 + %0 = load i32* %p, align 4, !tbaa !3 + %add = add i32 %0, 5 + store i32 %add, i32* %p, align 4, !tbaa !3 + ret void +} + +define void @memop_signed_int_add(i32* nocapture %p, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}} + %0 = load i32* %p, align 4, !tbaa !3 + %add = add i32 %0, %x + store i32 %add, i32* %p, align 4, !tbaa !3 + ret void +} + +define void @memop_signed_int_sub(i32* nocapture %p, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}} + %0 = load i32* %p, align 4, !tbaa !3 + %sub = sub i32 %0, %x + store i32 %sub, i32* %p, align 4, !tbaa !3 + ret void +} + +define void @memop_signed_int_or(i32* nocapture %p, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}} + %0 = load i32* %p, align 4, !tbaa !3 + %or = or i32 %0, %x + store i32 %or, i32* %p, align 4, !tbaa !3 + ret void +} + +define void @memop_signed_int_and(i32* nocapture %p, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}} + %0 = load i32* %p, align 4, !tbaa !3 + %and = and i32 %0, %x + store i32 %and, i32* %p, align 4, !tbaa !3 + ret void +} + +define void @memop_signed_int_clrbit(i32* nocapture %p) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}}) + %0 = load i32* %p, align 4, !tbaa !3 + %and = and i32 %0, -33 + store i32 %and, i32* %p, align 4, !tbaa !3 + ret void +} + +define void @memop_signed_int_setbit(i32* nocapture %p) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}}) + %0 = load i32* %p, align 4, !tbaa !3 + %or = or i32 %0, 128 + store i32 %or, i32* %p, align 4, !tbaa !3 + ret void +} + +define void @memop_signed_int_add5_index(i32* nocapture %p, i32 %i) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5 + %add.ptr = getelementptr inbounds i32* %p, i32 %i + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %add = add i32 %0, 5 + store i32 %add, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_signed_int_add_index(i32* nocapture %p, i32 %i, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i32* %p, i32 %i + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %add = add i32 %0, %x + store i32 %add, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_signed_int_sub_index(i32* nocapture %p, i32 %i, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i32* %p, i32 %i + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %sub = sub i32 %0, %x + store i32 %sub, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_signed_int_or_index(i32* nocapture %p, i32 %i, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i32* %p, i32 %i + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %or = or i32 %0, %x + store i32 %or, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_signed_int_and_index(i32* nocapture %p, i32 %i, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i32* %p, i32 %i + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %and = and i32 %0, %x + store i32 %and, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_signed_int_clrbit_index(i32* nocapture %p, i32 %i) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}}) + %add.ptr = getelementptr inbounds i32* %p, i32 %i + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %and = and i32 %0, -33 + store i32 %and, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_signed_int_setbit_index(i32* nocapture %p, i32 %i) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}}) + %add.ptr = getelementptr inbounds i32* %p, i32 %i + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %or = or i32 %0, 128 + store i32 %or, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_signed_int_add5_index5(i32* nocapture %p) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}+={{ *}}#5 + %add.ptr = getelementptr inbounds i32* %p, i32 5 + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %add = add i32 %0, 5 + store i32 %add, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_signed_int_add_index5(i32* nocapture %p, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}+={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i32* %p, i32 5 + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %add = add i32 %0, %x + store i32 %add, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_signed_int_sub_index5(i32* nocapture %p, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}-={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i32* %p, i32 5 + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %sub = sub i32 %0, %x + store i32 %sub, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_signed_int_or_index5(i32* nocapture %p, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}|={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i32* %p, i32 5 + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %or = or i32 %0, %x + store i32 %or, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_signed_int_and_index5(i32* nocapture %p, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}&={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i32* %p, i32 5 + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %and = and i32 %0, %x + store i32 %and, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_signed_int_clrbit_index5(i32* nocapture %p) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}={{ *}}clrbit({{ *}}#5{{ *}}) + %add.ptr = getelementptr inbounds i32* %p, i32 5 + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %and = and i32 %0, -33 + store i32 %and, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_signed_int_setbit_index5(i32* nocapture %p) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}={{ *}}setbit({{ *}}#7{{ *}}) + %add.ptr = getelementptr inbounds i32* %p, i32 5 + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %or = or i32 %0, 128 + store i32 %or, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_unsigned_int_add5(i32* nocapture %p) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5 + %0 = load i32* %p, align 4, !tbaa !3 + %add = add nsw i32 %0, 5 + store i32 %add, i32* %p, align 4, !tbaa !3 + ret void +} + +define void @memop_unsigned_int_add(i32* nocapture %p, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}} + %0 = load i32* %p, align 4, !tbaa !3 + %add = add nsw i32 %0, %x + store i32 %add, i32* %p, align 4, !tbaa !3 + ret void +} + +define void @memop_unsigned_int_sub(i32* nocapture %p, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}} + %0 = load i32* %p, align 4, !tbaa !3 + %sub = sub nsw i32 %0, %x + store i32 %sub, i32* %p, align 4, !tbaa !3 + ret void +} + +define void @memop_unsigned_int_or(i32* nocapture %p, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}} + %0 = load i32* %p, align 4, !tbaa !3 + %or = or i32 %0, %x + store i32 %or, i32* %p, align 4, !tbaa !3 + ret void +} + +define void @memop_unsigned_int_and(i32* nocapture %p, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}} + %0 = load i32* %p, align 4, !tbaa !3 + %and = and i32 %0, %x + store i32 %and, i32* %p, align 4, !tbaa !3 + ret void +} + +define void @memop_unsigned_int_clrbit(i32* nocapture %p) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}}) + %0 = load i32* %p, align 4, !tbaa !3 + %and = and i32 %0, -33 + store i32 %and, i32* %p, align 4, !tbaa !3 + ret void +} + +define void @memop_unsigned_int_setbit(i32* nocapture %p) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}}) + %0 = load i32* %p, align 4, !tbaa !3 + %or = or i32 %0, 128 + store i32 %or, i32* %p, align 4, !tbaa !3 + ret void +} + +define void @memop_unsigned_int_add5_index(i32* nocapture %p, i32 %i) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}#5 + %add.ptr = getelementptr inbounds i32* %p, i32 %i + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %add = add nsw i32 %0, 5 + store i32 %add, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_unsigned_int_add_index(i32* nocapture %p, i32 %i, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}+={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i32* %p, i32 %i + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %add = add nsw i32 %0, %x + store i32 %add, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_unsigned_int_sub_index(i32* nocapture %p, i32 %i, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}-={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i32* %p, i32 %i + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %sub = sub nsw i32 %0, %x + store i32 %sub, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_unsigned_int_or_index(i32* nocapture %p, i32 %i, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}|={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i32* %p, i32 %i + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %or = or i32 %0, %x + store i32 %or, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_unsigned_int_and_index(i32* nocapture %p, i32 %i, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}&={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i32* %p, i32 %i + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %and = and i32 %0, %x + store i32 %and, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_unsigned_int_clrbit_index(i32* nocapture %p, i32 %i) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}clrbit({{ *}}#5{{ *}}) + %add.ptr = getelementptr inbounds i32* %p, i32 %i + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %and = and i32 %0, -33 + store i32 %and, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_unsigned_int_setbit_index(i32* nocapture %p, i32 %i) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#0){{ *}}={{ *}}setbit({{ *}}#7{{ *}}) + %add.ptr = getelementptr inbounds i32* %p, i32 %i + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %or = or i32 %0, 128 + store i32 %or, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_unsigned_int_add5_index5(i32* nocapture %p) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}+={{ *}}#5 + %add.ptr = getelementptr inbounds i32* %p, i32 5 + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %add = add nsw i32 %0, 5 + store i32 %add, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_unsigned_int_add_index5(i32* nocapture %p, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}+={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i32* %p, i32 5 + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %add = add nsw i32 %0, %x + store i32 %add, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_unsigned_int_sub_index5(i32* nocapture %p, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}-={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i32* %p, i32 5 + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %sub = sub nsw i32 %0, %x + store i32 %sub, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_unsigned_int_or_index5(i32* nocapture %p, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}|={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i32* %p, i32 5 + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %or = or i32 %0, %x + store i32 %or, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_unsigned_int_and_index5(i32* nocapture %p, i32 %x) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}&={{ *}}r{{[0-9]+}} + %add.ptr = getelementptr inbounds i32* %p, i32 5 + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %and = and i32 %0, %x + store i32 %and, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_unsigned_int_clrbit_index5(i32* nocapture %p) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}={{ *}}clrbit({{ *}}#5{{ *}}) + %add.ptr = getelementptr inbounds i32* %p, i32 5 + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %and = and i32 %0, -33 + store i32 %and, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +define void @memop_unsigned_int_setbit_index5(i32* nocapture %p) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}={{ *}}setbit({{ *}}#7{{ *}}) + %add.ptr = getelementptr inbounds i32* %p, i32 5 + %0 = load i32* %add.ptr, align 4, !tbaa !3 + %or = or i32 %0, 128 + store i32 %or, i32* %add.ptr, align 4, !tbaa !3 + ret void +} + +!0 = metadata !{metadata !"omnipotent char", metadata !1} +!1 = metadata !{metadata !"Simple C/C++ TBAA"} +!2 = metadata !{metadata !"short", metadata !0} +!3 = metadata !{metadata !"int", metadata !0} diff --git a/test/CodeGen/Hexagon/memops1.ll b/test/CodeGen/Hexagon/memops1.ll new file mode 100644 index 0000000..2babdc8 --- /dev/null +++ b/test/CodeGen/Hexagon/memops1.ll @@ -0,0 +1,33 @@ +; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s +; Generate MemOps for V4 and above. + + +define void @f(i32* %p) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#40){{ *}}-={{ *}}#1 + %p.addr = alloca i32*, align 4 + store i32* %p, i32** %p.addr, align 4 + %0 = load i32** %p.addr, align 4 + %add.ptr = getelementptr inbounds i32* %0, i32 10 + %1 = load i32* %add.ptr, align 4 + %sub = sub nsw i32 %1, 1 + store i32 %sub, i32* %add.ptr, align 4 + ret void +} + +define void @g(i32* %p, i32 %i) nounwind { +entry: +; CHECK: memw(r{{[0-9]+}}{{ *}}+{{ *}}#40){{ *}}-={{ *}}#1 + %p.addr = alloca i32*, align 4 + %i.addr = alloca i32, align 4 + store i32* %p, i32** %p.addr, align 4 + store i32 %i, i32* %i.addr, align 4 + %0 = load i32** %p.addr, align 4 + %1 = load i32* %i.addr, align 4 + %add.ptr = getelementptr inbounds i32* %0, i32 %1 + %add.ptr1 = getelementptr inbounds i32* %add.ptr, i32 10 + %2 = load i32* %add.ptr1, align 4 + %sub = sub nsw i32 %2, 1 + store i32 %sub, i32* %add.ptr1, align 4 + ret void +} diff --git a/test/CodeGen/Hexagon/memops2.ll b/test/CodeGen/Hexagon/memops2.ll new file mode 100644 index 0000000..d6d1a50 --- /dev/null +++ b/test/CodeGen/Hexagon/memops2.ll @@ -0,0 +1,28 @@ +; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s +; Generate MemOps for V4 and above. + + +define void @f(i16* nocapture %p) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}-={{ *}}#1 + %add.ptr = getelementptr inbounds i16* %p, i32 10 + %0 = load i16* %add.ptr, align 2 + %conv2 = zext i16 %0 to i32 + %sub = add nsw i32 %conv2, 65535 + %conv1 = trunc i32 %sub to i16 + store i16 %conv1, i16* %add.ptr, align 2 + ret void +} + +define void @g(i16* nocapture %p, i32 %i) nounwind { +entry: +; CHECK: memh(r{{[0-9]+}}{{ *}}+{{ *}}#20){{ *}}-={{ *}}#1 + %add.ptr.sum = add i32 %i, 10 + %add.ptr1 = getelementptr inbounds i16* %p, i32 %add.ptr.sum + %0 = load i16* %add.ptr1, align 2 + %conv3 = zext i16 %0 to i32 + %sub = add nsw i32 %conv3, 65535 + %conv2 = trunc i32 %sub to i16 + store i16 %conv2, i16* %add.ptr1, align 2 + ret void +} diff --git a/test/CodeGen/Hexagon/memops3.ll b/test/CodeGen/Hexagon/memops3.ll new file mode 100644 index 0000000..d9e4e8f --- /dev/null +++ b/test/CodeGen/Hexagon/memops3.ll @@ -0,0 +1,28 @@ +; RUN: llc -march=hexagon -mcpu=hexagonv5 < %s | FileCheck %s +; Generate MemOps for V4 and above. + + +define void @f(i8* nocapture %p) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}-={{ *}}#1 + %add.ptr = getelementptr inbounds i8* %p, i32 10 + %0 = load i8* %add.ptr, align 1 + %conv = zext i8 %0 to i32 + %sub = add nsw i32 %conv, 255 + %conv1 = trunc i32 %sub to i8 + store i8 %conv1, i8* %add.ptr, align 1 + ret void +} + +define void @g(i8* nocapture %p, i32 %i) nounwind { +entry: +; CHECK: memb(r{{[0-9]+}}{{ *}}+{{ *}}#10){{ *}}-={{ *}}#1 + %add.ptr.sum = add i32 %i, 10 + %add.ptr1 = getelementptr inbounds i8* %p, i32 %add.ptr.sum + %0 = load i8* %add.ptr1, align 1 + %conv = zext i8 %0 to i32 + %sub = add nsw i32 %conv, 255 + %conv2 = trunc i32 %sub to i8 + store i8 %conv2, i8* %add.ptr1, align 1 + ret void +} diff --git a/test/CodeGen/Hexagon/remove_lsr.ll b/test/CodeGen/Hexagon/remove_lsr.ll index 79b5f4a..3128dbb 100644 --- a/test/CodeGen/Hexagon/remove_lsr.ll +++ b/test/CodeGen/Hexagon/remove_lsr.ll @@ -46,17 +46,17 @@ for.body: ; preds = %for.body, %entry %1 = trunc i64 %val.021 to i32 %2 = trunc i64 %0 to i32 %3 = tail call i32 @llvm.hexagon.C2.mux(i32 %conv3, i32 %1, i32 %2) - store i32 %3, i32* %lsr.iv3335, align 4, !tbaa !0 + store i32 %3, i32* %lsr.iv3335, align 4 %conv8 = sext i8 %predicate_1.023 to i32 %4 = lshr i64 %val.021, 32 %5 = trunc i64 %4 to i32 %6 = lshr i64 %0, 32 %7 = trunc i64 %6 to i32 %8 = tail call i32 @llvm.hexagon.C2.mux(i32 %conv8, i32 %5, i32 %7) - store i32 %8, i32* %lsr.iv2931, align 4, !tbaa !0 + store i32 %8, i32* %lsr.iv2931, align 4 %srcval = load i64* %lsr.iv27, align 8 - %9 = load i8* %lsr.iv40, align 1, !tbaa !1 - %10 = load i8* %lsr.iv37, align 1, !tbaa !1 + %9 = load i8* %lsr.iv40, align 1 + %10 = load i8* %lsr.iv37, align 1 %lftr.wideiv = trunc i32 %lsr.iv42 to i8 %exitcond = icmp eq i8 %lftr.wideiv, 32 %scevgep26 = getelementptr %union.vect64* %lsr.iv, i32 1 @@ -74,7 +74,3 @@ for.end: ; preds = %for.body declare i64 @llvm.hexagon.A2.vsubhs(i64, i64) nounwind readnone declare i32 @llvm.hexagon.C2.mux(i32, i32, i32) nounwind readnone - -!0 = metadata !{metadata !"long", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/Hexagon/union-1.ll b/test/CodeGen/Hexagon/union-1.ll new file mode 100644 index 0000000..7c6da74 --- /dev/null +++ b/test/CodeGen/Hexagon/union-1.ll @@ -0,0 +1,23 @@ +; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; CHECK: word +; CHECK-NOT: combine(#0 +; CHECK: jump bar + +define void @word(i32* nocapture %a) nounwind { +entry: + %0 = load i32* %a, align 4, !tbaa !0 + %1 = zext i32 %0 to i64 + %add.ptr = getelementptr inbounds i32* %a, i32 1 + %2 = load i32* %add.ptr, align 4, !tbaa !0 + %3 = zext i32 %2 to i64 + %4 = shl nuw i64 %3, 32 + %ins = or i64 %4, %1 + tail call void @bar(i64 %ins) nounwind + ret void +} + +declare void @bar(i64) + +!0 = metadata !{metadata !"int", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/Inputs/DbgValueOtherTargets.ll b/test/CodeGen/Inputs/DbgValueOtherTargets.ll index 9308c43..d5162b9 100644 --- a/test/CodeGen/Inputs/DbgValueOtherTargets.ll +++ b/test/CodeGen/Inputs/DbgValueOtherTargets.ll @@ -13,9 +13,9 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!2} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786478, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786473, metadata !12} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 12, metadata !1, metadata !"clang version 2.9 (trunk 120996)", i1 false, metadata !"", i32 0, null, null, metadata !11, null, null} ; [ DW_TAG_compile_unit ] +!2 = metadata !{i32 786449, i32 12, metadata !1, metadata !"clang version 2.9 (trunk 120996)", i1 false, metadata !"", i32 0, null, null, metadata !11, null, null} ; [ DW_TAG_compile_unit ] !3 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] !4 = metadata !{metadata !5} !5 = metadata !{i32 786468, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] diff --git a/test/CodeGen/Mips/alloca.ll b/test/CodeGen/Mips/alloca.ll index d79ea91..fc7ef86 100644 --- a/test/CodeGen/Mips/alloca.ll +++ b/test/CodeGen/Mips/alloca.ll @@ -59,23 +59,23 @@ if.end: ; preds = %if.else, %if.then ; CHECK: lw $25, %call16(printf) %.pre-phi = phi i32* [ %2, %if.else ], [ %.pre, %if.then ] - %tmp7 = load i32* %0, align 4, !tbaa !0 + %tmp7 = load i32* %0, align 4 %arrayidx9 = getelementptr inbounds i8* %tmp1, i32 4 %3 = bitcast i8* %arrayidx9 to i32* - %tmp10 = load i32* %3, align 4, !tbaa !0 + %tmp10 = load i32* %3, align 4 %arrayidx12 = getelementptr inbounds i8* %tmp1, i32 8 %4 = bitcast i8* %arrayidx12 to i32* - %tmp13 = load i32* %4, align 4, !tbaa !0 - %tmp16 = load i32* %.pre-phi, align 4, !tbaa !0 + %tmp13 = load i32* %4, align 4 + %tmp16 = load i32* %.pre-phi, align 4 %arrayidx18 = getelementptr inbounds i8* %tmp1, i32 16 %5 = bitcast i8* %arrayidx18 to i32* - %tmp19 = load i32* %5, align 4, !tbaa !0 + %tmp19 = load i32* %5, align 4 %arrayidx21 = getelementptr inbounds i8* %tmp1, i32 20 %6 = bitcast i8* %arrayidx21 to i32* - %tmp22 = load i32* %6, align 4, !tbaa !0 + %tmp22 = load i32* %6, align 4 %arrayidx24 = getelementptr inbounds i8* %tmp1, i32 24 %7 = bitcast i8* %arrayidx24 to i32* - %tmp25 = load i32* %7, align 4, !tbaa !0 + %tmp25 = load i32* %7, align 4 %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([22 x i8]* @.str, i32 0, i32 0), i32 %tmp7, i32 %tmp10, i32 %tmp13, i32 %tmp16, i32 %tmp19, i32 %tmp22, i32 %tmp25) nounwind ret i32 0 } @@ -83,7 +83,3 @@ if.end: ; preds = %if.else, %if.then declare void @foo3(i32*) declare i32 @printf(i8* nocapture, ...) nounwind - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/Mips/cmov.ll b/test/CodeGen/Mips/cmov.ll index 81925a4..81925a4 100755..100644 --- a/test/CodeGen/Mips/cmov.ll +++ b/test/CodeGen/Mips/cmov.ll diff --git a/test/CodeGen/Mips/divrem.ll b/test/CodeGen/Mips/divrem.ll index 398d1b7..c470d1c 100644 --- a/test/CodeGen/Mips/divrem.ll +++ b/test/CodeGen/Mips/divrem.ll @@ -32,7 +32,7 @@ entry: define i32 @sdivrem1(i32 %a0, i32 %a1, i32* nocapture %r) nounwind { entry: %rem = srem i32 %a0, %a1 - store i32 %rem, i32* %r, align 4, !tbaa !0 + store i32 %rem, i32* %r, align 4 %div = sdiv i32 %a0, %a1 ret i32 %div } @@ -41,11 +41,7 @@ entry: define i32 @udivrem1(i32 %a0, i32 %a1, i32* nocapture %r) nounwind { entry: %rem = urem i32 %a0, %a1 - store i32 %rem, i32* %r, align 4, !tbaa !0 + store i32 %rem, i32* %r, align 4 %div = udiv i32 %a0, %a1 ret i32 %div } - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/Mips/dsp-patterns-cmp-vselect.ll b/test/CodeGen/Mips/dsp-patterns-cmp-vselect.ll new file mode 100644 index 0000000..9f2f066 --- /dev/null +++ b/test/CodeGen/Mips/dsp-patterns-cmp-vselect.ll @@ -0,0 +1,641 @@ +; RUN: llc -march=mips -mattr=dsp < %s | FileCheck %s + +; CHECK: select_v2q15_eq_: +; CHECK: cmp.eq.ph ${{[0-9]+}}, ${{[0-9]+}} +; CHECK: pick.ph ${{[0-9]+}}, $6, $7 + +define { i32 } @select_v2q15_eq_(i32 %a0.coerce, i32 %a1.coerce, i32 %a2.coerce, i32 %a3.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %1 = bitcast i32 %a1.coerce to <2 x i16> + %2 = bitcast i32 %a2.coerce to <2 x i16> + %3 = bitcast i32 %a3.coerce to <2 x i16> + %cmp = icmp eq <2 x i16> %0, %1 + %or = select <2 x i1> %cmp, <2 x i16> %2, <2 x i16> %3 + %4 = bitcast <2 x i16> %or to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: select_v2q15_lt_: +; CHECK: cmp.lt.ph $4, $5 +; CHECK: pick.ph ${{[0-9]+}}, $6, $7 + +define { i32 } @select_v2q15_lt_(i32 %a0.coerce, i32 %a1.coerce, i32 %a2.coerce, i32 %a3.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %1 = bitcast i32 %a1.coerce to <2 x i16> + %2 = bitcast i32 %a2.coerce to <2 x i16> + %3 = bitcast i32 %a3.coerce to <2 x i16> + %cmp = icmp slt <2 x i16> %0, %1 + %or = select <2 x i1> %cmp, <2 x i16> %2, <2 x i16> %3 + %4 = bitcast <2 x i16> %or to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: select_v2q15_le_: +; CHECK: cmp.le.ph $4, $5 +; CHECK: pick.ph ${{[0-9]+}}, $6, $7 + +define { i32 } @select_v2q15_le_(i32 %a0.coerce, i32 %a1.coerce, i32 %a2.coerce, i32 %a3.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %1 = bitcast i32 %a1.coerce to <2 x i16> + %2 = bitcast i32 %a2.coerce to <2 x i16> + %3 = bitcast i32 %a3.coerce to <2 x i16> + %cmp = icmp sle <2 x i16> %0, %1 + %or = select <2 x i1> %cmp, <2 x i16> %2, <2 x i16> %3 + %4 = bitcast <2 x i16> %or to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: select_v2q15_ne_: +; CHECK: cmp.eq.ph ${{[0-9]+}}, ${{[0-9]+}} +; CHECK: pick.ph ${{[0-9]+}}, $7, $6 + +define { i32 } @select_v2q15_ne_(i32 %a0.coerce, i32 %a1.coerce, i32 %a2.coerce, i32 %a3.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %1 = bitcast i32 %a1.coerce to <2 x i16> + %2 = bitcast i32 %a2.coerce to <2 x i16> + %3 = bitcast i32 %a3.coerce to <2 x i16> + %cmp = icmp ne <2 x i16> %0, %1 + %or = select <2 x i1> %cmp, <2 x i16> %2, <2 x i16> %3 + %4 = bitcast <2 x i16> %or to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: select_v2q15_gt_: +; CHECK: cmp.le.ph $4, $5 +; CHECK: pick.ph ${{[0-9]+}}, $7, $6 + +define { i32 } @select_v2q15_gt_(i32 %a0.coerce, i32 %a1.coerce, i32 %a2.coerce, i32 %a3.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %1 = bitcast i32 %a1.coerce to <2 x i16> + %2 = bitcast i32 %a2.coerce to <2 x i16> + %3 = bitcast i32 %a3.coerce to <2 x i16> + %cmp = icmp sgt <2 x i16> %0, %1 + %or = select <2 x i1> %cmp, <2 x i16> %2, <2 x i16> %3 + %4 = bitcast <2 x i16> %or to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: select_v2q15_ge_: +; CHECK: cmp.lt.ph $4, $5 +; CHECK: pick.ph ${{[0-9]+}}, $7, $6 + +define { i32 } @select_v2q15_ge_(i32 %a0.coerce, i32 %a1.coerce, i32 %a2.coerce, i32 %a3.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %1 = bitcast i32 %a1.coerce to <2 x i16> + %2 = bitcast i32 %a2.coerce to <2 x i16> + %3 = bitcast i32 %a3.coerce to <2 x i16> + %cmp = icmp sge <2 x i16> %0, %1 + %or = select <2 x i1> %cmp, <2 x i16> %2, <2 x i16> %3 + %4 = bitcast <2 x i16> %or to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: select_v4ui8_eq_: +; CHECK: cmpu.eq.qb ${{[0-9]+}}, ${{[0-9]+}} +; CHECK: pick.qb ${{[0-9]+}}, $6, $7 + +define { i32 } @select_v4ui8_eq_(i32 %a0.coerce, i32 %a1.coerce, i32 %a2.coerce, i32 %a3.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %1 = bitcast i32 %a1.coerce to <4 x i8> + %2 = bitcast i32 %a2.coerce to <4 x i8> + %3 = bitcast i32 %a3.coerce to <4 x i8> + %cmp = icmp eq <4 x i8> %0, %1 + %or = select <4 x i1> %cmp, <4 x i8> %2, <4 x i8> %3 + %4 = bitcast <4 x i8> %or to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: select_v4ui8_lt_: +; CHECK: cmpu.lt.qb $4, $5 +; CHECK: pick.qb ${{[0-9]+}}, $6, $7 + +define { i32 } @select_v4ui8_lt_(i32 %a0.coerce, i32 %a1.coerce, i32 %a2.coerce, i32 %a3.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %1 = bitcast i32 %a1.coerce to <4 x i8> + %2 = bitcast i32 %a2.coerce to <4 x i8> + %3 = bitcast i32 %a3.coerce to <4 x i8> + %cmp = icmp ult <4 x i8> %0, %1 + %or = select <4 x i1> %cmp, <4 x i8> %2, <4 x i8> %3 + %4 = bitcast <4 x i8> %or to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: select_v4ui8_le_: +; CHECK: cmpu.le.qb $4, $5 +; CHECK: pick.qb ${{[0-9]+}}, $6, $7 + +define { i32 } @select_v4ui8_le_(i32 %a0.coerce, i32 %a1.coerce, i32 %a2.coerce, i32 %a3.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %1 = bitcast i32 %a1.coerce to <4 x i8> + %2 = bitcast i32 %a2.coerce to <4 x i8> + %3 = bitcast i32 %a3.coerce to <4 x i8> + %cmp = icmp ule <4 x i8> %0, %1 + %or = select <4 x i1> %cmp, <4 x i8> %2, <4 x i8> %3 + %4 = bitcast <4 x i8> %or to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: select_v4ui8_ne_: +; CHECK: cmpu.eq.qb ${{[0-9]+}}, ${{[0-9]+}} +; CHECK: pick.qb ${{[0-9]+}}, $7, $6 + +define { i32 } @select_v4ui8_ne_(i32 %a0.coerce, i32 %a1.coerce, i32 %a2.coerce, i32 %a3.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %1 = bitcast i32 %a1.coerce to <4 x i8> + %2 = bitcast i32 %a2.coerce to <4 x i8> + %3 = bitcast i32 %a3.coerce to <4 x i8> + %cmp = icmp ne <4 x i8> %0, %1 + %or = select <4 x i1> %cmp, <4 x i8> %2, <4 x i8> %3 + %4 = bitcast <4 x i8> %or to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: select_v4ui8_gt_: +; CHECK: cmpu.le.qb $4, $5 +; CHECK: pick.qb ${{[0-9]+}}, $7, $6 + +define { i32 } @select_v4ui8_gt_(i32 %a0.coerce, i32 %a1.coerce, i32 %a2.coerce, i32 %a3.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %1 = bitcast i32 %a1.coerce to <4 x i8> + %2 = bitcast i32 %a2.coerce to <4 x i8> + %3 = bitcast i32 %a3.coerce to <4 x i8> + %cmp = icmp ugt <4 x i8> %0, %1 + %or = select <4 x i1> %cmp, <4 x i8> %2, <4 x i8> %3 + %4 = bitcast <4 x i8> %or to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: select_v4ui8_ge_: +; CHECK: cmpu.lt.qb $4, $5 +; CHECK: pick.qb ${{[0-9]+}}, $7, $6 + +define { i32 } @select_v4ui8_ge_(i32 %a0.coerce, i32 %a1.coerce, i32 %a2.coerce, i32 %a3.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %1 = bitcast i32 %a1.coerce to <4 x i8> + %2 = bitcast i32 %a2.coerce to <4 x i8> + %3 = bitcast i32 %a3.coerce to <4 x i8> + %cmp = icmp uge <4 x i8> %0, %1 + %or = select <4 x i1> %cmp, <4 x i8> %2, <4 x i8> %3 + %4 = bitcast <4 x i8> %or to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: select_v2ui16_lt_: +; CHECK-NOT: cmp +; CHECK-NOT: pick + +define { i32 } @select_v2ui16_lt_(i32 %a0.coerce, i32 %a1.coerce, i32 %a2.coerce, i32 %a3.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %1 = bitcast i32 %a1.coerce to <2 x i16> + %2 = bitcast i32 %a2.coerce to <2 x i16> + %3 = bitcast i32 %a3.coerce to <2 x i16> + %cmp = icmp ult <2 x i16> %0, %1 + %or = select <2 x i1> %cmp, <2 x i16> %2, <2 x i16> %3 + %4 = bitcast <2 x i16> %or to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: select_v2ui16_le_: +; CHECK-NOT: cmp +; CHECK-NOT: pick + +define { i32 } @select_v2ui16_le_(i32 %a0.coerce, i32 %a1.coerce, i32 %a2.coerce, i32 %a3.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %1 = bitcast i32 %a1.coerce to <2 x i16> + %2 = bitcast i32 %a2.coerce to <2 x i16> + %3 = bitcast i32 %a3.coerce to <2 x i16> + %cmp = icmp ule <2 x i16> %0, %1 + %or = select <2 x i1> %cmp, <2 x i16> %2, <2 x i16> %3 + %4 = bitcast <2 x i16> %or to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: select_v2ui16_gt_: +; CHECK-NOT: cmp +; CHECK-NOT: pick + +define { i32 } @select_v2ui16_gt_(i32 %a0.coerce, i32 %a1.coerce, i32 %a2.coerce, i32 %a3.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %1 = bitcast i32 %a1.coerce to <2 x i16> + %2 = bitcast i32 %a2.coerce to <2 x i16> + %3 = bitcast i32 %a3.coerce to <2 x i16> + %cmp = icmp ugt <2 x i16> %0, %1 + %or = select <2 x i1> %cmp, <2 x i16> %2, <2 x i16> %3 + %4 = bitcast <2 x i16> %or to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: select_v2ui16_ge_: +; CHECK-NOT: cmp +; CHECK-NOT: pick + +define { i32 } @select_v2ui16_ge_(i32 %a0.coerce, i32 %a1.coerce, i32 %a2.coerce, i32 %a3.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %1 = bitcast i32 %a1.coerce to <2 x i16> + %2 = bitcast i32 %a2.coerce to <2 x i16> + %3 = bitcast i32 %a3.coerce to <2 x i16> + %cmp = icmp uge <2 x i16> %0, %1 + %or = select <2 x i1> %cmp, <2 x i16> %2, <2 x i16> %3 + %4 = bitcast <2 x i16> %or to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: select_v4i8_lt_: +; CHECK-NOT: cmp +; CHECK-NOT: pick + +define { i32 } @select_v4i8_lt_(i32 %a0.coerce, i32 %a1.coerce, i32 %a2.coerce, i32 %a3.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %1 = bitcast i32 %a1.coerce to <4 x i8> + %2 = bitcast i32 %a2.coerce to <4 x i8> + %3 = bitcast i32 %a3.coerce to <4 x i8> + %cmp = icmp slt <4 x i8> %0, %1 + %or = select <4 x i1> %cmp, <4 x i8> %2, <4 x i8> %3 + %4 = bitcast <4 x i8> %or to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: select_v4i8_le_: +; CHECK-NOT: cmp +; CHECK-NOT: pick + +define { i32 } @select_v4i8_le_(i32 %a0.coerce, i32 %a1.coerce, i32 %a2.coerce, i32 %a3.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %1 = bitcast i32 %a1.coerce to <4 x i8> + %2 = bitcast i32 %a2.coerce to <4 x i8> + %3 = bitcast i32 %a3.coerce to <4 x i8> + %cmp = icmp sle <4 x i8> %0, %1 + %or = select <4 x i1> %cmp, <4 x i8> %2, <4 x i8> %3 + %4 = bitcast <4 x i8> %or to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: select_v4i8_gt_: +; CHECK-NOT: cmp +; CHECK-NOT: pick + +define { i32 } @select_v4i8_gt_(i32 %a0.coerce, i32 %a1.coerce, i32 %a2.coerce, i32 %a3.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %1 = bitcast i32 %a1.coerce to <4 x i8> + %2 = bitcast i32 %a2.coerce to <4 x i8> + %3 = bitcast i32 %a3.coerce to <4 x i8> + %cmp = icmp sgt <4 x i8> %0, %1 + %or = select <4 x i1> %cmp, <4 x i8> %2, <4 x i8> %3 + %4 = bitcast <4 x i8> %or to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: select_v4i8_ge_: +; CHECK-NOT: cmp +; CHECK-NOT: pick + +define { i32 } @select_v4i8_ge_(i32 %a0.coerce, i32 %a1.coerce, i32 %a2.coerce, i32 %a3.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %1 = bitcast i32 %a1.coerce to <4 x i8> + %2 = bitcast i32 %a2.coerce to <4 x i8> + %3 = bitcast i32 %a3.coerce to <4 x i8> + %cmp = icmp sge <4 x i8> %0, %1 + %or = select <4 x i1> %cmp, <4 x i8> %2, <4 x i8> %3 + %4 = bitcast <4 x i8> %or to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %4, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: compare_v2q15_eq_: +; CHECK: cmp.eq.ph ${{[0-9]+}}, ${{[0-9]+}} +; CHECK: pick.ph ${{[0-9]+}}, ${{[a-z0-9]+}}, ${{[a-z0-9]+}} + +define { i32 } @compare_v2q15_eq_(i32 %a0.coerce, i32 %a1.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %1 = bitcast i32 %a1.coerce to <2 x i16> + %cmp = icmp eq <2 x i16> %0, %1 + %sext = sext <2 x i1> %cmp to <2 x i16> + %2 = bitcast <2 x i16> %sext to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: compare_v2q15_lt_: +; CHECK: cmp.lt.ph $4, $5 +; CHECK: pick.ph ${{[0-9]+}}, ${{[a-z0-9]+}}, ${{[a-z0-9]+}} + +define { i32 } @compare_v2q15_lt_(i32 %a0.coerce, i32 %a1.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %1 = bitcast i32 %a1.coerce to <2 x i16> + %cmp = icmp slt <2 x i16> %0, %1 + %sext = sext <2 x i1> %cmp to <2 x i16> + %2 = bitcast <2 x i16> %sext to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: compare_v2q15_le_: +; CHECK: cmp.le.ph $4, $5 +; CHECK: pick.ph ${{[0-9]+}}, ${{[a-z0-9]+}}, ${{[a-z0-9]+}} + +define { i32 } @compare_v2q15_le_(i32 %a0.coerce, i32 %a1.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %1 = bitcast i32 %a1.coerce to <2 x i16> + %cmp = icmp sle <2 x i16> %0, %1 + %sext = sext <2 x i1> %cmp to <2 x i16> + %2 = bitcast <2 x i16> %sext to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: compare_v2q15_ne_: +; CHECK: cmp.eq.ph ${{[0-9]+}}, ${{[0-9]+}} +; CHECK: pick.ph ${{[0-9]+}}, ${{[a-z0-9]+}}, ${{[a-z0-9]+}} + +define { i32 } @compare_v2q15_ne_(i32 %a0.coerce, i32 %a1.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %1 = bitcast i32 %a1.coerce to <2 x i16> + %cmp = icmp ne <2 x i16> %0, %1 + %sext = sext <2 x i1> %cmp to <2 x i16> + %2 = bitcast <2 x i16> %sext to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: compare_v2q15_gt_: +; CHECK: cmp.le.ph $4, $5 +; CHECK: pick.ph ${{[0-9]+}}, ${{[a-z0-9]+}}, ${{[a-z0-9]+}} + +define { i32 } @compare_v2q15_gt_(i32 %a0.coerce, i32 %a1.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %1 = bitcast i32 %a1.coerce to <2 x i16> + %cmp = icmp sgt <2 x i16> %0, %1 + %sext = sext <2 x i1> %cmp to <2 x i16> + %2 = bitcast <2 x i16> %sext to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: compare_v2q15_ge_: +; CHECK: cmp.lt.ph $4, $5 +; CHECK: pick.ph ${{[0-9]+}}, ${{[a-z0-9]+}}, ${{[a-z0-9]+}} + +define { i32 } @compare_v2q15_ge_(i32 %a0.coerce, i32 %a1.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %1 = bitcast i32 %a1.coerce to <2 x i16> + %cmp = icmp sge <2 x i16> %0, %1 + %sext = sext <2 x i1> %cmp to <2 x i16> + %2 = bitcast <2 x i16> %sext to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: compare_v4ui8_eq_: +; CHECK: cmpu.eq.qb ${{[0-9]+}}, ${{[0-9]+}} +; CHECK: pick.qb ${{[0-9]+}}, ${{[a-z0-9]+}}, ${{[a-z0-9]+}} + +define { i32 } @compare_v4ui8_eq_(i32 %a0.coerce, i32 %a1.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %1 = bitcast i32 %a1.coerce to <4 x i8> + %cmp = icmp eq <4 x i8> %0, %1 + %sext = sext <4 x i1> %cmp to <4 x i8> + %2 = bitcast <4 x i8> %sext to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: compare_v4ui8_lt_: +; CHECK: cmpu.lt.qb $4, $5 +; CHECK: pick.qb ${{[0-9]+}}, ${{[a-z0-9]+}}, ${{[a-z0-9]+}} + +define { i32 } @compare_v4ui8_lt_(i32 %a0.coerce, i32 %a1.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %1 = bitcast i32 %a1.coerce to <4 x i8> + %cmp = icmp ult <4 x i8> %0, %1 + %sext = sext <4 x i1> %cmp to <4 x i8> + %2 = bitcast <4 x i8> %sext to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: compare_v4ui8_le_: +; CHECK: cmpu.le.qb $4, $5 +; CHECK: pick.qb ${{[0-9]+}}, ${{[a-z0-9]+}}, ${{[a-z0-9]+}} + +define { i32 } @compare_v4ui8_le_(i32 %a0.coerce, i32 %a1.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %1 = bitcast i32 %a1.coerce to <4 x i8> + %cmp = icmp ule <4 x i8> %0, %1 + %sext = sext <4 x i1> %cmp to <4 x i8> + %2 = bitcast <4 x i8> %sext to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: compare_v4ui8_ne_: +; CHECK: cmpu.eq.qb ${{[0-9]+}}, ${{[0-9]+}} +; CHECK: pick.qb ${{[0-9]+}}, ${{[a-z0-9]+}}, ${{[a-z0-9]+}} + +define { i32 } @compare_v4ui8_ne_(i32 %a0.coerce, i32 %a1.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %1 = bitcast i32 %a1.coerce to <4 x i8> + %cmp = icmp ne <4 x i8> %0, %1 + %sext = sext <4 x i1> %cmp to <4 x i8> + %2 = bitcast <4 x i8> %sext to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: compare_v4ui8_gt_: +; CHECK: cmpu.le.qb $4, $5 +; CHECK: pick.qb ${{[0-9]+}}, ${{[a-z0-9]+}}, ${{[a-z0-9]+}} + +define { i32 } @compare_v4ui8_gt_(i32 %a0.coerce, i32 %a1.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %1 = bitcast i32 %a1.coerce to <4 x i8> + %cmp = icmp ugt <4 x i8> %0, %1 + %sext = sext <4 x i1> %cmp to <4 x i8> + %2 = bitcast <4 x i8> %sext to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: compare_v4ui8_ge_: +; CHECK: cmpu.lt.qb $4, $5 +; CHECK: pick.qb ${{[0-9]+}}, ${{[a-z0-9]+}}, ${{[a-z0-9]+}} + +define { i32 } @compare_v4ui8_ge_(i32 %a0.coerce, i32 %a1.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %1 = bitcast i32 %a1.coerce to <4 x i8> + %cmp = icmp uge <4 x i8> %0, %1 + %sext = sext <4 x i1> %cmp to <4 x i8> + %2 = bitcast <4 x i8> %sext to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: compare_v2ui16_lt_: +; CHECK-NOT: cmp +; CHECK-NOT: pick + +define { i32 } @compare_v2ui16_lt_(i32 %a0.coerce, i32 %a1.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %1 = bitcast i32 %a1.coerce to <2 x i16> + %cmp = icmp ult <2 x i16> %0, %1 + %sext = sext <2 x i1> %cmp to <2 x i16> + %2 = bitcast <2 x i16> %sext to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: compare_v2ui16_le_: +; CHECK-NOT: cmp +; CHECK-NOT: pick + +define { i32 } @compare_v2ui16_le_(i32 %a0.coerce, i32 %a1.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %1 = bitcast i32 %a1.coerce to <2 x i16> + %cmp = icmp ule <2 x i16> %0, %1 + %sext = sext <2 x i1> %cmp to <2 x i16> + %2 = bitcast <2 x i16> %sext to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: compare_v2ui16_gt_: +; CHECK-NOT: cmp +; CHECK-NOT: pick + +define { i32 } @compare_v2ui16_gt_(i32 %a0.coerce, i32 %a1.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %1 = bitcast i32 %a1.coerce to <2 x i16> + %cmp = icmp ugt <2 x i16> %0, %1 + %sext = sext <2 x i1> %cmp to <2 x i16> + %2 = bitcast <2 x i16> %sext to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: compare_v2ui16_ge_: +; CHECK-NOT: cmp +; CHECK-NOT: pick + +define { i32 } @compare_v2ui16_ge_(i32 %a0.coerce, i32 %a1.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %1 = bitcast i32 %a1.coerce to <2 x i16> + %cmp = icmp uge <2 x i16> %0, %1 + %sext = sext <2 x i1> %cmp to <2 x i16> + %2 = bitcast <2 x i16> %sext to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: compare_v4i8_lt_: +; CHECK-NOT: cmp +; CHECK-NOT: pick + +define { i32 } @compare_v4i8_lt_(i32 %a0.coerce, i32 %a1.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %1 = bitcast i32 %a1.coerce to <4 x i8> + %cmp = icmp slt <4 x i8> %0, %1 + %sext = sext <4 x i1> %cmp to <4 x i8> + %2 = bitcast <4 x i8> %sext to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: compare_v4i8_le_: +; CHECK-NOT: cmp +; CHECK-NOT: pick + +define { i32 } @compare_v4i8_le_(i32 %a0.coerce, i32 %a1.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %1 = bitcast i32 %a1.coerce to <4 x i8> + %cmp = icmp sle <4 x i8> %0, %1 + %sext = sext <4 x i1> %cmp to <4 x i8> + %2 = bitcast <4 x i8> %sext to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: compare_v4i8_gt_: +; CHECK-NOT: cmp +; CHECK-NOT: pick + +define { i32 } @compare_v4i8_gt_(i32 %a0.coerce, i32 %a1.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %1 = bitcast i32 %a1.coerce to <4 x i8> + %cmp = icmp sgt <4 x i8> %0, %1 + %sext = sext <4 x i1> %cmp to <4 x i8> + %2 = bitcast <4 x i8> %sext to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; CHECK: compare_v4i8_ge_: +; CHECK-NOT: cmp +; CHECK-NOT: pick + +define { i32 } @compare_v4i8_ge_(i32 %a0.coerce, i32 %a1.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %1 = bitcast i32 %a1.coerce to <4 x i8> + %cmp = icmp sge <4 x i8> %0, %1 + %sext = sext <4 x i1> %cmp to <4 x i8> + %2 = bitcast <4 x i8> %sext to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} diff --git a/test/CodeGen/Mips/dsp-patterns.ll b/test/CodeGen/Mips/dsp-patterns.ll new file mode 100644 index 0000000..eeb7140 --- /dev/null +++ b/test/CodeGen/Mips/dsp-patterns.ll @@ -0,0 +1,261 @@ +; RUN: llc -march=mips -mattr=dsp < %s | FileCheck %s -check-prefix=R1 +; RUN: llc -march=mips -mattr=dspr2 < %s | FileCheck %s -check-prefix=R2 + +; R1: test_lbux: +; R1: lbux ${{[0-9]+}} + +define zeroext i8 @test_lbux(i8* nocapture %b, i32 %i) { +entry: + %add.ptr = getelementptr inbounds i8* %b, i32 %i + %0 = load i8* %add.ptr, align 1 + ret i8 %0 +} + +; R1: test_lhx: +; R1: lhx ${{[0-9]+}} + +define signext i16 @test_lhx(i16* nocapture %b, i32 %i) { +entry: + %add.ptr = getelementptr inbounds i16* %b, i32 %i + %0 = load i16* %add.ptr, align 2 + ret i16 %0 +} + +; R1: test_lwx: +; R1: lwx ${{[0-9]+}} + +define i32 @test_lwx(i32* nocapture %b, i32 %i) { +entry: + %add.ptr = getelementptr inbounds i32* %b, i32 %i + %0 = load i32* %add.ptr, align 4 + ret i32 %0 +} + +; R1: test_add_v2q15_: +; R1: addq.ph ${{[0-9]+}} + +define { i32 } @test_add_v2q15_(i32 %a.coerce, i32 %b.coerce) { +entry: + %0 = bitcast i32 %a.coerce to <2 x i16> + %1 = bitcast i32 %b.coerce to <2 x i16> + %add = add <2 x i16> %0, %1 + %2 = bitcast <2 x i16> %add to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; R1: test_sub_v2q15_: +; R1: subq.ph ${{[0-9]+}} + +define { i32 } @test_sub_v2q15_(i32 %a.coerce, i32 %b.coerce) { +entry: + %0 = bitcast i32 %a.coerce to <2 x i16> + %1 = bitcast i32 %b.coerce to <2 x i16> + %sub = sub <2 x i16> %0, %1 + %2 = bitcast <2 x i16> %sub to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; R2: test_mul_v2q15_: +; R2: mul.ph ${{[0-9]+}} + +; mul.ph is an R2 instruction. Check that multiply node gets expanded. +; R1: test_mul_v2q15_: +; R1: mul ${{[0-9]+}} +; R1: mul ${{[0-9]+}} + +define { i32 } @test_mul_v2q15_(i32 %a.coerce, i32 %b.coerce) { +entry: + %0 = bitcast i32 %a.coerce to <2 x i16> + %1 = bitcast i32 %b.coerce to <2 x i16> + %mul = mul <2 x i16> %0, %1 + %2 = bitcast <2 x i16> %mul to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; R1: test_add_v4i8_: +; R1: addu.qb ${{[0-9]+}} + +define { i32 } @test_add_v4i8_(i32 %a.coerce, i32 %b.coerce) { +entry: + %0 = bitcast i32 %a.coerce to <4 x i8> + %1 = bitcast i32 %b.coerce to <4 x i8> + %add = add <4 x i8> %0, %1 + %2 = bitcast <4 x i8> %add to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; R1: test_sub_v4i8_: +; R1: subu.qb ${{[0-9]+}} + +define { i32 } @test_sub_v4i8_(i32 %a.coerce, i32 %b.coerce) { +entry: + %0 = bitcast i32 %a.coerce to <4 x i8> + %1 = bitcast i32 %b.coerce to <4 x i8> + %sub = sub <4 x i8> %0, %1 + %2 = bitcast <4 x i8> %sub to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; DSP-ASE doesn't have a v4i8 multiply instruction. Check that multiply node gets expanded. +; R2: test_mul_v4i8_: +; R2: mul ${{[0-9]+}} +; R2: mul ${{[0-9]+}} +; R2: mul ${{[0-9]+}} +; R2: mul ${{[0-9]+}} + +define { i32 } @test_mul_v4i8_(i32 %a.coerce, i32 %b.coerce) { +entry: + %0 = bitcast i32 %a.coerce to <4 x i8> + %1 = bitcast i32 %b.coerce to <4 x i8> + %mul = mul <4 x i8> %0, %1 + %2 = bitcast <4 x i8> %mul to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %2, 0 + ret { i32 } %.fca.0.insert +} + +; R1: test_addsc: +; R1: addsc ${{[0-9]+}} +; R1: addwc ${{[0-9]+}} + +define i64 @test_addsc(i64 %a, i64 %b) { +entry: + %add = add nsw i64 %b, %a + ret i64 %add +} + +; R1: shift1_v2i16_shl_: +; R1: shll.ph ${{[0-9]+}}, ${{[0-9]+}}, 15 + +define { i32 } @shift1_v2i16_shl_(i32 %a0.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %shl = shl <2 x i16> %0, <i16 15, i16 15> + %1 = bitcast <2 x i16> %shl to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %1, 0 + ret { i32 } %.fca.0.insert +} + +; R1: shift1_v2i16_sra_: +; R1: shra.ph ${{[0-9]+}}, ${{[0-9]+}}, 15 + +define { i32 } @shift1_v2i16_sra_(i32 %a0.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %shr = ashr <2 x i16> %0, <i16 15, i16 15> + %1 = bitcast <2 x i16> %shr to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %1, 0 + ret { i32 } %.fca.0.insert +} + +; R1: shift1_v2ui16_srl_: +; R1-NOT: shrl.ph +; R2: shift1_v2ui16_srl_: +; R2: shrl.ph ${{[0-9]+}}, ${{[0-9]+}}, 15 + +define { i32 } @shift1_v2ui16_srl_(i32 %a0.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <2 x i16> + %shr = lshr <2 x i16> %0, <i16 15, i16 15> + %1 = bitcast <2 x i16> %shr to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %1, 0 + ret { i32 } %.fca.0.insert +} + +; R1: shift1_v4i8_shl_: +; R1: shll.qb ${{[0-9]+}}, ${{[0-9]+}}, 7 + +define { i32 } @shift1_v4i8_shl_(i32 %a0.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %shl = shl <4 x i8> %0, <i8 7, i8 7, i8 7, i8 7> + %1 = bitcast <4 x i8> %shl to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %1, 0 + ret { i32 } %.fca.0.insert +} + +; R1: shift1_v4i8_sra_: +; R1-NOT: shra.qb +; R2: shift1_v4i8_sra_: +; R2: shra.qb ${{[0-9]+}}, ${{[0-9]+}}, 7 + +define { i32 } @shift1_v4i8_sra_(i32 %a0.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %shr = ashr <4 x i8> %0, <i8 7, i8 7, i8 7, i8 7> + %1 = bitcast <4 x i8> %shr to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %1, 0 + ret { i32 } %.fca.0.insert +} + +; R1: shift1_v4ui8_srl_: +; R1: shrl.qb ${{[0-9]+}}, ${{[0-9]+}}, 7 + +define { i32 } @shift1_v4ui8_srl_(i32 %a0.coerce) { +entry: + %0 = bitcast i32 %a0.coerce to <4 x i8> + %shr = lshr <4 x i8> %0, <i8 7, i8 7, i8 7, i8 7> + %1 = bitcast <4 x i8> %shr to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %1, 0 + ret { i32 } %.fca.0.insert +} + +; Check that shift node is expanded if splat element size is not 16-bit. +; +; R1: test_vector_splat_imm_v2q15: +; R1-NOT: shll.ph + +define { i32 } @test_vector_splat_imm_v2q15(i32 %a.coerce) { +entry: + %0 = bitcast i32 %a.coerce to <2 x i16> + %shl = shl <2 x i16> %0, <i16 0, i16 2> + %1 = bitcast <2 x i16> %shl to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %1, 0 + ret { i32 } %.fca.0.insert +} + +; Check that shift node is expanded if splat element size is not 8-bit. +; +; R1: test_vector_splat_imm_v4i8: +; R1-NOT: shll.qb + +define { i32 } @test_vector_splat_imm_v4i8(i32 %a.coerce) { +entry: + %0 = bitcast i32 %a.coerce to <4 x i8> + %shl = shl <4 x i8> %0, <i8 0, i8 2, i8 0, i8 2> + %1 = bitcast <4 x i8> %shl to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %1, 0 + ret { i32 } %.fca.0.insert +} + +; Check that shift node is expanded if shift amount doesn't fit in 4-bit sa field. +; +; R1: test_shift_amount_v2q15: +; R1-NOT: shll.ph + +define { i32 } @test_shift_amount_v2q15(i32 %a.coerce) { +entry: + %0 = bitcast i32 %a.coerce to <2 x i16> + %shl = shl <2 x i16> %0, <i16 16, i16 16> + %1 = bitcast <2 x i16> %shl to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %1, 0 + ret { i32 } %.fca.0.insert +} + +; Check that shift node is expanded if shift amount doesn't fit in 3-bit sa field. +; +; R1: test_shift_amount_v4i8: +; R1-NOT: shll.qb + +define { i32 } @test_shift_amount_v4i8(i32 %a.coerce) { +entry: + %0 = bitcast i32 %a.coerce to <4 x i8> + %shl = shl <4 x i8> %0, <i8 8, i8 8, i8 8, i8 8> + %1 = bitcast <4 x i8> %shl to i32 + %.fca.0.insert = insertvalue { i32 } undef, i32 %1, 0 + ret { i32 } %.fca.0.insert +} diff --git a/test/CodeGen/Mips/eh-return32.ll b/test/CodeGen/Mips/eh-return32.ll index fe8a404..c3003b3 100644 --- a/test/CodeGen/Mips/eh-return32.ll +++ b/test/CodeGen/Mips/eh-return32.ll @@ -37,7 +37,9 @@ entry: ; CHECK: lw $7, [[offset3]]($sp) ; check that stack is adjusted by $v1 and that code returns to address in $v0 +; also check that $25 contains handler value ; CHECK: addiu $sp, $sp, [[spoffset]] +; CHECK: move $25, $2 ; CHECK: move $ra, $2 ; CHECK: jr $ra ; CHECK: addu $sp, $sp, $3 @@ -74,7 +76,9 @@ entry: ; CHECK: lw $7, [[offset3]]($sp) ; check that stack is adjusted by $v1 and that code returns to address in $v0 +; also check that $25 contains handler value ; CHECK: addiu $sp, $sp, [[spoffset]] +; CHECK: move $25, $2 ; CHECK: move $ra, $2 ; CHECK: jr $ra ; CHECK: addu $sp, $sp, $3 diff --git a/test/CodeGen/Mips/eh-return64.ll b/test/CodeGen/Mips/eh-return64.ll index 0b76b95..373a9a1 100644 --- a/test/CodeGen/Mips/eh-return64.ll +++ b/test/CodeGen/Mips/eh-return64.ll @@ -37,7 +37,9 @@ entry: ; CHECK: ld $7, [[offset3]]($sp) ; check that stack is adjusted by $v1 and that code returns to address in $v0 +; also check that $25 contains handler value ; CHECK: daddiu $sp, $sp, [[spoffset]] +; CHECK: move $25, $2 ; CHECK: move $ra, $2 ; CHECK: jr $ra ; CHECK: daddu $sp, $sp, $3 @@ -75,7 +77,9 @@ entry: ; CHECK: ld $7, [[offset3]]($sp) ; check that stack is adjusted by $v1 and that code returns to address in $v0 +; also check that $25 contains handler value ; CHECK: daddiu $sp, $sp, [[spoffset]] +; CHECK: move $25, $2 ; CHECK: move $ra, $2 ; CHECK: jr $ra ; CHECK: daddu $sp, $sp, $3 diff --git a/test/CodeGen/Mips/eh.ll b/test/CodeGen/Mips/eh.ll index d14150a..fc9e2ef 100644 --- a/test/CodeGen/Mips/eh.ll +++ b/test/CodeGen/Mips/eh.ll @@ -18,7 +18,7 @@ entry: %exception = tail call i8* @__cxa_allocate_exception(i32 8) nounwind %0 = bitcast i8* %exception to double* - store double 3.200000e+00, double* %0, align 8, !tbaa !0 + store double 3.200000e+00, double* %0, align 8 invoke void @__cxa_throw(i8* %exception, i8* bitcast (i8** @_ZTId to i8*), i8* null) noreturn to label %unreachable unwind label %lpad @@ -39,7 +39,7 @@ catch: ; preds = %lpad %4 = bitcast i8* %3 to double* %exn.scalar = load double* %4, align 8 %add = fadd double %exn.scalar, %i2 - store double %add, double* @g1, align 8, !tbaa !0 + store double %add, double* @g1, align 8 tail call void @__cxa_end_catch() nounwind ret void @@ -61,7 +61,3 @@ declare void @__cxa_throw(i8*, i8*, i8*) declare i8* @__cxa_begin_catch(i8*) declare void @__cxa_end_catch() - -!0 = metadata !{metadata !"double", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/Mips/fpneeded.ll b/test/CodeGen/Mips/fpneeded.ll new file mode 100644 index 0000000..623883a --- /dev/null +++ b/test/CodeGen/Mips/fpneeded.ll @@ -0,0 +1,149 @@ +; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=static -O3 < %s -mips-os16 | FileCheck %s -check-prefix=32 + +@x = global float 1.000000e+00, align 4 +@y = global float 2.000000e+00, align 4 +@zz = common global float 0.000000e+00, align 4 +@z = common global float 0.000000e+00, align 4 + +define float @fv() #0 { +entry: + ret float 1.000000e+00 +} + +; 32: .set nomips16 # @fv +; 32: .ent fv +; 32: .set noreorder +; 32: .set nomacro +; 32: .set noat +; 32: jr $ra +; 32: .set at +; 32: .set macro +; 32: .set reorder +; 32: .end fv + +define double @dv() #0 { +entry: + ret double 2.000000e+00 +} + +; 32: .set nomips16 # @dv +; 32: .ent dv +; 32: .set noreorder +; 32: .set nomacro +; 32: .set noat +; 32: jr $ra +; 32: .set at +; 32: .set macro +; 32: .set reorder +; 32: .end dv + +define void @vf(float %x) #0 { +entry: + %x.addr = alloca float, align 4 + store float %x, float* %x.addr, align 4 + ret void +} + +; 32: .set nomips16 # @vf +; 32: .ent vf +; 32: .set noreorder +; 32: .set nomacro +; 32: .set noat +; 32: jr $ra +; 32: .set at +; 32: .set macro +; 32: .set reorder +; 32: .end vf + +define void @vd(double %x) #0 { +entry: + %x.addr = alloca double, align 8 + store double %x, double* %x.addr, align 8 + ret void +} + +; 32: .set nomips16 # @vd +; 32: .ent vd +; 32: .set noreorder +; 32: .set nomacro +; 32: .set noat +; 32: jr $ra +; 32: .set at +; 32: .set macro +; 32: .set reorder +; 32: .end vd + +define void @foo1() #0 { +entry: + store float 1.000000e+00, float* @zz, align 4 + %0 = load float* @y, align 4 + %1 = load float* @x, align 4 + %add = fadd float %0, %1 + store float %add, float* @z, align 4 + ret void +} + +; 32: .set nomips16 # @foo1 +; 32: .ent foo1 +; 32: .set noreorder +; 32: .set nomacro +; 32: .set noat +; 32: jr $ra +; 32: .set at +; 32: .set macro +; 32: .set reorder +; 32: .end foo1 + +define void @foo2() #0 { +entry: + %0 = load float* @x, align 4 + call void @vf(float %0) + ret void +} + + +; 32: .set nomips16 # @foo2 +; 32: .ent foo2 +; 32: .set noreorder +; 32: .set nomacro +; 32: .set noat +; 32: jr $ra +; 32: .set at +; 32: .set macro +; 32: .set reorder +; 32: .end foo2 + +define void @foo3() #0 { +entry: + %call = call float @fv() + store float %call, float* @x, align 4 + ret void +} + +; 32: .set nomips16 # @foo3 +; 32: .ent foo3 +; 32: .set noreorder +; 32: .set nomacro +; 32: .set noat +; 32: jr $ra +; 32: .set at +; 32: .set macro +; 32: .set reorder +; 32: .end foo3 + +attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } + +define void @vv() #0 { +entry: + ret void +} + +; 32: .set mips16 # @vv +; 32: .ent vv + +; 32: save {{.+}} +; 32: restore {{.+}} +; 32: .end vv + + + diff --git a/test/CodeGen/Mips/fpnotneeded.ll b/test/CodeGen/Mips/fpnotneeded.ll new file mode 100644 index 0000000..dc2ec10 --- /dev/null +++ b/test/CodeGen/Mips/fpnotneeded.ll @@ -0,0 +1,77 @@ +; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=static -O3 < %s -mips-os16 | FileCheck %s -check-prefix=32 + +@i = global i32 1, align 4 +@f = global float 1.000000e+00, align 4 + +define void @vv() #0 { +entry: + ret void +} + +; 32: .set mips16 # @vv +; 32: .ent vv + +; 32: save {{.+}} +; 32: restore {{.+}} +; 32: .end vv + +define i32 @iv() #0 { +entry: + %0 = load i32* @i, align 4 + ret i32 %0 +} + +; 32: .set mips16 # @iv +; 32: .ent iv + +; 32: save {{.+}} +; 32: restore {{.+}} +; 32: .end iv + +define void @vif(i32 %i, float %f) #0 { +entry: + %i.addr = alloca i32, align 4 + %f.addr = alloca float, align 4 + store i32 %i, i32* %i.addr, align 4 + store float %f, float* %f.addr, align 4 + ret void +} + +; 32: .set mips16 # @vif +; 32: .ent vif + +; 32: save {{.+}} +; 32: restore {{.+}} +; 32: .end vif + +define void @foo() #0 { +entry: + store float 2.000000e+00, float* @f, align 4 + ret void +} + +; 32: .set mips16 # @foo +; 32: .ent foo + +; 32: save {{.+}} +; 32: restore {{.+}} +; 32: .end foo + +attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } + + +define float @fv() #0 { +entry: + ret float 1.000000e+00 +} + +; 32: .set nomips16 # @fv +; 32: .ent fv +; 32: .set noreorder +; 32: .set nomacro +; 32: .set noat +; 32: jr $ra +; 32: .set at +; 32: .set macro +; 32: .set reorder +; 32: .end fv diff --git a/test/CodeGen/Mips/inlineasmmemop.ll b/test/CodeGen/Mips/inlineasmmemop.ll index 1c7c443..a08a024 100644 --- a/test/CodeGen/Mips/inlineasmmemop.ll +++ b/test/CodeGen/Mips/inlineasmmemop.ll @@ -1,5 +1,6 @@ ; RUN: llc -march=mipsel < %s | FileCheck %s +; Simple memory @g1 = external global i32 define i32 @f1(i32 %x) nounwind { @@ -21,3 +22,42 @@ entry: ret i32 %0 } +; "D": Second word of double word. This works for any memory element +; double or single. +; CHECK: #APP +; CHECK-NEXT: lw ${{[0-9]+}},4(${{[0-9]+}}); +; CHECK-NEXT: #NO_APP + +; No "D": First word of double word. This works for any memory element +; double or single. +; CHECK: #APP +; CHECK-NEXT: lw ${{[0-9]+}},0(${{[0-9]+}}); +; CHECK-NEXT: #NO_APP + +;int b[8] = {0,1,2,3,4,5,6,7}; +;int main() +;{ +; int i; +; +; // The first word. Notice, no 'D' +; { asm ( +; "lw %0,%1;\n" +; : "=r" (i) : "m" (*(b+4)));} +; +; // The second word +; { asm ( +; "lw %0,%D1;\n" +; : "=r" (i) "m" (*(b+4)));} +;} + +@b = common global [20 x i32] zeroinitializer, align 4 + +define void @main() { +entry: + tail call void asm sideeffect " lw $0,${1:D};", "r,*m,~{$11}"(i32 undef, i32* getelementptr inbounds ([20 x i32]* @b, i32 0, i32 3)) + tail call void asm sideeffect " lw $0,${1};", "r,*m,~{$11}"(i32 undef, i32* getelementptr inbounds ([20 x i32]* @b, i32 0, i32 3)) + ret void +} + +attributes #0 = { nounwind } + diff --git a/test/CodeGen/Mips/madd-msub.ll b/test/CodeGen/Mips/madd-msub.ll index 0aeabb3..0dbb2c2 100644 --- a/test/CodeGen/Mips/madd-msub.ll +++ b/test/CodeGen/Mips/madd-msub.ll @@ -1,6 +1,9 @@ -; RUN: llc -march=mips < %s | FileCheck %s +; RUN: llc -march=mips < %s | FileCheck %s -check-prefix=32 +; RUN: llc -march=mips -mattr=dsp < %s | FileCheck %s -check-prefix=DSP +; RUN: llc -march=mips -mcpu=mips16 < %s -; CHECK: madd +; 32: madd ${{[0-9]+}} +; DSP: madd $ac define i64 @madd1(i32 %a, i32 %b, i32 %c) nounwind readnone { entry: %conv = sext i32 %a to i64 @@ -11,7 +14,8 @@ entry: ret i64 %add } -; CHECK: maddu +; 32: maddu ${{[0-9]+}} +; DSP: maddu $ac define i64 @madd2(i32 %a, i32 %b, i32 %c) nounwind readnone { entry: %conv = zext i32 %a to i64 @@ -22,7 +26,8 @@ entry: ret i64 %add } -; CHECK: madd +; 32: madd ${{[0-9]+}} +; DSP: madd $ac define i64 @madd3(i32 %a, i32 %b, i64 %c) nounwind readnone { entry: %conv = sext i32 %a to i64 @@ -32,7 +37,8 @@ entry: ret i64 %add } -; CHECK: msub +; 32: msub ${{[0-9]+}} +; DSP: msub $ac define i64 @msub1(i32 %a, i32 %b, i32 %c) nounwind readnone { entry: %conv = sext i32 %c to i64 @@ -43,7 +49,8 @@ entry: ret i64 %sub } -; CHECK: msubu +; 32: msubu ${{[0-9]+}} +; DSP: msubu $ac define i64 @msub2(i32 %a, i32 %b, i32 %c) nounwind readnone { entry: %conv = zext i32 %c to i64 @@ -54,7 +61,8 @@ entry: ret i64 %sub } -; CHECK: msub +; 32: msub ${{[0-9]+}} +; DSP: msub $ac define i64 @msub3(i32 %a, i32 %b, i64 %c) nounwind readnone { entry: %conv = sext i32 %a to i64 diff --git a/test/CodeGen/Mips/mips16_32_1.ll b/test/CodeGen/Mips/mips16_32_1.ll new file mode 100644 index 0000000..6f4826e --- /dev/null +++ b/test/CodeGen/Mips/mips16_32_1.ll @@ -0,0 +1,14 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=pic -O3 < %s -mips-mixed-16-32 | FileCheck %s +; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=pic -O3 < %s -mips-mixed-16-32 | FileCheck %s + +define void @foo() #0 { +entry: + ret void +} + +; CHECK: .set mips16 # @foo +; CHECK: .ent foo +; CHECK: save {{.+}} +; CHECK: restore {{.+}} +; CHECK: .end foo +attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } diff --git a/test/CodeGen/Mips/mips16_32_10.ll b/test/CodeGen/Mips/mips16_32_10.ll new file mode 100644 index 0000000..330dbfe --- /dev/null +++ b/test/CodeGen/Mips/mips16_32_10.ll @@ -0,0 +1,59 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=static -O3 < %s -mips-mixed-16-32 | FileCheck %s -check-prefix=16 + +define void @foo() #0 { +entry: + ret void +} +; 16: .set nomips16 # @foo +; 16: .ent foo +; 16: .set noreorder +; 16: .set nomacro +; 16: .set noat +; 16: jr $ra +; 16: nop +; 16: .set at +; 16: .set macro +; 16: .set reorder +; 16: .end foo + +define void @nofoo() #1 { +entry: + ret void +} + +; 16: .set mips16 # @nofoo +; 16: .ent nofoo + +; 16: save {{.+}} +; 16: restore {{.+}} +; 16: .end nofoo + +define i32 @main() #2 { +entry: + ret i32 0 +} + +; 16: .set nomips16 # @main +; 16: .ent main +; 16: .set noreorder +; 16: .set nomacro +; 16: .set noat +; 16: jr $ra +; 16: .set at +; 16: .set macro +; 16: .set reorder +; 16: .end main + + + + + + + + + + + +attributes #0 = { nounwind "less-precise-fpmad"="false" "nomips16" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #2 = { nounwind "less-precise-fpmad"="false" "nomips16" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } diff --git a/test/CodeGen/Mips/mips16_32_3.ll b/test/CodeGen/Mips/mips16_32_3.ll new file mode 100644 index 0000000..8874a88 --- /dev/null +++ b/test/CodeGen/Mips/mips16_32_3.ll @@ -0,0 +1,70 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=static -O3 < %s -mips-mixed-16-32 | FileCheck %s -check-prefix=16 +; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=static -O3 < %s -mips-mixed-16-32 | FileCheck %s -check-prefix=32 + +define void @foo() #0 { +entry: + ret void +} + +; 16: .set mips16 # @foo +; 16: .ent foo +; 16: save {{.+}} +; 16: restore {{.+}} +; 16: .end foo +; 32: .set mips16 # @foo +; 32: .ent foo +; 32: save {{.+}} +; 32: restore {{.+}} +; 32: .end foo +define void @nofoo() #1 { +entry: + ret void +} + +; 16: .set nomips16 # @nofoo +; 16: .ent nofoo +; 16: .set noreorder +; 16: .set nomacro +; 16: .set noat +; 16: jr $ra +; 16: nop +; 16: .set at +; 16: .set macro +; 16: .set reorder +; 16: .end nofoo +; 32: .set nomips16 # @nofoo +; 32: .ent nofoo +; 32: .set noreorder +; 32: .set nomacro +; 32: .set noat +; 32: jr $ra +; 32: nop +; 32: .set at +; 32: .set macro +; 32: .set reorder +; 32: .end nofoo +define i32 @main() #2 { +entry: + ret i32 0 +} + +; 16: .set mips16 # @main +; 16: .ent main +; 16: save {{.+}} +; 16: restore {{.+}} +; 16: .end main +; 32: .set nomips16 # @main +; 32: .ent main +; 32: .set noreorder +; 32: .set nomacro +; 32: .set noat +; 32: jr $ra +; 32: addiu $2, $zero, 0 +; 32: .set at +; 32: .set macro +; 32: .set reorder +; 32: .end main + +attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "nomips16" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #2 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } diff --git a/test/CodeGen/Mips/mips16_32_4.ll b/test/CodeGen/Mips/mips16_32_4.ll new file mode 100644 index 0000000..cdaed6c --- /dev/null +++ b/test/CodeGen/Mips/mips16_32_4.ll @@ -0,0 +1,65 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=static -O3 < %s -mips-mixed-16-32 | FileCheck %s -check-prefix=16 +; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=static -O3 < %s -mips-mixed-16-32 | FileCheck %s -check-prefix=32 + +define void @foo() #0 { +entry: + ret void +} + +; 16: .set mips16 # @foo +; 16: .ent foo +; 16: save {{.+}} +; 16: restore {{.+}} +; 16: .end foo +; 32: .set mips16 # @foo +; 32: .ent foo +; 32: save {{.+}} +; 32: restore {{.+}} +; 32: .end foo +define void @nofoo() #1 { +entry: + ret void +} + +; 16: .set nomips16 # @nofoo +; 16: .ent nofoo +; 16: .set noreorder +; 16: .set nomacro +; 16: .set noat +; 16: jr $ra +; 16: nop +; 16: .set at +; 16: .set macro +; 16: .set reorder +; 16: .end nofoo +; 32: .set nomips16 # @nofoo +; 32: .ent nofoo +; 32: .set noreorder +; 32: .set nomacro +; 32: .set noat +; 32: jr $ra +; 32: nop +; 32: .set at +; 32: .set macro +; 32: .set reorder +; 32: .end nofoo +define i32 @main() #2 { +entry: + ret i32 0 +} + +; 16: .set mips16 # @main +; 16: .ent main +; 16: save {{.+}} +; 16: restore {{.+}} +; 16: .end main +; 32: .set mips16 # @main +; 32: .ent main +; 32: save {{.+}} +; 32: restore {{.+}} +; 32: .end main + + +attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "nomips16" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #2 = { nounwind "less-precise-fpmad"="false" "mips16" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } diff --git a/test/CodeGen/Mips/mips16_32_5.ll b/test/CodeGen/Mips/mips16_32_5.ll new file mode 100644 index 0000000..45e0bf4 --- /dev/null +++ b/test/CodeGen/Mips/mips16_32_5.ll @@ -0,0 +1,80 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=static -O3 < %s -mips-mixed-16-32 | FileCheck %s -check-prefix=16 +; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=static -O3 < %s -mips-mixed-16-32 | FileCheck %s -check-prefix=32 + +define void @foo() #0 { +entry: + ret void +} + +; 16: .set mips16 # @foo +; 16: .ent foo +; 16: save {{.+}} +; 16: restore {{.+}} +; 16: .end foo +; 32: .set mips16 # @foo +; 32: .ent foo +; 32: save {{.+}} +; 32: restore {{.+}} +; 32: .end foo +define void @nofoo() #1 { +entry: + ret void +} + +; 16: .set nomips16 # @nofoo +; 16: .ent nofoo +; 16: .set noreorder +; 16: .set nomacro +; 16: .set noat +; 16: jr $ra +; 16: nop +; 16: .set at +; 16: .set macro +; 16: .set reorder +; 16: .end nofoo +; 32: .set nomips16 # @nofoo +; 32: .ent nofoo +; 32: .set noreorder +; 32: .set nomacro +; 32: .set noat +; 32: jr $ra +; 32: nop +; 32: .set at +; 32: .set macro +; 32: .set reorder +; 32: .end nofoo +define i32 @main() #2 { +entry: + ret i32 0 +} + +; 16: .set nomips16 # @main +; 16: .ent main +; 16: .set noreorder +; 16: .set nomacro +; 16: .set noat +; 16: jr $ra +; 16: addiu $2, $zero, 0 +; 16: .set at +; 16: .set macro +; 16: .set reorder +; 16: .end main + +; 32: .set nomips16 # @main +; 32: .ent main +; 32: .set noreorder +; 32: .set nomacro +; 32: .set noat +; 32: jr $ra +; 32: addiu $2, $zero, 0 +; 32: .set at +; 32: .set macro +; 32: .set reorder +; 32: .end main + + + + +attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "nomips16" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #2 = { nounwind "less-precise-fpmad"="false" "nomips16" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } diff --git a/test/CodeGen/Mips/mips16_32_6.ll b/test/CodeGen/Mips/mips16_32_6.ll new file mode 100644 index 0000000..f4b8e7a --- /dev/null +++ b/test/CodeGen/Mips/mips16_32_6.ll @@ -0,0 +1,86 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=static -O3 < %s -mips-mixed-16-32 | FileCheck %s -check-prefix=16 +; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=static -O3 < %s -mips-mixed-16-32 | FileCheck %s -check-prefix=32 + +define void @foo() #0 { +entry: + ret void +} + +; 16: .set mips16 # @foo +; 16: .ent foo +; 16: save {{.+}} +; 16: restore {{.+}} +; 16: .end foo +; 32: .set nomips16 # @foo +; 32: .ent foo +; 32: .set noreorder +; 32: .set nomacro +; 32: .set noat +; 32: jr $ra +; 32: nop +; 32: .set at +; 32: .set macro +; 32: .set reorder +; 32: .end foo +define void @nofoo() #1 { +entry: + ret void +} + +; 16: .set nomips16 # @nofoo +; 16: .ent nofoo +; 16: .set noreorder +; 16: .set nomacro +; 16: .set noat +; 16: jr $ra +; 16: nop +; 16: .set at +; 16: .set macro +; 16: .set reorder +; 16: .end nofoo +; 32: .set nomips16 # @nofoo +; 32: .ent nofoo +; 32: .set noreorder +; 32: .set nomacro +; 32: .set noat +; 32: jr $ra +; 32: nop +; 32: .set at +; 32: .set macro +; 32: .set reorder +; 32: .end nofoo +define i32 @main() #2 { +entry: + ret i32 0 +} + +; 16: .set nomips16 # @main +; 16: .ent main +; 16: .set noreorder +; 16: .set nomacro +; 16: .set noat +; 16: jr $ra +; 16: addiu $2, $zero, 0 +; 16: .set at +; 16: .set macro +; 16: .set reorder +; 16: .end main + +; 32: .set nomips16 # @main +; 32: .ent main +; 32: .set noreorder +; 32: .set nomacro +; 32: .set noat +; 32: jr $ra +; 32: addiu $2, $zero, 0 +; 32: .set at +; 32: .set macro +; 32: .set reorder +; 32: .end main + + + + +attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "nomips16" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #2 = { nounwind "less-precise-fpmad"="false" "nomips16" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } diff --git a/test/CodeGen/Mips/mips16_32_7.ll b/test/CodeGen/Mips/mips16_32_7.ll new file mode 100644 index 0000000..f8726ea --- /dev/null +++ b/test/CodeGen/Mips/mips16_32_7.ll @@ -0,0 +1,76 @@ +; RUN: llc -march=mipsel -mcpu=mips16 -relocation-model=static -O3 < %s -mips-mixed-16-32 | FileCheck %s -check-prefix=16 +; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=static -O3 < %s -mips-mixed-16-32 | FileCheck %s -check-prefix=32 + +define void @foo() #0 { +entry: + ret void +} + +; 16: .set mips16 # @foo +; 16: .ent foo +; 16: save {{.+}} +; 16: restore {{.+}} +; 16: .end foo +; 32: .set nomips16 # @foo +; 32: .ent foo +; 32: .set noreorder +; 32: .set nomacro +; 32: .set noat +; 32: jr $ra +; 32: nop +; 32: .set at +; 32: .set macro +; 32: .set reorder +; 32: .end foo +define void @nofoo() #1 { +entry: + ret void +} + +; 16: .set nomips16 # @nofoo +; 16: .ent nofoo +; 16: .set noreorder +; 16: .set nomacro +; 16: .set noat +; 16: jr $ra +; 16: nop +; 16: .set at +; 16: .set macro +; 16: .set reorder +; 16: .end nofoo +; 32: .set nomips16 # @nofoo +; 32: .ent nofoo +; 32: .set noreorder +; 32: .set nomacro +; 32: .set noat +; 32: jr $ra +; 32: nop +; 32: .set at +; 32: .set macro +; 32: .set reorder +; 32: .end nofoo +define i32 @main() #2 { +entry: + ret i32 0 +} + +; 16: .set mips16 # @main +; 16: .ent main +; 16: save {{.+}} +; 16: restore {{.+}} +; 16: .end main + +; 32: .set mips16 # @main +; 32: .ent main +; 32: save {{.+}} +; 32: restore {{.+}} +; 32: .end main + + + + + + +attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "nomips16" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #2 = { nounwind "less-precise-fpmad"="false" "mips16" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } diff --git a/test/CodeGen/Mips/mips16_32_8.ll b/test/CodeGen/Mips/mips16_32_8.ll new file mode 100644 index 0000000..e51f296 --- /dev/null +++ b/test/CodeGen/Mips/mips16_32_8.ll @@ -0,0 +1,74 @@ +; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=static -O3 < %s -mips-mixed-16-32 | FileCheck %s -check-prefix=32 + +@x = global float 1.000000e+00, align 4 +@y = global float 0x4007333340000000, align 4 +@i = common global i32 0, align 4 +@f = common global float 0.000000e+00, align 4 +@.str = private unnamed_addr constant [8 x i8] c"f = %f\0A\00", align 1 +@.str1 = private unnamed_addr constant [11 x i8] c"hello %i \0A\00", align 1 +@.str2 = private unnamed_addr constant [13 x i8] c"goodbye %i \0A\00", align 1 + +define void @foo() #0 { +entry: + store i32 10, i32* @i, align 4 + ret void +} + +; 32: .set mips16 # @foo +; 32: .ent foo +; 32: save {{.+}} +; 32: restore {{.+}} +; 32: .end foo + +define void @nofoo() #1 { +entry: + store i32 20, i32* @i, align 4 + %0 = load float* @x, align 4 + %1 = load float* @y, align 4 + %add = fadd float %0, %1 + store float %add, float* @f, align 4 + %2 = load float* @f, align 4 + %conv = fpext float %2 to double + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([8 x i8]* @.str, i32 0, i32 0), double %conv) + ret void +} + +; 32: .set nomips16 # @nofoo +; 32: .ent nofoo +; 32: .set noreorder +; 32: .set nomacro +; 32: .set noat +; 32: add.s {{.+}} +; 32: mfc1 {{.+}} +; 32: .set at +; 32: .set macro +; 32: .set reorder +; 32: .end nofoo +declare i32 @printf(i8*, ...) #2 + +define i32 @main() #3 { +entry: + call void @foo() + %0 = load i32* @i, align 4 + %call = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str1, i32 0, i32 0), i32 %0) + call void @nofoo() + %1 = load i32* @i, align 4 + %call1 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([13 x i8]* @.str2, i32 0, i32 0), i32 %1) + ret i32 0 +} + +; 32: .set nomips16 # @main +; 32: .ent main +; 32: .set noreorder +; 32: .set nomacro +; 32: .set noat +; 32: jr $ra +; 32: .set at +; 32: .set macro +; 32: .set reorder +; 32: .end main + +attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "nomips16" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #2 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #3 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } diff --git a/test/CodeGen/Mips/mips16_32_9.ll b/test/CodeGen/Mips/mips16_32_9.ll new file mode 100644 index 0000000..f5ff368 --- /dev/null +++ b/test/CodeGen/Mips/mips16_32_9.ll @@ -0,0 +1,51 @@ +; RUN: llc -march=mipsel -mcpu=mips32 -relocation-model=static -O3 < %s -mips-mixed-16-32 | FileCheck %s -check-prefix=32 + +define void @foo() #0 { +entry: + ret void +} + +; 32: .set mips16 # @foo +; 32: .ent foo +; 32: save {{.+}} +; 32: restore {{.+}} +; 32: .end foo +define void @nofoo() #1 { +entry: + ret void +} + +; 32: .set nomips16 # @nofoo +; 32: .ent nofoo +; 32: .set noreorder +; 32: .set nomacro +; 32: .set noat +; 32: jr $ra +; 32: nop +; 32: .set at +; 32: .set macro +; 32: .set reorder +; 32: .end nofoo +define i32 @main() #2 { +entry: + ret i32 0 +} + +; 32: .set mips16 # @main +; 32: .ent main +; 32: save {{.+}} +; 32: restore {{.+}} +; 32: .end main + + + + + + + + + + +attributes #0 = { nounwind "less-precise-fpmad"="false" "mips16" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #2 = { nounwind "less-precise-fpmad"="false" "mips16" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } diff --git a/test/CodeGen/Mips/select.ll b/test/CodeGen/Mips/select.ll index 40115be..06e2a86 100644 --- a/test/CodeGen/Mips/select.ll +++ b/test/CodeGen/Mips/select.ll @@ -130,8 +130,8 @@ define i32 @sel12(i32 %f0, i32 %f1) nounwind readonly { entry: ; CHECK: c.eq.d ; CHECK: movt - %tmp = load double* @d2, align 8, !tbaa !0 - %tmp1 = load double* @d3, align 8, !tbaa !0 + %tmp = load double* @d2, align 8 + %tmp1 = load double* @d3, align 8 %cmp = fcmp oeq double %tmp, %tmp1 %cond = select i1 %cmp, i32 %f0, i32 %f1 ret i32 %cond @@ -141,8 +141,8 @@ define i32 @sel13(i32 %f0, i32 %f1) nounwind readonly { entry: ; CHECK: c.olt.d ; CHECK: movt - %tmp = load double* @d2, align 8, !tbaa !0 - %tmp1 = load double* @d3, align 8, !tbaa !0 + %tmp = load double* @d2, align 8 + %tmp1 = load double* @d3, align 8 %cmp = fcmp olt double %tmp, %tmp1 %cond = select i1 %cmp, i32 %f0, i32 %f1 ret i32 %cond @@ -152,13 +152,9 @@ define i32 @sel14(i32 %f0, i32 %f1) nounwind readonly { entry: ; CHECK: c.ule.d ; CHECK: movf - %tmp = load double* @d2, align 8, !tbaa !0 - %tmp1 = load double* @d3, align 8, !tbaa !0 + %tmp = load double* @d2, align 8 + %tmp1 = load double* @d3, align 8 %cmp = fcmp ogt double %tmp, %tmp1 %cond = select i1 %cmp, i32 %f0, i32 %f1 ret i32 %cond } - -!0 = metadata !{metadata !"double", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/Mips/spill-copy-acreg.ll b/test/CodeGen/Mips/spill-copy-acreg.ll new file mode 100644 index 0000000..2ca031a --- /dev/null +++ b/test/CodeGen/Mips/spill-copy-acreg.ll @@ -0,0 +1,21 @@ +; RUN: llc -march=mipsel -mattr=+dsp < %s + +@g1 = common global i64 0, align 8 +@g2 = common global i64 0, align 8 +@g3 = common global i64 0, align 8 + +define i64 @test_acreg_copy(i32 %a0, i32 %a1, i32 %a2, i32 %a3) { +entry: + %0 = load i64* @g1, align 8 + %1 = tail call i64 @llvm.mips.maddu(i64 %0, i32 %a0, i32 %a1) + %2 = tail call i64 @llvm.mips.maddu(i64 %0, i32 %a2, i32 %a3) + store i64 %1, i64* @g1, align 8 + store i64 %2, i64* @g2, align 8 + tail call void @foo1() + store i64 %2, i64* @g3, align 8 + ret i64 %1 +} + +declare i64 @llvm.mips.maddu(i64, i32, i32) + +declare void @foo1() diff --git a/test/CodeGen/Mips/zeroreg.ll b/test/CodeGen/Mips/zeroreg.ll index 79ed609..e0e93e2 100644 --- a/test/CodeGen/Mips/zeroreg.ll +++ b/test/CodeGen/Mips/zeroreg.ll @@ -6,7 +6,7 @@ define i32 @foo0(i32 %s) nounwind readonly { entry: ; CHECK: movn ${{[0-9]+}}, $zero %tobool = icmp ne i32 %s, 0 - %0 = load i32* @g1, align 4, !tbaa !0 + %0 = load i32* @g1, align 4 %cond = select i1 %tobool, i32 0, i32 %0 ret i32 %cond } @@ -15,11 +15,7 @@ define i32 @foo1(i32 %s) nounwind readonly { entry: ; CHECK: movz ${{[0-9]+}}, $zero %tobool = icmp ne i32 %s, 0 - %0 = load i32* @g1, align 4, !tbaa !0 + %0 = load i32* @g1, align 4 %cond = select i1 %tobool, i32 %0, i32 0 ret i32 %cond } - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/NVPTX/annotations.ll b/test/CodeGen/NVPTX/annotations.ll index d93f688..39d52d3 100644 --- a/test/CodeGen/NVPTX/annotations.ll +++ b/test/CodeGen/NVPTX/annotations.ll @@ -1,5 +1,3 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s diff --git a/test/CodeGen/NVPTX/arithmetic-fp-sm10.ll b/test/CodeGen/NVPTX/arithmetic-fp-sm10.ll deleted file mode 100644 index 73c77f5..0000000 --- a/test/CodeGen/NVPTX/arithmetic-fp-sm10.ll +++ /dev/null @@ -1,72 +0,0 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s - -;; These tests should run for all targets - -;;===-- Basic instruction selection tests ---------------------------------===;; - - -;;; f64 - -define double @fadd_f64(double %a, double %b) { -; CHECK: add.f64 %fl{{[0-9]+}}, %fl{{[0-9]+}}, %fl{{[0-9]+}} -; CHECK: ret - %ret = fadd double %a, %b - ret double %ret -} - -define double @fsub_f64(double %a, double %b) { -; CHECK: sub.f64 %fl{{[0-9]+}}, %fl{{[0-9]+}}, %fl{{[0-9]+}} -; CHECK: ret - %ret = fsub double %a, %b - ret double %ret -} - -define double @fmul_f64(double %a, double %b) { -; CHECK: mul.f64 %fl{{[0-9]+}}, %fl{{[0-9]+}}, %fl{{[0-9]+}} -; CHECK: ret - %ret = fmul double %a, %b - ret double %ret -} - -define double @fdiv_f64(double %a, double %b) { -; CHECK: div.rn.f64 %fl{{[0-9]+}}, %fl{{[0-9]+}}, %fl{{[0-9]+}} -; CHECK: ret - %ret = fdiv double %a, %b - ret double %ret -} - -;; PTX does not have a floating-point rem instruction - - -;;; f32 - -define float @fadd_f32(float %a, float %b) { -; CHECK: add.f32 %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}} -; CHECK: ret - %ret = fadd float %a, %b - ret float %ret -} - -define float @fsub_f32(float %a, float %b) { -; CHECK: sub.f32 %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}} -; CHECK: ret - %ret = fsub float %a, %b - ret float %ret -} - -define float @fmul_f32(float %a, float %b) { -; CHECK: mul.f32 %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}} -; CHECK: ret - %ret = fmul float %a, %b - ret float %ret -} - -define float @fdiv_f32(float %a, float %b) { -; CHECK: div.full.f32 %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}} -; CHECK: ret - %ret = fdiv float %a, %b - ret float %ret -} - -;; PTX does not have a floating-point rem instruction diff --git a/test/CodeGen/NVPTX/arithmetic-int.ll b/test/CodeGen/NVPTX/arithmetic-int.ll index 529f849..8d73b7e 100644 --- a/test/CodeGen/NVPTX/arithmetic-int.ll +++ b/test/CodeGen/NVPTX/arithmetic-int.ll @@ -1,5 +1,3 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s diff --git a/test/CodeGen/NVPTX/calling-conv.ll b/test/CodeGen/NVPTX/calling-conv.ll index 968203e..190a146 100644 --- a/test/CodeGen/NVPTX/calling-conv.ll +++ b/test/CodeGen/NVPTX/calling-conv.ll @@ -1,5 +1,3 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s diff --git a/test/CodeGen/NVPTX/compare-int.ll b/test/CodeGen/NVPTX/compare-int.ll index 12fc754..16af0a3 100644 --- a/test/CodeGen/NVPTX/compare-int.ll +++ b/test/CodeGen/NVPTX/compare-int.ll @@ -1,5 +1,3 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s diff --git a/test/CodeGen/NVPTX/convert-fp.ll b/test/CodeGen/NVPTX/convert-fp.ll index 21c8437..1882121 100644 --- a/test/CodeGen/NVPTX/convert-fp.ll +++ b/test/CodeGen/NVPTX/convert-fp.ll @@ -1,5 +1,3 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s diff --git a/test/CodeGen/NVPTX/convert-int-sm10.ll b/test/CodeGen/NVPTX/convert-int-sm10.ll deleted file mode 100644 index 20716f9..0000000 --- a/test/CodeGen/NVPTX/convert-int-sm10.ll +++ /dev/null @@ -1,55 +0,0 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s - - -; i16 - -define i16 @cvt_i16_i32(i32 %x) { -; CHECK: cvt.u16.u32 %rs{{[0-9]+}}, %r{{[0-9]+}} -; CHECK: ret - %a = trunc i32 %x to i16 - ret i16 %a -} - -define i16 @cvt_i16_i64(i64 %x) { -; CHECK: cvt.u16.u64 %rs{{[0-9]+}}, %rl{{[0-9]+}} -; CHECK: ret - %a = trunc i64 %x to i16 - ret i16 %a -} - - - -; i32 - -define i32 @cvt_i32_i16(i16 %x) { -; CHECK: cvt.u32.u16 %r{{[0-9]+}}, %rs{{[0-9]+}} -; CHECK: ret - %a = zext i16 %x to i32 - ret i32 %a -} - -define i32 @cvt_i32_i64(i64 %x) { -; CHECK: cvt.u32.u64 %r{{[0-9]+}}, %rl{{[0-9]+}} -; CHECK: ret - %a = trunc i64 %x to i32 - ret i32 %a -} - - - -; i64 - -define i64 @cvt_i64_i16(i16 %x) { -; CHECK: cvt.u64.u16 %rl{{[0-9]+}}, %rs{{[0-9]+}} -; CHECK: ret - %a = zext i16 %x to i64 - ret i64 %a -} - -define i64 @cvt_i64_i32(i32 %x) { -; CHECK: cvt.u64.u32 %rl{{[0-9]+}}, %r{{[0-9]+}} -; CHECK: ret - %a = zext i32 %x to i64 - ret i64 %a -} diff --git a/test/CodeGen/NVPTX/intrinsic-old.ll b/test/CodeGen/NVPTX/intrinsic-old.ll index 1c9879c..53a28f3 100644 --- a/test/CodeGen/NVPTX/intrinsic-old.ll +++ b/test/CodeGen/NVPTX/intrinsic-old.ll @@ -1,5 +1,3 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s diff --git a/test/CodeGen/NVPTX/intrinsics.ll b/test/CodeGen/NVPTX/intrinsics.ll index afab60c..8b0357b 100644 --- a/test/CodeGen/NVPTX/intrinsics.ll +++ b/test/CodeGen/NVPTX/intrinsics.ll @@ -1,5 +1,3 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s diff --git a/test/CodeGen/NVPTX/ld-addrspace.ll b/test/CodeGen/NVPTX/ld-addrspace.ll index d1f5093..3265868 100644 --- a/test/CodeGen/NVPTX/ld-addrspace.ll +++ b/test/CodeGen/NVPTX/ld-addrspace.ll @@ -1,6 +1,4 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s --check-prefix=PTX32 ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s --check-prefix=PTX32 -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s --check-prefix=PTX64 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s --check-prefix=PTX64 diff --git a/test/CodeGen/NVPTX/nvvm-reflect.ll b/test/CodeGen/NVPTX/nvvm-reflect.ll new file mode 100644 index 0000000..0d02194 --- /dev/null +++ b/test/CodeGen/NVPTX/nvvm-reflect.ll @@ -0,0 +1,34 @@ +; RUN: opt < %s -S -nvvm-reflect -nvvm-reflect-list USE_MUL=0 -O2 | FileCheck %s --check-prefix=USE_MUL_0 +; RUN: opt < %s -S -nvvm-reflect -nvvm-reflect-list USE_MUL=1 -O2 | FileCheck %s --check-prefix=USE_MUL_1 + +@str = private addrspace(4) unnamed_addr constant [8 x i8] c"USE_MUL\00" + +declare i32 @__nvvm_reflect(i8*) +declare i8* @llvm.nvvm.ptr.constant.to.gen.p0i8.p4i8(i8 addrspace(4)*) + +define float @foo(float %a, float %b) { +; USE_MUL_0: define float @foo +; USE_MUL_0-NOT: call i32 @__nvvm_reflect +; USE_MUL_1: define float @foo +; USE_MUL_1-NOT: call i32 @__nvvm_reflect + %ptr = tail call i8* @llvm.nvvm.ptr.constant.to.gen.p0i8.p4i8(i8 addrspace(4)* getelementptr inbounds ([8 x i8] addrspace(4)* @str, i32 0, i32 0)) + %reflect = tail call i32 @__nvvm_reflect(i8* %ptr) + %cmp = icmp ugt i32 %reflect, 0 + br i1 %cmp, label %use_mul, label %use_add + +use_mul: +; USE_MUL_1: fmul float %a, %b +; USE_MUL_0-NOT: fadd float %a, %b + %ret1 = fmul float %a, %b + br label %exit + +use_add: +; USE_MUL_0: fadd float %a, %b +; USE_MUL_1-NOT: fmul float %a, %b + %ret2 = fadd float %a, %b + br label %exit + +exit: + %ret = phi float [%ret1, %use_mul], [%ret2, %use_add] + ret float %ret +} diff --git a/test/CodeGen/NVPTX/sched1.ll b/test/CodeGen/NVPTX/sched1.ll new file mode 100644 index 0000000..03ab635 --- /dev/null +++ b/test/CodeGen/NVPTX/sched1.ll @@ -0,0 +1,31 @@ +; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s + +; Ensure source scheduling is working + +define void @foo(i32* %a) { +; CHECK: .func foo +; CHECK: ld.u32 +; CHECK-NEXT: ld.u32 +; CHECK-NEXT: ld.u32 +; CHECK-NEXT: ld.u32 +; CHECK-NEXT: add.s32 +; CHECK-NEXT: add.s32 +; CHECK-NEXT: add.s32 + %ptr0 = getelementptr i32* %a, i32 0 + %val0 = load i32* %ptr0 + %ptr1 = getelementptr i32* %a, i32 1 + %val1 = load i32* %ptr1 + %ptr2 = getelementptr i32* %a, i32 2 + %val2 = load i32* %ptr2 + %ptr3 = getelementptr i32* %a, i32 3 + %val3 = load i32* %ptr3 + + %t0 = add i32 %val0, %val1 + %t1 = add i32 %t0, %val2 + %t2 = add i32 %t1, %val3 + + store i32 %t2, i32* %a + + ret void +} + diff --git a/test/CodeGen/NVPTX/sched2.ll b/test/CodeGen/NVPTX/sched2.ll new file mode 100644 index 0000000..71a9a49 --- /dev/null +++ b/test/CodeGen/NVPTX/sched2.ll @@ -0,0 +1,32 @@ +; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s + +define void @foo(<2 x i32>* %a) { +; CHECK: .func foo +; CHECK: ld.v2.u32 +; CHECK-NEXT: ld.v2.u32 +; CHECK-NEXT: ld.v2.u32 +; CHECK-NEXT: ld.v2.u32 +; CHECK-NEXT: add.s32 +; CHECK-NEXT: add.s32 +; CHECK-NEXT: add.s32 +; CHECK-NEXT: add.s32 +; CHECK-NEXT: add.s32 +; CHECK-NEXT: add.s32 + %ptr0 = getelementptr <2 x i32>* %a, i32 0 + %val0 = load <2 x i32>* %ptr0 + %ptr1 = getelementptr <2 x i32>* %a, i32 1 + %val1 = load <2 x i32>* %ptr1 + %ptr2 = getelementptr <2 x i32>* %a, i32 2 + %val2 = load <2 x i32>* %ptr2 + %ptr3 = getelementptr <2 x i32>* %a, i32 3 + %val3 = load <2 x i32>* %ptr3 + + %t0 = add <2 x i32> %val0, %val1 + %t1 = add <2 x i32> %t0, %val2 + %t2 = add <2 x i32> %t1, %val3 + + store <2 x i32> %t2, <2 x i32>* %a + + ret void +} + diff --git a/test/CodeGen/NVPTX/sm-version-10.ll b/test/CodeGen/NVPTX/sm-version-10.ll deleted file mode 100644 index 9324a37..0000000 --- a/test/CodeGen/NVPTX/sm-version-10.ll +++ /dev/null @@ -1,6 +0,0 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s - - -; CHECK: .target sm_10 - diff --git a/test/CodeGen/NVPTX/sm-version-11.ll b/test/CodeGen/NVPTX/sm-version-11.ll deleted file mode 100644 index 9033a4e..0000000 --- a/test/CodeGen/NVPTX/sm-version-11.ll +++ /dev/null @@ -1,6 +0,0 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_11 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_11 | FileCheck %s - - -; CHECK: .target sm_11 - diff --git a/test/CodeGen/NVPTX/sm-version-12.ll b/test/CodeGen/NVPTX/sm-version-12.ll deleted file mode 100644 index d8ee85c..0000000 --- a/test/CodeGen/NVPTX/sm-version-12.ll +++ /dev/null @@ -1,6 +0,0 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_12 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_12 | FileCheck %s - - -; CHECK: .target sm_12 - diff --git a/test/CodeGen/NVPTX/sm-version-13.ll b/test/CodeGen/NVPTX/sm-version-13.ll deleted file mode 100644 index ad67d64..0000000 --- a/test/CodeGen/NVPTX/sm-version-13.ll +++ /dev/null @@ -1,6 +0,0 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_13 | FileCheck %s -; RUN: llc < %s -march=nvptx64 -mcpu=sm_13 | FileCheck %s - - -; CHECK: .target sm_13 - diff --git a/test/CodeGen/NVPTX/st-addrspace.ll b/test/CodeGen/NVPTX/st-addrspace.ll index 54e04ae..0b26d80 100644 --- a/test/CodeGen/NVPTX/st-addrspace.ll +++ b/test/CodeGen/NVPTX/st-addrspace.ll @@ -1,6 +1,4 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s --check-prefix=PTX32 ; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s --check-prefix=PTX32 -; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s --check-prefix=PTX64 ; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s --check-prefix=PTX64 diff --git a/test/CodeGen/NVPTX/tuple-literal.ll b/test/CodeGen/NVPTX/tuple-literal.ll index 5c0cb2c..2b1f2c4 100644 --- a/test/CodeGen/NVPTX/tuple-literal.ll +++ b/test/CodeGen/NVPTX/tuple-literal.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=nvptx -mcpu=sm_13 +; RUN: llc < %s -march=nvptx -mcpu=sm_20 define ptx_device void @test_function({i8, i8}*) { ret void diff --git a/test/CodeGen/NVPTX/vector-args.ll b/test/CodeGen/NVPTX/vector-args.ll new file mode 100644 index 0000000..80deae4 --- /dev/null +++ b/test/CodeGen/NVPTX/vector-args.ll @@ -0,0 +1,27 @@ +; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s + + +define float @foo(<2 x float> %a) { +; CHECK: .func (.param .b32 func_retval0) foo +; CHECK: .param .align 8 .b8 foo_param_0[8] +; CHECK: ld.param.f32 %f{{[0-9]+}} +; CHECK: ld.param.f32 %f{{[0-9]+}} + %t1 = fmul <2 x float> %a, %a + %t2 = extractelement <2 x float> %t1, i32 0 + %t3 = extractelement <2 x float> %t1, i32 1 + %t4 = fadd float %t2, %t3 + ret float %t4 +} + + +define float @bar(<4 x float> %a) { +; CHECK: .func (.param .b32 func_retval0) bar +; CHECK: .param .align 16 .b8 bar_param_0[16] +; CHECK: ld.param.f32 %f{{[0-9]+}} +; CHECK: ld.param.f32 %f{{[0-9]+}} + %t1 = fmul <4 x float> %a, %a + %t2 = extractelement <4 x float> %t1, i32 0 + %t3 = extractelement <4 x float> %t1, i32 1 + %t4 = fadd float %t2, %t3 + ret float %t4 +} diff --git a/test/CodeGen/NVPTX/vector-loads.ll b/test/CodeGen/NVPTX/vector-loads.ll index f5a1795..58882bf 100644 --- a/test/CodeGen/NVPTX/vector-loads.ll +++ b/test/CodeGen/NVPTX/vector-loads.ll @@ -9,7 +9,7 @@ define void @foo(<2 x float>* %a) { ; CHECK: .func foo -; CHECK: ld.v2.f32 {%f{{[0-9]+}}, %f{{[0-9]+}}}, [%r{{[0-9]+}}]; +; CHECK: ld.v2.f32 {%f{{[0-9]+}}, %f{{[0-9]+}}} %t1 = load <2 x float>* %a %t2 = fmul <2 x float> %t1, %t1 store <2 x float> %t2, <2 x float>* %a @@ -18,7 +18,7 @@ define void @foo(<2 x float>* %a) { define void @foo2(<4 x float>* %a) { ; CHECK: .func foo2 -; CHECK: ld.v4.f32 {%f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}}, [%r{{[0-9]+}}]; +; CHECK: ld.v4.f32 {%f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}} %t1 = load <4 x float>* %a %t2 = fmul <4 x float> %t1, %t1 store <4 x float> %t2, <4 x float>* %a @@ -27,8 +27,8 @@ define void @foo2(<4 x float>* %a) { define void @foo3(<8 x float>* %a) { ; CHECK: .func foo3 -; CHECK: ld.v4.f32 {%f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}}, [%r{{[0-9]+}}]; -; CHECK-NEXT: ld.v4.f32 {%f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}}, [%r{{[0-9]+}}+16]; +; CHECK: ld.v4.f32 {%f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}} +; CHECK-NEXT: ld.v4.f32 {%f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}, %f{{[0-9]+}}} %t1 = load <8 x float>* %a %t2 = fmul <8 x float> %t1, %t1 store <8 x float> %t2, <8 x float>* %a @@ -39,7 +39,7 @@ define void @foo3(<8 x float>* %a) { define void @foo4(<2 x i32>* %a) { ; CHECK: .func foo4 -; CHECK: ld.v2.u32 {%r{{[0-9]+}}, %r{{[0-9]+}}}, [%r{{[0-9]+}}]; +; CHECK: ld.v2.u32 {%r{{[0-9]+}}, %r{{[0-9]+}}} %t1 = load <2 x i32>* %a %t2 = mul <2 x i32> %t1, %t1 store <2 x i32> %t2, <2 x i32>* %a @@ -48,7 +48,7 @@ define void @foo4(<2 x i32>* %a) { define void @foo5(<4 x i32>* %a) { ; CHECK: .func foo5 -; CHECK: ld.v4.u32 {%r{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}}}, [%r{{[0-9]+}}]; +; CHECK: ld.v4.u32 {%r{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}}} %t1 = load <4 x i32>* %a %t2 = mul <4 x i32> %t1, %t1 store <4 x i32> %t2, <4 x i32>* %a @@ -57,8 +57,8 @@ define void @foo5(<4 x i32>* %a) { define void @foo6(<8 x i32>* %a) { ; CHECK: .func foo6 -; CHECK: ld.v4.u32 {%r{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}}}, [%r{{[0-9]+}}]; -; CHECK-NEXT: ld.v4.u32 {%r{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}}}, [%r{{[0-9]+}}+16]; +; CHECK: ld.v4.u32 {%r{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}}} +; CHECK-NEXT: ld.v4.u32 {%r{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}}, %r{{[0-9]+}}} %t1 = load <8 x i32>* %a %t2 = mul <8 x i32> %t1, %t1 store <8 x i32> %t2, <8 x i32>* %a diff --git a/test/CodeGen/PowerPC/2007-09-07-LoadStoreIdxForms.ll b/test/CodeGen/PowerPC/2007-09-07-LoadStoreIdxForms.ll index ea7de98..40f46fd 100644 --- a/test/CodeGen/PowerPC/2007-09-07-LoadStoreIdxForms.ll +++ b/test/CodeGen/PowerPC/2007-09-07-LoadStoreIdxForms.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=ppc64 | grep lwzx +; RUN: llc < %s -march=ppc64 | FileCheck %s %struct.__db_region = type { %struct.__mutex_t, [4 x i8], %struct.anon, i32, [1 x i32] } %struct.__mutex_t = type { i32 } @@ -11,6 +11,10 @@ entry: %tmp = load i32* %ttype, align 4 ; <i32> [#uses=1] %tmp1 = call i32 (...)* @bork( i32 %tmp ) ; <i32> [#uses=0] ret void + +; CHECK: @foo +; CHECK: lwzx +; CHECK: blr } declare i32 @bork(...) diff --git a/test/CodeGen/PowerPC/2010-02-12-saveCR.ll b/test/CodeGen/PowerPC/2010-02-12-saveCR.ll index 0da6e43..097611a 100644 --- a/test/CodeGen/PowerPC/2010-02-12-saveCR.ll +++ b/test/CodeGen/PowerPC/2010-02-12-saveCR.ll @@ -2,21 +2,21 @@ ; ModuleID = 'hh.c' target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128-n32" target triple = "powerpc-apple-darwin9.6" -; This formerly used R0 for both the stack address and CR. define void @foo() nounwind { entry: -;CHECK: mfcr r0 -;CHECK: lis r2, 1 -;CHECK: rlwinm r0, r0, 8, 0, 31 -;CHECK: ori r2, r2, 34540 -;CHECK: stwx r0, r1, r2 -; Make sure that the register scavenger returns the same temporary register. -;CHECK: lis r2, 1 -;CHECK: mfcr r0 -;CHECK: ori r2, r2, 34536 -;CHECK: rlwinm r0, r0, 12, 0, 31 -;CHECK: stwx r0, r1, r2 +; Note that part of what is being checked here is proper register reuse. +; CHECK: mfcr [[T1:r[0-9]+]] ; cr2 +; CHECK: lis [[T2:r[0-9]+]], 1 +; CHECK: addi r3, r1, 72 +; CHECK: rlwinm [[T1]], [[T1]], 8, 0, 31 +; CHECK: ori [[T2]], [[T2]], 34540 +; CHECK: stwx [[T1]], r1, [[T2]] +; CHECK: lis [[T3:r[0-9]+]], 1 +; CHECK: mfcr [[T4:r[0-9]+]] ; cr3 +; CHECK: ori [[T3]], [[T3]], 34536 +; CHECK: rlwinm [[T4]], [[T4]], 12, 0, 31 +; CHECK: stwx [[T4]], r1, [[T3]] %x = alloca [100000 x i8] ; <[100000 x i8]*> [#uses=1] %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] %x1 = bitcast [100000 x i8]* %x to i8* ; <i8*> [#uses=1] @@ -25,11 +25,16 @@ entry: br label %return return: ; preds = %entry -;CHECK: lis r2, 1 -;CHECK: ori r2, r2, 34540 -;CHECK: lwzx r0, r1, r2 -;CHECK: rlwinm r0, r0, 24, 0, 31 -;CHECK: mtcrf 32, r0 +; CHECK: lis [[T1:r[0-9]+]], 1 +; CHECK: ori [[T1]], [[T1]], 34536 +; CHECK: lwzx [[T1]], r1, [[T1]] +; CHECK: rlwinm [[T1]], [[T1]], 20, 0, 31 +; CHECK: mtcrf 16, [[T1]] +; CHECK: lis [[T1]], 1 +; CHECK: ori [[T1]], [[T1]], 34540 +; CHECK: lwzx [[T1]], r1, [[T1]] +; CHECK: rlwinm [[T1]], [[T1]], 24, 0, 31 +; CHECK: mtcrf 32, [[T1]] ret void } diff --git a/test/CodeGen/PowerPC/2011-12-05-NoSpillDupCR.ll b/test/CodeGen/PowerPC/2011-12-05-NoSpillDupCR.ll index 47d985c..3acd01d 100644 --- a/test/CodeGen/PowerPC/2011-12-05-NoSpillDupCR.ll +++ b/test/CodeGen/PowerPC/2011-12-05-NoSpillDupCR.ll @@ -47,11 +47,11 @@ for.body4.us: ; preds = %for.body4.lr.ph.us, %sext = shl i64 %sub5.us, 32 %idxprom.us = ashr exact i64 %sext, 32 %arrayidx.us = getelementptr inbounds [32000 x float]* @b, i64 0, i64 %idxprom.us - %2 = load float* %arrayidx.us, align 4, !tbaa !5 + %2 = load float* %arrayidx.us, align 4 %arrayidx7.us = getelementptr inbounds [32000 x float]* @a, i64 0, i64 %indvars.iv - %3 = load float* %arrayidx7.us, align 4, !tbaa !5 + %3 = load float* %arrayidx7.us, align 4 %add8.us = fadd float %3, %2 - store float %add8.us, float* %arrayidx7.us, align 4, !tbaa !5 + store float %add8.us, float* %arrayidx7.us, align 4 %indvars.iv.next = add i64 %indvars.iv, %1 %4 = trunc i64 %indvars.iv.next to i32 %cmp3.us = icmp slt i32 %4, 32000 @@ -82,11 +82,11 @@ for.body4.us.1: ; preds = %for.body4.us.1, %fo %sext23 = shl i64 %sub5.us.1, 32 %idxprom.us.1 = ashr exact i64 %sext23, 32 %arrayidx.us.1 = getelementptr inbounds [32000 x float]* @b, i64 0, i64 %idxprom.us.1 - %5 = load float* %arrayidx.us.1, align 4, !tbaa !5 + %5 = load float* %arrayidx.us.1, align 4 %arrayidx7.us.1 = getelementptr inbounds [32000 x float]* @a, i64 0, i64 %indvars.iv.1 - %6 = load float* %arrayidx7.us.1, align 4, !tbaa !5 + %6 = load float* %arrayidx7.us.1, align 4 %add8.us.1 = fadd float %6, %5 - store float %add8.us.1, float* %arrayidx7.us.1, align 4, !tbaa !5 + store float %add8.us.1, float* %arrayidx7.us.1, align 4 %indvars.iv.next.1 = add i64 %indvars.iv.1, %1 %7 = trunc i64 %indvars.iv.next.1 to i32 %cmp3.us.1 = icmp slt i32 %7, 32000 @@ -104,11 +104,11 @@ for.body4.us.2: ; preds = %for.body4.us.2, %fo %sext24 = shl i64 %sub5.us.2, 32 %idxprom.us.2 = ashr exact i64 %sext24, 32 %arrayidx.us.2 = getelementptr inbounds [32000 x float]* @b, i64 0, i64 %idxprom.us.2 - %8 = load float* %arrayidx.us.2, align 4, !tbaa !5 + %8 = load float* %arrayidx.us.2, align 4 %arrayidx7.us.2 = getelementptr inbounds [32000 x float]* @a, i64 0, i64 %indvars.iv.2 - %9 = load float* %arrayidx7.us.2, align 4, !tbaa !5 + %9 = load float* %arrayidx7.us.2, align 4 %add8.us.2 = fadd float %9, %8 - store float %add8.us.2, float* %arrayidx7.us.2, align 4, !tbaa !5 + store float %add8.us.2, float* %arrayidx7.us.2, align 4 %indvars.iv.next.2 = add i64 %indvars.iv.2, %1 %10 = trunc i64 %indvars.iv.next.2 to i32 %cmp3.us.2 = icmp slt i32 %10, 32000 @@ -126,11 +126,11 @@ for.body4.us.3: ; preds = %for.body4.us.3, %fo %sext25 = shl i64 %sub5.us.3, 32 %idxprom.us.3 = ashr exact i64 %sext25, 32 %arrayidx.us.3 = getelementptr inbounds [32000 x float]* @b, i64 0, i64 %idxprom.us.3 - %11 = load float* %arrayidx.us.3, align 4, !tbaa !5 + %11 = load float* %arrayidx.us.3, align 4 %arrayidx7.us.3 = getelementptr inbounds [32000 x float]* @a, i64 0, i64 %indvars.iv.3 - %12 = load float* %arrayidx7.us.3, align 4, !tbaa !5 + %12 = load float* %arrayidx7.us.3, align 4 %add8.us.3 = fadd float %12, %11 - store float %add8.us.3, float* %arrayidx7.us.3, align 4, !tbaa !5 + store float %add8.us.3, float* %arrayidx7.us.3, align 4 %indvars.iv.next.3 = add i64 %indvars.iv.3, %1 %13 = trunc i64 %indvars.iv.next.3 to i32 %cmp3.us.3 = icmp slt i32 %13, 32000 @@ -148,11 +148,11 @@ for.body4.us.4: ; preds = %for.body4.us.4, %fo %sext26 = shl i64 %sub5.us.4, 32 %idxprom.us.4 = ashr exact i64 %sext26, 32 %arrayidx.us.4 = getelementptr inbounds [32000 x float]* @b, i64 0, i64 %idxprom.us.4 - %14 = load float* %arrayidx.us.4, align 4, !tbaa !5 + %14 = load float* %arrayidx.us.4, align 4 %arrayidx7.us.4 = getelementptr inbounds [32000 x float]* @a, i64 0, i64 %indvars.iv.4 - %15 = load float* %arrayidx7.us.4, align 4, !tbaa !5 + %15 = load float* %arrayidx7.us.4, align 4 %add8.us.4 = fadd float %15, %14 - store float %add8.us.4, float* %arrayidx7.us.4, align 4, !tbaa !5 + store float %add8.us.4, float* %arrayidx7.us.4, align 4 %indvars.iv.next.4 = add i64 %indvars.iv.4, %1 %16 = trunc i64 %indvars.iv.next.4 to i32 %cmp3.us.4 = icmp slt i32 %16, 32000 @@ -183,9 +183,4 @@ declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, declare i32 @puts(i8* nocapture) nounwind -!0 = metadata !{metadata !"any pointer", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} !3 = metadata !{metadata !"branch_weights", i32 64, i32 4} -!4 = metadata !{metadata !"int", metadata !1} -!5 = metadata !{metadata !"float", metadata !1} diff --git a/test/CodeGen/PowerPC/2011-12-06-SpillAndRestoreCR.ll b/test/CodeGen/PowerPC/2011-12-06-SpillAndRestoreCR.ll index 52bf6c7..4a1a512 100644 --- a/test/CodeGen/PowerPC/2011-12-06-SpillAndRestoreCR.ll +++ b/test/CodeGen/PowerPC/2011-12-06-SpillAndRestoreCR.ll @@ -35,7 +35,7 @@ entry: for.body: ; preds = %for.end17, %entry %nl.041 = phi i32 [ 0, %entry ], [ %inc22, %for.end17 ] - %0 = load float* getelementptr inbounds ([256 x [256 x float]]* @aa, i64 0, i64 0, i64 0), align 16, !tbaa !5 + %0 = load float* getelementptr inbounds ([256 x [256 x float]]* @aa, i64 0, i64 0, i64 0), align 16 br label %for.cond5.preheader for.cond5.preheader: ; preds = %for.inc15, %for.body @@ -51,7 +51,7 @@ for.body7: ; preds = %for.body7, %for.con %xindex.234 = phi i32 [ %xindex.138, %for.cond5.preheader ], [ %xindex.3.15, %for.body7 ] %yindex.233 = phi i32 [ %yindex.137, %for.cond5.preheader ], [ %yindex.3.15, %for.body7 ] %arrayidx9 = getelementptr inbounds [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv - %1 = load float* %arrayidx9, align 16, !tbaa !5 + %1 = load float* %arrayidx9, align 16 %cmp10 = fcmp ogt float %1, %max.235 %2 = trunc i64 %indvars.iv to i32 %yindex.3 = select i1 %cmp10, i32 %2, i32 %yindex.233 @@ -60,7 +60,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3 = select i1 %cmp10, float %1, float %max.235 %indvars.iv.next45 = or i64 %indvars.iv, 1 %arrayidx9.1 = getelementptr inbounds [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next45 - %4 = load float* %arrayidx9.1, align 4, !tbaa !5 + %4 = load float* %arrayidx9.1, align 4 %cmp10.1 = fcmp ogt float %4, %max.3 %5 = trunc i64 %indvars.iv.next45 to i32 %yindex.3.1 = select i1 %cmp10.1, i32 %5, i32 %yindex.3 @@ -68,7 +68,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.1 = select i1 %cmp10.1, float %4, float %max.3 %indvars.iv.next.146 = or i64 %indvars.iv, 2 %arrayidx9.2 = getelementptr inbounds [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.146 - %6 = load float* %arrayidx9.2, align 8, !tbaa !5 + %6 = load float* %arrayidx9.2, align 8 %cmp10.2 = fcmp ogt float %6, %max.3.1 %7 = trunc i64 %indvars.iv.next.146 to i32 %yindex.3.2 = select i1 %cmp10.2, i32 %7, i32 %yindex.3.1 @@ -76,7 +76,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.2 = select i1 %cmp10.2, float %6, float %max.3.1 %indvars.iv.next.247 = or i64 %indvars.iv, 3 %arrayidx9.3 = getelementptr inbounds [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.247 - %8 = load float* %arrayidx9.3, align 4, !tbaa !5 + %8 = load float* %arrayidx9.3, align 4 %cmp10.3 = fcmp ogt float %8, %max.3.2 %9 = trunc i64 %indvars.iv.next.247 to i32 %yindex.3.3 = select i1 %cmp10.3, i32 %9, i32 %yindex.3.2 @@ -84,7 +84,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.3 = select i1 %cmp10.3, float %8, float %max.3.2 %indvars.iv.next.348 = or i64 %indvars.iv, 4 %arrayidx9.4 = getelementptr inbounds [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.348 - %10 = load float* %arrayidx9.4, align 16, !tbaa !5 + %10 = load float* %arrayidx9.4, align 16 %cmp10.4 = fcmp ogt float %10, %max.3.3 %11 = trunc i64 %indvars.iv.next.348 to i32 %yindex.3.4 = select i1 %cmp10.4, i32 %11, i32 %yindex.3.3 @@ -92,7 +92,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.4 = select i1 %cmp10.4, float %10, float %max.3.3 %indvars.iv.next.449 = or i64 %indvars.iv, 5 %arrayidx9.5 = getelementptr inbounds [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.449 - %12 = load float* %arrayidx9.5, align 4, !tbaa !5 + %12 = load float* %arrayidx9.5, align 4 %cmp10.5 = fcmp ogt float %12, %max.3.4 %13 = trunc i64 %indvars.iv.next.449 to i32 %yindex.3.5 = select i1 %cmp10.5, i32 %13, i32 %yindex.3.4 @@ -100,7 +100,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.5 = select i1 %cmp10.5, float %12, float %max.3.4 %indvars.iv.next.550 = or i64 %indvars.iv, 6 %arrayidx9.6 = getelementptr inbounds [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.550 - %14 = load float* %arrayidx9.6, align 8, !tbaa !5 + %14 = load float* %arrayidx9.6, align 8 %cmp10.6 = fcmp ogt float %14, %max.3.5 %15 = trunc i64 %indvars.iv.next.550 to i32 %yindex.3.6 = select i1 %cmp10.6, i32 %15, i32 %yindex.3.5 @@ -108,7 +108,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.6 = select i1 %cmp10.6, float %14, float %max.3.5 %indvars.iv.next.651 = or i64 %indvars.iv, 7 %arrayidx9.7 = getelementptr inbounds [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.651 - %16 = load float* %arrayidx9.7, align 4, !tbaa !5 + %16 = load float* %arrayidx9.7, align 4 %cmp10.7 = fcmp ogt float %16, %max.3.6 %17 = trunc i64 %indvars.iv.next.651 to i32 %yindex.3.7 = select i1 %cmp10.7, i32 %17, i32 %yindex.3.6 @@ -116,7 +116,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.7 = select i1 %cmp10.7, float %16, float %max.3.6 %indvars.iv.next.752 = or i64 %indvars.iv, 8 %arrayidx9.8 = getelementptr inbounds [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.752 - %18 = load float* %arrayidx9.8, align 16, !tbaa !5 + %18 = load float* %arrayidx9.8, align 16 %cmp10.8 = fcmp ogt float %18, %max.3.7 %19 = trunc i64 %indvars.iv.next.752 to i32 %yindex.3.8 = select i1 %cmp10.8, i32 %19, i32 %yindex.3.7 @@ -124,7 +124,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.8 = select i1 %cmp10.8, float %18, float %max.3.7 %indvars.iv.next.853 = or i64 %indvars.iv, 9 %arrayidx9.9 = getelementptr inbounds [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.853 - %20 = load float* %arrayidx9.9, align 4, !tbaa !5 + %20 = load float* %arrayidx9.9, align 4 %cmp10.9 = fcmp ogt float %20, %max.3.8 %21 = trunc i64 %indvars.iv.next.853 to i32 %yindex.3.9 = select i1 %cmp10.9, i32 %21, i32 %yindex.3.8 @@ -132,7 +132,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.9 = select i1 %cmp10.9, float %20, float %max.3.8 %indvars.iv.next.954 = or i64 %indvars.iv, 10 %arrayidx9.10 = getelementptr inbounds [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.954 - %22 = load float* %arrayidx9.10, align 8, !tbaa !5 + %22 = load float* %arrayidx9.10, align 8 %cmp10.10 = fcmp ogt float %22, %max.3.9 %23 = trunc i64 %indvars.iv.next.954 to i32 %yindex.3.10 = select i1 %cmp10.10, i32 %23, i32 %yindex.3.9 @@ -140,7 +140,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.10 = select i1 %cmp10.10, float %22, float %max.3.9 %indvars.iv.next.1055 = or i64 %indvars.iv, 11 %arrayidx9.11 = getelementptr inbounds [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.1055 - %24 = load float* %arrayidx9.11, align 4, !tbaa !5 + %24 = load float* %arrayidx9.11, align 4 %cmp10.11 = fcmp ogt float %24, %max.3.10 %25 = trunc i64 %indvars.iv.next.1055 to i32 %yindex.3.11 = select i1 %cmp10.11, i32 %25, i32 %yindex.3.10 @@ -148,7 +148,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.11 = select i1 %cmp10.11, float %24, float %max.3.10 %indvars.iv.next.1156 = or i64 %indvars.iv, 12 %arrayidx9.12 = getelementptr inbounds [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.1156 - %26 = load float* %arrayidx9.12, align 16, !tbaa !5 + %26 = load float* %arrayidx9.12, align 16 %cmp10.12 = fcmp ogt float %26, %max.3.11 %27 = trunc i64 %indvars.iv.next.1156 to i32 %yindex.3.12 = select i1 %cmp10.12, i32 %27, i32 %yindex.3.11 @@ -156,7 +156,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.12 = select i1 %cmp10.12, float %26, float %max.3.11 %indvars.iv.next.1257 = or i64 %indvars.iv, 13 %arrayidx9.13 = getelementptr inbounds [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.1257 - %28 = load float* %arrayidx9.13, align 4, !tbaa !5 + %28 = load float* %arrayidx9.13, align 4 %cmp10.13 = fcmp ogt float %28, %max.3.12 %29 = trunc i64 %indvars.iv.next.1257 to i32 %yindex.3.13 = select i1 %cmp10.13, i32 %29, i32 %yindex.3.12 @@ -164,7 +164,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.13 = select i1 %cmp10.13, float %28, float %max.3.12 %indvars.iv.next.1358 = or i64 %indvars.iv, 14 %arrayidx9.14 = getelementptr inbounds [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.1358 - %30 = load float* %arrayidx9.14, align 8, !tbaa !5 + %30 = load float* %arrayidx9.14, align 8 %cmp10.14 = fcmp ogt float %30, %max.3.13 %31 = trunc i64 %indvars.iv.next.1358 to i32 %yindex.3.14 = select i1 %cmp10.14, i32 %31, i32 %yindex.3.13 @@ -172,7 +172,7 @@ for.body7: ; preds = %for.body7, %for.con %max.3.14 = select i1 %cmp10.14, float %30, float %max.3.13 %indvars.iv.next.1459 = or i64 %indvars.iv, 15 %arrayidx9.15 = getelementptr inbounds [256 x [256 x float]]* @aa, i64 0, i64 %indvars.iv42, i64 %indvars.iv.next.1459 - %32 = load float* %arrayidx9.15, align 4, !tbaa !5 + %32 = load float* %arrayidx9.15, align 4 %cmp10.15 = fcmp ogt float %32, %max.3.14 %33 = trunc i64 %indvars.iv.next.1459 to i32 %yindex.3.15 = select i1 %cmp10.15, i32 %33, i32 %yindex.3.14 @@ -208,7 +208,7 @@ for.end23: ; preds = %for.end17 %add29 = fadd float %add, 1.000000e+00 %add31 = fadd float %add29, %conv18 %add32 = fadd float %add31, 1.000000e+00 - store float %add32, float* @temp, align 4, !tbaa !5 + store float %add32, float* @temp, align 4 tail call void @check(i32 -1) ret i32 0 } @@ -217,9 +217,4 @@ declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, declare i32 @puts(i8* nocapture) nounwind -!0 = metadata !{metadata !"any pointer", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} !3 = metadata !{metadata !"branch_weights", i32 64, i32 4} -!4 = metadata !{metadata !"int", metadata !1} -!5 = metadata !{metadata !"float", metadata !1} diff --git a/test/CodeGen/PowerPC/allocate-r0.ll b/test/CodeGen/PowerPC/allocate-r0.ll new file mode 100644 index 0000000..1cf4cec --- /dev/null +++ b/test/CodeGen/PowerPC/allocate-r0.ll @@ -0,0 +1,18 @@ +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 | FileCheck %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +define i64 @foo(i64 %a) nounwind { +entry: + call void asm sideeffect "", "~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12}"() nounwind + br label %return + +; CHECK: @foo +; Because r0 is allocatable, we can use it to hold r3 without spilling. +; CHECK: mr 0, 3 +; CHECK: mr 3, 0 + +return: ; preds = %entry + ret i64 %a +} + diff --git a/test/CodeGen/PowerPC/asym-regclass-copy.ll b/test/CodeGen/PowerPC/asym-regclass-copy.ll new file mode 100644 index 0000000..d04a6c9 --- /dev/null +++ b/test/CodeGen/PowerPC/asym-regclass-copy.ll @@ -0,0 +1,56 @@ +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +; This tests that the GPRC/GPRC_NOR0 intersection subclass relationship with +; GPRC is handled correctly. When it was not, this test would assert. + +@gen_random.last = external unnamed_addr global i64, align 8 +@.str = external unnamed_addr constant [4 x i8], align 1 + +declare double @gen_random(double) #0 + +declare void @benchmark_heapsort(i32 signext, double* nocapture) #0 + +define signext i32 @main(i32 signext %argc, i8** nocapture %argv) #0 { +entry: + br i1 undef, label %cond.true, label %cond.end + +cond.true: ; preds = %entry + br label %cond.end + +cond.end: ; preds = %cond.true, %entry + %cond = phi i32 [ 0, %cond.true ], [ 8000000, %entry ] + %add = add i32 %cond, 1 + %conv = sext i32 %add to i64 + %mul = shl nsw i64 %conv, 3 + %call1 = tail call noalias i8* @malloc(i64 %mul) #1 + br i1 undef, label %for.end, label %for.body.lr.ph + +for.body.lr.ph: ; preds = %cond.end + br label %for.body + +for.body: ; preds = %for.body, %for.body.lr.ph + %indvars.iv = phi i64 [ 1, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ] + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, %add + br i1 %exitcond, label %for.cond.for.end_crit_edge, label %for.body + +for.cond.for.end_crit_edge: ; preds = %for.body + br label %for.end + +for.end: ; preds = %for.cond.for.end_crit_edge, %cond.end + ret i32 0 +} + +declare noalias i8* @malloc(i64) #0 + +declare signext i32 @printf(i8* nocapture, ...) #0 + +declare void @free(i8* nocapture) #0 + +declare i64 @strtol(i8*, i8** nocapture, i32 signext) #0 + +attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind } diff --git a/test/CodeGen/PowerPC/atomic-1.ll b/test/CodeGen/PowerPC/atomic-1.ll index cbfa409..838db20 100644 --- a/test/CodeGen/PowerPC/atomic-1.ll +++ b/test/CodeGen/PowerPC/atomic-1.ll @@ -1,10 +1,10 @@ -; RUN: llc < %s -march=ppc32 | FileCheck %s +; RUN: llc < %s -mtriple=powerpc-apple-darwin -march=ppc32 | FileCheck %s define i32 @exchange_and_add(i32* %mem, i32 %val) nounwind { ; CHECK: exchange_and_add: -; CHECK: lwarx +; CHECK: lwarx {{r[0-9]+}}, 0, {{r[0-9]+}} %tmp = atomicrmw add i32* %mem, i32 %val monotonic -; CHECK: stwcx. +; CHECK: stwcx. {{r[0-9]+}}, 0, {{r[0-9]+}} ret i32 %tmp } diff --git a/test/CodeGen/PowerPC/bdzlr.ll b/test/CodeGen/PowerPC/bdzlr.ll new file mode 100644 index 0000000..656a858 --- /dev/null +++ b/test/CodeGen/PowerPC/bdzlr.ll @@ -0,0 +1,64 @@ +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +%struct.lua_TValue.17.692 = type { %union.Value.16.691, i32 } +%union.Value.16.691 = type { %union.GCObject.15.690* } +%union.GCObject.15.690 = type { %struct.lua_State.14.689 } +%struct.lua_State.14.689 = type { %union.GCObject.15.690*, i8, i8, i8, %struct.lua_TValue.17.692*, %struct.lua_TValue.17.692*, %struct.global_State.10.685*, %struct.CallInfo.11.686*, i32*, %struct.lua_TValue.17.692*, %struct.lua_TValue.17.692*, %struct.CallInfo.11.686*, %struct.CallInfo.11.686*, i32, i32, i16, i16, i8, i8, i32, i32, void (%struct.lua_State.14.689*, %struct.lua_Debug.12.687*)*, %struct.lua_TValue.17.692, %struct.lua_TValue.17.692, %union.GCObject.15.690*, %union.GCObject.15.690*, %struct.lua_longjmp.13.688*, i64 } +%struct.global_State.10.685 = type { %struct.stringtable.0.675, i8* (i8*, i8*, i64, i64)*, i8*, i8, i8, i32, %union.GCObject.15.690*, %union.GCObject.15.690**, %union.GCObject.15.690*, %union.GCObject.15.690*, %union.GCObject.15.690*, %union.GCObject.15.690*, %struct.Mbuffer.1.676, i64, i64, i64, i64, i32, i32, i32 (%struct.lua_State.14.689*)*, %struct.lua_TValue.17.692, %struct.lua_State.14.689*, %struct.UpVal.3.678, [9 x %struct.Table.7.682*], [17 x %union.TString.9.684*] } +%struct.stringtable.0.675 = type { %union.GCObject.15.690**, i32, i32 } +%struct.Mbuffer.1.676 = type { i8*, i64, i64 } +%struct.UpVal.3.678 = type { %union.GCObject.15.690*, i8, i8, %struct.lua_TValue.17.692*, %union.anon.2.677 } +%union.anon.2.677 = type { %struct.lua_TValue.17.692 } +%struct.Table.7.682 = type { %union.GCObject.15.690*, i8, i8, i8, i8, %struct.Table.7.682*, %struct.lua_TValue.17.692*, %struct.Node.6.681*, %struct.Node.6.681*, %union.GCObject.15.690*, i32 } +%struct.Node.6.681 = type { %struct.lua_TValue.17.692, %union.TKey.5.680 } +%union.TKey.5.680 = type { %struct.anon.0.4.679 } +%struct.anon.0.4.679 = type { %union.Value.16.691, i32, %struct.Node.6.681* } +%union.TString.9.684 = type { %struct.anon.1.8.683 } +%struct.anon.1.8.683 = type { %union.GCObject.15.690*, i8, i8, i8, i32, i64 } +%struct.CallInfo.11.686 = type { %struct.lua_TValue.17.692*, %struct.lua_TValue.17.692*, %struct.lua_TValue.17.692*, i32*, i32, i32 } +%struct.lua_Debug.12.687 = type { i32, i8*, i8*, i8*, i8*, i32, i32, i32, i32, [60 x i8], i32 } +%struct.lua_longjmp.13.688 = type opaque + +define void @lua_xmove(i32 signext %n) #0 { +entry: + br i1 undef, label %for.end, label %if.end + +if.end: ; preds = %entry + br i1 undef, label %for.body.lr.ph, label %for.end + +for.body.lr.ph: ; preds = %if.end + br label %for.body + +for.body: ; preds = %for.body.for.body_crit_edge, %for.body.lr.ph + %0 = phi %struct.lua_TValue.17.692* [ undef, %for.body.lr.ph ], [ %.pre, %for.body.for.body_crit_edge ] + %indvars.iv = phi i64 [ 0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body.for.body_crit_edge ] + %tt = getelementptr inbounds %struct.lua_TValue.17.692* %0, i64 %indvars.iv, i32 1 + %1 = load i32* %tt, align 4, !tbaa !0 + store i32 %1, i32* undef, align 4, !tbaa !0 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, %n + br i1 %exitcond, label %for.end, label %for.body.for.body_crit_edge + +for.body.for.body_crit_edge: ; preds = %for.body + %.pre = load %struct.lua_TValue.17.692** undef, align 8, !tbaa !3 + br label %for.body + +for.end: ; preds = %for.body, %if.end, %entry + ret void + +; CHECK: @lua_xmove +; CHECK: bnelr +; CHECK: bnelr +; CHECK: bdzlr +; CHECK-NOT: blr +} + +attributes #0 = { nounwind } + +!0 = metadata !{metadata !"int", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA"} +!3 = metadata !{metadata !"any pointer", metadata !1} diff --git a/test/CodeGen/PowerPC/bswap-load-store.ll b/test/CodeGen/PowerPC/bswap-load-store.ll index 4f6bfc7..53bbc52 100644 --- a/test/CodeGen/PowerPC/bswap-load-store.ll +++ b/test/CodeGen/PowerPC/bswap-load-store.ll @@ -1,5 +1,7 @@ -; RUN: llc < %s -march=ppc32 | FileCheck %s -check-prefix=X32 -; RUN: llc < %s -march=ppc64 | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -march=ppc32 -mcpu=ppc32 | FileCheck %s -check-prefix=X32 +; RUN: llc < %s -march=ppc64 -mcpu=ppc64 | FileCheck %s -check-prefix=X64 +; RUN: llc < %s -march=ppc64 -mcpu=pwr7 | FileCheck %s -check-prefix=PWR7 +; RUN: llc < %s -march=ppc32 -mcpu=pwr7 | FileCheck %s -check-prefix=X32 define void @STWBRX(i32 %i, i8* %ptr, i32 %off) { @@ -34,18 +36,47 @@ define i16 @LHBRX(i8* %ptr, i32 %off) { ret i16 %tmp6 } +define void @STDBRX(i64 %i, i8* %ptr, i64 %off) { + %tmp1 = getelementptr i8* %ptr, i64 %off ; <i8*> [#uses=1] + %tmp1.upgrd.1 = bitcast i8* %tmp1 to i64* ; <i64*> [#uses=1] + %tmp13 = tail call i64 @llvm.bswap.i64( i64 %i ) ; <i64> [#uses=1] + store i64 %tmp13, i64* %tmp1.upgrd.1 + ret void +} + +define i64 @LDBRX(i8* %ptr, i64 %off) { + %tmp1 = getelementptr i8* %ptr, i64 %off ; <i8*> [#uses=1] + %tmp1.upgrd.2 = bitcast i8* %tmp1 to i64* ; <i64*> [#uses=1] + %tmp = load i64* %tmp1.upgrd.2 ; <i64> [#uses=1] + %tmp14 = tail call i64 @llvm.bswap.i64( i64 %tmp ) ; <i64> [#uses=1] + ret i64 %tmp14 +} + declare i32 @llvm.bswap.i32(i32) declare i16 @llvm.bswap.i16(i16) +declare i64 @llvm.bswap.i64(i64) + ; X32: stwbrx ; X32: lwbrx ; X32: sthbrx ; X32: lhbrx +; X32-NOT: ldbrx +; X32-NOT: stdbrx ; X64: stwbrx ; X64: lwbrx ; X64: sthbrx ; X64: lhbrx +; X64-NOT: ldbrx +; X64-NOT: stdbrx + +; PWR7: stwbrx +; PWR7: lwbrx +; PWR7: sthbrx +; PWR7: lhbrx +; PWR7: stdbrx +; PWR7: ldbrx diff --git a/test/CodeGen/PowerPC/cr-spills.ll b/test/CodeGen/PowerPC/cr-spills.ll new file mode 100644 index 0000000..d6df7a2 --- /dev/null +++ b/test/CodeGen/PowerPC/cr-spills.ll @@ -0,0 +1,409 @@ +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 + +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +; This test case triggers several functions related to cr spilling, both in +; frame lowering and to handle cr register pressure. When the register kill +; flags were not being set correctly, this would cause the register scavenger to +; assert. + +@SetupFastFullPelSearch.orig_pels = external unnamed_addr global [768 x i16], align 2 +@weight_luma = external global i32 +@offset_luma = external global i32 +@wp_luma_round = external global i32, align 4 +@luma_log_weight_denom = external global i32, align 4 + +define void @SetupFastFullPelSearch() #0 { +entry: + %mul10 = mul nsw i32 undef, undef + br i1 undef, label %land.end, label %land.lhs.true + +land.lhs.true: ; preds = %entry + switch i32 0, label %land.end [ + i32 0, label %land.rhs + i32 3, label %land.rhs + ] + +land.rhs: ; preds = %land.lhs.true, %land.lhs.true + %tobool21 = icmp ne i32 undef, 0 + br label %land.end + +land.end: ; preds = %land.rhs, %land.lhs.true, %entry + %0 = phi i1 [ %tobool21, %land.rhs ], [ false, %land.lhs.true ], [ false, %entry ] + %cond = load i32** undef, align 8 + br i1 undef, label %if.then95, label %for.body.lr.ph + +if.then95: ; preds = %land.end + %cmp.i4.i1427 = icmp slt i32 undef, undef + br label %for.body.lr.ph + +for.body.lr.ph: ; preds = %if.then95, %land.end + br label %for.body + +for.body: ; preds = %for.body, %for.body.lr.ph + br i1 undef, label %for.body, label %for.body252 + +for.body252: ; preds = %for.inc997, %for.body + %shl263 = add i32 undef, 80 + br i1 %0, label %for.cond286.preheader, label %for.cond713.preheader + +for.cond286.preheader: ; preds = %for.body252 + br label %for.cond290.preheader + +for.cond290.preheader: ; preds = %for.end520, %for.cond286.preheader + %srcptr.31595 = phi i16* [ getelementptr inbounds ([768 x i16]* @SetupFastFullPelSearch.orig_pels, i64 0, i64 0), %for.cond286.preheader ], [ null, %for.end520 ] + %1 = load i32* undef, align 4, !tbaa !0 + %2 = load i32* @weight_luma, align 4, !tbaa !0 + %3 = load i32* @wp_luma_round, align 4, !tbaa !0 + %4 = load i32* @luma_log_weight_denom, align 4, !tbaa !0 + %5 = load i32* @offset_luma, align 4, !tbaa !0 + %incdec.ptr502.sum = add i64 undef, 16 + br label %for.body293 + +for.body293: ; preds = %for.body293, %for.cond290.preheader + %srcptr.41591 = phi i16* [ %srcptr.31595, %for.cond290.preheader ], [ undef, %for.body293 ] + %refptr.11590 = phi i16* [ undef, %for.cond290.preheader ], [ %add.ptr517, %for.body293 ] + %LineSadBlk0.01588 = phi i32 [ 0, %for.cond290.preheader ], [ %add346, %for.body293 ] + %LineSadBlk1.01587 = phi i32 [ 0, %for.cond290.preheader ], [ %add402, %for.body293 ] + %LineSadBlk3.01586 = phi i32 [ 0, %for.cond290.preheader ], [ %add514, %for.body293 ] + %LineSadBlk2.01585 = phi i32 [ 0, %for.cond290.preheader ], [ %add458, %for.body293 ] + %6 = load i16* %refptr.11590, align 2, !tbaa !3 + %conv294 = zext i16 %6 to i32 + %mul295 = mul nsw i32 %conv294, %2 + %add296 = add nsw i32 %mul295, %3 + %shr = ashr i32 %add296, %4 + %add297 = add nsw i32 %shr, %5 + %cmp.i.i1513 = icmp sgt i32 %add297, 0 + %cond.i.i1514 = select i1 %cmp.i.i1513, i32 %add297, i32 0 + %cmp.i4.i1515 = icmp slt i32 %cond.i.i1514, %1 + %cond.i5.i1516 = select i1 %cmp.i4.i1515, i32 %cond.i.i1514, i32 %1 + %7 = load i16* %srcptr.41591, align 2, !tbaa !3 + %conv300 = zext i16 %7 to i32 + %sub301 = sub nsw i32 %cond.i5.i1516, %conv300 + %idxprom302 = sext i32 %sub301 to i64 + %arrayidx303 = getelementptr inbounds i32* %cond, i64 %idxprom302 + %8 = load i32* %arrayidx303, align 4, !tbaa !0 + %add304 = add nsw i32 %8, %LineSadBlk0.01588 + %9 = load i32* undef, align 4, !tbaa !0 + %add318 = add nsw i32 %add304, %9 + %10 = load i16* undef, align 2, !tbaa !3 + %conv321 = zext i16 %10 to i32 + %mul322 = mul nsw i32 %conv321, %2 + %add323 = add nsw i32 %mul322, %3 + %shr324 = ashr i32 %add323, %4 + %add325 = add nsw i32 %shr324, %5 + %cmp.i.i1505 = icmp sgt i32 %add325, 0 + %cond.i.i1506 = select i1 %cmp.i.i1505, i32 %add325, i32 0 + %cmp.i4.i1507 = icmp slt i32 %cond.i.i1506, %1 + %cond.i5.i1508 = select i1 %cmp.i4.i1507, i32 %cond.i.i1506, i32 %1 + %sub329 = sub nsw i32 %cond.i5.i1508, 0 + %idxprom330 = sext i32 %sub329 to i64 + %arrayidx331 = getelementptr inbounds i32* %cond, i64 %idxprom330 + %11 = load i32* %arrayidx331, align 4, !tbaa !0 + %add332 = add nsw i32 %add318, %11 + %cmp.i.i1501 = icmp sgt i32 undef, 0 + %cond.i.i1502 = select i1 %cmp.i.i1501, i32 undef, i32 0 + %cmp.i4.i1503 = icmp slt i32 %cond.i.i1502, %1 + %cond.i5.i1504 = select i1 %cmp.i4.i1503, i32 %cond.i.i1502, i32 %1 + %incdec.ptr341 = getelementptr inbounds i16* %srcptr.41591, i64 4 + %12 = load i16* null, align 2, !tbaa !3 + %conv342 = zext i16 %12 to i32 + %sub343 = sub nsw i32 %cond.i5.i1504, %conv342 + %idxprom344 = sext i32 %sub343 to i64 + %arrayidx345 = getelementptr inbounds i32* %cond, i64 %idxprom344 + %13 = load i32* %arrayidx345, align 4, !tbaa !0 + %add346 = add nsw i32 %add332, %13 + %incdec.ptr348 = getelementptr inbounds i16* %refptr.11590, i64 5 + %14 = load i16* null, align 2, !tbaa !3 + %conv349 = zext i16 %14 to i32 + %mul350 = mul nsw i32 %conv349, %2 + %add351 = add nsw i32 %mul350, %3 + %shr352 = ashr i32 %add351, %4 + %add353 = add nsw i32 %shr352, %5 + %cmp.i.i1497 = icmp sgt i32 %add353, 0 + %cond.i.i1498 = select i1 %cmp.i.i1497, i32 %add353, i32 0 + %cmp.i4.i1499 = icmp slt i32 %cond.i.i1498, %1 + %cond.i5.i1500 = select i1 %cmp.i4.i1499, i32 %cond.i.i1498, i32 %1 + %incdec.ptr355 = getelementptr inbounds i16* %srcptr.41591, i64 5 + %15 = load i16* %incdec.ptr341, align 2, !tbaa !3 + %conv356 = zext i16 %15 to i32 + %sub357 = sub nsw i32 %cond.i5.i1500, %conv356 + %idxprom358 = sext i32 %sub357 to i64 + %arrayidx359 = getelementptr inbounds i32* %cond, i64 %idxprom358 + %16 = load i32* %arrayidx359, align 4, !tbaa !0 + %add360 = add nsw i32 %16, %LineSadBlk1.01587 + %incdec.ptr362 = getelementptr inbounds i16* %refptr.11590, i64 6 + %17 = load i16* %incdec.ptr348, align 2, !tbaa !3 + %conv363 = zext i16 %17 to i32 + %mul364 = mul nsw i32 %conv363, %2 + %add365 = add nsw i32 %mul364, %3 + %shr366 = ashr i32 %add365, %4 + %add367 = add nsw i32 %shr366, %5 + %cmp.i.i1493 = icmp sgt i32 %add367, 0 + %cond.i.i1494 = select i1 %cmp.i.i1493, i32 %add367, i32 0 + %cmp.i4.i1495 = icmp slt i32 %cond.i.i1494, %1 + %cond.i5.i1496 = select i1 %cmp.i4.i1495, i32 %cond.i.i1494, i32 %1 + %incdec.ptr369 = getelementptr inbounds i16* %srcptr.41591, i64 6 + %18 = load i16* %incdec.ptr355, align 2, !tbaa !3 + %conv370 = zext i16 %18 to i32 + %sub371 = sub nsw i32 %cond.i5.i1496, %conv370 + %idxprom372 = sext i32 %sub371 to i64 + %arrayidx373 = getelementptr inbounds i32* %cond, i64 %idxprom372 + %19 = load i32* %arrayidx373, align 4, !tbaa !0 + %add374 = add nsw i32 %add360, %19 + %incdec.ptr376 = getelementptr inbounds i16* %refptr.11590, i64 7 + %20 = load i16* %incdec.ptr362, align 2, !tbaa !3 + %conv377 = zext i16 %20 to i32 + %mul378 = mul nsw i32 %conv377, %2 + %add379 = add nsw i32 %mul378, %3 + %shr380 = ashr i32 %add379, %4 + %add381 = add nsw i32 %shr380, %5 + %cmp.i.i1489 = icmp sgt i32 %add381, 0 + %cond.i.i1490 = select i1 %cmp.i.i1489, i32 %add381, i32 0 + %cmp.i4.i1491 = icmp slt i32 %cond.i.i1490, %1 + %cond.i5.i1492 = select i1 %cmp.i4.i1491, i32 %cond.i.i1490, i32 %1 + %incdec.ptr383 = getelementptr inbounds i16* %srcptr.41591, i64 7 + %21 = load i16* %incdec.ptr369, align 2, !tbaa !3 + %conv384 = zext i16 %21 to i32 + %sub385 = sub nsw i32 %cond.i5.i1492, %conv384 + %idxprom386 = sext i32 %sub385 to i64 + %arrayidx387 = getelementptr inbounds i32* %cond, i64 %idxprom386 + %22 = load i32* %arrayidx387, align 4, !tbaa !0 + %add388 = add nsw i32 %add374, %22 + %23 = load i16* %incdec.ptr376, align 2, !tbaa !3 + %conv391 = zext i16 %23 to i32 + %mul392 = mul nsw i32 %conv391, %2 + %add395 = add nsw i32 0, %5 + %cmp.i.i1485 = icmp sgt i32 %add395, 0 + %cond.i.i1486 = select i1 %cmp.i.i1485, i32 %add395, i32 0 + %cmp.i4.i1487 = icmp slt i32 %cond.i.i1486, %1 + %cond.i5.i1488 = select i1 %cmp.i4.i1487, i32 %cond.i.i1486, i32 %1 + %incdec.ptr397 = getelementptr inbounds i16* %srcptr.41591, i64 8 + %24 = load i16* %incdec.ptr383, align 2, !tbaa !3 + %conv398 = zext i16 %24 to i32 + %sub399 = sub nsw i32 %cond.i5.i1488, %conv398 + %idxprom400 = sext i32 %sub399 to i64 + %arrayidx401 = getelementptr inbounds i32* %cond, i64 %idxprom400 + %25 = load i32* %arrayidx401, align 4, !tbaa !0 + %add402 = add nsw i32 %add388, %25 + %incdec.ptr404 = getelementptr inbounds i16* %refptr.11590, i64 9 + %cmp.i4.i1483 = icmp slt i32 undef, %1 + %cond.i5.i1484 = select i1 %cmp.i4.i1483, i32 undef, i32 %1 + %26 = load i16* %incdec.ptr397, align 2, !tbaa !3 + %conv412 = zext i16 %26 to i32 + %sub413 = sub nsw i32 %cond.i5.i1484, %conv412 + %idxprom414 = sext i32 %sub413 to i64 + %arrayidx415 = getelementptr inbounds i32* %cond, i64 %idxprom414 + %27 = load i32* %arrayidx415, align 4, !tbaa !0 + %add416 = add nsw i32 %27, %LineSadBlk2.01585 + %incdec.ptr418 = getelementptr inbounds i16* %refptr.11590, i64 10 + %28 = load i16* %incdec.ptr404, align 2, !tbaa !3 + %conv419 = zext i16 %28 to i32 + %mul420 = mul nsw i32 %conv419, %2 + %add421 = add nsw i32 %mul420, %3 + %shr422 = ashr i32 %add421, %4 + %add423 = add nsw i32 %shr422, %5 + %cmp.i.i1477 = icmp sgt i32 %add423, 0 + %cond.i.i1478 = select i1 %cmp.i.i1477, i32 %add423, i32 0 + %cmp.i4.i1479 = icmp slt i32 %cond.i.i1478, %1 + %cond.i5.i1480 = select i1 %cmp.i4.i1479, i32 %cond.i.i1478, i32 %1 + %incdec.ptr425 = getelementptr inbounds i16* %srcptr.41591, i64 10 + %sub427 = sub nsw i32 %cond.i5.i1480, 0 + %idxprom428 = sext i32 %sub427 to i64 + %arrayidx429 = getelementptr inbounds i32* %cond, i64 %idxprom428 + %29 = load i32* %arrayidx429, align 4, !tbaa !0 + %add430 = add nsw i32 %add416, %29 + %incdec.ptr432 = getelementptr inbounds i16* %refptr.11590, i64 11 + %30 = load i16* %incdec.ptr418, align 2, !tbaa !3 + %conv433 = zext i16 %30 to i32 + %mul434 = mul nsw i32 %conv433, %2 + %add435 = add nsw i32 %mul434, %3 + %shr436 = ashr i32 %add435, %4 + %add437 = add nsw i32 %shr436, %5 + %cmp.i.i1473 = icmp sgt i32 %add437, 0 + %cond.i.i1474 = select i1 %cmp.i.i1473, i32 %add437, i32 0 + %cmp.i4.i1475 = icmp slt i32 %cond.i.i1474, %1 + %cond.i5.i1476 = select i1 %cmp.i4.i1475, i32 %cond.i.i1474, i32 %1 + %31 = load i16* %incdec.ptr425, align 2, !tbaa !3 + %conv440 = zext i16 %31 to i32 + %sub441 = sub nsw i32 %cond.i5.i1476, %conv440 + %idxprom442 = sext i32 %sub441 to i64 + %arrayidx443 = getelementptr inbounds i32* %cond, i64 %idxprom442 + %32 = load i32* %arrayidx443, align 4, !tbaa !0 + %add444 = add nsw i32 %add430, %32 + %incdec.ptr446 = getelementptr inbounds i16* %refptr.11590, i64 12 + %33 = load i16* %incdec.ptr432, align 2, !tbaa !3 + %conv447 = zext i16 %33 to i32 + %mul448 = mul nsw i32 %conv447, %2 + %add449 = add nsw i32 %mul448, %3 + %shr450 = ashr i32 %add449, %4 + %add451 = add nsw i32 %shr450, %5 + %cmp.i.i1469 = icmp sgt i32 %add451, 0 + %cond.i.i1470 = select i1 %cmp.i.i1469, i32 %add451, i32 0 + %cmp.i4.i1471 = icmp slt i32 %cond.i.i1470, %1 + %cond.i5.i1472 = select i1 %cmp.i4.i1471, i32 %cond.i.i1470, i32 %1 + %incdec.ptr453 = getelementptr inbounds i16* %srcptr.41591, i64 12 + %34 = load i16* undef, align 2, !tbaa !3 + %conv454 = zext i16 %34 to i32 + %sub455 = sub nsw i32 %cond.i5.i1472, %conv454 + %idxprom456 = sext i32 %sub455 to i64 + %arrayidx457 = getelementptr inbounds i32* %cond, i64 %idxprom456 + %35 = load i32* %arrayidx457, align 4, !tbaa !0 + %add458 = add nsw i32 %add444, %35 + %incdec.ptr460 = getelementptr inbounds i16* %refptr.11590, i64 13 + %36 = load i16* %incdec.ptr446, align 2, !tbaa !3 + %conv461 = zext i16 %36 to i32 + %mul462 = mul nsw i32 %conv461, %2 + %add463 = add nsw i32 %mul462, %3 + %shr464 = ashr i32 %add463, %4 + %add465 = add nsw i32 %shr464, %5 + %cmp.i.i1465 = icmp sgt i32 %add465, 0 + %cond.i.i1466 = select i1 %cmp.i.i1465, i32 %add465, i32 0 + %cmp.i4.i1467 = icmp slt i32 %cond.i.i1466, %1 + %cond.i5.i1468 = select i1 %cmp.i4.i1467, i32 %cond.i.i1466, i32 %1 + %incdec.ptr467 = getelementptr inbounds i16* %srcptr.41591, i64 13 + %37 = load i16* %incdec.ptr453, align 2, !tbaa !3 + %conv468 = zext i16 %37 to i32 + %sub469 = sub nsw i32 %cond.i5.i1468, %conv468 + %idxprom470 = sext i32 %sub469 to i64 + %arrayidx471 = getelementptr inbounds i32* %cond, i64 %idxprom470 + %38 = load i32* %arrayidx471, align 4, !tbaa !0 + %add472 = add nsw i32 %38, %LineSadBlk3.01586 + %incdec.ptr474 = getelementptr inbounds i16* %refptr.11590, i64 14 + %add477 = add nsw i32 0, %3 + %shr478 = ashr i32 %add477, %4 + %add479 = add nsw i32 %shr478, %5 + %cmp.i.i1461 = icmp sgt i32 %add479, 0 + %cond.i.i1462 = select i1 %cmp.i.i1461, i32 %add479, i32 0 + %cmp.i4.i1463 = icmp slt i32 %cond.i.i1462, %1 + %cond.i5.i1464 = select i1 %cmp.i4.i1463, i32 %cond.i.i1462, i32 %1 + %incdec.ptr481 = getelementptr inbounds i16* %srcptr.41591, i64 14 + %39 = load i16* %incdec.ptr467, align 2, !tbaa !3 + %conv482 = zext i16 %39 to i32 + %sub483 = sub nsw i32 %cond.i5.i1464, %conv482 + %idxprom484 = sext i32 %sub483 to i64 + %arrayidx485 = getelementptr inbounds i32* %cond, i64 %idxprom484 + %40 = load i32* %arrayidx485, align 4, !tbaa !0 + %add486 = add nsw i32 %add472, %40 + %incdec.ptr488 = getelementptr inbounds i16* %refptr.11590, i64 15 + %41 = load i16* %incdec.ptr474, align 2, !tbaa !3 + %conv489 = zext i16 %41 to i32 + %mul490 = mul nsw i32 %conv489, %2 + %add491 = add nsw i32 %mul490, %3 + %shr492 = ashr i32 %add491, %4 + %add493 = add nsw i32 %shr492, %5 + %cmp.i.i1457 = icmp sgt i32 %add493, 0 + %cond.i.i1458 = select i1 %cmp.i.i1457, i32 %add493, i32 0 + %cmp.i4.i1459 = icmp slt i32 %cond.i.i1458, %1 + %cond.i5.i1460 = select i1 %cmp.i4.i1459, i32 %cond.i.i1458, i32 %1 + %incdec.ptr495 = getelementptr inbounds i16* %srcptr.41591, i64 15 + %42 = load i16* %incdec.ptr481, align 2, !tbaa !3 + %conv496 = zext i16 %42 to i32 + %sub497 = sub nsw i32 %cond.i5.i1460, %conv496 + %idxprom498 = sext i32 %sub497 to i64 + %arrayidx499 = getelementptr inbounds i32* %cond, i64 %idxprom498 + %43 = load i32* %arrayidx499, align 4, !tbaa !0 + %add500 = add nsw i32 %add486, %43 + %44 = load i16* %incdec.ptr488, align 2, !tbaa !3 + %conv503 = zext i16 %44 to i32 + %mul504 = mul nsw i32 %conv503, %2 + %add505 = add nsw i32 %mul504, %3 + %shr506 = ashr i32 %add505, %4 + %add507 = add nsw i32 %shr506, %5 + %cmp.i.i1453 = icmp sgt i32 %add507, 0 + %cond.i.i1454 = select i1 %cmp.i.i1453, i32 %add507, i32 0 + %cmp.i4.i1455 = icmp slt i32 %cond.i.i1454, %1 + %cond.i5.i1456 = select i1 %cmp.i4.i1455, i32 %cond.i.i1454, i32 %1 + %45 = load i16* %incdec.ptr495, align 2, !tbaa !3 + %conv510 = zext i16 %45 to i32 + %sub511 = sub nsw i32 %cond.i5.i1456, %conv510 + %idxprom512 = sext i32 %sub511 to i64 + %arrayidx513 = getelementptr inbounds i32* %cond, i64 %idxprom512 + %46 = load i32* %arrayidx513, align 4, !tbaa !0 + %add514 = add nsw i32 %add500, %46 + %add.ptr517 = getelementptr inbounds i16* %refptr.11590, i64 %incdec.ptr502.sum + %exitcond1692 = icmp eq i32 undef, 4 + br i1 %exitcond1692, label %for.end520, label %for.body293 + +for.end520: ; preds = %for.body293 + store i32 %add346, i32* undef, align 4, !tbaa !0 + store i32 %add402, i32* undef, align 4, !tbaa !0 + store i32 %add458, i32* undef, align 4, !tbaa !0 + store i32 %add514, i32* null, align 4, !tbaa !0 + br i1 undef, label %for.end543, label %for.cond290.preheader + +for.end543: ; preds = %for.end520 + br i1 undef, label %for.inc997, label %for.body549 + +for.body549: ; preds = %for.inc701, %for.end543 + %call554 = call i16* null(i16**** null, i32 signext undef, i32 signext %shl263) #1 + br label %for.cond559.preheader + +for.cond559.preheader: ; preds = %for.cond559.preheader, %for.body549 + br i1 undef, label %for.inc701, label %for.cond559.preheader + +for.inc701: ; preds = %for.cond559.preheader + br i1 undef, label %for.inc997, label %for.body549 + +for.cond713.preheader: ; preds = %for.end850, %for.body252 + br label %for.body716 + +for.body716: ; preds = %for.body716, %for.cond713.preheader + br i1 undef, label %for.end850, label %for.body716 + +for.end850: ; preds = %for.body716 + br i1 undef, label %for.end873, label %for.cond713.preheader + +for.end873: ; preds = %for.end850 + br i1 undef, label %for.inc997, label %for.body879 + +for.body879: ; preds = %for.inc992, %for.end873 + br label %for.cond889.preheader + +for.cond889.preheader: ; preds = %for.end964, %for.body879 + br i1 undef, label %for.cond894.preheader.lr.ph, label %for.end964 + +for.cond894.preheader.lr.ph: ; preds = %for.cond889.preheader + br label %for.body898.lr.ph.us + +for.end957.us: ; preds = %for.body946.us + br i1 undef, label %for.body898.lr.ph.us, label %for.end964 + +for.body946.us: ; preds = %for.body930.us, %for.body946.us + br i1 false, label %for.body946.us, label %for.end957.us + +for.body930.us: ; preds = %for.body914.us, %for.body930.us + br i1 undef, label %for.body930.us, label %for.body946.us + +for.body914.us: ; preds = %for.body898.us, %for.body914.us + br i1 undef, label %for.body914.us, label %for.body930.us + +for.body898.us: ; preds = %for.body898.lr.ph.us, %for.body898.us + br i1 undef, label %for.body898.us, label %for.body914.us + +for.body898.lr.ph.us: ; preds = %for.end957.us, %for.cond894.preheader.lr.ph + br label %for.body898.us + +for.end964: ; preds = %for.end957.us, %for.cond889.preheader + %inc990 = add nsw i32 undef, 1 + br i1 false, label %for.inc992, label %for.cond889.preheader + +for.inc992: ; preds = %for.end964 + br i1 false, label %for.inc997, label %for.body879 + +for.inc997: ; preds = %for.inc992, %for.end873, %for.inc701, %for.end543 + %cmp250 = icmp slt i32 undef, %mul10 + br i1 %cmp250, label %for.body252, label %for.end999 + +for.end999: ; preds = %for.inc997 + ret void +} + +attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind } + +!0 = metadata !{metadata !"int", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA"} +!3 = metadata !{metadata !"short", metadata !1} diff --git a/test/CodeGen/PowerPC/crsave.ll b/test/CodeGen/PowerPC/crsave.ll index 3e98dbd..d698ab0 100644 --- a/test/CodeGen/PowerPC/crsave.ll +++ b/test/CodeGen/PowerPC/crsave.ll @@ -1,5 +1,5 @@ ; RUN: llc -O0 -disable-fp-elim -mtriple=powerpc-unknown-linux-gnu < %s | FileCheck %s -check-prefix=PPC32 -; RUN: llc -O0 -disable-fp-elim -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s -check-prefix=PPC64 +; RUN: llc -O0 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck %s -check-prefix=PPC64 declare void @foo() @@ -19,9 +19,11 @@ entry: ; PPC32-NEXT: mtcrf 32, 12 ; PPC64: mfcr 12 -; PPC64-NEXT: stw 12, 8(1) +; PPC64: stw 12, 8(1) +; PPC64: stdu 1, -[[AMT:[0-9]+]](1) +; PPC64: addi 1, 1, [[AMT]] ; PPC64: lwz 12, 8(1) -; PPC64-NEXT: mtcrf 32, 12 +; PPC64: mtcrf 32, 12 define i32 @test_cr234() nounwind { entry: @@ -41,9 +43,11 @@ entry: ; PPC32-NEXT: mtcrf 8, 12 ; PPC64: mfcr 12 -; PPC64-NEXT: stw 12, 8(1) +; PPC64: stw 12, 8(1) +; PPC64: stdu 1, -[[AMT:[0-9]+]](1) +; PPC64: addi 1, 1, [[AMT]] ; PPC64: lwz 12, 8(1) -; PPC64-NEXT: mtcrf 32, 12 -; PPC64-NEXT: mtcrf 16, 12 -; PPC64-NEXT: mtcrf 8, 12 +; PPC64: mtcrf 32, 12 +; PPC64: mtcrf 16, 12 +; PPC64: mtcrf 8, 12 diff --git a/test/CodeGen/PowerPC/ctrloop-s000.ll b/test/CodeGen/PowerPC/ctrloop-s000.ll index dcea06f..4d8ef50 100644 --- a/test/CodeGen/PowerPC/ctrloop-s000.ll +++ b/test/CodeGen/PowerPC/ctrloop-s000.ll @@ -36,100 +36,100 @@ for.cond1.preheader: ; preds = %for.end, %entry for.body3: ; preds = %for.body3, %for.cond1.preheader %indvars.iv = phi i64 [ 0, %for.cond1.preheader ], [ %indvars.iv.next.15, %for.body3 ] %arrayidx = getelementptr inbounds [16000 x double]* @Y, i64 0, i64 %indvars.iv - %0 = load double* %arrayidx, align 32, !tbaa !0 + %0 = load double* %arrayidx, align 32 %add = fadd double %0, 1.000000e+00 %arrayidx5 = getelementptr inbounds [16000 x double]* @X, i64 0, i64 %indvars.iv - store double %add, double* %arrayidx5, align 32, !tbaa !0 + store double %add, double* %arrayidx5, align 32 %indvars.iv.next11 = or i64 %indvars.iv, 1 %arrayidx.1 = getelementptr inbounds [16000 x double]* @Y, i64 0, i64 %indvars.iv.next11 - %1 = load double* %arrayidx.1, align 8, !tbaa !0 + %1 = load double* %arrayidx.1, align 8 %add.1 = fadd double %1, 1.000000e+00 %arrayidx5.1 = getelementptr inbounds [16000 x double]* @X, i64 0, i64 %indvars.iv.next11 - store double %add.1, double* %arrayidx5.1, align 8, !tbaa !0 + store double %add.1, double* %arrayidx5.1, align 8 %indvars.iv.next.112 = or i64 %indvars.iv, 2 %arrayidx.2 = getelementptr inbounds [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.112 - %2 = load double* %arrayidx.2, align 16, !tbaa !0 + %2 = load double* %arrayidx.2, align 16 %add.2 = fadd double %2, 1.000000e+00 %arrayidx5.2 = getelementptr inbounds [16000 x double]* @X, i64 0, i64 %indvars.iv.next.112 - store double %add.2, double* %arrayidx5.2, align 16, !tbaa !0 + store double %add.2, double* %arrayidx5.2, align 16 %indvars.iv.next.213 = or i64 %indvars.iv, 3 %arrayidx.3 = getelementptr inbounds [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.213 - %3 = load double* %arrayidx.3, align 8, !tbaa !0 + %3 = load double* %arrayidx.3, align 8 %add.3 = fadd double %3, 1.000000e+00 %arrayidx5.3 = getelementptr inbounds [16000 x double]* @X, i64 0, i64 %indvars.iv.next.213 - store double %add.3, double* %arrayidx5.3, align 8, !tbaa !0 + store double %add.3, double* %arrayidx5.3, align 8 %indvars.iv.next.314 = or i64 %indvars.iv, 4 %arrayidx.4 = getelementptr inbounds [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.314 - %4 = load double* %arrayidx.4, align 32, !tbaa !0 + %4 = load double* %arrayidx.4, align 32 %add.4 = fadd double %4, 1.000000e+00 %arrayidx5.4 = getelementptr inbounds [16000 x double]* @X, i64 0, i64 %indvars.iv.next.314 - store double %add.4, double* %arrayidx5.4, align 32, !tbaa !0 + store double %add.4, double* %arrayidx5.4, align 32 %indvars.iv.next.415 = or i64 %indvars.iv, 5 %arrayidx.5 = getelementptr inbounds [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.415 - %5 = load double* %arrayidx.5, align 8, !tbaa !0 + %5 = load double* %arrayidx.5, align 8 %add.5 = fadd double %5, 1.000000e+00 %arrayidx5.5 = getelementptr inbounds [16000 x double]* @X, i64 0, i64 %indvars.iv.next.415 - store double %add.5, double* %arrayidx5.5, align 8, !tbaa !0 + store double %add.5, double* %arrayidx5.5, align 8 %indvars.iv.next.516 = or i64 %indvars.iv, 6 %arrayidx.6 = getelementptr inbounds [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.516 - %6 = load double* %arrayidx.6, align 16, !tbaa !0 + %6 = load double* %arrayidx.6, align 16 %add.6 = fadd double %6, 1.000000e+00 %arrayidx5.6 = getelementptr inbounds [16000 x double]* @X, i64 0, i64 %indvars.iv.next.516 - store double %add.6, double* %arrayidx5.6, align 16, !tbaa !0 + store double %add.6, double* %arrayidx5.6, align 16 %indvars.iv.next.617 = or i64 %indvars.iv, 7 %arrayidx.7 = getelementptr inbounds [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.617 - %7 = load double* %arrayidx.7, align 8, !tbaa !0 + %7 = load double* %arrayidx.7, align 8 %add.7 = fadd double %7, 1.000000e+00 %arrayidx5.7 = getelementptr inbounds [16000 x double]* @X, i64 0, i64 %indvars.iv.next.617 - store double %add.7, double* %arrayidx5.7, align 8, !tbaa !0 + store double %add.7, double* %arrayidx5.7, align 8 %indvars.iv.next.718 = or i64 %indvars.iv, 8 %arrayidx.8 = getelementptr inbounds [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.718 - %8 = load double* %arrayidx.8, align 32, !tbaa !0 + %8 = load double* %arrayidx.8, align 32 %add.8 = fadd double %8, 1.000000e+00 %arrayidx5.8 = getelementptr inbounds [16000 x double]* @X, i64 0, i64 %indvars.iv.next.718 - store double %add.8, double* %arrayidx5.8, align 32, !tbaa !0 + store double %add.8, double* %arrayidx5.8, align 32 %indvars.iv.next.819 = or i64 %indvars.iv, 9 %arrayidx.9 = getelementptr inbounds [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.819 - %9 = load double* %arrayidx.9, align 8, !tbaa !0 + %9 = load double* %arrayidx.9, align 8 %add.9 = fadd double %9, 1.000000e+00 %arrayidx5.9 = getelementptr inbounds [16000 x double]* @X, i64 0, i64 %indvars.iv.next.819 - store double %add.9, double* %arrayidx5.9, align 8, !tbaa !0 + store double %add.9, double* %arrayidx5.9, align 8 %indvars.iv.next.920 = or i64 %indvars.iv, 10 %arrayidx.10 = getelementptr inbounds [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.920 - %10 = load double* %arrayidx.10, align 16, !tbaa !0 + %10 = load double* %arrayidx.10, align 16 %add.10 = fadd double %10, 1.000000e+00 %arrayidx5.10 = getelementptr inbounds [16000 x double]* @X, i64 0, i64 %indvars.iv.next.920 - store double %add.10, double* %arrayidx5.10, align 16, !tbaa !0 + store double %add.10, double* %arrayidx5.10, align 16 %indvars.iv.next.1021 = or i64 %indvars.iv, 11 %arrayidx.11 = getelementptr inbounds [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.1021 - %11 = load double* %arrayidx.11, align 8, !tbaa !0 + %11 = load double* %arrayidx.11, align 8 %add.11 = fadd double %11, 1.000000e+00 %arrayidx5.11 = getelementptr inbounds [16000 x double]* @X, i64 0, i64 %indvars.iv.next.1021 - store double %add.11, double* %arrayidx5.11, align 8, !tbaa !0 + store double %add.11, double* %arrayidx5.11, align 8 %indvars.iv.next.1122 = or i64 %indvars.iv, 12 %arrayidx.12 = getelementptr inbounds [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.1122 - %12 = load double* %arrayidx.12, align 32, !tbaa !0 + %12 = load double* %arrayidx.12, align 32 %add.12 = fadd double %12, 1.000000e+00 %arrayidx5.12 = getelementptr inbounds [16000 x double]* @X, i64 0, i64 %indvars.iv.next.1122 - store double %add.12, double* %arrayidx5.12, align 32, !tbaa !0 + store double %add.12, double* %arrayidx5.12, align 32 %indvars.iv.next.1223 = or i64 %indvars.iv, 13 %arrayidx.13 = getelementptr inbounds [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.1223 - %13 = load double* %arrayidx.13, align 8, !tbaa !0 + %13 = load double* %arrayidx.13, align 8 %add.13 = fadd double %13, 1.000000e+00 %arrayidx5.13 = getelementptr inbounds [16000 x double]* @X, i64 0, i64 %indvars.iv.next.1223 - store double %add.13, double* %arrayidx5.13, align 8, !tbaa !0 + store double %add.13, double* %arrayidx5.13, align 8 %indvars.iv.next.1324 = or i64 %indvars.iv, 14 %arrayidx.14 = getelementptr inbounds [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.1324 - %14 = load double* %arrayidx.14, align 16, !tbaa !0 + %14 = load double* %arrayidx.14, align 16 %add.14 = fadd double %14, 1.000000e+00 %arrayidx5.14 = getelementptr inbounds [16000 x double]* @X, i64 0, i64 %indvars.iv.next.1324 - store double %add.14, double* %arrayidx5.14, align 16, !tbaa !0 + store double %add.14, double* %arrayidx5.14, align 16 %indvars.iv.next.1425 = or i64 %indvars.iv, 15 %arrayidx.15 = getelementptr inbounds [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.1425 - %15 = load double* %arrayidx.15, align 8, !tbaa !0 + %15 = load double* %arrayidx.15, align 8 %add.15 = fadd double %15, 1.000000e+00 %arrayidx5.15 = getelementptr inbounds [16000 x double]* @X, i64 0, i64 %indvars.iv.next.1425 - store double %add.15, double* %arrayidx5.15, align 8, !tbaa !0 + store double %add.15, double* %arrayidx5.15, align 8 %indvars.iv.next.15 = add i64 %indvars.iv, 16 %lftr.wideiv.15 = trunc i64 %indvars.iv.next.15 to i32 %exitcond.15 = icmp eq i32 %lftr.wideiv.15, 16000 @@ -150,7 +150,3 @@ for.end8: ; preds = %for.end } declare i32 @dummy(double*, double*, double*, double*, double*, [256 x double]*, [256 x double]*, [256 x double]*, double) - -!0 = metadata !{metadata !"double", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/PowerPC/ctrloop-sums.ll b/test/CodeGen/PowerPC/ctrloop-sums.ll index eae8c38..d9965f2 100644 --- a/test/CodeGen/PowerPC/ctrloop-sums.ll +++ b/test/CodeGen/PowerPC/ctrloop-sums.ll @@ -24,7 +24,7 @@ for.body3.us: ; preds = %for.body3.us, %for. %indvars.iv = phi i64 [ 0, %for.body3.lr.ph.us ], [ %indvars.iv.next, %for.body3.us ] %Result.111.us = phi i32 [ %Result.014.us, %for.body3.lr.ph.us ], [ %add.us, %for.body3.us ] %arrayidx5.us = getelementptr inbounds [100 x i32]* %Array, i64 %indvars.iv16, i64 %indvars.iv - %0 = load i32* %arrayidx5.us, align 4, !tbaa !0 + %0 = load i32* %arrayidx5.us, align 4 %add.us = add nsw i32 %0, %Result.111.us %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 @@ -60,7 +60,7 @@ for.body: ; preds = %for.body, %entry %0 = trunc i64 %indvars.iv33 to i32 %sub = sub i32 0, %0 %arrayidx2 = getelementptr inbounds [100 x [100 x i32]]* %Array, i64 0, i64 %indvars.iv33, i64 %indvars.iv33 - store i32 %sub, i32* %arrayidx2, align 4, !tbaa !0 + store i32 %sub, i32* %arrayidx2, align 4 %indvars.iv.next34 = add i64 %indvars.iv33, 1 %lftr.wideiv35 = trunc i64 %indvars.iv.next34 to i32 %exitcond36 = icmp eq i32 %lftr.wideiv35, 100 @@ -81,7 +81,7 @@ if.then: ; preds = %for.body8 %3 = add i64 %indvars.iv, %indvars.iv29 %arrayidx13 = getelementptr inbounds [100 x [100 x i32]]* %Array, i64 0, i64 %indvars.iv29, i64 %indvars.iv %4 = trunc i64 %3 to i32 - store i32 %4, i32* %arrayidx13, align 4, !tbaa !0 + store i32 %4, i32* %arrayidx13, align 4 br label %for.inc14 for.inc14: ; preds = %for.body8, %if.then @@ -106,7 +106,7 @@ for.body3.us.i: ; preds = %for.body3.lr.ph.us. %indvars.iv.i = phi i64 [ 0, %for.body3.lr.ph.us.i ], [ %indvars.iv.next.i, %for.body3.us.i ] %Result.111.us.i = phi i32 [ %Result.014.us.i, %for.body3.lr.ph.us.i ], [ %add.us.i, %for.body3.us.i ] %arrayidx5.us.i = getelementptr inbounds [100 x [100 x i32]]* %Array, i64 0, i64 %indvars.iv16.i, i64 %indvars.iv.i - %5 = load i32* %arrayidx5.us.i, align 4, !tbaa !0 + %5 = load i32* %arrayidx5.us.i, align 4 %add.us.i = add nsw i32 %5, %Result.111.us.i %indvars.iv.next.i = add i64 %indvars.iv.i, 1 %lftr.wideiv = trunc i64 %indvars.iv.next.i to i32 @@ -128,7 +128,3 @@ SumArray.exit: ; preds = %for.inc6.us.i } declare i32 @printf(i8* nocapture, ...) nounwind - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/PowerPC/ctrloops.ll b/test/CodeGen/PowerPC/ctrloops.ll index 4b6f7b9..f11e332 100644 --- a/test/CodeGen/PowerPC/ctrloops.ll +++ b/test/CodeGen/PowerPC/ctrloops.ll @@ -10,9 +10,9 @@ entry: for.body: ; preds = %for.body, %entry %i.01 = phi i32 [ 0, %entry ], [ %inc, %for.body ] - %0 = load volatile i32* @a, align 4, !tbaa !0 + %0 = load volatile i32* @a, align 4 %add = add nsw i32 %0, %c - store volatile i32 %add, i32* @a, align 4, !tbaa !0 + store volatile i32 %add, i32* @a, align 4 %inc = add nsw i32 %i.01, 1 %exitcond = icmp eq i32 %inc, 2048 br i1 %exitcond, label %for.end, label %for.body @@ -34,9 +34,9 @@ entry: for.body: ; preds = %entry, %for.body %i.02 = phi i32 [ %inc, %for.body ], [ 0, %entry ] - %0 = load volatile i32* @a, align 4, !tbaa !0 + %0 = load volatile i32* @a, align 4 %add = add nsw i32 %0, %c - store volatile i32 %add, i32* @a, align 4, !tbaa !0 + store volatile i32 %add, i32* @a, align 4 %inc = add nsw i32 %i.02, 1 %exitcond = icmp eq i32 %inc, %d br i1 %exitcond, label %for.end, label %for.body @@ -58,9 +58,9 @@ entry: for.body: ; preds = %entry, %for.body %i.02 = phi i32 [ %inc, %for.body ], [ 0, %entry ] %mul = mul nsw i32 %i.02, %c - %0 = load volatile i32* @a, align 4, !tbaa !0 + %0 = load volatile i32* @a, align 4 %add = add nsw i32 %0, %mul - store volatile i32 %add, i32* @a, align 4, !tbaa !0 + store volatile i32 %add, i32* @a, align 4 %inc = add nsw i32 %i.02, 1 %exitcond = icmp eq i32 %inc, %d br i1 %exitcond, label %for.end, label %for.body @@ -73,7 +73,3 @@ for.end: ; preds = %for.body, %entry ; CHECK-NOT: cmplwi ; CHECK: bdnz } - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/PowerPC/cttz.ll b/test/CodeGen/PowerPC/cttz.ll index 1d365d4..3757fa3 100644 --- a/test/CodeGen/PowerPC/cttz.ll +++ b/test/CodeGen/PowerPC/cttz.ll @@ -1,10 +1,12 @@ ; Make sure this testcase does not use ctpop -; RUN: llc < %s -march=ppc32 | grep -i cntlzw +; RUN: llc < %s -march=ppc32 -mcpu=g5 | FileCheck %s declare i32 @llvm.cttz.i32(i32, i1) define i32 @bar(i32 %x) { entry: +; CHECK: @bar +; CHECK: cntlzw %tmp.1 = call i32 @llvm.cttz.i32( i32 %x, i1 true ) ; <i32> [#uses=1] ret i32 %tmp.1 } diff --git a/test/CodeGen/PowerPC/dbg.ll b/test/CodeGen/PowerPC/dbg.ll index 220e7ed..21e3661 100644 --- a/test/CodeGen/PowerPC/dbg.ll +++ b/test/CodeGen/PowerPC/dbg.ll @@ -16,10 +16,10 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 720913, i32 0, i32 12, metadata !6, metadata !"clang version 3.1", i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 720913, i32 12, metadata !6, metadata !"clang version 3.1", i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} -!5 = metadata !{i32 720942, i32 0, metadata !6, metadata !"main", metadata !"main", metadata !"", metadata !6, i32 1, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i32 (i32, i8**)* @main, null, null, metadata !13} ; [ DW_TAG_subprogram ] +!5 = metadata !{i32 720942, metadata !6, metadata !"main", metadata !"main", metadata !"", metadata !6, i32 1, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i32 (i32, i8**)* @main, null, null, metadata !13} ; [ DW_TAG_subprogram ] !6 = metadata !{i32 720937, metadata !"dbg.c", metadata !"/src", null} ; [ DW_TAG_file_type ] !7 = metadata !{i32 720917, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !8 = metadata !{metadata !9, metadata !9, metadata !10} diff --git a/test/CodeGen/PowerPC/early-ret.ll b/test/CodeGen/PowerPC/early-ret.ll new file mode 100644 index 0000000..7d3e225 --- /dev/null +++ b/test/CodeGen/PowerPC/early-ret.ll @@ -0,0 +1,48 @@ +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +define void @foo(i32* %P) #0 { +entry: + %tobool = icmp eq i32* %P, null + br i1 %tobool, label %if.end, label %if.then + +if.then: ; preds = %entry + store i32 0, i32* %P, align 4 + br label %if.end + +if.end: ; preds = %entry, %if.then + ret void + +; CHECK: @foo +; CHECK: beqlr +; CHECK: blr +} + +define void @bar(i32* %P, i32* %Q) #0 { +entry: + %tobool = icmp eq i32* %P, null + br i1 %tobool, label %if.else, label %if.then + +if.then: ; preds = %entry + store i32 0, i32* %P, align 4 + %tobool1 = icmp eq i32* %Q, null + br i1 %tobool1, label %if.end3, label %if.then2 + +if.then2: ; preds = %if.then + store i32 1, i32* %Q, align 4 + br label %if.end3 + +if.else: ; preds = %entry + store i32 0, i32* %Q, align 4 + br label %if.end3 + +if.end3: ; preds = %if.then, %if.then2, %if.else + ret void + +; CHECK: @bar +; CHECK: beqlr +; CHECK: blr +} + +attributes #0 = { nounwind } diff --git a/test/CodeGen/PowerPC/early-ret2.ll b/test/CodeGen/PowerPC/early-ret2.ll new file mode 100644 index 0000000..a274e2c --- /dev/null +++ b/test/CodeGen/PowerPC/early-ret2.ll @@ -0,0 +1,25 @@ +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +define void @_Z8example3iPiS_() #0 { +entry: + br i1 undef, label %while.end, label %while.body.lr.ph + +while.body.lr.ph: ; preds = %entry + br i1 undef, label %while.end, label %while.body + +while.body: ; preds = %while.body, %while.body.lr.ph + br i1 false, label %while.end, label %while.body, !llvm.vectorizer.already_vectorized !0 + +while.end: ; preds = %while.body, %while.body.lr.ph, %entry + ret void + +; CHECK: @_Z8example3iPiS_ +; CHECK: bnelr +} + +attributes #0 = { noinline nounwind } + +!0 = metadata !{} + diff --git a/test/CodeGen/PowerPC/float-to-int.ll b/test/CodeGen/PowerPC/float-to-int.ll new file mode 100644 index 0000000..39cd4f9 --- /dev/null +++ b/test/CodeGen/PowerPC/float-to-int.ll @@ -0,0 +1,93 @@ +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 | FileCheck %s +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +define i64 @foo(float %a) nounwind { + %x = fptosi float %a to i64 + ret i64 %x + +; CHECK: @foo +; CHECK: fctidz [[REG:[0-9]+]], 1 +; CHECK: stfd [[REG]], +; CHECK: ld 3, +; CHECK: blr +} + +define i64 @foo2(double %a) nounwind { + %x = fptosi double %a to i64 + ret i64 %x + +; CHECK: @foo2 +; CHECK: fctidz [[REG:[0-9]+]], 1 +; CHECK: stfd [[REG]], +; CHECK: ld 3, +; CHECK: blr +} + +define i64 @foo3(float %a) nounwind { + %x = fptoui float %a to i64 + ret i64 %x + +; CHECK: @foo3 +; CHECK: fctiduz [[REG:[0-9]+]], 1 +; CHECK: stfd [[REG]], +; CHECK: ld 3, +; CHECK: blr +} + +define i64 @foo4(double %a) nounwind { + %x = fptoui double %a to i64 + ret i64 %x + +; CHECK: @foo4 +; CHECK: fctiduz [[REG:[0-9]+]], 1 +; CHECK: stfd [[REG]], +; CHECK: ld 3, +; CHECK: blr +} + +define i32 @goo(float %a) nounwind { + %x = fptosi float %a to i32 + ret i32 %x + +; CHECK: @goo +; CHECK: fctiwz [[REG:[0-9]+]], 1 +; CHECK: stfiwx [[REG]], +; CHECK: lwz 3, +; CHECK: blr +} + +define i32 @goo2(double %a) nounwind { + %x = fptosi double %a to i32 + ret i32 %x + +; CHECK: @goo2 +; CHECK: fctiwz [[REG:[0-9]+]], 1 +; CHECK: stfiwx [[REG]], +; CHECK: lwz 3, +; CHECK: blr +} + +define i32 @goo3(float %a) nounwind { + %x = fptoui float %a to i32 + ret i32 %x + +; CHECK: @goo3 +; CHECK: fctiwuz [[REG:[0-9]+]], 1 +; CHECK: stfiwx [[REG]], +; CHECK: lwz 3, +; CHECK: blr +} + +define i32 @goo4(double %a) nounwind { + %x = fptoui double %a to i32 + ret i32 %x + +; CHECK: @goo4 +; CHECK: fctiwuz [[REG:[0-9]+]], 1 +; CHECK: stfiwx [[REG]], +; CHECK: lwz 3, +; CHECK: blr +} + diff --git a/test/CodeGen/PowerPC/fma.ll b/test/CodeGen/PowerPC/fma.ll index 27496f7..a173c91 100644 --- a/test/CodeGen/PowerPC/fma.ll +++ b/test/CodeGen/PowerPC/fma.ll @@ -1,22 +1,30 @@ -; RUN: llc < %s -march=ppc32 -fp-contract=fast | \ -; RUN: egrep "fn?madd|fn?msub" | count 8 +; RUN: llc < %s -march=ppc32 -fp-contract=fast | FileCheck %s define double @test_FMADD1(double %A, double %B, double %C) { %D = fmul double %A, %B ; <double> [#uses=1] %E = fadd double %D, %C ; <double> [#uses=1] ret double %E +; CHECK: test_FMADD1: +; CHECK: fmadd +; CHECK-NEXT: blr } define double @test_FMADD2(double %A, double %B, double %C) { %D = fmul double %A, %B ; <double> [#uses=1] %E = fadd double %D, %C ; <double> [#uses=1] ret double %E +; CHECK: test_FMADD2: +; CHECK: fmadd +; CHECK-NEXT: blr } define double @test_FMSUB(double %A, double %B, double %C) { %D = fmul double %A, %B ; <double> [#uses=1] %E = fsub double %D, %C ; <double> [#uses=1] ret double %E +; CHECK: test_FMSUB: +; CHECK: fmsub +; CHECK-NEXT: blr } define double @test_FNMADD1(double %A, double %B, double %C) { @@ -24,6 +32,9 @@ define double @test_FNMADD1(double %A, double %B, double %C) { %E = fadd double %D, %C ; <double> [#uses=1] %F = fsub double -0.000000e+00, %E ; <double> [#uses=1] ret double %F +; CHECK: test_FNMADD1: +; CHECK: fnmadd +; CHECK-NEXT: blr } define double @test_FNMADD2(double %A, double %B, double %C) { @@ -31,12 +42,18 @@ define double @test_FNMADD2(double %A, double %B, double %C) { %E = fadd double %C, %D ; <double> [#uses=1] %F = fsub double -0.000000e+00, %E ; <double> [#uses=1] ret double %F +; CHECK: test_FNMADD2: +; CHECK: fnmadd +; CHECK-NEXT: blr } define double @test_FNMSUB1(double %A, double %B, double %C) { %D = fmul double %A, %B ; <double> [#uses=1] %E = fsub double %C, %D ; <double> [#uses=1] ret double %E +; CHECK: test_FNMSUB1: +; CHECK: fnmsub +; CHECK-NEXT: blr } define double @test_FNMSUB2(double %A, double %B, double %C) { @@ -44,6 +61,9 @@ define double @test_FNMSUB2(double %A, double %B, double %C) { %E = fsub double %D, %C ; <double> [#uses=1] %F = fsub double -0.000000e+00, %E ; <double> [#uses=1] ret double %F +; CHECK: test_FNMSUB2: +; CHECK: fnmsub +; CHECK-NEXT: blr } define float @test_FNMSUBS(float %A, float %B, float %C) { @@ -51,4 +71,7 @@ define float @test_FNMSUBS(float %A, float %B, float %C) { %E = fsub float %D, %C ; <float> [#uses=1] %F = fsub float -0.000000e+00, %E ; <float> [#uses=1] ret float %F +; CHECK: test_FNMSUBS: +; CHECK: fnmsubs +; CHECK-NEXT: blr } diff --git a/test/CodeGen/PowerPC/fold-zero.ll b/test/CodeGen/PowerPC/fold-zero.ll new file mode 100644 index 0000000..c7ec6fa --- /dev/null +++ b/test/CodeGen/PowerPC/fold-zero.ll @@ -0,0 +1,14 @@ +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +define i32 @test1(i1 %a, i32 %c) nounwind { + %x = select i1 %a, i32 %c, i32 0 + ret i32 %x + +; CHECK: @test1 +; CHECK-NOT: li {{[0-9]+}}, 0 +; CHECK: isel 3, 0, +; CHECK: blr +} + diff --git a/test/CodeGen/PowerPC/frameaddr.ll b/test/CodeGen/PowerPC/frameaddr.ll new file mode 100644 index 0000000..eabd4a6 --- /dev/null +++ b/test/CodeGen/PowerPC/frameaddr.ll @@ -0,0 +1,47 @@ +; RUN: llc < %s -mcpu=pwr7 | FileCheck %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +declare void @llvm.eh.sjlj.longjmp(i8*) #1 + +define i8* @main() #0 { +entry: + %0 = call i8* @llvm.frameaddress(i32 0) + ret i8* %0 + +; CHECK: @main +; CHECK: mr 3, 1 +} + +define i8* @foo() #3 { ; naked +entry: + %0 = call i8* @llvm.frameaddress(i32 0) + ret i8* %0 + +; CHECK: @foo +; CHECK: mr 3, 1 +} + +define i8* @bar() #0 { +entry: + %x = alloca [100000 x i8] ; <[100000 x i8]*> [#uses=1] + %x1 = bitcast [100000 x i8]* %x to i8* ; <i8*> [#uses=1] + call void @use(i8* %x1) nounwind + %0 = call i8* @llvm.frameaddress(i32 0) + ret i8* %0 + +; Note that if we start eliminating non-leaf frame pointers by default, this +; will need to be updated. +; CHECK: @bar +; CHECK: mr 3, 31 +} + +declare void @use(i8*) + +declare i8* @llvm.frameaddress(i32) #2 + +attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { noreturn nounwind } +attributes #2 = { nounwind readnone } +attributes #3 = { nounwind naked "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } + diff --git a/test/CodeGen/PowerPC/fsel.ll b/test/CodeGen/PowerPC/fsel.ll new file mode 100644 index 0000000..8cd43e6 --- /dev/null +++ b/test/CodeGen/PowerPC/fsel.ll @@ -0,0 +1,137 @@ +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -enable-no-infs-fp-math -enable-no-nans-fp-math | FileCheck -check-prefix=CHECK-FM %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +define double @zerocmp1(double %a, double %y, double %z) #0 { +entry: + %cmp = fcmp ult double %a, 0.000000e+00 + %z.y = select i1 %cmp, double %z, double %y + ret double %z.y + +; CHECK: @zerocmp1 +; CHECK-NOT: fsel +; CHECK: blr + +; CHECK-FM: @zerocmp1 +; CHECK-FM: fsel 1, 1, 2, 3 +; CHECK-FM: blr +} + +define double @zerocmp2(double %a, double %y, double %z) #0 { +entry: + %cmp = fcmp ogt double %a, 0.000000e+00 + %y.z = select i1 %cmp, double %y, double %z + ret double %y.z + +; CHECK: @zerocmp2 +; CHECK-NOT: fsel +; CHECK: blr + +; CHECK-FM: @zerocmp2 +; CHECK-FM: fneg [[REG:[0-9]+]], 1 +; CHECK-FM: fsel 1, [[REG]], 3, 2 +; CHECK-FM: blr +} + +define double @zerocmp3(double %a, double %y, double %z) #0 { +entry: + %cmp = fcmp oeq double %a, 0.000000e+00 + %y.z = select i1 %cmp, double %y, double %z + ret double %y.z + +; CHECK: @zerocmp3 +; CHECK-NOT: fsel +; CHECK: blr + +; CHECK-FM: @zerocmp3 +; CHECK-FM: fsel [[REG:[0-9]+]], 1, 2, 3 +; CHECK-FM: fneg [[REG2:[0-9]+]], 1 +; CHECK-FM: fsel 1, [[REG2]], [[REG]], 3 +; CHECK-FM: blr +} + +define double @min1(double %a, double %b) #0 { +entry: + %cmp = fcmp ole double %a, %b + %cond = select i1 %cmp, double %a, double %b + ret double %cond + +; CHECK: @min1 +; CHECK-NOT: fsel +; CHECK: blr + +; CHECK-FM: @min1 +; CHECK-FM: fsub [[REG:[0-9]+]], 2, 1 +; CHECK-FM: fsel 1, [[REG]], 1, 2 +; CHECK-FM: blr +} + +define double @max1(double %a, double %b) #0 { +entry: + %cmp = fcmp oge double %a, %b + %cond = select i1 %cmp, double %a, double %b + ret double %cond + +; CHECK: @max1 +; CHECK-NOT: fsel +; CHECK: blr + +; CHECK-FM: @max1 +; CHECK-FM: fsub [[REG:[0-9]+]], 1, 2 +; CHECK-FM: fsel 1, [[REG]], 1, 2 +; CHECK-FM: blr +} + +define double @cmp1(double %a, double %b, double %y, double %z) #0 { +entry: + %cmp = fcmp ult double %a, %b + %z.y = select i1 %cmp, double %z, double %y + ret double %z.y + +; CHECK: @cmp1 +; CHECK-NOT: fsel +; CHECK: blr + +; CHECK-FM: @cmp1 +; CHECK-FM: fsub [[REG:[0-9]+]], 1, 2 +; CHECK-FM: fsel 1, [[REG]], 3, 4 +; CHECK-FM: blr +} + +define double @cmp2(double %a, double %b, double %y, double %z) #0 { +entry: + %cmp = fcmp ogt double %a, %b + %y.z = select i1 %cmp, double %y, double %z + ret double %y.z + +; CHECK: @cmp2 +; CHECK-NOT: fsel +; CHECK: blr + +; CHECK-FM: @cmp2 +; CHECK-FM: fsub [[REG:[0-9]+]], 2, 1 +; CHECK-FM: fsel 1, [[REG]], 4, 3 +; CHECK-FM: blr +} + +define double @cmp3(double %a, double %b, double %y, double %z) #0 { +entry: + %cmp = fcmp oeq double %a, %b + %y.z = select i1 %cmp, double %y, double %z + ret double %y.z + +; CHECK: @cmp3 +; CHECK-NOT: fsel +; CHECK: blr + +; CHECK-FM: @cmp3 +; CHECK-FM: fsub [[REG:[0-9]+]], 1, 2 +; CHECK-FM: fsel [[REG2:[0-9]+]], [[REG]], 3, 4 +; CHECK-FM: fneg [[REG3:[0-9]+]], [[REG]] +; CHECK-FM: fsel 1, [[REG3]], [[REG2]], 4 +; CHECK-FM: blr +} + +attributes #0 = { nounwind readnone } + diff --git a/test/CodeGen/PowerPC/i32-to-float.ll b/test/CodeGen/PowerPC/i32-to-float.ll new file mode 100644 index 0000000..2707d03 --- /dev/null +++ b/test/CodeGen/PowerPC/i32-to-float.ll @@ -0,0 +1,82 @@ +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=g5 | FileCheck %s +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr6 | FileCheck -check-prefix=CHECK-PWR6 %s +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 | FileCheck -check-prefix=CHECK-A2 %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +define float @foo(i32 %a) nounwind { +entry: + %x = sitofp i32 %a to float + ret float %x + +; CHECK: @foo +; CHECK: extsw [[REG:[0-9]+]], 3 +; CHECK: std [[REG]], +; CHECK: lfd [[REG2:[0-9]+]], +; CHECK: fcfid [[REG3:[0-9]+]], [[REG2]] +; CHECK: frsp 1, [[REG3]] +; CHECK: blr + +; CHECK-PWR6: @foo +; CHECK-PWR6: stw 3, +; CHECK-PWR6: lfiwax [[REG:[0-9]+]], +; CHECK-PWR6: fcfid [[REG2:[0-9]+]], [[REG]] +; CHECK-PWR6: frsp 1, [[REG2]] +; CHECK-PWR6: blr + +; CHECK-A2: @foo +; CHECK-A2: stw 3, +; CHECK-A2: lfiwax [[REG:[0-9]+]], +; CHECK-A2: fcfids 1, [[REG]] +; CHECK-A2: blr +} + +define double @goo(i32 %a) nounwind { +entry: + %x = sitofp i32 %a to double + ret double %x + +; CHECK: @goo +; CHECK: extsw [[REG:[0-9]+]], 3 +; CHECK: std [[REG]], +; CHECK: lfd [[REG2:[0-9]+]], +; CHECK: fcfid 1, [[REG2]] +; CHECK: blr + +; CHECK-PWR6: @goo +; CHECK-PWR6: stw 3, +; CHECK-PWR6: lfiwax [[REG:[0-9]+]], +; CHECK-PWR6: fcfid 1, [[REG]] +; CHECK-PWR6: blr + +; CHECK-A2: @goo +; CHECK-A2: stw 3, +; CHECK-A2: lfiwax [[REG:[0-9]+]], +; CHECK-A2: fcfid 1, [[REG]] +; CHECK-A2: blr +} + +define float @foou(i32 %a) nounwind { +entry: + %x = uitofp i32 %a to float + ret float %x + +; CHECK-A2: @foou +; CHECK-A2: stw 3, +; CHECK-A2: lfiwzx [[REG:[0-9]+]], +; CHECK-A2: fcfidus 1, [[REG]] +; CHECK-A2: blr +} + +define double @goou(i32 %a) nounwind { +entry: + %x = uitofp i32 %a to double + ret double %x + +; CHECK-A2: @goou +; CHECK-A2: stw 3, +; CHECK-A2: lfiwzx [[REG:[0-9]+]], +; CHECK-A2: fcfidu 1, [[REG]] +; CHECK-A2: blr +} + diff --git a/test/CodeGen/PowerPC/i64-to-float.ll b/test/CodeGen/PowerPC/i64-to-float.ll new file mode 100644 index 0000000..b81d109 --- /dev/null +++ b/test/CodeGen/PowerPC/i64-to-float.ll @@ -0,0 +1,52 @@ +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 | FileCheck %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +define float @foo(i64 %a) nounwind { +entry: + %x = sitofp i64 %a to float + ret float %x + +; CHECK: @foo +; CHECK: std 3, +; CHECK: lfd [[REG:[0-9]+]], +; CHECK: fcfids 1, [[REG]] +; CHECK: blr +} + +define double @goo(i64 %a) nounwind { +entry: + %x = sitofp i64 %a to double + ret double %x + +; CHECK: @goo +; CHECK: std 3, +; CHECK: lfd [[REG:[0-9]+]], +; CHECK: fcfid 1, [[REG]] +; CHECK: blr +} + +define float @foou(i64 %a) nounwind { +entry: + %x = uitofp i64 %a to float + ret float %x + +; CHECK: @foou +; CHECK: std 3, +; CHECK: lfd [[REG:[0-9]+]], +; CHECK: fcfidus 1, [[REG]] +; CHECK: blr +} + +define double @goou(i64 %a) nounwind { +entry: + %x = uitofp i64 %a to double + ret double %x + +; CHECK: @goou +; CHECK: std 3, +; CHECK: lfd [[REG:[0-9]+]], +; CHECK: fcfidu 1, [[REG]] +; CHECK: blr +} + diff --git a/test/CodeGen/PowerPC/i64_fp_round.ll b/test/CodeGen/PowerPC/i64_fp_round.ll index 5ae1be8..d2a3239 100644 --- a/test/CodeGen/PowerPC/i64_fp_round.ll +++ b/test/CodeGen/PowerPC/i64_fp_round.ll @@ -1,4 +1,4 @@ -; RUN: llc -mcpu=pwr7 < %s | FileCheck %s +; RUN: llc -mcpu=pwr7 -mattr=-fpcvt < %s | FileCheck %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" @@ -22,6 +22,6 @@ entry: ; Also check that with -enable-unsafe-fp-math we do not get that extra ; code sequence. Simply verify that there is no "isel" present. -; RUN: llc -mcpu=pwr7 -enable-unsafe-fp-math < %s | FileCheck %s -check-prefix=UNSAFE +; RUN: llc -mcpu=pwr7 -mattr=-fpcvt -enable-unsafe-fp-math < %s | FileCheck %s -check-prefix=UNSAFE ; CHECK-UNSAFE-NOT: isel diff --git a/test/CodeGen/PowerPC/ifcvt.ll b/test/CodeGen/PowerPC/ifcvt.ll new file mode 100644 index 0000000..9c966c9 --- /dev/null +++ b/test/CodeGen/PowerPC/ifcvt.ll @@ -0,0 +1,34 @@ +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -verify-machineinstrs | FileCheck %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +define i32 @test(i32 %a, i32 %b, i32 %c, i32 %d) { +entry: + %sext82 = shl i32 %d, 16 + %conv29 = ashr exact i32 %sext82, 16 + %cmp = icmp slt i32 %sext82, 0 + br i1 %cmp, label %cond.true, label %cond.false + +cond.true: ; preds = %sw.epilog + %and33 = and i32 %conv29, 32767 + %sub34 = sub nsw i32 %a, %and33 + br label %cond.end + +cond.false: ; preds = %sw.epilog + %add37 = add nsw i32 %conv29, %a + br label %cond.end + +; CHECK: @test +; CHECK: add [[REG:[0-9]+]], +; CHECK: subf [[REG2:[0-9]+]], +; CHECK: isel {{[0-9]+}}, [[REG]], [[REG2]], + +cond.end: ; preds = %cond.false, %cond.true + %cond = phi i32 [ %sub34, %cond.true ], [ %add37, %cond.false ] + %sext83 = shl i32 %cond, 16 + %conv39 = ashr exact i32 %sext83, 16 + %add41 = sub i32 %b, %a + %sub43 = add i32 %add41, %conv39 + ret i32 %sub43 +} + diff --git a/test/CodeGen/PowerPC/jaggedstructs.ll b/test/CodeGen/PowerPC/jaggedstructs.ll index 62aa7cf..a10c5dd 100644 --- a/test/CodeGen/PowerPC/jaggedstructs.ll +++ b/test/CodeGen/PowerPC/jaggedstructs.ll @@ -23,22 +23,22 @@ entry: ; CHECK: std 4, 200(1) ; CHECK: std 3, 192(1) ; CHECK: lbz {{[0-9]+}}, 199(1) -; CHECK: stb {{[0-9]+}}, 55(1) ; CHECK: lhz {{[0-9]+}}, 197(1) +; CHECK: stb {{[0-9]+}}, 55(1) ; CHECK: sth {{[0-9]+}}, 53(1) ; CHECK: lbz {{[0-9]+}}, 207(1) -; CHECK: stb {{[0-9]+}}, 63(1) ; CHECK: lwz {{[0-9]+}}, 203(1) +; CHECK: stb {{[0-9]+}}, 63(1) ; CHECK: stw {{[0-9]+}}, 59(1) ; CHECK: lhz {{[0-9]+}}, 214(1) -; CHECK: sth {{[0-9]+}}, 70(1) ; CHECK: lwz {{[0-9]+}}, 210(1) +; CHECK: sth {{[0-9]+}}, 70(1) ; CHECK: stw {{[0-9]+}}, 66(1) ; CHECK: lbz {{[0-9]+}}, 223(1) -; CHECK: stb {{[0-9]+}}, 79(1) ; CHECK: lhz {{[0-9]+}}, 221(1) -; CHECK: sth {{[0-9]+}}, 77(1) ; CHECK: lwz {{[0-9]+}}, 217(1) +; CHECK: stb {{[0-9]+}}, 79(1) +; CHECK: sth {{[0-9]+}}, 77(1) ; CHECK: stw {{[0-9]+}}, 73(1) ; CHECK: ld 6, 72(1) ; CHECK: ld 5, 64(1) diff --git a/test/CodeGen/PowerPC/lbzux.ll b/test/CodeGen/PowerPC/lbzux.ll index 9895130..f3158b3 100644 --- a/test/CodeGen/PowerPC/lbzux.ll +++ b/test/CodeGen/PowerPC/lbzux.ll @@ -4,7 +4,7 @@ target triple = "powerpc64-unknown-linux-gnu" define fastcc void @allocateSpace(i1 %cond1, i1 %cond2) nounwind { entry: - %0 = load i8** undef, align 8, !tbaa !0 + %0 = load i8** undef, align 8 br i1 undef, label %return, label %lor.lhs.false lor.lhs.false: ; preds = %entry @@ -43,7 +43,3 @@ return: ; preds = %if.then45, %lor.lhs ; CHECK: @allocateSpace ; CHECK: lbzux } - -!0 = metadata !{metadata !"any pointer", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/PowerPC/lsa.ll b/test/CodeGen/PowerPC/lsa.ll new file mode 100644 index 0000000..8a6338e --- /dev/null +++ b/test/CodeGen/PowerPC/lsa.ll @@ -0,0 +1,43 @@ +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +define signext i32 @foo() #0 { +entry: + %v = alloca [8200 x i32], align 4 + %w = alloca [8200 x i32], align 4 + %q = alloca [8200 x i32], align 4 + %0 = bitcast [8200 x i32]* %v to i8* + call void @llvm.lifetime.start(i64 32800, i8* %0) #0 + %1 = bitcast [8200 x i32]* %w to i8* + call void @llvm.lifetime.start(i64 32800, i8* %1) #0 + %2 = bitcast [8200 x i32]* %q to i8* + call void @llvm.lifetime.start(i64 32800, i8* %2) #0 + %arraydecay = getelementptr inbounds [8200 x i32]* %q, i64 0, i64 0 + %arraydecay1 = getelementptr inbounds [8200 x i32]* %v, i64 0, i64 0 + %arraydecay2 = getelementptr inbounds [8200 x i32]* %w, i64 0, i64 0 + call void @bar(i32* %arraydecay, i32* %arraydecay1, i32* %arraydecay2) #0 + %3 = load i32* %arraydecay2, align 4 + %arrayidx3 = getelementptr inbounds [8200 x i32]* %w, i64 0, i64 1 + %4 = load i32* %arrayidx3, align 4 + +; CHECK: @foo +; CHECK-NOT: lwzx +; CHECK: lwz {{[0-9]+}}, 4([[REG:[0-9]+]]) +; CHECK: lwz {{[0-9]+}}, 0([[REG]]) +; CHECK: blr + + %add = add nsw i32 %4, %3 + call void @llvm.lifetime.end(i64 32800, i8* %2) #0 + call void @llvm.lifetime.end(i64 32800, i8* %1) #0 + call void @llvm.lifetime.end(i64 32800, i8* %0) #0 + ret i32 %add +} + +declare void @llvm.lifetime.start(i64, i8* nocapture) #0 + +declare void @bar(i32*, i32*, i32*) + +declare void @llvm.lifetime.end(i64, i8* nocapture) #0 + +attributes #0 = { nounwind } diff --git a/test/CodeGen/PowerPC/mcm-obj-2.ll b/test/CodeGen/PowerPC/mcm-obj-2.ll index 2dd1718..bc60b3b 100644 --- a/test/CodeGen/PowerPC/mcm-obj-2.ll +++ b/test/CodeGen/PowerPC/mcm-obj-2.ll @@ -1,5 +1,5 @@ ; RUN: llc -O1 -mcpu=pwr7 -code-model=medium -filetype=obj %s -o - | \ -; RUN: elf-dump --dump-section-data | FileCheck %s +; RUN: llvm-readobj -r | FileCheck %s ; FIXME: When asm-parse is available, could make this an assembly test. @@ -19,18 +19,11 @@ entry: ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for ; accessing function-scoped variable si. ; -; CHECK: Relocation 0 -; CHECK-NEXT: 'r_offset' -; CHECK-NEXT: 'r_sym', 0x[[SYM2:[0-9]+]] -; CHECK-NEXT: 'r_type', 0x00000032 -; CHECK: Relocation 1 -; CHECK-NEXT: 'r_offset' -; CHECK-NEXT: 'r_sym', 0x[[SYM2]] -; CHECK-NEXT: 'r_type', 0x00000030 -; CHECK: Relocation 2 -; CHECK-NEXT: 'r_offset' -; CHECK-NEXT: 'r_sym', 0x[[SYM2]] -; CHECK-NEXT: 'r_type', 0x00000030 +; CHECK: Relocations [ +; CHECK: Section (1) .text { +; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM2:[^ ]+]] +; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM2]] +; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM2]] @gi = global i32 5, align 4 @@ -45,18 +38,9 @@ entry: ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for ; accessing file-scope variable gi. ; -; CHECK: Relocation 3 -; CHECK-NEXT: 'r_offset' -; CHECK-NEXT: 'r_sym', 0x[[SYM3:[0-9]+]] -; CHECK-NEXT: 'r_type', 0x00000032 -; CHECK: Relocation 4 -; CHECK-NEXT: 'r_offset' -; CHECK-NEXT: 'r_sym', 0x[[SYM3]] -; CHECK-NEXT: 'r_type', 0x00000030 -; CHECK: Relocation 5 -; CHECK-NEXT: 'r_offset' -; CHECK-NEXT: 'r_sym', 0x[[SYM3]] -; CHECK-NEXT: 'r_type', 0x00000030 +; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM3:[^ ]+]] +; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM3]] +; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM3]] define double @test_double_const() nounwind { entry: @@ -66,12 +50,5 @@ entry: ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for ; accessing a constant. ; -; CHECK: Relocation 6 -; CHECK-NEXT: 'r_offset' -; CHECK-NEXT: 'r_sym', 0x[[SYM4:[0-9]+]] -; CHECK-NEXT: 'r_type', 0x00000032 -; CHECK: Relocation 7 -; CHECK-NEXT: 'r_offset' -; CHECK-NEXT: 'r_sym', 0x[[SYM4]] -; CHECK-NEXT: 'r_type', 0x00000030 - +; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM4:[^ ]+]] +; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM4]] diff --git a/test/CodeGen/PowerPC/mcm-obj.ll b/test/CodeGen/PowerPC/mcm-obj.ll index 117c3b3..720c5fb 100644 --- a/test/CodeGen/PowerPC/mcm-obj.ll +++ b/test/CodeGen/PowerPC/mcm-obj.ll @@ -1,7 +1,7 @@ ; RUN: llc -O0 -mcpu=pwr7 -code-model=medium -filetype=obj %s -o - | \ -; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=MEDIUM %s +; RUN: llvm-readobj -r | FileCheck -check-prefix=MEDIUM %s ; RUN: llc -O0 -mcpu=pwr7 -code-model=large -filetype=obj %s -o - | \ -; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=LARGE %s +; RUN: llvm-readobj -r | FileCheck -check-prefix=LARGE %s ; FIXME: When asm-parse is available, could make this an assembly test. @@ -21,25 +21,15 @@ entry: ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for ; accessing external variable ei. ; -; MEDIUM: '.rela.text' -; MEDIUM: Relocation 0 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM1:[0-9]+]] -; MEDIUM-NEXT: 'r_type', 0x00000032 -; MEDIUM: Relocation 1 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM1]] -; MEDIUM-NEXT: 'r_type', 0x00000040 +; MEDIUM: Relocations [ +; MEDIUM: Section (1) .text { +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM1:[^ ]+]] +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]] ; -; LARGE: '.rela.text' -; LARGE: Relocation 0 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM1:[0-9]+]] -; LARGE-NEXT: 'r_type', 0x00000032 -; LARGE: Relocation 1 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM1]] -; LARGE-NEXT: 'r_type', 0x00000040 +; LARGE: Relocations [ +; LARGE: Section (1) .text { +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM1:[^ ]+]] +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM1]] @test_fn_static.si = internal global i32 0, align 4 @@ -54,26 +44,14 @@ entry: ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for ; accessing function-scoped variable si. ; -; MEDIUM: Relocation 2 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM2:[0-9]+]] -; MEDIUM-NEXT: 'r_type', 0x00000032 -; MEDIUM: Relocation 3 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM2]] -; MEDIUM-NEXT: 'r_type', 0x00000030 +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM2:[^ ]+]] +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM2]] ; ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for ; accessing function-scoped variable si. ; -; LARGE: Relocation 2 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM2:[0-9]+]] -; LARGE-NEXT: 'r_type', 0x00000032 -; LARGE: Relocation 3 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM2]] -; LARGE-NEXT: 'r_type', 0x00000040 +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM2:[^ ]+]] +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM2]] @gi = global i32 5, align 4 @@ -88,26 +66,14 @@ entry: ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for ; accessing file-scope variable gi. ; -; MEDIUM: Relocation 4 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM3:[0-9]+]] -; MEDIUM-NEXT: 'r_type', 0x00000032 -; MEDIUM: Relocation 5 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM3]] -; MEDIUM-NEXT: 'r_type', 0x00000030 +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM3:[^ ]+]] +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM3]] ; ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for ; accessing file-scope variable gi. ; -; LARGE: Relocation 4 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM3:[0-9]+]] -; LARGE-NEXT: 'r_type', 0x00000032 -; LARGE: Relocation 5 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM3]] -; LARGE-NEXT: 'r_type', 0x00000040 +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM3:[^ ]+]] +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM3]] define double @test_double_const() nounwind { entry: @@ -117,26 +83,14 @@ entry: ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO for ; accessing a constant. ; -; MEDIUM: Relocation 6 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM4:[0-9]+]] -; MEDIUM-NEXT: 'r_type', 0x00000032 -; MEDIUM: Relocation 7 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM4]] -; MEDIUM-NEXT: 'r_type', 0x00000030 +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM4:[^ ]+]] +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO [[SYM4]] ; ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for ; accessing a constant. ; -; LARGE: Relocation 6 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM4:[0-9]+]] -; LARGE-NEXT: 'r_type', 0x00000032 -; LARGE: Relocation 7 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM4]] -; LARGE-NEXT: 'r_type', 0x00000040 +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM4:[^ ]+]] +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM4]] define signext i32 @test_jump_table(i32 signext %i) nounwind { entry: @@ -185,23 +139,11 @@ sw.epilog: ; preds = %sw.bb3, %sw.default ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for ; accessing a jump table address. ; -; MEDIUM: Relocation 8 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM5:[0-9]+]] -; MEDIUM-NEXT: 'r_type', 0x00000032 -; MEDIUM: Relocation 9 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM5]] -; MEDIUM-NEXT: 'r_type', 0x00000040 +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM5:[^ ]+]] +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM5]] ; -; LARGE: Relocation 8 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM5:[0-9]+]] -; LARGE-NEXT: 'r_type', 0x00000032 -; LARGE: Relocation 9 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM5]] -; LARGE-NEXT: 'r_type', 0x00000040 +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM5:[^ ]+]] +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM5]] @ti = common global i32 0, align 4 @@ -216,23 +158,11 @@ entry: ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for ; accessing tentatively declared variable ti. ; -; MEDIUM: Relocation 10 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM6:[0-9]+]] -; MEDIUM-NEXT: 'r_type', 0x00000032 -; MEDIUM: Relocation 11 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM6]] -; MEDIUM-NEXT: 'r_type', 0x00000040 +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM6:[^ ]+]] +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]] ; -; LARGE: Relocation 10 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM6:[0-9]+]] -; LARGE-NEXT: 'r_type', 0x00000032 -; LARGE: Relocation 11 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM6]] -; LARGE-NEXT: 'r_type', 0x00000040 +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM6:[^ ]+]] +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM6]] define i8* @test_fnaddr() nounwind { entry: @@ -248,21 +178,8 @@ declare signext i32 @foo(i32 signext) ; Verify generation of R_PPC64_TOC16_HA and R_PPC64_TOC16_LO_DS for ; accessing function address foo. ; -; MEDIUM: Relocation 12 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM7:[0-9]+]] -; MEDIUM-NEXT: 'r_type', 0x00000032 -; MEDIUM: Relocation 13 -; MEDIUM-NEXT: 'r_offset' -; MEDIUM-NEXT: 'r_sym', 0x[[SYM7]] -; MEDIUM-NEXT: 'r_type', 0x00000040 +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM7:[^ ]+]] +; MEDIUM-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM7]] ; -; LARGE: Relocation 12 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM7:[0-9]+]] -; LARGE-NEXT: 'r_type', 0x00000032 -; LARGE: Relocation 13 -; LARGE-NEXT: 'r_offset' -; LARGE-NEXT: 'r_sym', 0x[[SYM7]] -; LARGE-NEXT: 'r_type', 0x00000040 - +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_HA [[SYM7:[^ ]+]] +; LARGE-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_LO_DS [[SYM7]] diff --git a/test/CodeGen/PowerPC/negctr.ll b/test/CodeGen/PowerPC/negctr.ll index 9b438a1..2f6995c 100644 --- a/test/CodeGen/PowerPC/negctr.ll +++ b/test/CodeGen/PowerPC/negctr.ll @@ -1,4 +1,5 @@ ; RUN: llc < %s -mcpu=a2 | FileCheck %s +; RUN: llc < %s -mcpu=a2 -disable-lsr | FileCheck -check-prefix=NOLSR %s target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" target triple = "powerpc64-unknown-linux-gnu" @@ -60,4 +61,23 @@ for.end: ; preds = %for.body, %entry ret void } +define void @main3() #0 { +entry: + br i1 undef, label %for.end, label %for.body + +for.body: ; preds = %for.body, %entry + %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 127984, %entry ] + %indvars.iv.next = add i64 %indvars.iv, -16 + %exitcond = icmp eq i64 %indvars.iv.next, -16 + br i1 %exitcond, label %for.end, label %for.body + +; NOLSR: @main3 +; NOLSR: li [[REG:[0-9]+]], 8000 +; NOLSR: mtctr [[REG]] +; NOLSR: bdnz + +for.end: ; preds = %for.body, %entry + ret void +} + attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } diff --git a/test/CodeGen/PowerPC/optcmp.ll b/test/CodeGen/PowerPC/optcmp.ll new file mode 100644 index 0000000..1fce464 --- /dev/null +++ b/test/CodeGen/PowerPC/optcmp.ll @@ -0,0 +1,143 @@ +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 -disable-ppc-cmp-opt=0 | FileCheck %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +define signext i32 @foo(i32 signext %a, i32 signext %b, i32* nocapture %c) #0 { +entry: + %sub = sub nsw i32 %a, %b + store i32 %sub, i32* %c, align 4, !tbaa !0 + %cmp = icmp sgt i32 %a, %b + %cond = select i1 %cmp, i32 %a, i32 %b + ret i32 %cond + +; CHECK: @foo +; CHECK-NOT: subf. +} + +define signext i32 @foo2(i32 signext %a, i32 signext %b, i32* nocapture %c) #0 { +entry: + %shl = shl i32 %a, %b + store i32 %shl, i32* %c, align 4, !tbaa !0 + %cmp = icmp sgt i32 %shl, 0 + %conv = zext i1 %cmp to i32 + ret i32 %conv + +; CHECK: @foo2 +; CHECK-NOT: slw. +} + +define i64 @fool(i64 %a, i64 %b, i64* nocapture %c) #0 { +entry: + %sub = sub nsw i64 %a, %b + store i64 %sub, i64* %c, align 8, !tbaa !3 + %cmp = icmp sgt i64 %a, %b + %cond = select i1 %cmp, i64 %a, i64 %b + ret i64 %cond + +; CHECK: @fool +; CHECK: subf. [[REG:[0-9]+]], 4, 3 +; CHECK: isel 3, 3, 4, 1 +; CHECK: std [[REG]], 0(5) +} + +define i64 @foolb(i64 %a, i64 %b, i64* nocapture %c) #0 { +entry: + %sub = sub nsw i64 %a, %b + store i64 %sub, i64* %c, align 8, !tbaa !3 + %cmp = icmp sle i64 %a, %b + %cond = select i1 %cmp, i64 %a, i64 %b + ret i64 %cond + +; CHECK: @foolb +; CHECK: subf. [[REG:[0-9]+]], 4, 3 +; CHECK: isel 3, 4, 3, 1 +; CHECK: std [[REG]], 0(5) +} + +define i64 @foolc(i64 %a, i64 %b, i64* nocapture %c) #0 { +entry: + %sub = sub nsw i64 %b, %a + store i64 %sub, i64* %c, align 8, !tbaa !3 + %cmp = icmp sgt i64 %a, %b + %cond = select i1 %cmp, i64 %a, i64 %b + ret i64 %cond + +; CHECK: @foolc +; CHECK: subf. [[REG:[0-9]+]], 3, 4 +; CHECK: isel 3, 3, 4, 0 +; CHECK: std [[REG]], 0(5) +} + +define i64 @foold(i64 %a, i64 %b, i64* nocapture %c) #0 { +entry: + %sub = sub nsw i64 %b, %a + store i64 %sub, i64* %c, align 8, !tbaa !3 + %cmp = icmp eq i64 %a, %b + %cond = select i1 %cmp, i64 %a, i64 %b + ret i64 %cond + +; CHECK: @foold +; CHECK: subf. [[REG:[0-9]+]], 3, 4 +; CHECK: isel 3, 3, 4, 2 +; CHECK: std [[REG]], 0(5) +} + +define i64 @foold2(i64 %a, i64 %b, i64* nocapture %c) #0 { +entry: + %sub = sub nsw i64 %a, %b + store i64 %sub, i64* %c, align 8, !tbaa !3 + %cmp = icmp eq i64 %a, %b + %cond = select i1 %cmp, i64 %a, i64 %b + ret i64 %cond + +; CHECK: @foold2 +; CHECK: subf. [[REG:[0-9]+]], 4, 3 +; CHECK: isel 3, 3, 4, 2 +; CHECK: std [[REG]], 0(5) +} + +define i64 @foo2l(i64 %a, i64 %b, i64* nocapture %c) #0 { +entry: + %shl = shl i64 %a, %b + store i64 %shl, i64* %c, align 8, !tbaa !3 + %cmp = icmp sgt i64 %shl, 0 + %conv1 = zext i1 %cmp to i64 + ret i64 %conv1 + +; CHECK: @foo2l +; CHECK: sld. 4, 3, 4 +; CHECK: std 4, 0(5) +} + +define double @food(double %a, double %b, double* nocapture %c) #0 { +entry: + %sub = fsub double %a, %b + store double %sub, double* %c, align 8, !tbaa !3 + %cmp = fcmp ogt double %a, %b + %cond = select i1 %cmp, double %a, double %b + ret double %cond + +; CHECK: @food +; CHECK: fsub. 0, 1, 2 +; CHECK: stfd 0, 0(5) +} + +define float @foof(float %a, float %b, float* nocapture %c) #0 { +entry: + %sub = fsub float %a, %b + store float %sub, float* %c, align 4, !tbaa !3 + %cmp = fcmp ogt float %a, %b + %cond = select i1 %cmp, float %a, float %b + ret float %cond + +; CHECK: @foof +; CHECK: fsubs. 0, 1, 2 +; CHECK: stfs 0, 0(5) +} + +!0 = metadata !{metadata !"int", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA"} +!3 = metadata !{metadata !"long", metadata !1} +!4 = metadata !{metadata !"any pointer", metadata !1} + diff --git a/test/CodeGen/PowerPC/popcnt.ll b/test/CodeGen/PowerPC/popcnt.ll new file mode 100644 index 0000000..b304d72 --- /dev/null +++ b/test/CodeGen/PowerPC/popcnt.ll @@ -0,0 +1,40 @@ +; RUN: llc -march=ppc64 -mattr=+popcntd < %s | FileCheck %s + +define i8 @cnt8(i8 %x) nounwind readnone { + %cnt = tail call i8 @llvm.ctpop.i8(i8 %x) + ret i8 %cnt +; CHECK: @cnt8 +; CHECK: rlwinm +; CHECK: popcntw +; CHECK: blr +} + +define i16 @cnt16(i16 %x) nounwind readnone { + %cnt = tail call i16 @llvm.ctpop.i16(i16 %x) + ret i16 %cnt +; CHECK: @cnt16 +; CHECK: rlwinm +; CHECK: popcntw +; CHECK: blr +} + +define i32 @cnt32(i32 %x) nounwind readnone { + %cnt = tail call i32 @llvm.ctpop.i32(i32 %x) + ret i32 %cnt +; CHECK: @cnt32 +; CHECK: popcntw +; CHECK: blr +} + +define i64 @cnt64(i64 %x) nounwind readnone { + %cnt = tail call i64 @llvm.ctpop.i64(i64 %x) + ret i64 %cnt +; CHECK: @cnt64 +; CHECK: popcntd +; CHECK: blr +} + +declare i8 @llvm.ctpop.i8(i8) nounwind readnone +declare i16 @llvm.ctpop.i16(i16) nounwind readnone +declare i32 @llvm.ctpop.i32(i32) nounwind readnone +declare i64 @llvm.ctpop.i64(i64) nounwind readnone diff --git a/test/CodeGen/PowerPC/pr15359.ll b/test/CodeGen/PowerPC/pr15359.ll index 12fa3e5..df02dfc 100644 --- a/test/CodeGen/PowerPC/pr15359.ll +++ b/test/CodeGen/PowerPC/pr15359.ll @@ -1,5 +1,5 @@ ; RUN: llc -O0 -mcpu=pwr7 -filetype=obj %s -o - | \ -; RUN: elf-dump --dump-section-data | FileCheck %s +; RUN: llvm-readobj -t | FileCheck %s target datalayout = "E-p:64:64:64-S0-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:128:128-v64:64:64-v128:128:128-a0:0:64-n32:64" target triple = "powerpc64-unknown-linux-gnu" @@ -14,7 +14,9 @@ entry: ; Verify that nextIdx has symbol type TLS. ; -; CHECK: '.symtab' -; CHECK: 'nextIdx' -; CHECK: 'st_type', 0x6 - +; CHECK: Symbol { +; CHECK: Name: nextIdx +; CHECK-NEXT: Value: +; CHECK-NEXT: Size: +; CHECK-NEXT: Binding: +; CHECK-NEXT: Type: TLS diff --git a/test/CodeGen/PowerPC/pr15630.ll b/test/CodeGen/PowerPC/pr15630.ll new file mode 100644 index 0000000..c5ba8a4 --- /dev/null +++ b/test/CodeGen/PowerPC/pr15630.ll @@ -0,0 +1,16 @@ +; RUN: llc -mcpu=pwr7 -O0 < %s | FileCheck %s + +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +define weak_odr void @_D4core6atomic49__T11atomicStoreVE4core6atomic11MemoryOrder3ThThZ11atomicStoreFNaNbKOhhZv(i8* %val_arg, i8 zeroext %newval_arg) { +entry: + %newval = alloca i8 + %ordering = alloca i32, align 4 + store i8 %newval_arg, i8* %newval + %tmp = load i8* %newval + store atomic volatile i8 %tmp, i8* %val_arg seq_cst, align 1 + ret void +} + +; CHECK: stwcx. diff --git a/test/CodeGen/PowerPC/pr15632.ll b/test/CodeGen/PowerPC/pr15632.ll new file mode 100644 index 0000000..3ea8346 --- /dev/null +++ b/test/CodeGen/PowerPC/pr15632.ll @@ -0,0 +1,15 @@ +; RUN: llc -mcpu=pwr7 -O0 < %s | FileCheck %s + +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +declare void @other(ppc_fp128 %tmp70) + +define void @bug() { +entry: + %tmp70 = frem ppc_fp128 0xM00000000000000000000000000000000, undef + call void @other(ppc_fp128 %tmp70) + unreachable +} + +; CHECK: bl fmodl diff --git a/test/CodeGen/PowerPC/r31.ll b/test/CodeGen/PowerPC/r31.ll new file mode 100644 index 0000000..7ce12f6 --- /dev/null +++ b/test/CodeGen/PowerPC/r31.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=g4 | FileCheck %s +target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128-n32" + +define i64 @foo(i64 %a) nounwind { +entry: + call void asm sideeffect "", "~{r0},~{r3},~{r4},~{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{r14},~{r15},~{r16},~{r17},~{r18},~{r19},~{r20},~{r21},~{r22},~{r23},~{r24},~{r25},~{r26},~{r27},~{r28},~{r29},~{r30}"() nounwind + br label %return + +; CHECK: @foo +; CHECK: mr 31, 3 + +return: ; preds = %entry + ret i64 %a +} + diff --git a/test/CodeGen/PowerPC/recipest.ll b/test/CodeGen/PowerPC/recipest.ll new file mode 100644 index 0000000..89705fa --- /dev/null +++ b/test/CodeGen/PowerPC/recipest.ll @@ -0,0 +1,226 @@ +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -enable-unsafe-fp-math | FileCheck %s +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck -check-prefix=CHECK-SAFE %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +declare double @llvm.sqrt.f64(double) +declare float @llvm.sqrt.f32(float) +declare <4 x float> @llvm.sqrt.v4f32(<4 x float>) + +define double @foo(double %a, double %b) nounwind { +entry: + %x = call double @llvm.sqrt.f64(double %b) + %r = fdiv double %a, %x + ret double %r + +; CHECK: @foo +; CHECK: frsqrte +; CHECK: fnmsub +; CHECK: fmul +; CHECK: fmadd +; CHECK: fmul +; CHECK: fmul +; CHECK: fmadd +; CHECK: fmul +; CHECK: fmul +; CHECK: blr + +; CHECK-SAFE: @foo +; CHECK-SAFE: fsqrt +; CHECK-SAFE: fdiv +; CHECK-SAFE: blr +} + +define double @foof(double %a, float %b) nounwind { +entry: + %x = call float @llvm.sqrt.f32(float %b) + %y = fpext float %x to double + %r = fdiv double %a, %y + ret double %r + +; CHECK: @foof +; CHECK: frsqrtes +; CHECK: fnmsubs +; CHECK: fmuls +; CHECK: fmadds +; CHECK: fmuls +; CHECK: fmul +; CHECK: blr + +; CHECK-SAFE: @foof +; CHECK-SAFE: fsqrts +; CHECK-SAFE: fdiv +; CHECK-SAFE: blr +} + +define float @food(float %a, double %b) nounwind { +entry: + %x = call double @llvm.sqrt.f64(double %b) + %y = fptrunc double %x to float + %r = fdiv float %a, %y + ret float %r + +; CHECK: @foo +; CHECK: frsqrte +; CHECK: fnmsub +; CHECK: fmul +; CHECK: fmadd +; CHECK: fmul +; CHECK: fmul +; CHECK: fmadd +; CHECK: fmul +; CHECK: frsp +; CHECK: fmuls +; CHECK: blr + +; CHECK-SAFE: @foo +; CHECK-SAFE: fsqrt +; CHECK-SAFE: fdivs +; CHECK-SAFE: blr +} + +define float @goo(float %a, float %b) nounwind { +entry: + %x = call float @llvm.sqrt.f32(float %b) + %r = fdiv float %a, %x + ret float %r + +; CHECK: @goo +; CHECK: frsqrtes +; CHECK: fnmsubs +; CHECK: fmuls +; CHECK: fmadds +; CHECK: fmuls +; CHECK: fmuls +; CHECK: blr + +; CHECK-SAFE: @goo +; CHECK-SAFE: fsqrts +; CHECK-SAFE: fdivs +; CHECK-SAFE: blr +} + +define <4 x float> @hoo(<4 x float> %a, <4 x float> %b) nounwind { +entry: + %x = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %b) + %r = fdiv <4 x float> %a, %x + ret <4 x float> %r + +; CHECK: @hoo +; CHECK: vrsqrtefp + +; CHECK-SAFE: @hoo +; CHECK-SAFE-NOT: vrsqrtefp +; CHECK-SAFE: blr +} + +define double @foo2(double %a, double %b) nounwind { +entry: + %r = fdiv double %a, %b + ret double %r + +; CHECK: @foo2 +; CHECK: fre +; CHECK: fnmsub +; CHECK: fmadd +; CHECK: fnmsub +; CHECK: fmadd +; CHECK: fmul +; CHECK: blr + +; CHECK-SAFE: @foo2 +; CHECK-SAFE: fdiv +; CHECK-SAFE: blr +} + +define float @goo2(float %a, float %b) nounwind { +entry: + %r = fdiv float %a, %b + ret float %r + +; CHECK: @goo2 +; CHECK: fres +; CHECK: fnmsubs +; CHECK: fmadds +; CHECK: fmuls +; CHECK: blr + +; CHECK-SAFE: @goo2 +; CHECK-SAFE: fdivs +; CHECK-SAFE: blr +} + +define <4 x float> @hoo2(<4 x float> %a, <4 x float> %b) nounwind { +entry: + %r = fdiv <4 x float> %a, %b + ret <4 x float> %r + +; CHECK: @hoo2 +; CHECK: vrefp + +; CHECK-SAFE: @hoo2 +; CHECK-SAFE-NOT: vrefp +; CHECK-SAFE: blr +} + +define double @foo3(double %a) nounwind { +entry: + %r = call double @llvm.sqrt.f64(double %a) + ret double %r + +; CHECK: @foo3 +; CHECK: frsqrte +; CHECK: fnmsub +; CHECK: fmul +; CHECK: fmadd +; CHECK: fmul +; CHECK: fmul +; CHECK: fmadd +; CHECK: fmul +; CHECK: fre +; CHECK: fnmsub +; CHECK: fmadd +; CHECK: fnmsub +; CHECK: fmadd +; CHECK: blr + +; CHECK-SAFE: @foo3 +; CHECK-SAFE: fsqrt +; CHECK-SAFE: blr +} + +define float @goo3(float %a) nounwind { +entry: + %r = call float @llvm.sqrt.f32(float %a) + ret float %r + +; CHECK: @goo3 +; CHECK: frsqrtes +; CHECK: fnmsubs +; CHECK: fmuls +; CHECK: fmadds +; CHECK: fmuls +; CHECK: fres +; CHECK: fnmsubs +; CHECK: fmadds +; CHECK: blr + +; CHECK-SAFE: @goo3 +; CHECK-SAFE: fsqrts +; CHECK-SAFE: blr +} + +define <4 x float> @hoo3(<4 x float> %a) nounwind { +entry: + %r = call <4 x float> @llvm.sqrt.v4f32(<4 x float> %a) + ret <4 x float> %r + +; CHECK: @hoo3 +; CHECK: vrsqrtefp +; CHECK: vrefp + +; CHECK-SAFE: @hoo3 +; CHECK-SAFE-NOT: vrsqrtefp +; CHECK-SAFE: blr +} + diff --git a/test/CodeGen/PowerPC/rounding-ops.ll b/test/CodeGen/PowerPC/rounding-ops.ll new file mode 100644 index 0000000..2b5e1c9 --- /dev/null +++ b/test/CodeGen/PowerPC/rounding-ops.ll @@ -0,0 +1,147 @@ +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -enable-unsafe-fp-math | FileCheck -check-prefix=CHECK-FM %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +define float @test1(float %x) nounwind { + %call = tail call float @floorf(float %x) nounwind readnone + ret float %call + +; CHECK: test1: +; CHECK: frim 1, 1 + +; CHECK-FM: test1: +; CHECK-FM: frim 1, 1 +} + +declare float @floorf(float) nounwind readnone + +define double @test2(double %x) nounwind { + %call = tail call double @floor(double %x) nounwind readnone + ret double %call + +; CHECK: test2: +; CHECK: frim 1, 1 + +; CHECK-FM: test2: +; CHECK-FM: frim 1, 1 +} + +declare double @floor(double) nounwind readnone + +define float @test3(float %x) nounwind { + %call = tail call float @nearbyintf(float %x) nounwind readnone + ret float %call + +; CHECK: test3: +; CHECK-NOT: frin + +; CHECK-FM: test3: +; CHECK-FM: frin 1, 1 +} + +declare float @nearbyintf(float) nounwind readnone + +define double @test4(double %x) nounwind { + %call = tail call double @nearbyint(double %x) nounwind readnone + ret double %call + +; CHECK: test4: +; CHECK-NOT: frin + +; CHECK-FM: test4: +; CHECK-FM: frin 1, 1 +} + +declare double @nearbyint(double) nounwind readnone + +define float @test5(float %x) nounwind { + %call = tail call float @ceilf(float %x) nounwind readnone + ret float %call + +; CHECK: test5: +; CHECK: frip 1, 1 + +; CHECK-FM: test5: +; CHECK-FM: frip 1, 1 +} + +declare float @ceilf(float) nounwind readnone + +define double @test6(double %x) nounwind { + %call = tail call double @ceil(double %x) nounwind readnone + ret double %call + +; CHECK: test6: +; CHECK: frip 1, 1 + +; CHECK-FM: test6: +; CHECK-FM: frip 1, 1 +} + +declare double @ceil(double) nounwind readnone + +define float @test9(float %x) nounwind { + %call = tail call float @truncf(float %x) nounwind readnone + ret float %call + +; CHECK: test9: +; CHECK: friz 1, 1 + +; CHECK-FM: test9: +; CHECK-FM: friz 1, 1 +} + +declare float @truncf(float) nounwind readnone + +define double @test10(double %x) nounwind { + %call = tail call double @trunc(double %x) nounwind readnone + ret double %call + +; CHECK: test10: +; CHECK: friz 1, 1 + +; CHECK-FM: test10: +; CHECK-FM: friz 1, 1 +} + +declare double @trunc(double) nounwind readnone + +define void @test11(float %x, float* %y) nounwind { + %call = tail call float @rintf(float %x) nounwind readnone + store float %call, float* %y + ret void + +; CHECK: test11: +; CHECK-NOT: frin + +; CHECK-FM: test11: +; CHECK-FM: frin [[R2:[0-9]+]], [[R1:[0-9]+]] +; CHECK-FM: fcmpu [[CR:[0-9]+]], [[R2]], [[R1]] +; CHECK-FM: beq [[CR]], .LBB[[BB:[0-9]+]]_2 +; CHECK-FM: mtfsb1 6 +; CHECK-FM: .LBB[[BB]]_2: +; CHECK-FM: blr +} + +declare float @rintf(float) nounwind readnone + +define void @test12(double %x, double* %y) nounwind { + %call = tail call double @rint(double %x) nounwind readnone + store double %call, double* %y + ret void + +; CHECK: test12: +; CHECK-NOT: frin + +; CHECK-FM: test12: +; CHECK-FM: frin [[R2:[0-9]+]], [[R1:[0-9]+]] +; CHECK-FM: fcmpu [[CR:[0-9]+]], [[R2]], [[R1]] +; CHECK-FM: beq [[CR]], .LBB[[BB:[0-9]+]]_2 +; CHECK-FM: mtfsb1 6 +; CHECK-FM: .LBB[[BB]]_2: +; CHECK-FM: blr +} + +declare double @rint(double) nounwind readnone + diff --git a/test/CodeGen/PowerPC/s000-alias-misched.ll b/test/CodeGen/PowerPC/s000-alias-misched.ll index d03ee87..3570a11 100644 --- a/test/CodeGen/PowerPC/s000-alias-misched.ll +++ b/test/CodeGen/PowerPC/s000-alias-misched.ll @@ -37,34 +37,34 @@ for.body4: ; preds = %for.body4, %for.con %arrayidx = getelementptr inbounds [16000 x double]* @Y, i64 0, i64 %indvars.iv %arrayidx6 = getelementptr inbounds [16000 x double]* @X, i64 0, i64 %indvars.iv %0 = bitcast double* %arrayidx to <1 x double>* - %1 = load <1 x double>* %0, align 32, !tbaa !0 + %1 = load <1 x double>* %0, align 32 %add = fadd <1 x double> %1, <double 1.000000e+00> %2 = bitcast double* %arrayidx6 to <1 x double>* - store <1 x double> %add, <1 x double>* %2, align 32, !tbaa !0 + store <1 x double> %add, <1 x double>* %2, align 32 %indvars.iv.next.322 = or i64 %indvars.iv, 4 %arrayidx.4 = getelementptr inbounds [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.322 %arrayidx6.4 = getelementptr inbounds [16000 x double]* @X, i64 0, i64 %indvars.iv.next.322 %3 = bitcast double* %arrayidx.4 to <1 x double>* - %4 = load <1 x double>* %3, align 32, !tbaa !0 + %4 = load <1 x double>* %3, align 32 %add.4 = fadd <1 x double> %4, <double 1.000000e+00> %5 = bitcast double* %arrayidx6.4 to <1 x double>* - store <1 x double> %add.4, <1 x double>* %5, align 32, !tbaa !0 + store <1 x double> %add.4, <1 x double>* %5, align 32 %indvars.iv.next.726 = or i64 %indvars.iv, 8 %arrayidx.8 = getelementptr inbounds [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.726 %arrayidx6.8 = getelementptr inbounds [16000 x double]* @X, i64 0, i64 %indvars.iv.next.726 %6 = bitcast double* %arrayidx.8 to <1 x double>* - %7 = load <1 x double>* %6, align 32, !tbaa !0 + %7 = load <1 x double>* %6, align 32 %add.8 = fadd <1 x double> %7, <double 1.000000e+00> %8 = bitcast double* %arrayidx6.8 to <1 x double>* - store <1 x double> %add.8, <1 x double>* %8, align 32, !tbaa !0 + store <1 x double> %add.8, <1 x double>* %8, align 32 %indvars.iv.next.1130 = or i64 %indvars.iv, 12 %arrayidx.12 = getelementptr inbounds [16000 x double]* @Y, i64 0, i64 %indvars.iv.next.1130 %arrayidx6.12 = getelementptr inbounds [16000 x double]* @X, i64 0, i64 %indvars.iv.next.1130 %9 = bitcast double* %arrayidx.12 to <1 x double>* - %10 = load <1 x double>* %9, align 32, !tbaa !0 + %10 = load <1 x double>* %9, align 32 %add.12 = fadd <1 x double> %10, <double 1.000000e+00> %11 = bitcast double* %arrayidx6.12 to <1 x double>* - store <1 x double> %add.12, <1 x double>* %11, align 32, !tbaa !0 + store <1 x double> %add.12, <1 x double>* %11, align 32 %indvars.iv.next.15 = add i64 %indvars.iv, 16 %lftr.wideiv.15 = trunc i64 %indvars.iv.next.15 to i32 %exitcond.15 = icmp eq i32 %lftr.wideiv.15, 16000 @@ -95,7 +95,3 @@ for.end10: ; preds = %for.end declare i64 @clock() nounwind declare signext i32 @dummy(double*, double*, double*, double*, double*, [256 x double]*, [256 x double]*, [256 x double]*, double) - -!0 = metadata !{metadata !"double", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/PowerPC/sjlj.ll b/test/CodeGen/PowerPC/sjlj.ll new file mode 100644 index 0000000..7ea35da --- /dev/null +++ b/test/CodeGen/PowerPC/sjlj.ll @@ -0,0 +1,112 @@ +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 | FileCheck %s +; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2 | FileCheck -check-prefix=CHECK-NOAV %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +%struct.__jmp_buf_tag = type { [64 x i64], i32, %struct.__sigset_t, [8 x i8] } +%struct.__sigset_t = type { [16 x i64] } + +@env_sigill = internal global [1 x %struct.__jmp_buf_tag] zeroinitializer, align 16 + +define void @foo() #0 { +entry: + call void @llvm.eh.sjlj.longjmp(i8* bitcast ([1 x %struct.__jmp_buf_tag]* @env_sigill to i8*)) + unreachable + +; CHECK: @foo +; CHECK: addis [[REG:[0-9]+]], 2, env_sigill@toc@ha +; CHECK: addi [[REG]], [[REG]], env_sigill@toc@l +; CHECK: ld 31, 0([[REG]]) +; CHECK: ld [[REG2:[0-9]+]], 8([[REG]]) +; CHECK: ld 1, 16([[REG]]) +; CHECK: mtctr [[REG2]] +; CHECK: ld 2, 24([[REG]]) +; CHECK: bctr + +return: ; No predecessors! + ret void +} + +declare void @llvm.eh.sjlj.longjmp(i8*) #1 + +define signext i32 @main() #0 { +entry: + %retval = alloca i32, align 4 + store i32 0, i32* %retval + %0 = call i8* @llvm.frameaddress(i32 0) + store i8* %0, i8** bitcast ([1 x %struct.__jmp_buf_tag]* @env_sigill to i8**) + %1 = call i8* @llvm.stacksave() + store i8* %1, i8** getelementptr (i8** bitcast ([1 x %struct.__jmp_buf_tag]* @env_sigill to i8**), i32 2) + %2 = call i32 @llvm.eh.sjlj.setjmp(i8* bitcast ([1 x %struct.__jmp_buf_tag]* @env_sigill to i8*)) + %tobool = icmp ne i32 %2, 0 + br i1 %tobool, label %if.then, label %if.else + +if.then: ; preds = %entry + store i32 1, i32* %retval + br label %return + +if.else: ; preds = %entry + call void @foo() + br label %if.end + +if.end: ; preds = %if.else + store i32 0, i32* %retval + br label %return + +return: ; preds = %if.end, %if.then + %3 = load i32* %retval + ret i32 %3 + +; FIXME: We should be saving VRSAVE on Darwin, but we're not! + +; CHECK: @main +; CHECK: std +; Make sure that we're not saving VRSAVE on non-Darwin: +; CHECK-NOT: mfspr +; CHECK: stfd +; CHECK: stvx + +; CHECK: addis [[REG:[0-9]+]], 2, env_sigill@toc@ha +; CHECK: std 31, env_sigill@toc@l([[REG]]) +; CHECK: addi [[REG]], [[REG]], env_sigill@toc@l +; CHECK: std [[REG]], [[OFF:[0-9]+]](31) # 8-byte Folded Spill +; CHECK: std 1, 16([[REG]]) +; CHECK: std 2, 24([[REG]]) +; CHECK: bcl 20, 31, .LBB1_1 +; CHECK: li 3, 1 +; CHECK: #EH_SjLj_Setup .LBB1_1 +; CHECK: b .LBB1_2 + +; CHECK: .LBB1_1: +; CHECK: mflr [[REGL:[0-9]+]] +; CHECK: ld [[REG2:[0-9]+]], [[OFF]](31) # 8-byte Folded Reload +; CHECK: std [[REGL]], 8([[REG2]]) +; CHECK: li 3, 0 + +; CHECK: .LBB1_2: + +; CHECK: lfd +; CHECK: lvx +; CHECK: ld +; CHECK: blr + +; CHECK-NOAV: @main +; CHECK-NOAV-NOT: stvx +; CHECK-NOAV: bcl +; CHECK-NOAV: mflr +; CHECK-NOAV: bl foo +; CHECK-NOAV-NOT: lvx +; CHECK-NOAV: blr +} + +declare i8* @llvm.frameaddress(i32) #2 + +declare i8* @llvm.stacksave() #3 + +declare i32 @llvm.eh.sjlj.setjmp(i8*) #3 + +attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { noreturn nounwind } +attributes #2 = { nounwind readnone } +attributes #3 = { nounwind } + diff --git a/test/CodeGen/PowerPC/stfiwx-2.ll b/test/CodeGen/PowerPC/stfiwx-2.ll index c49b25c..7786fc1 100644 --- a/test/CodeGen/PowerPC/stfiwx-2.ll +++ b/test/CodeGen/PowerPC/stfiwx-2.ll @@ -1,11 +1,14 @@ -; This cannot be a stfiwx -; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep stb -; RUN: llc < %s -march=ppc32 -mcpu=g5 | not grep stfiwx +; RUN: llc < %s -mtriple=powerpc-unknown-linux-gnu -mcpu=g5 | FileCheck %s define void @test(float %F, i8* %P) { %I = fptosi float %F to i32 %X = trunc i32 %I to i8 store i8 %X, i8* %P ret void +; CHECK: fctiwz 0, 1 +; CHECK: stfiwx 0, 0, 4 +; CHECK: lwz 4, 12(1) +; CHECK: stb 4, 0(3) +; CHECK: blr } diff --git a/test/CodeGen/PowerPC/store-update.ll b/test/CodeGen/PowerPC/store-update.ll new file mode 100644 index 0000000..538ed24 --- /dev/null +++ b/test/CodeGen/PowerPC/store-update.ll @@ -0,0 +1,170 @@ +; RUN: llc < %s | FileCheck %s + +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +define i8* @stbu(i8* %base, i8 zeroext %val) nounwind { +entry: + %arrayidx = getelementptr inbounds i8* %base, i64 16 + store i8 %val, i8* %arrayidx, align 1 + ret i8* %arrayidx +} +; CHECK: @stbu +; CHECK: %entry +; CHECK-NEXT: stbu +; CHECK-NEXT: blr + +define i8* @stbux(i8* %base, i8 zeroext %val, i64 %offset) nounwind { +entry: + %arrayidx = getelementptr inbounds i8* %base, i64 %offset + store i8 %val, i8* %arrayidx, align 1 + ret i8* %arrayidx +} +; CHECK: @stbux +; CHECK: %entry +; CHECK-NEXT: stbux +; CHECK-NEXT: blr + +define i16* @sthu(i16* %base, i16 zeroext %val) nounwind { +entry: + %arrayidx = getelementptr inbounds i16* %base, i64 16 + store i16 %val, i16* %arrayidx, align 2 + ret i16* %arrayidx +} +; CHECK: @sthu +; CHECK: %entry +; CHECK-NEXT: sthu +; CHECK-NEXT: blr + +define i16* @sthux(i16* %base, i16 zeroext %val, i64 %offset) nounwind { +entry: + %arrayidx = getelementptr inbounds i16* %base, i64 %offset + store i16 %val, i16* %arrayidx, align 2 + ret i16* %arrayidx +} +; CHECK: @sthux +; CHECK: %entry +; CHECK-NEXT: sldi +; CHECK-NEXT: sthux +; CHECK-NEXT: blr + +define i32* @stwu(i32* %base, i32 zeroext %val) nounwind { +entry: + %arrayidx = getelementptr inbounds i32* %base, i64 16 + store i32 %val, i32* %arrayidx, align 4 + ret i32* %arrayidx +} +; CHECK: @stwu +; CHECK: %entry +; CHECK-NEXT: stwu +; CHECK-NEXT: blr + +define i32* @stwux(i32* %base, i32 zeroext %val, i64 %offset) nounwind { +entry: + %arrayidx = getelementptr inbounds i32* %base, i64 %offset + store i32 %val, i32* %arrayidx, align 4 + ret i32* %arrayidx +} +; CHECK: @stwux +; CHECK: %entry +; CHECK-NEXT: sldi +; CHECK-NEXT: stwux +; CHECK-NEXT: blr + +define i8* @stbu8(i8* %base, i64 %val) nounwind { +entry: + %conv = trunc i64 %val to i8 + %arrayidx = getelementptr inbounds i8* %base, i64 16 + store i8 %conv, i8* %arrayidx, align 1 + ret i8* %arrayidx +} +; CHECK: @stbu +; CHECK: %entry +; CHECK-NEXT: stbu +; CHECK-NEXT: blr + +define i8* @stbux8(i8* %base, i64 %val, i64 %offset) nounwind { +entry: + %conv = trunc i64 %val to i8 + %arrayidx = getelementptr inbounds i8* %base, i64 %offset + store i8 %conv, i8* %arrayidx, align 1 + ret i8* %arrayidx +} +; CHECK: @stbux +; CHECK: %entry +; CHECK-NEXT: stbux +; CHECK-NEXT: blr + +define i16* @sthu8(i16* %base, i64 %val) nounwind { +entry: + %conv = trunc i64 %val to i16 + %arrayidx = getelementptr inbounds i16* %base, i64 16 + store i16 %conv, i16* %arrayidx, align 2 + ret i16* %arrayidx +} +; CHECK: @sthu +; CHECK: %entry +; CHECK-NEXT: sthu +; CHECK-NEXT: blr + +define i16* @sthux8(i16* %base, i64 %val, i64 %offset) nounwind { +entry: + %conv = trunc i64 %val to i16 + %arrayidx = getelementptr inbounds i16* %base, i64 %offset + store i16 %conv, i16* %arrayidx, align 2 + ret i16* %arrayidx +} +; CHECK: @sthux +; CHECK: %entry +; CHECK-NEXT: sldi +; CHECK-NEXT: sthux +; CHECK-NEXT: blr + +define i32* @stwu8(i32* %base, i64 %val) nounwind { +entry: + %conv = trunc i64 %val to i32 + %arrayidx = getelementptr inbounds i32* %base, i64 16 + store i32 %conv, i32* %arrayidx, align 4 + ret i32* %arrayidx +} +; CHECK: @stwu +; CHECK: %entry +; CHECK-NEXT: stwu +; CHECK-NEXT: blr + +define i32* @stwux8(i32* %base, i64 %val, i64 %offset) nounwind { +entry: + %conv = trunc i64 %val to i32 + %arrayidx = getelementptr inbounds i32* %base, i64 %offset + store i32 %conv, i32* %arrayidx, align 4 + ret i32* %arrayidx +} +; CHECK: @stwux +; CHECK: %entry +; CHECK-NEXT: sldi +; CHECK-NEXT: stwux +; CHECK-NEXT: blr + +define i64* @stdu(i64* %base, i64 %val) nounwind { +entry: + %arrayidx = getelementptr inbounds i64* %base, i64 16 + store i64 %val, i64* %arrayidx, align 8 + ret i64* %arrayidx +} +; CHECK: @stdu +; CHECK: %entry +; CHECK-NEXT: stdu +; CHECK-NEXT: blr + +define i64* @stdux(i64* %base, i64 %val, i64 %offset) nounwind { +entry: + %arrayidx = getelementptr inbounds i64* %base, i64 %offset + store i64 %val, i64* %arrayidx, align 8 + ret i64* %arrayidx +} +; CHECK: @stdux +; CHECK: %entry +; CHECK-NEXT: sldi +; CHECK-NEXT: stdux +; CHECK-NEXT: blr + diff --git a/test/CodeGen/PowerPC/structsinmem.ll b/test/CodeGen/PowerPC/structsinmem.ll index 8dbe63d..2a17e74 100644 --- a/test/CodeGen/PowerPC/structsinmem.ll +++ b/test/CodeGen/PowerPC/structsinmem.ll @@ -114,8 +114,8 @@ entry: ret i32 %add13 ; CHECK: lha {{[0-9]+}}, 126(1) -; CHECK: lbz {{[0-9]+}}, 119(1) ; CHECK: lha {{[0-9]+}}, 132(1) +; CHECK: lbz {{[0-9]+}}, 119(1) ; CHECK: lwz {{[0-9]+}}, 140(1) ; CHECK: lwz {{[0-9]+}}, 144(1) ; CHECK: lwz {{[0-9]+}}, 152(1) @@ -206,8 +206,8 @@ entry: ret i32 %add13 ; CHECK: lha {{[0-9]+}}, 126(1) -; CHECK: lbz {{[0-9]+}}, 119(1) ; CHECK: lha {{[0-9]+}}, 133(1) +; CHECK: lbz {{[0-9]+}}, 119(1) ; CHECK: lwz {{[0-9]+}}, 140(1) ; CHECK: lwz {{[0-9]+}}, 147(1) ; CHECK: lwz {{[0-9]+}}, 154(1) diff --git a/test/CodeGen/PowerPC/structsinregs.ll b/test/CodeGen/PowerPC/structsinregs.ll index 6005614..54de606 100644 --- a/test/CodeGen/PowerPC/structsinregs.ll +++ b/test/CodeGen/PowerPC/structsinregs.ll @@ -105,8 +105,8 @@ entry: ; CHECK: sth 4, 62(1) ; CHECK: stb 3, 55(1) ; CHECK: lha {{[0-9]+}}, 62(1) -; CHECK: lbz {{[0-9]+}}, 55(1) ; CHECK: lha {{[0-9]+}}, 68(1) +; CHECK: lbz {{[0-9]+}}, 55(1) ; CHECK: lwz {{[0-9]+}}, 76(1) ; CHECK: lwz {{[0-9]+}}, 80(1) ; CHECK: lwz {{[0-9]+}}, 88(1) @@ -192,8 +192,8 @@ entry: ; CHECK: sth 4, 62(1) ; CHECK: stb 3, 55(1) ; CHECK: lha {{[0-9]+}}, 62(1) -; CHECK: lbz {{[0-9]+}}, 55(1) ; CHECK: lha {{[0-9]+}}, 69(1) +; CHECK: lbz {{[0-9]+}}, 55(1) ; CHECK: lwz {{[0-9]+}}, 76(1) ; CHECK: lwz {{[0-9]+}}, 83(1) ; CHECK: lwz {{[0-9]+}}, 90(1) diff --git a/test/CodeGen/PowerPC/stubs.ll b/test/CodeGen/PowerPC/stubs.ll index cfcc50b..694f208 100644 --- a/test/CodeGen/PowerPC/stubs.ll +++ b/test/CodeGen/PowerPC/stubs.ll @@ -6,16 +6,16 @@ entry: } ; CHECK: _test1: -; CHECK: bl ___floatditf$stub +; CHECK: bl L___floatditf$stub ; CHECK: .section __TEXT,__symbol_stub1,symbol_stubs,pure_instructions,16 -; CHECK: ___floatditf$stub: +; CHECK: L___floatditf$stub: ; CHECK: .indirect_symbol ___floatditf -; CHECK: lis r11, ha16(___floatditf$lazy_ptr) -; CHECK: lwzu r12, lo16(___floatditf$lazy_ptr)(r11) +; CHECK: lis r11, ha16(L___floatditf$lazy_ptr) +; CHECK: lwzu r12, lo16(L___floatditf$lazy_ptr)(r11) ; CHECK: mtctr r12 ; CHECK: bctr ; CHECK: .section __DATA,__la_symbol_ptr,lazy_symbol_pointers -; CHECK: ___floatditf$lazy_ptr: +; CHECK: L___floatditf$lazy_ptr: ; CHECK: .indirect_symbol ___floatditf ; CHECK: .long dyld_stub_binding_helper diff --git a/test/CodeGen/PowerPC/stwu-gta.ll b/test/CodeGen/PowerPC/stwu-gta.ll index 4febe7e..980c1d5 100644 --- a/test/CodeGen/PowerPC/stwu-gta.ll +++ b/test/CodeGen/PowerPC/stwu-gta.ll @@ -8,15 +8,11 @@ target triple = "powerpc-unknown-linux" define void @_GLOBAL__I_a() nounwind section ".text.startup" { entry: - store i32 5, i32* getelementptr inbounds (%class.Two.0.5* @foo, i32 0, i32 0), align 4, !tbaa !0 - store i32 6, i32* getelementptr inbounds (%class.Two.0.5* @foo, i32 0, i32 1), align 4, !tbaa !0 + store i32 5, i32* getelementptr inbounds (%class.Two.0.5* @foo, i32 0, i32 0), align 4 + store i32 6, i32* getelementptr inbounds (%class.Two.0.5* @foo, i32 0, i32 1), align 4 ret void } ; CHECK: @_GLOBAL__I_a ; CHECK-NOT: stwux ; CHECK: stwu - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/PowerPC/stwu8.ll b/test/CodeGen/PowerPC/stwu8.ll index e0bd043..b220af2 100644 --- a/test/CodeGen/PowerPC/stwu8.ll +++ b/test/CodeGen/PowerPC/stwu8.ll @@ -14,7 +14,7 @@ entry: %_M_header.i.i.i.i.i.i = getelementptr inbounds %class.spell_checker.21.103.513.538* %this, i64 0, i32 0, i32 0, i32 0, i32 1 %0 = bitcast %"struct.std::_Rb_tree_node_base.17.99.509.534"* %_M_header.i.i.i.i.i.i to i8* call void @llvm.memset.p0i8.i64(i8* %0, i8 0, i64 40, i32 4, i1 false) nounwind - store %"struct.std::_Rb_tree_node_base.17.99.509.534"* %_M_header.i.i.i.i.i.i, %"struct.std::_Rb_tree_node_base.17.99.509.534"** undef, align 8, !tbaa !0 + store %"struct.std::_Rb_tree_node_base.17.99.509.534"* %_M_header.i.i.i.i.i.i, %"struct.std::_Rb_tree_node_base.17.99.509.534"** undef, align 8 unreachable } @@ -22,7 +22,3 @@ entry: ; CHECK: stwu declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind - -!0 = metadata !{metadata !"any pointer", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/PowerPC/tls-gd-obj.ll b/test/CodeGen/PowerPC/tls-gd-obj.ll index 00b537d..ffc0db0 100644 --- a/test/CodeGen/PowerPC/tls-gd-obj.ll +++ b/test/CodeGen/PowerPC/tls-gd-obj.ll @@ -1,5 +1,5 @@ ; RUN: llc -mcpu=pwr7 -O0 -filetype=obj -relocation-model=pic %s -o - | \ -; RUN: elf-dump --dump-section-data | FileCheck %s +; RUN: llvm-readobj -r | FileCheck %s ; Test correct relocation generation for thread-local storage using ; the general dynamic model and integrated assembly. @@ -21,21 +21,11 @@ entry: ; and R_PPC64_TLSGD for accessing external variable a, and R_PPC64_REL24 ; for the call to __tls_get_addr. ; -; CHECK: '.rela.text' -; CHECK: Relocation 0 -; CHECK-NEXT: 'r_offset' -; CHECK-NEXT: 'r_sym', 0x[[SYM1:[0-9a-f]+]] -; CHECK-NEXT: 'r_type', 0x00000052 -; CHECK: Relocation 1 -; CHECK-NEXT: 'r_offset' -; CHECK-NEXT: 'r_sym', 0x[[SYM1]] -; CHECK-NEXT: 'r_type', 0x00000050 -; CHECK: Relocation 2 -; CHECK-NEXT: 'r_offset' -; CHECK-NEXT: 'r_sym', 0x[[SYM1]] -; CHECK-NEXT: 'r_type', 0x0000006b -; CHECK: Relocation 3 -; CHECK-NEXT: 'r_offset' -; CHECK-NEXT: 'r_sym', 0x{{[0-9a-f]+}} -; CHECK-NEXT: 'r_type', 0x0000000a - +; CHECK: Relocations [ +; CHECK: Section (1) .text { +; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSGD16_HA a +; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSGD16_LO a +; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_TLSGD a +; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_REL24 __tls_get_addr +; CHECK: } +; CHECK: ] diff --git a/test/CodeGen/PowerPC/tls-gd.ll b/test/CodeGen/PowerPC/tls-gd.ll index fb8dfaf..5f0ef9a 100644 --- a/test/CodeGen/PowerPC/tls-gd.ll +++ b/test/CodeGen/PowerPC/tls-gd.ll @@ -18,6 +18,6 @@ entry: ; CHECK: addis [[REG:[0-9]+]], 2, a@got@tlsgd@ha ; CHECK-NEXT: addi 3, [[REG]], a@got@tlsgd@l -; CHECK-NEXT: bl __tls_get_addr(a@tlsgd) +; CHECK: bl __tls_get_addr(a@tlsgd) ; CHECK-NEXT: nop diff --git a/test/CodeGen/PowerPC/tls-ie-obj.ll b/test/CodeGen/PowerPC/tls-ie-obj.ll index 3600cc5..0f7a352 100644 --- a/test/CodeGen/PowerPC/tls-ie-obj.ll +++ b/test/CodeGen/PowerPC/tls-ie-obj.ll @@ -1,5 +1,5 @@ ; RUN: llc -mcpu=pwr7 -O0 -filetype=obj %s -o - | \ -; RUN: elf-dump --dump-section-data | FileCheck %s +; RUN: llvm-readobj -r | FileCheck %s ; Test correct relocation generation for thread-local storage ; using the initial-exec model and integrated assembly. @@ -20,17 +20,10 @@ entry: ; Verify generation of R_PPC64_GOT_TPREL16_DS and R_PPC64_TLS for ; accessing external variable a. ; -; CHECK: '.rela.text' -; CHECK: Relocation 0 -; CHECK-NEXT: 'r_offset' -; CHECK-NEXT: 'r_sym', 0x[[SYM1:[0-9a-f]+]] -; CHECK-NEXT: 'r_type', 0x0000005a -; CHECK: Relocation 1 -; CHECK-NEXT: 'r_offset' -; CHECK-NEXT: 'r_sym', 0x[[SYM1]] -; CHECK-NEXT: 'r_type', 0x00000058 -; CHECK: Relocation 2 -; CHECK-NEXT: 'r_offset' -; CHECK-NEXT: 'r_sym', 0x[[SYM1]] -; CHECK-NEXT: 'r_type', 0x00000043 - +; CHECK: Relocations [ +; CHECK: Section (1) .text { +; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TPREL16_HA a +; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TPREL16_LO_DS a +; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_TLS a +; CHECK: } +; CHECK: ] diff --git a/test/CodeGen/PowerPC/tls-ld-2.ll b/test/CodeGen/PowerPC/tls-ld-2.ll index 4954afe..4399b33 100644 --- a/test/CodeGen/PowerPC/tls-ld-2.ll +++ b/test/CodeGen/PowerPC/tls-ld-2.ll @@ -18,7 +18,7 @@ entry: ; CHECK: addis [[REG:[0-9]+]], 2, a@got@tlsld@ha ; CHECK-NEXT: addi 3, [[REG]], a@got@tlsld@l -; CHECK-NEXT: bl __tls_get_addr(a@tlsld) +; CHECK: bl __tls_get_addr(a@tlsld) ; CHECK-NEXT: nop -; CHECK-NEXT: addis [[REG2:[0-9]+]], 3, a@dtprel@ha +; CHECK: addis [[REG2:[0-9]+]], 3, a@dtprel@ha ; CHECK-NEXT: lwa {{[0-9]+}}, a@dtprel@l([[REG2]]) diff --git a/test/CodeGen/PowerPC/tls-ld-obj.ll b/test/CodeGen/PowerPC/tls-ld-obj.ll index c521ae4..29ee876 100644 --- a/test/CodeGen/PowerPC/tls-ld-obj.ll +++ b/test/CodeGen/PowerPC/tls-ld-obj.ll @@ -1,5 +1,5 @@ ; RUN: llc -mcpu=pwr7 -O0 -filetype=obj -relocation-model=pic %s -o - | \ -; RUN: elf-dump --dump-section-data | FileCheck %s +; RUN: llvm-readobj -r | FileCheck %s ; Test correct relocation generation for thread-local storage using ; the local dynamic model. @@ -22,29 +22,13 @@ entry: ; accessing external variable a, and R_PPC64_REL24 for the call to ; __tls_get_addr. ; -; CHECK: '.rela.text' -; CHECK: Relocation 0 -; CHECK-NEXT: 'r_offset' -; CHECK-NEXT: 'r_sym', 0x[[SYM1:[0-9a-f]+]] -; CHECK-NEXT: 'r_type', 0x00000056 -; CHECK: Relocation 1 -; CHECK-NEXT: 'r_offset' -; CHECK-NEXT: 'r_sym', 0x[[SYM1]] -; CHECK-NEXT: 'r_type', 0x00000054 -; CHECK: Relocation 2 -; CHECK-NEXT: 'r_offset' -; CHECK-NEXT: 'r_sym', 0x[[SYM1]] -; CHECK-NEXT: 'r_type', 0x0000006c -; CHECK: Relocation 3 -; CHECK-NEXT: 'r_offset' -; CHECK-NEXT: 'r_sym', 0x{{[0-9a-f]+}} -; CHECK-NEXT: 'r_type', 0x0000000a -; CHECK: Relocation 4 -; CHECK-NEXT: 'r_offset' -; CHECK-NEXT: 'r_sym', 0x[[SYM1]] -; CHECK-NEXT: 'r_type', 0x0000004d -; CHECK: Relocation 5 -; CHECK-NEXT: 'r_offset' -; CHECK-NEXT: 'r_sym', 0x[[SYM1]] -; CHECK-NEXT: 'r_type', 0x0000004b - +; CHECK: Relocations [ +; CHECK: Section (1) .text { +; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSLD16_HA a +; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_GOT_TLSLD16_LO a +; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_TLSLD a +; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_REL24 __tls_get_addr +; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_DTPREL16_HA a +; CHECK: 0x{{[0-9,A-F]+}} R_PPC64_DTPREL16_LO a +; CHECK: } +; CHECK: ] diff --git a/test/CodeGen/PowerPC/tls-ld.ll b/test/CodeGen/PowerPC/tls-ld.ll index 1ebc612..db02a56 100644 --- a/test/CodeGen/PowerPC/tls-ld.ll +++ b/test/CodeGen/PowerPC/tls-ld.ll @@ -18,7 +18,7 @@ entry: ; CHECK: addis [[REG:[0-9]+]], 2, a@got@tlsld@ha ; CHECK-NEXT: addi 3, [[REG]], a@got@tlsld@l -; CHECK-NEXT: bl __tls_get_addr(a@tlsld) +; CHECK: bl __tls_get_addr(a@tlsld) ; CHECK-NEXT: nop -; CHECK-NEXT: addis [[REG2:[0-9]+]], 3, a@dtprel@ha +; CHECK: addis [[REG2:[0-9]+]], 3, a@dtprel@ha ; CHECK-NEXT: addi {{[0-9]+}}, [[REG2]], a@dtprel@l diff --git a/test/CodeGen/PowerPC/tls.ll b/test/CodeGen/PowerPC/tls.ll index 151b4b7..2daa60a 100644 --- a/test/CodeGen/PowerPC/tls.ll +++ b/test/CodeGen/PowerPC/tls.ll @@ -12,7 +12,7 @@ entry: ;OPT0: addis [[REG1:[0-9]+]], 13, a@tprel@ha ;OPT0-NEXT: li [[REG2:[0-9]+]], 42 ;OPT0-NEXT: addi [[REG1]], [[REG1]], a@tprel@l -;OPT0-NEXT: stw [[REG2]], 0([[REG1]]) +;OPT0: stw [[REG2]], 0([[REG1]]) ;OPT1: addis [[REG1:[0-9]+]], 13, a@tprel@ha ;OPT1-NEXT: li [[REG2:[0-9]+]], 42 ;OPT1-NEXT: stw [[REG2]], a@tprel@l([[REG1]]) diff --git a/test/CodeGen/PowerPC/unal4-std.ll b/test/CodeGen/PowerPC/unal4-std.ll index dc4c20c..169bd78 100644 --- a/test/CodeGen/PowerPC/unal4-std.ll +++ b/test/CodeGen/PowerPC/unal4-std.ll @@ -17,6 +17,9 @@ vector.body.i: ; preds = %vector.body.i, %if. if.end210: ; preds = %entry ret void +; This will generate two align-1 i64 stores. Make sure that they are +; indexed stores and not in r+i form (which require the offset to be +; a multiple of 4). ; CHECK: @copy_to_conceal ; CHECK: stdx {{[0-9]+}}, 0, } diff --git a/test/CodeGen/PowerPC/vec_rounding.ll b/test/CodeGen/PowerPC/vec_rounding.ll index f41faa0..7c55638 100644 --- a/test/CodeGen/PowerPC/vec_rounding.ll +++ b/test/CodeGen/PowerPC/vec_rounding.ll @@ -13,8 +13,8 @@ define <2 x double> @floor_v2f64(<2 x double> %p) ret <2 x double> %t } ; CHECK: floor_v2f64: -; CHECK: bl floor -; CHECK: bl floor +; CHECK: frim +; CHECK: frim declare <4 x double> @llvm.floor.v4f64(<4 x double> %p) define <4 x double> @floor_v4f64(<4 x double> %p) @@ -23,10 +23,10 @@ define <4 x double> @floor_v4f64(<4 x double> %p) ret <4 x double> %t } ; CHECK: floor_v4f64: -; CHECK: bl floor -; CHECK: bl floor -; CHECK: bl floor -; CHECK: bl floor +; CHECK: frim +; CHECK: frim +; CHECK: frim +; CHECK: frim declare <2 x double> @llvm.ceil.v2f64(<2 x double> %p) define <2 x double> @ceil_v2f64(<2 x double> %p) @@ -35,8 +35,8 @@ define <2 x double> @ceil_v2f64(<2 x double> %p) ret <2 x double> %t } ; CHECK: ceil_v2f64: -; CHECK: bl ceil -; CHECK: bl ceil +; CHECK: frip +; CHECK: frip declare <4 x double> @llvm.ceil.v4f64(<4 x double> %p) define <4 x double> @ceil_v4f64(<4 x double> %p) @@ -45,10 +45,10 @@ define <4 x double> @ceil_v4f64(<4 x double> %p) ret <4 x double> %t } ; CHECK: ceil_v4f64: -; CHECK: bl ceil -; CHECK: bl ceil -; CHECK: bl ceil -; CHECK: bl ceil +; CHECK: frip +; CHECK: frip +; CHECK: frip +; CHECK: frip declare <2 x double> @llvm.trunc.v2f64(<2 x double> %p) define <2 x double> @trunc_v2f64(<2 x double> %p) @@ -57,8 +57,8 @@ define <2 x double> @trunc_v2f64(<2 x double> %p) ret <2 x double> %t } ; CHECK: trunc_v2f64: -; CHECK: bl trunc -; CHECK: bl trunc +; CHECK: friz +; CHECK: friz declare <4 x double> @llvm.trunc.v4f64(<4 x double> %p) define <4 x double> @trunc_v4f64(<4 x double> %p) @@ -67,10 +67,10 @@ define <4 x double> @trunc_v4f64(<4 x double> %p) ret <4 x double> %t } ; CHECK: trunc_v4f64: -; CHECK: bl trunc -; CHECK: bl trunc -; CHECK: bl trunc -; CHECK: bl trunc +; CHECK: friz +; CHECK: friz +; CHECK: friz +; CHECK: friz declare <2 x double> @llvm.nearbyint.v2f64(<2 x double> %p) define <2 x double> @nearbyint_v2f64(<2 x double> %p) diff --git a/test/CodeGen/PowerPC/vrsave-spill.ll b/test/CodeGen/PowerPC/vrsave-spill.ll new file mode 100644 index 0000000..c73206d --- /dev/null +++ b/test/CodeGen/PowerPC/vrsave-spill.ll @@ -0,0 +1,19 @@ +; RUN: llc < %s -mtriple=powerpc64-apple-darwin -mcpu=g5 | FileCheck %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-apple-darwin" + +define <4 x float> @foo(<4 x float> %a, <4 x float> %b) nounwind { +entry: + %c = fadd <4 x float> %a, %b + %d = fmul <4 x float> %c, %a + call void asm sideeffect "", "~{VRsave}"() nounwind + br label %return + +; CHECK: @foo +; CHECK: mfspr r{{[0-9]+}}, 256 +; CHECK: mtspr 256, r{{[0-9]+}} + +return: ; preds = %entry + ret <4 x float> %d +} + diff --git a/test/CodeGen/R600/README b/test/CodeGen/R600/README new file mode 100644 index 0000000..96998bb --- /dev/null +++ b/test/CodeGen/R600/README @@ -0,0 +1,21 @@ ++==============================================================================+ +| How to organize the lit tests | ++==============================================================================+ + +- If you write a test for matching a single DAG opcode or intrinsic, it should + go in a file called {opcode_name,intrinsic_name}.ll (e.g. fadd.ll) + +- If you write a test that matches several DAG opcodes and checks for a single + ISA instruction, then that test should go in a file called {ISA_name}.ll (e.g. + bfi_int.ll + +- For all other tests, use your best judgement for organizing tests and naming + the files. + ++==============================================================================+ +| Naming conventions | ++==============================================================================+ + +- Use dash '-' and not underscore '_' to separate words in file names, unless + the file is named after a DAG opcode or ISA instruction that has an + underscore '_' in its name. diff --git a/test/CodeGen/R600/add.v4i32.ll b/test/CodeGen/R600/add.ll index ac4a874..ac4a874 100644 --- a/test/CodeGen/R600/add.v4i32.ll +++ b/test/CodeGen/R600/add.ll diff --git a/test/CodeGen/R600/alu-split.ll b/test/CodeGen/R600/alu-split.ll new file mode 100644 index 0000000..48496f6 --- /dev/null +++ b/test/CodeGen/R600/alu-split.ll @@ -0,0 +1,851 @@ +;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s + +;CHECK: ALU +;CHECK: ALU +;CHECK: ALU +;CHECK-NOT: ALU +;CHECK: CF_END + +define void @main() #0 { +main_body: + %0 = call float @llvm.R600.load.input(i32 4) + %1 = call float @llvm.R600.load.input(i32 5) + %2 = call float @llvm.R600.load.input(i32 6) + %3 = call float @llvm.R600.load.input(i32 7) + %4 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 16) + %5 = extractelement <4 x float> %4, i32 0 + %6 = fcmp une float 0x4016F2B020000000, %5 + %7 = select i1 %6, float 1.000000e+00, float 0.000000e+00 + %8 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 16) + %9 = extractelement <4 x float> %8, i32 1 + %10 = fcmp une float 0x401FDCC640000000, %9 + %11 = select i1 %10, float 1.000000e+00, float 0.000000e+00 + %12 = fsub float -0.000000e+00, %7 + %13 = fptosi float %12 to i32 + %14 = fsub float -0.000000e+00, %11 + %15 = fptosi float %14 to i32 + %16 = bitcast i32 %13 to float + %17 = bitcast i32 %15 to float + %18 = bitcast float %16 to i32 + %19 = bitcast float %17 to i32 + %20 = or i32 %18, %19 + %21 = bitcast i32 %20 to float + %22 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 17) + %23 = extractelement <4 x float> %22, i32 0 + %24 = fcmp une float 0xC00574BC60000000, %23 + %25 = select i1 %24, float 1.000000e+00, float 0.000000e+00 + %26 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 17) + %27 = extractelement <4 x float> %26, i32 1 + %28 = fcmp une float 0x40210068E0000000, %27 + %29 = select i1 %28, float 1.000000e+00, float 0.000000e+00 + %30 = fsub float -0.000000e+00, %25 + %31 = fptosi float %30 to i32 + %32 = fsub float -0.000000e+00, %29 + %33 = fptosi float %32 to i32 + %34 = bitcast i32 %31 to float + %35 = bitcast i32 %33 to float + %36 = bitcast float %34 to i32 + %37 = bitcast float %35 to i32 + %38 = or i32 %36, %37 + %39 = bitcast i32 %38 to float + %40 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 18) + %41 = extractelement <4 x float> %40, i32 0 + %42 = fcmp une float 0xBFC9A6B500000000, %41 + %43 = select i1 %42, float 1.000000e+00, float 0.000000e+00 + %44 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 18) + %45 = extractelement <4 x float> %44, i32 1 + %46 = fcmp une float 0xC0119BDA60000000, %45 + %47 = select i1 %46, float 1.000000e+00, float 0.000000e+00 + %48 = fsub float -0.000000e+00, %43 + %49 = fptosi float %48 to i32 + %50 = fsub float -0.000000e+00, %47 + %51 = fptosi float %50 to i32 + %52 = bitcast i32 %49 to float + %53 = bitcast i32 %51 to float + %54 = bitcast float %52 to i32 + %55 = bitcast float %53 to i32 + %56 = or i32 %54, %55 + %57 = bitcast i32 %56 to float + %58 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 19) + %59 = extractelement <4 x float> %58, i32 0 + %60 = fcmp une float 0xC02085D640000000, %59 + %61 = select i1 %60, float 1.000000e+00, float 0.000000e+00 + %62 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 19) + %63 = extractelement <4 x float> %62, i32 1 + %64 = fcmp une float 0xBFD7C1BDA0000000, %63 + %65 = select i1 %64, float 1.000000e+00, float 0.000000e+00 + %66 = fsub float -0.000000e+00, %61 + %67 = fptosi float %66 to i32 + %68 = fsub float -0.000000e+00, %65 + %69 = fptosi float %68 to i32 + %70 = bitcast i32 %67 to float + %71 = bitcast i32 %69 to float + %72 = bitcast float %70 to i32 + %73 = bitcast float %71 to i32 + %74 = or i32 %72, %73 + %75 = bitcast i32 %74 to float + %76 = insertelement <4 x float> undef, float %21, i32 0 + %77 = insertelement <4 x float> %76, float %39, i32 1 + %78 = insertelement <4 x float> %77, float %57, i32 2 + %79 = insertelement <4 x float> %78, float %75, i32 3 + %80 = insertelement <4 x float> undef, float %21, i32 0 + %81 = insertelement <4 x float> %80, float %39, i32 1 + %82 = insertelement <4 x float> %81, float %57, i32 2 + %83 = insertelement <4 x float> %82, float %75, i32 3 + %84 = call float @llvm.AMDGPU.dp4(<4 x float> %79, <4 x float> %83) + %85 = bitcast float %84 to i32 + %86 = icmp ne i32 %85, 0 + %87 = sext i1 %86 to i32 + %88 = bitcast i32 %87 to float + %89 = bitcast float %88 to i32 + %90 = xor i32 %89, -1 + %91 = bitcast i32 %90 to float + %92 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 20) + %93 = extractelement <4 x float> %92, i32 0 + %94 = fcmp une float 0x401FDCC640000000, %93 + %95 = select i1 %94, float 1.000000e+00, float 0.000000e+00 + %96 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 20) + %97 = extractelement <4 x float> %96, i32 1 + %98 = fcmp une float 0xC00574BC60000000, %97 + %99 = select i1 %98, float 1.000000e+00, float 0.000000e+00 + %100 = fsub float -0.000000e+00, %95 + %101 = fptosi float %100 to i32 + %102 = fsub float -0.000000e+00, %99 + %103 = fptosi float %102 to i32 + %104 = bitcast i32 %101 to float + %105 = bitcast i32 %103 to float + %106 = bitcast float %104 to i32 + %107 = bitcast float %105 to i32 + %108 = or i32 %106, %107 + %109 = bitcast i32 %108 to float + %110 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 21) + %111 = extractelement <4 x float> %110, i32 0 + %112 = fcmp une float 0x40210068E0000000, %111 + %113 = select i1 %112, float 1.000000e+00, float 0.000000e+00 + %114 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 21) + %115 = extractelement <4 x float> %114, i32 1 + %116 = fcmp une float 0xBFC9A6B500000000, %115 + %117 = select i1 %116, float 1.000000e+00, float 0.000000e+00 + %118 = fsub float -0.000000e+00, %113 + %119 = fptosi float %118 to i32 + %120 = fsub float -0.000000e+00, %117 + %121 = fptosi float %120 to i32 + %122 = bitcast i32 %119 to float + %123 = bitcast i32 %121 to float + %124 = bitcast float %122 to i32 + %125 = bitcast float %123 to i32 + %126 = or i32 %124, %125 + %127 = bitcast i32 %126 to float + %128 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 22) + %129 = extractelement <4 x float> %128, i32 0 + %130 = fcmp une float 0xC0119BDA60000000, %129 + %131 = select i1 %130, float 1.000000e+00, float 0.000000e+00 + %132 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 22) + %133 = extractelement <4 x float> %132, i32 1 + %134 = fcmp une float 0xC02085D640000000, %133 + %135 = select i1 %134, float 1.000000e+00, float 0.000000e+00 + %136 = fsub float -0.000000e+00, %131 + %137 = fptosi float %136 to i32 + %138 = fsub float -0.000000e+00, %135 + %139 = fptosi float %138 to i32 + %140 = bitcast i32 %137 to float + %141 = bitcast i32 %139 to float + %142 = bitcast float %140 to i32 + %143 = bitcast float %141 to i32 + %144 = or i32 %142, %143 + %145 = bitcast i32 %144 to float + %146 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 23) + %147 = extractelement <4 x float> %146, i32 0 + %148 = fcmp une float 0xBFD7C1BDA0000000, %147 + %149 = select i1 %148, float 1.000000e+00, float 0.000000e+00 + %150 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 23) + %151 = extractelement <4 x float> %150, i32 1 + %152 = fcmp une float 0x401E1D7DC0000000, %151 + %153 = select i1 %152, float 1.000000e+00, float 0.000000e+00 + %154 = fsub float -0.000000e+00, %149 + %155 = fptosi float %154 to i32 + %156 = fsub float -0.000000e+00, %153 + %157 = fptosi float %156 to i32 + %158 = bitcast i32 %155 to float + %159 = bitcast i32 %157 to float + %160 = bitcast float %158 to i32 + %161 = bitcast float %159 to i32 + %162 = or i32 %160, %161 + %163 = bitcast i32 %162 to float + %164 = insertelement <4 x float> undef, float %109, i32 0 + %165 = insertelement <4 x float> %164, float %127, i32 1 + %166 = insertelement <4 x float> %165, float %145, i32 2 + %167 = insertelement <4 x float> %166, float %163, i32 3 + %168 = insertelement <4 x float> undef, float %109, i32 0 + %169 = insertelement <4 x float> %168, float %127, i32 1 + %170 = insertelement <4 x float> %169, float %145, i32 2 + %171 = insertelement <4 x float> %170, float %163, i32 3 + %172 = call float @llvm.AMDGPU.dp4(<4 x float> %167, <4 x float> %171) + %173 = bitcast float %172 to i32 + %174 = icmp ne i32 %173, 0 + %175 = sext i1 %174 to i32 + %176 = bitcast i32 %175 to float + %177 = bitcast float %176 to i32 + %178 = xor i32 %177, -1 + %179 = bitcast i32 %178 to float + %180 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 8) + %181 = extractelement <4 x float> %180, i32 0 + %182 = fcmp une float 0x401FDCC640000000, %181 + %183 = select i1 %182, float 1.000000e+00, float 0.000000e+00 + %184 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 8) + %185 = extractelement <4 x float> %184, i32 1 + %186 = fcmp une float 0xC00574BC60000000, %185 + %187 = select i1 %186, float 1.000000e+00, float 0.000000e+00 + %188 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 8) + %189 = extractelement <4 x float> %188, i32 2 + %190 = fcmp une float 0x40210068E0000000, %189 + %191 = select i1 %190, float 1.000000e+00, float 0.000000e+00 + %192 = fsub float -0.000000e+00, %183 + %193 = fptosi float %192 to i32 + %194 = fsub float -0.000000e+00, %187 + %195 = fptosi float %194 to i32 + %196 = fsub float -0.000000e+00, %191 + %197 = fptosi float %196 to i32 + %198 = bitcast i32 %193 to float + %199 = bitcast i32 %195 to float + %200 = bitcast i32 %197 to float + %201 = bitcast float %199 to i32 + %202 = bitcast float %200 to i32 + %203 = or i32 %201, %202 + %204 = bitcast i32 %203 to float + %205 = bitcast float %198 to i32 + %206 = bitcast float %204 to i32 + %207 = or i32 %205, %206 + %208 = bitcast i32 %207 to float + %209 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 9) + %210 = extractelement <4 x float> %209, i32 0 + %211 = fcmp une float 0xBFC9A6B500000000, %210 + %212 = select i1 %211, float 1.000000e+00, float 0.000000e+00 + %213 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 9) + %214 = extractelement <4 x float> %213, i32 1 + %215 = fcmp une float 0xC0119BDA60000000, %214 + %216 = select i1 %215, float 1.000000e+00, float 0.000000e+00 + %217 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 9) + %218 = extractelement <4 x float> %217, i32 2 + %219 = fcmp une float 0xC02085D640000000, %218 + %220 = select i1 %219, float 1.000000e+00, float 0.000000e+00 + %221 = fsub float -0.000000e+00, %212 + %222 = fptosi float %221 to i32 + %223 = fsub float -0.000000e+00, %216 + %224 = fptosi float %223 to i32 + %225 = fsub float -0.000000e+00, %220 + %226 = fptosi float %225 to i32 + %227 = bitcast i32 %222 to float + %228 = bitcast i32 %224 to float + %229 = bitcast i32 %226 to float + %230 = bitcast float %228 to i32 + %231 = bitcast float %229 to i32 + %232 = or i32 %230, %231 + %233 = bitcast i32 %232 to float + %234 = bitcast float %227 to i32 + %235 = bitcast float %233 to i32 + %236 = or i32 %234, %235 + %237 = bitcast i32 %236 to float + %238 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 10) + %239 = extractelement <4 x float> %238, i32 0 + %240 = fcmp une float 0xBFD7C1BDA0000000, %239 + %241 = select i1 %240, float 1.000000e+00, float 0.000000e+00 + %242 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 10) + %243 = extractelement <4 x float> %242, i32 1 + %244 = fcmp une float 0x401E1D7DC0000000, %243 + %245 = select i1 %244, float 1.000000e+00, float 0.000000e+00 + %246 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 10) + %247 = extractelement <4 x float> %246, i32 2 + %248 = fcmp une float 0xC019893740000000, %247 + %249 = select i1 %248, float 1.000000e+00, float 0.000000e+00 + %250 = fsub float -0.000000e+00, %241 + %251 = fptosi float %250 to i32 + %252 = fsub float -0.000000e+00, %245 + %253 = fptosi float %252 to i32 + %254 = fsub float -0.000000e+00, %249 + %255 = fptosi float %254 to i32 + %256 = bitcast i32 %251 to float + %257 = bitcast i32 %253 to float + %258 = bitcast i32 %255 to float + %259 = bitcast float %257 to i32 + %260 = bitcast float %258 to i32 + %261 = or i32 %259, %260 + %262 = bitcast i32 %261 to float + %263 = bitcast float %256 to i32 + %264 = bitcast float %262 to i32 + %265 = or i32 %263, %264 + %266 = bitcast i32 %265 to float + %267 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 11) + %268 = extractelement <4 x float> %267, i32 0 + %269 = fcmp une float 0x40220F0D80000000, %268 + %270 = select i1 %269, float 1.000000e+00, float 0.000000e+00 + %271 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 11) + %272 = extractelement <4 x float> %271, i32 1 + %273 = fcmp une float 0xC018E2EB20000000, %272 + %274 = select i1 %273, float 1.000000e+00, float 0.000000e+00 + %275 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 11) + %276 = extractelement <4 x float> %275, i32 2 + %277 = fcmp une float 0xBFEA8DB8C0000000, %276 + %278 = select i1 %277, float 1.000000e+00, float 0.000000e+00 + %279 = fsub float -0.000000e+00, %270 + %280 = fptosi float %279 to i32 + %281 = fsub float -0.000000e+00, %274 + %282 = fptosi float %281 to i32 + %283 = fsub float -0.000000e+00, %278 + %284 = fptosi float %283 to i32 + %285 = bitcast i32 %280 to float + %286 = bitcast i32 %282 to float + %287 = bitcast i32 %284 to float + %288 = bitcast float %286 to i32 + %289 = bitcast float %287 to i32 + %290 = or i32 %288, %289 + %291 = bitcast i32 %290 to float + %292 = bitcast float %285 to i32 + %293 = bitcast float %291 to i32 + %294 = or i32 %292, %293 + %295 = bitcast i32 %294 to float + %296 = insertelement <4 x float> undef, float %208, i32 0 + %297 = insertelement <4 x float> %296, float %237, i32 1 + %298 = insertelement <4 x float> %297, float %266, i32 2 + %299 = insertelement <4 x float> %298, float %295, i32 3 + %300 = insertelement <4 x float> undef, float %208, i32 0 + %301 = insertelement <4 x float> %300, float %237, i32 1 + %302 = insertelement <4 x float> %301, float %266, i32 2 + %303 = insertelement <4 x float> %302, float %295, i32 3 + %304 = call float @llvm.AMDGPU.dp4(<4 x float> %299, <4 x float> %303) + %305 = bitcast float %304 to i32 + %306 = icmp ne i32 %305, 0 + %307 = sext i1 %306 to i32 + %308 = bitcast i32 %307 to float + %309 = bitcast float %308 to i32 + %310 = xor i32 %309, -1 + %311 = bitcast i32 %310 to float + %312 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 12) + %313 = extractelement <4 x float> %312, i32 0 + %314 = fcmp une float 0xC00574BC60000000, %313 + %315 = select i1 %314, float 1.000000e+00, float 0.000000e+00 + %316 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 12) + %317 = extractelement <4 x float> %316, i32 1 + %318 = fcmp une float 0x40210068E0000000, %317 + %319 = select i1 %318, float 1.000000e+00, float 0.000000e+00 + %320 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 12) + %321 = extractelement <4 x float> %320, i32 2 + %322 = fcmp une float 0xBFC9A6B500000000, %321 + %323 = select i1 %322, float 1.000000e+00, float 0.000000e+00 + %324 = fsub float -0.000000e+00, %315 + %325 = fptosi float %324 to i32 + %326 = fsub float -0.000000e+00, %319 + %327 = fptosi float %326 to i32 + %328 = fsub float -0.000000e+00, %323 + %329 = fptosi float %328 to i32 + %330 = bitcast i32 %325 to float + %331 = bitcast i32 %327 to float + %332 = bitcast i32 %329 to float + %333 = bitcast float %331 to i32 + %334 = bitcast float %332 to i32 + %335 = or i32 %333, %334 + %336 = bitcast i32 %335 to float + %337 = bitcast float %330 to i32 + %338 = bitcast float %336 to i32 + %339 = or i32 %337, %338 + %340 = bitcast i32 %339 to float + %341 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 13) + %342 = extractelement <4 x float> %341, i32 0 + %343 = fcmp une float 0xC0119BDA60000000, %342 + %344 = select i1 %343, float 1.000000e+00, float 0.000000e+00 + %345 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 13) + %346 = extractelement <4 x float> %345, i32 1 + %347 = fcmp une float 0xC02085D640000000, %346 + %348 = select i1 %347, float 1.000000e+00, float 0.000000e+00 + %349 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 13) + %350 = extractelement <4 x float> %349, i32 2 + %351 = fcmp une float 0xBFD7C1BDA0000000, %350 + %352 = select i1 %351, float 1.000000e+00, float 0.000000e+00 + %353 = fsub float -0.000000e+00, %344 + %354 = fptosi float %353 to i32 + %355 = fsub float -0.000000e+00, %348 + %356 = fptosi float %355 to i32 + %357 = fsub float -0.000000e+00, %352 + %358 = fptosi float %357 to i32 + %359 = bitcast i32 %354 to float + %360 = bitcast i32 %356 to float + %361 = bitcast i32 %358 to float + %362 = bitcast float %360 to i32 + %363 = bitcast float %361 to i32 + %364 = or i32 %362, %363 + %365 = bitcast i32 %364 to float + %366 = bitcast float %359 to i32 + %367 = bitcast float %365 to i32 + %368 = or i32 %366, %367 + %369 = bitcast i32 %368 to float + %370 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 14) + %371 = extractelement <4 x float> %370, i32 0 + %372 = fcmp une float 0x401E1D7DC0000000, %371 + %373 = select i1 %372, float 1.000000e+00, float 0.000000e+00 + %374 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 14) + %375 = extractelement <4 x float> %374, i32 1 + %376 = fcmp une float 0xC019893740000000, %375 + %377 = select i1 %376, float 1.000000e+00, float 0.000000e+00 + %378 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 14) + %379 = extractelement <4 x float> %378, i32 2 + %380 = fcmp une float 0x40220F0D80000000, %379 + %381 = select i1 %380, float 1.000000e+00, float 0.000000e+00 + %382 = fsub float -0.000000e+00, %373 + %383 = fptosi float %382 to i32 + %384 = fsub float -0.000000e+00, %377 + %385 = fptosi float %384 to i32 + %386 = fsub float -0.000000e+00, %381 + %387 = fptosi float %386 to i32 + %388 = bitcast i32 %383 to float + %389 = bitcast i32 %385 to float + %390 = bitcast i32 %387 to float + %391 = bitcast float %389 to i32 + %392 = bitcast float %390 to i32 + %393 = or i32 %391, %392 + %394 = bitcast i32 %393 to float + %395 = bitcast float %388 to i32 + %396 = bitcast float %394 to i32 + %397 = or i32 %395, %396 + %398 = bitcast i32 %397 to float + %399 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 15) + %400 = extractelement <4 x float> %399, i32 0 + %401 = fcmp une float 0xC018E2EB20000000, %400 + %402 = select i1 %401, float 1.000000e+00, float 0.000000e+00 + %403 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 15) + %404 = extractelement <4 x float> %403, i32 1 + %405 = fcmp une float 0xBFEA8DB8C0000000, %404 + %406 = select i1 %405, float 1.000000e+00, float 0.000000e+00 + %407 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 15) + %408 = extractelement <4 x float> %407, i32 2 + %409 = fcmp une float 0x4015236E20000000, %408 + %410 = select i1 %409, float 1.000000e+00, float 0.000000e+00 + %411 = fsub float -0.000000e+00, %402 + %412 = fptosi float %411 to i32 + %413 = fsub float -0.000000e+00, %406 + %414 = fptosi float %413 to i32 + %415 = fsub float -0.000000e+00, %410 + %416 = fptosi float %415 to i32 + %417 = bitcast i32 %412 to float + %418 = bitcast i32 %414 to float + %419 = bitcast i32 %416 to float + %420 = bitcast float %418 to i32 + %421 = bitcast float %419 to i32 + %422 = or i32 %420, %421 + %423 = bitcast i32 %422 to float + %424 = bitcast float %417 to i32 + %425 = bitcast float %423 to i32 + %426 = or i32 %424, %425 + %427 = bitcast i32 %426 to float + %428 = insertelement <4 x float> undef, float %340, i32 0 + %429 = insertelement <4 x float> %428, float %369, i32 1 + %430 = insertelement <4 x float> %429, float %398, i32 2 + %431 = insertelement <4 x float> %430, float %427, i32 3 + %432 = insertelement <4 x float> undef, float %340, i32 0 + %433 = insertelement <4 x float> %432, float %369, i32 1 + %434 = insertelement <4 x float> %433, float %398, i32 2 + %435 = insertelement <4 x float> %434, float %427, i32 3 + %436 = call float @llvm.AMDGPU.dp4(<4 x float> %431, <4 x float> %435) + %437 = bitcast float %436 to i32 + %438 = icmp ne i32 %437, 0 + %439 = sext i1 %438 to i32 + %440 = bitcast i32 %439 to float + %441 = bitcast float %440 to i32 + %442 = xor i32 %441, -1 + %443 = bitcast i32 %442 to float + %444 = load <4 x float> addrspace(8)* null + %445 = extractelement <4 x float> %444, i32 0 + %446 = fcmp une float 0xC00574BC60000000, %445 + %447 = select i1 %446, float 1.000000e+00, float 0.000000e+00 + %448 = load <4 x float> addrspace(8)* null + %449 = extractelement <4 x float> %448, i32 1 + %450 = fcmp une float 0x40210068E0000000, %449 + %451 = select i1 %450, float 1.000000e+00, float 0.000000e+00 + %452 = load <4 x float> addrspace(8)* null + %453 = extractelement <4 x float> %452, i32 2 + %454 = fcmp une float 0xBFC9A6B500000000, %453 + %455 = select i1 %454, float 1.000000e+00, float 0.000000e+00 + %456 = load <4 x float> addrspace(8)* null + %457 = extractelement <4 x float> %456, i32 3 + %458 = fcmp une float 0xC0119BDA60000000, %457 + %459 = select i1 %458, float 1.000000e+00, float 0.000000e+00 + %460 = fsub float -0.000000e+00, %447 + %461 = fptosi float %460 to i32 + %462 = fsub float -0.000000e+00, %451 + %463 = fptosi float %462 to i32 + %464 = fsub float -0.000000e+00, %455 + %465 = fptosi float %464 to i32 + %466 = fsub float -0.000000e+00, %459 + %467 = fptosi float %466 to i32 + %468 = bitcast i32 %461 to float + %469 = bitcast i32 %463 to float + %470 = bitcast i32 %465 to float + %471 = bitcast i32 %467 to float + %472 = bitcast float %468 to i32 + %473 = bitcast float %469 to i32 + %474 = or i32 %472, %473 + %475 = bitcast i32 %474 to float + %476 = bitcast float %470 to i32 + %477 = bitcast float %471 to i32 + %478 = or i32 %476, %477 + %479 = bitcast i32 %478 to float + %480 = bitcast float %475 to i32 + %481 = bitcast float %479 to i32 + %482 = or i32 %480, %481 + %483 = bitcast i32 %482 to float + %484 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1) + %485 = extractelement <4 x float> %484, i32 0 + %486 = fcmp une float 0xC02085D640000000, %485 + %487 = select i1 %486, float 1.000000e+00, float 0.000000e+00 + %488 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1) + %489 = extractelement <4 x float> %488, i32 1 + %490 = fcmp une float 0xBFD7C1BDA0000000, %489 + %491 = select i1 %490, float 1.000000e+00, float 0.000000e+00 + %492 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1) + %493 = extractelement <4 x float> %492, i32 2 + %494 = fcmp une float 0x401E1D7DC0000000, %493 + %495 = select i1 %494, float 1.000000e+00, float 0.000000e+00 + %496 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1) + %497 = extractelement <4 x float> %496, i32 3 + %498 = fcmp une float 0xC019893740000000, %497 + %499 = select i1 %498, float 1.000000e+00, float 0.000000e+00 + %500 = fsub float -0.000000e+00, %487 + %501 = fptosi float %500 to i32 + %502 = fsub float -0.000000e+00, %491 + %503 = fptosi float %502 to i32 + %504 = fsub float -0.000000e+00, %495 + %505 = fptosi float %504 to i32 + %506 = fsub float -0.000000e+00, %499 + %507 = fptosi float %506 to i32 + %508 = bitcast i32 %501 to float + %509 = bitcast i32 %503 to float + %510 = bitcast i32 %505 to float + %511 = bitcast i32 %507 to float + %512 = bitcast float %508 to i32 + %513 = bitcast float %509 to i32 + %514 = or i32 %512, %513 + %515 = bitcast i32 %514 to float + %516 = bitcast float %510 to i32 + %517 = bitcast float %511 to i32 + %518 = or i32 %516, %517 + %519 = bitcast i32 %518 to float + %520 = bitcast float %515 to i32 + %521 = bitcast float %519 to i32 + %522 = or i32 %520, %521 + %523 = bitcast i32 %522 to float + %524 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2) + %525 = extractelement <4 x float> %524, i32 0 + %526 = fcmp une float 0x40220F0D80000000, %525 + %527 = select i1 %526, float 1.000000e+00, float 0.000000e+00 + %528 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2) + %529 = extractelement <4 x float> %528, i32 1 + %530 = fcmp une float 0xC018E2EB20000000, %529 + %531 = select i1 %530, float 1.000000e+00, float 0.000000e+00 + %532 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2) + %533 = extractelement <4 x float> %532, i32 2 + %534 = fcmp une float 0xBFEA8DB8C0000000, %533 + %535 = select i1 %534, float 1.000000e+00, float 0.000000e+00 + %536 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 2) + %537 = extractelement <4 x float> %536, i32 3 + %538 = fcmp une float 0x4015236E20000000, %537 + %539 = select i1 %538, float 1.000000e+00, float 0.000000e+00 + %540 = fsub float -0.000000e+00, %527 + %541 = fptosi float %540 to i32 + %542 = fsub float -0.000000e+00, %531 + %543 = fptosi float %542 to i32 + %544 = fsub float -0.000000e+00, %535 + %545 = fptosi float %544 to i32 + %546 = fsub float -0.000000e+00, %539 + %547 = fptosi float %546 to i32 + %548 = bitcast i32 %541 to float + %549 = bitcast i32 %543 to float + %550 = bitcast i32 %545 to float + %551 = bitcast i32 %547 to float + %552 = bitcast float %548 to i32 + %553 = bitcast float %549 to i32 + %554 = or i32 %552, %553 + %555 = bitcast i32 %554 to float + %556 = bitcast float %550 to i32 + %557 = bitcast float %551 to i32 + %558 = or i32 %556, %557 + %559 = bitcast i32 %558 to float + %560 = bitcast float %555 to i32 + %561 = bitcast float %559 to i32 + %562 = or i32 %560, %561 + %563 = bitcast i32 %562 to float + %564 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3) + %565 = extractelement <4 x float> %564, i32 0 + %566 = fcmp une float 0x4016ED5D00000000, %565 + %567 = select i1 %566, float 1.000000e+00, float 0.000000e+00 + %568 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3) + %569 = extractelement <4 x float> %568, i32 1 + %570 = fcmp une float 0x402332FEC0000000, %569 + %571 = select i1 %570, float 1.000000e+00, float 0.000000e+00 + %572 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3) + %573 = extractelement <4 x float> %572, i32 2 + %574 = fcmp une float 0xC01484B5E0000000, %573 + %575 = select i1 %574, float 1.000000e+00, float 0.000000e+00 + %576 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 3) + %577 = extractelement <4 x float> %576, i32 3 + %578 = fcmp une float 0x400179A6C0000000, %577 + %579 = select i1 %578, float 1.000000e+00, float 0.000000e+00 + %580 = fsub float -0.000000e+00, %567 + %581 = fptosi float %580 to i32 + %582 = fsub float -0.000000e+00, %571 + %583 = fptosi float %582 to i32 + %584 = fsub float -0.000000e+00, %575 + %585 = fptosi float %584 to i32 + %586 = fsub float -0.000000e+00, %579 + %587 = fptosi float %586 to i32 + %588 = bitcast i32 %581 to float + %589 = bitcast i32 %583 to float + %590 = bitcast i32 %585 to float + %591 = bitcast i32 %587 to float + %592 = bitcast float %588 to i32 + %593 = bitcast float %589 to i32 + %594 = or i32 %592, %593 + %595 = bitcast i32 %594 to float + %596 = bitcast float %590 to i32 + %597 = bitcast float %591 to i32 + %598 = or i32 %596, %597 + %599 = bitcast i32 %598 to float + %600 = bitcast float %595 to i32 + %601 = bitcast float %599 to i32 + %602 = or i32 %600, %601 + %603 = bitcast i32 %602 to float + %604 = insertelement <4 x float> undef, float %483, i32 0 + %605 = insertelement <4 x float> %604, float %523, i32 1 + %606 = insertelement <4 x float> %605, float %563, i32 2 + %607 = insertelement <4 x float> %606, float %603, i32 3 + %608 = insertelement <4 x float> undef, float %483, i32 0 + %609 = insertelement <4 x float> %608, float %523, i32 1 + %610 = insertelement <4 x float> %609, float %563, i32 2 + %611 = insertelement <4 x float> %610, float %603, i32 3 + %612 = call float @llvm.AMDGPU.dp4(<4 x float> %607, <4 x float> %611) + %613 = bitcast float %612 to i32 + %614 = icmp ne i32 %613, 0 + %615 = sext i1 %614 to i32 + %616 = bitcast i32 %615 to float + %617 = bitcast float %616 to i32 + %618 = xor i32 %617, -1 + %619 = bitcast i32 %618 to float + %620 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 4) + %621 = extractelement <4 x float> %620, i32 0 + %622 = fcmp une float 0x40210068E0000000, %621 + %623 = select i1 %622, float 1.000000e+00, float 0.000000e+00 + %624 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 4) + %625 = extractelement <4 x float> %624, i32 1 + %626 = fcmp une float 0xBFC9A6B500000000, %625 + %627 = select i1 %626, float 1.000000e+00, float 0.000000e+00 + %628 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 4) + %629 = extractelement <4 x float> %628, i32 2 + %630 = fcmp une float 0xC0119BDA60000000, %629 + %631 = select i1 %630, float 1.000000e+00, float 0.000000e+00 + %632 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 4) + %633 = extractelement <4 x float> %632, i32 3 + %634 = fcmp une float 0xC02085D640000000, %633 + %635 = select i1 %634, float 1.000000e+00, float 0.000000e+00 + %636 = fsub float -0.000000e+00, %623 + %637 = fptosi float %636 to i32 + %638 = fsub float -0.000000e+00, %627 + %639 = fptosi float %638 to i32 + %640 = fsub float -0.000000e+00, %631 + %641 = fptosi float %640 to i32 + %642 = fsub float -0.000000e+00, %635 + %643 = fptosi float %642 to i32 + %644 = bitcast i32 %637 to float + %645 = bitcast i32 %639 to float + %646 = bitcast i32 %641 to float + %647 = bitcast i32 %643 to float + %648 = bitcast float %644 to i32 + %649 = bitcast float %645 to i32 + %650 = or i32 %648, %649 + %651 = bitcast i32 %650 to float + %652 = bitcast float %646 to i32 + %653 = bitcast float %647 to i32 + %654 = or i32 %652, %653 + %655 = bitcast i32 %654 to float + %656 = bitcast float %651 to i32 + %657 = bitcast float %655 to i32 + %658 = or i32 %656, %657 + %659 = bitcast i32 %658 to float + %660 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 5) + %661 = extractelement <4 x float> %660, i32 0 + %662 = fcmp une float 0xBFD7C1BDA0000000, %661 + %663 = select i1 %662, float 1.000000e+00, float 0.000000e+00 + %664 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 5) + %665 = extractelement <4 x float> %664, i32 1 + %666 = fcmp une float 0x401E1D7DC0000000, %665 + %667 = select i1 %666, float 1.000000e+00, float 0.000000e+00 + %668 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 5) + %669 = extractelement <4 x float> %668, i32 2 + %670 = fcmp une float 0xC019893740000000, %669 + %671 = select i1 %670, float 1.000000e+00, float 0.000000e+00 + %672 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 5) + %673 = extractelement <4 x float> %672, i32 3 + %674 = fcmp une float 0x40220F0D80000000, %673 + %675 = select i1 %674, float 1.000000e+00, float 0.000000e+00 + %676 = fsub float -0.000000e+00, %663 + %677 = fptosi float %676 to i32 + %678 = fsub float -0.000000e+00, %667 + %679 = fptosi float %678 to i32 + %680 = fsub float -0.000000e+00, %671 + %681 = fptosi float %680 to i32 + %682 = fsub float -0.000000e+00, %675 + %683 = fptosi float %682 to i32 + %684 = bitcast i32 %677 to float + %685 = bitcast i32 %679 to float + %686 = bitcast i32 %681 to float + %687 = bitcast i32 %683 to float + %688 = bitcast float %684 to i32 + %689 = bitcast float %685 to i32 + %690 = or i32 %688, %689 + %691 = bitcast i32 %690 to float + %692 = bitcast float %686 to i32 + %693 = bitcast float %687 to i32 + %694 = or i32 %692, %693 + %695 = bitcast i32 %694 to float + %696 = bitcast float %691 to i32 + %697 = bitcast float %695 to i32 + %698 = or i32 %696, %697 + %699 = bitcast i32 %698 to float + %700 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 6) + %701 = extractelement <4 x float> %700, i32 0 + %702 = fcmp une float 0xC018E2EB20000000, %701 + %703 = select i1 %702, float 1.000000e+00, float 0.000000e+00 + %704 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 6) + %705 = extractelement <4 x float> %704, i32 1 + %706 = fcmp une float 0xBFEA8DB8C0000000, %705 + %707 = select i1 %706, float 1.000000e+00, float 0.000000e+00 + %708 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 6) + %709 = extractelement <4 x float> %708, i32 2 + %710 = fcmp une float 0x4015236E20000000, %709 + %711 = select i1 %710, float 1.000000e+00, float 0.000000e+00 + %712 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 6) + %713 = extractelement <4 x float> %712, i32 3 + %714 = fcmp une float 0x4016ED5D00000000, %713 + %715 = select i1 %714, float 1.000000e+00, float 0.000000e+00 + %716 = fsub float -0.000000e+00, %703 + %717 = fptosi float %716 to i32 + %718 = fsub float -0.000000e+00, %707 + %719 = fptosi float %718 to i32 + %720 = fsub float -0.000000e+00, %711 + %721 = fptosi float %720 to i32 + %722 = fsub float -0.000000e+00, %715 + %723 = fptosi float %722 to i32 + %724 = bitcast i32 %717 to float + %725 = bitcast i32 %719 to float + %726 = bitcast i32 %721 to float + %727 = bitcast i32 %723 to float + %728 = bitcast float %724 to i32 + %729 = bitcast float %725 to i32 + %730 = or i32 %728, %729 + %731 = bitcast i32 %730 to float + %732 = bitcast float %726 to i32 + %733 = bitcast float %727 to i32 + %734 = or i32 %732, %733 + %735 = bitcast i32 %734 to float + %736 = bitcast float %731 to i32 + %737 = bitcast float %735 to i32 + %738 = or i32 %736, %737 + %739 = bitcast i32 %738 to float + %740 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 7) + %741 = extractelement <4 x float> %740, i32 0 + %742 = fcmp une float 0x402332FEC0000000, %741 + %743 = select i1 %742, float 1.000000e+00, float 0.000000e+00 + %744 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 7) + %745 = extractelement <4 x float> %744, i32 1 + %746 = fcmp une float 0xC01484B5E0000000, %745 + %747 = select i1 %746, float 1.000000e+00, float 0.000000e+00 + %748 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 7) + %749 = extractelement <4 x float> %748, i32 2 + %750 = fcmp une float 0x400179A6C0000000, %749 + %751 = select i1 %750, float 1.000000e+00, float 0.000000e+00 + %752 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 7) + %753 = extractelement <4 x float> %752, i32 3 + %754 = fcmp une float 0xBFEE752540000000, %753 + %755 = select i1 %754, float 1.000000e+00, float 0.000000e+00 + %756 = fsub float -0.000000e+00, %743 + %757 = fptosi float %756 to i32 + %758 = fsub float -0.000000e+00, %747 + %759 = fptosi float %758 to i32 + %760 = fsub float -0.000000e+00, %751 + %761 = fptosi float %760 to i32 + %762 = fsub float -0.000000e+00, %755 + %763 = fptosi float %762 to i32 + %764 = bitcast i32 %757 to float + %765 = bitcast i32 %759 to float + %766 = bitcast i32 %761 to float + %767 = bitcast i32 %763 to float + %768 = bitcast float %764 to i32 + %769 = bitcast float %765 to i32 + %770 = or i32 %768, %769 + %771 = bitcast i32 %770 to float + %772 = bitcast float %766 to i32 + %773 = bitcast float %767 to i32 + %774 = or i32 %772, %773 + %775 = bitcast i32 %774 to float + %776 = bitcast float %771 to i32 + %777 = bitcast float %775 to i32 + %778 = or i32 %776, %777 + %779 = bitcast i32 %778 to float + %780 = insertelement <4 x float> undef, float %659, i32 0 + %781 = insertelement <4 x float> %780, float %699, i32 1 + %782 = insertelement <4 x float> %781, float %739, i32 2 + %783 = insertelement <4 x float> %782, float %779, i32 3 + %784 = insertelement <4 x float> undef, float %659, i32 0 + %785 = insertelement <4 x float> %784, float %699, i32 1 + %786 = insertelement <4 x float> %785, float %739, i32 2 + %787 = insertelement <4 x float> %786, float %779, i32 3 + %788 = call float @llvm.AMDGPU.dp4(<4 x float> %783, <4 x float> %787) + %789 = bitcast float %788 to i32 + %790 = icmp ne i32 %789, 0 + %791 = sext i1 %790 to i32 + %792 = bitcast i32 %791 to float + %793 = bitcast float %792 to i32 + %794 = xor i32 %793, -1 + %795 = bitcast i32 %794 to float + %796 = bitcast float %91 to i32 + %797 = bitcast float %179 to i32 + %798 = and i32 %796, %797 + %799 = bitcast i32 %798 to float + %800 = bitcast float %311 to i32 + %801 = bitcast float %443 to i32 + %802 = and i32 %800, %801 + %803 = bitcast i32 %802 to float + %804 = bitcast float %799 to i32 + %805 = bitcast float %803 to i32 + %806 = and i32 %804, %805 + %807 = bitcast i32 %806 to float + %808 = bitcast float %619 to i32 + %809 = bitcast float %795 to i32 + %810 = and i32 %808, %809 + %811 = bitcast i32 %810 to float + %812 = bitcast float %807 to i32 + %813 = bitcast float %811 to i32 + %814 = and i32 %812, %813 + %815 = bitcast i32 %814 to float + %816 = bitcast float %815 to i32 + %817 = icmp ne i32 %816, 0 + %. = select i1 %817, float 1.000000e+00, float 0.000000e+00 + %.32 = select i1 %817, float 0.000000e+00, float 1.000000e+00 + %818 = insertelement <4 x float> undef, float %0, i32 0 + %819 = insertelement <4 x float> %818, float %1, i32 1 + %820 = insertelement <4 x float> %819, float %2, i32 2 + %821 = insertelement <4 x float> %820, float %3, i32 3 + call void @llvm.R600.store.swizzle(<4 x float> %821, i32 60, i32 1) + %822 = insertelement <4 x float> undef, float %.32, i32 0 + %823 = insertelement <4 x float> %822, float %., i32 1 + %824 = insertelement <4 x float> %823, float 0.000000e+00, i32 2 + %825 = insertelement <4 x float> %824, float 1.000000e+00, i32 3 + call void @llvm.R600.store.swizzle(<4 x float> %825, i32 0, i32 2) + ret void +} + +declare float @llvm.R600.load.input(i32) #1 + +declare float @llvm.AMDGPU.dp4(<4 x float>, <4 x float>) #1 + +declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) + +attributes #0 = { "ShaderType"="1" } +attributes #1 = { readnone } diff --git a/test/CodeGen/R600/and.v4i32.ll b/test/CodeGen/R600/and.ll index 662085e..662085e 100644 --- a/test/CodeGen/R600/and.v4i32.ll +++ b/test/CodeGen/R600/and.ll diff --git a/test/CodeGen/R600/bfi_int.ll b/test/CodeGen/R600/bfi_int.ll new file mode 100644 index 0000000..c9015a6 --- /dev/null +++ b/test/CodeGen/R600/bfi_int.ll @@ -0,0 +1,34 @@ +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=R600-CHECK %s +; RUN: llc < %s -march=r600 -mcpu=SI | FileCheck --check-prefix=SI-CHECK %s + +; BFI_INT Definition pattern from ISA docs +; (y & x) | (z & ~x) +; +; R600-CHECK: @bfi_def +; R600-CHECK: BFI_INT +; SI-CHECK: @bfi_def +; SI-CHECK: V_BFI_B32 +define void @bfi_def(i32 addrspace(1)* %out, i32 %x, i32 %y, i32 %z) { +entry: + %0 = xor i32 %x, -1 + %1 = and i32 %z, %0 + %2 = and i32 %y, %x + %3 = or i32 %1, %2 + store i32 %3, i32 addrspace(1)* %out + ret void +} + +; SHA-256 Ch function +; z ^ (x & (y ^ z)) +; R600-CHECK: @bfi_sha256_ch +; R600-CHECK: BFI_INT +; SI-CHECK: @bfi_sha256_ch +; SI-CHECK: V_BFI_B32 +define void @bfi_sha256_ch(i32 addrspace(1)* %out, i32 %x, i32 %y, i32 %z) { +entry: + %0 = xor i32 %y, %z + %1 = and i32 %x, %0 + %2 = xor i32 %z, %1 + store i32 %2, i32 addrspace(1)* %out + ret void +} diff --git a/test/CodeGen/R600/cf_end.ll b/test/CodeGen/R600/cf_end.ll new file mode 100644 index 0000000..56cd7de --- /dev/null +++ b/test/CodeGen/R600/cf_end.ll @@ -0,0 +1,9 @@ +; RUN: llc < %s -march=r600 -mcpu=redwood --show-mc-encoding | FileCheck --check-prefix=EG-CHECK %s +; RUN: llc < %s -march=r600 -mcpu=caicos --show-mc-encoding | FileCheck --check-prefix=EG-CHECK %s +; RUN: llc < %s -march=r600 -mcpu=cayman --show-mc-encoding | FileCheck --check-prefix=CM-CHECK %s + +; EG-CHECK: CF_END ; encoding: [0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x20,0x80] +; CM-CHECK: CF_END ; encoding: [0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x88] +define void @eop() { + ret void +} diff --git a/test/CodeGen/R600/disconnected-predset-break-bug.ll b/test/CodeGen/R600/disconnected-predset-break-bug.ll index a586742..012c17b 100644 --- a/test/CodeGen/R600/disconnected-predset-break-bug.ll +++ b/test/CodeGen/R600/disconnected-predset-break-bug.ll @@ -5,9 +5,10 @@ ; and the PREDICATE_BREAK in this loop. ; CHECK: @loop_ge -; CHECK: WHILE -; CHECK: PRED_SET -; CHECK-NEXT: PREDICATED_BREAK +; CHECK: LOOP_START_DX10 +; CHECK: ALU_PUSH_BEFORE +; CHECK-NEXT: JUMP +; CHECK-NEXT: LOOP_BREAK define void @loop_ge(i32 addrspace(1)* nocapture %out, i32 %iterations) nounwind { entry: %cmp5 = icmp sgt i32 %iterations, 0 diff --git a/test/CodeGen/R600/elf.ll b/test/CodeGen/R600/elf.ll new file mode 100644 index 0000000..f460f13 --- /dev/null +++ b/test/CodeGen/R600/elf.ll @@ -0,0 +1,20 @@ +; RUN: llc < %s -march=r600 -mcpu=SI -filetype=obj | llvm-readobj -s - | FileCheck --check-prefix=ELF-CHECK %s +; RUN: llc < %s -march=r600 -mcpu=SI -o - | FileCheck --check-prefix=CONFIG-CHECK %s + +; ELF-CHECK: Format: ELF32 +; ELF-CHECK: Name: .AMDGPU.config +; ELF-CHECK: Type: SHT_PROGBITS + +; CONFIG-CHECK: .section .AMDGPU.config +; CONFIG-CHECK-NEXT: .long 45096 +; CONFIG-CHECK-NEXT: .long 0 +define void @test(i32 %p) #0 { + %i = add i32 %p, 2 + %r = bitcast i32 %i to float + call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %r, float %r, float %r, float %r) + ret void +} + +declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) + +attributes #0 = { "ShaderType"="0" } ; Pixel Shader diff --git a/test/CodeGen/R600/elf.r600.ll b/test/CodeGen/R600/elf.r600.ll new file mode 100644 index 0000000..9dbc0af --- /dev/null +++ b/test/CodeGen/R600/elf.r600.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s -march=r600 -mcpu=redwood -filetype=obj | llvm-readobj -s - | FileCheck --check-prefix=ELF-CHECK %s +; RUN: llc < %s -march=r600 -mcpu=redwood -o - | FileCheck --check-prefix=CONFIG-CHECK %s + +; ELF-CHECK: Format: ELF32 +; ELF-CHECK: Name: .AMDGPU.config + +; CONFIG-CHECK: .section .AMDGPU.config +; CONFIG-CHECK-NEXT: .long 2 +; CONFIG-CHECK-NEXT: .long 1 +define void @test(float addrspace(1)* %out, i32 %p) { + %i = add i32 %p, 2 + %r = bitcast i32 %i to float + store float %r, float addrspace(1)* %out + ret void +} diff --git a/test/CodeGen/R600/fadd.ll b/test/CodeGen/R600/fadd.ll index d7d1b65..81a4fa5 100644 --- a/test/CodeGen/R600/fadd.ll +++ b/test/CodeGen/R600/fadd.ll @@ -1,8 +1,9 @@ -;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s +; CHECK: @fadd_f32 ; CHECK: ADD T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -define void @test() { +define void @fadd_f32() { %r0 = call float @llvm.R600.load.input(i32 0) %r1 = call float @llvm.R600.load.input(i32 1) %r2 = fadd float %r0, %r1 @@ -14,3 +15,17 @@ declare float @llvm.R600.load.input(i32) readnone declare void @llvm.AMDGPU.store.output(float, i32) +; CHECK: @fadd_v4f32 +; CHECK: ADD T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; CHECK: ADD T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; CHECK: ADD T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; CHECK: ADD T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} + +define void @fadd_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) { + %b_ptr = getelementptr <4 x float> addrspace(1)* %in, i32 1 + %a = load <4 x float> addrspace(1) * %in + %b = load <4 x float> addrspace(1) * %b_ptr + %result = fadd <4 x float> %a, %b + store <4 x float> %result, <4 x float> addrspace(1)* %out + ret void +} diff --git a/test/CodeGen/R600/fadd.v4f32.ll b/test/CodeGen/R600/fadd.v4f32.ll deleted file mode 100644 index 85dbfd5..0000000 --- a/test/CodeGen/R600/fadd.v4f32.ll +++ /dev/null @@ -1,15 +0,0 @@ -;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s - -;CHECK: ADD T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -;CHECK: ADD T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -;CHECK: ADD T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -;CHECK: ADD T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} - -define void @test(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) { - %b_ptr = getelementptr <4 x float> addrspace(1)* %in, i32 1 - %a = load <4 x float> addrspace(1) * %in - %b = load <4 x float> addrspace(1) * %b_ptr - %result = fadd <4 x float> %a, %b - store <4 x float> %result, <4 x float> addrspace(1)* %out - ret void -} diff --git a/test/CodeGen/R600/fdiv.v4f32.ll b/test/CodeGen/R600/fdiv.ll index 79e677f..79e677f 100644 --- a/test/CodeGen/R600/fdiv.v4f32.ll +++ b/test/CodeGen/R600/fdiv.ll diff --git a/test/CodeGen/R600/fmul.ll b/test/CodeGen/R600/fmul.ll index eb1d523..7fd22d8 100644 --- a/test/CodeGen/R600/fmul.ll +++ b/test/CodeGen/R600/fmul.ll @@ -1,8 +1,9 @@ -;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s +; CHECK: @fmul_f32 ; CHECK: MUL_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -define void @test() { +define void @fmul_f32() { %r0 = call float @llvm.R600.load.input(i32 0) %r1 = call float @llvm.R600.load.input(i32 1) %r2 = fmul float %r0, %r1 @@ -14,3 +15,17 @@ declare float @llvm.R600.load.input(i32) readnone declare void @llvm.AMDGPU.store.output(float, i32) +; CHECK: @fmul_v4f32 +; CHECK: MUL_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; CHECK: MUL_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; CHECK: MUL_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; CHECK: MUL_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} + +define void @fmul_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) { + %b_ptr = getelementptr <4 x float> addrspace(1)* %in, i32 1 + %a = load <4 x float> addrspace(1) * %in + %b = load <4 x float> addrspace(1) * %b_ptr + %result = fmul <4 x float> %a, %b + store <4 x float> %result, <4 x float> addrspace(1)* %out + ret void +} diff --git a/test/CodeGen/R600/fp_to_sint.ll b/test/CodeGen/R600/fp_to_sint.ll new file mode 100644 index 0000000..9c21ad2 --- /dev/null +++ b/test/CodeGen/R600/fp_to_sint.ll @@ -0,0 +1,14 @@ +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s + +; CHECK: @fp_to_sint_v4i32 +; CHECK: FLT_TO_INT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; CHECK: FLT_TO_INT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; CHECK: FLT_TO_INT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; CHECK: FLT_TO_INT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} + +define void @fp_to_sint_v4i32(<4 x i32> addrspace(1)* %out, <4 x float> addrspace(1)* %in) { + %value = load <4 x float> addrspace(1) * %in + %result = fptosi <4 x float> %value to <4 x i32> + store <4 x i32> %result, <4 x i32> addrspace(1)* %out + ret void +} diff --git a/test/CodeGen/R600/fp_to_uint.ll b/test/CodeGen/R600/fp_to_uint.ll new file mode 100644 index 0000000..d91098f --- /dev/null +++ b/test/CodeGen/R600/fp_to_uint.ll @@ -0,0 +1,14 @@ +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s + +; CHECK: @fp_to_uint_v4i32 +; CHECK: FLT_TO_UINT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; CHECK: FLT_TO_UINT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; CHECK: FLT_TO_UINT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; CHECK: FLT_TO_UINT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} + +define void @fp_to_uint_v4i32(<4 x i32> addrspace(1)* %out, <4 x float> addrspace(1)* %in) { + %value = load <4 x float> addrspace(1) * %in + %result = fptoui <4 x float> %value to <4 x i32> + store <4 x i32> %result, <4 x i32> addrspace(1)* %out + ret void +} diff --git a/test/CodeGen/R600/fsub.ll b/test/CodeGen/R600/fsub.ll index 591aa52..812388b 100644 --- a/test/CodeGen/R600/fsub.ll +++ b/test/CodeGen/R600/fsub.ll @@ -1,8 +1,9 @@ -;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s +; CHECK: @fsub_f32 ; CHECK: ADD T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], -T[0-9]+\.[XYZW]}} -define void @test() { +define void @fsub_f32() { %r0 = call float @llvm.R600.load.input(i32 0) %r1 = call float @llvm.R600.load.input(i32 1) %r2 = fsub float %r0, %r1 @@ -14,3 +15,17 @@ declare float @llvm.R600.load.input(i32) readnone declare void @llvm.AMDGPU.store.output(float, i32) +; CHECK: @fsub_v4f32 +; CHECK: ADD T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; CHECK: ADD T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; CHECK: ADD T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; CHECK: ADD T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} + +define void @fsub_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) { + %b_ptr = getelementptr <4 x float> addrspace(1)* %in, i32 1 + %a = load <4 x float> addrspace(1) * %in + %b = load <4 x float> addrspace(1) * %b_ptr + %result = fsub <4 x float> %a, %b + store <4 x float> %result, <4 x float> addrspace(1)* %out + ret void +} diff --git a/test/CodeGen/R600/fsub.v4f32.ll b/test/CodeGen/R600/fsub.v4f32.ll deleted file mode 100644 index 612a57e..0000000 --- a/test/CodeGen/R600/fsub.v4f32.ll +++ /dev/null @@ -1,15 +0,0 @@ -;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s - -;CHECK: ADD T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -;CHECK: ADD T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -;CHECK: ADD T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -;CHECK: ADD T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} - -define void @test(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) { - %b_ptr = getelementptr <4 x float> addrspace(1)* %in, i32 1 - %a = load <4 x float> addrspace(1) * %in - %b = load <4 x float> addrspace(1) * %b_ptr - %result = fsub <4 x float> %a, %b - store <4 x float> %result, <4 x float> addrspace(1)* %out - ret void -} diff --git a/test/CodeGen/R600/i8_to_double_to_float.ll b/test/CodeGen/R600/i8-to-double-to-float.ll index 39f3322..39f3322 100644 --- a/test/CodeGen/R600/i8_to_double_to_float.ll +++ b/test/CodeGen/R600/i8-to-double-to-float.ll diff --git a/test/CodeGen/R600/imm.ll b/test/CodeGen/R600/imm.ll new file mode 100644 index 0000000..979efb0 --- /dev/null +++ b/test/CodeGen/R600/imm.ll @@ -0,0 +1,23 @@ +; RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s + +; Use a 64-bit value with lo bits that can be represented as an inline constant +; CHECK: @i64_imm_inline_lo +; CHECK: S_MOV_B32 [[LO:SGPR[0-9]+]], 5 +; CHECK: V_MOV_B32_e32 [[LO_VGPR:VGPR[0-9]+]], [[LO]] +; CHECK: BUFFER_STORE_DWORDX2 [[LO_VGPR]]_ +define void @i64_imm_inline_lo(i64 addrspace(1) *%out) { +entry: + store i64 1311768464867721221, i64 addrspace(1) *%out ; 0x1234567800000005 + ret void +} + +; Use a 64-bit value with hi bits that can be represented as an inline constant +; CHECK: @i64_imm_inline_hi +; CHECK: S_MOV_B32 [[HI:SGPR[0-9]+]], 5 +; CHECK: V_MOV_B32_e32 [[HI_VGPR:VGPR[0-9]+]], [[HI]] +; CHECK: BUFFER_STORE_DWORDX2 {{VGPR[0-9]+}}_[[HI_VGPR]] +define void @i64_imm_inline_hi(i64 addrspace(1) *%out) { +entry: + store i64 21780256376, i64 addrspace(1) *%out ; 0x0000000512345678 + ret void +} diff --git a/test/CodeGen/R600/jump-address.ll b/test/CodeGen/R600/jump-address.ll new file mode 100644 index 0000000..ae9c8bb --- /dev/null +++ b/test/CodeGen/R600/jump-address.ll @@ -0,0 +1,52 @@ +;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s + +; CHECK: JUMP @3 +; CHECK: EXPORT +; CHECK-NOT: EXPORT + +define void @main() #0 { +main_body: + %0 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1) + %1 = extractelement <4 x float> %0, i32 0 + %2 = bitcast float %1 to i32 + %3 = icmp eq i32 %2, 0 + %4 = sext i1 %3 to i32 + %5 = bitcast i32 %4 to float + %6 = bitcast float %5 to i32 + %7 = icmp ne i32 %6, 0 + br i1 %7, label %ENDIF, label %ELSE + +ELSE: ; preds = %main_body + %8 = load <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1) + %9 = extractelement <4 x float> %8, i32 0 + %10 = bitcast float %9 to i32 + %11 = icmp eq i32 %10, 1 + %12 = sext i1 %11 to i32 + %13 = bitcast i32 %12 to float + %14 = bitcast float %13 to i32 + %15 = icmp ne i32 %14, 0 + br i1 %15, label %IF13, label %ENDIF + +ENDIF: ; preds = %IF13, %ELSE, %main_body + %temp.0 = phi float [ 0xFFF8000000000000, %main_body ], [ 0.000000e+00, %ELSE ], [ 0.000000e+00, %IF13 ] + %temp1.0 = phi float [ 0.000000e+00, %main_body ], [ %23, %IF13 ], [ 0.000000e+00, %ELSE ] + %temp2.0 = phi float [ 1.000000e+00, %main_body ], [ 0.000000e+00, %ELSE ], [ 0.000000e+00, %IF13 ] + %temp3.0 = phi float [ 5.000000e-01, %main_body ], [ 0.000000e+00, %ELSE ], [ 0.000000e+00, %IF13 ] + %16 = insertelement <4 x float> undef, float %temp.0, i32 0 + %17 = insertelement <4 x float> %16, float %temp1.0, i32 1 + %18 = insertelement <4 x float> %17, float %temp2.0, i32 2 + %19 = insertelement <4 x float> %18, float %temp3.0, i32 3 + call void @llvm.R600.store.swizzle(<4 x float> %19, i32 0, i32 0) + ret void + +IF13: ; preds = %ELSE + %20 = load <4 x float> addrspace(8)* null + %21 = extractelement <4 x float> %20, i32 0 + %22 = fsub float -0.000000e+00, %21 + %23 = fadd float 0xFFF8000000000000, %22 + br label %ENDIF +} + +declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) + +attributes #0 = { "ShaderType"="0" } diff --git a/test/CodeGen/R600/kcache-fold.ll b/test/CodeGen/R600/kcache-fold.ll index e8e2bf5..3d70e4b 100644 --- a/test/CodeGen/R600/kcache-fold.ll +++ b/test/CodeGen/R600/kcache-fold.ll @@ -1,7 +1,7 @@ ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s ; CHECK: @main1 -; CHECK: MOV T{{[0-9]+\.[XYZW], CBuf0\[[0-9]+\]\.[XYZW]}} +; CHECK: MOV T{{[0-9]+\.[XYZW], KC0}} define void @main1() { main_body: %0 = load <4 x float> addrspace(8)* null diff --git a/test/CodeGen/R600/llvm.SI.fs.interp.constant.ll b/test/CodeGen/R600/llvm.SI.fs.interp.constant.ll index a8f604a..e45722c 100644 --- a/test/CodeGen/R600/llvm.SI.fs.interp.constant.ll +++ b/test/CodeGen/R600/llvm.SI.fs.interp.constant.ll @@ -1,4 +1,4 @@ -;RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s +;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s ;CHECK: S_MOV_B32 ;CHECK-NEXT: V_INTERP_MOV_F32 @@ -14,7 +14,7 @@ main_body: declare void @llvm.AMDGPU.shader.type(i32) -declare float @llvm.SI.fs.constant(i32, i32, i32) readonly +declare float @llvm.SI.fs.constant(i32, i32, i32) readnone declare i32 @llvm.SI.packf16(float, float) readnone diff --git a/test/CodeGen/R600/llvm.SI.sample.ll b/test/CodeGen/R600/llvm.SI.sample.ll index d397f3b..de06354 100644 --- a/test/CodeGen/R600/llvm.SI.sample.ll +++ b/test/CodeGen/R600/llvm.SI.sample.ll @@ -1,71 +1,140 @@ -;RUN: llc < %s -march=r600 -mcpu=SI | FileCheck %s +;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s -;CHECK: IMAGE_SAMPLE -;CHECK-NEXT: S_WAITCNT 1904 -;CHECK-NEXT: IMAGE_SAMPLE -;CHECK-NEXT: S_WAITCNT 1904 -;CHECK-NEXT: IMAGE_SAMPLE -;CHECK-NEXT: S_WAITCNT 1904 -;CHECK-NEXT: IMAGE_SAMPLE -;CHECK-NEXT: S_WAITCNT 1904 -;CHECK-NEXT: IMAGE_SAMPLE -;CHECK-NEXT: S_WAITCNT 1904 -;CHECK-NEXT: IMAGE_SAMPLE_C -;CHECK-NEXT: S_WAITCNT 1904 -;CHECK-NEXT: IMAGE_SAMPLE_C -;CHECK-NEXT: S_WAITCNT 1904 -;CHECK-NEXT: IMAGE_SAMPLE_C -;CHECK-NEXT: S_WAITCNT 1904 -;CHECK-NEXT: IMAGE_SAMPLE -;CHECK-NEXT: S_WAITCNT 1904 -;CHECK-NEXT: IMAGE_SAMPLE -;CHECK-NEXT: S_WAITCNT 1904 -;CHECK-NEXT: IMAGE_SAMPLE_C -;CHECK-NEXT: S_WAITCNT 1904 -;CHECK-NEXT: IMAGE_SAMPLE_C -;CHECK-NEXT: S_WAITCNT 1904 -;CHECK-NEXT: IMAGE_SAMPLE_C -;CHECK-NEXT: S_WAITCNT 1904 -;CHECK-NEXT: IMAGE_SAMPLE -;CHECK-NEXT: S_WAITCNT 1904 -;CHECK-NEXT: IMAGE_SAMPLE -;CHECK-NEXT: S_WAITCNT 1904 -;CHECK-NEXT: IMAGE_SAMPLE +;CHECK: IMAGE_SAMPLE {{VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+}}, 15 +;CHECK: IMAGE_SAMPLE {{VGPR[0-9]+_VGPR[0-9]+}}, 3 +;CHECK: IMAGE_SAMPLE {{VGPR[0-9]+}}, 2 +;CHECK: IMAGE_SAMPLE {{VGPR[0-9]+}}, 1 +;CHECK: IMAGE_SAMPLE {{VGPR[0-9]+}}, 4 +;CHECK: IMAGE_SAMPLE {{VGPR[0-9]+}}, 8 +;CHECK: IMAGE_SAMPLE_C {{VGPR[0-9]+_VGPR[0-9]+}}, 5 +;CHECK: IMAGE_SAMPLE_C {{VGPR[0-9]+_VGPR[0-9]+}}, 9 +;CHECK: IMAGE_SAMPLE_C {{VGPR[0-9]+_VGPR[0-9]+}}, 6 +;CHECK: IMAGE_SAMPLE {{VGPR[0-9]+_VGPR[0-9]+}}, 10 +;CHECK: IMAGE_SAMPLE {{VGPR[0-9]+_VGPR[0-9]+}}, 12 +;CHECK: IMAGE_SAMPLE_C {{VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+}}, 7 +;CHECK: IMAGE_SAMPLE_C {{VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+}}, 11 +;CHECK: IMAGE_SAMPLE_C {{VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+}}, 13 +;CHECK: IMAGE_SAMPLE {{VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+}}, 14 +;CHECK: IMAGE_SAMPLE {{VGPR[0-9]+}}, 8 -define void @test() { - %res1 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef, +define void @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4) { + %v1 = insertelement <4 x i32> undef, i32 %a1, i32 0 + %v2 = insertelement <4 x i32> undef, i32 %a1, i32 1 + %v3 = insertelement <4 x i32> undef, i32 %a1, i32 2 + %v4 = insertelement <4 x i32> undef, i32 %a1, i32 3 + %v5 = insertelement <4 x i32> undef, i32 %a2, i32 0 + %v6 = insertelement <4 x i32> undef, i32 %a2, i32 1 + %v7 = insertelement <4 x i32> undef, i32 %a2, i32 2 + %v8 = insertelement <4 x i32> undef, i32 %a2, i32 3 + %v9 = insertelement <4 x i32> undef, i32 %a3, i32 0 + %v10 = insertelement <4 x i32> undef, i32 %a3, i32 1 + %v11 = insertelement <4 x i32> undef, i32 %a3, i32 2 + %v12 = insertelement <4 x i32> undef, i32 %a3, i32 3 + %v13 = insertelement <4 x i32> undef, i32 %a4, i32 0 + %v14 = insertelement <4 x i32> undef, i32 %a4, i32 1 + %v15 = insertelement <4 x i32> undef, i32 %a4, i32 2 + %v16 = insertelement <4 x i32> undef, i32 %a4, i32 3 + %res1 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v1, <8 x i32> undef, <4 x i32> undef, i32 1) - %res2 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef, + %res2 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v2, <8 x i32> undef, <4 x i32> undef, i32 2) - %res3 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef, + %res3 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v3, <8 x i32> undef, <4 x i32> undef, i32 3) - %res4 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef, + %res4 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v4, <8 x i32> undef, <4 x i32> undef, i32 4) - %res5 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef, + %res5 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v5, <8 x i32> undef, <4 x i32> undef, i32 5) - %res6 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef, + %res6 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v6, <8 x i32> undef, <4 x i32> undef, i32 6) - %res7 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef, + %res7 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v7, <8 x i32> undef, <4 x i32> undef, i32 7) - %res8 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef, + %res8 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v8, <8 x i32> undef, <4 x i32> undef, i32 8) - %res9 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef, + %res9 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v9, <8 x i32> undef, <4 x i32> undef, i32 9) - %res10 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef, + %res10 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v10, <8 x i32> undef, <4 x i32> undef, i32 10) - %res11 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef, + %res11 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v11, <8 x i32> undef, <4 x i32> undef, i32 11) - %res12 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef, + %res12 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v12, <8 x i32> undef, <4 x i32> undef, i32 12) - %res13 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef, + %res13 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v13, <8 x i32> undef, <4 x i32> undef, i32 13) - %res14 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef, + %res14 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v14, <8 x i32> undef, <4 x i32> undef, i32 14) - %res15 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef, + %res15 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v15, <8 x i32> undef, <4 x i32> undef, i32 15) - %res16 = call <4 x float> @llvm.SI.sample.(i32 15, <4 x i32> undef, + %res16 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v16, <8 x i32> undef, <4 x i32> undef, i32 16) + %e1 = extractelement <4 x float> %res1, i32 0 + %e2 = extractelement <4 x float> %res2, i32 1 + %e3 = extractelement <4 x float> %res3, i32 2 + %e4 = extractelement <4 x float> %res4, i32 3 + %t0 = extractelement <4 x float> %res5, i32 0 + %t1 = extractelement <4 x float> %res5, i32 1 + %e5 = fadd float %t0, %t1 + %t2 = extractelement <4 x float> %res6, i32 0 + %t3 = extractelement <4 x float> %res6, i32 2 + %e6 = fadd float %t2, %t3 + %t4 = extractelement <4 x float> %res7, i32 0 + %t5 = extractelement <4 x float> %res7, i32 3 + %e7 = fadd float %t4, %t5 + %t6 = extractelement <4 x float> %res8, i32 1 + %t7 = extractelement <4 x float> %res8, i32 2 + %e8 = fadd float %t6, %t7 + %t8 = extractelement <4 x float> %res9, i32 1 + %t9 = extractelement <4 x float> %res9, i32 3 + %e9 = fadd float %t8, %t9 + %t10 = extractelement <4 x float> %res10, i32 2 + %t11 = extractelement <4 x float> %res10, i32 3 + %e10 = fadd float %t10, %t11 + %t12 = extractelement <4 x float> %res11, i32 0 + %t13 = extractelement <4 x float> %res11, i32 1 + %t14 = extractelement <4 x float> %res11, i32 2 + %t15 = fadd float %t12, %t13 + %e11 = fadd float %t14, %t15 + %t16 = extractelement <4 x float> %res12, i32 0 + %t17 = extractelement <4 x float> %res12, i32 1 + %t18 = extractelement <4 x float> %res12, i32 3 + %t19 = fadd float %t16, %t17 + %e12 = fadd float %t18, %t19 + %t20 = extractelement <4 x float> %res13, i32 0 + %t21 = extractelement <4 x float> %res13, i32 2 + %t22 = extractelement <4 x float> %res13, i32 3 + %t23 = fadd float %t20, %t21 + %e13 = fadd float %t22, %t23 + %t24 = extractelement <4 x float> %res14, i32 1 + %t25 = extractelement <4 x float> %res14, i32 2 + %t26 = extractelement <4 x float> %res14, i32 3 + %t27 = fadd float %t24, %t25 + %e14 = fadd float %t26, %t27 + %t28 = extractelement <4 x float> %res15, i32 0 + %t29 = extractelement <4 x float> %res15, i32 1 + %t30 = extractelement <4 x float> %res15, i32 2 + %t31 = extractelement <4 x float> %res15, i32 3 + %t32 = fadd float %t28, %t29 + %t33 = fadd float %t30, %t31 + %e15 = fadd float %t32, %t33 + %e16 = extractelement <4 x float> %res16, i32 3 + %s1 = fadd float %e1, %e2 + %s2 = fadd float %s1, %e3 + %s3 = fadd float %s2, %e4 + %s4 = fadd float %s3, %e5 + %s5 = fadd float %s4, %e6 + %s6 = fadd float %s5, %e7 + %s7 = fadd float %s6, %e8 + %s8 = fadd float %s7, %e9 + %s9 = fadd float %s8, %e10 + %s10 = fadd float %s9, %e11 + %s11 = fadd float %s10, %e12 + %s12 = fadd float %s11, %e13 + %s13 = fadd float %s12, %e14 + %s14 = fadd float %s13, %e15 + %s15 = fadd float %s14, %e16 + call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %s15, float %s15, float %s15, float %s15) ret void } -declare <4 x float> @llvm.SI.sample.(i32, <4 x i32>, <8 x i32>, <4 x i32>, i32) +declare <4 x float> @llvm.SI.sample.(<4 x i32>, <8 x i32>, <4 x i32>, i32) readnone + +declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) diff --git a/test/CodeGen/R600/llvm.pow.ll b/test/CodeGen/R600/llvm.pow.ll index 0ae9172..b4ce9f4 100644 --- a/test/CodeGen/R600/llvm.pow.ll +++ b/test/CodeGen/R600/llvm.pow.ll @@ -1,7 +1,7 @@ ;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s ;CHECK: LOG_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -;CHECK-NEXT: MUL_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +;CHECK-NEXT: MUL NON-IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} ;CHECK-NEXT: EXP_IEEE T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} define void @test() { diff --git a/test/CodeGen/R600/load.constant_addrspace.f32.ll b/test/CodeGen/R600/load.constant_addrspace.f32.ll deleted file mode 100644 index 9362728..0000000 --- a/test/CodeGen/R600/load.constant_addrspace.f32.ll +++ /dev/null @@ -1,9 +0,0 @@ -;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s - -;CHECK: VTX_READ_32 T{{[0-9]+\.X, T[0-9]+\.X}} - -define void @test(float addrspace(1)* %out, float addrspace(2)* %in) { - %1 = load float addrspace(2)* %in - store float %1, float addrspace(1)* %out - ret void -} diff --git a/test/CodeGen/R600/load.i8.ll b/test/CodeGen/R600/load.i8.ll deleted file mode 100644 index b070dcd..0000000 --- a/test/CodeGen/R600/load.i8.ll +++ /dev/null @@ -1,10 +0,0 @@ -;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s - -;CHECK: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}} - -define void @test(i32 addrspace(1)* %out, i8 addrspace(1)* %in) { - %1 = load i8 addrspace(1)* %in - %2 = zext i8 %1 to i32 - store i32 %2, i32 addrspace(1)* %out - ret void -} diff --git a/test/CodeGen/R600/load.ll b/test/CodeGen/R600/load.ll new file mode 100644 index 0000000..b03245a --- /dev/null +++ b/test/CodeGen/R600/load.ll @@ -0,0 +1,20 @@ +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s + +; Load an i8 value from the global address space. +; CHECK: VTX_READ_8 T{{[0-9]+\.X, T[0-9]+\.X}} + +define void @load_i8(i32 addrspace(1)* %out, i8 addrspace(1)* %in) { + %1 = load i8 addrspace(1)* %in + %2 = zext i8 %1 to i32 + store i32 %2, i32 addrspace(1)* %out + ret void +} + +; Load a f32 value from the constant address space. +; CHECK: VTX_READ_32 T{{[0-9]+\.X, T[0-9]+\.X}} + +define void @load_const_addrspace_f32(float addrspace(1)* %out, float addrspace(2)* %in) { + %1 = load float addrspace(2)* %in + store float %1, float addrspace(1)* %out + ret void +} diff --git a/test/CodeGen/R600/loop-address.ll b/test/CodeGen/R600/loop-address.ll new file mode 100644 index 0000000..8a5458b --- /dev/null +++ b/test/CodeGen/R600/loop-address.ll @@ -0,0 +1,41 @@ +;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s + +;CHECK: TEX +;CHECK: ALU_PUSH +;CHECK: JUMP @4 +;CHECK: ELSE @16 +;CHECK: TEX +;CHECK: LOOP_START_DX10 @15 +;CHECK: LOOP_BREAK @14 +;CHECK: POP @16 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048-n32:64" +target triple = "r600--" + +define void @loop_ge(i32 addrspace(1)* nocapture %out, i32 %iterations) #0 { +entry: + %cmp5 = icmp sgt i32 %iterations, 0 + br i1 %cmp5, label %for.body, label %for.end + +for.body: ; preds = %for.body, %entry + %i.07.in = phi i32 [ %i.07, %for.body ], [ %iterations, %entry ] + %ai.06 = phi i32 [ %add, %for.body ], [ 0, %entry ] + %i.07 = add nsw i32 %i.07.in, -1 + %arrayidx = getelementptr inbounds i32 addrspace(1)* %out, i32 %ai.06 + store i32 %i.07, i32 addrspace(1)* %arrayidx, align 4 + %add = add nsw i32 %ai.06, 1 + %exitcond = icmp eq i32 %add, %iterations + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + ret void +} + +attributes #0 = { nounwind "fp-contract-model"="standard" "relocation-model"="pic" "ssp-buffers-size"="8" } + +!opencl.kernels = !{!0, !1, !2, !3} + +!0 = metadata !{void (i32 addrspace(1)*, i32)* @loop_ge} +!1 = metadata !{null} +!2 = metadata !{null} +!3 = metadata !{null} diff --git a/test/CodeGen/R600/lshl.ll b/test/CodeGen/R600/lshl.ll new file mode 100644 index 0000000..fb698da --- /dev/null +++ b/test/CodeGen/R600/lshl.ll @@ -0,0 +1,14 @@ +;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s + +;CHECK: V_LSHLREV_B32_e32 VGPR0, 1, VGPR0 + +define void @test(i32 %p) { + %i = mul i32 %p, 2 + %r = bitcast i32 %i to float + call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %r, float %r, float %r, float %r) + ret void +} + +declare <4 x float> @llvm.SI.sample.(i32, <4 x i32>, <8 x i32>, <4 x i32>, i32) readnone + +declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) diff --git a/test/CodeGen/R600/lshr.ll b/test/CodeGen/R600/lshr.ll new file mode 100644 index 0000000..e0ed3ac --- /dev/null +++ b/test/CodeGen/R600/lshr.ll @@ -0,0 +1,14 @@ +;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s + +;CHECK: V_LSHRREV_B32_e32 VGPR0, 1, VGPR0 + +define void @test(i32 %p) { + %i = udiv i32 %p, 2 + %r = bitcast i32 %i to float + call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %r, float %r, float %r, float %r) + ret void +} + +declare <4 x float> @llvm.SI.sample.(i32, <4 x i32>, <8 x i32>, <4 x i32>, i32) readnone + +declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) diff --git a/test/CodeGen/R600/mulhu.ll b/test/CodeGen/R600/mulhu.ll new file mode 100644 index 0000000..bc17a59 --- /dev/null +++ b/test/CodeGen/R600/mulhu.ll @@ -0,0 +1,16 @@ +;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s + +;CHECK: V_MOV_B32_e32 VGPR1, -1431655765 +;CHECK-NEXT: V_MUL_HI_U32 VGPR0, VGPR0, VGPR1, 0, 0, 0, 0, 0 +;CHECK-NEXT: V_LSHRREV_B32_e32 VGPR0, 1, VGPR0 + +define void @test(i32 %p) { + %i = udiv i32 %p, 3 + %r = bitcast i32 %i to float + call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %r, float %r, float %r, float %r) + ret void +} + +declare <4 x float> @llvm.SI.sample.(i32, <4 x i32>, <8 x i32>, <4 x i32>, i32) readnone + +declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) diff --git a/test/CodeGen/R600/predicates.ll b/test/CodeGen/R600/predicates.ll index 18895a4..fb093ed 100644 --- a/test/CodeGen/R600/predicates.ll +++ b/test/CodeGen/R600/predicates.ll @@ -45,10 +45,12 @@ ENDIF: } ; CHECK: @nested_if -; CHECK: IF_PREDICATE_SET +; CHECK: ALU_PUSH_BEFORE +; CHECK: JUMP +; CHECK: POP +; CHECK: PRED_SET{{[EGN][ET]*}}_INT Exec ; CHECK: PRED_SET{{[EGN][ET]*}}_INT Pred, ; CHECK: LSHL T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, 0(0.000000e+00) Pred_sel -; CHECK: ENDIF define void @nested_if(i32 addrspace(1)* %out, i32 %in) { entry: %0 = icmp sgt i32 %in, 0 @@ -70,11 +72,13 @@ ENDIF: } ; CHECK: @nested_if_else -; CHECK: IF_PREDICATE_SET +; CHECK: ALU_PUSH_BEFORE +; CHECK: JUMP +; CHECK: POP +; CHECK: PRED_SET{{[EGN][ET]*}}_INT Exec ; CHECK: PRED_SET{{[EGN][ET]*}}_INT Pred, ; CHECK: LSH{{[LR] T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, 0(0.000000e+00) Pred_sel ; CHECK: LSH{{[LR] T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, 0(0.000000e+00) Pred_sel -; CHECK: ENDIF define void @nested_if_else(i32 addrspace(1)* %out, i32 %in) { entry: %0 = icmp sgt i32 %in, 0 diff --git a/test/CodeGen/R600/sdiv.ll b/test/CodeGen/R600/sdiv.ll index 3556fac..3dd10c8 100644 --- a/test/CodeGen/R600/sdiv.ll +++ b/test/CodeGen/R600/sdiv.ll @@ -9,7 +9,7 @@ ; This was fixed by adding an additional pattern in R600Instructions.td to ; match this pattern with a CNDGE_INT. -; CHECK: RETURN +; CHECK: CF_END define void @test(i32 addrspace(1)* %out, i32 addrspace(1)* %in) { %den_ptr = getelementptr i32 addrspace(1)* %in, i32 1 diff --git a/test/CodeGen/R600/selectcc_cnde.ll b/test/CodeGen/R600/selectcc-cnd.ll index f0a0f51..f0a0f51 100644 --- a/test/CodeGen/R600/selectcc_cnde.ll +++ b/test/CodeGen/R600/selectcc-cnd.ll diff --git a/test/CodeGen/R600/selectcc_cnde_int.ll b/test/CodeGen/R600/selectcc-cnde-int.ll index b38078e..b38078e 100644 --- a/test/CodeGen/R600/selectcc_cnde_int.ll +++ b/test/CodeGen/R600/selectcc-cnde-int.ll diff --git a/test/CodeGen/R600/setcc.v4i32.ll b/test/CodeGen/R600/setcc.ll index 0752f2e..0752f2e 100644 --- a/test/CodeGen/R600/setcc.v4i32.ll +++ b/test/CodeGen/R600/setcc.ll diff --git a/test/CodeGen/R600/seto.ll b/test/CodeGen/R600/seto.ll new file mode 100644 index 0000000..4622203 --- /dev/null +++ b/test/CodeGen/R600/seto.ll @@ -0,0 +1,13 @@ +;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s + +;CHECK: V_CMP_O_F32_e64 SGPR0_SGPR1, VGPR0, VGPR0, 0, 0, 0, 0 + +define void @main(float %p) { +main_body: + %c = fcmp oeq float %p, %p + %r = select i1 %c, float 1.000000e+00, float 0.000000e+00 + call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %r, float %r, float %r, float %r) + ret void +} + +declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) diff --git a/test/CodeGen/R600/setuo.ll b/test/CodeGen/R600/setuo.ll new file mode 100644 index 0000000..0bf5801 --- /dev/null +++ b/test/CodeGen/R600/setuo.ll @@ -0,0 +1,13 @@ +;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s + +;CHECK: V_CMP_U_F32_e64 SGPR0_SGPR1, VGPR0, VGPR0, 0, 0, 0, 0 + +define void @main(float %p) { +main_body: + %c = fcmp une float %p, %p + %r = select i1 %c, float 1.000000e+00, float 0.000000e+00 + call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %r, float %r, float %r, float %r) + ret void +} + +declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) diff --git a/test/CodeGen/R600/sint_to_fp.ll b/test/CodeGen/R600/sint_to_fp.ll new file mode 100644 index 0000000..6a56db3 --- /dev/null +++ b/test/CodeGen/R600/sint_to_fp.ll @@ -0,0 +1,14 @@ +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s + +; CHECK: @sint_to_fp_v4i32 +; CHECK: INT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; CHECK: INT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; CHECK: INT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; CHECK: INT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} + +define void @sint_to_fp_v4i32(<4 x float> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) { + %value = load <4 x i32> addrspace(1) * %in + %result = sitofp <4 x i32> %value to <4 x float> + store <4 x float> %result, <4 x float> addrspace(1)* %out + ret void +} diff --git a/test/CodeGen/R600/store.ll b/test/CodeGen/R600/store.ll new file mode 100644 index 0000000..4d673f3 --- /dev/null +++ b/test/CodeGen/R600/store.ll @@ -0,0 +1,13 @@ +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s +; RUN: llc < %s -march=r600 -mcpu=verde | FileCheck --check-prefix=SI-CHECK %s + +; floating-point store +; EG-CHECK: @store_f32 +; EG-CHECK: RAT_WRITE_CACHELESS_32_eg T{{[0-9]+\.X, T[0-9]+\.X}}, 1 +; SI-CHECK: @store_f32 +; SI-CHECK: BUFFER_STORE_DWORD + +define void @store_f32(float addrspace(1)* %out, float %in) { + store float %in, float addrspace(1)* %out + ret void +} diff --git a/test/CodeGen/R600/store.r600.ll b/test/CodeGen/R600/store.r600.ll new file mode 100644 index 0000000..5ffb7f1 --- /dev/null +++ b/test/CodeGen/R600/store.r600.ll @@ -0,0 +1,22 @@ +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck --check-prefix=EG-CHECK %s + +; XXX: Merge this test into store.ll once it is supported on SI + +; v4i32 store +; EG-CHECK: @store_v4i32 +; EG-CHECK: RAT_WRITE_CACHELESS_128 T{{[0-9]+\.XYZW, T[0-9]+\.X}}, 1 + +define void @store_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) { + %1 = load <4 x i32> addrspace(1) * %in + store <4 x i32> %1, <4 x i32> addrspace(1)* %out + ret void +} + +; v4f32 store +; EG-CHECK: @store_v4f32 +; EG-CHECK: RAT_WRITE_CACHELESS_128 T{{[0-9]+\.XYZW, T[0-9]+\.X}}, 1 +define void @store_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) { + %1 = load <4 x float> addrspace(1) * %in + store <4 x float> %1, <4 x float> addrspace(1)* %out + ret void +} diff --git a/test/CodeGen/R600/store.v4f32.ll b/test/CodeGen/R600/store.v4f32.ll deleted file mode 100644 index 8b0d244..0000000 --- a/test/CodeGen/R600/store.v4f32.ll +++ /dev/null @@ -1,9 +0,0 @@ -;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s - -;CHECK: RAT_WRITE_CACHELESS_128 T{{[0-9]+\.XYZW, T[0-9]+\.X}}, 1 - -define void @test(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) { - %1 = load <4 x float> addrspace(1) * %in - store <4 x float> %1, <4 x float> addrspace(1)* %out - ret void -} diff --git a/test/CodeGen/R600/store.v4i32.ll b/test/CodeGen/R600/store.v4i32.ll deleted file mode 100644 index a659815..0000000 --- a/test/CodeGen/R600/store.v4i32.ll +++ /dev/null @@ -1,9 +0,0 @@ -;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s - -;CHECK: RAT_WRITE_CACHELESS_128 T{{[0-9]+\.XYZW, T[0-9]+\.X}}, 1 - -define void @test(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) { - %1 = load <4 x i32> addrspace(1) * %in - store <4 x i32> %1, <4 x i32> addrspace(1)* %out - ret void -} diff --git a/test/CodeGen/R600/udiv.v4i32.ll b/test/CodeGen/R600/udiv.ll index 47657a6..b81e366 100644 --- a/test/CodeGen/R600/udiv.v4i32.ll +++ b/test/CodeGen/R600/udiv.ll @@ -3,7 +3,7 @@ ;The code generated by udiv is long and complex and may frequently change. ;The goal of this test is to make sure the ISel doesn't fail when it gets ;a v4i32 udiv -;CHECK: RETURN +;CHECK: CF_END define void @test(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) { %b_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1 diff --git a/test/CodeGen/R600/uint_to_fp.ll b/test/CodeGen/R600/uint_to_fp.ll new file mode 100644 index 0000000..ae8fc8e --- /dev/null +++ b/test/CodeGen/R600/uint_to_fp.ll @@ -0,0 +1,14 @@ +; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s + +; CHECK: @uint_to_fp_v4i32 +; CHECK: UINT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; CHECK: UINT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; CHECK: UINT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} +; CHECK: UINT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} + +define void @uint_to_fp_v4i32(<4 x float> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) { + %value = load <4 x i32> addrspace(1) * %in + %result = uitofp <4 x i32> %value to <4 x float> + store <4 x float> %result, <4 x float> addrspace(1)* %out + ret void +} diff --git a/test/CodeGen/R600/urecip.ll b/test/CodeGen/R600/urecip.ll new file mode 100644 index 0000000..dad02dd --- /dev/null +++ b/test/CodeGen/R600/urecip.ll @@ -0,0 +1,12 @@ +;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s + +;CHECK: V_RCP_IFLAG_F32_e32 + +define void @test(i32 %p, i32 %q) { + %i = udiv i32 %p, %q + %r = bitcast i32 %i to float + call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %r, float %r, float %r, float %r) + ret void +} + +declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float) diff --git a/test/CodeGen/R600/urem.v4i32.ll b/test/CodeGen/R600/urem.ll index 2e7388c..a2cc0bd 100644 --- a/test/CodeGen/R600/urem.v4i32.ll +++ b/test/CodeGen/R600/urem.ll @@ -3,7 +3,7 @@ ;The code generated by urem is long and complex and may frequently change. ;The goal of this test is to make sure the ISel doesn't fail when it gets ;a v4i32 urem -;CHECK: RETURN +;CHECK: CF_END define void @test(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) { %b_ptr = getelementptr <4 x i32> addrspace(1)* %in, i32 1 diff --git a/test/CodeGen/R600/vec4-expand.ll b/test/CodeGen/R600/vec4-expand.ll deleted file mode 100644 index 8f62bc6..0000000 --- a/test/CodeGen/R600/vec4-expand.ll +++ /dev/null @@ -1,53 +0,0 @@ -; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s - -; CHECK: @fp_to_sint -; CHECK: FLT_TO_INT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -; CHECK: FLT_TO_INT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -; CHECK: FLT_TO_INT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -; CHECK: FLT_TO_INT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} - -define void @fp_to_sint(<4 x i32> addrspace(1)* %out, <4 x float> addrspace(1)* %in) { - %value = load <4 x float> addrspace(1) * %in - %result = fptosi <4 x float> %value to <4 x i32> - store <4 x i32> %result, <4 x i32> addrspace(1)* %out - ret void -} - -; CHECK: @fp_to_uint -; CHECK: FLT_TO_UINT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -; CHECK: FLT_TO_UINT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -; CHECK: FLT_TO_UINT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -; CHECK: FLT_TO_UINT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} - -define void @fp_to_uint(<4 x i32> addrspace(1)* %out, <4 x float> addrspace(1)* %in) { - %value = load <4 x float> addrspace(1) * %in - %result = fptoui <4 x float> %value to <4 x i32> - store <4 x i32> %result, <4 x i32> addrspace(1)* %out - ret void -} - -; CHECK: @sint_to_fp -; CHECK: INT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -; CHECK: INT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -; CHECK: INT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -; CHECK: INT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} - -define void @sint_to_fp(<4 x float> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) { - %value = load <4 x i32> addrspace(1) * %in - %result = sitofp <4 x i32> %value to <4 x float> - store <4 x float> %result, <4 x float> addrspace(1)* %out - ret void -} - -; CHECK: @uint_to_fp -; CHECK: UINT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -; CHECK: UINT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -; CHECK: UINT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} -; CHECK: UINT_TO_FLT T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}} - -define void @uint_to_fp(<4 x float> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) { - %value = load <4 x i32> addrspace(1) * %in - %result = uitofp <4 x i32> %value to <4 x float> - store <4 x float> %result, <4 x float> addrspace(1)* %out - ret void -} diff --git a/test/CodeGen/SPARC/2011-01-11-CC.ll b/test/CodeGen/SPARC/2011-01-11-CC.ll index f676fd8..f676fd8 100755..100644 --- a/test/CodeGen/SPARC/2011-01-11-CC.ll +++ b/test/CodeGen/SPARC/2011-01-11-CC.ll diff --git a/test/CodeGen/SPARC/64abi.ll b/test/CodeGen/SPARC/64abi.ll new file mode 100644 index 0000000..ec97135 --- /dev/null +++ b/test/CodeGen/SPARC/64abi.ll @@ -0,0 +1,378 @@ +; RUN: llc < %s -march=sparcv9 -disable-sparc-delay-filler | FileCheck %s + +; CHECK: intarg +; The save/restore frame is not strictly necessary here, but we would need to +; refer to %o registers instead. +; CHECK: save %sp, -128, %sp +; CHECK: stb %i0, [%i4] +; CHECK: stb %i1, [%i4] +; CHECK: sth %i2, [%i4] +; CHECK: st %i3, [%i4] +; CHECK: stx %i4, [%i4] +; CHECK: st %i5, [%i4] +; CHECK: ld [%fp+2227], [[R:%[gilo][0-7]]] +; CHECK: st [[R]], [%i4] +; CHECK: ldx [%fp+2231], [[R:%[gilo][0-7]]] +; CHECK: stx [[R]], [%i4] +; CHECK: restore +define void @intarg(i8 %a0, ; %i0 + i8 %a1, ; %i1 + i16 %a2, ; %i2 + i32 %a3, ; %i3 + i8* %a4, ; %i4 + i32 %a5, ; %i5 + i32 signext %a6, ; [%fp+BIAS+176] + i8* %a7) { ; [%fp+BIAS+184] + store i8 %a0, i8* %a4 + store i8 %a1, i8* %a4 + %p16 = bitcast i8* %a4 to i16* + store i16 %a2, i16* %p16 + %p32 = bitcast i8* %a4 to i32* + store i32 %a3, i32* %p32 + %pp = bitcast i8* %a4 to i8** + store i8* %a4, i8** %pp + store i32 %a5, i32* %p32 + store i32 %a6, i32* %p32 + store i8* %a7, i8** %pp + ret void +} + +; CHECK: call_intarg +; 16 saved + 8 args. +; CHECK: save %sp, -192, %sp +; Sign-extend and store the full 64 bits. +; CHECK: sra %i0, 0, [[R:%[gilo][0-7]]] +; CHECK: stx [[R]], [%sp+2223] +; Use %o0-%o5 for outgoing arguments +; CHECK: or %g0, 5, %o5 +; CHECK: call intarg +; CHECK-NOT: add %sp +; CHECK: restore +define void @call_intarg(i32 %i0, i8* %i1) { + call void @intarg(i8 0, i8 1, i16 2, i32 3, i8* undef, i32 5, i32 %i0, i8* %i1) + ret void +} + +; CHECK: floatarg +; CHECK: save %sp, -128, %sp +; CHECK: fstod %f1, +; CHECK: faddd %f2, +; CHECK: faddd %f4, +; CHECK: faddd %f6, +; CHECK: ld [%fp+2307], [[F:%f[0-9]+]] +; CHECK: fadds %f31, [[F]] +define double @floatarg(float %a0, ; %f1 + double %a1, ; %d2 + double %a2, ; %d4 + double %a3, ; %d6 + float %a4, ; %f9 + float %a5, ; %f11 + float %a6, ; %f13 + float %a7, ; %f15 + float %a8, ; %f17 + float %a9, ; %f19 + float %a10, ; %f21 + float %a11, ; %f23 + float %a12, ; %f25 + float %a13, ; %f27 + float %a14, ; %f29 + float %a15, ; %f31 + float %a16, ; [%fp+BIAS+256] (using 8 bytes) + double %a17) { ; [%fp+BIAS+264] (using 8 bytes) + %d0 = fpext float %a0 to double + %s1 = fadd double %a1, %d0 + %s2 = fadd double %a2, %s1 + %s3 = fadd double %a3, %s2 + %s16 = fadd float %a15, %a16 + %d16 = fpext float %s16 to double + %s17 = fadd double %d16, %s3 + ret double %s17 +} + +; CHECK: call_floatarg +; CHECK: save %sp, -272, %sp +; Store 4 bytes, right-aligned in slot. +; CHECK: st %f1, [%sp+2307] +; Store 8 bytes in full slot. +; CHECK: std %f2, [%sp+2311] +; CHECK: fmovd %f2, %f4 +; CHECK: call floatarg +; CHECK-NOT: add %sp +; CHECK: restore +define void @call_floatarg(float %f1, double %d2, float %f5, double *%p) { + %r = call double @floatarg(float %f5, double %d2, double %d2, double %d2, + float %f5, float %f5, float %f5, float %f5, + float %f5, float %f5, float %f5, float %f5, + float %f5, float %f5, float %f5, float %f5, + float %f1, double %d2) + store double %r, double* %p + ret void +} + +; CHECK: mixedarg +; CHECK: fstod %f3 +; CHECK: faddd %f6 +; CHECK: faddd %f16 +; CHECK: ldx [%fp+2231] +; CHECK: ldx [%fp+2247] +define void @mixedarg(i8 %a0, ; %i0 + float %a1, ; %f3 + i16 %a2, ; %i2 + double %a3, ; %d6 + i13 %a4, ; %i4 + float %a5, ; %f11 + i64 %a6, ; [%fp+BIAS+176] + double *%a7, ; [%fp+BIAS+184] + double %a8, ; %d16 + i16* %a9) { ; [%fp+BIAS+200] + %d1 = fpext float %a1 to double + %s3 = fadd double %a3, %d1 + %s8 = fadd double %a8, %s3 + store double %s8, double* %a7 + store i16 %a2, i16* %a9 + ret void +} + +; CHECK: call_mixedarg +; CHECK: stx %i2, [%sp+2247] +; CHECK: stx %i0, [%sp+2223] +; CHECK: fmovd %f2, %f6 +; CHECK: fmovd %f2, %f16 +; CHECK: call mixedarg +; CHECK-NOT: add %sp +; CHECK: restore +define void @call_mixedarg(i64 %i0, double %f2, i16* %i2) { + call void @mixedarg(i8 undef, + float undef, + i16 undef, + double %f2, + i13 undef, + float undef, + i64 %i0, + double* undef, + double %f2, + i16* %i2) + ret void +} + +; The inreg attribute is used to indicate 32-bit sized struct elements that +; share an 8-byte slot. +; CHECK: inreg_fi +; CHECK: fstoi %f1 +; CHECK: srlx %i0, 32, [[R:%[gilo][0-7]]] +; CHECK: sub [[R]], +define i32 @inreg_fi(i32 inreg %a0, ; high bits of %i0 + float inreg %a1) { ; %f1 + %b1 = fptosi float %a1 to i32 + %rv = sub i32 %a0, %b1 + ret i32 %rv +} + +; CHECK: call_inreg_fi +; Allocate space for 6 arguments, even when only 2 are used. +; CHECK: save %sp, -176, %sp +; CHECK: sllx %i1, 32, %o0 +; CHECK: fmovs %f5, %f1 +; CHECK: call inreg_fi +define void @call_inreg_fi(i32* %p, i32 %i1, float %f5) { + %x = call i32 @inreg_fi(i32 %i1, float %f5) + ret void +} + +; CHECK: inreg_ff +; CHECK: fsubs %f0, %f1, %f1 +define float @inreg_ff(float inreg %a0, ; %f0 + float inreg %a1) { ; %f1 + %rv = fsub float %a0, %a1 + ret float %rv +} + +; CHECK: call_inreg_ff +; CHECK: fmovs %f3, %f0 +; CHECK: fmovs %f5, %f1 +; CHECK: call inreg_ff +define void @call_inreg_ff(i32* %p, float %f3, float %f5) { + %x = call float @inreg_ff(float %f3, float %f5) + ret void +} + +; CHECK: inreg_if +; CHECK: fstoi %f0 +; CHECK: sub %i0 +define i32 @inreg_if(float inreg %a0, ; %f0 + i32 inreg %a1) { ; low bits of %i0 + %b0 = fptosi float %a0 to i32 + %rv = sub i32 %a1, %b0 + ret i32 %rv +} + +; CHECK: call_inreg_if +; CHECK: fmovs %f3, %f0 +; CHECK: or %g0, %i2, %o0 +; CHECK: call inreg_if +define void @call_inreg_if(i32* %p, float %f3, i32 %i2) { + %x = call i32 @inreg_if(float %f3, i32 %i2) + ret void +} + +; The frontend shouldn't do this. Just pass i64 instead. +; CHECK: inreg_ii +; CHECK: srlx %i0, 32, [[R:%[gilo][0-7]]] +; CHECK: sub %i0, [[R]], %i0 +define i32 @inreg_ii(i32 inreg %a0, ; high bits of %i0 + i32 inreg %a1) { ; low bits of %i0 + %rv = sub i32 %a1, %a0 + ret i32 %rv +} + +; CHECK: call_inreg_ii +; CHECK: srl %i2, 0, [[R2:%[gilo][0-7]]] +; CHECK: sllx %i1, 32, [[R1:%[gilo][0-7]]] +; CHECK: or [[R1]], [[R2]], %o0 +; CHECK: call inreg_ii +define void @call_inreg_ii(i32* %p, i32 %i1, i32 %i2) { + %x = call i32 @inreg_ii(i32 %i1, i32 %i2) + ret void +} + +; Structs up to 32 bytes in size can be returned in registers. +; CHECK: ret_i64_pair +; CHECK: ldx [%i2], %i0 +; CHECK: ldx [%i3], %i1 +define { i64, i64 } @ret_i64_pair(i32 %a0, i32 %a1, i64* %p, i64* %q) { + %r1 = load i64* %p + %rv1 = insertvalue { i64, i64 } undef, i64 %r1, 0 + store i64 0, i64* %p + %r2 = load i64* %q + %rv2 = insertvalue { i64, i64 } %rv1, i64 %r2, 1 + ret { i64, i64 } %rv2 +} + +; CHECK: call_ret_i64_pair +; CHECK: call ret_i64_pair +; CHECK: stx %o0, [%i0] +; CHECK: stx %o1, [%i0] +define void @call_ret_i64_pair(i64* %i0) { + %rv = call { i64, i64 } @ret_i64_pair(i32 undef, i32 undef, + i64* undef, i64* undef) + %e0 = extractvalue { i64, i64 } %rv, 0 + store i64 %e0, i64* %i0 + %e1 = extractvalue { i64, i64 } %rv, 1 + store i64 %e1, i64* %i0 + ret void +} + +; This is not a C struct, each member uses 8 bytes. +; CHECK: ret_i32_float_pair +; CHECK: ld [%i2], %i0 +; CHECK: ld [%i3], %f3 +define { i32, float } @ret_i32_float_pair(i32 %a0, i32 %a1, + i32* %p, float* %q) { + %r1 = load i32* %p + %rv1 = insertvalue { i32, float } undef, i32 %r1, 0 + store i32 0, i32* %p + %r2 = load float* %q + %rv2 = insertvalue { i32, float } %rv1, float %r2, 1 + ret { i32, float } %rv2 +} + +; CHECK: call_ret_i32_float_pair +; CHECK: call ret_i32_float_pair +; CHECK: st %o0, [%i0] +; CHECK: st %f3, [%i1] +define void @call_ret_i32_float_pair(i32* %i0, float* %i1) { + %rv = call { i32, float } @ret_i32_float_pair(i32 undef, i32 undef, + i32* undef, float* undef) + %e0 = extractvalue { i32, float } %rv, 0 + store i32 %e0, i32* %i0 + %e1 = extractvalue { i32, float } %rv, 1 + store float %e1, float* %i1 + ret void +} + +; This is a C struct, each member uses 4 bytes. +; CHECK: ret_i32_float_packed +; CHECK: ld [%i2], [[R:%[gilo][0-7]]] +; CHECK: sllx [[R]], 32, %i0 +; CHECK: ld [%i3], %f1 +define inreg { i32, float } @ret_i32_float_packed(i32 %a0, i32 %a1, + i32* %p, float* %q) { + %r1 = load i32* %p + %rv1 = insertvalue { i32, float } undef, i32 %r1, 0 + store i32 0, i32* %p + %r2 = load float* %q + %rv2 = insertvalue { i32, float } %rv1, float %r2, 1 + ret { i32, float } %rv2 +} + +; CHECK: call_ret_i32_float_packed +; CHECK: call ret_i32_float_packed +; CHECK: srlx %o0, 32, [[R:%[gilo][0-7]]] +; CHECK: st [[R]], [%i0] +; CHECK: st %f1, [%i1] +define void @call_ret_i32_float_packed(i32* %i0, float* %i1) { + %rv = call { i32, float } @ret_i32_float_packed(i32 undef, i32 undef, + i32* undef, float* undef) + %e0 = extractvalue { i32, float } %rv, 0 + store i32 %e0, i32* %i0 + %e1 = extractvalue { i32, float } %rv, 1 + store float %e1, float* %i1 + ret void +} + +; The C frontend should use i64 to return { i32, i32 } structs, but verify that +; we don't miscompile thi case where both struct elements are placed in %i0. +; CHECK: ret_i32_packed +; CHECK: ld [%i2], [[R1:%[gilo][0-7]]] +; CHECK: ld [%i3], [[R2:%[gilo][0-7]]] +; CHECK: sllx [[R2]], 32, [[R3:%[gilo][0-7]]] +; CHECK: or [[R3]], [[R1]], %i0 +define inreg { i32, i32 } @ret_i32_packed(i32 %a0, i32 %a1, + i32* %p, i32* %q) { + %r1 = load i32* %p + %rv1 = insertvalue { i32, i32 } undef, i32 %r1, 1 + store i32 0, i32* %p + %r2 = load i32* %q + %rv2 = insertvalue { i32, i32 } %rv1, i32 %r2, 0 + ret { i32, i32 } %rv2 +} + +; CHECK: call_ret_i32_packed +; CHECK: call ret_i32_packed +; CHECK: srlx %o0, 32, [[R:%[gilo][0-7]]] +; CHECK: st [[R]], [%i0] +; CHECK: st %o0, [%i1] +define void @call_ret_i32_packed(i32* %i0, i32* %i1) { + %rv = call { i32, i32 } @ret_i32_packed(i32 undef, i32 undef, + i32* undef, i32* undef) + %e0 = extractvalue { i32, i32 } %rv, 0 + store i32 %e0, i32* %i0 + %e1 = extractvalue { i32, i32 } %rv, 1 + store i32 %e1, i32* %i1 + ret void +} + +; The return value must be sign-extended to 64 bits. +; CHECK: ret_sext +; CHECK: sra %i0, 0, %i0 +define signext i32 @ret_sext(i32 %a0) { + ret i32 %a0 +} + +; CHECK: ret_zext +; CHECK: srl %i0, 0, %i0 +define zeroext i32 @ret_zext(i32 %a0) { + ret i32 %a0 +} + +; CHECK: ret_nosext +; CHECK-NOT: sra +define signext i32 @ret_nosext(i32 signext %a0) { + ret i32 %a0 +} + +; CHECK: ret_nozext +; CHECK-NOT: srl +define signext i32 @ret_nozext(i32 signext %a0) { + ret i32 %a0 +} diff --git a/test/CodeGen/SPARC/64bit.ll b/test/CodeGen/SPARC/64bit.ll new file mode 100644 index 0000000..2bbf7de --- /dev/null +++ b/test/CodeGen/SPARC/64bit.ll @@ -0,0 +1,183 @@ +; RUN: llc < %s -march=sparcv9 | FileCheck %s + +; CHECK: ret2: +; CHECK: or %g0, %i1, %i0 +define i64 @ret2(i64 %a, i64 %b) { + ret i64 %b +} + +; CHECK: shl_imm +; CHECK: sllx %i0, 7, %i0 +define i64 @shl_imm(i64 %a) { + %x = shl i64 %a, 7 + ret i64 %x +} + +; CHECK: sra_reg +; CHECK: srax %i0, %i1, %i0 +define i64 @sra_reg(i64 %a, i64 %b) { + %x = ashr i64 %a, %b + ret i64 %x +} + +; Immediate materialization. Many of these patterns could actually be merged +; into the restore instruction: +; +; restore %g0, %g0, %o0 +; +; CHECK: ret_imm0 +; CHECK: or %g0, %g0, %i0 +define i64 @ret_imm0() { + ret i64 0 +} + +; CHECK: ret_simm13 +; CHECK: or %g0, -4096, %i0 +define i64 @ret_simm13() { + ret i64 -4096 +} + +; CHECK: ret_sethi +; CHECK: sethi 4, %i0 +; CHECK-NOT: or +; CHECK: restore +define i64 @ret_sethi() { + ret i64 4096 +} + +; CHECK: ret_sethi +; CHECK: sethi 4, [[R:%[goli][0-7]]] +; CHECK: or [[R]], 1, %i0 +define i64 @ret_sethi_or() { + ret i64 4097 +} + +; CHECK: ret_nimm33 +; CHECK: sethi 4, [[R:%[goli][0-7]]] +; CHECK: xor [[R]], -4, %i0 +define i64 @ret_nimm33() { + ret i64 -4100 +} + +; CHECK: ret_bigimm +; CHECK: sethi +; CHECK: sethi +define i64 @ret_bigimm() { + ret i64 6800754272627607872 +} + +; CHECK: ret_bigimm2 +; CHECK: sethi 1048576 +define i64 @ret_bigimm2() { + ret i64 4611686018427387904 ; 0x4000000000000000 +} + +; CHECK: reg_reg_alu +; CHECK: add %i0, %i1, [[R0:%[goli][0-7]]] +; CHECK: sub [[R0]], %i2, [[R1:%[goli][0-7]]] +; CHECK: andn [[R1]], %i0, %i0 +define i64 @reg_reg_alu(i64 %x, i64 %y, i64 %z) { + %a = add i64 %x, %y + %b = sub i64 %a, %z + %c = xor i64 %x, -1 + %d = and i64 %b, %c + ret i64 %d +} + +; CHECK: reg_imm_alu +; CHECK: add %i0, -5, [[R0:%[goli][0-7]]] +; CHECK: xor [[R0]], 2, %i0 +define i64 @reg_imm_alu(i64 %x, i64 %y, i64 %z) { + %a = add i64 %x, -5 + %b = xor i64 %a, 2 + ret i64 %b +} + +; CHECK: loads +; CHECK: ldx [%i0] +; CHECK: stx % +; CHECK: ld [%i1] +; CHECK: st % +; CHECK: ldsw [%i2] +; CHECK: stx % +; CHECK: ldsh [%i3] +; CHECK: sth % +define i64 @loads(i64* %p, i32* %q, i32* %r, i16* %s) { + %a = load i64* %p + %ai = add i64 1, %a + store i64 %ai, i64* %p + %b = load i32* %q + %b2 = zext i32 %b to i64 + %bi = trunc i64 %ai to i32 + store i32 %bi, i32* %q + %c = load i32* %r + %c2 = sext i32 %c to i64 + store i64 %ai, i64* %p + %d = load i16* %s + %d2 = sext i16 %d to i64 + %di = trunc i64 %ai to i16 + store i16 %di, i16* %s + + %x1 = add i64 %a, %b2 + %x2 = add i64 %c2, %d2 + %x3 = add i64 %x1, %x2 + ret i64 %x3 +} + +; CHECK: stores +; CHECK: ldx [%i0+8], [[R:%[goli][0-7]]] +; CHECK: stx [[R]], [%i0+16] +; CHECK: st [[R]], [%i1+-8] +; CHECK: sth [[R]], [%i2+40] +; CHECK: stb [[R]], [%i3+-20] +define void @stores(i64* %p, i32* %q, i16* %r, i8* %s) { + %p1 = getelementptr i64* %p, i64 1 + %p2 = getelementptr i64* %p, i64 2 + %pv = load i64* %p1 + store i64 %pv, i64* %p2 + + %q2 = getelementptr i32* %q, i32 -2 + %qv = trunc i64 %pv to i32 + store i32 %qv, i32* %q2 + + %r2 = getelementptr i16* %r, i16 20 + %rv = trunc i64 %pv to i16 + store i16 %rv, i16* %r2 + + %s2 = getelementptr i8* %s, i8 -20 + %sv = trunc i64 %pv to i8 + store i8 %sv, i8* %s2 + + ret void +} + +; CHECK: promote_shifts +; CHECK: ldub [%i0], [[R:%[goli][0-7]]] +; CHECK: sll [[R]], [[R]], %i0 +define i8 @promote_shifts(i8* %p) { + %L24 = load i8* %p + %L32 = load i8* %p + %B36 = shl i8 %L24, %L32 + ret i8 %B36 +} + +; CHECK: multiply +; CHECK: mulx %i0, %i1, %i0 +define i64 @multiply(i64 %a, i64 %b) { + %r = mul i64 %a, %b + ret i64 %r +} + +; CHECK: signed_divide +; CHECK: sdivx %i0, %i1, %i0 +define i64 @signed_divide(i64 %a, i64 %b) { + %r = sdiv i64 %a, %b + ret i64 %r +} + +; CHECK: unsigned_divide +; CHECK: udivx %i0, %i1, %i0 +define i64 @unsigned_divide(i64 %a, i64 %b) { + %r = udiv i64 %a, %b + ret i64 %r +} diff --git a/test/CodeGen/SPARC/64cond.ll b/test/CodeGen/SPARC/64cond.ll new file mode 100644 index 0000000..6e66a26 --- /dev/null +++ b/test/CodeGen/SPARC/64cond.ll @@ -0,0 +1,56 @@ +; RUN: llc < %s -march=sparcv9 | FileCheck %s +; Testing 64-bit conditionals. + +; CHECK: cmpri +; CHECK: subcc %i1, 1 +; CHECK: bpe %xcc, +define void @cmpri(i64* %p, i64 %x) { +entry: + %tobool = icmp eq i64 %x, 1 + br i1 %tobool, label %if.end, label %if.then + +if.then: + store i64 %x, i64* %p, align 8 + br label %if.end + +if.end: + ret void +} + +; CHECK: cmprr +; CHECK: subcc %i1, %i2 +; CHECK: bpgu %xcc, +define void @cmprr(i64* %p, i64 %x, i64 %y) { +entry: + %tobool = icmp ugt i64 %x, %y + br i1 %tobool, label %if.end, label %if.then + +if.then: + store i64 %x, i64* %p, align 8 + br label %if.end + +if.end: + ret void +} + +; CHECK: selecti32_xcc +; CHECK: subcc %i0, %i1 +; CHECK: movg %xcc, %i2, %i3 +; CHECK: or %g0, %i3, %i0 +define i32 @selecti32_xcc(i64 %x, i64 %y, i32 %a, i32 %b) { +entry: + %tobool = icmp sgt i64 %x, %y + %rv = select i1 %tobool, i32 %a, i32 %b + ret i32 %rv +} + +; CHECK: selecti64_xcc +; CHECK: subcc %i0, %i1 +; CHECK: movg %xcc, %i2, %i3 +; CHECK: or %g0, %i3, %i0 +define i64 @selecti64_xcc(i64 %x, i64 %y, i64 %a, i64 %b) { +entry: + %tobool = icmp sgt i64 %x, %y + %rv = select i1 %tobool, i64 %a, i64 %b + ret i64 %rv +} diff --git a/test/CodeGen/SPARC/constpool.ll b/test/CodeGen/SPARC/constpool.ll new file mode 100644 index 0000000..d93a53b --- /dev/null +++ b/test/CodeGen/SPARC/constpool.ll @@ -0,0 +1,48 @@ +; RUN: llc < %s -march=sparc -relocation-model=static -code-model=small | FileCheck --check-prefix=abs32 %s +; RUN: llc < %s -march=sparcv9 -relocation-model=static -code-model=small | FileCheck --check-prefix=abs32 %s +; RUN: llc < %s -march=sparcv9 -relocation-model=static -code-model=medium | FileCheck --check-prefix=abs44 %s +; RUN: llc < %s -march=sparcv9 -relocation-model=static -code-model=large | FileCheck --check-prefix=abs64 %s +; RUN: llc < %s -march=sparc -relocation-model=pic -code-model=medium | FileCheck --check-prefix=v8pic32 %s +; RUN: llc < %s -march=sparcv9 -relocation-model=pic -code-model=medium | FileCheck --check-prefix=v9pic32 %s + +define float @floatCP() { +entry: + ret float 1.000000e+00 +} + +; abs32: floatCP +; abs32: sethi %hi(.LCPI0_0), %[[R:[gilo][0-7]]] +; abs32: ld [%[[R]]+%lo(.LCPI0_0)], %f +; abs32: jmp %i7+8 + +; abs44: floatCP +; abs44: sethi %h44(.LCPI0_0), %[[R1:[gilo][0-7]]] +; abs44: add %[[R1]], %m44(.LCPI0_0), %[[R2:[gilo][0-7]]] +; abs44: sllx %[[R2]], 12, %[[R3:[gilo][0-7]]] +; abs44: ld [%[[R3]]+%l44(.LCPI0_0)], %f1 +; abs44: jmp %i7+8 + +; abs64: floatCP +; abs64: sethi %hi(.LCPI0_0), %[[R1:[gilo][0-7]]] +; abs64: add %[[R1]], %lo(.LCPI0_0), %[[R2:[gilo][0-7]]] +; abs64: sethi %hh(.LCPI0_0), %[[R3:[gilo][0-7]]] +; abs64: add %[[R3]], %hm(.LCPI0_0), %[[R4:[gilo][0-7]]] +; abs64: sllx %[[R4]], 32, %[[R5:[gilo][0-7]]] +; abs64: ld [%[[R5]]+%[[R2]]], %f1 +; abs64: jmp %i7+8 + +; v8pic32: floatCP +; v8pic32: _GLOBAL_OFFSET_TABLE_ +; v8pic32: sethi %hi(.LCPI0_0), %[[R1:[gilo][0-7]]] +; v8pic32: add %[[R1]], %lo(.LCPI0_0), %[[Goffs:[gilo][0-7]]] +; v8pic32: ld [%[[GOT:[gilo][0-7]]]+%[[Goffs]]], %[[Gaddr:[gilo][0-7]]] +; v8pic32: ld [%[[Gaddr]]], %f0 +; v8pic32: jmp %i7+8 + +; v9pic32: floatCP +; v9pic32: _GLOBAL_OFFSET_TABLE_ +; v9pic32: sethi %hi(.LCPI0_0), %[[R1:[gilo][0-7]]] +; v9pic32: add %[[R1]], %lo(.LCPI0_0), %[[Goffs:[gilo][0-7]]] +; v9pic32: ldx [%[[GOT:[gilo][0-7]]]+%[[Goffs]]], %[[Gaddr:[gilo][0-7]]] +; v9pic32: ld [%[[Gaddr]]], %f1 +; v9pic32: jmp %i7+8 diff --git a/test/CodeGen/SPARC/ctpop.ll b/test/CodeGen/SPARC/ctpop.ll index e56f494..916a414 100644 --- a/test/CodeGen/SPARC/ctpop.ll +++ b/test/CodeGen/SPARC/ctpop.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -march=sparc -mattr=-v9 | not grep popc -; RUN: llc < %s -march=sparcv9 -mattr=v9 | grep popc +; RUN: llc < %s -march=sparc -mattr=+v9 | grep popc declare i32 @llvm.ctpop.i32(i32) diff --git a/test/CodeGen/SPARC/globals.ll b/test/CodeGen/SPARC/globals.ll new file mode 100644 index 0000000..8d8de58 --- /dev/null +++ b/test/CodeGen/SPARC/globals.ll @@ -0,0 +1,50 @@ +; RUN: llc < %s -march=sparc -relocation-model=static -code-model=small | FileCheck --check-prefix=abs32 %s +; RUN: llc < %s -march=sparcv9 -relocation-model=static -code-model=small | FileCheck --check-prefix=abs32 %s +; RUN: llc < %s -march=sparcv9 -relocation-model=static -code-model=medium | FileCheck --check-prefix=abs44 %s +; RUN: llc < %s -march=sparcv9 -relocation-model=static -code-model=large | FileCheck --check-prefix=abs64 %s +; RUN: llc < %s -march=sparc -relocation-model=pic -code-model=medium | FileCheck --check-prefix=v8pic32 %s +; RUN: llc < %s -march=sparcv9 -relocation-model=pic -code-model=medium | FileCheck --check-prefix=v9pic32 %s + +@G = external global i8 + +define zeroext i8 @loadG() { + %tmp = load i8* @G + ret i8 %tmp +} + +; abs32: loadG +; abs32: sethi %hi(G), %[[R:[gilo][0-7]]] +; abs32: ldub [%[[R]]+%lo(G)], %i0 +; abs32: jmp %i7+8 + +; abs44: loadG +; abs44: sethi %h44(G), %[[R1:[gilo][0-7]]] +; abs44: add %[[R1]], %m44(G), %[[R2:[gilo][0-7]]] +; abs44: sllx %[[R2]], 12, %[[R3:[gilo][0-7]]] +; abs44: ldub [%[[R3]]+%l44(G)], %i0 +; abs44: jmp %i7+8 + +; abs64: loadG +; abs64: sethi %hi(G), %[[R1:[gilo][0-7]]] +; abs64: add %[[R1]], %lo(G), %[[R2:[gilo][0-7]]] +; abs64: sethi %hh(G), %[[R3:[gilo][0-7]]] +; abs64: add %[[R3]], %hm(G), %[[R4:[gilo][0-7]]] +; abs64: sllx %[[R4]], 32, %[[R5:[gilo][0-7]]] +; abs64: ldub [%[[R5]]+%[[R2]]], %i0 +; abs64: jmp %i7+8 + +; v8pic32: loadG +; v8pic32: _GLOBAL_OFFSET_TABLE_ +; v8pic32: sethi %hi(G), %[[R1:[gilo][0-7]]] +; v8pic32: add %[[R1]], %lo(G), %[[Goffs:[gilo][0-7]]] +; v8pic32: ld [%[[GOT:[gilo][0-7]]]+%[[Goffs]]], %[[Gaddr:[gilo][0-7]]] +; v8pic32: ldub [%[[Gaddr]]], %i0 +; v8pic32: jmp %i7+8 + +; v9pic32: loadG +; v9pic32: _GLOBAL_OFFSET_TABLE_ +; v9pic32: sethi %hi(G), %[[R1:[gilo][0-7]]] +; v9pic32: add %[[R1]], %lo(G), %[[Goffs:[gilo][0-7]]] +; v9pic32: ldx [%[[GOT:[gilo][0-7]]]+%[[Goffs]]], %[[Gaddr:[gilo][0-7]]] +; v9pic32: ldub [%[[Gaddr]]], %i0 +; v9pic32: jmp %i7+8 diff --git a/test/CodeGen/SPARC/varargs.ll b/test/CodeGen/SPARC/varargs.ll new file mode 100644 index 0000000..b13f90e --- /dev/null +++ b/test/CodeGen/SPARC/varargs.ll @@ -0,0 +1,75 @@ +; RUN: llc < %s -disable-block-placement | FileCheck %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32:64-S128" +target triple = "sparcv9-sun-solaris" + +; CHECK: varargsfunc +; 128 byte save ares + 1 alloca rounded up to 16 bytes alignment. +; CHECK: save %sp, -144, %sp +; Store the ... arguments to the argument array. The order is not important. +; CHECK: stx %i5, [%fp+2215] +; CHECK: stx %i4, [%fp+2207] +; CHECK: stx %i3, [%fp+2199] +; CHECK: stx %i2, [%fp+2191] +; Store the address of the ... args to %ap at %fp+BIAS+128-8 +; add %fp, 2191, [[R:[gilo][0-7]]] +; stx [[R]], [%fp+2039] +define double @varargsfunc(i8* nocapture %fmt, double %sum, ...) { +entry: + %ap = alloca i8*, align 4 + %ap1 = bitcast i8** %ap to i8* + call void @llvm.va_start(i8* %ap1) + br label %for.cond + +for.cond: + %fmt.addr.0 = phi i8* [ %fmt, %entry ], [ %incdec.ptr, %for.cond.backedge ] + %sum.addr.0 = phi double [ %sum, %entry ], [ %sum.addr.0.be, %for.cond.backedge ] + %incdec.ptr = getelementptr inbounds i8* %fmt.addr.0, i64 1 + %0 = load i8* %fmt.addr.0, align 1 + %conv = sext i8 %0 to i32 + switch i32 %conv, label %sw.default [ + i32 105, label %sw.bb + i32 102, label %sw.bb3 + ] + +; CHECK: sw.bb +; ldx [%fp+2039], %[[AP:[gilo][0-7]]] +; add %[[AP]], 4, %[[AP2:[gilo][0-7]]] +; stx %[[AP2]], [%fp+2039] +; ld [%[[AP]]] +sw.bb: + %1 = va_arg i8** %ap, i32 + %conv2 = sitofp i32 %1 to double + br label %for.cond.backedge + +; CHECK: sw.bb3 +; ldx [%fp+2039], %[[AP:[gilo][0-7]]] +; add %[[AP]], 8, %[[AP2:[gilo][0-7]]] +; stx %[[AP2]], [%fp+2039] +; ldd [%[[AP]]] +sw.bb3: + %2 = va_arg i8** %ap, double + br label %for.cond.backedge + +for.cond.backedge: + %.pn = phi double [ %2, %sw.bb3 ], [ %conv2, %sw.bb ] + %sum.addr.0.be = fadd double %.pn, %sum.addr.0 + br label %for.cond + +sw.default: + ret double %sum.addr.0 +} + +declare void @llvm.va_start(i8*) + +@.str = private unnamed_addr constant [4 x i8] c"abc\00", align 1 + +; CHECK: call_1d +; The fixed-arg double goes in %d2, the second goes in %o2. +; CHECK: sethi 1048576 +; CHECK: , %o2 +; CHECK: , %f2 +define i32 @call_1d() #0 { +entry: + %call = call double (i8*, double, ...)* @varargsfunc(i8* undef, double 1.000000e+00, double 2.000000e+00) + ret i32 1 +} diff --git a/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll b/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll index 498c781..d6b6495 100644 --- a/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll +++ b/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll @@ -47,8 +47,8 @@ declare double @sqrt(double) nounwind readonly declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !0 = metadata !{i32 46, i32 0, metadata !1, null} -!1 = metadata !{i32 524299, metadata !2, i32 44, i32 0} ; [ DW_TAG_lexical_block ] -!2 = metadata !{i32 524299, metadata !3, i32 44, i32 0} ; [ DW_TAG_lexical_block ] +!1 = metadata !{i32 524299, metadata !4, metadata !2, i32 44, i32 0} ; [ DW_TAG_lexical_block ] +!2 = metadata !{i32 524299, metadata !4, metadata !3, i32 44, i32 0} ; [ DW_TAG_lexical_block ] !3 = metadata !{i32 524334, i32 0, metadata !4, metadata !"getClosestDiagonal3", metadata !"getClosestDiagonal3", metadata !"_Z19getClosestDiagonal3ii", metadata !4, i32 44, metadata !6, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, null} ; [ DW_TAG_subprogram ] !4 = metadata !{i32 524329, metadata !"ggEdgeDiscrepancy.cc", metadata !"/Volumes/Home/grosbaj/sources/llvm-externals/speccpu2000/benchspec/CINT2000/252.eon/src", metadata !5} ; [ DW_TAG_file_type ] !5 = metadata !{i32 524305, i32 0, i32 4, metadata !"ggEdgeDiscrepancy.cc", metadata !"/Volumes/Home/grosbaj/sources/llvm-externals/speccpu2000/benchspec/CINT2000/252.eon/src", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build 00)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] @@ -140,8 +140,8 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !91 = metadata !{i32 524544, metadata !1, metadata !"vx", metadata !4, i32 46, metadata !13} ; [ DW_TAG_auto_variable ] !92 = metadata !{i32 48, i32 0, metadata !1, null} !93 = metadata !{i32 218, i32 0, metadata !94, metadata !96} -!94 = metadata !{i32 524299, metadata !95, i32 217, i32 0} ; [ DW_TAG_lexical_block ] -!95 = metadata !{i32 524299, metadata !77, i32 217, i32 0} ; [ DW_TAG_lexical_block ] +!94 = metadata !{i32 524299, metadata !4, metadata !95, i32 217, i32 0} ; [ DW_TAG_lexical_block ] +!95 = metadata !{i32 524299, metadata !4, metadata !77, i32 217, i32 0} ; [ DW_TAG_lexical_block ] !96 = metadata !{i32 51, i32 0, metadata !1, null} !97 = metadata !{i32 227, i32 0, metadata !94, metadata !96} !98 = metadata !{i32 52, i32 0, metadata !1, null} diff --git a/test/CodeGen/Thumb/large-stack.ll b/test/CodeGen/Thumb/large-stack.ll index f8c438c..680976e 100644 --- a/test/CodeGen/Thumb/large-stack.ll +++ b/test/CodeGen/Thumb/large-stack.ll @@ -20,8 +20,8 @@ define void @test2() { define i32 @test3() { ; CHECK: test3: -; CHECK: ldr.n r2, LCPI -; CHECK: add sp, r2 +; CHECK: ldr.n r1, LCPI +; CHECK: add sp, r1 ; CHECK: ldr.n r1, LCPI ; CHECK: add r1, sp ; CHECK: subs r4, r7, #4 diff --git a/test/CodeGen/Thumb2/2013-02-19-tail-call-register-hint.ll b/test/CodeGen/Thumb2/2013-02-19-tail-call-register-hint.ll index 502b138..e905cb9 100644 --- a/test/CodeGen/Thumb2/2013-02-19-tail-call-register-hint.ll +++ b/test/CodeGen/Thumb2/2013-02-19-tail-call-register-hint.ll @@ -18,13 +18,13 @@ define hidden void @func(i8* %Data) nounwind ssp { tail call void @def(%"myclass"* %2) nounwind %3 = getelementptr inbounds i8* %Data, i32 8 %4 = bitcast i8* %3 to i8** - %5 = load i8** %4, align 4, !tbaa !0 + %5 = load i8** %4, align 4 tail call void @ghi(i8* %5) nounwind %6 = bitcast i8* %Data to void (i8*)** - %7 = load void (i8*)** %6, align 4, !tbaa !0 + %7 = load void (i8*)** %6, align 4 %8 = getelementptr inbounds i8* %Data, i32 4 %9 = bitcast i8* %8 to i8** - %10 = load i8** %9, align 4, !tbaa !0 + %10 = load i8** %9, align 4 %11 = icmp eq i8* %Data, null br i1 %11, label %14, label %12 @@ -47,7 +47,3 @@ declare void @abc(%"myclass"*) declare void @ghi(i8*) declare %"myclass"* @jkl(%"myclass"*) nounwind - -!0 = metadata !{metadata !"any pointer", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll b/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll index 2e4cb1f..cb90bf6 100644 --- a/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll +++ b/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll @@ -4,7 +4,9 @@ ; it makes a ton of annoying overlapping live ranges. This code should not ; cause spills! ; -; RUN: llc < %s -march=x86 -stats 2>&1 | not grep spilled +; RUN: llc < %s -march=x86 -stats 2>&1 | FileCheck %s + +; CHECK-NOT: spilled target datalayout = "e-p:32:32" diff --git a/test/CodeGen/X86/2006-07-31-SingleRegClass.ll b/test/CodeGen/X86/2006-07-31-SingleRegClass.ll index c5c74d1..c4b08a3 100644 --- a/test/CodeGen/X86/2006-07-31-SingleRegClass.ll +++ b/test/CodeGen/X86/2006-07-31-SingleRegClass.ll @@ -1,7 +1,8 @@ ; PR850 -; RUN: llc < %s -march=x86 -x86-asm-syntax=att > %t -; RUN: grep "movl 4(%eax),%ebp" %t -; RUN: grep "movl 0(%eax), %ebx" %t +; RUN: llc < %s -march=x86 -x86-asm-syntax=att | FileCheck %s + +; CHECK: {{movl 4[(]%eax[)],%ebp}} +; CHECK: {{movl 0[(]%eax[)], %ebx}} define i32 @foo(i32 %__s.i.i, i32 %tmp5.i.i, i32 %tmp6.i.i, i32 %tmp7.i.i, i32 %tmp8.i.i) { %tmp9.i.i = call i32 asm sideeffect "push %ebp\0Apush %ebx\0Amovl 4($2),%ebp\0Amovl 0($2), %ebx\0Amovl $1,%eax\0Aint $$0x80\0Apop %ebx\0Apop %ebp", "={ax},i,0,{cx},{dx},{si},{di}"( i32 192, i32 %__s.i.i, i32 %tmp5.i.i, i32 %tmp6.i.i, i32 %tmp7.i.i, i32 %tmp8.i.i ) ; <i32> [#uses=1] diff --git a/test/CodeGen/X86/2006-11-27-SelectLegalize.ll b/test/CodeGen/X86/2006-11-27-SelectLegalize.ll index ea2e6db..ba83a8d 100644 --- a/test/CodeGen/X86/2006-11-27-SelectLegalize.ll +++ b/test/CodeGen/X86/2006-11-27-SelectLegalize.ll @@ -1,6 +1,8 @@ -; RUN: llc < %s -march=x86 | grep test.*1 +; RUN: llc < %s -march=x86 | FileCheck %s ; PR1016 +; CHECK: {{test.*1}} + define i32 @test(i32 %A, i32 %B, i32 %C) { %a = trunc i32 %A to i1 ; <i1> [#uses=1] %D = select i1 %a, i32 %B, i32 %C ; <i32> [#uses=1] diff --git a/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll b/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll index 18b06dc..366f583 100644 --- a/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll +++ b/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll @@ -1,8 +1,9 @@ -; RUN: llc < %s -mcpu=yonah -march=x86 | \ -; RUN: grep "cmpltsd %xmm0, %xmm0" +; RUN: llc < %s -mcpu=yonah -march=x86 | FileCheck %s + target datalayout = "e-p:32:32" target triple = "i686-apple-darwin9" +; CHECK: {{cmpltsd %xmm0, %xmm0}} define void @acoshf() { %tmp19 = tail call <2 x double> asm sideeffect "pcmpeqd $0, $0 \0A\09 cmpltsd $0, $0", "=x,0,~{dirflag},~{fpsr},~{flags}"( <2 x double> zeroinitializer ) ; <<2 x double>> [#uses=0] diff --git a/test/CodeGen/X86/2007-04-24-Huge-Stack.ll b/test/CodeGen/X86/2007-04-24-Huge-Stack.ll index 7528129..648718c 100644 --- a/test/CodeGen/X86/2007-04-24-Huge-Stack.ll +++ b/test/CodeGen/X86/2007-04-24-Huge-Stack.ll @@ -1,6 +1,8 @@ -; RUN: llc < %s -march=x86-64 | not grep 4294967112 +; RUN: llc < %s -march=x86-64 | FileCheck %s ; PR1348 +; CHECK-NOT: 4294967112 + %struct.md5_ctx = type { i32, i32, i32, i32, [2 x i32], i32, [128 x i8], [4294967288 x i8] } define i8* @md5_buffer(i8* %buffer, i64 %len, i8* %resblock) { diff --git a/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll b/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll index b27ef83..38fc5e1 100644 --- a/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll +++ b/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll @@ -1,5 +1,6 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 -; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep punpckhwd +; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s + +; CHECK-NOT: punpckhwd declare <16 x i8> @llvm.x86.sse2.packuswb.128(<8 x i16>, <8 x i16>) diff --git a/test/CodeGen/X86/2007-06-15-IntToMMX.ll b/test/CodeGen/X86/2007-06-15-IntToMMX.ll index 660d4fe..5612d9e 100644 --- a/test/CodeGen/X86/2007-06-15-IntToMMX.ll +++ b/test/CodeGen/X86/2007-06-15-IntToMMX.ll @@ -1,4 +1,7 @@ -; RUN: llc < %s -march=x86-64 -mattr=+mmx | grep paddusw +; RUN: llc < %s -march=x86-64 -mattr=+mmx | FileCheck %s + +; CHECK: paddusw + @R = external global x86_mmx ; <x86_mmx*> [#uses=1] define void @foo(<1 x i64> %A, <1 x i64> %B) { diff --git a/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll b/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll index 62624a7..4f7ae32 100644 --- a/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll +++ b/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -march=x86 | not grep movl +; RUN: llc < %s -march=x86 | FileCheck %s + +; CHECK-NOT: movl define zeroext i8 @t(i8 zeroext %x, i8 zeroext %y) { %tmp2 = add i8 %x, 2 diff --git a/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll b/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll index d3120f3..82052b1 100644 --- a/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll +++ b/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll @@ -1,4 +1,8 @@ -; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | grep inc | not grep PTR +; RUN: llc < %s -march=x86 -x86-asm-syntax=intel | FileCheck %s + +; CHECK: inc +; CHECK-NOT: PTR +; CHECK: {{$}} define signext i16 @t(i32* %bitptr, i32* %source, i8** %byteptr, i32 %scale, i32 %round) { entry: diff --git a/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll b/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll index 56a109a..c467024 100644 --- a/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll +++ b/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll @@ -1,9 +1,11 @@ -; RUN: llc < %s -relocation-model=static | grep "foo str$" +; RUN: llc < %s -relocation-model=static | FileCheck %s ; PR1761 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-pc-linux" @str = internal constant [12 x i8] c"init/main.c\00" ; <[12 x i8]*> [#uses=1] +; CHECK: {{foo str$}} + define i32 @unknown_bootoption() { entry: tail call void asm sideeffect "foo ${0:c}\0A", "i,~{dirflag},~{fpsr},~{flags}"( i8* getelementptr ([12 x i8]* @str, i32 0, i64 0) ) diff --git a/test/CodeGen/X86/2008-01-09-LongDoubleSin.ll b/test/CodeGen/X86/2008-01-09-LongDoubleSin.ll index 6997d53..e8c957b 100644 --- a/test/CodeGen/X86/2008-01-09-LongDoubleSin.ll +++ b/test/CodeGen/X86/2008-01-09-LongDoubleSin.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -o - | grep sinl +; RUN: llc < %s -o - | FileCheck %s + +; CHECK: sinl target triple = "i686-pc-linux-gnu" diff --git a/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll b/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll index a52b365..b06b249 100644 --- a/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll +++ b/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll @@ -1,5 +1,4 @@ -; RUN: llc < %s | grep "a:" | not grep ax -; RUN: llc < %s | grep "b:" | not grep ax +; RUN: llc < %s | FileCheck %s ; PR2078 ; The clobber list says that "ax" is clobbered. Make sure that eax isn't ; allocated to the input/output register. @@ -15,6 +14,10 @@ entry: ret void } +; CHECK: a: +; CHECK-NOT: ax +; CHECK: {{$}} + define void @test2(i16* %block, i8* %pixels, i32 %line_size) nounwind { entry: %tmp1 = getelementptr i16* %block, i32 64 ; <i16*> [#uses=1] @@ -22,3 +25,6 @@ entry: ret void } +; CHECK: b: +; CHECK-NOT: ax +; CHECK: {{$}} diff --git a/test/CodeGen/X86/2008-11-06-testb.ll b/test/CodeGen/X86/2008-11-06-testb.ll index f8f317c..e7caa7a 100644 --- a/test/CodeGen/X86/2008-11-06-testb.ll +++ b/test/CodeGen/X86/2008-11-06-testb.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin | grep testb +; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s + +; CHECK: testb ; ModuleID = '<stdin>' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" diff --git a/test/CodeGen/X86/2009-02-25-CommuteBug.ll b/test/CodeGen/X86/2009-02-25-CommuteBug.ll index 9ea34e2..5bec179 100644 --- a/test/CodeGen/X86/2009-02-25-CommuteBug.ll +++ b/test/CodeGen/X86/2009-02-25-CommuteBug.ll @@ -1,7 +1,9 @@ ; REQUIRES: asserts -; RUN: llc < %s -march=x86 -mattr=+sse2 -stats 2>&1 | not grep commuted +; RUN: llc < %s -march=x86 -mattr=+sse2 -stats 2>&1 | FileCheck %s ; rdar://6608609 +; CHECK-NOT: commuted + define <2 x double> @t(<2 x double> %A, <2 x double> %B, <2 x double> %C) nounwind readnone { entry: %tmp.i2 = bitcast <2 x double> %B to <2 x i64> ; <<2 x i64>> [#uses=1] diff --git a/test/CodeGen/X86/2009-03-25-TestBug.ll b/test/CodeGen/X86/2009-03-25-TestBug.ll index f40fddc..cc1d73d 100644 --- a/test/CodeGen/X86/2009-03-25-TestBug.ll +++ b/test/CodeGen/X86/2009-03-25-TestBug.ll @@ -1,8 +1,9 @@ -; RUN: llc < %s -march=x86 -o %t -; RUN: not grep and %t -; RUN: not grep shr %t +; RUN: llc < %s -march=x86 | FileCheck %s ; rdar://6661955 +; CHECK-NOT: and +; CHECK-NOT: shr + @hello = internal constant [7 x i8] c"hello\0A\00" @world = internal constant [7 x i8] c"world\0A\00" diff --git a/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll b/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll index 0607eda..679a65d 100644 --- a/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll +++ b/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll @@ -1,8 +1,10 @@ ; REQUIRES: asserts -; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats 2>&1 | grep "Number of modref unfolded" +; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -disable-fp-elim -stats 2>&1 | FileCheck %s ; XFAIL: * ; 69408 removed the opportunity for this optimization to work +; CHECK: {{Number of modref unfolded}} + %struct.SHA512_CTX = type { [8 x i64], i64, i64, %struct.anon, i32, i32 } %struct.anon = type { [16 x i64] } @K512 = external constant [80 x i64], align 32 ; <[80 x i64]*> [#uses=2] diff --git a/test/CodeGen/X86/2009-04-24.ll b/test/CodeGen/X86/2009-04-24.ll index 08bf9e3..d104c87 100644 --- a/test/CodeGen/X86/2009-04-24.ll +++ b/test/CodeGen/X86/2009-04-24.ll @@ -1,8 +1,9 @@ -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -regalloc=fast -optimize-regalloc=0 -relocation-model=pic > %t2 -; RUN: grep "leaq.*TLSGD" %t2 -; RUN: grep "__tls_get_addr" %t2 +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -regalloc=fast -optimize-regalloc=0 -relocation-model=pic | FileCheck %s ; PR4004 +; CHECK: {{leaq.*TLSGD}} +; CHECK: {{__tls_get_addr}} + @i = thread_local global i32 15 define i32 @f() { diff --git a/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll b/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll index 738b5fb..7468acb 100644 --- a/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll +++ b/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll @@ -1,8 +1,9 @@ -; RUN: llc < %s -relocation-model=static > %t -; RUN: grep "1: ._pv_cpu_ops+8" %t -; RUN: grep "2: ._G" %t +; RUN: llc < %s -relocation-model=static | FileCheck %s ; PR4152 +; CHECK: {{1: ._pv_cpu_ops[+]8}} +; CHECK: {{2: ._G}} + target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin9.6" %struct.pv_cpu_ops = type { i32, [2 x i32] } diff --git a/test/CodeGen/X86/2009-05-23-available_externally.ll b/test/CodeGen/X86/2009-05-23-available_externally.ll index 94773d9..c990108 100644 --- a/test/CodeGen/X86/2009-05-23-available_externally.ll +++ b/test/CodeGen/X86/2009-05-23-available_externally.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -relocation-model=pic | grep atoi | grep PLT +; RUN: llc < %s -relocation-model=pic | FileCheck %s ; PR4253 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" @@ -9,6 +9,9 @@ entry: ret i32 %call } +; CHECK: foo +; CHECK: {{atoi.+PLT}} + define available_externally fastcc i32 @atoi(i8* %__nptr) nounwind readonly { entry: %call = tail call i64 @strtol(i8* nocapture %__nptr, i8** null, i32 10) nounwind readonly ; <i64> [#uses=1] diff --git a/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll b/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll index 3076322..3061dc2 100644 --- a/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll +++ b/test/CodeGen/X86/2009-06-05-ScalarToVectorByteMMX.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=+mmx,+sse2 | not grep movl +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=+mmx,+sse2 | FileCheck %s + +; CHECK-NOT: movl define <8 x i8> @a(i8 zeroext %x) nounwind { %r = insertelement <8 x i8> undef, i8 %x, i32 0 diff --git a/test/CodeGen/X86/2009-08-08-CastError.ll b/test/CodeGen/X86/2009-08-08-CastError.ll index 2dc812d..748c5a8 100644 --- a/test/CodeGen/X86/2009-08-08-CastError.ll +++ b/test/CodeGen/X86/2009-08-08-CastError.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -mtriple=x86_64-pc-mingw64 | grep movabsq +; RUN: llc < %s -mtriple=x86_64-pc-mingw64 | FileCheck %s + +; CHECK: movabsq target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" diff --git a/test/CodeGen/X86/2010-01-18-DbgValue.ll b/test/CodeGen/X86/2010-01-18-DbgValue.ll index 239522d..7dba332 100644 --- a/test/CodeGen/X86/2010-01-18-DbgValue.ll +++ b/test/CodeGen/X86/2010-01-18-DbgValue.ll @@ -31,20 +31,20 @@ declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!3} !0 = metadata !{i32 786689, metadata !1, metadata !"my_r0", metadata !2, i32 11, metadata !7, i32 0, null} ; [ DW_TAG_arg_variable ] -!1 = metadata !{i32 786478, i32 0, metadata !2, metadata !"foo", metadata !"foo", metadata !"foo", metadata !2, i32 11, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, double (%struct.Rect*)* @foo, null, null, null, i32 11} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 786478, metadata !2, metadata !"foo", metadata !"foo", metadata !"foo", metadata !2, i32 11, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, double (%struct.Rect*)* @foo, null, null, null, i32 11} ; [ DW_TAG_subprogram ] !2 = metadata !{i32 786473, metadata !19} ; [ DW_TAG_file_type ] -!3 = metadata !{i32 786449, i32 0, i32 1, metadata !2, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 false, metadata !"", i32 0, null, null, metadata !18, null, metadata !""} ; [ DW_TAG_compile_unit ] -!4 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null} ; [ DW_TAG_subroutine_type ] +!3 = metadata !{i32 786449, i32 1, metadata !2, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 false, metadata !"", i32 0, null, null, metadata !18, null, metadata !""} ; [ DW_TAG_compile_unit ] +!4 = metadata !{i32 786453, metadata !19, metadata !2, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null} ; [ DW_TAG_subroutine_type ] !5 = metadata !{metadata !6, metadata !7} -!6 = metadata !{i32 786468, metadata !2, metadata !"double", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!7 = metadata !{i32 786451, metadata !2, metadata !"Rect", metadata !2, i32 6, i64 256, i64 64, i64 0, i32 0, null, metadata !8, i32 0, null} ; [ DW_TAG_structure_type ] +!6 = metadata !{i32 786468, metadata !19, metadata !2, metadata !"double", i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] +!7 = metadata !{i32 786451, metadata !19, metadata !2, metadata !"Rect", i32 6, i64 256, i64 64, i64 0, i32 0, null, metadata !8, i32 0, null} ; [ DW_TAG_structure_type ] !8 = metadata !{metadata !9, metadata !14} -!9 = metadata !{i32 786445, metadata !7, metadata !"P1", metadata !2, i32 7, i64 128, i64 64, i64 0, i32 0, metadata !10} ; [ DW_TAG_member ] -!10 = metadata !{i32 786451, metadata !2, metadata !"Pt", metadata !2, i32 1, i64 128, i64 64, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_structure_type ] +!9 = metadata !{i32 786445, metadata !19, metadata !7, metadata !"P1", i32 7, i64 128, i64 64, i64 0, i32 0, metadata !10} ; [ DW_TAG_member ] +!10 = metadata !{i32 786451, metadata !19, metadata !2, metadata !"Pt", i32 1, i64 128, i64 64, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_structure_type ] !11 = metadata !{metadata !12, metadata !13} -!12 = metadata !{i32 786445, metadata !10, metadata !"x", metadata !2, i32 2, i64 64, i64 64, i64 0, i32 0, metadata !6} ; [ DW_TAG_member ] -!13 = metadata !{i32 786445, metadata !10, metadata !"y", metadata !2, i32 3, i64 64, i64 64, i64 64, i32 0, metadata !6} ; [ DW_TAG_member ] -!14 = metadata !{i32 786445, metadata !7, metadata !"P2", metadata !2, i32 8, i64 128, i64 64, i64 128, i32 0, metadata !10} ; [ DW_TAG_member ] +!12 = metadata !{i32 786445, metadata !19, metadata !10, metadata !"x", i32 2, i64 64, i64 64, i64 0, i32 0, metadata !6} ; [ DW_TAG_member ] +!13 = metadata !{i32 786445, metadata !19, metadata !10, metadata !"y", i32 3, i64 64, i64 64, i64 64, i32 0, metadata !6} ; [ DW_TAG_member ] +!14 = metadata !{i32 786445, metadata !19, metadata !7, metadata !"P2", i32 8, i64 128, i64 64, i64 128, i32 0, metadata !10} ; [ DW_TAG_member ] !15 = metadata !{i32 11, i32 0, metadata !1, null} !16 = metadata !{i32 12, i32 0, metadata !17, null} !17 = metadata !{i32 786443, metadata !1, i32 11, i32 0} ; [ DW_TAG_lexical_block ] diff --git a/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll b/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll index 89f842d..7650a5c 100644 --- a/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll +++ b/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll @@ -201,21 +201,21 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!3} !0 = metadata !{i32 786689, metadata !1, metadata !"a", metadata !2, i32 1921, metadata !9, i32 0, null} ; [ DW_TAG_arg_variable ] -!1 = metadata !{i32 786478, i32 0, metadata !2, metadata !"__divsc3", metadata !"__divsc3", metadata !"__divsc3", metadata !2, i32 1922, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 true, %0 (float, float, float, float)* @__divsc3, null, null, metadata !43, i32 1922} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 786478, metadata !2, metadata !"__divsc3", metadata !"__divsc3", metadata !"__divsc3", metadata !2, i32 1922, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 true, %0 (float, float, float, float)* @__divsc3, null, null, metadata !43, i32 1922} ; [ DW_TAG_subprogram ] !2 = metadata !{i32 786473, metadata !45} ; [ DW_TAG_file_type ] -!3 = metadata !{i32 786449, i32 0, i32 1, metadata !2, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, metadata !"", i32 0, null, null, metadata !44, null, metadata !""} ; [ DW_TAG_compile_unit ] -!4 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null} ; [ DW_TAG_subroutine_type ] +!3 = metadata !{i32 786449, i32 1, metadata !2, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, metadata !"", i32 0, null, null, metadata !44, null, null, metadata !""} ; [ DW_TAG_compile_unit ] +!4 = metadata !{i32 786453, metadata !45, metadata !2, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null} ; [ DW_TAG_subroutine_type ] !5 = metadata !{metadata !6, metadata !9, metadata !9, metadata !9, metadata !9} -!6 = metadata !{i32 786454, metadata !7, metadata !"SCtype", metadata !7, i32 170, i64 0, i64 0, i64 0, i32 0, metadata !8} ; [ DW_TAG_typedef ] +!6 = metadata !{i32 786454, metadata !46, metadata !7, metadata !"SCtype", i32 170, i64 0, i64 0, i64 0, i32 0, metadata !8} ; [ DW_TAG_typedef ] !7 = metadata !{i32 786473, metadata !46} ; [ DW_TAG_file_type ] -!8 = metadata !{i32 786468, metadata !2, metadata !"complex float", metadata !2, i32 0, i64 64, i64 32, i64 0, i32 0, i32 3} ; [ DW_TAG_base_type ] -!9 = metadata !{i32 786454, metadata !7, metadata !"SFtype", metadata !7, i32 167, i64 0, i64 0, i64 0, i32 0, metadata !10} ; [ DW_TAG_typedef ] -!10 = metadata !{i32 786468, metadata !2, metadata !"float", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] +!8 = metadata !{i32 786468, metadata !45, metadata !2, metadata !"complex float", i32 0, i64 64, i64 32, i64 0, i32 0, i32 3} ; [ DW_TAG_base_type ] +!9 = metadata !{i32 786454, metadata !46, metadata !7, metadata !"SFtype", i32 167, i64 0, i64 0, i64 0, i32 0, metadata !10} ; [ DW_TAG_typedef ] +!10 = metadata !{i32 786468, metadata !45, metadata !2, metadata !"float", i32 0, i64 32, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] !11 = metadata !{i32 786689, metadata !1, metadata !"b", metadata !2, i32 1921, metadata !9, i32 0, null} ; [ DW_TAG_arg_variable ] !12 = metadata !{i32 786689, metadata !1, metadata !"c", metadata !2, i32 1921, metadata !9, i32 0, null} ; [ DW_TAG_arg_variable ] !13 = metadata !{i32 786689, metadata !1, metadata !"d", metadata !2, i32 1921, metadata !9, i32 0, null} ; [ DW_TAG_arg_variable ] !14 = metadata !{i32 786688, metadata !15, metadata !"denom", metadata !2, i32 1923, metadata !9, i32 0, null} ; [ DW_TAG_auto_variable ] -!15 = metadata !{i32 786443, metadata !1, i32 1922, i32 0} ; [ DW_TAG_lexical_block ] +!15 = metadata !{i32 786443, metadata !2, metadata !1, i32 1922, i32 0} ; [ DW_TAG_lexical_block ] !16 = metadata !{i32 786688, metadata !15, metadata !"ratio", metadata !2, i32 1923, metadata !9, i32 0, null} ; [ DW_TAG_auto_variable ] !17 = metadata !{i32 786688, metadata !15, metadata !"x", metadata !2, i32 1923, metadata !9, i32 0, null} ; [ DW_TAG_auto_variable ] !18 = metadata !{i32 786688, metadata !15, metadata !"y", metadata !2, i32 1923, metadata !9, i32 0, null} ; [ DW_TAG_auto_variable ] diff --git a/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll b/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll index 5596b1c..6510ff1 100644 --- a/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll +++ b/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll @@ -25,14 +25,14 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !0 = metadata !{i32 786484, i32 0, metadata !1, metadata !"ret", metadata !"ret", metadata !"", metadata !1, i32 7, metadata !3, i1 false, i1 true, null} ; [ DW_TAG_variable ] !1 = metadata !{i32 786473, metadata !36} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 1, metadata !1, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, metadata !"", i32 0, null, null, metadata !32, metadata !31, metadata !""} ; [ DW_TAG_compile_unit ] +!2 = metadata !{i32 786449, metadata !36, i32 1, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, metadata !"", i32 0, null, null, metadata !32, metadata !31, metadata !31, metadata !""} ; [ DW_TAG_compile_unit ] !3 = metadata !{i32 786468, metadata !1, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !4 = metadata !{i32 786689, metadata !5, metadata !"x", metadata !1, i32 12, metadata !3, i32 0, null} ; [ DW_TAG_arg_variable ] -!5 = metadata !{i32 786478, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"foo", metadata !1, i32 13, metadata !6, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 true, void (i32)* @foo, null, null, metadata !33, i32 13} ; [ DW_TAG_subprogram ] +!5 = metadata !{i32 786478, metadata !1, metadata !"foo", metadata !"foo", metadata !"foo", metadata !1, i32 13, metadata !6, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 true, void (i32)* @foo, null, null, metadata !33, i32 13} ; [ DW_TAG_subprogram ] !6 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !7, i32 0, null} ; [ DW_TAG_subroutine_type ] !7 = metadata !{null, metadata !3} !8 = metadata !{i32 786689, metadata !9, metadata !"myvar", metadata !1, i32 17, metadata !13, i32 0, null} ; [ DW_TAG_arg_variable ] -!9 = metadata !{i32 786478, i32 0, metadata !1, metadata !"bar", metadata !"bar", metadata !"bar", metadata !1, i32 17, metadata !10, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 true, i8* (%struct.a*)* @bar, null, null, metadata !34, i32 17} ; [ DW_TAG_subprogram ] +!9 = metadata !{i32 786478, metadata !1, metadata !"bar", metadata !"bar", metadata !"bar", metadata !1, i32 17, metadata !10, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 true, i8* (%struct.a*)* @bar, null, null, metadata !34, i32 17} ; [ DW_TAG_subprogram ] !10 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_subroutine_type ] !11 = metadata !{metadata !12, metadata !13} !12 = metadata !{i32 786447, metadata !1, metadata !"", metadata !1, i32 0, i64 64, i64 64, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ] @@ -42,7 +42,7 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !16 = metadata !{i32 786445, metadata !14, metadata !"c", metadata !1, i32 3, i64 32, i64 32, i64 0, i32 0, metadata !3} ; [ DW_TAG_member ] !17 = metadata !{i32 786445, metadata !14, metadata !"d", metadata !1, i32 4, i64 64, i64 64, i64 64, i32 0, metadata !13} ; [ DW_TAG_member ] !18 = metadata !{i32 786689, metadata !19, metadata !"argc", metadata !1, i32 22, metadata !3, i32 0, null} ; [ DW_TAG_arg_variable ] -!19 = metadata !{i32 786478, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"main", metadata !1, i32 22, metadata !20, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 true, null, null, null, metadata !35, i32 22} ; [ DW_TAG_subprogram ] +!19 = metadata !{i32 786478, metadata !1, metadata !"main", metadata !"main", metadata !"main", metadata !1, i32 22, metadata !20, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 true, null, null, null, metadata !35, i32 22} ; [ DW_TAG_subprogram ] !20 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !21, i32 0, null} ; [ DW_TAG_subroutine_type ] !21 = metadata !{metadata !3, metadata !3, metadata !22} !22 = metadata !{i32 786447, metadata !1, metadata !"", metadata !1, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !23} ; [ DW_TAG_pointer_type ] @@ -50,9 +50,9 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !24 = metadata !{i32 786468, metadata !1, metadata !"char", metadata !1, i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ] !25 = metadata !{i32 786689, metadata !19, metadata !"argv", metadata !1, i32 22, metadata !22, i32 0, null} ; [ DW_TAG_arg_variable ] !26 = metadata !{i32 786688, metadata !27, metadata !"e", metadata !1, i32 23, metadata !14, i32 0, null} ; [ DW_TAG_auto_variable ] -!27 = metadata !{i32 786443, metadata !19, i32 22, i32 0, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!27 = metadata !{i32 786443, metadata !36, metadata !19, i32 22, i32 0, i32 0} ; [ DW_TAG_lexical_block ] !28 = metadata !{i32 18, i32 0, metadata !29, null} -!29 = metadata !{i32 786443, metadata !9, i32 17, i32 0, metadata !1, i32 1} ; [ DW_TAG_lexical_block ] +!29 = metadata !{i32 786443, metadata !36, metadata !9, i32 17, i32 0, i32 1} ; [ DW_TAG_lexical_block ] !30 = metadata !{i32 19, i32 0, metadata !29, null} !31 = metadata !{metadata !0} !32 = metadata !{metadata !5, metadata !9, metadata !19} diff --git a/test/CodeGen/X86/2010-05-28-Crash.ll b/test/CodeGen/X86/2010-05-28-Crash.ll index 1a82779..ee00dba 100644 --- a/test/CodeGen/X86/2010-05-28-Crash.ll +++ b/test/CodeGen/X86/2010-05-28-Crash.ll @@ -25,20 +25,20 @@ entry: !llvm.dbg.cu = !{!3} !0 = metadata !{i32 786689, metadata !1, metadata !"y", metadata !2, i32 2, metadata !6, i32 0, null} ; [ DW_TAG_arg_variable ] -!1 = metadata !{i32 786478, i32 0, metadata !2, metadata !"foo", metadata !"foo", metadata !"foo", metadata !2, i32 2, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 true, i32 (i32)* @foo, null, null, metadata !15, i32 2} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 786478, metadata !2, metadata !"foo", metadata !"foo", metadata !"foo", metadata !2, i32 2, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 true, i32 (i32)* @foo, null, null, metadata !15, i32 2} ; [ DW_TAG_subprogram ] !2 = metadata !{i32 786473, metadata !18} ; [ DW_TAG_file_type ] -!3 = metadata !{i32 786449, i32 0, i32 1, metadata !2, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, metadata !"", i32 0, null, null, metadata !17, null, metadata !""} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 786449, i32 1, metadata !2, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, metadata !"", i32 0, null, null, metadata !17, null, null, metadata !""} ; [ DW_TAG_compile_unit ] !4 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null} ; [ DW_TAG_subroutine_type ] !5 = metadata !{metadata !6, metadata !6} !6 = metadata !{i32 786468, metadata !2, metadata !"int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !7 = metadata !{i32 786689, metadata !8, metadata !"x", metadata !2, i32 6, metadata !6, i32 0, null} ; [ DW_TAG_arg_variable ] -!8 = metadata !{i32 786478, i32 0, metadata !2, metadata !"bar", metadata !"bar", metadata !"bar", metadata !2, i32 6, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 true, i32 (i32)* @bar, null, null, metadata !16, i32 6} ; [ DW_TAG_subprogram ] +!8 = metadata !{i32 786478, metadata !2, metadata !"bar", metadata !"bar", metadata !"bar", metadata !2, i32 6, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 true, i32 (i32)* @bar, null, null, metadata !16, i32 6} ; [ DW_TAG_subprogram ] !9 = metadata !{i32 3, i32 0, metadata !10, null} -!10 = metadata !{i32 786443, metadata !1, i32 2, i32 0} ; [ DW_TAG_lexical_block ] +!10 = metadata !{i32 786443, metadata !2, metadata !1, i32 2, i32 0} ; [ DW_TAG_lexical_block ] !11 = metadata !{i32 1} !12 = metadata !{i32 3, i32 0, metadata !10, metadata !13} !13 = metadata !{i32 7, i32 0, metadata !14, null} -!14 = metadata !{i32 786443, metadata !8, i32 6, i32 0} ; [ DW_TAG_lexical_block ] +!14 = metadata !{i32 786443, metadata !2, metadata !8, i32 6, i32 0} ; [ DW_TAG_lexical_block ] !15 = metadata !{metadata !0} !16 = metadata !{metadata !7} !17 = metadata !{metadata !1, metadata !8} diff --git a/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll b/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll index c9accfa..b764b0b 100644 --- a/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll +++ b/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll @@ -22,14 +22,14 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.lv = !{!0, !14, !15, !16, !17, !24, !25, !28} !0 = metadata !{i32 786689, metadata !1, metadata !"this", metadata !3, i32 11, metadata !12, i32 0, null} ; [ DW_TAG_arg_variable ] -!1 = metadata !{i32 786478, i32 0, metadata !2, metadata !"bar", metadata !"bar", metadata !"_ZN3foo3barEi", metadata !3, i32 11, metadata !9, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 true, i32 (%struct.foo*, i32)* @_ZN3foo3bazEi, null, null, null, i32 11} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 786478, metadata !3, metadata !2, metadata !"bar", metadata !"bar", metadata !"_ZN3foo3barEi", i32 11, metadata !9, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 true, i32 (%struct.foo*, i32)* @_ZN3foo3bazEi, null, null, null, i32 11} ; [ DW_TAG_subprogram ] !2 = metadata !{i32 786451, metadata !3, metadata !"foo", metadata !3, i32 3, i64 32, i64 32, i64 0, i32 0, null, metadata !5, i32 0, null} ; [ DW_TAG_structure_type ] !3 = metadata !{i32 786473, metadata !31} ; [ DW_TAG_file_type ] !4 = metadata !{i32 786449, i32 0, i32 4, metadata !"foo.cp", metadata !"/tmp/", metadata !"4.2.1 LLVM build", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] !5 = metadata !{metadata !6, metadata !1, metadata !8} !6 = metadata !{i32 786445, metadata !2, metadata !"y", metadata !3, i32 8, i64 32, i64 32, i64 0, i32 0, metadata !7} ; [ DW_TAG_member ] !7 = metadata !{i32 786468, metadata !3, metadata !"int", metadata !3, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!8 = metadata !{i32 786478, i32 0, metadata !2, metadata !"baz", metadata !"baz", metadata !"_ZN3foo3bazEi", metadata !3, i32 15, metadata !9, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 true, i32 (%struct.foo*, i32)* @_ZN3foo3bazEi, null, null, null, i32 15} ; [ DW_TAG_subprogram ] +!8 = metadata !{i32 786478, metadata !3, metadata !2, metadata !"baz", metadata !"baz", metadata !"_ZN3foo3bazEi", i32 15, metadata !9, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 true, i32 (%struct.foo*, i32)* @_ZN3foo3bazEi, null, null, null, i32 15} ; [ DW_TAG_subprogram ] !9 = metadata !{i32 786453, metadata !3, metadata !"", metadata !3, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !10, i32 0, null} ; [ DW_TAG_subroutine_type ] !10 = metadata !{metadata !7, metadata !11, metadata !7} !11 = metadata !{i32 786447, metadata !3, metadata !"", metadata !3, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !2} ; [ DW_TAG_pointer_type ] @@ -39,7 +39,7 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !15 = metadata !{i32 786689, metadata !8, metadata !"this", metadata !3, i32 15, metadata !12, i32 0, null} ; [ DW_TAG_arg_variable ] !16 = metadata !{i32 786689, metadata !8, metadata !"x", metadata !3, i32 15, metadata !7, i32 0, null} ; [ DW_TAG_arg_variable ] !17 = metadata !{i32 786689, metadata !18, metadata !"argc", metadata !3, i32 19, metadata !7, i32 0, null} ; [ DW_TAG_arg_variable ] -!18 = metadata !{i32 786478, i32 0, metadata !3, metadata !"main", metadata !"main", metadata !"main", metadata !3, i32 19, metadata !19, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 true, null, null, null, null, i32 19} ; [ DW_TAG_subprogram ] +!18 = metadata !{i32 786478, metadata !3, metadata !3, metadata !"main", metadata !"main", metadata !"main", i32 19, metadata !19, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 true, null, null, null, null, i32 19} ; [ DW_TAG_subprogram ] !19 = metadata !{i32 786453, metadata !3, metadata !"", metadata !3, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !20, i32 0, null} ; [ DW_TAG_subroutine_type ] !20 = metadata !{metadata !7, metadata !7, metadata !21} !21 = metadata !{i32 786447, metadata !3, metadata !"", metadata !3, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !22} ; [ DW_TAG_pointer_type ] diff --git a/test/CodeGen/X86/2010-06-14-fast-isel-fs-load.ll b/test/CodeGen/X86/2010-06-14-fast-isel-fs-load.ll index b22a391..b5679e6 100644 --- a/test/CodeGen/X86/2010-06-14-fast-isel-fs-load.ll +++ b/test/CodeGen/X86/2010-06-14-fast-isel-fs-load.ll @@ -1,4 +1,5 @@ -; RUN: llc -fast-isel -march=x86 < %s | grep %fs: +; RUN: llc -fast-isel -march=x86 < %s | FileCheck %s +; CHECK: %fs: define i32 @test1(i32 addrspace(257)* %arg) nounwind { %tmp = load i32 addrspace(257)* %arg diff --git a/test/CodeGen/X86/2010-08-04-StackVariable.ll b/test/CodeGen/X86/2010-08-04-StackVariable.ll index 84b3e39..91711bb 100644 --- a/test/CodeGen/X86/2010-08-04-StackVariable.ll +++ b/test/CodeGen/X86/2010-08-04-StackVariable.ll @@ -77,27 +77,27 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!3} !46 = metadata !{metadata !0, metadata !9, metadata !16, metadata !17, metadata !20} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"SVal", metadata !"SVal", metadata !"", metadata !2, i32 11, metadata !14, i1 false, i1 false, i32 0, i32 0, null, i1 false, i1 false, null, null, null, null, i32 11} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786478, metadata !1, metadata !"SVal", metadata !"SVal", metadata !"", metadata !2, i32 11, metadata !14, i1 false, i1 false, i32 0, i32 0, null, i1 false, i1 false, null, null, null, null, i32 11} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786451, metadata !2, metadata !"SVal", metadata !2, i32 1, i64 128, i64 64, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_structure_type ] !2 = metadata !{i32 786473, metadata !"small.cc", metadata !"/Users/manav/R8248330", metadata !3} ; [ DW_TAG_file_type ] -!3 = metadata !{i32 786449, i32 0, i32 4, metadata !2, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 false, metadata !"", i32 0, null, null, metadata !46, null, metadata !""} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 786449, i32 4, metadata !2, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 false, metadata !"", i32 0, null, null, metadata !46, null, null, metadata !""} ; [ DW_TAG_compile_unit ] !4 = metadata !{metadata !5, metadata !7, metadata !0, metadata !9} !5 = metadata !{i32 786445, metadata !1, metadata !"Data", metadata !2, i32 7, i64 64, i64 64, i64 0, i32 0, metadata !6} ; [ DW_TAG_member ] !6 = metadata !{i32 786447, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ] !7 = metadata !{i32 786445, metadata !1, metadata !"Kind", metadata !2, i32 8, i64 32, i64 32, i64 64, i32 0, metadata !8} ; [ DW_TAG_member ] !8 = metadata !{i32 786468, metadata !2, metadata !"unsigned int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] -!9 = metadata !{i32 786478, i32 0, metadata !1, metadata !"~SVal", metadata !"~SVal", metadata !"", metadata !2, i32 12, metadata !10, i1 false, i1 false, i32 0, i32 0, null, i1 false, i1 false, null, null, null, null, i32 12} ; [ DW_TAG_subprogram ] +!9 = metadata !{i32 786478, metadata !1, metadata !"~SVal", metadata !"~SVal", metadata !"", metadata !2, i32 12, metadata !10, i1 false, i1 false, i32 0, i32 0, null, i1 false, i1 false, null, null, null, null, i32 12} ; [ DW_TAG_subprogram ] !10 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_subroutine_type ] !11 = metadata !{null, metadata !12, metadata !13} !12 = metadata !{i32 786447, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !1} ; [ DW_TAG_pointer_type ] !13 = metadata !{i32 786468, metadata !2, metadata !"int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !14 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !15, i32 0, null} ; [ DW_TAG_subroutine_type ] !15 = metadata !{null, metadata !12} -!16 = metadata !{i32 786478, i32 0, metadata !1, metadata !"SVal", metadata !"SVal", metadata !"_ZN4SValC1Ev", metadata !2, i32 11, metadata !14, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, void (%struct.SVal*)* @_ZN4SValC1Ev, null, null, null, i32 11} ; [ DW_TAG_subprogram ] -!17 = metadata !{i32 786478, i32 0, metadata !2, metadata !"foo", metadata !"foo", metadata !"_Z3fooi4SVal", metadata !2, i32 16, metadata !18, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 (i32, %struct.SVal*)* @_Z3fooi4SVal, null, null, null, i32 16} ; [ DW_TAG_subprogram ] +!16 = metadata !{i32 786478, metadata !1, metadata !"SVal", metadata !"SVal", metadata !"_ZN4SValC1Ev", metadata !2, i32 11, metadata !14, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, void (%struct.SVal*)* @_ZN4SValC1Ev, null, null, null, i32 11} ; [ DW_TAG_subprogram ] +!17 = metadata !{i32 786478, metadata !2, metadata !"foo", metadata !"foo", metadata !"_Z3fooi4SVal", metadata !2, i32 16, metadata !18, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 (i32, %struct.SVal*)* @_Z3fooi4SVal, null, null, null, i32 16} ; [ DW_TAG_subprogram ] !18 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !19, i32 0, null} ; [ DW_TAG_subroutine_type ] !19 = metadata !{metadata !13, metadata !13, metadata !1} -!20 = metadata !{i32 786478, i32 0, metadata !2, metadata !"main", metadata !"main", metadata !"main", metadata !2, i32 23, metadata !21, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 ()* @main, null, null, null, i32 23} ; [ DW_TAG_subprogram ] +!20 = metadata !{i32 786478, metadata !2, metadata !"main", metadata !"main", metadata !"main", metadata !2, i32 23, metadata !21, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 ()* @main, null, null, null, i32 23} ; [ DW_TAG_subprogram ] !21 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !22, i32 0, null} ; [ DW_TAG_subroutine_type ] !22 = metadata !{metadata !13} !23 = metadata !{i32 786689, metadata !17, metadata !"i", metadata !2, i32 16, metadata !13, i32 0, null} ; [ DW_TAG_arg_variable ] @@ -105,7 +105,7 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !25 = metadata !{i32 786689, metadata !17, metadata !"location", metadata !2, i32 16, metadata !26, i32 0, null} ; [ DW_TAG_arg_variable ] !26 = metadata !{i32 786448, metadata !2, metadata !"SVal", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !1} ; [ DW_TAG_reference_type ] !27 = metadata !{i32 17, i32 0, metadata !28, null} -!28 = metadata !{i32 786443, metadata !17, i32 16, i32 0, metadata !2, i32 2} ; [ DW_TAG_lexical_block ] +!28 = metadata !{i32 786443, metadata !2, metadata !17, i32 16, i32 0, i32 2} ; [ DW_TAG_lexical_block ] !29 = metadata !{i32 18, i32 0, metadata !28, null} !30 = metadata !{i32 20, i32 0, metadata !28, null} !31 = metadata !{i32 786689, metadata !16, metadata !"this", metadata !2, i32 11, metadata !32, i32 0, null} ; [ DW_TAG_arg_variable ] @@ -113,11 +113,11 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !33 = metadata !{i32 786447, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !1} ; [ DW_TAG_pointer_type ] !34 = metadata !{i32 11, i32 0, metadata !16, null} !35 = metadata !{i32 11, i32 0, metadata !36, null} -!36 = metadata !{i32 786443, metadata !37, i32 11, i32 0, metadata !2, i32 1} ; [ DW_TAG_lexical_block ] -!37 = metadata !{i32 786443, metadata !16, i32 11, i32 0, metadata !2, i32 0} ; [ DW_TAG_lexical_block ] +!36 = metadata !{i32 786443, metadata !2, metadata !37, i32 11, i32 0, i32 1} ; [ DW_TAG_lexical_block ] +!37 = metadata !{i32 786443, metadata !2, metadata !16, i32 11, i32 0, i32 0} ; [ DW_TAG_lexical_block ] !38 = metadata !{i32 786688, metadata !39, metadata !"v", metadata !2, i32 24, metadata !1, i32 0, null} ; [ DW_TAG_auto_variable ] -!39 = metadata !{i32 786443, metadata !40, i32 23, i32 0, metadata !2, i32 4} ; [ DW_TAG_lexical_block ] -!40 = metadata !{i32 786443, metadata !20, i32 23, i32 0, metadata !2, i32 3} ; [ DW_TAG_lexical_block ] +!39 = metadata !{i32 786443, metadata !2, metadata !40, i32 23, i32 0, i32 4} ; [ DW_TAG_lexical_block ] +!40 = metadata !{i32 786443, metadata !2, metadata !20, i32 23, i32 0, i32 3} ; [ DW_TAG_lexical_block ] !41 = metadata !{i32 24, i32 0, metadata !39, null} !42 = metadata !{i32 25, i32 0, metadata !39, null} !43 = metadata !{i32 26, i32 0, metadata !39, null} diff --git a/test/CodeGen/X86/2010-09-16-EmptyFilename.ll b/test/CodeGen/X86/2010-09-16-EmptyFilename.ll index 2a766d4..de0d216 100644 --- a/test/CodeGen/X86/2010-09-16-EmptyFilename.ll +++ b/test/CodeGen/X86/2010-09-16-EmptyFilename.ll @@ -14,13 +14,13 @@ entry: !llvm.dbg.cu = !{!2} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"foo", metadata !1, i32 53, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 ()* @foo} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786478, metadata !1, metadata !"foo", metadata !"foo", metadata !"foo", metadata !1, i32 53, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 ()* @foo} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786473, metadata !14} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 12, metadata !7, metadata !"clang version 2.9 (trunk 114084)", i1 false, metadata !"", i32 0, null, null, metadata !13, null, metadata !""} ; [ DW_TAG_compile_unit ] +!2 = metadata !{i32 786449, metadata !15, i32 12, metadata !"clang version 2.9 (trunk 114084)", i1 false, metadata !"", i32 0, null, null, metadata !13, null, metadata !""} ; [ DW_TAG_compile_unit ] !3 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null, null, metadata !13, null} ; [ DW_TAG_subroutine_type ] !4 = metadata !{metadata !5} !5 = metadata !{i32 786468, metadata !1, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 786478, i32 0, metadata !7, metadata !"bar", metadata !"bar", metadata !"bar", metadata !7, i32 4, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 ()* @bar} ; [ DW_TAG_subprogram ] +!6 = metadata !{i32 786478, metadata !7, metadata !"bar", metadata !"bar", metadata !"bar", metadata !7, i32 4, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 ()* @bar} ; [ DW_TAG_subprogram ] !7 = metadata !{i32 786473, metadata !15} ; [ DW_TAG_file_type ] !8 = metadata !{i32 53, i32 13, metadata !9, null} !9 = metadata !{i32 786443, metadata !0, i32 53, i32 11, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] diff --git a/test/CodeGen/X86/2010-11-02-DbgParameter.ll b/test/CodeGen/X86/2010-11-02-DbgParameter.ll index 6d99ffa..8719f73 100644 --- a/test/CodeGen/X86/2010-11-02-DbgParameter.ll +++ b/test/CodeGen/X86/2010-11-02-DbgParameter.ll @@ -17,9 +17,9 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!2} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"", metadata !1, i32 3, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i32 (%struct.bar*)* @foo, null, null, metadata !16, i32 3} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786478, metadata !1, metadata !"foo", metadata !"foo", metadata !"", metadata !1, i32 3, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i32 (%struct.bar*)* @foo, null, null, metadata !16, i32 3} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786473, metadata !17} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 12, metadata !1, metadata !"clang version 2.9 (trunk 117922)", i1 true, metadata !"", i32 0, null, null, metadata !15, null, metadata !""} ; [ DW_TAG_compile_unit ] +!2 = metadata !{i32 786449, i32 12, metadata !1, metadata !"clang version 2.9 (trunk 117922)", i1 true, metadata !"", i32 0, null, null, metadata !15, null, null, metadata !""} ; [ DW_TAG_compile_unit ] !3 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] !4 = metadata !{metadata !5} !5 = metadata !{i32 786468, metadata !2, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] diff --git a/test/CodeGen/X86/2010-12-02-MC-Set.ll b/test/CodeGen/X86/2010-12-02-MC-Set.ll index 33c59c4..4d8d974 100644 --- a/test/CodeGen/X86/2010-12-02-MC-Set.ll +++ b/test/CodeGen/X86/2010-12-02-MC-Set.ll @@ -9,9 +9,9 @@ entry: !llvm.dbg.cu = !{!2} !7 = metadata !{metadata !0} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"", metadata !1, i32 3, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void ()* @foo, null, null, null, i32 0} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786478, metadata !1, metadata !"foo", metadata !"foo", metadata !"", metadata !1, i32 3, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void ()* @foo, null, null, null, i32 0} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786473, metadata !"e.c", metadata !"/private/tmp", metadata !2} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 12, metadata !1, metadata !"clang version 2.9 (trunk 120563)", i1 false, metadata !"", i32 0, null, null, metadata !7, null, metadata !""} ; [ DW_TAG_compile_unit ] +!2 = metadata !{i32 786449, i32 12, metadata !1, metadata !"clang version 2.9 (trunk 120563)", i1 false, metadata !"", i32 0, null, null, metadata !7, null, metadata !""} ; [ DW_TAG_compile_unit ] !3 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] !4 = metadata !{null} !5 = metadata !{i32 5, i32 1, metadata !6, null} diff --git a/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll b/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll index b6078a8..14fb3e4 100644 --- a/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll +++ b/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll @@ -71,29 +71,29 @@ declare i32 @puts(i8* nocapture) nounwind !llvm.dbg.cu = !{!2} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"gcd", metadata !"gcd", metadata !"", metadata !1, i32 5, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i64 (i64, i64)* @gcd, null, null, metadata !29, i32 0} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786478, metadata !1, metadata !"gcd", metadata !"gcd", metadata !"", metadata !1, i32 5, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i64 (i64, i64)* @gcd, null, null, metadata !29, i32 0} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786473, metadata !31} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 12, metadata !1, metadata !"clang version 2.9 (trunk 124117)", i1 true, metadata !"", i32 0, null, null, metadata !28, null, null} ; [ DW_TAG_compile_unit ] -!3 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!2 = metadata !{i32 786449, metadata !31, i32 12, metadata !"clang version 2.9 (trunk 124117)", i1 true, metadata !"", i32 0, null, null, metadata !28, null, null, null} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 786453, metadata !1, metadata !1, metadata !"", i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !4 = metadata !{metadata !5} -!5 = metadata !{i32 786468, metadata !2, metadata !"long int", null, i32 0, i64 64, i64 64, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 786478, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 25, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 true, i32 ()* @main, null, null, metadata !30, i32 0} ; [ DW_TAG_subprogram ] -!7 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!5 = metadata !{i32 786468, null, metadata !2, metadata !"long int", i32 0, i64 64, i64 64, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 786478, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 25, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 true, i32 ()* @main, null, null, metadata !30, i32 0} ; [ DW_TAG_subprogram ] +!7 = metadata !{i32 786453, metadata !1, metadata !1, metadata !"", i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !8 = metadata !{metadata !9} -!9 = metadata !{i32 786468, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!9 = metadata !{i32 786468, null, metadata !2, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !10 = metadata !{i32 786689, metadata !0, metadata !"a", metadata !1, i32 5, metadata !5, i32 0, null} ; [ DW_TAG_arg_variable ] !11 = metadata !{i32 786689, metadata !0, metadata !"b", metadata !1, i32 5, metadata !5, i32 0, null} ; [ DW_TAG_arg_variable ] !12 = metadata !{i32 786688, metadata !13, metadata !"c", metadata !1, i32 6, metadata !5, i32 0, null} ; [ DW_TAG_auto_variable ] -!13 = metadata !{i32 786443, metadata !0, i32 5, i32 52, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!13 = metadata !{i32 786443, metadata !1, metadata !0, i32 5, i32 52, i32 0} ; [ DW_TAG_lexical_block ] !14 = metadata !{i32 786688, metadata !15, metadata !"m", metadata !1, i32 26, metadata !16, i32 0, null} ; [ DW_TAG_auto_variable ] -!15 = metadata !{i32 786443, metadata !6, i32 25, i32 12, metadata !1, i32 2} ; [ DW_TAG_lexical_block ] -!16 = metadata !{i32 786468, metadata !2, metadata !"unsigned int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] +!15 = metadata !{i32 786443, metadata !1, metadata !6, i32 25, i32 12, i32 2} ; [ DW_TAG_lexical_block ] +!16 = metadata !{i32 786468, null, metadata !2, metadata !"unsigned int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] !17 = metadata !{i32 786688, metadata !15, metadata !"z_s", metadata !1, i32 27, metadata !9, i32 0, null} ; [ DW_TAG_auto_variable ] !18 = metadata !{i32 5, i32 41, metadata !0, null} !19 = metadata !{i32 5, i32 49, metadata !0, null} !20 = metadata !{i32 7, i32 5, metadata !13, null} !21 = metadata !{i32 8, i32 9, metadata !22, null} -!22 = metadata !{i32 786443, metadata !13, i32 7, i32 14, metadata !1, i32 1} ; [ DW_TAG_lexical_block ] +!22 = metadata !{i32 786443, metadata !1, metadata !13, i32 7, i32 14, i32 1} ; [ DW_TAG_lexical_block ] !23 = metadata !{i32 9, i32 9, metadata !22, null} !24 = metadata !{i32 26, i32 38, metadata !15, null} !25 = metadata !{i32 27, i32 38, metadata !15, null} diff --git a/test/CodeGen/X86/2011-09-14-valcoalesce.ll b/test/CodeGen/X86/2011-09-14-valcoalesce.ll index a5ec614..6d91109 100644 --- a/test/CodeGen/X86/2011-09-14-valcoalesce.ll +++ b/test/CodeGen/X86/2011-09-14-valcoalesce.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -disable-code-place | FileCheck %s +; RUN: llc < %s -march=x86 -disable-block-placement | FileCheck %s ; ; Test RegistersDefinedFromSameValue. We have multiple copies of the same vreg: ; while.body85.i: @@ -96,7 +96,7 @@ while.body.i188: ; preds = %for.end173.i, %if.e while.body85.i: ; preds = %while.body85.i, %while.body.i188 %aFreq.0518.i = phi i32 [ %add93.i, %while.body85.i ], [ 0, %while.body.i188 ] %inc87.i = add nsw i32 0, 1 - %tmp91.i = load i32* undef, align 4, !tbaa !0 + %tmp91.i = load i32* undef, align 4 %add93.i = add nsw i32 %tmp91.i, %aFreq.0518.i %or.cond514.i = and i1 undef, false br i1 %or.cond514.i, label %while.body85.i, label %while.end.i @@ -168,7 +168,3 @@ if.end85: ; preds = %entry } declare void @fprintf(...) nounwind - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/X86/2012-01-10-UndefExceptionEdge.ll b/test/CodeGen/X86/2012-01-10-UndefExceptionEdge.ll index 832a8eb..501a810 100644 --- a/test/CodeGen/X86/2012-01-10-UndefExceptionEdge.ll +++ b/test/CodeGen/X86/2012-01-10-UndefExceptionEdge.ll @@ -109,7 +109,7 @@ bb49: ; preds = %bb49, %bb48 %tmp51 = add i32 %tmp50, undef %tmp52 = add i32 %tmp50, undef %tmp53 = getelementptr i32* %tmp13, i32 %tmp52 - %tmp54 = load i32* %tmp53, align 4, !tbaa !0 + %tmp54 = load i32* %tmp53, align 4 %tmp55 = add i32 %tmp50, 1 %tmp56 = icmp eq i32 %tmp55, %tmp8 br i1 %tmp56, label %bb57, label %bb49 @@ -127,7 +127,7 @@ bb61: ; preds = %bb61, %bb59 %tmp62 = phi i32 [ %tmp65, %bb61 ], [ 0, %bb59 ] %tmp63 = add i32 %tmp62, %tmp14 %tmp64 = getelementptr i32* %tmp13, i32 %tmp63 - store i32 0, i32* %tmp64, align 4, !tbaa !0 + store i32 0, i32* %tmp64, align 4 %tmp65 = add i32 %tmp62, 1 %tmp66 = icmp eq i32 %tmp65, %tmp8 br i1 %tmp66, label %bb67, label %bb61 @@ -149,7 +149,3 @@ declare void @Pjii(i32*, i32, i32) optsize declare i32 @llvm.eh.typeid.for(i8*) nounwind readnone declare void @OnOverFlow() noreturn optsize ssp align 2 - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/X86/2012-11-30-handlemove-dbg.ll b/test/CodeGen/X86/2012-11-30-handlemove-dbg.ll index e37a388..9164eb9 100644 --- a/test/CodeGen/X86/2012-11-30-handlemove-dbg.ll +++ b/test/CodeGen/X86/2012-11-30-handlemove-dbg.ll @@ -18,7 +18,7 @@ define signext i16 @subdivp(%struct.node.0.27* nocapture %p, double %dsq, double entry: call void @llvm.dbg.declare(metadata !{%struct.hgstruct.2.29* %hg}, metadata !4) %type = getelementptr inbounds %struct.node.0.27* %p, i64 0, i32 0 - %0 = load i16* %type, align 2, !tbaa !8 + %0 = load i16* %type, align 2 %cmp = icmp eq i16 %0, 1 br i1 %cmp, label %return, label %for.cond.preheader @@ -43,9 +43,6 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !3 = metadata !{null} !4 = metadata !{i32 786689, null, metadata !"hg", metadata !5, i32 67109589, metadata !6, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [hg] [line 725] !5 = metadata !{i32 786473, metadata !11} ; [ DW_TAG_file_type ] -!6 = metadata !{i32 786454, null, metadata !"hgstruct", metadata !5, i32 492, i64 0, i64 0, i64 0, i32 0, metadata !7} ; [ DW_TAG_typedef ] [hgstruct] [line 492, size 0, align 0, offset 0] [from ] -!7 = metadata !{i32 786451, null, metadata !"", metadata !5, i32 487, i64 512, i64 64, i32 0, i32 0, null, null, i32 0, i32 0, i32 0} ; [ DW_TAG_structure_type ] [line 487, size 512, align 64, offset 0] [from ] -!8 = metadata !{metadata !"short", metadata !9} -!9 = metadata !{metadata !"omnipotent char", metadata !10} -!10 = metadata !{metadata !"Simple C/C++ TBAA"} +!6 = metadata !{i32 786454, metadata !11, null, metadata !"hgstruct", i32 492, i64 0, i64 0, i64 0, i32 0, metadata !7} ; [ DW_TAG_typedef ] [hgstruct] [line 492, size 0, align 0, offset 0] [from ] +!7 = metadata !{i32 786451, metadata !11, null, metadata !"", i32 487, i64 512, i64 64, i32 0, i32 0, null, null, i32 0, i32 0, i32 0} ; [ DW_TAG_structure_type ] [line 487, size 512, align 64, offset 0] [from ] !11 = metadata !{metadata !"MultiSource/Benchmarks/Olden/bh/newbh.c", metadata !"MultiSource/Benchmarks/Olden/bh"} diff --git a/test/CodeGen/X86/2012-11-30-misched-dbg.ll b/test/CodeGen/X86/2012-11-30-misched-dbg.ll index c35532b..a0fbbb2 100644 --- a/test/CodeGen/X86/2012-11-30-misched-dbg.ll +++ b/test/CodeGen/X86/2012-11-30-misched-dbg.ll @@ -79,8 +79,8 @@ declare i32 @__sprintf_chk(i8*, i32, i64, i8*, ...) !12 = metadata !{i32 786443, metadata !13, i32 249, i32 0, metadata !14, i32 23} ; [ DW_TAG_lexical_block ] [MultiSource/Benchmarks/MiBench/consumer-typeset/z19.c] !13 = metadata !{i32 786443, metadata !3, i32 221, i32 0, metadata !14, i32 19} ; [ DW_TAG_lexical_block ] [MultiSource/Benchmarks/MiBench/consumer-typeset/z19.c] !14 = metadata !{i32 786473, metadata !19} ; [ DW_TAG_file_type ] -!15 = metadata !{i32 786433, null, metadata !"", null, i32 0, i64 160, i64 8, i32 0, i32 0, metadata !16, metadata !17, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 160, align 8, offset 0] [from char] -!16 = metadata !{i32 786468, null, metadata !"char", null, i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ] [char] [line 0, size 8, align 8, offset 0, enc DW_ATE_signed_char] +!15 = metadata !{i32 786433, null, null, metadata !"", i32 0, i64 160, i64 8, i32 0, i32 0, metadata !16, metadata !17, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 160, align 8, offset 0] [from char] +!16 = metadata !{i32 786468, null, null, metadata !"char", i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ] [char] [line 0, size 8, align 8, offset 0, enc DW_ATE_signed_char] !17 = metadata !{metadata !18} !18 = metadata !{i32 786465, i64 0, i64 20} ; [ DW_TAG_subrange_type ] [0, 19] !19 = metadata !{metadata !"MultiSource/Benchmarks/MiBench/consumer-typeset/z19.c", metadata !"MultiSource/Benchmarks/MiBench/consumer-typeset"} @@ -131,6 +131,6 @@ declare void @_Znwm() !30 = metadata !{i32 786449, i32 0, i32 4, metadata !"SingleSource/Benchmarks/Shootout-C++/hash.cpp", metadata !"SingleSource/Benchmarks/Shootout-C++", metadata !"clang version 3.3 (trunk 169129) (llvm/trunk 169135)", i1 true, i1 true, metadata !"", i32 0, null, null, null, null} ; [ DW_TAG_compile_unit ] [SingleSource/Benchmarks/Shootout-C++/hash.cpp] [DW_LANG_C_plus_plus] !31 = metadata !{i32 786688, null, metadata !"X", null, i32 29, metadata !32, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [X] [line 29] -!32 = metadata !{i32 786454, null, metadata !"HM", metadata !33, i32 28, i64 0, i64 0, i64 0, i32 0, null} ; [ DW_TAG_typedef ] [HM] [line 28, size 0, align 0, offset 0] [from ] +!32 = metadata !{i32 786454, metadata !34, null, metadata !"HM", i32 28, i64 0, i64 0, i64 0, i32 0, null} ; [ DW_TAG_typedef ] [HM] [line 28, size 0, align 0, offset 0] [from ] !33 = metadata !{i32 786473, metadata !34} ; [ DW_TAG_file_type ] !34 = metadata !{metadata !"SingleSource/Benchmarks/Shootout-C++/hash.cpp", metadata !"SingleSource/Benchmarks/Shootout-C++"} diff --git a/test/CodeGen/X86/2012-11-30-regpres-dbg.ll b/test/CodeGen/X86/2012-11-30-regpres-dbg.ll index 0e3e5fa..df93c56 100644 --- a/test/CodeGen/X86/2012-11-30-regpres-dbg.ll +++ b/test/CodeGen/X86/2012-11-30-regpres-dbg.ll @@ -39,6 +39,6 @@ invoke.cont44: ; preds = %if.end !1 = metadata !{metadata !2} !2 = metadata !{null, null} !3 = metadata !{i32 786688, null, metadata !"callback", null, i32 214, metadata !4, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [callback] [line 214] -!4 = metadata !{i32 786451, null, metadata !"btCompoundLeafCallback", metadata !5, i32 90, i64 512, i64 64, i32 0, i32 0, null, null, i32 0, null, null} ; [ DW_TAG_structure_type ] [btCompoundLeafCallback] [line 90, size 512, align 64, offset 0] [from ] +!4 = metadata !{i32 786451, metadata !6, null, metadata !"btCompoundLeafCallback", i32 90, i64 512, i64 64, i32 0, i32 0, null, null, i32 0, null, null} ; [ DW_TAG_structure_type ] [btCompoundLeafCallback] [line 90, size 512, align 64, offset 0] [from ] !5 = metadata !{i32 786473, metadata !6} ; [ DW_TAG_file_type ] !6 = metadata !{metadata !"MultiSource/Benchmarks/Bullet/btCompoundCollisionAlgorithm.cpp", metadata !"MultiSource/Benchmarks/Bullet"} diff --git a/test/CodeGen/X86/2013-01-09-DAGCombineBug.ll b/test/CodeGen/X86/2013-01-09-DAGCombineBug.ll index db7ec8a..1b417e5 100644 --- a/test/CodeGen/X86/2013-01-09-DAGCombineBug.ll +++ b/test/CodeGen/X86/2013-01-09-DAGCombineBug.ll @@ -39,3 +39,36 @@ define void @t() nounwind uwtable ssp { ; <label>:11 ; preds = %11, %4 br label %11 } + +; PR15608 +@global = external constant [2 x i8] + +define void @PR15608() { +bb: + br label %bb3 + +bb1: ; No predecessors! + br i1 icmp ult (i64 xor (i64 zext (i1 trunc (i192 lshr (i192 or (i192 shl (i192 zext (i64 trunc (i128 lshr (i128 trunc (i384 lshr (i384 or (i384 shl (i384 zext (i64 ptrtoint ([2 x i8]* @global to i64) to i384), i384 192), i384 425269881901436522087161771558896140289), i384 128) to i128), i128 64) to i64) to i192), i192 64), i192 1), i192 128) to i1) to i64), i64 1), i64 1), label %bb2, label %bb3 + +bb2: ; preds = %bb1 + unreachable + +bb3: ; preds = %bb1, %bb + br i1 xor (i1 trunc (i192 lshr (i192 or (i192 shl (i192 zext (i64 trunc (i128 lshr (i128 trunc (i384 lshr (i384 or (i384 shl (i384 zext (i64 ptrtoint ([2 x i8]* @global to i64) to i384), i384 192), i384 425269881901436522087161771558896140289), i384 128) to i128), i128 64) to i64) to i192), i192 64), i192 1), i192 128) to i1), i1 trunc (i192 lshr (i192 or (i192 and (i192 or (i192 shl (i192 zext (i64 trunc (i128 lshr (i128 trunc (i384 lshr (i384 or (i384 shl (i384 zext (i64 ptrtoint ([2 x i8]* @global to i64) to i384), i384 192), i384 425269881901436522087161771558896140289), i384 128) to i128), i128 64) to i64) to i192), i192 64), i192 1), i192 -340282366920938463463374607431768211457), i192 shl (i192 zext (i1 trunc (i192 lshr (i192 or (i192 shl (i192 zext (i64 trunc (i128 lshr (i128 trunc (i384 lshr (i384 or (i384 shl (i384 zext (i64 ptrtoint ([2 x i8]* @global to i64) to i384), i384 192), i384 425269881901436522087161771558896140289), i384 128) to i128), i128 64) to i64) to i192), i192 64), i192 1), i192 128) to i1) to i192), i192 128)), i192 128) to i1)), label %bb7, label %bb4 + +bb4: ; preds = %bb6, %bb3 + %tmp = phi i1 [ true, %bb6 ], [ trunc (i192 lshr (i192 or (i192 and (i192 or (i192 shl (i192 zext (i64 trunc (i128 lshr (i128 trunc (i384 lshr (i384 or (i384 shl (i384 zext (i64 ptrtoint ([2 x i8]* @global to i64) to i384), i384 192), i384 425269881901436522087161771558896140289), i384 128) to i128), i128 64) to i64) to i192), i192 64), i192 1), i192 -340282366920938463463374607431768211457), i192 shl (i192 zext (i1 trunc (i192 lshr (i192 or (i192 shl (i192 zext (i64 trunc (i128 lshr (i128 trunc (i384 lshr (i384 or (i384 shl (i384 zext (i64 ptrtoint ([2 x i8]* @global to i64) to i384), i384 192), i384 425269881901436522087161771558896140289), i384 128) to i128), i128 64) to i64) to i192), i192 64), i192 1), i192 128) to i1) to i192), i192 128)), i192 128) to i1), %bb3 ] + br i1 false, label %bb8, label %bb5 + +bb5: ; preds = %bb4 + br i1 %tmp, label %bb8, label %bb6 + +bb6: ; preds = %bb5 + br i1 false, label %bb8, label %bb4 + +bb7: ; preds = %bb3 + unreachable + +bb8: ; preds = %bb6, %bb5, %bb4 + unreachable +} diff --git a/test/CodeGen/X86/2013-03-13-VEX-DestReg.ll b/test/CodeGen/X86/2013-03-13-VEX-DestReg.ll index 03b6bde..f0c7781 100644 --- a/test/CodeGen/X86/2013-03-13-VEX-DestReg.ll +++ b/test/CodeGen/X86/2013-03-13-VEX-DestReg.ll @@ -9,7 +9,7 @@ target triple = "x86_64-apple-macosx10.8.0" define void @main() #0 { entry: - %0 = load <8 x float>* bitcast ([8 x float]* @b to <8 x float>*), align 32, !tbaa !0 + %0 = load <8 x float>* bitcast ([8 x float]* @b to <8 x float>*), align 32 %bitcast.i = extractelement <8 x float> %0, i32 0 %vecinit.i.i = insertelement <4 x float> undef, float %bitcast.i, i32 0 %vecinit2.i.i = insertelement <4 x float> %vecinit.i.i, float 0.000000e+00, i32 1 @@ -17,7 +17,7 @@ entry: %vecinit4.i.i = insertelement <4 x float> %vecinit3.i.i, float 0.000000e+00, i32 3 %1 = tail call <4 x float> @llvm.x86.sse.rcp.ss(<4 x float> %vecinit4.i.i) #2 %vecext.i.i = extractelement <4 x float> %1, i32 0 - store float %vecext.i.i, float* getelementptr inbounds ([8 x float]* @e, i64 0, i64 0), align 16, !tbaa !0 + store float %vecext.i.i, float* getelementptr inbounds ([8 x float]* @e, i64 0, i64 0), align 16 unreachable } @@ -26,6 +26,3 @@ declare <4 x float> @llvm.x86.sse.rcp.ss(<4 x float>) #1 attributes #0 = { nounwind ssp uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { nounwind readnone } attributes #2 = { nounwind } - -!0 = metadata !{metadata !"omnipotent char", metadata !1} -!1 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/X86/GC/erlang-gc.ll b/test/CodeGen/X86/GC/erlang-gc.ll new file mode 100644 index 0000000..c55b7f6 --- /dev/null +++ b/test/CodeGen/X86/GC/erlang-gc.ll @@ -0,0 +1,25 @@ +; RUN: llc -mtriple=x86_64-linux-gnu < %s | FileCheck %s --check-prefix=CHECK64 +; RUN: llc -mtriple=i686-linux-gnu < %s | FileCheck %s --check-prefix=CHECK32 + +define i32 @main(i32 %x) nounwind gc "erlang" { + %puts = tail call i32 @foo(i32 %x) + ret i32 0 + +; CHECK64: .section .note.gc,"",@progbits +; CHECK64-NEXT: .align 8 +; CHECK64-NEXT: .short 1 # safe point count +; CHECK64-NEXT: .long .Ltmp0 # safe point address +; CHECK64-NEXT: .short 1 # stack frame size (in words) +; CHECK64-NEXT: .short 0 # stack arity +; CHECK64-NEXT: .short 0 # live root count + +; CHECK32: .section .note.gc,"",@progbits +; CHECK32-NEXT: .align 4 +; CHECK32-NEXT: .short 1 # safe point count +; CHECK32-NEXT: .long .Ltmp0 # safe point address +; CHECK32-NEXT: .short 3 # stack frame size (in words) +; CHECK32-NEXT: .short 0 # stack arity +; CHECK32-NEXT: .short 0 # live root count +} + +declare i32 @foo(i32) diff --git a/test/CodeGen/X86/MachineSink-DbgValue.ll b/test/CodeGen/X86/MachineSink-DbgValue.ll index cb5a9be..13a6444 100644 --- a/test/CodeGen/X86/MachineSink-DbgValue.ll +++ b/test/CodeGen/X86/MachineSink-DbgValue.ll @@ -27,8 +27,8 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !2, metadata !"Apple clang version 3.0 (tags/Apple/clang-211.10.1) (based on LLVM 3.0svn)", i1 true, metadata !"", i32 0, null, null, metadata !18, null, null} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 786478, i32 0, metadata !2, metadata !"foo", metadata !"foo", metadata !"", metadata !2, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32, i32*)* @foo, null, null, metadata !19, i32 0} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786449, metadata !20, i32 12, metadata !"Apple clang version 3.0 (tags/Apple/clang-211.10.1) (based on LLVM 3.0svn)", i1 true, metadata !"", i32 0, null, null, metadata !18, null, null, null} ; [ DW_TAG_compile_unit ] +!1 = metadata !{i32 786478, metadata !2, metadata !"foo", metadata !"foo", metadata !"", metadata !2, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32, i32*)* @foo, null, null, metadata !19, i32 0} ; [ DW_TAG_subprogram ] !2 = metadata !{i32 786473, metadata !20} ; [ DW_TAG_file_type ] !3 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !4 = metadata !{metadata !5} @@ -38,7 +38,7 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !8 = metadata !{i32 786447, metadata !0, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !9} ; [ DW_TAG_pointer_type ] !9 = metadata !{i32 786468, metadata !0, metadata !"char", null, i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ] !10 = metadata !{i32 786688, metadata !11, metadata !"a", metadata !2, i32 3, metadata !9, i32 0, null} ; [ DW_TAG_auto_variable ] -!11 = metadata !{i32 786443, metadata !1, i32 2, i32 25, metadata !2, i32 0} ; [ DW_TAG_lexical_block ] +!11 = metadata !{i32 786443, metadata !20, metadata !1, i32 2, i32 25, i32 0} ; [ DW_TAG_lexical_block ] !12 = metadata !{i32 2, i32 13, metadata !1, null} !13 = metadata !{i32 2, i32 22, metadata !1, null} !14 = metadata !{i32 3, i32 14, metadata !11, null} diff --git a/test/CodeGen/X86/MergeConsecutiveStores.ll b/test/CodeGen/X86/MergeConsecutiveStores.ll index fbe8879..bb227a0 100644 --- a/test/CodeGen/X86/MergeConsecutiveStores.ll +++ b/test/CodeGen/X86/MergeConsecutiveStores.ll @@ -337,3 +337,99 @@ block4: ; preds = %4, %.lr.ph ret void } +; Make sure that we merge the consecutive load/store sequence below and use a +; word (16 bit) instead of a byte copy. +; CHECK: MergeLoadStoreBaseIndexOffset +; CHECK: movw (%{{.*}},%{{.*}}), [[REG:%[a-z]+]] +; CHECK: movw [[REG]], (%{{.*}}) +define void @MergeLoadStoreBaseIndexOffset(i64* %a, i8* %b, i8* %c, i32 %n) { + br label %1 + +; <label>:1 + %.09 = phi i32 [ %n, %0 ], [ %11, %1 ] + %.08 = phi i8* [ %b, %0 ], [ %10, %1 ] + %.0 = phi i64* [ %a, %0 ], [ %2, %1 ] + %2 = getelementptr inbounds i64* %.0, i64 1 + %3 = load i64* %.0, align 1 + %4 = getelementptr inbounds i8* %c, i64 %3 + %5 = load i8* %4, align 1 + %6 = add i64 %3, 1 + %7 = getelementptr inbounds i8* %c, i64 %6 + %8 = load i8* %7, align 1 + store i8 %5, i8* %.08, align 1 + %9 = getelementptr inbounds i8* %.08, i64 1 + store i8 %8, i8* %9, align 1 + %10 = getelementptr inbounds i8* %.08, i64 2 + %11 = add nsw i32 %.09, -1 + %12 = icmp eq i32 %11, 0 + br i1 %12, label %13, label %1 + +; <label>:13 + ret void +} + +; Make sure that we merge the consecutive load/store sequence below and use a +; word (16 bit) instead of a byte copy even if there are intermediate sign +; extensions. +; CHECK: MergeLoadStoreBaseIndexOffsetSext +; CHECK: movw (%{{.*}},%{{.*}}), [[REG:%[a-z]+]] +; CHECK: movw [[REG]], (%{{.*}}) +define void @MergeLoadStoreBaseIndexOffsetSext(i8* %a, i8* %b, i8* %c, i32 %n) { + br label %1 + +; <label>:1 + %.09 = phi i32 [ %n, %0 ], [ %12, %1 ] + %.08 = phi i8* [ %b, %0 ], [ %11, %1 ] + %.0 = phi i8* [ %a, %0 ], [ %2, %1 ] + %2 = getelementptr inbounds i8* %.0, i64 1 + %3 = load i8* %.0, align 1 + %4 = sext i8 %3 to i64 + %5 = getelementptr inbounds i8* %c, i64 %4 + %6 = load i8* %5, align 1 + %7 = add i64 %4, 1 + %8 = getelementptr inbounds i8* %c, i64 %7 + %9 = load i8* %8, align 1 + store i8 %6, i8* %.08, align 1 + %10 = getelementptr inbounds i8* %.08, i64 1 + store i8 %9, i8* %10, align 1 + %11 = getelementptr inbounds i8* %.08, i64 2 + %12 = add nsw i32 %.09, -1 + %13 = icmp eq i32 %12, 0 + br i1 %13, label %14, label %1 + +; <label>:14 + ret void +} + +; However, we can only merge ignore sign extensions when they are on all memory +; computations; +; CHECK: loadStoreBaseIndexOffsetSextNoSex +; CHECK-NOT: movw (%{{.*}},%{{.*}}), [[REG:%[a-z]+]] +; CHECK-NOT: movw [[REG]], (%{{.*}}) +define void @loadStoreBaseIndexOffsetSextNoSex(i8* %a, i8* %b, i8* %c, i32 %n) { + br label %1 + +; <label>:1 + %.09 = phi i32 [ %n, %0 ], [ %12, %1 ] + %.08 = phi i8* [ %b, %0 ], [ %11, %1 ] + %.0 = phi i8* [ %a, %0 ], [ %2, %1 ] + %2 = getelementptr inbounds i8* %.0, i64 1 + %3 = load i8* %.0, align 1 + %4 = sext i8 %3 to i64 + %5 = getelementptr inbounds i8* %c, i64 %4 + %6 = load i8* %5, align 1 + %7 = add i8 %3, 1 + %wrap.4 = sext i8 %7 to i64 + %8 = getelementptr inbounds i8* %c, i64 %wrap.4 + %9 = load i8* %8, align 1 + store i8 %6, i8* %.08, align 1 + %10 = getelementptr inbounds i8* %.08, i64 1 + store i8 %9, i8* %10, align 1 + %11 = getelementptr inbounds i8* %.08, i64 2 + %12 = add nsw i32 %.09, -1 + %13 = icmp eq i32 %12, 0 + br i1 %13, label %14, label %1 + +; <label>:14 + ret void +} diff --git a/test/CodeGen/X86/add.ll b/test/CodeGen/X86/add.ll index 03d2e47..5fe08ed 100644 --- a/test/CodeGen/X86/add.ll +++ b/test/CodeGen/X86/add.ll @@ -119,8 +119,8 @@ entry: ; X64: test8: ; X64: addq -; X64-NEXT: sbbq -; X64-NEXT: testb +; X64-NEXT: setb +; X64: ret define i32 @test9(i32 %x, i32 %y) nounwind readnone { %cmp = icmp eq i32 %x, 10 diff --git a/test/CodeGen/X86/asm-invalid-register-class-crasher.ll b/test/CodeGen/X86/asm-invalid-register-class-crasher.ll new file mode 100644 index 0000000..24e2284 --- /dev/null +++ b/test/CodeGen/X86/asm-invalid-register-class-crasher.ll @@ -0,0 +1,9 @@ +; RUN: not llc < %s -mtriple=i386-apple-darwin 2>&1 %t + +; Previously, this would assert in an assert build, but crash in a release build. +; No FileCheck, just make sure we handle this gracefully. +define i64 @t1(i64* %p, i64 %val) #0 { +entry: + %0 = tail call i64 asm sideeffect "xaddq $0, $1", "=q,*m,0,~{memory},~{cc},~{dirflag},~{fpsr},~{flags}"(i64* %p, i64 %val) + ret i64 %0 +} diff --git a/test/CodeGen/X86/atom-call-reg-indirect-foldedreload32.ll b/test/CodeGen/X86/atom-call-reg-indirect-foldedreload32.ll new file mode 100644 index 0000000..6237b66 --- /dev/null +++ b/test/CodeGen/X86/atom-call-reg-indirect-foldedreload32.ll @@ -0,0 +1,74 @@ +; RUN: llc < %s -mtriple=i386-linux-gnu -mcpu=atom | \ +; RUN: FileCheck --check-prefix=ATOM %s +; RUN: llc < %s -mtriple=i386-linux-gnu -mcpu=core2 | \ +; RUN: FileCheck --check-prefix=CORE2 %s +; ATOM: calll *{{%[a-z]+}} +; CORE2: calll *funcp +; +; original source code built with clang -S -emit-llvm -M32 test32.c: +; +; int a, b, c, d, e, f, g, h, i, j; +; extern int (*funcp)(int, int, int, int, int, int, int, int); +; extern int sum; +; +; void func() +; { +; sum = 0; +; for( i = a; i < b; ++i ) +; { +; sum += (*funcp)(i, b, c, d, e, f, g, h); +; } +; } +; +@sum = external global i32 +@a = common global i32 0, align 4 +@i = common global i32 0, align 4 +@b = common global i32 0, align 4 +@funcp = external global i32 (i32, i32, i32, i32, i32, i32, i32, i32)* +@c = common global i32 0, align 4 +@d = common global i32 0, align 4 +@e = common global i32 0, align 4 +@f = common global i32 0, align 4 +@g = common global i32 0, align 4 +@h = common global i32 0, align 4 +@j = common global i32 0, align 4 + +define void @func() #0 { +entry: + store i32 0, i32* @sum, align 4 + %0 = load i32* @a, align 4 + store i32 %0, i32* @i, align 4 + br label %for.cond + +for.cond: ; preds = %for.inc, %entry + %1 = load i32* @i, align 4 + %2 = load i32* @b, align 4 + %cmp = icmp slt i32 %1, %2 + br i1 %cmp, label %for.body, label %for.end + +for.body: ; preds = %for.cond + %3 = load i32 (i32, i32, i32, i32, i32, i32, i32, i32)** @funcp, align 4 + %4 = load i32* @i, align 4 + %5 = load i32* @b, align 4 + %6 = load i32* @c, align 4 + %7 = load i32* @d, align 4 + %8 = load i32* @e, align 4 + %9 = load i32* @f, align 4 + %10 = load i32* @g, align 4 + %11 = load i32* @h, align 4 + %call = call i32 %3(i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9, i32 %10, i32 %11) + %12 = load i32* @sum, align 4 + %add = add nsw i32 %12, %call + store i32 %add, i32* @sum, align 4 + br label %for.inc + +for.inc: ; preds = %for.body + %13 = load i32* @i, align 4 + %inc = add nsw i32 %13, 1 + store i32 %inc, i32* @i, align 4 + br label %for.cond + +for.end: ; preds = %for.cond + ret void +} + diff --git a/test/CodeGen/X86/atom-call-reg-indirect-foldedreload64.ll b/test/CodeGen/X86/atom-call-reg-indirect-foldedreload64.ll new file mode 100644 index 0000000..a196d81 --- /dev/null +++ b/test/CodeGen/X86/atom-call-reg-indirect-foldedreload64.ll @@ -0,0 +1,89 @@ +; RUN: llc < %s -mtriple=x86_64-linux-gnu -mcpu=atom | \ +; RUN: FileCheck --check-prefix=ATOM %s +; RUN: llc < %s -mtriple=x86_64-linux-gnu -mcpu=core2 | \ +; RUN: FileCheck --check-prefix=CORE2 %s +; ATOM: callq *{{%[a-z]+[0-9]*}} +; CORE2: callq *funcp +; +; Original source code built with clang -S -emit-llvm -m64 test64.c: +; int a, b, c, d, e, f, g, h, i, j, k, l, m, n; +; extern int (*funcp)(int, int, int, int, int, int, +; int, int, int, int, int, int, +; int, int); +; extern int sum; +; +; void func() +; { +; sum = 0; +; for( i = a; i < b; ++i ) +; { +; sum += (*funcp)(a, i, i*2, i/b, c, d, e, f, g, h, j, k, l, n); +; } +; } +; + +@sum = external global i32 +@a = common global i32 0, align 4 +@i = common global i32 0, align 4 +@b = common global i32 0, align 4 +@funcp = external global i32 (i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)* +@c = common global i32 0, align 4 +@d = common global i32 0, align 4 +@e = common global i32 0, align 4 +@f = common global i32 0, align 4 +@g = common global i32 0, align 4 +@h = common global i32 0, align 4 +@j = common global i32 0, align 4 +@k = common global i32 0, align 4 +@l = common global i32 0, align 4 +@n = common global i32 0, align 4 +@m = common global i32 0, align 4 + +define void @func() #0 { +entry: + store i32 0, i32* @sum, align 4 + %0 = load i32* @a, align 4 + store i32 %0, i32* @i, align 4 + br label %for.cond + +for.cond: ; preds = %for.inc, %entry + %1 = load i32* @i, align 4 + %2 = load i32* @b, align 4 + %cmp = icmp slt i32 %1, %2 + br i1 %cmp, label %for.body, label %for.end + +for.body: ; preds = %for.cond + %3 = load i32 (i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)** @funcp, align 8 + %4 = load i32* @a, align 4 + %5 = load i32* @i, align 4 + %6 = load i32* @i, align 4 + %mul = mul nsw i32 %6, 2 + %7 = load i32* @i, align 4 + %8 = load i32* @b, align 4 + %div = sdiv i32 %7, %8 + %9 = load i32* @c, align 4 + %10 = load i32* @d, align 4 + %11 = load i32* @e, align 4 + %12 = load i32* @f, align 4 + %13 = load i32* @g, align 4 + %14 = load i32* @h, align 4 + %15 = load i32* @j, align 4 + %16 = load i32* @k, align 4 + %17 = load i32* @l, align 4 + %18 = load i32* @n, align 4 + %call = call i32 %3(i32 %4, i32 %5, i32 %mul, i32 %div, i32 %9, i32 %10, i32 %11, i32 %12, i32 %13, i32 %14, i32 %15, i32 %16, i32 %17, i32 %18) + %19 = load i32* @sum, align 4 + %add = add nsw i32 %19, %call + store i32 %add, i32* @sum, align 4 + br label %for.inc + +for.inc: ; preds = %for.body + %20 = load i32* @i, align 4 + %inc = add nsw i32 %20, 1 + store i32 %inc, i32* @i, align 4 + br label %for.cond + +for.end: ; preds = %for.cond + ret void +} + diff --git a/test/CodeGen/X86/atom-call-reg-indirect.ll b/test/CodeGen/X86/atom-call-reg-indirect.ll new file mode 100644 index 0000000..6327811 --- /dev/null +++ b/test/CodeGen/X86/atom-call-reg-indirect.ll @@ -0,0 +1,45 @@ +; RUN: llc < %s -mcpu=atom -mtriple=i686-linux | FileCheck -check-prefix=ATOM32 %s +; RUN: llc < %s -mcpu=core2 -mtriple=i686-linux | FileCheck -check-prefix=ATOM-NOT32 %s +; RUN: llc < %s -mcpu=atom -mtriple=x86_64-linux | FileCheck -check-prefix=ATOM64 %s +; RUN: llc < %s -mcpu=core2 -mtriple=x86_64-linux | FileCheck -check-prefix=ATOM-NOT64 %s + + +; fn_ptr.ll +%class.A = type { i32 (...)** } + +define i32 @test1() #0 { + ;ATOM: test1 +entry: + %call = tail call %class.A* @_Z3facv() + %0 = bitcast %class.A* %call to void (%class.A*)*** + %vtable = load void (%class.A*)*** %0, align 8 + %1 = load void (%class.A*)** %vtable, align 8 + ;ATOM32: movl (%ecx), %ecx + ;ATOM32: calll *%ecx + ;ATOM-NOT32: calll *(%ecx) + ;ATOM64: movq (%rcx), %rcx + ;ATOM64: callq *%rcx + ;ATOM-NOT64: callq *(%rcx) + tail call void %1(%class.A* %call) + ret i32 0 +} + +declare %class.A* @_Z3facv() #1 + +; virt_fn.ll +@p = external global void (i32)** + +define i32 @test2() #0 { + ;ATOM: test2 +entry: + %0 = load void (i32)*** @p, align 8 + %1 = load void (i32)** %0, align 8 + ;ATOM32: movl (%eax), %eax + ;ATOM32: calll *%eax + ;ATOM-NOT: calll *(%eax) + ;ATOM64: movq (%rax), %rax + ;ATOM64: callq *%rax + ;ATOM-NOT64: callq *(%rax) + tail call void %1(i32 2) + ret i32 0 +} diff --git a/test/CodeGen/X86/atom-fixup-lea1.ll b/test/CodeGen/X86/atom-fixup-lea1.ll new file mode 100644 index 0000000..4651bf2 --- /dev/null +++ b/test/CodeGen/X86/atom-fixup-lea1.ll @@ -0,0 +1,38 @@ +; RUN: llc < %s -mcpu=atom -mtriple=i686-linux | FileCheck %s +; CHECK: addl +; CHECK-NEXT:leal +; CHECK-NEXT:decl +; CHECK-NEXT:jne + +; Test for the FixupLEAs pre-emit pass. An LEA should be substituted for the ADD +; that increments the array pointer because it is within 5 instructions of the +; corresponding load. The ADD precedes the load by following the loop back edge. + +; Original C code +;int test(int n, int * array) +;{ +; int sum = 0; +; for(int i = 0; i < n; i++) +; sum += array[i]; +; return sum; +;} + +define i32 @test(i32 %n, i32* nocapture %array) { +entry: + %cmp4 = icmp sgt i32 %n, 0 + br i1 %cmp4, label %for.body, label %for.end + +for.body: + %i.06 = phi i32 [ %inc, %for.body ], [ 0, %entry ] + %sum.05 = phi i32 [ %add, %for.body ], [ 0, %entry ] + %arrayidx = getelementptr inbounds i32* %array, i32 %i.06 + %0 = load i32* %arrayidx, align 4 + %add = add nsw i32 %0, %sum.05 + %inc = add nsw i32 %i.06, 1 + %exitcond = icmp eq i32 %inc, %n + br i1 %exitcond, label %for.end, label %for.body + +for.end: + %sum.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.body ] + ret i32 %sum.0.lcssa +} diff --git a/test/CodeGen/X86/atom-fixup-lea2.ll b/test/CodeGen/X86/atom-fixup-lea2.ll new file mode 100644 index 0000000..1855ea1 --- /dev/null +++ b/test/CodeGen/X86/atom-fixup-lea2.ll @@ -0,0 +1,84 @@ +; RUN: llc < %s -mcpu=atom -mtriple=i686-linux | FileCheck %s +; CHECK:BB#5 +; CHECK-NEXT:leal +; CHECK-NEXT:leal +; CHECK-NEXT:leal +; CHECK-NEXT:movl + + +; Test for fixup lea pre-emit pass. LEA instructions should be substituted for +; ADD instructions which compute the address and index of the load because they +; precede the load within 5 instructions. An LEA should also be substituted for +; an ADD which computes part of the index because it precedes the index LEA +; within 5 instructions, this substitution is referred to as backwards chaining. + +; Original C Code +;struct node_t +;{ +; int k, m, n, p; +; int * array; +;}; + +;extern struct node_t getnode(); + +;int test() +;{ +; int sum = 0; +; struct node_t n = getnode(); +; if(n.array != 0 && n.p > 0 && n.k > 0 && n.n > 0 && n.m > 0) { +; sum = ((int*)((int)n.array + n.p) )[ n.k + n.m + n.n ]; +; } +; return sum; +;} + +%struct.node_t = type { i32, i32, i32, i32, i32* } + +define i32 @test() { +entry: + %n = alloca %struct.node_t, align 4 + call void bitcast (void (%struct.node_t*, ...)* @getnode to void (%struct.node_t*)*)(%struct.node_t* sret %n) + %array = getelementptr inbounds %struct.node_t* %n, i32 0, i32 4 + %0 = load i32** %array, align 4 + %cmp = icmp eq i32* %0, null + br i1 %cmp, label %if.end, label %land.lhs.true + +land.lhs.true: + %p = getelementptr inbounds %struct.node_t* %n, i32 0, i32 3 + %1 = load i32* %p, align 4 + %cmp1 = icmp sgt i32 %1, 0 + br i1 %cmp1, label %land.lhs.true2, label %if.end + +land.lhs.true2: + %k = getelementptr inbounds %struct.node_t* %n, i32 0, i32 0 + %2 = load i32* %k, align 4 + %cmp3 = icmp sgt i32 %2, 0 + br i1 %cmp3, label %land.lhs.true4, label %if.end + +land.lhs.true4: + %n5 = getelementptr inbounds %struct.node_t* %n, i32 0, i32 2 + %3 = load i32* %n5, align 4 + %cmp6 = icmp sgt i32 %3, 0 + br i1 %cmp6, label %land.lhs.true7, label %if.end + +land.lhs.true7: + %m = getelementptr inbounds %struct.node_t* %n, i32 0, i32 1 + %4 = load i32* %m, align 4 + %cmp8 = icmp sgt i32 %4, 0 + br i1 %cmp8, label %if.then, label %if.end + +if.then: + %add = add i32 %3, %2 + %add12 = add i32 %add, %4 + %5 = ptrtoint i32* %0 to i32 + %add15 = add nsw i32 %1, %5 + %6 = inttoptr i32 %add15 to i32* + %arrayidx = getelementptr inbounds i32* %6, i32 %add12 + %7 = load i32* %arrayidx, align 4 + br label %if.end + +if.end: + %sum.0 = phi i32 [ %7, %if.then ], [ 0, %land.lhs.true7 ], [ 0, %land.lhs.true4 ], [ 0, %land.lhs.true2 ], [ 0, %land.lhs.true ], [ 0, %entry ] + ret i32 %sum.0 +} + +declare void @getnode(%struct.node_t* sret, ...) diff --git a/test/CodeGen/X86/atom-fixup-lea3.ll b/test/CodeGen/X86/atom-fixup-lea3.ll new file mode 100644 index 0000000..311b0b3 --- /dev/null +++ b/test/CodeGen/X86/atom-fixup-lea3.ll @@ -0,0 +1,51 @@ +; RUN: llc < %s -mcpu=atom -mtriple=i686-linux | FileCheck %s +; CHECK: addl ([[reg:%[a-z]+]]) +; CHECK-NEXT: addl $4, [[reg]] + +; Test for the FixupLEAs pre-emit pass. +; An LEA should NOT be substituted for the ADD instruction +; that increments the array pointer if it is greater than 5 instructions +; away from the memory reference that uses it. + +; Original C code: clang -m32 -S -O2 +;int test(int n, int * array, int * m, int * array2) +;{ +; int i, j = 0; +; int sum = 0; +; for (i = 0, j = 0; i < n;) { +; ++i; +; *m += array2[j++]; +; sum += array[i]; +; } +; return sum; +;} + +define i32 @test(i32 %n, i32* nocapture %array, i32* nocapture %m, i32* nocapture %array2) #0 { +entry: + %cmp7 = icmp sgt i32 %n, 0 + br i1 %cmp7, label %for.body.lr.ph, label %for.end + +for.body.lr.ph: ; preds = %entry + %.pre = load i32* %m, align 4 + br label %for.body + +for.body: ; preds = %for.body, %for.body.lr.ph + %0 = phi i32 [ %.pre, %for.body.lr.ph ], [ %add, %for.body ] + %sum.010 = phi i32 [ 0, %for.body.lr.ph ], [ %add3, %for.body ] + %j.09 = phi i32 [ 0, %for.body.lr.ph ], [ %inc1, %for.body ] + %inc1 = add nsw i32 %j.09, 1 + %arrayidx = getelementptr inbounds i32* %array2, i32 %j.09 + %1 = load i32* %arrayidx, align 4 + %add = add nsw i32 %0, %1 + store i32 %add, i32* %m, align 4 + %arrayidx2 = getelementptr inbounds i32* %array, i32 %inc1 + %2 = load i32* %arrayidx2, align 4 + %add3 = add nsw i32 %2, %sum.010 + %exitcond = icmp eq i32 %inc1, %n + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + %sum.0.lcssa = phi i32 [ 0, %entry ], [ %add3, %for.body ] + ret i32 %sum.0.lcssa +} + diff --git a/test/CodeGen/X86/atomic-dagsched.ll b/test/CodeGen/X86/atomic-dagsched.ll index 0e7cf8c..05e630b 100644 --- a/test/CodeGen/X86/atomic-dagsched.ll +++ b/test/CodeGen/X86/atomic-dagsched.ll @@ -18,8 +18,8 @@ loop.cond: ; preds = %test.exit, %entry br i1 %3, label %return, label %loop loop: ; preds = %loop.cond - %4 = load i64* addrspace(256)* inttoptr (i64 264 to i64* addrspace(256)*), align 8, !tbaa !0 - %5 = load i64* %4, align 8, !tbaa !3 + %4 = load i64* addrspace(256)* inttoptr (i64 264 to i64* addrspace(256)*), align 8 + %5 = load i64* %4, align 8 %vector.size.i = ashr i64 %5, 3 %num.vector.wi.i = shl i64 %vector.size.i, 3 %6 = icmp eq i64 %vector.size.i, 0 @@ -65,8 +65,8 @@ scalarIf.i: ; preds = %vector_kernel_entry br i1 %18, label %test.exit, label %dim_0_pre_head.i dim_0_pre_head.i: ; preds = %scalarIf.i - %19 = load i64* addrspace(256)* inttoptr (i64 264 to i64* addrspace(256)*), align 8, !tbaa !0 - %20 = load i64* %19, align 8, !tbaa !3 + %19 = load i64* addrspace(256)* inttoptr (i64 264 to i64* addrspace(256)*), align 8 + %20 = load i64* %19, align 8 %21 = trunc i64 %20 to i32 %22 = mul i64 %vector.size.i, 8 br label %scalar_kernel_entry.i @@ -76,10 +76,10 @@ scalar_kernel_entry.i: ; preds = %scalar_kernel_entry %23 = bitcast i8* %asr.iv6 to i32 addrspace(1)* %24 = bitcast i8* %ptrtoarg4 to i32 addrspace(1)* %scevgep16 = getelementptr i32 addrspace(1)* %23, i64 %asr.iv12 - %25 = load i32 addrspace(1)* %scevgep16, align 4, !tbaa !4 + %25 = load i32 addrspace(1)* %scevgep16, align 4 %26 = atomicrmw min i32 addrspace(1)* %24, i32 %25 seq_cst %scevgep15 = getelementptr i32 addrspace(1)* %23, i64 %asr.iv12 - store i32 %21, i32 addrspace(1)* %scevgep15, align 4, !tbaa !4 + store i32 %21, i32 addrspace(1)* %scevgep15, align 4 %asr.iv.next13 = add i64 %asr.iv12, 1 %dim_0_cmp.to.max.i = icmp eq i64 %5, %asr.iv.next13 br i1 %dim_0_cmp.to.max.i, label %test.exit, label %scalar_kernel_entry.i @@ -97,12 +97,6 @@ return: ; preds = %loop.cond ret void } -!0 = metadata !{metadata !"any pointer", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} -!3 = metadata !{metadata !"long", metadata !1} -!4 = metadata !{metadata !"int", metadata !1} - ; CHECK: test ; CHECK: decq ; CHECK-NOT: cmpxchgl diff --git a/test/CodeGen/X86/atomic32.ll b/test/CodeGen/X86/atomic32.ll index 3ea96bf..3cb9ca1 100644 --- a/test/CodeGen/X86/atomic32.ll +++ b/test/CodeGen/X86/atomic32.ll @@ -2,8 +2,6 @@ ; RUN: llc < %s -O0 -march=x86 -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X32 ; RUN: llc < %s -O0 -march=x86 -mcpu=corei7 -mattr=-cmov -verify-machineinstrs | FileCheck %s --check-prefix NOCMOV -; XFAIL: cygwin,mingw32,win32 - @sc32 = external global i32 define void @atomic_fetch_add32() nounwind { diff --git a/test/CodeGen/X86/atomic64.ll b/test/CodeGen/X86/atomic64.ll index d362c31..aa00045 100644 --- a/test/CodeGen/X86/atomic64.ll +++ b/test/CodeGen/X86/atomic64.ll @@ -1,7 +1,5 @@ ; RUN: llc < %s -O0 -march=x86-64 -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X64 -; XFAIL: cygwin,mingw32,win32 - @sc64 = external global i64 define void @atomic_fetch_add64() nounwind { diff --git a/test/CodeGen/X86/avx-basic.ll b/test/CodeGen/X86/avx-basic.ll index 95854c7..64c4627 100644 --- a/test/CodeGen/X86/avx-basic.ll +++ b/test/CodeGen/X86/avx-basic.ll @@ -121,3 +121,13 @@ define <16 x i16> @build_vec_16x16(i16 %a) nounwind readonly { %res = insertelement <16 x i16> <i16 undef, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0, i16 0>, i16 %a, i32 0 ret <16 x i16> %res } + +;;; Check that VMOVPQIto64rr generates the assembly string "vmovd". Previously +;;; an incorrect mnemonic of "movd" was printed for this instruction. +; CHECK: VMOVPQIto64rr +; CHECK: vmovd +define i64 @VMOVPQIto64rr(<2 x i64> %a) { +entry: + %vecext.i = extractelement <2 x i64> %a, i32 0 + ret i64 %vecext.i +} diff --git a/test/CodeGen/X86/avx-brcond.ll b/test/CodeGen/X86/avx-brcond.ll new file mode 100644 index 0000000..d52ae52 --- /dev/null +++ b/test/CodeGen/X86/avx-brcond.ll @@ -0,0 +1,150 @@ +; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=corei7-avx -mattr=+avx | FileCheck %s + +declare i32 @llvm.x86.avx.ptestz.256(<4 x i64> %p1, <4 x i64> %p2) nounwind +declare i32 @llvm.x86.avx.ptestc.256(<4 x i64> %p1, <4 x i64> %p2) nounwind + +define <4 x float> @test1(<4 x i64> %a, <4 x float> %b) nounwind { +entry: +; CHECK: test1: +; CHECK: vptest +; CHECK-NEXT: jne +; CHECK: ret + + %res = call i32 @llvm.x86.avx.ptestz.256(<4 x i64> %a, <4 x i64> %a) nounwind + %one = icmp ne i32 %res, 0 + br i1 %one, label %bb1, label %bb2 + +bb1: + %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +bb2: + %d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +return: + %e = phi <4 x float> [%c, %bb1], [%d, %bb2] + ret <4 x float> %e +} + +define <4 x float> @test3(<4 x i64> %a, <4 x float> %b) nounwind { +entry: +; CHECK: test3: +; CHECK: vptest +; CHECK-NEXT: jne +; CHECK: ret + + %res = call i32 @llvm.x86.avx.ptestz.256(<4 x i64> %a, <4 x i64> %a) nounwind + %one = trunc i32 %res to i1 + br i1 %one, label %bb1, label %bb2 + +bb1: + %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +bb2: + %d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +return: + %e = phi <4 x float> [%c, %bb1], [%d, %bb2] + ret <4 x float> %e +} + +define <4 x float> @test4(<4 x i64> %a, <4 x float> %b) nounwind { +entry: +; CHECK: test4: +; CHECK: vptest +; CHECK-NEXT: jae +; CHECK: ret + + %res = call i32 @llvm.x86.avx.ptestc.256(<4 x i64> %a, <4 x i64> %a) nounwind + %one = icmp ne i32 %res, 0 + br i1 %one, label %bb1, label %bb2 + +bb1: + %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +bb2: + %d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +return: + %e = phi <4 x float> [%c, %bb1], [%d, %bb2] + ret <4 x float> %e +} + +define <4 x float> @test6(<4 x i64> %a, <4 x float> %b) nounwind { +entry: +; CHECK: test6: +; CHECK: vptest +; CHECK-NEXT: jae +; CHECK: ret + + %res = call i32 @llvm.x86.avx.ptestc.256(<4 x i64> %a, <4 x i64> %a) nounwind + %one = trunc i32 %res to i1 + br i1 %one, label %bb1, label %bb2 + +bb1: + %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +bb2: + %d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +return: + %e = phi <4 x float> [%c, %bb1], [%d, %bb2] + ret <4 x float> %e +} + +define <4 x float> @test7(<4 x i64> %a, <4 x float> %b) nounwind { +entry: +; CHECK: test7: +; CHECK: vptest +; CHECK-NEXT: jne +; CHECK: ret + + %res = call i32 @llvm.x86.avx.ptestz.256(<4 x i64> %a, <4 x i64> %a) nounwind + %one = icmp eq i32 %res, 1 + br i1 %one, label %bb1, label %bb2 + +bb1: + %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +bb2: + %d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +return: + %e = phi <4 x float> [%c, %bb1], [%d, %bb2] + ret <4 x float> %e +} + +define <4 x float> @test8(<4 x i64> %a, <4 x float> %b) nounwind { +entry: +; CHECK: test8: +; CHECK: vptest +; CHECK-NEXT: je +; CHECK: ret + + %res = call i32 @llvm.x86.avx.ptestz.256(<4 x i64> %a, <4 x i64> %a) nounwind + %one = icmp ne i32 %res, 1 + br i1 %one, label %bb1, label %bb2 + +bb1: + %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +bb2: + %d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +return: + %e = phi <4 x float> [%c, %bb1], [%d, %bb2] + ret <4 x float> %e +} + + diff --git a/test/CodeGen/X86/avx-cvt.ll b/test/CodeGen/X86/avx-cvt.ll index 62bdea2..22fad7c 100644 --- a/test/CodeGen/X86/avx-cvt.ll +++ b/test/CodeGen/X86/avx-cvt.ll @@ -18,6 +18,12 @@ define <4 x double> @sitofp01(<4 x i32> %a) { ret <4 x double> %b } +; CHECK: vcvtdq2ps %ymm +define <8 x float> @sitofp02(<8 x i16> %a) { + %b = sitofp <8 x i16> %a to <8 x float> + ret <8 x float> %b +} + ; CHECK: vcvttpd2dqy %ymm define <4 x i32> @fptosi01(<4 x double> %a) { %b = fptosi <4 x double> %a to <4 x i32> diff --git a/test/CodeGen/X86/avx-fp2int.ll b/test/CodeGen/X86/avx-fp2int.ll index a3aadde..a3aadde 100755..100644 --- a/test/CodeGen/X86/avx-fp2int.ll +++ b/test/CodeGen/X86/avx-fp2int.ll diff --git a/test/CodeGen/X86/avx-load-store.ll b/test/CodeGen/X86/avx-load-store.ll index 432852d..a6775ab 100644 --- a/test/CodeGen/X86/avx-load-store.ll +++ b/test/CodeGen/X86/avx-load-store.ll @@ -81,7 +81,7 @@ define void @storev32i8_01(<32 x i8> %a) nounwind { ; CHECK: _double_save ; CHECK-NOT: vinsertf128 $1 ; CHECK-NOT: vinsertf128 $0 -; CHECK: vmovups %xmm +; CHECK: vmovaps %xmm ; CHECK: vmovaps %xmm define void @double_save(<4 x i32> %A, <4 x i32> %B, <8 x i32>* %P) nounwind ssp { entry: @@ -114,3 +114,38 @@ cif_mixed_test_any_check: ; preds = %cif_mask_mixed unreachable } +; CHECK: add8i32 +; CHECK: vmovups +; CHECK: vmovups +; CHECK-NOT: vinsertf128 +; CHECK-NOT: vextractf128 +; CHECK: vmovups +; CHECK: vmovups +define void @add8i32(<8 x i32>* %ret, <8 x i32>* %bp) nounwind { + %b = load <8 x i32>* %bp, align 1 + %x = add <8 x i32> zeroinitializer, %b + store <8 x i32> %x, <8 x i32>* %ret, align 1 + ret void +} + +; CHECK: add4i64a64 +; CHECK: vmovaps ({{.*}}), %ymm{{.*}} +; CHECK: vmovaps %ymm{{.*}}, ({{.*}}) +define void @add4i64a64(<4 x i64>* %ret, <4 x i64>* %bp) nounwind { + %b = load <4 x i64>* %bp, align 64 + %x = add <4 x i64> zeroinitializer, %b + store <4 x i64> %x, <4 x i64>* %ret, align 64 + ret void +} + +; CHECK: add4i64a16 +; CHECK: vmovaps {{.*}}({{.*}}), %xmm{{.*}} +; CHECK: vmovaps {{.*}}({{.*}}), %xmm{{.*}} +; CHECK: vmovaps %xmm{{.*}}, {{.*}}({{.*}}) +; CHECK: vmovaps %xmm{{.*}}, {{.*}}({{.*}}) +define void @add4i64a16(<4 x i64>* %ret, <4 x i64>* %bp) nounwind { + %b = load <4 x i64>* %bp, align 16 + %x = add <4 x i64> zeroinitializer, %b + store <4 x i64> %x, <4 x i64>* %ret, align 16 + ret void +} diff --git a/test/CodeGen/X86/avx-sext.ll b/test/CodeGen/X86/avx-sext.ll index 7ae0d36..b9c7000 100755..100644 --- a/test/CodeGen/X86/avx-sext.ll +++ b/test/CodeGen/X86/avx-sext.ll @@ -165,3 +165,24 @@ define <4 x i64> @sext_4i8_to_4i64(<4 x i8> %mask) { ret <4 x i64> %extmask } +; AVX: sext_4i8_to_4i64 +; AVX: vpmovsxbd +; AVX: vpmovsxdq +; AVX: vpmovsxdq +; AVX: ret +define <4 x i64> @load_sext_4i8_to_4i64(<4 x i8> *%ptr) { + %X = load <4 x i8>* %ptr + %Y = sext <4 x i8> %X to <4 x i64> + ret <4 x i64>%Y +} + +; AVX: sext_4i16_to_4i64 +; AVX: vpmovsxwd +; AVX: vpmovsxdq +; AVX: vpmovsxdq +; AVX: ret +define <4 x i64> @load_sext_4i16_to_4i64(<4 x i16> *%ptr) { + %X = load <4 x i16>* %ptr + %Y = sext <4 x i16> %X to <4 x i64> + ret <4 x i64>%Y +} diff --git a/test/CodeGen/X86/avx-shuffle-x86_32.ll b/test/CodeGen/X86/avx-shuffle-x86_32.ll index e203c4e..e203c4e 100755..100644 --- a/test/CodeGen/X86/avx-shuffle-x86_32.ll +++ b/test/CodeGen/X86/avx-shuffle-x86_32.ll diff --git a/test/CodeGen/X86/avx-trunc.ll b/test/CodeGen/X86/avx-trunc.ll index d007736..d007736 100755..100644 --- a/test/CodeGen/X86/avx-trunc.ll +++ b/test/CodeGen/X86/avx-trunc.ll diff --git a/test/CodeGen/X86/avx-win64-args.ll b/test/CodeGen/X86/avx-win64-args.ll index 85b2634..85b2634 100755..100644 --- a/test/CodeGen/X86/avx-win64-args.ll +++ b/test/CodeGen/X86/avx-win64-args.ll diff --git a/test/CodeGen/X86/avx-zext.ll b/test/CodeGen/X86/avx-zext.ll index 582537e..582537e 100755..100644 --- a/test/CodeGen/X86/avx-zext.ll +++ b/test/CodeGen/X86/avx-zext.ll diff --git a/test/CodeGen/X86/avx2-conversions.ll b/test/CodeGen/X86/avx2-conversions.ll index 3ce08dc..3ce08dc 100755..100644 --- a/test/CodeGen/X86/avx2-conversions.ll +++ b/test/CodeGen/X86/avx2-conversions.ll diff --git a/test/CodeGen/X86/avx2-vperm.ll b/test/CodeGen/X86/avx2-vperm.ll index d576d0e..d576d0e 100755..100644 --- a/test/CodeGen/X86/avx2-vperm.ll +++ b/test/CodeGen/X86/avx2-vperm.ll diff --git a/test/CodeGen/X86/block-placement.ll b/test/CodeGen/X86/block-placement.ll index 5534712..271fb42 100644 --- a/test/CodeGen/X86/block-placement.ll +++ b/test/CodeGen/X86/block-placement.ll @@ -524,7 +524,7 @@ entry: br i1 %cond, label %entry.if.then_crit_edge, label %lor.lhs.false, !prof !1 entry.if.then_crit_edge: - %.pre14 = load i8* undef, align 1, !tbaa !0 + %.pre14 = load i8* undef, align 1 br label %if.then lor.lhs.false: @@ -537,7 +537,7 @@ exit: if.then: %0 = phi i8 [ %.pre14, %entry.if.then_crit_edge ], [ undef, %exit ] %1 = and i8 %0, 1 - store i8 %1, i8* undef, align 4, !tbaa !0 + store i8 %1, i8* undef, align 4 br label %if.end if.end: diff --git a/test/CodeGen/X86/bool-simplify.ll b/test/CodeGen/X86/bool-simplify.ll index 09eb5d1..fa6f6e8 100644 --- a/test/CodeGen/X86/bool-simplify.ll +++ b/test/CodeGen/X86/bool-simplify.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -mattr=+sse41,-avx,+rdrand | FileCheck %s +; RUN: llc < %s -march=x86-64 -mattr=+sse41,-avx,+rdrand,+rdseed | FileCheck %s define i32 @foo(<2 x i64> %c, i32 %a, i32 %b) { %t1 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %c, <2 x i64> %c) @@ -39,7 +39,22 @@ define i32 @bax(<2 x i64> %c) { ; CHECK: ret } -define i32 @rnd(i32 %arg) nounwind uwtable { +define i16 @rnd16(i16 %arg) nounwind uwtable { + %1 = tail call { i16, i32 } @llvm.x86.rdrand.16() nounwind + %2 = extractvalue { i16, i32 } %1, 0 + %3 = extractvalue { i16, i32 } %1, 1 + %4 = icmp eq i32 %3, 0 + %5 = select i1 %4, i16 0, i16 %arg + %6 = add i16 %5, %2 + ret i16 %6 +; CHECK: rnd16 +; CHECK: rdrand +; CHECK: cmov +; CHECK-NOT: cmov +; CHECK: ret +} + +define i32 @rnd32(i32 %arg) nounwind uwtable { %1 = tail call { i32, i32 } @llvm.x86.rdrand.32() nounwind %2 = extractvalue { i32, i32 } %1, 0 %3 = extractvalue { i32, i32 } %1, 1 @@ -47,12 +62,77 @@ define i32 @rnd(i32 %arg) nounwind uwtable { %5 = select i1 %4, i32 0, i32 %arg %6 = add i32 %5, %2 ret i32 %6 -; CHECK: rnd +; CHECK: rnd32 ; CHECK: rdrand ; CHECK: cmov ; CHECK-NOT: cmov ; CHECK: ret } +define i64 @rnd64(i64 %arg) nounwind uwtable { + %1 = tail call { i64, i32 } @llvm.x86.rdrand.64() nounwind + %2 = extractvalue { i64, i32 } %1, 0 + %3 = extractvalue { i64, i32 } %1, 1 + %4 = icmp eq i32 %3, 0 + %5 = select i1 %4, i64 0, i64 %arg + %6 = add i64 %5, %2 + ret i64 %6 +; CHECK: rnd64 +; CHECK: rdrand +; CHECK: cmov +; CHECK-NOT: cmov +; CHECK: ret +} + +define i16 @seed16(i16 %arg) nounwind uwtable { + %1 = tail call { i16, i32 } @llvm.x86.rdseed.16() nounwind + %2 = extractvalue { i16, i32 } %1, 0 + %3 = extractvalue { i16, i32 } %1, 1 + %4 = icmp eq i32 %3, 0 + %5 = select i1 %4, i16 0, i16 %arg + %6 = add i16 %5, %2 + ret i16 %6 +; CHECK: seed16 +; CHECK: rdseed +; CHECK: cmov +; CHECK-NOT: cmov +; CHECK: ret +} + +define i32 @seed32(i32 %arg) nounwind uwtable { + %1 = tail call { i32, i32 } @llvm.x86.rdseed.32() nounwind + %2 = extractvalue { i32, i32 } %1, 0 + %3 = extractvalue { i32, i32 } %1, 1 + %4 = icmp eq i32 %3, 0 + %5 = select i1 %4, i32 0, i32 %arg + %6 = add i32 %5, %2 + ret i32 %6 +; CHECK: seed32 +; CHECK: rdseed +; CHECK: cmov +; CHECK-NOT: cmov +; CHECK: ret +} + +define i64 @seed64(i64 %arg) nounwind uwtable { + %1 = tail call { i64, i32 } @llvm.x86.rdseed.64() nounwind + %2 = extractvalue { i64, i32 } %1, 0 + %3 = extractvalue { i64, i32 } %1, 1 + %4 = icmp eq i32 %3, 0 + %5 = select i1 %4, i64 0, i64 %arg + %6 = add i64 %5, %2 + ret i64 %6 +; CHECK: seed64 +; CHECK: rdseed +; CHECK: cmov +; CHECK-NOT: cmov +; CHECK: ret +} + declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone +declare { i16, i32 } @llvm.x86.rdrand.16() nounwind declare { i32, i32 } @llvm.x86.rdrand.32() nounwind +declare { i64, i32 } @llvm.x86.rdrand.64() nounwind +declare { i16, i32 } @llvm.x86.rdseed.16() nounwind +declare { i32, i32 } @llvm.x86.rdseed.32() nounwind +declare { i64, i32 } @llvm.x86.rdseed.64() nounwind diff --git a/test/CodeGen/X86/brcond.ll b/test/CodeGen/X86/brcond.ll index 44670c8..bc4032b 100644 --- a/test/CodeGen/X86/brcond.ll +++ b/test/CodeGen/X86/brcond.ll @@ -108,3 +108,150 @@ bb2: ; preds = %entry, %bb1 ret float %.0 } +declare i32 @llvm.x86.sse41.ptestz(<4 x float> %p1, <4 x float> %p2) nounwind +declare i32 @llvm.x86.sse41.ptestc(<4 x float> %p1, <4 x float> %p2) nounwind + +define <4 x float> @test5(<4 x float> %a, <4 x float> %b) nounwind { +entry: +; CHECK: test5: +; CHECK: ptest +; CHECK-NEXT: jne +; CHECK: ret + + %res = call i32 @llvm.x86.sse41.ptestz(<4 x float> %a, <4 x float> %a) nounwind + %one = icmp ne i32 %res, 0 + br i1 %one, label %bb1, label %bb2 + +bb1: + %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +bb2: + %d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +return: + %e = phi <4 x float> [%c, %bb1], [%d, %bb2] + ret <4 x float> %e +} + +define <4 x float> @test7(<4 x float> %a, <4 x float> %b) nounwind { +entry: +; CHECK: test7: +; CHECK: ptest +; CHECK-NEXT: jne +; CHECK: ret + + %res = call i32 @llvm.x86.sse41.ptestz(<4 x float> %a, <4 x float> %a) nounwind + %one = trunc i32 %res to i1 + br i1 %one, label %bb1, label %bb2 + +bb1: + %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +bb2: + %d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +return: + %e = phi <4 x float> [%c, %bb1], [%d, %bb2] + ret <4 x float> %e +} + +define <4 x float> @test8(<4 x float> %a, <4 x float> %b) nounwind { +entry: +; CHECK: test8: +; CHECK: ptest +; CHECK-NEXT: jae +; CHECK: ret + + %res = call i32 @llvm.x86.sse41.ptestc(<4 x float> %a, <4 x float> %a) nounwind + %one = icmp ne i32 %res, 0 + br i1 %one, label %bb1, label %bb2 + +bb1: + %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +bb2: + %d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +return: + %e = phi <4 x float> [%c, %bb1], [%d, %bb2] + ret <4 x float> %e +} + +define <4 x float> @test10(<4 x float> %a, <4 x float> %b) nounwind { +entry: +; CHECK: test10: +; CHECK: ptest +; CHECK-NEXT: jae +; CHECK: ret + + %res = call i32 @llvm.x86.sse41.ptestc(<4 x float> %a, <4 x float> %a) nounwind + %one = trunc i32 %res to i1 + br i1 %one, label %bb1, label %bb2 + +bb1: + %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +bb2: + %d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +return: + %e = phi <4 x float> [%c, %bb1], [%d, %bb2] + ret <4 x float> %e +} + +define <4 x float> @test11(<4 x float> %a, <4 x float> %b) nounwind { +entry: +; CHECK: test11: +; CHECK: ptest +; CHECK-NEXT: jne +; CHECK: ret + + %res = call i32 @llvm.x86.sse41.ptestz(<4 x float> %a, <4 x float> %a) nounwind + %one = icmp eq i32 %res, 1 + br i1 %one, label %bb1, label %bb2 + +bb1: + %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +bb2: + %d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +return: + %e = phi <4 x float> [%c, %bb1], [%d, %bb2] + ret <4 x float> %e +} + +define <4 x float> @test12(<4 x float> %a, <4 x float> %b) nounwind { +entry: +; CHECK: test12: +; CHECK: ptest +; CHECK-NEXT: je +; CHECK: ret + + %res = call i32 @llvm.x86.sse41.ptestz(<4 x float> %a, <4 x float> %a) nounwind + %one = icmp ne i32 %res, 1 + br i1 %one, label %bb1, label %bb2 + +bb1: + %c = fadd <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +bb2: + %d = fdiv <4 x float> %b, < float 1.000000e+002, float 2.000000e+002, float 3.000000e+002, float 4.000000e+002 > + br label %return + +return: + %e = phi <4 x float> [%c, %bb1], [%d, %bb2] + ret <4 x float> %e +} + diff --git a/test/CodeGen/X86/bswap-inline-asm.ll b/test/CodeGen/X86/bswap-inline-asm.ll index 3bb9124..d69bfa6 100644 --- a/test/CodeGen/X86/bswap-inline-asm.ll +++ b/test/CodeGen/X86/bswap-inline-asm.ll @@ -1,6 +1,7 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin > %t -; RUN: not grep InlineAsm %t -; RUN: FileCheck %s < %t +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck -check-prefix CHK %s +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s + +; CHK-NOT: InlineAsm ; CHECK: foo: ; CHECK: bswapq diff --git a/test/CodeGen/X86/call-imm.ll b/test/CodeGen/X86/call-imm.ll index 38cda4d..8753594 100644 --- a/test/CodeGen/X86/call-imm.ll +++ b/test/CodeGen/X86/call-imm.ll @@ -1,11 +1,11 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=static | grep "call.*12345678" -; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic | not grep "call.*12345678" -; RUN: llc < %s -mtriple=i386-pc-linux -relocation-model=dynamic-no-pic | grep "call.*12345678" +; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=static | FileCheck -check-prefix X86STA %s +; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic | FileCheck -check-prefix X86PIC %s +; RUN: llc < %s -mtriple=i386-pc-linux -relocation-model=dynamic-no-pic | FileCheck -check-prefix X86DYN %s ; Call to immediate is not safe on x86-64 unless we *know* that the ; call will be within 32-bits pcrel from the dest immediate. -; RUN: llc < %s -march=x86-64 | grep "call.*\*%rax" +; RUN: llc < %s -march=x86-64 | FileCheck -check-prefix X64 %s ; PR3666 ; PR3773 @@ -16,3 +16,8 @@ entry: %0 = call i32 inttoptr (i32 12345678 to i32 (i32)*)(i32 0) nounwind ; <i32> [#uses=1] ret i32 %0 } + +; X86STA: {{call.*12345678}} +; X86PIC-NOT: {{call.*12345678}} +; X86DYN: {{call.*12345678}} +; X64: {{call.*[*]%rax}} diff --git a/test/CodeGen/X86/coalescer-identity.ll b/test/CodeGen/X86/coalescer-identity.ll index 9c72ee6..1aac095 100644 --- a/test/CodeGen/X86/coalescer-identity.ll +++ b/test/CodeGen/X86/coalescer-identity.ll @@ -12,10 +12,10 @@ target triple = "x86_64-apple-macosx10.8.0" define void @func() nounwind uwtable ssp { for.body.lr.ph: - %0 = load i32* @g2, align 4, !tbaa !0 + %0 = load i32* @g2, align 4 %tobool6 = icmp eq i32 %0, 0 %s.promoted = load i16* @s, align 2 - %.pre = load i32* @g1, align 4, !tbaa !0 + %.pre = load i32* @g1, align 4 br i1 %tobool6, label %for.body.us, label %for.body for.body.us: ; preds = %for.body.lr.ph, %for.inc.us @@ -43,11 +43,11 @@ for.inc.us: ; preds = %cond.end.us, %for.b cond.end.us: ; preds = %if.then7.us, %cond.false.us %4 = phi i32 [ 0, %cond.false.us ], [ %1, %if.then7.us ] %cond.us = phi i32 [ 0, %cond.false.us ], [ %v.010.us, %if.then7.us ] - store i32 %cond.us, i32* @g0, align 4, !tbaa !0 + store i32 %cond.us, i32* @g0, align 4 br label %for.inc.us cond.false.us: ; preds = %if.then7.us - store i32 0, i32* @g1, align 4, !tbaa !0 + store i32 0, i32* @g1, align 4 br label %cond.end.us if.then7.us: ; preds = %for.body.us @@ -76,7 +76,3 @@ for.end: ; preds = %for.inc.us, %for.bo store i16 %dec12.lcssa, i16* @s, align 2 ret void } - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/X86/code_placement_align_all.ll b/test/CodeGen/X86/code_placement_align_all.ll new file mode 100644 index 0000000..1e5e8f7 --- /dev/null +++ b/test/CodeGen/X86/code_placement_align_all.ll @@ -0,0 +1,22 @@ +; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -align-all-blocks=16 < %s | FileCheck %s + +;CHECK: foo +;CHECK: .align 65536, 0x90 +;CHECK: .align 65536, 0x90 +;CHECK: .align 65536, 0x90 +;CHECK: ret +define i32 @foo(i32 %t, i32 %l) nounwind readnone ssp uwtable { + %1 = icmp eq i32 %t, 0 + br i1 %1, label %4, label %2 + +; <label>:2 ; preds = %0 + %3 = add nsw i32 %t, 2 + ret i32 %3 + +; <label>:4 ; preds = %0 + %5 = icmp eq i32 %l, 0 + %. = select i1 %5, i32 0, i32 5 + ret i32 %. +} + + diff --git a/test/CodeGen/X86/commute-intrinsic.ll b/test/CodeGen/X86/commute-intrinsic.ll index d810cb1..7d5ca47 100644 --- a/test/CodeGen/X86/commute-intrinsic.ll +++ b/test/CodeGen/X86/commute-intrinsic.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -relocation-model=static | not grep movaps +; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -relocation-model=static | FileCheck %s + +; CHECK-NOT: movaps @a = external global <2 x i64> ; <<2 x i64>*> [#uses=1] diff --git a/test/CodeGen/X86/compiler_used.ll b/test/CodeGen/X86/compiler_used.ll index be8de5e..d38ce91 100644 --- a/test/CodeGen/X86/compiler_used.ll +++ b/test/CodeGen/X86/compiler_used.ll @@ -1,5 +1,4 @@ -; RUN: llc < %s -mtriple=i386-apple-darwin9 | grep no_dead_strip | count 1 -; We should have a .no_dead_strip directive for Z but not for X/Y. +; RUN: llc < %s -mtriple=i386-apple-darwin9 | FileCheck %s @X = internal global i8 4 @Y = internal global i32 123 @@ -7,3 +6,7 @@ @llvm.used = appending global [1 x i8*] [ i8* @Z ], section "llvm.metadata" @llvm.compiler_used = appending global [2 x i8*] [ i8* @X, i8* bitcast (i32* @Y to i8*)], section "llvm.metadata" + +; CHECK-NOT: .no_dead_strip +; CHECK: .no_dead_strip _Z +; CHECK-NOT: .no_dead_strip diff --git a/test/CodeGen/X86/complex-fca.ll b/test/CodeGen/X86/complex-fca.ll index 7e7acaa..8ad38a4 100644 --- a/test/CodeGen/X86/complex-fca.ll +++ b/test/CodeGen/X86/complex-fca.ll @@ -1,5 +1,8 @@ ; RUN: llc < %s -march=x86 | grep mov | count 2 +; Skip this on Windows as there is no ccosl and sret behaves differently. +; XFAIL: pc-win32 + define void @ccosl({ x86_fp80, x86_fp80 }* noalias sret %agg.result, { x86_fp80, x86_fp80 } %z) nounwind { entry: %z8 = extractvalue { x86_fp80, x86_fp80 } %z, 0 diff --git a/test/CodeGen/X86/crash.ll b/test/CodeGen/X86/crash.ll index 6d21962..852b642 100644 --- a/test/CodeGen/X86/crash.ll +++ b/test/CodeGen/X86/crash.ll @@ -238,7 +238,7 @@ declare i64 @llvm.objectsize.i64(i8*, i1) nounwind readnone define void @_ZNK4llvm17MipsFrameLowering12emitPrologueERNS_15MachineFunctionE() ssp align 2 { bb: - %tmp = load %t9** undef, align 4, !tbaa !0 + %tmp = load %t9** undef, align 4 %tmp2 = getelementptr inbounds %t9* %tmp, i32 0, i32 0 %tmp3 = getelementptr inbounds %t9* %tmp, i32 0, i32 0, i32 0, i32 0, i32 1 br label %bb4 diff --git a/test/CodeGen/X86/dagcombine_unsafe_math.ll b/test/CodeGen/X86/dagcombine_unsafe_math.ll index a3221de..592cf1b 100644 --- a/test/CodeGen/X86/dagcombine_unsafe_math.ll +++ b/test/CodeGen/X86/dagcombine_unsafe_math.ll @@ -40,3 +40,17 @@ define float @test4(float %x, float %y) { ; CHECK: test4 ; CHECK: vaddss } + +; rdar://13445387 +; "x + x + x => 3.0 * x" should be disabled after legalization because +; Instruction-Selection dosen't know how to handle "3.0" +; +define float @test5() { + %mul.i.i151 = fmul <4 x float> zeroinitializer, zeroinitializer + %vecext.i8.i152 = extractelement <4 x float> %mul.i.i151, i32 1 + %vecext1.i9.i153 = extractelement <4 x float> %mul.i.i151, i32 0 + %add.i10.i154 = fadd float %vecext1.i9.i153, %vecext.i8.i152 + %vecext.i7.i155 = extractelement <4 x float> %mul.i.i151, i32 2 + %add.i.i156 = fadd float %vecext.i7.i155, %add.i10.i154 + ret float %add.i.i156 +} diff --git a/test/CodeGen/X86/dbg-byval-parameter.ll b/test/CodeGen/X86/dbg-byval-parameter.ll index 859bc94..719a526 100644 --- a/test/CodeGen/X86/dbg-byval-parameter.ll +++ b/test/CodeGen/X86/dbg-byval-parameter.ll @@ -28,22 +28,22 @@ declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!3} !0 = metadata !{i32 786689, metadata !1, metadata !"my_r0", metadata !2, i32 11, metadata !7, i32 0, null} ; [ DW_TAG_arg_variable ] -!1 = metadata !{i32 786478, i32 0, metadata !2, metadata !"foo", metadata !"foo", metadata !"foo", metadata !2, i32 11, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, double (%struct.Rect*)* @foo, null, null, null, i32 0} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 786478, metadata !2, metadata !"foo", metadata !"foo", metadata !"foo", metadata !2, i32 11, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, double (%struct.Rect*)* @foo, null, null, null, i32 0} ; [ DW_TAG_subprogram ] !2 = metadata !{i32 786473, metadata !19} ; [ DW_TAG_file_type ] -!3 = metadata !{i32 786449, i32 0, i32 1, metadata !2, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 false, metadata !"", i32 0, null, null, metadata !18, null, metadata !""} ; [ DW_TAG_compile_unit ] -!4 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null} ; [ DW_TAG_subroutine_type ] +!3 = metadata !{i32 786449, i32 1, metadata !2, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 false, metadata !"", i32 0, null, null, metadata !18, null, null, metadata !""} ; [ DW_TAG_compile_unit ] +!4 = metadata !{i32 786453, metadata !19, metadata !2, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null} ; [ DW_TAG_subroutine_type ] !5 = metadata !{metadata !6, metadata !7} -!6 = metadata !{i32 786468, metadata !2, metadata !"double", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!7 = metadata !{i32 786451, metadata !2, metadata !"Rect", metadata !2, i32 6, i64 256, i64 64, i64 0, i32 0, null, metadata !8, i32 0, null} ; [ DW_TAG_structure_type ] +!6 = metadata !{i32 786468, metadata !19, metadata !2, metadata !"double", i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] +!7 = metadata !{i32 786451, metadata !19, metadata !2, metadata !"Rect", i32 6, i64 256, i64 64, i64 0, i32 0, null, metadata !8, i32 0, null} ; [ DW_TAG_structure_type ] !8 = metadata !{metadata !9, metadata !14} -!9 = metadata !{i32 786445, metadata !7, metadata !"P1", metadata !2, i32 7, i64 128, i64 64, i64 0, i32 0, metadata !10} ; [ DW_TAG_member ] -!10 = metadata !{i32 786451, metadata !2, metadata !"Pt", metadata !2, i32 1, i64 128, i64 64, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_structure_type ] +!9 = metadata !{i32 786445, metadata !19, metadata !7, metadata !"P1", i32 7, i64 128, i64 64, i64 0, i32 0, metadata !10} ; [ DW_TAG_member ] +!10 = metadata !{i32 786451, metadata !19, metadata !2, metadata !"Pt", i32 1, i64 128, i64 64, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_structure_type ] !11 = metadata !{metadata !12, metadata !13} -!12 = metadata !{i32 786445, metadata !10, metadata !"x", metadata !2, i32 2, i64 64, i64 64, i64 0, i32 0, metadata !6} ; [ DW_TAG_member ] -!13 = metadata !{i32 786445, metadata !10, metadata !"y", metadata !2, i32 3, i64 64, i64 64, i64 64, i32 0, metadata !6} ; [ DW_TAG_member ] -!14 = metadata !{i32 786445, metadata !7, metadata !"P2", metadata !2, i32 8, i64 128, i64 64, i64 128, i32 0, metadata !10} ; [ DW_TAG_member ] +!12 = metadata !{i32 786445, metadata !19, metadata !10, metadata !"x", i32 2, i64 64, i64 64, i64 0, i32 0, metadata !6} ; [ DW_TAG_member ] +!13 = metadata !{i32 786445, metadata !19, metadata !10, metadata !"y", i32 3, i64 64, i64 64, i64 64, i32 0, metadata !6} ; [ DW_TAG_member ] +!14 = metadata !{i32 786445, metadata !19, metadata !7, metadata !"P2", i32 8, i64 128, i64 64, i64 128, i32 0, metadata !10} ; [ DW_TAG_member ] !15 = metadata !{i32 11, i32 0, metadata !1, null} !16 = metadata !{i32 12, i32 0, metadata !17, null} -!17 = metadata !{i32 786443, metadata !1, i32 11, i32 0} ; [ DW_TAG_lexical_block ] +!17 = metadata !{i32 786443, metadata !2, metadata !1, i32 11, i32 0} ; [ DW_TAG_lexical_block ] !18 = metadata !{metadata !1} !19 = metadata !{metadata !"b2.c", metadata !"/tmp/"} diff --git a/test/CodeGen/X86/dbg-const-int.ll b/test/CodeGen/X86/dbg-const-int.ll index 7e85d66..f72729c 100644 --- a/test/CodeGen/X86/dbg-const-int.ll +++ b/test/CodeGen/X86/dbg-const-int.ll @@ -14,14 +14,14 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !2, metadata !"clang version 3.0 (trunk 132191)", i1 true, metadata !"", i32 0, null, null, metadata !11, null, null} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 786478, i32 0, metadata !2, metadata !"foo", metadata !"foo", metadata !"", metadata !2, i32 1, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 true, i32 ()* @foo, null, null, metadata !12, i32 0} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786449, i32 12, metadata !2, metadata !"clang version 3.0 (trunk 132191)", i1 true, metadata !"", i32 0, null, null, metadata !11, null, null, null} ; [ DW_TAG_compile_unit ] +!1 = metadata !{i32 786478, metadata !2, metadata !"foo", metadata !"foo", metadata !"", metadata !2, i32 1, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 true, i32 ()* @foo, null, null, metadata !12, i32 0} ; [ DW_TAG_subprogram ] !2 = metadata !{i32 786473, metadata !13} ; [ DW_TAG_file_type ] !3 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !4 = metadata !{metadata !5} !5 = metadata !{i32 786468, metadata !0, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !6 = metadata !{i32 786688, metadata !7, metadata !"i", metadata !2, i32 2, metadata !5, i32 0, null} ; [ DW_TAG_auto_variable ] -!7 = metadata !{i32 786443, metadata !1, i32 1, i32 11, metadata !2, i32 0} ; [ DW_TAG_lexical_block ] +!7 = metadata !{i32 786443, metadata !2, metadata !1, i32 1, i32 11, i32 0} ; [ DW_TAG_lexical_block ] !8 = metadata !{i32 42} !9 = metadata !{i32 2, i32 12, metadata !7, null} !10 = metadata !{i32 3, i32 2, metadata !7, null} diff --git a/test/CodeGen/X86/dbg-const.ll b/test/CodeGen/X86/dbg-const.ll index 9215c13..5c2e62b 100644 --- a/test/CodeGen/X86/dbg-const.ll +++ b/test/CodeGen/X86/dbg-const.ll @@ -18,14 +18,14 @@ declare i32 @bar() nounwind readnone !llvm.dbg.cu = !{!2} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"foobar", metadata !"foobar", metadata !"foobar", metadata !1, i32 12, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 true, i32 ()* @foobar, null, null, metadata !14, i32 0} +!0 = metadata !{i32 786478, metadata !1, metadata !"foobar", metadata !"foobar", metadata !"foobar", metadata !1, i32 12, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 true, i32 ()* @foobar, null, null, metadata !14, i32 0} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786473, metadata !15} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 12, metadata !1, metadata !"clang version 2.9 (trunk 114183)", i1 true, metadata !"", i32 0, null, null, metadata !13, null, metadata !""} +!2 = metadata !{i32 786449, i32 12, metadata !1, metadata !"clang version 2.9 (trunk 114183)", i1 true, metadata !"", i32 0, null, null, metadata !13, null, null, metadata !""} ; [ DW_TAG_compile_unit ] !3 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} !4 = metadata !{metadata !5} !5 = metadata !{i32 786468, metadata !1, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} !6 = metadata !{i32 786688, metadata !7, metadata !"j", metadata !1, i32 15, metadata !5, i32 0, null} -!7 = metadata !{i32 786443, metadata !0, i32 12, i32 52, metadata !1, i32 0} +!7 = metadata !{i32 786443, metadata !1, metadata !0, i32 12, i32 52, i32 0} ; [ DW_TAG_lexical_block ] !8 = metadata !{i32 42} !9 = metadata !{i32 15, i32 12, metadata !7, null} !10 = metadata !{i32 23, i32 3, metadata !7, null} diff --git a/test/CodeGen/X86/dbg-declare-arg.ll b/test/CodeGen/X86/dbg-declare-arg.ll index 650671b..f7e0c91 100644 --- a/test/CodeGen/X86/dbg-declare-arg.ll +++ b/test/CodeGen/X86/dbg-declare-arg.ll @@ -71,9 +71,9 @@ entry: !llvm.dbg.cu = !{!2} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"~A", metadata !"~A", metadata !"", metadata !3, i32 2, metadata !11, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, null} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786478, metadata !"", i32 0, metadata !1, metadata !"~A", metadata !"~A", metadata !3, i32 2, metadata !11, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, null} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 589826, metadata !2, metadata !"A", metadata !3, i32 2, i64 128, i64 32, i32 0, i32 0, null, metadata !4, i32 0, null, null} ; [ DW_TAG_class_type ] -!2 = metadata !{i32 786449, i32 0, i32 4, metadata !3, metadata !"clang version 3.0 (trunk 130127)", i1 false, metadata !"", i32 0, null, null, metadata !50, null, null} ; [ DW_TAG_compile_unit ] +!2 = metadata !{i32 786449, i32 4, metadata !3, metadata !"clang version 3.0 (trunk 130127)", i1 false, metadata !"", i32 0, null, null, metadata !50, null, null} ; [ DW_TAG_compile_unit ] !3 = metadata !{i32 786473, metadata !51} ; [ DW_TAG_file_type ] !4 = metadata !{metadata !5, metadata !7, metadata !8, metadata !9, metadata !0, metadata !10, metadata !14} !5 = metadata !{i32 786445, metadata !3, metadata !"x", metadata !3, i32 2, i64 32, i64 32, i64 0, i32 0, metadata !6} ; [ DW_TAG_member ] @@ -81,22 +81,22 @@ entry: !7 = metadata !{i32 786445, metadata !3, metadata !"y", metadata !3, i32 2, i64 32, i64 32, i64 32, i32 0, metadata !6} ; [ DW_TAG_member ] !8 = metadata !{i32 786445, metadata !3, metadata !"z", metadata !3, i32 2, i64 32, i64 32, i64 64, i32 0, metadata !6} ; [ DW_TAG_member ] !9 = metadata !{i32 786445, metadata !3, metadata !"o", metadata !3, i32 2, i64 32, i64 32, i64 96, i32 0, metadata !6} ; [ DW_TAG_member ] -!10 = metadata !{i32 786478, i32 0, metadata !1, metadata !"A", metadata !"A", metadata !"", metadata !3, i32 2, metadata !11, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null} ; [ DW_TAG_subprogram ] +!10 = metadata !{i32 786478, metadata !"", i32 0, metadata !1, metadata !"A", metadata !"A", metadata !3, i32 2, metadata !11, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null} ; [ DW_TAG_subprogram ] !11 = metadata !{i32 786453, metadata !3, metadata !"", metadata !3, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !12, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !12 = metadata !{null, metadata !13} !13 = metadata !{i32 786447, metadata !2, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !1} ; [ DW_TAG_pointer_type ] -!14 = metadata !{i32 786478, i32 0, metadata !1, metadata !"A", metadata !"A", metadata !"", metadata !3, i32 2, metadata !15, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null} ; [ DW_TAG_subprogram ] +!14 = metadata !{i32 786478, metadata !"", i32 0, metadata !1, metadata !"A", metadata !"A", metadata !3, i32 2, metadata !15, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null} ; [ DW_TAG_subprogram ] !15 = metadata !{i32 786453, metadata !3, metadata !"", metadata !3, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !16, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !16 = metadata !{null, metadata !13, metadata !17} !17 = metadata !{i32 589840, metadata !2, null, null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !18} ; [ DW_TAG_reference_type ] !18 = metadata !{i32 786470, metadata !2, metadata !"", null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !1} ; [ DW_TAG_const_type ] -!19 = metadata !{i32 786478, i32 0, metadata !3, metadata !"foo", metadata !"foo", metadata !"_Z3fooi", metadata !3, i32 4, metadata !20, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void (%class.A*, i32)* @_Z3fooi, null, null} ; [ DW_TAG_subprogram ] +!19 = metadata !{i32 786478, metadata !"_Z3fooi", i32 0, metadata !3, metadata !"foo", metadata !"foo", metadata !3, i32 4, metadata !20, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void (%class.A*, i32)* @_Z3fooi, null, null} ; [ DW_TAG_subprogram ] !20 = metadata !{i32 786453, metadata !3, metadata !"", metadata !3, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !21, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !21 = metadata !{metadata !1} -!22 = metadata !{i32 786478, i32 0, metadata !3, metadata !"~A", metadata !"~A", metadata !"_ZN1AD1Ev", metadata !3, i32 2, metadata !23, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void (%class.A*)* @_ZN1AD1Ev, null, null} ; [ DW_TAG_subprogram ] +!22 = metadata !{i32 786478, metadata !"_ZN1AD1Ev", i32 0, metadata !3, metadata !"~A", metadata !"~A", metadata !3, i32 2, metadata !23, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void (%class.A*)* @_ZN1AD1Ev, null, null} ; [ DW_TAG_subprogram ] !23 = metadata !{i32 786453, metadata !3, metadata !"", metadata !3, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !24, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !24 = metadata !{null} -!25 = metadata !{i32 786478, i32 0, metadata !3, metadata !"~A", metadata !"~A", metadata !"_ZN1AD2Ev", metadata !3, i32 2, metadata !23, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void (%class.A*)* @_ZN1AD2Ev, null, null} ; [ DW_TAG_subprogram ] +!25 = metadata !{i32 786478, metadata !"_ZN1AD2Ev", i32 0, metadata !3, metadata !"~A", metadata !"~A", metadata !3, i32 2, metadata !23, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void (%class.A*)* @_ZN1AD2Ev, null, null} ; [ DW_TAG_subprogram ] !26 = metadata !{i32 786689, metadata !19, metadata !"i", metadata !3, i32 16777220, metadata !6, i32 0, null} ; [ DW_TAG_arg_variable ] !27 = metadata !{i32 4, i32 11, metadata !19, null} !28 = metadata !{i32 786688, metadata !29, metadata !"j", metadata !3, i32 5, metadata !6, i32 0, null} ; [ DW_TAG_auto_variable ] diff --git a/test/CodeGen/X86/dbg-declare.ll b/test/CodeGen/X86/dbg-declare.ll index 0b29dc3..6ac397a 100644 --- a/test/CodeGen/X86/dbg-declare.ll +++ b/test/CodeGen/X86/dbg-declare.ll @@ -29,10 +29,10 @@ declare void @llvm.stackrestore(i8*) nounwind !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !6, metadata !"clang version 3.1 (trunk 153698)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, i32 12, metadata !6, metadata !"clang version 3.1 (trunk 153698)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} -!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"foo", metadata !"foo", metadata !"", metadata !6, i32 6, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (i32*)* @foo, null, null, metadata !12} ; [ DW_TAG_subprogram ] +!5 = metadata !{i32 786478, metadata !6, metadata !"foo", metadata !"foo", metadata !"", metadata !6, i32 6, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (i32*)* @foo, null, null, metadata !12} ; [ DW_TAG_subprogram ] !6 = metadata !{i32 786473, metadata !"20020104-2.c", metadata !"/Volumes/Sandbox/llvm", null} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !8 = metadata !{metadata !9, metadata !10} diff --git a/test/CodeGen/X86/dbg-file-name.ll b/test/CodeGen/X86/dbg-file-name.ll index e153409..1bd3d77 100644 --- a/test/CodeGen/X86/dbg-file-name.ll +++ b/test/CodeGen/X86/dbg-file-name.ll @@ -12,7 +12,7 @@ define i32 @main() nounwind { !llvm.dbg.cu = !{!2} !1 = metadata !{i32 786473, metadata !10} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 1, metadata !1, metadata !"LLVM build 00", i1 true, i1 false, metadata !"", i32 0, null, null, metadata !9, null} ; [ DW_TAG_compile_unit ] +!2 = metadata !{i32 786449, metadata !10, i32 1, metadata !"LLVM build 00", i1 true, i1 false, metadata !"", i32 0, null, null, metadata !9, null} ; [ DW_TAG_compile_unit ] !5 = metadata !{i32 786468, metadata !1, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !6 = metadata !{i32 786478, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"main", metadata !1, i32 9, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 ()* @main, null, null, null, i32 0} ; [ DW_TAG_subprogram ] !7 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, null} ; [ DW_TAG_subroutine_type ] diff --git a/test/CodeGen/X86/dbg-i128-const.ll b/test/CodeGen/X86/dbg-i128-const.ll index 075762c..cc612b2 100644 --- a/test/CodeGen/X86/dbg-i128-const.ll +++ b/test/CodeGen/X86/dbg-i128-const.ll @@ -16,15 +16,15 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !0 = metadata !{i128 42 } !1 = metadata !{i32 786688, metadata !2, metadata !"MAX", metadata !4, i32 29, metadata !8, i32 0, null} ; [ DW_TAG_auto_variable ] -!2 = metadata !{i32 786443, metadata !3, i32 26, i32 0, metadata !4, i32 0} ; [ DW_TAG_lexical_block ] -!3 = metadata !{i32 786478, i32 0, metadata !4, metadata !"__foo", metadata !"__foo", metadata !"__foo", metadata !4, i32 26, metadata !6, i1 false, i1 true, i32 0, i32 0, null, i1 false, i128 (i128, i128)* @__foo, null, null, null, i32 26} ; [ DW_TAG_subprogram ] +!2 = metadata !{i32 786443, metadata !4, metadata !3, i32 26, i32 0, i32 0} ; [ DW_TAG_lexical_block ] +!3 = metadata !{i32 786478, metadata !4, metadata !"__foo", metadata !"__foo", metadata !"__foo", metadata !4, i32 26, metadata !6, i1 false, i1 true, i32 0, i32 0, null, i1 false, i128 (i128, i128)* @__foo, null, null, null, i32 26} ; [ DW_TAG_subprogram ] !4 = metadata !{i32 786473, metadata !13} ; [ DW_TAG_file_type ] -!5 = metadata !{i32 786449, i32 0, i32 1, metadata !4, metadata !"clang", i1 true, metadata !"", i32 0, null, null, metadata !12, null, metadata !""} ; [ DW_TAG_compile_unit ] -!6 = metadata !{i32 786453, metadata !4, metadata !"", metadata !4, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !7, i32 0, null} ; [ DW_TAG_subroutine_type ] +!5 = metadata !{i32 786449, i32 1, metadata !4, metadata !"clang", i1 true, metadata !"", i32 0, null, null, metadata !12, null, null, metadata !""} ; [ DW_TAG_compile_unit ] +!6 = metadata !{i32 786453, metadata !13, metadata !4, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !7, i32 0, null} ; [ DW_TAG_subroutine_type ] !7 = metadata !{metadata !8, metadata !8, metadata !8} -!8 = metadata !{i32 786454, metadata !4, metadata !"ti_int", metadata !9, i32 78, i64 0, i64 0, i64 0, i32 0, metadata !10} ; [ DW_TAG_typedef ] +!8 = metadata !{i32 786454, metadata !14, metadata !4, metadata !"ti_int", i32 78, i64 0, i64 0, i64 0, i32 0, metadata !10} ; [ DW_TAG_typedef ] !9 = metadata !{i32 786473, metadata !14} ; [ DW_TAG_file_type ] -!10 = metadata !{i32 786468, metadata !4, metadata !"", metadata !4, i32 0, i64 128, i64 128, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!10 = metadata !{i32 786468, metadata !13, metadata !4, metadata !"", i32 0, i64 128, i64 128, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !11 = metadata !{i32 29, i32 0, metadata !2, null} !12 = metadata !{metadata !3} !13 = metadata !{metadata !"foo.c", metadata !"/tmp"} diff --git a/test/CodeGen/X86/dbg-large-unsigned-const.ll b/test/CodeGen/X86/dbg-large-unsigned-const.ll index f8a06c4..c381cd7 100644 --- a/test/CodeGen/X86/dbg-large-unsigned-const.ll +++ b/test/CodeGen/X86/dbg-large-unsigned-const.ll @@ -7,8 +7,8 @@ define zeroext i1 @_Z3iseRKxS0_(i64* nocapture %LHS, i64* nocapture %RHS) nounwi entry: tail call void @llvm.dbg.value(metadata !{i64* %LHS}, i64 0, metadata !7), !dbg !13 tail call void @llvm.dbg.value(metadata !{i64* %RHS}, i64 0, metadata !11), !dbg !14 - %tmp1 = load i64* %LHS, align 4, !dbg !15, !tbaa !17 - %tmp3 = load i64* %RHS, align 4, !dbg !15, !tbaa !17 + %tmp1 = load i64* %LHS, align 4, !dbg !15 + %tmp3 = load i64* %RHS, align 4, !dbg !15 %cmp = icmp eq i64 %tmp1, %tmp3, !dbg !15 ret i1 %cmp, !dbg !15 } @@ -30,13 +30,13 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !30 = metadata !{metadata !7, metadata !11} !31 = metadata !{metadata !12} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !2, metadata !"clang version 3.0 (trunk 135593)", i1 true, metadata !"", i32 0, null, null, metadata !29, null, metadata !""} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 786478, i32 0, metadata !2, metadata !"ise", metadata !"ise", metadata !"_Z3iseRKxS0_", metadata !2, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i1 (i64*, i64*)* @_Z3iseRKxS0_, null, null, metadata !30, i32 2} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786449, i32 4, metadata !2, metadata !"clang version 3.0 (trunk 135593)", i1 true, metadata !"", i32 0, null, null, metadata !29, null, metadata !""} ; [ DW_TAG_compile_unit ] +!1 = metadata !{i32 786478, metadata !"_Z3iseRKxS0_", i32 0, metadata !2, metadata !"ise", metadata !"ise", metadata !2, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i1 (i64*, i64*)* @_Z3iseRKxS0_, null, null, metadata !30, i32 2} ; [ DW_TAG_subprogram ] !2 = metadata !{i32 786473, metadata !"lli.cc", metadata !"/private/tmp", metadata !0} ; [ DW_TAG_file_type ] !3 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !4 = metadata !{metadata !5} !5 = metadata !{i32 786468, metadata !0, metadata !"bool", null, i32 0, i64 8, i64 8, i64 0, i32 0, i32 2} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 786478, i32 0, metadata !2, metadata !"fn", metadata !"fn", metadata !"_Z2fnx", metadata !2, i32 6, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i1 (i64)* @_Z2fnx, null, null, metadata !31, i32 6} ; [ DW_TAG_subprogram ] +!6 = metadata !{i32 786478, metadata !"_Z2fnx", i32 0, metadata !2, metadata !"fn", metadata !"fn", metadata !2, i32 6, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i1 (i64)* @_Z2fnx, null, null, metadata !31, i32 6} ; [ DW_TAG_subprogram ] !7 = metadata !{i32 786689, metadata !1, metadata !"LHS", metadata !2, i32 16777218, metadata !8, i32 0, i32 0} ; [ DW_TAG_arg_variable ] !8 = metadata !{i32 786448, metadata !0, null, null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !9} ; [ DW_TAG_reference_type ] !9 = metadata !{i32 786470, metadata !0, metadata !"", null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !10} ; [ DW_TAG_const_type ] @@ -46,14 +46,11 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !13 = metadata !{i32 2, i32 27, metadata !1, null} !14 = metadata !{i32 2, i32 49, metadata !1, null} !15 = metadata !{i32 3, i32 3, metadata !16, null} -!16 = metadata !{i32 786443, metadata !1, i32 2, i32 54, metadata !2, i32 0} ; [ DW_TAG_lexical_block ] -!17 = metadata !{metadata !"long long", metadata !18} -!18 = metadata !{metadata !"omnipotent char", metadata !19} -!19 = metadata !{metadata !"Simple C/C++ TBAA", null} +!16 = metadata !{i32 786443, metadata !2, metadata !1, i32 2, i32 54, i32 0} ; [ DW_TAG_lexical_block ] !20 = metadata !{i32 6, i32 19, metadata !6, null} !21 = metadata !{i32 786689, metadata !1, metadata !"LHS", metadata !2, i32 16777218, metadata !8, i32 0, metadata !22} ; [ DW_TAG_arg_variable ] !22 = metadata !{i32 7, i32 10, metadata !23, null} -!23 = metadata !{i32 786443, metadata !6, i32 6, i32 22, metadata !2, i32 1} ; [ DW_TAG_lexical_block ] +!23 = metadata !{i32 786443, metadata !2, metadata !6, i32 6, i32 22, i32 1} ; [ DW_TAG_lexical_block ] !24 = metadata !{i32 2, i32 27, metadata !1, metadata !22} !25 = metadata !{i64 9223372036854775807} !26 = metadata !{i32 786689, metadata !1, metadata !"RHS", metadata !2, i32 33554434, metadata !8, i32 0, metadata !22} ; [ DW_TAG_arg_variable ] diff --git a/test/CodeGen/X86/dbg-merge-loc-entry.ll b/test/CodeGen/X86/dbg-merge-loc-entry.ll index bf9045c..30d0305 100644 --- a/test/CodeGen/X86/dbg-merge-loc-entry.ll +++ b/test/CodeGen/X86/dbg-merge-loc-entry.ll @@ -45,32 +45,32 @@ declare %0 @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone !llvm.dbg.cu = !{!2} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"__udivmodti4", metadata !"__udivmodti4", metadata !"", metadata !1, i32 879, metadata !3, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 true, null, null, null, null, i32 879} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786478, metadata !1, metadata !"__udivmodti4", metadata !"__udivmodti4", metadata !"", metadata !1, i32 879, metadata !3, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 true, null, null, null, null, i32 879} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786473, metadata !29} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 1, metadata !1, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, metadata !"", i32 0, null, null, metadata !28, null, metadata !""} ; [ DW_TAG_compile_unit ] -!3 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!2 = metadata !{i32 786449, i32 1, metadata !1, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, metadata !"", i32 0, null, null, metadata !28, null, null, metadata !""} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 786453, metadata !29, metadata !1, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] !4 = metadata !{metadata !5, metadata !5, metadata !5, metadata !8} -!5 = metadata !{i32 786454, metadata !6, metadata !"UTItype", metadata !6, i32 166, i64 0, i64 0, i64 0, i32 0, metadata !7} ; [ DW_TAG_typedef ] +!5 = metadata !{i32 786454, metadata !30, metadata !6, metadata !"UTItype", i32 166, i64 0, i64 0, i64 0, i32 0, metadata !7} ; [ DW_TAG_typedef ] !6 = metadata !{i32 786473, metadata !30} ; [ DW_TAG_file_type ] -!7 = metadata !{i32 786468, metadata !1, metadata !"", metadata !1, i32 0, i64 128, i64 128, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] -!8 = metadata !{i32 786447, metadata !1, metadata !"", metadata !1, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_pointer_type ] -!9 = metadata !{i32 786478, i32 0, metadata !1, metadata !"__divti3", metadata !"__divti3", metadata !"__divti3", metadata !1, i32 1094, metadata !10, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i128 (i128, i128)* @__divti3, null, null, null, i32 1094} ; [ DW_TAG_subprogram ] -!10 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_subroutine_type ] +!7 = metadata !{i32 786468, metadata !29, metadata !1, metadata !"", i32 0, i64 128, i64 128, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] +!8 = metadata !{i32 786447, metadata !29, metadata !1, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !5} ; [ DW_TAG_pointer_type ] +!9 = metadata !{i32 786478, metadata !1, metadata !"__divti3", metadata !"__divti3", metadata !"__divti3", metadata !1, i32 1094, metadata !10, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i128 (i128, i128)* @__divti3, null, null, null, i32 1094} ; [ DW_TAG_subprogram ] +!10 = metadata !{i32 786453, metadata !29, metadata !1, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_subroutine_type ] !11 = metadata !{metadata !12, metadata !12, metadata !12} -!12 = metadata !{i32 786454, metadata !6, metadata !"TItype", metadata !6, i32 160, i64 0, i64 0, i64 0, i32 0, metadata !13} ; [ DW_TAG_typedef ] -!13 = metadata !{i32 786468, metadata !1, metadata !"", metadata !1, i32 0, i64 128, i64 128, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!12 = metadata !{i32 786454, metadata !30, metadata !6, metadata !"TItype", i32 160, i64 0, i64 0, i64 0, i32 0, metadata !13} ; [ DW_TAG_typedef ] +!13 = metadata !{i32 786468, metadata !29, metadata !1, metadata !"", i32 0, i64 128, i64 128, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !14 = metadata !{i32 786689, metadata !9, metadata !"u", metadata !1, i32 1093, metadata !12, i32 0, null} ; [ DW_TAG_arg_variable ] !15 = metadata !{i32 1093, i32 0, metadata !9, null} !16 = metadata !{i64 0} !17 = metadata !{i32 786688, metadata !18, metadata !"c", metadata !1, i32 1095, metadata !19, i32 0, null} ; [ DW_TAG_auto_variable ] -!18 = metadata !{i32 786443, metadata !9, i32 1094, i32 0, metadata !1, i32 13} ; [ DW_TAG_lexical_block ] -!19 = metadata !{i32 786454, metadata !6, metadata !"word_type", metadata !6, i32 424, i64 0, i64 0, i64 0, i32 0, metadata !20} ; [ DW_TAG_typedef ] -!20 = metadata !{i32 786468, metadata !1, metadata !"long int", metadata !1, i32 0, i64 64, i64 64, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!18 = metadata !{i32 786443, metadata !1, metadata !9, i32 1094, i32 0, i32 13} ; [ DW_TAG_lexical_block ] +!19 = metadata !{i32 786454, metadata !30, metadata !6, metadata !"word_type", i32 424, i64 0, i64 0, i64 0, i32 0, metadata !20} ; [ DW_TAG_typedef ] +!20 = metadata !{i32 786468, metadata !29, metadata !1, metadata !"long int", i32 0, i64 64, i64 64, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !21 = metadata !{i32 1095, i32 0, metadata !18, null} !22 = metadata !{i32 1103, i32 0, metadata !18, null} !23 = metadata !{i32 1104, i32 0, metadata !18, null} !24 = metadata !{i32 1003, i32 0, metadata !25, metadata !26} -!25 = metadata !{i32 786443, metadata !0, i32 879, i32 0, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!25 = metadata !{i32 786443, metadata !1, metadata !0, i32 879, i32 0, i32 0} ; [ DW_TAG_lexical_block ] !26 = metadata !{i32 1107, i32 0, metadata !18, null} !27 = metadata !{i32 1111, i32 0, metadata !18, null} !28 = metadata !{metadata !0, metadata !9} diff --git a/test/CodeGen/X86/dbg-prolog-end.ll b/test/CodeGen/X86/dbg-prolog-end.ll index 705c2f2..d1774cc 100644 --- a/test/CodeGen/X86/dbg-prolog-end.ll +++ b/test/CodeGen/X86/dbg-prolog-end.ll @@ -35,21 +35,21 @@ entry: !llvm.dbg.cu = !{!0} !18 = metadata !{metadata !1, metadata !6} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !2, metadata !"clang version 3.0 (trunk 131100)", i1 false, metadata !"", i32 0, null, null, metadata !18, null, metadata !""} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 786478, i32 0, metadata !2, metadata !"foo", metadata !"foo", metadata !"", metadata !2, i32 1, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, i32 (i32)* @foo, null, null, null, i32 1} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786449, i32 12, metadata !2, metadata !"clang version 3.0 (trunk 131100)", i1 false, metadata !"", i32 0, null, null, metadata !18, null, null, metadata !""} ; [ DW_TAG_compile_unit ] +!1 = metadata !{i32 786478, metadata !2, metadata !"foo", metadata !"foo", metadata !"", metadata !2, i32 1, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, i32 (i32)* @foo, null, null, null, i32 1} ; [ DW_TAG_subprogram ] !2 = metadata !{i32 786473, metadata !"/tmp/a.c", metadata !"/private/tmp", metadata !0} ; [ DW_TAG_file_type ] !3 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !4 = metadata !{metadata !5} !5 = metadata !{i32 786468, metadata !0, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 786478, i32 0, metadata !2, metadata !"main", metadata !"main", metadata !"", metadata !2, i32 7, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 false, i32 ()* @main, null, null, null, i32 7} ; [ DW_TAG_subprogram ] +!6 = metadata !{i32 786478, metadata !2, metadata !"main", metadata !"main", metadata !"", metadata !2, i32 7, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 false, i32 ()* @main, null, null, null, i32 7} ; [ DW_TAG_subprogram ] !7 = metadata !{i32 786689, metadata !1, metadata !"i", metadata !2, i32 16777217, metadata !5, i32 0, null} ; [ DW_TAG_arg_variable ] !8 = metadata !{i32 1, i32 13, metadata !1, null} !9 = metadata !{i32 786688, metadata !10, metadata !"j", metadata !2, i32 2, metadata !5, i32 0, null} ; [ DW_TAG_auto_variable ] -!10 = metadata !{i32 786443, metadata !1, i32 1, i32 16, metadata !2, i32 0} ; [ DW_TAG_lexical_block ] +!10 = metadata !{i32 786443, metadata !2, metadata !1, i32 1, i32 16, i32 0} ; [ DW_TAG_lexical_block ] !11 = metadata !{i32 2, i32 6, metadata !10, null} !12 = metadata !{i32 2, i32 11, metadata !10, null} !13 = metadata !{i32 3, i32 2, metadata !10, null} !14 = metadata !{i32 4, i32 2, metadata !10, null} !15 = metadata !{i32 5, i32 2, metadata !10, null} !16 = metadata !{i32 8, i32 2, metadata !17, null} -!17 = metadata !{i32 786443, metadata !6, i32 7, i32 12, metadata !2, i32 1} ; [ DW_TAG_lexical_block ] +!17 = metadata !{i32 786443, metadata !2, metadata !6, i32 7, i32 12, i32 1} ; [ DW_TAG_lexical_block ] diff --git a/test/CodeGen/X86/dbg-subrange.ll b/test/CodeGen/X86/dbg-subrange.ll index 6a06991..b08d68a 100644 --- a/test/CodeGen/X86/dbg-subrange.ll +++ b/test/CodeGen/X86/dbg-subrange.ll @@ -14,10 +14,10 @@ entry: !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !6, metadata !"clang version 3.1 (trunk 144833)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !11, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, i32 12, metadata !6, metadata !"clang version 3.1 (trunk 144833)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !11, metadata !11, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} -!5 = metadata !{i32 720942, i32 0, metadata !6, metadata !"bar", metadata !"bar", metadata !"", metadata !6, i32 4, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void ()* @bar, null, null, metadata !9} ; [ DW_TAG_subprogram ] +!5 = metadata !{i32 720942, metadata !6, metadata !"bar", metadata !"bar", metadata !"", metadata !6, i32 4, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void ()* @bar, null, null, metadata !9} ; [ DW_TAG_subprogram ] !6 = metadata !{i32 720937, metadata !"small.c", metadata !"/private/tmp", null} ; [ DW_TAG_file_type ] !7 = metadata !{i32 720917, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !8 = metadata !{null} diff --git a/test/CodeGen/X86/dbg-value-dag-combine.ll b/test/CodeGen/X86/dbg-value-dag-combine.ll index d284182..c63235e 100644 --- a/test/CodeGen/X86/dbg-value-dag-combine.ll +++ b/test/CodeGen/X86/dbg-value-dag-combine.ll @@ -25,11 +25,9 @@ entry: } !llvm.dbg.cu = !{!2} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata -!"__OpenCL_test_kernel", metadata !"__OpenCL_test_kernel", metadata -!"__OpenCL_test_kernel", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 false, null} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786478, metadata !1, metadata !"__OpenCL_test_kernel", metadata !"__OpenCL_test_kernel", metadata !"__OpenCL_test_kernel", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 false, null} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786473, metadata !19} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 1, metadata !1, metadata !"clc", i1 false, metadata !"", i32 0, null, null, metadata !18, null, null} ; [ DW_TAG_compile_unit ] +!2 = metadata !{i32 786449, i32 1, metadata !1, metadata !"clc", i1 false, metadata !"", i32 0, null, null, metadata !18, null, null, null} ; [ DW_TAG_compile_unit ] !3 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !4 = metadata !{null, metadata !5} !5 = metadata !{i32 786447, metadata !2, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !6} ; [ DW_TAG_pointer_type ] diff --git a/test/CodeGen/X86/dbg-value-isel.ll b/test/CodeGen/X86/dbg-value-isel.ll index 5993b8c..acc360e 100644 --- a/test/CodeGen/X86/dbg-value-isel.ll +++ b/test/CodeGen/X86/dbg-value-isel.ll @@ -80,14 +80,14 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!2} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"__OpenCL_nbt02_kernel", metadata !"__OpenCL_nbt02_kernel", metadata !"__OpenCL_nbt02_kernel", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 false, null} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786478, metadata !1, metadata !"__OpenCL_nbt02_kernel", metadata !"__OpenCL_nbt02_kernel", metadata !"__OpenCL_nbt02_kernel", metadata !1, i32 2, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 false, null} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786473, metadata !20} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 1, metadata !1, metadata !"clc", i1 false, metadata !"", i32 0, null, null, metadata !19, null, null} ; [ DW_TAG_compile_unit ] -!3 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!2 = metadata !{i32 786449, metadata !20, i32 1, metadata !"clc", i1 false, metadata !"", i32 0, null, null, metadata !19, null, null, null} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 786453, metadata !20, metadata !1, metadata !"", i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !4 = metadata !{null, metadata !5} -!5 = metadata !{i32 786447, metadata !2, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !6} ; [ DW_TAG_pointer_type ] -!6 = metadata !{i32 589846, metadata !2, metadata !"uint", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !7} ; [ DW_TAG_typedef ] -!7 = metadata !{i32 786468, metadata !2, metadata !"unsigned int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] +!5 = metadata !{i32 786447, null, metadata !2, metadata !"", i32 0, i64 32, i64 32, i64 0, i32 0, metadata !6} ; [ DW_TAG_pointer_type ] +!6 = metadata !{i32 589846, metadata !20, metadata !2, metadata !"uint", i32 0, i64 0, i64 0, i64 0, i32 0, metadata !7} ; [ DW_TAG_typedef ] +!7 = metadata !{i32 786468, null, metadata !2, metadata !"unsigned int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] !8 = metadata !{i32 786689, metadata !0, metadata !"ip", metadata !1, i32 1, metadata !5, i32 0, null} ; [ DW_TAG_arg_variable ] !9 = metadata !{i32 1, i32 32, metadata !0, null} !10 = metadata !{i32 786688, metadata !11, metadata !"tid", metadata !1, i32 3, metadata !6, i32 0, null} ; [ DW_TAG_auto_variable ] diff --git a/test/CodeGen/X86/dbg-value-location.ll b/test/CodeGen/X86/dbg-value-location.ll index a1030b4..a6c3e13 100644 --- a/test/CodeGen/X86/dbg-value-location.ll +++ b/test/CodeGen/X86/dbg-value-location.ll @@ -47,25 +47,25 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!2} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"", metadata !1, i32 19510, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32, i64, i8*, i32)* @foo, null, null, null, i32 19510} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786478, metadata !1, metadata !1, metadata !"foo", metadata !"foo", metadata !"", i32 19510, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32, i64, i8*, i32)* @foo, null, null, null, i32 19510} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786473, metadata !26} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 12, metadata !25, metadata !"clang version 2.9 (trunk 124753)", i1 true, metadata !"", i32 0, null, null, metadata !24, null, null} ; [ DW_TAG_compile_unit ] +!2 = metadata !{i32 786449, metadata !27, i32 12, metadata !"clang version 2.9 (trunk 124753)", i1 true, metadata !"", i32 0, null, null, metadata !24, null, null, null} ; [ DW_TAG_compile_unit ] !3 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !4 = metadata !{metadata !5} !5 = metadata !{i32 786468, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 786478, i32 0, metadata !1, metadata !"bar3", metadata !"bar3", metadata !"", metadata !1, i32 14827, metadata !3, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32)* @bar3} ; [ DW_TAG_subprogram ] -!7 = metadata !{i32 786478, i32 0, metadata !1, metadata !"bar2", metadata !"bar2", metadata !"", metadata !1, i32 15397, metadata !3, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32)* @bar2} ; [ DW_TAG_subprogram ] -!8 = metadata !{i32 786478, i32 0, metadata !1, metadata !"bar", metadata !"bar", metadata !"", metadata !1, i32 12382, metadata !9, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32, i32*)* @bar} ; [ DW_TAG_subprogram ] +!6 = metadata !{i32 786478, metadata !1, metadata !1, metadata !"bar3", metadata !"bar3", metadata !"", i32 14827, metadata !3, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32)* @bar3} ; [ DW_TAG_subprogram ] +!7 = metadata !{i32 786478, metadata !1, metadata !1, metadata !"bar2", metadata !"bar2", metadata !"", i32 15397, metadata !3, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32)* @bar2} ; [ DW_TAG_subprogram ] +!8 = metadata !{i32 786478, metadata !1, metadata !1, metadata !"bar", metadata !"bar", metadata !"", i32 12382, metadata !9, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (i32, i32*)* @bar} ; [ DW_TAG_subprogram ] !9 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !10, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !10 = metadata !{metadata !11} !11 = metadata !{i32 786468, metadata !2, metadata !"unsigned char", null, i32 0, i64 8, i64 8, i64 0, i32 0, i32 8} ; [ DW_TAG_base_type ] !12 = metadata !{i32 786689, metadata !0, metadata !"var", metadata !1, i32 19509, metadata !5, i32 0, null} ; [ DW_TAG_arg_variable ] !13 = metadata !{i32 19509, i32 20, metadata !0, null} !14 = metadata !{i32 18091, i32 2, metadata !15, metadata !17} -!15 = metadata !{i32 786443, metadata !16, i32 18086, i32 1, metadata !1, i32 748} ; [ DW_TAG_lexical_block ] -!16 = metadata !{i32 786478, i32 0, metadata !1, metadata !"foo_bar", metadata !"foo_bar", metadata !"", metadata !1, i32 18086, metadata !3, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, null} ; [ DW_TAG_subprogram ] +!15 = metadata !{i32 786443, metadata !1, metadata !16, i32 18086, i32 1, i32 748} ; [ DW_TAG_lexical_block ] +!16 = metadata !{i32 786478, metadata !1, metadata !1, metadata !"foo_bar", metadata !"foo_bar", metadata !"", i32 18086, metadata !3, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, null} ; [ DW_TAG_subprogram ] !17 = metadata !{i32 19514, i32 2, metadata !18, null} -!18 = metadata !{i32 786443, metadata !0, i32 19510, i32 1, metadata !1, i32 99} ; [ DW_TAG_lexical_block ] +!18 = metadata !{i32 786443, metadata !1, metadata !0, i32 19510, i32 1, i32 99} ; [ DW_TAG_lexical_block ] !22 = metadata !{i32 18094, i32 2, metadata !15, metadata !17} !23 = metadata !{i32 19524, i32 1, metadata !18, null} !24 = metadata !{metadata !0, metadata !6, metadata !7, metadata !8} diff --git a/test/CodeGen/X86/dbg-value-range.ll b/test/CodeGen/X86/dbg-value-range.ll index db25436..b068bbbe 100644 --- a/test/CodeGen/X86/dbg-value-range.ll +++ b/test/CodeGen/X86/dbg-value-range.ll @@ -6,7 +6,7 @@ define i32 @bar(%struct.a* nocapture %b) nounwind ssp { entry: tail call void @llvm.dbg.value(metadata !{%struct.a* %b}, i64 0, metadata !6), !dbg !13 %tmp1 = getelementptr inbounds %struct.a* %b, i64 0, i32 0, !dbg !14 - %tmp2 = load i32* %tmp1, align 4, !dbg !14, !tbaa !15 + %tmp2 = load i32* %tmp1, align 4, !dbg !14 tail call void @llvm.dbg.value(metadata !{i32 %tmp2}, i64 0, metadata !11), !dbg !14 %call = tail call i32 (...)* @foo(i32 %tmp2) nounwind , !dbg !18 %add = add nsw i32 %tmp2, 1, !dbg !19 @@ -19,9 +19,9 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!2} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"bar", metadata !"bar", metadata !"", metadata !1, i32 5, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (%struct.a*)* @bar, null, null, metadata !21, i32 0} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786478, metadata !1, metadata !"bar", metadata !"bar", metadata !"", metadata !1, i32 5, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (%struct.a*)* @bar, null, null, metadata !21, i32 0} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786473, metadata !22} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 12, metadata !1, metadata !"clang version 2.9 (trunk 122997)", i1 true, metadata !"", i32 0, null, null, metadata !20, null, null} ; [ DW_TAG_compile_unit ] +!2 = metadata !{i32 786449, metadata !22, i32 12, metadata !"clang version 2.9 (trunk 122997)", i1 true, metadata !"", i32 0, null, null, metadata !20, null, null, null} ; [ DW_TAG_compile_unit ] !3 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !4 = metadata !{metadata !5} !5 = metadata !{i32 786468, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] @@ -31,12 +31,9 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !9 = metadata !{metadata !10} !10 = metadata !{i32 786445, metadata !1, metadata !"c", metadata !1, i32 2, i64 32, i64 32, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] !11 = metadata !{i32 786688, metadata !12, metadata !"x", metadata !1, i32 6, metadata !5, i32 0, null} ; [ DW_TAG_auto_variable ] -!12 = metadata !{i32 786443, metadata !0, i32 5, i32 22, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!12 = metadata !{i32 786443, metadata !22, metadata !0, i32 5, i32 22, i32 0} ; [ DW_TAG_lexical_block ] !13 = metadata !{i32 5, i32 19, metadata !0, null} !14 = metadata !{i32 6, i32 14, metadata !12, null} -!15 = metadata !{metadata !"int", metadata !16} -!16 = metadata !{metadata !"omnipotent char", metadata !17} -!17 = metadata !{metadata !"Simple C/C++ TBAA", null} !18 = metadata !{i32 7, i32 2, metadata !12, null} !19 = metadata !{i32 8, i32 2, metadata !12, null} !20 = metadata !{metadata !0} diff --git a/test/CodeGen/X86/dwarf-comp-dir.ll b/test/CodeGen/X86/dwarf-comp-dir.ll index 0dad832..3bc2957 100644 --- a/test/CodeGen/X86/dwarf-comp-dir.ll +++ b/test/CodeGen/X86/dwarf-comp-dir.ll @@ -6,7 +6,7 @@ target triple = "x86_64-unknown-linux-gnu" !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 720913, i32 0, i32 12, metadata !3, metadata !"clang version 3.1 (trunk 143523)", i1 true, i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !1} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 720913, metadata !4, i32 12, metadata !"clang version 3.1 (trunk 143523)", i1 true, i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !1} ; [ DW_TAG_compile_unit ] !1 = metadata !{metadata !2} !2 = metadata !{i32 0} !3 = metadata !{i32 786473, metadata !4} ; [ DW_TAG_file_type ] diff --git a/test/CodeGen/X86/early-ifcvt-crash.ll b/test/CodeGen/X86/early-ifcvt-crash.ll index c828026..d958050 100644 --- a/test/CodeGen/X86/early-ifcvt-crash.ll +++ b/test/CodeGen/X86/early-ifcvt-crash.ll @@ -1,5 +1,7 @@ ; RUN: llc < %s -x86-early-ifcvt -verify-machineinstrs ; RUN: llc < %s -x86-early-ifcvt -stress-early-ifcvt -verify-machineinstrs +; CPU without a scheduling model: +; RUN: llc < %s -x86-early-ifcvt -mcpu=pentium3 -verify-machineinstrs ; ; Run these tests with and without -stress-early-ifcvt to exercise heuristics. ; diff --git a/test/CodeGen/X86/fast-cc-merge-stack-adj.ll b/test/CodeGen/X86/fast-cc-merge-stack-adj.ll index d591f94..5121ed1 100644 --- a/test/CodeGen/X86/fast-cc-merge-stack-adj.ll +++ b/test/CodeGen/X86/fast-cc-merge-stack-adj.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mcpu=generic -march=x86 -x86-asm-syntax=intel | \ -; RUN: grep "add ESP, 8" +; RUN: llc < %s -mcpu=generic -march=x86 -x86-asm-syntax=intel | FileCheck %s +; CHECK: add ESP, 8 target triple = "i686-pc-linux-gnu" diff --git a/test/CodeGen/X86/fast-isel-args-fail.ll b/test/CodeGen/X86/fast-isel-args-fail.ll index 45a2b38..e748e1c 100644 --- a/test/CodeGen/X86/fast-isel-args-fail.ll +++ b/test/CodeGen/X86/fast-isel-args-fail.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -fast-isel -verify-machineinstrs -mtriple=x86_64-apple-darwin10 -; RUN: llc < %s -fast-isel -verify-machineinstrs -mtriple=x86_64-pc-win32 | FileCheck %s +; RUN: llc < %s -fast-isel -verify-machineinstrs -mtriple=x86_64-pc-win32 | FileCheck %s -check-prefix=WIN32 +; RUN: llc < %s -fast-isel -verify-machineinstrs -mtriple=x86_64-pc-win64 | FileCheck %s -check-prefix=WIN64 ; Requires: Asserts ; Previously, this would cause an assert. @@ -13,8 +14,10 @@ entry: ; We don't handle the Windows CC, yet. define i32 @foo(i32* %p) { entry: -; CHECK: foo -; CHECK: movl (%rcx), %eax +; WIN32: foo +; WIN32: movl (%rcx), %eax +; WIN64: foo +; WIN64: movl (%rdi), %eax %0 = load i32* %p, align 4 ret i32 %0 } diff --git a/test/CodeGen/X86/fast-isel-avoid-unnecessary-pic-base.ll b/test/CodeGen/X86/fast-isel-avoid-unnecessary-pic-base.ll index 9233d3f..21fae4a 100644 --- a/test/CodeGen/X86/fast-isel-avoid-unnecessary-pic-base.ll +++ b/test/CodeGen/X86/fast-isel-avoid-unnecessary-pic-base.ll @@ -1,4 +1,5 @@ -; RUN: llc -O0 -relocation-model=pic < %s | not grep call +; RUN: llc -O0 -relocation-model=pic < %s | FileCheck %s +; CHECK-NOT: call ; rdar://8396318 ; Don't emit a PIC base register if no addresses are needed. diff --git a/test/CodeGen/X86/fast-isel-constpool.ll b/test/CodeGen/X86/fast-isel-constpool.ll index b3adb80..bbbaeb2 100644 --- a/test/CodeGen/X86/fast-isel-constpool.ll +++ b/test/CodeGen/X86/fast-isel-constpool.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -fast-isel | grep "LCPI0_0(%rip)" +; RUN: llc < %s -fast-isel | FileCheck %s +; CHECK: LCPI0_0(%rip) + ; Make sure fast isel uses rip-relative addressing when required. target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin9.0" diff --git a/test/CodeGen/X86/fast-isel-divrem-x86-64.ll b/test/CodeGen/X86/fast-isel-divrem-x86-64.ll new file mode 100644 index 0000000..45494f1 --- /dev/null +++ b/test/CodeGen/X86/fast-isel-divrem-x86-64.ll @@ -0,0 +1,41 @@ +; RUN: llc -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort < %s | FileCheck %s + +define i64 @test_sdiv64(i64 %dividend, i64 %divisor) nounwind { +entry: + %result = sdiv i64 %dividend, %divisor + ret i64 %result +} + +; CHECK: test_sdiv64: +; CHECK: cqto +; CHECK: idivq + +define i64 @test_srem64(i64 %dividend, i64 %divisor) nounwind { +entry: + %result = srem i64 %dividend, %divisor + ret i64 %result +} + +; CHECK: test_srem64: +; CHECK: cqto +; CHECK: idivq + +define i64 @test_udiv64(i64 %dividend, i64 %divisor) nounwind { +entry: + %result = udiv i64 %dividend, %divisor + ret i64 %result +} + +; CHECK: test_udiv64: +; CHECK: xorl +; CHECK: divq + +define i64 @test_urem64(i64 %dividend, i64 %divisor) nounwind { +entry: + %result = urem i64 %dividend, %divisor + ret i64 %result +} + +; CHECK: test_urem64: +; CHECK: xorl +; CHECK: divq diff --git a/test/CodeGen/X86/fast-isel-divrem.ll b/test/CodeGen/X86/fast-isel-divrem.ll new file mode 100644 index 0000000..7aba7f7 --- /dev/null +++ b/test/CodeGen/X86/fast-isel-divrem.ll @@ -0,0 +1,122 @@ +; RUN: llc -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort < %s | FileCheck %s +; RUN: llc -mtriple=i686-none-linux -fast-isel -fast-isel-abort < %s | FileCheck %s + +define i8 @test_sdiv8(i8 %dividend, i8 %divisor) nounwind { +entry: + %result = sdiv i8 %dividend, %divisor + ret i8 %result +} + +; CHECK: test_sdiv8: +; CHECK: movsbw +; CHECK: idivb + +define i8 @test_srem8(i8 %dividend, i8 %divisor) nounwind { +entry: + %result = srem i8 %dividend, %divisor + ret i8 %result +} + +; CHECK: test_srem8: +; CHECK: movsbw +; CHECK: idivb + +define i8 @test_udiv8(i8 %dividend, i8 %divisor) nounwind { +entry: + %result = udiv i8 %dividend, %divisor + ret i8 %result +} + +; CHECK: test_udiv8: +; CHECK: movzbw +; CHECK: divb + +define i8 @test_urem8(i8 %dividend, i8 %divisor) nounwind { +entry: + %result = urem i8 %dividend, %divisor + ret i8 %result +} + +; CHECK: test_urem8: +; CHECK: movzbw +; CHECK: divb + +define i16 @test_sdiv16(i16 %dividend, i16 %divisor) nounwind { +entry: + %result = sdiv i16 %dividend, %divisor + ret i16 %result +} + +; CHECK: test_sdiv16: +; CHECK: cwtd +; CHECK: idivw + +define i16 @test_srem16(i16 %dividend, i16 %divisor) nounwind { +entry: + %result = srem i16 %dividend, %divisor + ret i16 %result +} + +; CHECK: test_srem16: +; CHECK: cwtd +; CHECK: idivw + +define i16 @test_udiv16(i16 %dividend, i16 %divisor) nounwind { +entry: + %result = udiv i16 %dividend, %divisor + ret i16 %result +} + +; CHECK: test_udiv16: +; CHECK: xorl +; CHECK: divw + +define i16 @test_urem16(i16 %dividend, i16 %divisor) nounwind { +entry: + %result = urem i16 %dividend, %divisor + ret i16 %result +} + +; CHECK: test_urem16: +; CHECK: xorl +; CHECK: divw + +define i32 @test_sdiv32(i32 %dividend, i32 %divisor) nounwind { +entry: + %result = sdiv i32 %dividend, %divisor + ret i32 %result +} + +; CHECK: test_sdiv32: +; CHECK: cltd +; CHECK: idivl + +define i32 @test_srem32(i32 %dividend, i32 %divisor) nounwind { +entry: + %result = srem i32 %dividend, %divisor + ret i32 %result +} + +; CHECK: test_srem32: +; CHECK: cltd +; CHECK: idivl + +define i32 @test_udiv32(i32 %dividend, i32 %divisor) nounwind { +entry: + %result = udiv i32 %dividend, %divisor + ret i32 %result +} + +; CHECK: test_udiv32: +; CHECK: xorl +; CHECK: divl + +define i32 @test_urem32(i32 %dividend, i32 %divisor) nounwind { +entry: + %result = urem i32 %dividend, %divisor + ret i32 %result +} + +; CHECK: test_urem32: +; CHECK: xorl +; CHECK: divl diff --git a/test/CodeGen/X86/fast-isel-expect.ll b/test/CodeGen/X86/fast-isel-expect.ll index 1f53348..c4be7f3 100644 --- a/test/CodeGen/X86/fast-isel-expect.ll +++ b/test/CodeGen/X86/fast-isel-expect.ll @@ -5,7 +5,7 @@ target triple = "x86_64-unknown-linux-gnu" @glbl = extern_weak constant i8 -declare i64 @llvm.expect.i64(i64, i64) #0 +declare i64 @llvm.expect.i64(i64, i64) define void @test() { ; CHECK: movl $glbl @@ -19,5 +19,3 @@ bb1: bb2: unreachable } - -attributes #0 = { nounwind readnone } diff --git a/test/CodeGen/X86/fast-isel-fneg.ll b/test/CodeGen/X86/fast-isel-fneg.ll index f42a4a2..67fdad2 100644 --- a/test/CodeGen/X86/fast-isel-fneg.ll +++ b/test/CodeGen/X86/fast-isel-fneg.ll @@ -1,5 +1,9 @@ ; RUN: llc < %s -fast-isel -fast-isel-abort -mtriple=x86_64-apple-darwin10 | FileCheck %s -; RUN: llc < %s -fast-isel -march=x86 -mattr=+sse2 | grep xor | count 2 +; RUN: llc < %s -fast-isel -march=x86 -mattr=+sse2 | FileCheck --check-prefix=SSE2 %s + +; SSE2: xor +; SSE2: xor +; SSE2-NOT: xor ; CHECK: doo: ; CHECK: xor diff --git a/test/CodeGen/X86/fast-isel-gv.ll b/test/CodeGen/X86/fast-isel-gv.ll index cb2464e..de75095 100644 --- a/test/CodeGen/X86/fast-isel-gv.ll +++ b/test/CodeGen/X86/fast-isel-gv.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -fast-isel | grep "_kill@GOTPCREL(%rip)" +; RUN: llc < %s -fast-isel | FileCheck %s +; CHECK: _kill@GOTPCREL(%rip) + target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-apple-darwin10.0" @f = global i8 (...)* @kill ; <i8 (...)**> [#uses=1] diff --git a/test/CodeGen/X86/fast-isel-tailcall.ll b/test/CodeGen/X86/fast-isel-tailcall.ll index c3e527c..79ff79d 100644 --- a/test/CodeGen/X86/fast-isel-tailcall.ll +++ b/test/CodeGen/X86/fast-isel-tailcall.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -fast-isel -tailcallopt -march=x86 | not grep add +; RUN: llc < %s -fast-isel -tailcallopt -march=x86 | FileCheck %s +; CHECK-NOT: add ; PR4154 ; On x86, -tailcallopt changes the ABI so the caller shouldn't readjust diff --git a/test/CodeGen/X86/fast-isel-unaligned-store.ll b/test/CodeGen/X86/fast-isel-unaligned-store.ll new file mode 100644 index 0000000..7ce7f67 --- /dev/null +++ b/test/CodeGen/X86/fast-isel-unaligned-store.ll @@ -0,0 +1,18 @@ +; RUN: llc -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort < %s | FileCheck %s +; RUN: llc -mtriple=i686-none-linux -fast-isel -fast-isel-abort < %s | FileCheck %s + +define i32 @test_store_32(i32* nocapture %addr, i32 %value) { +entry: + store i32 %value, i32* %addr, align 1 + ret i32 %value +} + +; CHECK: ret + +define i16 @test_store_16(i16* nocapture %addr, i16 %value) { +entry: + store i16 %value, i16* %addr, align 1 + ret i16 %value +} + +; CHECK: ret diff --git a/test/CodeGen/X86/fastcall-correct-mangling.ll b/test/CodeGen/X86/fastcall-correct-mangling.ll index 33b18bb..3569d36 100644 --- a/test/CodeGen/X86/fastcall-correct-mangling.ll +++ b/test/CodeGen/X86/fastcall-correct-mangling.ll @@ -7,3 +7,8 @@ define x86_fastcallcc void @func(i64 %X, i8 %Y, i8 %G, i16 %Z) { ret void } +define x86_fastcallcc i32 @"\01DoNotMangle"(i32 %a) { +; CHECK: DoNotMangle: +entry: + ret i32 %a +} diff --git a/test/CodeGen/X86/fastcc-2.ll b/test/CodeGen/X86/fastcc-2.ll index d044a2a..e11cdd1 100644 --- a/test/CodeGen/X86/fastcc-2.ll +++ b/test/CodeGen/X86/fastcc-2.ll @@ -1,5 +1,6 @@ -; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | grep movsd -; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | grep mov | count 1 +; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | FileCheck %s +; CHECK: movsd +; CHECK-NOT: mov define i32 @foo() nounwind { entry: diff --git a/test/CodeGen/X86/fastcc-byval.ll b/test/CodeGen/X86/fastcc-byval.ll index f1204d6..e6828e4 100644 --- a/test/CodeGen/X86/fastcc-byval.ll +++ b/test/CodeGen/X86/fastcc-byval.ll @@ -1,4 +1,8 @@ -; RUN: llc < %s -tailcallopt=false | grep "movl[[:space:]]*8(%esp), %eax" | count 2 +; RUN: llc < %s -tailcallopt=false | FileCheck %s +; CHECK: movl 8(%esp), %eax +; CHECK: movl 8(%esp), %eax +; CHECK-NOT: movl 8(%esp), %eax + ; PR3122 ; rdar://6400815 diff --git a/test/CodeGen/X86/fastcc-sret.ll b/test/CodeGen/X86/fastcc-sret.ll index d457418..97814db 100644 --- a/test/CodeGen/X86/fastcc-sret.ll +++ b/test/CodeGen/X86/fastcc-sret.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 -tailcallopt=false | grep ret | not grep 4 +; RUN: llc < %s -march=x86 -tailcallopt=false | FileCheck %s %struct.foo = type { [4 x i32] } @@ -9,6 +9,8 @@ entry: store i32 1, i32* %tmp3, align 8 ret void } +; CHECK: bar +; CHECK: ret{{[^4]*$}} @dst = external global i32 @@ -21,3 +23,5 @@ define void @foo() nounwind { store i32 %tmp6, i32* @dst ret void } +; CHECK: foo +; CHECK: ret{{[^4]*$}} diff --git a/test/CodeGen/X86/fastcc3struct.ll b/test/CodeGen/X86/fastcc3struct.ll index 84f8ef6..98dc2f5 100644 --- a/test/CodeGen/X86/fastcc3struct.ll +++ b/test/CodeGen/X86/fastcc3struct.ll @@ -1,7 +1,8 @@ -; RUN: llc < %s -march=x86 -o %t -; RUN: grep "movl .48, %ecx" %t -; RUN: grep "movl .24, %edx" %t -; RUN: grep "movl .12, %eax" %t +; RUN: llc < %s -march=x86 | FileCheck %s + +; CHECK: movl {{.}}12, %eax +; CHECK: movl {{.}}24, %edx +; CHECK: movl {{.}}48, %ecx %0 = type { i32, i32, i32 } diff --git a/test/CodeGen/X86/fma3-intrinsics.ll b/test/CodeGen/X86/fma3-intrinsics.ll index e3910a6..e3910a6 100755..100644 --- a/test/CodeGen/X86/fma3-intrinsics.ll +++ b/test/CodeGen/X86/fma3-intrinsics.ll diff --git a/test/CodeGen/X86/fold-imm.ll b/test/CodeGen/X86/fold-imm.ll index f1fcbcf..16e4786 100644 --- a/test/CodeGen/X86/fold-imm.ll +++ b/test/CodeGen/X86/fold-imm.ll @@ -1,5 +1,4 @@ -; RUN: llc < %s -march=x86 | grep inc -; RUN: llc < %s -march=x86 | grep add | grep 4 +; RUN: llc < %s -march=x86 | FileCheck %s define i32 @test(i32 %X) nounwind { entry: @@ -7,8 +6,16 @@ entry: ret i32 %0 } +; CHECK: test +; CHECK: inc +; CHECK: ret + define i32 @test2(i32 %X) nounwind { entry: %0 = add i32 %X, 4 ret i32 %0 } + +; CHECK: test2 +; CHECK: {{add.*4.*$}} +; CHECK: ret diff --git a/test/CodeGen/X86/fp-immediate-shorten.ll b/test/CodeGen/X86/fp-immediate-shorten.ll index 62d8100..dc59c5a 100644 --- a/test/CodeGen/X86/fp-immediate-shorten.ll +++ b/test/CodeGen/X86/fp-immediate-shorten.ll @@ -1,7 +1,8 @@ ;; Test that this FP immediate is stored in the constant pool as a float. -; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3 | \ -; RUN: grep ".long.1123418112" +; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3 | FileCheck %s + +; CHECK: {{.long.1123418112}} define double @D() { ret double 1.230000e+02 diff --git a/test/CodeGen/X86/fp_load_cast_fold.ll b/test/CodeGen/X86/fp_load_cast_fold.ll index a160ac6..72ea12f 100644 --- a/test/CodeGen/X86/fp_load_cast_fold.ll +++ b/test/CodeGen/X86/fp_load_cast_fold.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | grep fild | not grep ESP +; RUN: llc < %s -march=x86 | FileCheck %s define double @short(i16* %P) { %V = load i16* %P ; <i16> [#uses=1] @@ -18,3 +18,9 @@ define double @long(i64* %P) { ret double %V2 } +; CHECK: long +; CHECK: fild +; CHECK-NOT: ESP +; CHECK-NOT: esp +; CHECK: {{$}} +; CHECK: ret diff --git a/test/CodeGen/X86/handle-move.ll b/test/CodeGen/X86/handle-move.ll index 93441cd..ba96275 100644 --- a/test/CodeGen/X86/handle-move.ll +++ b/test/CodeGen/X86/handle-move.ll @@ -1,7 +1,6 @@ ; RUN: llc -march=x86-64 -mcpu=core2 -fast-isel -enable-misched -misched=shuffle -misched-bottomup -verify-machineinstrs < %s ; RUN: llc -march=x86-64 -mcpu=core2 -fast-isel -enable-misched -misched=shuffle -misched-topdown -verify-machineinstrs < %s ; REQUIRES: asserts -; XFAIL: cygwin,mingw32 ; ; Test the LiveIntervals::handleMove() function. ; diff --git a/test/CodeGen/X86/long-setcc.ll b/test/CodeGen/X86/long-setcc.ll index e0165fb..13046d8 100644 --- a/test/CodeGen/X86/long-setcc.ll +++ b/test/CodeGen/X86/long-setcc.ll @@ -1,18 +1,31 @@ -; RUN: llc < %s -march=x86 | grep cmp | count 1 -; RUN: llc < %s -march=x86 | grep shr | count 1 -; RUN: llc < %s -march=x86 | grep xor | count 1 +; RUN: llc < %s -march=x86 | FileCheck %s define i1 @t1(i64 %x) nounwind { %B = icmp slt i64 %x, 0 ret i1 %B } +; CHECK: t1 +; CHECK: shrl +; CHECK-NOT: shrl +; CHECK: ret + define i1 @t2(i64 %x) nounwind { %tmp = icmp ult i64 %x, 4294967296 ret i1 %tmp } +; CHECK: t2 +; CHECK: cmp +; CHECK-NOT: cmp +; CHECK: ret + define i1 @t3(i32 %x) nounwind { %tmp = icmp ugt i32 %x, -1 ret i1 %tmp } + +; CHECK: t3 +; CHECK: xor +; CHECK-NOT: xor +; CHECK: ret diff --git a/test/CodeGen/X86/lsr-normalization.ll b/test/CodeGen/X86/lsr-normalization.ll index 932141d..bbf8f01 100644 --- a/test/CodeGen/X86/lsr-normalization.ll +++ b/test/CodeGen/X86/lsr-normalization.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 | grep div | count 1 +; RUN: llc < %s -march=x86-64 | FileCheck %s ; rdar://8168938 ; This testcase involves SCEV normalization with the exit value from @@ -6,6 +6,9 @@ ; loop. The expression should be properly normalized and simplified, ; and require only a single division. +; CHECK: div +; CHECK-NOT: div + %0 = type { %0*, %0* } @0 = private constant [13 x i8] c"Result: %lu\0A\00" ; <[13 x i8]*> [#uses=1] diff --git a/test/CodeGen/X86/lsr-static-addr.ll b/test/CodeGen/X86/lsr-static-addr.ll index 6566f56..b2aea90 100644 --- a/test/CodeGen/X86/lsr-static-addr.ll +++ b/test/CodeGen/X86/lsr-static-addr.ll @@ -17,7 +17,7 @@ ; ATOM-NEXT: movsd A(,%rax,8) ; ATOM-NEXT: mulsd ; ATOM-NEXT: movsd -; ATOM-NEXT: incq %rax +; ATOM-NEXT: leaq 1(%rax), %rax @A = external global [0 x double] diff --git a/test/CodeGen/X86/misched-copy.ll b/test/CodeGen/X86/misched-copy.ll new file mode 100644 index 0000000..0450cfb --- /dev/null +++ b/test/CodeGen/X86/misched-copy.ll @@ -0,0 +1,49 @@ +; REQUIRES: asserts +; RUN: llc < %s -march=x86 -mcpu=core2 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s +; +; Test scheduling of copy instructions. +; +; Argument copies should be hoisted to the top of the block. +; Return copies should be sunk to the end. +; MUL_HiLo PhysReg use copies should be just above the mul. +; MUL_HiLo PhysReg def copies should be just below the mul. +; +; CHECK: *** Final schedule for BB#1 *** +; CHECK-NEXT: %EAX<def> = COPY +; CHECK: MUL32r %vreg{{[0-9]+}}, %EAX<imp-def>, %EDX<imp-def>, %EFLAGS<imp-def,dead>, %EAX<imp-use>; +; CHECK-NEXT: COPY %E{{[AD]}}X; +; CHECK-NEXT: COPY %E{{[AD]}}X; +; CHECK: DIVSSrm +define i64 @mulhoist(i32 %a, i32 %b) #0 { +entry: + br label %body + +body: + %convb = sitofp i32 %b to float + ; Generates an iMUL64r to legalize types. + %aa = zext i32 %a to i64 + %mul = mul i64 %aa, 74383 + ; Do some dependent long latency stuff. + %trunc = trunc i64 %mul to i32 + %convm = sitofp i32 %trunc to float + %divm = fdiv float %convm, 0.75 + ;%addmb = fadd float %divm, %convb + ;%divmb = fdiv float %addmb, 0.125 + ; Do some independent long latency stuff. + %conva = sitofp i32 %a to float + %diva = fdiv float %conva, 0.75 + %addab = fadd float %diva, %convb + %divab = fdiv float %addab, 0.125 + br label %end + +end: + %val = fptosi float %divab to i64 + %add = add i64 %mul, %val + ret i64 %add +} + +attributes #0 = { nounwind ssp uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } + +!0 = metadata !{metadata !"float", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/X86/misched-ilp.ll b/test/CodeGen/X86/misched-ilp.ll index c6cedb7..4ca296c 100644 --- a/test/CodeGen/X86/misched-ilp.ll +++ b/test/CodeGen/X86/misched-ilp.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mtriple=x86_64-apple-macosx -mcpu=core2 -enable-misched -misched=ilpmax | FileCheck -check-prefix=MAX %s -; RUN: llc < %s -mtriple=x86_64-apple-macosx -mcpu=core2 -enable-misched -misched=ilpmin | FileCheck -check-prefix=MIN %s +; RUN: llc < %s -mtriple=x86_64-apple-macosx -mcpu=nocona -enable-misched -misched=ilpmax | FileCheck -check-prefix=MAX %s +; RUN: llc < %s -mtriple=x86_64-apple-macosx -mcpu=nocona -enable-misched -misched=ilpmin | FileCheck -check-prefix=MIN %s ; ; Basic verification of the ScheduleDAGILP metric. ; diff --git a/test/CodeGen/X86/misched-matmul.ll b/test/CodeGen/X86/misched-matmul.ll new file mode 100644 index 0000000..15e8a0a --- /dev/null +++ b/test/CodeGen/X86/misched-matmul.ll @@ -0,0 +1,224 @@ +; REQUIRES: asserts +; RUN: llc < %s -march=x86-64 -mcpu=core2 -pre-RA-sched=source -enable-misched -stats 2>&1 | FileCheck %s +; +; Verify that register pressure heuristics are working in MachineScheduler. +; +; When we enable subtree scheduling heuristics on X86, we may need a +; flag to disable it for this test case. +; +; CHECK: @wrap_mul4 +; CHECK: 30 regalloc - Number of spills inserted + +define void @wrap_mul4(double* nocapture %Out, [4 x double]* nocapture %A, [4 x double]* nocapture %B) #0 { +entry: + %arrayidx1.i = getelementptr inbounds [4 x double]* %A, i64 0, i64 0 + %0 = load double* %arrayidx1.i, align 8 + %arrayidx3.i = getelementptr inbounds [4 x double]* %B, i64 0, i64 0 + %1 = load double* %arrayidx3.i, align 8 + %mul.i = fmul double %0, %1 + %arrayidx5.i = getelementptr inbounds [4 x double]* %A, i64 0, i64 1 + %2 = load double* %arrayidx5.i, align 8 + %arrayidx7.i = getelementptr inbounds [4 x double]* %B, i64 1, i64 0 + %3 = load double* %arrayidx7.i, align 8 + %mul8.i = fmul double %2, %3 + %add.i = fadd double %mul.i, %mul8.i + %arrayidx10.i = getelementptr inbounds [4 x double]* %A, i64 0, i64 2 + %4 = load double* %arrayidx10.i, align 8 + %arrayidx12.i = getelementptr inbounds [4 x double]* %B, i64 2, i64 0 + %5 = load double* %arrayidx12.i, align 8 + %mul13.i = fmul double %4, %5 + %add14.i = fadd double %add.i, %mul13.i + %arrayidx16.i = getelementptr inbounds [4 x double]* %A, i64 0, i64 3 + %6 = load double* %arrayidx16.i, align 8 + %arrayidx18.i = getelementptr inbounds [4 x double]* %B, i64 3, i64 0 + %7 = load double* %arrayidx18.i, align 8 + %mul19.i = fmul double %6, %7 + %add20.i = fadd double %add14.i, %mul19.i + %arrayidx25.i = getelementptr inbounds [4 x double]* %B, i64 0, i64 1 + %8 = load double* %arrayidx25.i, align 8 + %mul26.i = fmul double %0, %8 + %arrayidx30.i = getelementptr inbounds [4 x double]* %B, i64 1, i64 1 + %9 = load double* %arrayidx30.i, align 8 + %mul31.i = fmul double %2, %9 + %add32.i = fadd double %mul26.i, %mul31.i + %arrayidx36.i = getelementptr inbounds [4 x double]* %B, i64 2, i64 1 + %10 = load double* %arrayidx36.i, align 8 + %mul37.i = fmul double %4, %10 + %add38.i = fadd double %add32.i, %mul37.i + %arrayidx42.i = getelementptr inbounds [4 x double]* %B, i64 3, i64 1 + %11 = load double* %arrayidx42.i, align 8 + %mul43.i = fmul double %6, %11 + %add44.i = fadd double %add38.i, %mul43.i + %arrayidx49.i = getelementptr inbounds [4 x double]* %B, i64 0, i64 2 + %12 = load double* %arrayidx49.i, align 8 + %mul50.i = fmul double %0, %12 + %arrayidx54.i = getelementptr inbounds [4 x double]* %B, i64 1, i64 2 + %13 = load double* %arrayidx54.i, align 8 + %mul55.i = fmul double %2, %13 + %add56.i = fadd double %mul50.i, %mul55.i + %arrayidx60.i = getelementptr inbounds [4 x double]* %B, i64 2, i64 2 + %14 = load double* %arrayidx60.i, align 8 + %mul61.i = fmul double %4, %14 + %add62.i = fadd double %add56.i, %mul61.i + %arrayidx66.i = getelementptr inbounds [4 x double]* %B, i64 3, i64 2 + %15 = load double* %arrayidx66.i, align 8 + %mul67.i = fmul double %6, %15 + %add68.i = fadd double %add62.i, %mul67.i + %arrayidx73.i = getelementptr inbounds [4 x double]* %B, i64 0, i64 3 + %16 = load double* %arrayidx73.i, align 8 + %mul74.i = fmul double %0, %16 + %arrayidx78.i = getelementptr inbounds [4 x double]* %B, i64 1, i64 3 + %17 = load double* %arrayidx78.i, align 8 + %mul79.i = fmul double %2, %17 + %add80.i = fadd double %mul74.i, %mul79.i + %arrayidx84.i = getelementptr inbounds [4 x double]* %B, i64 2, i64 3 + %18 = load double* %arrayidx84.i, align 8 + %mul85.i = fmul double %4, %18 + %add86.i = fadd double %add80.i, %mul85.i + %arrayidx90.i = getelementptr inbounds [4 x double]* %B, i64 3, i64 3 + %19 = load double* %arrayidx90.i, align 8 + %mul91.i = fmul double %6, %19 + %add92.i = fadd double %add86.i, %mul91.i + %arrayidx95.i = getelementptr inbounds [4 x double]* %A, i64 1, i64 0 + %20 = load double* %arrayidx95.i, align 8 + %mul98.i = fmul double %1, %20 + %arrayidx100.i = getelementptr inbounds [4 x double]* %A, i64 1, i64 1 + %21 = load double* %arrayidx100.i, align 8 + %mul103.i = fmul double %3, %21 + %add104.i = fadd double %mul98.i, %mul103.i + %arrayidx106.i = getelementptr inbounds [4 x double]* %A, i64 1, i64 2 + %22 = load double* %arrayidx106.i, align 8 + %mul109.i = fmul double %5, %22 + %add110.i = fadd double %add104.i, %mul109.i + %arrayidx112.i = getelementptr inbounds [4 x double]* %A, i64 1, i64 3 + %23 = load double* %arrayidx112.i, align 8 + %mul115.i = fmul double %7, %23 + %add116.i = fadd double %add110.i, %mul115.i + %mul122.i = fmul double %8, %20 + %mul127.i = fmul double %9, %21 + %add128.i = fadd double %mul122.i, %mul127.i + %mul133.i = fmul double %10, %22 + %add134.i = fadd double %add128.i, %mul133.i + %mul139.i = fmul double %11, %23 + %add140.i = fadd double %add134.i, %mul139.i + %mul146.i = fmul double %12, %20 + %mul151.i = fmul double %13, %21 + %add152.i = fadd double %mul146.i, %mul151.i + %mul157.i = fmul double %14, %22 + %add158.i = fadd double %add152.i, %mul157.i + %mul163.i = fmul double %15, %23 + %add164.i = fadd double %add158.i, %mul163.i + %mul170.i = fmul double %16, %20 + %mul175.i = fmul double %17, %21 + %add176.i = fadd double %mul170.i, %mul175.i + %mul181.i = fmul double %18, %22 + %add182.i = fadd double %add176.i, %mul181.i + %mul187.i = fmul double %19, %23 + %add188.i = fadd double %add182.i, %mul187.i + %arrayidx191.i = getelementptr inbounds [4 x double]* %A, i64 2, i64 0 + %24 = load double* %arrayidx191.i, align 8 + %mul194.i = fmul double %1, %24 + %arrayidx196.i = getelementptr inbounds [4 x double]* %A, i64 2, i64 1 + %25 = load double* %arrayidx196.i, align 8 + %mul199.i = fmul double %3, %25 + %add200.i = fadd double %mul194.i, %mul199.i + %arrayidx202.i = getelementptr inbounds [4 x double]* %A, i64 2, i64 2 + %26 = load double* %arrayidx202.i, align 8 + %mul205.i = fmul double %5, %26 + %add206.i = fadd double %add200.i, %mul205.i + %arrayidx208.i = getelementptr inbounds [4 x double]* %A, i64 2, i64 3 + %27 = load double* %arrayidx208.i, align 8 + %mul211.i = fmul double %7, %27 + %add212.i = fadd double %add206.i, %mul211.i + %mul218.i = fmul double %8, %24 + %mul223.i = fmul double %9, %25 + %add224.i = fadd double %mul218.i, %mul223.i + %mul229.i = fmul double %10, %26 + %add230.i = fadd double %add224.i, %mul229.i + %mul235.i = fmul double %11, %27 + %add236.i = fadd double %add230.i, %mul235.i + %mul242.i = fmul double %12, %24 + %mul247.i = fmul double %13, %25 + %add248.i = fadd double %mul242.i, %mul247.i + %mul253.i = fmul double %14, %26 + %add254.i = fadd double %add248.i, %mul253.i + %mul259.i = fmul double %15, %27 + %add260.i = fadd double %add254.i, %mul259.i + %mul266.i = fmul double %16, %24 + %mul271.i = fmul double %17, %25 + %add272.i = fadd double %mul266.i, %mul271.i + %mul277.i = fmul double %18, %26 + %add278.i = fadd double %add272.i, %mul277.i + %mul283.i = fmul double %19, %27 + %add284.i = fadd double %add278.i, %mul283.i + %arrayidx287.i = getelementptr inbounds [4 x double]* %A, i64 3, i64 0 + %28 = load double* %arrayidx287.i, align 8 + %mul290.i = fmul double %1, %28 + %arrayidx292.i = getelementptr inbounds [4 x double]* %A, i64 3, i64 1 + %29 = load double* %arrayidx292.i, align 8 + %mul295.i = fmul double %3, %29 + %add296.i = fadd double %mul290.i, %mul295.i + %arrayidx298.i = getelementptr inbounds [4 x double]* %A, i64 3, i64 2 + %30 = load double* %arrayidx298.i, align 8 + %mul301.i = fmul double %5, %30 + %add302.i = fadd double %add296.i, %mul301.i + %arrayidx304.i = getelementptr inbounds [4 x double]* %A, i64 3, i64 3 + %31 = load double* %arrayidx304.i, align 8 + %mul307.i = fmul double %7, %31 + %add308.i = fadd double %add302.i, %mul307.i + %mul314.i = fmul double %8, %28 + %mul319.i = fmul double %9, %29 + %add320.i = fadd double %mul314.i, %mul319.i + %mul325.i = fmul double %10, %30 + %add326.i = fadd double %add320.i, %mul325.i + %mul331.i = fmul double %11, %31 + %add332.i = fadd double %add326.i, %mul331.i + %mul338.i = fmul double %12, %28 + %mul343.i = fmul double %13, %29 + %add344.i = fadd double %mul338.i, %mul343.i + %mul349.i = fmul double %14, %30 + %add350.i = fadd double %add344.i, %mul349.i + %mul355.i = fmul double %15, %31 + %add356.i = fadd double %add350.i, %mul355.i + %mul362.i = fmul double %16, %28 + %mul367.i = fmul double %17, %29 + %add368.i = fadd double %mul362.i, %mul367.i + %mul373.i = fmul double %18, %30 + %add374.i = fadd double %add368.i, %mul373.i + %mul379.i = fmul double %19, %31 + %add380.i = fadd double %add374.i, %mul379.i + store double %add20.i, double* %Out, align 8 + %Res.i.sroa.1.8.idx2 = getelementptr inbounds double* %Out, i64 1 + store double %add44.i, double* %Res.i.sroa.1.8.idx2, align 8 + %Res.i.sroa.2.16.idx4 = getelementptr inbounds double* %Out, i64 2 + store double %add68.i, double* %Res.i.sroa.2.16.idx4, align 8 + %Res.i.sroa.3.24.idx6 = getelementptr inbounds double* %Out, i64 3 + store double %add92.i, double* %Res.i.sroa.3.24.idx6, align 8 + %Res.i.sroa.4.32.idx8 = getelementptr inbounds double* %Out, i64 4 + store double %add116.i, double* %Res.i.sroa.4.32.idx8, align 8 + %Res.i.sroa.5.40.idx10 = getelementptr inbounds double* %Out, i64 5 + store double %add140.i, double* %Res.i.sroa.5.40.idx10, align 8 + %Res.i.sroa.6.48.idx12 = getelementptr inbounds double* %Out, i64 6 + store double %add164.i, double* %Res.i.sroa.6.48.idx12, align 8 + %Res.i.sroa.7.56.idx14 = getelementptr inbounds double* %Out, i64 7 + store double %add188.i, double* %Res.i.sroa.7.56.idx14, align 8 + %Res.i.sroa.8.64.idx16 = getelementptr inbounds double* %Out, i64 8 + store double %add212.i, double* %Res.i.sroa.8.64.idx16, align 8 + %Res.i.sroa.9.72.idx18 = getelementptr inbounds double* %Out, i64 9 + store double %add236.i, double* %Res.i.sroa.9.72.idx18, align 8 + %Res.i.sroa.10.80.idx20 = getelementptr inbounds double* %Out, i64 10 + store double %add260.i, double* %Res.i.sroa.10.80.idx20, align 8 + %Res.i.sroa.11.88.idx22 = getelementptr inbounds double* %Out, i64 11 + store double %add284.i, double* %Res.i.sroa.11.88.idx22, align 8 + %Res.i.sroa.12.96.idx24 = getelementptr inbounds double* %Out, i64 12 + store double %add308.i, double* %Res.i.sroa.12.96.idx24, align 8 + %Res.i.sroa.13.104.idx26 = getelementptr inbounds double* %Out, i64 13 + store double %add332.i, double* %Res.i.sroa.13.104.idx26, align 8 + %Res.i.sroa.14.112.idx28 = getelementptr inbounds double* %Out, i64 14 + store double %add356.i, double* %Res.i.sroa.14.112.idx28, align 8 + %Res.i.sroa.15.120.idx30 = getelementptr inbounds double* %Out, i64 15 + store double %add380.i, double* %Res.i.sroa.15.120.idx30, align 8 + ret void +} + +attributes #0 = { noinline nounwind ssp uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } diff --git a/test/CodeGen/X86/misched-matrix.ll b/test/CodeGen/X86/misched-matrix.ll index f5566e5..4dc95c5 100644 --- a/test/CodeGen/X86/misched-matrix.ll +++ b/test/CodeGen/X86/misched-matrix.ll @@ -94,57 +94,57 @@ entry: for.body: ; preds = %for.body, %entry %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] %arrayidx8 = getelementptr inbounds [4 x i32]* %m1, i64 %indvars.iv, i64 0 - %tmp = load i32* %arrayidx8, align 4, !tbaa !0 + %tmp = load i32* %arrayidx8, align 4 %arrayidx12 = getelementptr inbounds [4 x i32]* %m2, i64 0, i64 0 - %tmp1 = load i32* %arrayidx12, align 4, !tbaa !0 + %tmp1 = load i32* %arrayidx12, align 4 %arrayidx8.1 = getelementptr inbounds [4 x i32]* %m1, i64 %indvars.iv, i64 1 - %tmp2 = load i32* %arrayidx8.1, align 4, !tbaa !0 + %tmp2 = load i32* %arrayidx8.1, align 4 %arrayidx12.1 = getelementptr inbounds [4 x i32]* %m2, i64 1, i64 0 - %tmp3 = load i32* %arrayidx12.1, align 4, !tbaa !0 + %tmp3 = load i32* %arrayidx12.1, align 4 %arrayidx8.2 = getelementptr inbounds [4 x i32]* %m1, i64 %indvars.iv, i64 2 - %tmp4 = load i32* %arrayidx8.2, align 4, !tbaa !0 + %tmp4 = load i32* %arrayidx8.2, align 4 %arrayidx12.2 = getelementptr inbounds [4 x i32]* %m2, i64 2, i64 0 - %tmp5 = load i32* %arrayidx12.2, align 4, !tbaa !0 + %tmp5 = load i32* %arrayidx12.2, align 4 %arrayidx8.3 = getelementptr inbounds [4 x i32]* %m1, i64 %indvars.iv, i64 3 - %tmp6 = load i32* %arrayidx8.3, align 4, !tbaa !0 + %tmp6 = load i32* %arrayidx8.3, align 4 %arrayidx12.3 = getelementptr inbounds [4 x i32]* %m2, i64 3, i64 0 - %tmp8 = load i32* %arrayidx8, align 4, !tbaa !0 + %tmp8 = load i32* %arrayidx8, align 4 %arrayidx12.137 = getelementptr inbounds [4 x i32]* %m2, i64 0, i64 1 - %tmp9 = load i32* %arrayidx12.137, align 4, !tbaa !0 - %tmp10 = load i32* %arrayidx8.1, align 4, !tbaa !0 + %tmp9 = load i32* %arrayidx12.137, align 4 + %tmp10 = load i32* %arrayidx8.1, align 4 %arrayidx12.1.1 = getelementptr inbounds [4 x i32]* %m2, i64 1, i64 1 - %tmp11 = load i32* %arrayidx12.1.1, align 4, !tbaa !0 - %tmp12 = load i32* %arrayidx8.2, align 4, !tbaa !0 + %tmp11 = load i32* %arrayidx12.1.1, align 4 + %tmp12 = load i32* %arrayidx8.2, align 4 %arrayidx12.2.1 = getelementptr inbounds [4 x i32]* %m2, i64 2, i64 1 - %tmp13 = load i32* %arrayidx12.2.1, align 4, !tbaa !0 - %tmp14 = load i32* %arrayidx8.3, align 4, !tbaa !0 + %tmp13 = load i32* %arrayidx12.2.1, align 4 + %tmp14 = load i32* %arrayidx8.3, align 4 %arrayidx12.3.1 = getelementptr inbounds [4 x i32]* %m2, i64 3, i64 1 - %tmp15 = load i32* %arrayidx12.3.1, align 4, !tbaa !0 - %tmp16 = load i32* %arrayidx8, align 4, !tbaa !0 + %tmp15 = load i32* %arrayidx12.3.1, align 4 + %tmp16 = load i32* %arrayidx8, align 4 %arrayidx12.239 = getelementptr inbounds [4 x i32]* %m2, i64 0, i64 2 - %tmp17 = load i32* %arrayidx12.239, align 4, !tbaa !0 - %tmp18 = load i32* %arrayidx8.1, align 4, !tbaa !0 + %tmp17 = load i32* %arrayidx12.239, align 4 + %tmp18 = load i32* %arrayidx8.1, align 4 %arrayidx12.1.2 = getelementptr inbounds [4 x i32]* %m2, i64 1, i64 2 - %tmp19 = load i32* %arrayidx12.1.2, align 4, !tbaa !0 - %tmp20 = load i32* %arrayidx8.2, align 4, !tbaa !0 + %tmp19 = load i32* %arrayidx12.1.2, align 4 + %tmp20 = load i32* %arrayidx8.2, align 4 %arrayidx12.2.2 = getelementptr inbounds [4 x i32]* %m2, i64 2, i64 2 - %tmp21 = load i32* %arrayidx12.2.2, align 4, !tbaa !0 - %tmp22 = load i32* %arrayidx8.3, align 4, !tbaa !0 + %tmp21 = load i32* %arrayidx12.2.2, align 4 + %tmp22 = load i32* %arrayidx8.3, align 4 %arrayidx12.3.2 = getelementptr inbounds [4 x i32]* %m2, i64 3, i64 2 - %tmp23 = load i32* %arrayidx12.3.2, align 4, !tbaa !0 - %tmp24 = load i32* %arrayidx8, align 4, !tbaa !0 + %tmp23 = load i32* %arrayidx12.3.2, align 4 + %tmp24 = load i32* %arrayidx8, align 4 %arrayidx12.341 = getelementptr inbounds [4 x i32]* %m2, i64 0, i64 3 - %tmp25 = load i32* %arrayidx12.341, align 4, !tbaa !0 - %tmp26 = load i32* %arrayidx8.1, align 4, !tbaa !0 + %tmp25 = load i32* %arrayidx12.341, align 4 + %tmp26 = load i32* %arrayidx8.1, align 4 %arrayidx12.1.3 = getelementptr inbounds [4 x i32]* %m2, i64 1, i64 3 - %tmp27 = load i32* %arrayidx12.1.3, align 4, !tbaa !0 - %tmp28 = load i32* %arrayidx8.2, align 4, !tbaa !0 + %tmp27 = load i32* %arrayidx12.1.3, align 4 + %tmp28 = load i32* %arrayidx8.2, align 4 %arrayidx12.2.3 = getelementptr inbounds [4 x i32]* %m2, i64 2, i64 3 - %tmp29 = load i32* %arrayidx12.2.3, align 4, !tbaa !0 - %tmp30 = load i32* %arrayidx8.3, align 4, !tbaa !0 + %tmp29 = load i32* %arrayidx12.2.3, align 4 + %tmp30 = load i32* %arrayidx8.3, align 4 %arrayidx12.3.3 = getelementptr inbounds [4 x i32]* %m2, i64 3, i64 3 - %tmp31 = load i32* %arrayidx12.3.3, align 4, !tbaa !0 - %tmp7 = load i32* %arrayidx12.3, align 4, !tbaa !0 + %tmp31 = load i32* %arrayidx12.3.3, align 4 + %tmp7 = load i32* %arrayidx12.3, align 4 %mul = mul nsw i32 %tmp1, %tmp %mul.1 = mul nsw i32 %tmp3, %tmp2 %mul.2 = mul nsw i32 %tmp5, %tmp4 @@ -174,13 +174,13 @@ for.body: ; preds = %for.body, %entry %add.2.3 = add nsw i32 %mul.2.3, %add.1.3 %add.3.3 = add nsw i32 %mul.3.3, %add.2.3 %arrayidx16 = getelementptr inbounds [4 x i32]* %m3, i64 %indvars.iv, i64 0 - store i32 %add.3, i32* %arrayidx16, align 4, !tbaa !0 + store i32 %add.3, i32* %arrayidx16, align 4 %arrayidx16.1 = getelementptr inbounds [4 x i32]* %m3, i64 %indvars.iv, i64 1 - store i32 %add.3.1, i32* %arrayidx16.1, align 4, !tbaa !0 + store i32 %add.3.1, i32* %arrayidx16.1, align 4 %arrayidx16.2 = getelementptr inbounds [4 x i32]* %m3, i64 %indvars.iv, i64 2 - store i32 %add.3.2, i32* %arrayidx16.2, align 4, !tbaa !0 + store i32 %add.3.2, i32* %arrayidx16.2, align 4 %arrayidx16.3 = getelementptr inbounds [4 x i32]* %m3, i64 %indvars.iv, i64 3 - store i32 %add.3.3, i32* %arrayidx16.3, align 4, !tbaa !0 + store i32 %add.3.3, i32* %arrayidx16.3, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, 4 @@ -189,7 +189,3 @@ for.body: ; preds = %for.body, %entry for.end: ; preds = %for.body ret void } - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/X86/mmx-pinsrw.ll b/test/CodeGen/X86/mmx-pinsrw.ll index d9c7c67..33dd2eb 100644 --- a/test/CodeGen/X86/mmx-pinsrw.ll +++ b/test/CodeGen/X86/mmx-pinsrw.ll @@ -1,6 +1,8 @@ -; RUN: llc < %s -mtriple=x86_64-linux -mcpu=corei7 | grep pinsr +; RUN: llc < %s -mtriple=x86_64-linux -mcpu=corei7 | FileCheck %s ; PR2562 +; CHECK: pinsr + external global i16 ; <i16*>:0 [#uses=1] external global <4 x i16> ; <<4 x i16>*>:1 [#uses=2] diff --git a/test/CodeGen/X86/movgs.ll b/test/CodeGen/X86/movgs.ll index 65ee7b1..bb42734 100644 --- a/test/CodeGen/X86/movgs.ll +++ b/test/CodeGen/X86/movgs.ll @@ -1,6 +1,6 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mattr=sse41 | FileCheck %s --check-prefix=X32 -; RUN: llc < %s -mtriple=x86_64-linux -mattr=sse41 | FileCheck %s --check-prefix=X64 -; RUN: llc < %s -mtriple=x86_64-win32 -mattr=sse41 | FileCheck %s --check-prefix=X64 +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -mcpu=penryn -mattr=sse41 | FileCheck %s --check-prefix=X32 +; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn -mattr=sse41 | FileCheck %s --check-prefix=X64 +; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=penryn -mattr=sse41 | FileCheck %s --check-prefix=X64 define i32 @test1() nounwind readonly { entry: diff --git a/test/CodeGen/X86/mul-legalize.ll b/test/CodeGen/X86/mul-legalize.ll index 069737d..339de31 100644 --- a/test/CodeGen/X86/mul-legalize.ll +++ b/test/CodeGen/X86/mul-legalize.ll @@ -1,6 +1,8 @@ -; RUN: llc < %s -march=x86 | grep 24576 +; RUN: llc < %s -march=x86 | FileCheck %s ; PR2135 +; CHECK: 24576 + target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" target triple = "i386-pc-linux-gnu" @.str = constant [13 x i8] c"c45531m.adb\00\00" diff --git a/test/CodeGen/X86/multiple-loop-post-inc.ll b/test/CodeGen/X86/multiple-loop-post-inc.ll index 9f7d036..29b9f34 100644 --- a/test/CodeGen/X86/multiple-loop-post-inc.ll +++ b/test/CodeGen/X86/multiple-loop-post-inc.ll @@ -1,4 +1,4 @@ -; RUN: llc -asm-verbose=false -disable-branch-fold -disable-code-place -disable-tail-duplicate -march=x86-64 -mcpu=nehalem < %s | FileCheck %s +; RUN: llc -asm-verbose=false -disable-branch-fold -disable-block-placement -disable-tail-duplicate -march=x86-64 -mcpu=nehalem < %s | FileCheck %s ; rdar://7236213 ; ; The scheduler's 2-address hack has been disabled, so there is diff --git a/test/CodeGen/X86/negative_zero.ll b/test/CodeGen/X86/negative_zero.ll index 29474c2..c8c2cd7 100644 --- a/test/CodeGen/X86/negative_zero.ll +++ b/test/CodeGen/X86/negative_zero.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3 | grep fchs +; RUN: llc < %s -march=x86 -mattr=-sse2,-sse3 | FileCheck %s + +; CHECK: fchs define double @T() { diff --git a/test/CodeGen/X86/no-compact-unwind.ll b/test/CodeGen/X86/no-compact-unwind.ll new file mode 100644 index 0000000..627f7da --- /dev/null +++ b/test/CodeGen/X86/no-compact-unwind.ll @@ -0,0 +1,56 @@ +; RUN: llc < %s -mtriple x86_64-apple-macosx10.8.0 -disable-cfi | FileCheck %s + +%"struct.dyld::MappedRanges" = type { [400 x %struct.anon], %"struct.dyld::MappedRanges"* } +%struct.anon = type { %class.ImageLoader*, i64, i64 } +%class.ImageLoader = type { i32 (...)**, i8*, i8*, i32, i64, i64, i32, i32, %"struct.ImageLoader::recursive_lock"*, i16, i16, [4 x i8] } +%"struct.ImageLoader::recursive_lock" = type { i32, i32 } + +@G1 = external hidden global %"struct.dyld::MappedRanges", align 8 + +declare void @OSMemoryBarrier() optsize + +; This compact unwind encoding indicates that we could not generate correct +; compact unwind encodings for this function. This then defaults to using the +; DWARF EH frame. +; +; CHECK: .section __LD,__compact_unwind,regular,debug +; CHECK: .quad _func +; CHECK: .long 67108864 ## Compact Unwind Encoding: 0x4000000 +; CHECK: .quad 0 ## Personality Function +; CHECK: .quad 0 ## LSDA +; +define void @func(%class.ImageLoader* %image) optsize ssp uwtable { +entry: + br label %for.cond1.preheader + +for.cond1.preheader: ; preds = %for.inc10, %entry + %p.019 = phi %"struct.dyld::MappedRanges"* [ @G1, %entry ], [ %1, %for.inc10 ] + br label %for.body3 + +for.body3: ; preds = %for.inc, %for.cond1.preheader + %indvars.iv = phi i64 [ 0, %for.cond1.preheader ], [ %indvars.iv.next, %for.inc ] + %image4 = getelementptr inbounds %"struct.dyld::MappedRanges"* %p.019, i64 0, i32 0, i64 %indvars.iv, i32 0 + %0 = load %class.ImageLoader** %image4, align 8 + %cmp5 = icmp eq %class.ImageLoader* %0, %image + br i1 %cmp5, label %if.then, label %for.inc + +if.then: ; preds = %for.body3 + tail call void @OSMemoryBarrier() optsize + store %class.ImageLoader* null, %class.ImageLoader** %image4, align 8 + br label %for.inc + +for.inc: ; preds = %if.then, %for.body3 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 400 + br i1 %exitcond, label %for.inc10, label %for.body3 + +for.inc10: ; preds = %for.inc + %next = getelementptr inbounds %"struct.dyld::MappedRanges"* %p.019, i64 0, i32 1 + %1 = load %"struct.dyld::MappedRanges"** %next, align 8 + %cmp = icmp eq %"struct.dyld::MappedRanges"* %1, null + br i1 %cmp, label %for.end11, label %for.cond1.preheader + +for.end11: ; preds = %for.inc10 + ret void +} diff --git a/test/CodeGen/X86/nosse-error1.ll b/test/CodeGen/X86/nosse-error1.ll index 16cbb73..cddff3f 100644 --- a/test/CodeGen/X86/nosse-error1.ll +++ b/test/CodeGen/X86/nosse-error1.ll @@ -1,7 +1,10 @@ -; RUN: llvm-as < %s > %t1 -; RUN: not llc -march=x86-64 -mattr=-sse < %t1 2> %t2 -; RUN: grep "SSE register return with SSE disabled" %t2 -; RUN: llc -march=x86-64 < %t1 | grep xmm +; RUN: llc < %s -march=x86-64 -mattr=-sse 2>&1 | FileCheck --check-prefix NOSSE %s +; RUN: llc < %s -march=x86-64 | FileCheck %s + +; NOSSE: {{SSE register return with SSE disabled}} + +; CHECK: xmm + target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" target triple = "x86_64-unknown-linux-gnu" @f = external global float ; <float*> [#uses=4] diff --git a/test/CodeGen/X86/nosse-error2.ll b/test/CodeGen/X86/nosse-error2.ll index 45a5eaf..fc9ba01 100644 --- a/test/CodeGen/X86/nosse-error2.ll +++ b/test/CodeGen/X86/nosse-error2.ll @@ -1,7 +1,10 @@ -; RUN: llvm-as < %s > %t1 -; RUN: not llc -march=x86 -mcpu=i686 -mattr=-sse < %t1 2> %t2 -; RUN: grep "SSE register return with SSE disabled" %t2 -; RUN: llc -march=x86 -mcpu=i686 -mattr=+sse < %t1 | grep xmm +; RUN: llc < %s -march=x86 -mcpu=i686 -mattr=-sse 2>&1 | FileCheck --check-prefix NOSSE %s +; RUN: llc < %s -march=x86 -mcpu=i686 -mattr=+sse | FileCheck %s + +; NOSSE: {{SSE register return with SSE disabled}} + +; CHECK: xmm + target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" target triple = "i386-unknown-linux-gnu" @f = external global float ; <float*> [#uses=4] diff --git a/test/CodeGen/X86/optimize-max-2.ll b/test/CodeGen/X86/optimize-max-2.ll index 8851c5b..10ab831 100644 --- a/test/CodeGen/X86/optimize-max-2.ll +++ b/test/CodeGen/X86/optimize-max-2.ll @@ -1,6 +1,8 @@ -; RUN: llc < %s -march=x86-64 > %t -; RUN: grep cmov %t | count 2 -; RUN: grep jne %t | count 1 +; RUN: llc < %s -march=x86-64 | grep cmov | count 2 +; RUN: llc < %s -march=x86-64 | FileCheck %s + +; CHECK: jne +; CHECK-NOT: jne ; LSR's OptimizeMax function shouldn't try to eliminate this max, because ; it has three operands. diff --git a/test/CodeGen/X86/peep-test-2.ll b/test/CodeGen/X86/peep-test-2.ll index 2745172..e4bafbb 100644 --- a/test/CodeGen/X86/peep-test-2.ll +++ b/test/CodeGen/X86/peep-test-2.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -march=x86 | grep testl +; RUN: llc < %s -march=x86 | FileCheck %s + +; CHECK: testl ; It's tempting to eliminate the testl instruction here and just use the ; EFLAGS value from the incl, however it can't be known whether the add diff --git a/test/CodeGen/X86/phys_subreg_coalesce.ll b/test/CodeGen/X86/phys_subreg_coalesce.ll index 2c855ce..8b2f61e 100644 --- a/test/CodeGen/X86/phys_subreg_coalesce.ll +++ b/test/CodeGen/X86/phys_subreg_coalesce.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=+sse2 | not grep movl +; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=+sse2 | FileCheck %s + +; CHECK-NOT: movl %struct.dpoint = type { double, double } diff --git a/test/CodeGen/X86/pr12889.ll b/test/CodeGen/X86/pr12889.ll index 331d8f9..428e9b7 100644 --- a/test/CodeGen/X86/pr12889.ll +++ b/test/CodeGen/X86/pr12889.ll @@ -6,13 +6,10 @@ target triple = "x86_64-unknown-linux-gnu" define void @func() nounwind uwtable { entry: - %0 = load i8* @c0, align 1, !tbaa !0 + %0 = load i8* @c0, align 1 %tobool = icmp ne i8 %0, 0 %conv = zext i1 %tobool to i8 %storemerge = shl nuw nsw i8 %conv, %conv store i8 %storemerge, i8* @c0, align 1 ret void } - -!0 = metadata !{metadata !"omnipotent char", metadata !1} -!1 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/X86/pr15296.ll b/test/CodeGen/X86/pr15296.ll new file mode 100644 index 0000000..1187d80 --- /dev/null +++ b/test/CodeGen/X86/pr15296.ll @@ -0,0 +1,46 @@ +; RUN: llc < %s -mtriple=i686-pc-linux -mcpu=corei7-avx | FileCheck %s + +define <8 x i32> @shiftInput___vyuunu(<8 x i32> %input, i32 %shiftval, <8 x i32> %__mask) nounwind { +allocas: + %smear.0 = insertelement <8 x i32> undef, i32 %shiftval, i32 0 + %smear.1 = insertelement <8 x i32> %smear.0, i32 %shiftval, i32 1 + %smear.2 = insertelement <8 x i32> %smear.1, i32 %shiftval, i32 2 + %smear.3 = insertelement <8 x i32> %smear.2, i32 %shiftval, i32 3 + %smear.4 = insertelement <8 x i32> %smear.3, i32 %shiftval, i32 4 + %smear.5 = insertelement <8 x i32> %smear.4, i32 %shiftval, i32 5 + %smear.6 = insertelement <8 x i32> %smear.5, i32 %shiftval, i32 6 + %smear.7 = insertelement <8 x i32> %smear.6, i32 %shiftval, i32 7 + %bitop = lshr <8 x i32> %input, %smear.7 + ret <8 x i32> %bitop +} + +; CHECK: shiftInput___vyuunu +; CHECK: psrld +; CHECK: psrld +; CHECK: ret + +define <8 x i32> @shiftInput___canonical(<8 x i32> %input, i32 %shiftval, <8 x i32> %__mask) nounwind { +allocas: + %smear.0 = insertelement <8 x i32> undef, i32 %shiftval, i32 0 + %smear.7 = shufflevector <8 x i32> %smear.0, <8 x i32> undef, <8 x i32> zeroinitializer + %bitop = lshr <8 x i32> %input, %smear.7 + ret <8 x i32> %bitop +} + +; CHECK: shiftInput___canonical +; CHECK: psrld +; CHECK: psrld +; CHECK: ret + +define <4 x i64> @shiftInput___64in32bitmode(<4 x i64> %input, i64 %shiftval, <4 x i64> %__mask) nounwind { +allocas: + %smear.0 = insertelement <4 x i64> undef, i64 %shiftval, i32 0 + %smear.7 = shufflevector <4 x i64> %smear.0, <4 x i64> undef, <4 x i32> zeroinitializer + %bitop = lshr <4 x i64> %input, %smear.7 + ret <4 x i64> %bitop +} + +; CHECK: shiftInput___64in32bitmode +; CHECK: psrlq +; CHECK: psrlq +; CHECK: ret diff --git a/test/CodeGen/X86/pr2656.ll b/test/CodeGen/X86/pr2656.ll index f0e31f7..1122d2d 100644 --- a/test/CodeGen/X86/pr2656.ll +++ b/test/CodeGen/X86/pr2656.ll @@ -1,6 +1,9 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep "xorps.*sp" | count 1 +; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s ; PR2656 +; CHECK: {{xorps.*sp}} +; CHECK-NOT: {{xorps.*sp}} + target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin9.4.0" %struct.anon = type <{ float, float }> diff --git a/test/CodeGen/X86/prefetch.ll b/test/CodeGen/X86/prefetch.ll index ec2f302..efb5191 100644 --- a/test/CodeGen/X86/prefetch.ll +++ b/test/CodeGen/X86/prefetch.ll @@ -1,5 +1,6 @@ ; RUN: llc < %s -march=x86 -mattr=+sse | FileCheck %s ; RUN: llc < %s -march=x86 -mattr=+avx | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+sse -mattr=+prfchw | FileCheck %s -check-prefix=PRFCHW ; rdar://10538297 @@ -9,10 +10,12 @@ entry: ; CHECK: prefetcht1 ; CHECK: prefetcht0 ; CHECK: prefetchnta +; PRFCHW: prefetchw tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 1, i32 1 ) tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 2, i32 1 ) tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 3, i32 1 ) tail call void @llvm.prefetch( i8* %ptr, i32 0, i32 0, i32 1 ) + tail call void @llvm.prefetch( i8* %ptr, i32 1, i32 3, i32 1 ) ret void } diff --git a/test/CodeGen/X86/private-2.ll b/test/CodeGen/X86/private-2.ll index 8aa744e..4413cee 100644 --- a/test/CodeGen/X86/private-2.ll +++ b/test/CodeGen/X86/private-2.ll @@ -1,7 +1,9 @@ -; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | grep L__ZZ20 +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s ; Quote should be outside of private prefix. ; rdar://6855766x +; CHECK: L__ZZ20 + %struct.A = type { i32*, i32 } @"_ZZ20-[Example1 whatever]E4C.91" = private constant %struct.A { i32* null, i32 1 } ; <%struct.A*> [#uses=1] diff --git a/test/CodeGen/X86/rd-mod-wr-eflags.ll b/test/CodeGen/X86/rd-mod-wr-eflags.ll index 8ef9b5d..0bf601b 100644 --- a/test/CodeGen/X86/rd-mod-wr-eflags.ll +++ b/test/CodeGen/X86/rd-mod-wr-eflags.ll @@ -8,9 +8,9 @@ entry: ; CHECK: decq (%{{rdi|rcx}}) ; CHECK-NEXT: je %refcnt = getelementptr inbounds %struct.obj* %o, i64 0, i32 0 - %0 = load i64* %refcnt, align 8, !tbaa !0 + %0 = load i64* %refcnt, align 8 %dec = add i64 %0, -1 - store i64 %dec, i64* %refcnt, align 8, !tbaa !0 + store i64 %dec, i64* %refcnt, align 8 %tobool = icmp eq i64 %dec, 0 br i1 %tobool, label %if.end, label %return @@ -33,12 +33,12 @@ define i32 @test() nounwind uwtable ssp { entry: ; CHECK: decq ; CHECK-NOT: decq -%0 = load i64* @c, align 8, !tbaa !0 +%0 = load i64* @c, align 8 %dec.i = add nsw i64 %0, -1 -store i64 %dec.i, i64* @c, align 8, !tbaa !0 +store i64 %dec.i, i64* @c, align 8 %tobool.i = icmp ne i64 %dec.i, 0 %lor.ext.i = zext i1 %tobool.i to i32 -store i32 %lor.ext.i, i32* @a, align 4, !tbaa !3 +store i32 %lor.ext.i, i32* @a, align 4 %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i64 0, i64 0), i64 %dec.i) nounwind ret i32 0 } @@ -47,12 +47,12 @@ ret i32 0 define i32 @test2() nounwind uwtable ssp { entry: ; CHECK-NOT: decq ({{.*}}) -%0 = load i64* @c, align 8, !tbaa !0 +%0 = load i64* @c, align 8 %dec.i = add nsw i64 %0, -1 -store i64 %dec.i, i64* @c, align 8, !tbaa !0 +store i64 %dec.i, i64* @c, align 8 %tobool.i = icmp ne i64 %0, 0 %lor.ext.i = zext i1 %tobool.i to i32 -store i32 %lor.ext.i, i32* @a, align 4, !tbaa !3 +store i32 %lor.ext.i, i32* @a, align 4 %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i64 0, i64 0), i64 %dec.i) nounwind ret i32 0 } @@ -61,11 +61,6 @@ declare i32 @printf(i8* nocapture, ...) nounwind declare void @free(i8* nocapture) nounwind -!0 = metadata !{metadata !"long", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} -!3 = metadata !{metadata !"int", metadata !1} - %struct.obj2 = type { i64, i32, i16, i8 } declare void @other(%struct.obj2* ) nounwind; diff --git a/test/CodeGen/X86/rdseed.ll b/test/CodeGen/X86/rdseed.ll new file mode 100644 index 0000000..35de7eb --- /dev/null +++ b/test/CodeGen/X86/rdseed.ll @@ -0,0 +1,48 @@ +; RUN: llc < %s -march=x86-64 -mcpu=core-avx-i -mattr=+rdseed | FileCheck %s + +declare {i16, i32} @llvm.x86.rdseed.16() +declare {i32, i32} @llvm.x86.rdseed.32() +declare {i64, i32} @llvm.x86.rdseed.64() + +define i32 @_rdseed16_step(i16* %random_val) { + %call = call {i16, i32} @llvm.x86.rdseed.16() + %randval = extractvalue {i16, i32} %call, 0 + store i16 %randval, i16* %random_val + %isvalid = extractvalue {i16, i32} %call, 1 + ret i32 %isvalid +; CHECK: _rdseed16_step: +; CHECK: rdseedw %ax +; CHECK: movw %ax, (%r[[A0:di|cx]]) +; CHECK: movzwl %ax, %ecx +; CHECK: movl $1, %eax +; CHECK: cmovael %ecx, %eax +; CHECK: ret +} + +define i32 @_rdseed32_step(i32* %random_val) { + %call = call {i32, i32} @llvm.x86.rdseed.32() + %randval = extractvalue {i32, i32} %call, 0 + store i32 %randval, i32* %random_val + %isvalid = extractvalue {i32, i32} %call, 1 + ret i32 %isvalid +; CHECK: _rdseed32_step: +; CHECK: rdseedl %e[[T0:[a-z]+]] +; CHECK: movl %e[[T0]], (%r[[A0]]) +; CHECK: movl $1, %eax +; CHECK: cmovael %e[[T0]], %eax +; CHECK: ret +} + +define i32 @_rdseed64_step(i64* %random_val) { + %call = call {i64, i32} @llvm.x86.rdseed.64() + %randval = extractvalue {i64, i32} %call, 0 + store i64 %randval, i64* %random_val + %isvalid = extractvalue {i64, i32} %call, 1 + ret i32 %isvalid +; CHECK: _rdseed64_step: +; CHECK: rdseedq %r[[T1:[a-z]+]] +; CHECK: movq %r[[T1]], (%r[[A0]]) +; CHECK: movl $1, %eax +; CHECK: cmovael %e[[T1]], %eax +; CHECK: ret +} diff --git a/test/CodeGen/X86/select-with-and-or.ll b/test/CodeGen/X86/select-with-and-or.ll new file mode 100644 index 0000000..1ccf30b --- /dev/null +++ b/test/CodeGen/X86/select-with-and-or.ll @@ -0,0 +1,72 @@ +; RUN: opt < %s -O3 | \ +; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s + +define <4 x i32> @test1(<4 x float> %a, <4 x float> %b, <4 x i32> %c) { + %f = fcmp ult <4 x float> %a, %b + %r = select <4 x i1> %f, <4 x i32> %c, <4 x i32> zeroinitializer + ret <4 x i32> %r +; CHECK: test1 +; CHECK: cmpnle +; CHECK-NEXT: andps +; CHECK: ret +} + +define <4 x i32> @test2(<4 x float> %a, <4 x float> %b, <4 x i32> %c) { + %f = fcmp ult <4 x float> %a, %b + %r = select <4 x i1> %f, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> %c + ret <4 x i32> %r +; CHECK: test2 +; CHECK: cmpnle +; CHECK-NEXT: orps +; CHECK: ret +} + +define <4 x i32> @test3(<4 x float> %a, <4 x float> %b, <4 x i32> %c) { + %f = fcmp ult <4 x float> %a, %b + %r = select <4 x i1> %f, <4 x i32> zeroinitializer, <4 x i32> %c + ret <4 x i32> %r +; CHECK: test3 +; CHECK: cmple +; CHECK-NEXT: andps +; CHECK: ret +} + +define <4 x i32> @test4(<4 x float> %a, <4 x float> %b, <4 x i32> %c) { + %f = fcmp ult <4 x float> %a, %b + %r = select <4 x i1> %f, <4 x i32> %c, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1> + ret <4 x i32> %r +; CHECK: test4 +; CHECK: cmple +; CHECK-NEXT: orps +; CHECK: ret +} + +define <4 x i32> @test5(<4 x float> %a, <4 x float> %b, <4 x i32> %c) { + %f = fcmp ult <4 x float> %a, %b + %r = select <4 x i1> %f, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> zeroinitializer + ret <4 x i32> %r +; CHECK: test5 +; CHECK: cmpnle +; CHECK-NEXT: ret +} + +define <4 x i32> @test6(<4 x float> %a, <4 x float> %b, <4 x i32> %c) { + %f = fcmp ult <4 x float> %a, %b + %r = select <4 x i1> %f, <4 x i32> zeroinitializer, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1> + ret <4 x i32> %r +; CHECK: test6 +; CHECK: cmple +; CHECK-NEXT: ret +} + +define <4 x i32> @test7(<4 x float> %a, <4 x float> %b, <4 x i32>* %p) { + %f = fcmp ult <4 x float> %a, %b + %s = sext <4 x i1> %f to <4 x i32> + %l = load <4 x i32>* %p + %r = and <4 x i32> %l, %s + ret <4 x i32> %r +; CHECK: test7 +; CHECK: cmpnle +; CHECK-NEXT: andps +; CHECK: ret +} diff --git a/test/CodeGen/X86/sibcall.ll b/test/CodeGen/X86/sibcall.ll index 2af3559..ceb79ea 100644 --- a/test/CodeGen/X86/sibcall.ll +++ b/test/CodeGen/X86/sibcall.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -mtriple=i686-linux -mattr=+sse2 -asm-verbose=false | FileCheck %s -check-prefix=32 -; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse2 -asm-verbose=false | FileCheck %s -check-prefix=64 +; RUN: llc < %s -mtriple=i686-linux -mcpu=core2 -mattr=+sse2 -asm-verbose=false | FileCheck %s -check-prefix=32 +; RUN: llc < %s -mtriple=x86_64-linux -mcpu=core2 -mattr=+sse2 -asm-verbose=false | FileCheck %s -check-prefix=64 define void @t1(i32 %x) nounwind ssp { entry: diff --git a/test/CodeGen/X86/sincos-opt.ll b/test/CodeGen/X86/sincos-opt.ll index f364d1f..333c466 100644 --- a/test/CodeGen/X86/sincos-opt.ll +++ b/test/CodeGen/X86/sincos-opt.ll @@ -4,6 +4,7 @@ ; Combine sin / cos into a single call. ; rdar://13087969 +; rdar://13599493 define float @test1(float %x) nounwind { entry: @@ -14,7 +15,8 @@ entry: ; OSX_SINCOS: test1: ; OSX_SINCOS: callq ___sincosf_stret -; OSX_SINCOS: addss %xmm1, %xmm0 +; OSX_SINCOS: pshufd $1, %xmm0, %xmm1 +; OSX_SINCOS: addss %xmm0, %xmm1 ; OSX_NOOPT: test1 ; OSX_NOOPT: callq _cosf diff --git a/test/CodeGen/X86/sink-hoist.ll b/test/CodeGen/X86/sink-hoist.ll index 649cd61..2aca5b8 100644 --- a/test/CodeGen/X86/sink-hoist.ll +++ b/test/CodeGen/X86/sink-hoist.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86-64 -asm-verbose=false -mtriple=x86_64-unknown-linux-gnu -mcpu=nehalem -post-RA-scheduler=true | FileCheck %s +; RUN: llc < %s -march=x86-64 -asm-verbose=false -mtriple=x86_64-unknown-linux-gnu -mcpu=nehalem -post-RA-scheduler=true -schedmodel=false | FileCheck %s ; Currently, floating-point selects are lowered to CFG triangles. ; This means that one side of the select is always unconditionally diff --git a/test/CodeGen/X86/stdcall.ll b/test/CodeGen/X86/stdcall.ll index a7c2517..73826ed 100644 --- a/test/CodeGen/X86/stdcall.ll +++ b/test/CodeGen/X86/stdcall.ll @@ -1,16 +1,24 @@ -; RUN: llc < %s | FileCheck %s +; RUN: llc -mtriple="i386-pc-mingw32" < %s | FileCheck %s ; PR5851 -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" -target triple = "i386-pc-mingw32" - %0 = type { void (...)* } -@B = global %0 { void (...)* bitcast (void ()* @MyFunc to void (...)*) }, align 4 -; CHECK: _B: -; CHECK: .long _MyFunc@0 - define internal x86_stdcallcc void @MyFunc() nounwind { entry: +; CHECK: MyFunc@0: +; CHECK: ret ret void } + +; PR14410 +define x86_stdcallcc i32 @"\01DoNotMangle"(i32 %a) { +; CHECK: DoNotMangle: +; CHECK: ret $4 +entry: + ret i32 %a +} + +@B = global %0 { void (...)* bitcast (void ()* @MyFunc to void (...)*) }, align 4 +; CHECK: _B: +; CHECK: .long _MyFunc@0 + diff --git a/test/CodeGen/X86/store-fp-constant.ll b/test/CodeGen/X86/store-fp-constant.ll index 206886b..71df8d3 100644 --- a/test/CodeGen/X86/store-fp-constant.ll +++ b/test/CodeGen/X86/store-fp-constant.ll @@ -1,5 +1,8 @@ -; RUN: llc < %s -march=x86 | not grep rodata -; RUN: llc < %s -march=x86 | not grep literal +; RUN: llc < %s -march=x86 | FileCheck %s + +; CHECK-NOT: rodata +; CHECK-NOT: literal + ; ; Check that no FP constants in this testcase ends up in the ; constant pool. diff --git a/test/CodeGen/X86/subreg-to-reg-1.ll b/test/CodeGen/X86/subreg-to-reg-1.ll index 4f31ab5..2931bab 100644 --- a/test/CodeGen/X86/subreg-to-reg-1.ll +++ b/test/CodeGen/X86/subreg-to-reg-1.ll @@ -1,4 +1,7 @@ -; RUN: llc < %s -march=x86-64 | grep "leal .*), %e.*" | count 1 +; RUN: llc < %s -march=x86-64 | FileCheck %s + +; CHECK: {{leal .*[)], %e.*}} +; CHECK-NOT: {{leal .*[)], %e.*}} ; Don't eliminate or coalesce away the explicit zero-extension! ; This is currently using an leal because of a 3-addressification detail, diff --git a/test/CodeGen/X86/subreg-to-reg-3.ll b/test/CodeGen/X86/subreg-to-reg-3.ll index 931ae75..80ab1a2 100644 --- a/test/CodeGen/X86/subreg-to-reg-3.ll +++ b/test/CodeGen/X86/subreg-to-reg-3.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -march=x86-64 | grep imull +; RUN: llc < %s -march=x86-64 | FileCheck %s + +; CHECK: imull ; Don't eliminate or coalesce away the explicit zero-extension! diff --git a/test/CodeGen/X86/subtarget-feature-change.ll b/test/CodeGen/X86/subtarget-feature-change.ll index cd67729..04d4a71 100644 --- a/test/CodeGen/X86/subtarget-feature-change.ll +++ b/test/CodeGen/X86/subtarget-feature-change.ll @@ -14,12 +14,12 @@ entry: for.body: %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds float* %b, i64 %indvars.iv - %0 = load float* %arrayidx, align 4, !tbaa !0 + %0 = load float* %arrayidx, align 4 %arrayidx2 = getelementptr inbounds float* %c, i64 %indvars.iv - %1 = load float* %arrayidx2, align 4, !tbaa !0 + %1 = load float* %arrayidx2, align 4 %mul = fmul float %0, %1 %arrayidx4 = getelementptr inbounds float* %a, i64 %indvars.iv - store float %mul, float* %arrayidx4, align 4, !tbaa !0 + store float %mul, float* %arrayidx4, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -43,12 +43,12 @@ entry: for.body: %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds float* %b, i64 %indvars.iv - %0 = load float* %arrayidx, align 4, !tbaa !0 + %0 = load float* %arrayidx, align 4 %arrayidx2 = getelementptr inbounds float* %c, i64 %indvars.iv - %1 = load float* %arrayidx2, align 4, !tbaa !0 + %1 = load float* %arrayidx2, align 4 %mul = fmul float %0, %1 %arrayidx4 = getelementptr inbounds float* %a, i64 %indvars.iv - store float %mul, float* %arrayidx4, align 4, !tbaa !0 + store float %mul, float* %arrayidx4, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -60,7 +60,3 @@ for.end: attributes #0 = { nounwind optsize ssp uwtable "target-cpu"="core2" "target-features"="-sse4a,-avx2,-xop,-fma4,-bmi2,-3dnow,-3dnowa,-pclmul,-sse,-avx,-sse41,-ssse3,+mmx,-rtm,-sse42,-lzcnt,-f16c,-popcnt,-bmi,-aes,-fma,-rdrand,-sse2,-sse3" } attributes #1 = { nounwind optsize ssp uwtable "target-cpu"="core2" "target-features"="-sse4a,-avx2,-xop,-fma4,-bmi2,-3dnow,-3dnowa,-pclmul,+sse,-avx,-sse41,+ssse3,+mmx,-rtm,-sse42,-lzcnt,-f16c,-popcnt,-bmi,-aes,-fma,-rdrand,+sse2,+sse3" } - -!0 = metadata !{metadata !"float", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/CodeGen/X86/switch-crit-edge-constant.ll b/test/CodeGen/X86/switch-crit-edge-constant.ll index 1f2ab0d..18f987e 100644 --- a/test/CodeGen/X86/switch-crit-edge-constant.ll +++ b/test/CodeGen/X86/switch-crit-edge-constant.ll @@ -1,6 +1,8 @@ ; PR925 -; RUN: llc < %s -march=x86 | \ -; RUN: grep mov.*str1 | count 1 +; RUN: llc < %s -march=x86 | FileCheck %s + +; CHECK: {{mov.*str1}} +; CHECK-NOT: {{mov.*str1}} target datalayout = "e-p:32:32" target triple = "i686-apple-darwin8.7.2" diff --git a/test/CodeGen/X86/tailcall-64.ll b/test/CodeGen/X86/tailcall-64.ll index ecc253b..60fe776 100644 --- a/test/CodeGen/X86/tailcall-64.ll +++ b/test/CodeGen/X86/tailcall-64.ll @@ -50,9 +50,18 @@ define {i64, i64} @test_pair_trivial() { ; CHECK: test_pair_trivial: ; CHECK: jmp _testp ## TAILCALL +define {i64, i64} @test_pair_notail() { + %A = tail call i64 @testi() + + %b = insertvalue {i64, i64} undef, i64 %A, 0 + %c = insertvalue {i64, i64} %b, i64 %A, 1 + ret { i64, i64} %c +} +; CHECK: test_pair_notail: +; CHECK-NOT: jmp _testi -define {i64, i64} @test_pair_trivial_extract() { +define {i64, i64} @test_pair_extract_trivial() { %A = tail call { i64, i64} @testp() %x = extractvalue { i64, i64} %A, 0 %y = extractvalue { i64, i64} %A, 1 @@ -63,10 +72,24 @@ define {i64, i64} @test_pair_trivial_extract() { ret { i64, i64} %c } -; CHECK: test_pair_trivial_extract: +; CHECK: test_pair_extract_trivial: ; CHECK: jmp _testp ## TAILCALL -define {i8*, i64} @test_pair_conv_extract() { +define {i64, i64} @test_pair_extract_notail() { + %A = tail call { i64, i64} @testp() + %x = extractvalue { i64, i64} %A, 0 + %y = extractvalue { i64, i64} %A, 1 + + %b = insertvalue {i64, i64} undef, i64 %y, 0 + %c = insertvalue {i64, i64} %b, i64 %x, 1 + + ret { i64, i64} %c +} + +; CHECK: test_pair_extract_notail: +; CHECK-NOT: jmp _testp + +define {i8*, i64} @test_pair_extract_conv() { %A = tail call { i64, i64} @testp() %x = extractvalue { i64, i64} %A, 0 %y = extractvalue { i64, i64} %A, 1 @@ -79,10 +102,75 @@ define {i8*, i64} @test_pair_conv_extract() { ret { i8*, i64} %c } -; CHECK: test_pair_conv_extract: +; CHECK: test_pair_extract_conv: +; CHECK: jmp _testp ## TAILCALL + +define {i64, i64} @test_pair_extract_multiple() { + %A = tail call { i64, i64} @testp() + %x = extractvalue { i64, i64} %A, 0 + %y = extractvalue { i64, i64} %A, 1 + + %b = insertvalue {i64, i64} undef, i64 %x, 0 + %c = insertvalue {i64, i64} %b, i64 %y, 1 + + %x1 = extractvalue { i64, i64} %b, 0 + %y1 = extractvalue { i64, i64} %c, 1 + + %d = insertvalue {i64, i64} undef, i64 %x1, 0 + %e = insertvalue {i64, i64} %b, i64 %y1, 1 + + ret { i64, i64} %e +} + +; CHECK: test_pair_extract_multiple: +; CHECK: jmp _testp ## TAILCALL + +define {i64, i64} @test_pair_extract_undef() { + %A = tail call { i64, i64} @testp() + %x = extractvalue { i64, i64} %A, 0 + + %b = insertvalue {i64, i64} undef, i64 %x, 0 + + ret { i64, i64} %b +} + +; CHECK: test_pair_extract_undef: ; CHECK: jmp _testp ## TAILCALL +declare { i64, { i32, i32 } } @testn() + +define {i64, {i32, i32}} @test_nest() { + %A = tail call { i64, { i32, i32 } } @testn() + %x = extractvalue { i64, { i32, i32}} %A, 0 + %y = extractvalue { i64, { i32, i32}} %A, 1 + %y1 = extractvalue { i32, i32} %y, 0 + %y2 = extractvalue { i32, i32} %y, 1 + + %b = insertvalue {i64, {i32, i32}} undef, i64 %x, 0 + %c1 = insertvalue {i32, i32} undef, i32 %y1, 0 + %c2 = insertvalue {i32, i32} %c1, i32 %y2, 1 + %c = insertvalue {i64, {i32, i32}} %b, {i32, i32} %c2, 1 + + ret { i64, { i32, i32}} %c +} + +; CHECK: test_nest: +; CHECK: jmp _testn ## TAILCALL + +%struct.A = type { i32 } +%struct.B = type { %struct.A, i32 } + +declare %struct.B* @testu() + +define %struct.A* @test_upcast() { +entry: + %A = tail call %struct.B* @testu() + %x = getelementptr inbounds %struct.B* %A, i32 0, i32 0 + ret %struct.A* %x +} +; CHECK: test_upcast: +; CHECK: jmp _testu ## TAILCALL ; PR13006 define { i64, i64 } @crash(i8* %this) { diff --git a/test/CodeGen/X86/this-return-64.ll b/test/CodeGen/X86/this-return-64.ll new file mode 100644 index 0000000..2b26a89 --- /dev/null +++ b/test/CodeGen/X86/this-return-64.ll @@ -0,0 +1,89 @@ +; RUN: llc < %s -mtriple=x86_64-pc-win32 | FileCheck %s + +%struct.A = type { i8 } +%struct.B = type { i32 } +%struct.C = type { %struct.B } +%struct.D = type { %struct.B } +%struct.E = type { %struct.B } + +declare %struct.A* @A_ctor(%struct.A* returned) +declare %struct.B* @B_ctor(%struct.B* returned, i32) + +declare %struct.A* @A_ctor_nothisret(%struct.A*) +declare %struct.B* @B_ctor_nothisret(%struct.B*, i32) + +define %struct.C* @C_ctor(%struct.C* %this, i32 %y) { +entry: +; CHECK: C_ctor: +; CHECK: jmp B_ctor # TAILCALL + %0 = getelementptr inbounds %struct.C* %this, i64 0, i32 0 + %call = tail call %struct.B* @B_ctor(%struct.B* %0, i32 %y) + ret %struct.C* %this +} + +define %struct.C* @C_ctor_nothisret(%struct.C* %this, i32 %y) { +entry: +; CHECK: C_ctor_nothisret: +; CHECK-NOT: jmp B_ctor_nothisret + %0 = getelementptr inbounds %struct.C* %this, i64 0, i32 0 + %call = tail call %struct.B* @B_ctor_nothisret(%struct.B* %0, i32 %y) + ret %struct.C* %this +} + +define %struct.D* @D_ctor(%struct.D* %this, i32 %y) { +entry: +; CHECK: D_ctor: +; CHECK: movq %rcx, [[SAVETHIS:%r[0-9a-z]+]] +; CHECK: callq A_ctor +; CHECK: movq [[SAVETHIS]], %rcx +; CHECK: jmp B_ctor # TAILCALL + %0 = bitcast %struct.D* %this to %struct.A* + %call = tail call %struct.A* @A_ctor(%struct.A* %0) + %1 = getelementptr inbounds %struct.D* %this, i64 0, i32 0 + %call2 = tail call %struct.B* @B_ctor(%struct.B* %1, i32 %y) +; (this next line would never be generated by Clang, actually) + %2 = bitcast %struct.A* %call to %struct.D* + ret %struct.D* %2 +} + +define %struct.D* @D_ctor_nothisret(%struct.D* %this, i32 %y) { +entry: +; CHECK: D_ctor_nothisret: +; CHECK: movq %rcx, [[SAVETHIS:%r[0-9a-z]+]] +; CHECK: callq A_ctor_nothisret +; CHECK: movq [[SAVETHIS]], %rcx +; CHECK-NOT: jmp B_ctor_nothisret + %0 = bitcast %struct.D* %this to %struct.A* + %call = tail call %struct.A* @A_ctor_nothisret(%struct.A* %0) + %1 = getelementptr inbounds %struct.D* %this, i64 0, i32 0 + %call2 = tail call %struct.B* @B_ctor_nothisret(%struct.B* %1, i32 %y) +; (this next line would never be generated by Clang, actually) + %2 = bitcast %struct.A* %call to %struct.D* + ret %struct.D* %2 +} + +define %struct.E* @E_ctor(%struct.E* %this, i32 %x) { +entry: +; CHECK: E_ctor: +; CHECK: movq %rcx, [[SAVETHIS:%r[0-9a-z]+]] +; CHECK: callq B_ctor +; CHECK: movq [[SAVETHIS]], %rcx +; CHECK: jmp B_ctor # TAILCALL + %b = getelementptr inbounds %struct.E* %this, i64 0, i32 0 + %call = tail call %struct.B* @B_ctor(%struct.B* %b, i32 %x) + %call4 = tail call %struct.B* @B_ctor(%struct.B* %b, i32 %x) + ret %struct.E* %this +} + +define %struct.E* @E_ctor_nothisret(%struct.E* %this, i32 %x) { +entry: +; CHECK: E_ctor_nothisret: +; CHECK: movq %rcx, [[SAVETHIS:%r[0-9a-z]+]] +; CHECK: callq B_ctor_nothisret +; CHECK: movq [[SAVETHIS]], %rcx +; CHECK-NOT: jmp B_ctor_nothisret + %b = getelementptr inbounds %struct.E* %this, i64 0, i32 0 + %call = tail call %struct.B* @B_ctor_nothisret(%struct.B* %b, i32 %x) + %call4 = tail call %struct.B* @B_ctor_nothisret(%struct.B* %b, i32 %x) + ret %struct.E* %this +} diff --git a/test/CodeGen/X86/thiscall-struct-return.ll b/test/CodeGen/X86/thiscall-struct-return.ll deleted file mode 100644 index 0507cb8..0000000 --- a/test/CodeGen/X86/thiscall-struct-return.ll +++ /dev/null @@ -1,47 +0,0 @@ -; RUN: llc < %s -mtriple=i386-PC-Win32 | FileCheck %s - -%class.C = type { i8 } -%struct.S = type { i32 } -%struct.M = type { i32, i32 } - -declare void @_ZN1CC1Ev(%class.C* %this) unnamed_addr nounwind align 2 -declare x86_thiscallcc void @_ZNK1C5SmallEv(%struct.S* noalias sret %agg.result, %class.C* %this) nounwind align 2 -declare x86_thiscallcc void @_ZNK1C6MediumEv(%struct.M* noalias sret %agg.result, %class.C* %this) nounwind align 2 - -define void @testv() nounwind { -; CHECK: testv: -; CHECK: leal 16(%esp), %esi -; CHECK-NEXT: movl %esi, (%esp) -; CHECK-NEXT: calll _ZN1CC1Ev -; CHECK: leal 8(%esp), %eax -; CHECK-NEXT: movl %esi, %ecx -; CHECK-NEXT: calll _ZNK1C5SmallEv -entry: - %c = alloca %class.C, align 1 - %tmp = alloca %struct.S, align 4 - call void @_ZN1CC1Ev(%class.C* %c) - ; This call should put the return structure as a pointer - ; into EAX instead of returning directly in EAX. The this - ; pointer should go into ECX - call x86_thiscallcc void @_ZNK1C5SmallEv(%struct.S* sret %tmp, %class.C* %c) - ret void -} - -define void @test2v() nounwind { -; CHECK: test2v: -; CHECK: leal 16(%esp), %esi -; CHECK-NEXT: movl %esi, (%esp) -; CHECK-NEXT: calll _ZN1CC1Ev -; CHECK: leal 8(%esp), %eax -; CHECK-NEXT: movl %esi, %ecx -; CHECK-NEXT: calll _ZNK1C6MediumEv -entry: - %c = alloca %class.C, align 1 - %tmp = alloca %struct.M, align 4 - call void @_ZN1CC1Ev(%class.C* %c) - ; This call should put the return structure as a pointer - ; into EAX instead of returning directly in EAX/EDX. The this - ; pointer should go into ECX - call x86_thiscallcc void @_ZNK1C6MediumEv(%struct.M* sret %tmp, %class.C* %c) - ret void -} diff --git a/test/CodeGen/X86/tls.ll b/test/CodeGen/X86/tls.ll index e8a79bf..8cdecd8 100644 --- a/test/CodeGen/X86/tls.ll +++ b/test/CodeGen/X86/tls.ll @@ -22,13 +22,13 @@ define i32 @f1() { ; X32_WIN: movl __tls_index, %eax ; X32_WIN-NEXT: movl %fs:__tls_array, %ecx ; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax -; X32_WIN-NEXT: movl _i1@SECREL(%eax), %eax +; X32_WIN-NEXT: movl _i1@SECREL32(%eax), %eax ; X32_WIN-NEXT: ret ; X64_WIN: f1: ; X64_WIN: movl _tls_index(%rip), %eax ; X64_WIN-NEXT: movq %gs:88, %rcx ; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax -; X64_WIN-NEXT: movl i1@SECREL(%rax), %eax +; X64_WIN-NEXT: movl i1@SECREL32(%rax), %eax ; X64_WIN-NEXT: ret entry: @@ -49,13 +49,13 @@ define i32* @f2() { ; X32_WIN: movl __tls_index, %eax ; X32_WIN-NEXT: movl %fs:__tls_array, %ecx ; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax -; X32_WIN-NEXT: leal _i1@SECREL(%eax), %eax +; X32_WIN-NEXT: leal _i1@SECREL32(%eax), %eax ; X32_WIN-NEXT: ret ; X64_WIN: f2: ; X64_WIN: movl _tls_index(%rip), %eax ; X64_WIN-NEXT: movq %gs:88, %rcx ; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax -; X64_WIN-NEXT: leaq i1@SECREL(%rax), %rax +; X64_WIN-NEXT: leaq i1@SECREL32(%rax), %rax ; X64_WIN-NEXT: ret entry: @@ -75,13 +75,13 @@ define i32 @f3() nounwind { ; X32_WIN: movl __tls_index, %eax ; X32_WIN-NEXT: movl %fs:__tls_array, %ecx ; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax -; X32_WIN-NEXT: movl _i2@SECREL(%eax), %eax +; X32_WIN-NEXT: movl _i2@SECREL32(%eax), %eax ; X32_WIN-NEXT: ret ; X64_WIN: f3: ; X64_WIN: movl _tls_index(%rip), %eax ; X64_WIN-NEXT: movq %gs:88, %rcx ; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax -; X64_WIN-NEXT: movl i2@SECREL(%rax), %eax +; X64_WIN-NEXT: movl i2@SECREL32(%rax), %eax ; X64_WIN-NEXT: ret entry: @@ -102,13 +102,13 @@ define i32* @f4() { ; X32_WIN: movl __tls_index, %eax ; X32_WIN-NEXT: movl %fs:__tls_array, %ecx ; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax -; X32_WIN-NEXT: leal _i2@SECREL(%eax), %eax +; X32_WIN-NEXT: leal _i2@SECREL32(%eax), %eax ; X32_WIN-NEXT: ret ; X64_WIN: f4: ; X64_WIN: movl _tls_index(%rip), %eax ; X64_WIN-NEXT: movq %gs:88, %rcx ; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax -; X64_WIN-NEXT: leaq i2@SECREL(%rax), %rax +; X64_WIN-NEXT: leaq i2@SECREL32(%rax), %rax ; X64_WIN-NEXT: ret entry: @@ -126,13 +126,13 @@ define i32 @f5() nounwind { ; X32_WIN: movl __tls_index, %eax ; X32_WIN-NEXT: movl %fs:__tls_array, %ecx ; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax -; X32_WIN-NEXT: movl _i3@SECREL(%eax), %eax +; X32_WIN-NEXT: movl _i3@SECREL32(%eax), %eax ; X32_WIN-NEXT: ret ; X64_WIN: f5: ; X64_WIN: movl _tls_index(%rip), %eax ; X64_WIN-NEXT: movq %gs:88, %rcx ; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax -; X64_WIN-NEXT: movl i3@SECREL(%rax), %eax +; X64_WIN-NEXT: movl i3@SECREL32(%rax), %eax ; X64_WIN-NEXT: ret entry: @@ -153,13 +153,13 @@ define i32* @f6() { ; X32_WIN: movl __tls_index, %eax ; X32_WIN-NEXT: movl %fs:__tls_array, %ecx ; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax -; X32_WIN-NEXT: leal _i3@SECREL(%eax), %eax +; X32_WIN-NEXT: leal _i3@SECREL32(%eax), %eax ; X32_WIN-NEXT: ret ; X64_WIN: f6: ; X64_WIN: movl _tls_index(%rip), %eax ; X64_WIN-NEXT: movq %gs:88, %rcx ; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax -; X64_WIN-NEXT: leaq i3@SECREL(%rax), %rax +; X64_WIN-NEXT: leaq i3@SECREL32(%rax), %rax ; X64_WIN-NEXT: ret entry: @@ -234,14 +234,14 @@ define i16 @f11() { ; X32_WIN: movl __tls_index, %eax ; X32_WIN-NEXT: movl %fs:__tls_array, %ecx ; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax -; X32_WIN-NEXT: movzwl _s1@SECREL(%eax), %eax +; X32_WIN-NEXT: movzwl _s1@SECREL32(%eax), %eax ; X32_WIN-NEXT: # kill ; X32_WIN-NEXT: ret ; X64_WIN: f11: ; X64_WIN: movl _tls_index(%rip), %eax ; X64_WIN-NEXT: movq %gs:88, %rcx ; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax -; X64_WIN-NEXT: movzwl s1@SECREL(%rax), %eax +; X64_WIN-NEXT: movzwl s1@SECREL32(%rax), %eax ; X64_WIN-NEXT: # kill ; X64_WIN-NEXT: ret @@ -261,13 +261,13 @@ define i32 @f12() { ; X32_WIN: movl __tls_index, %eax ; X32_WIN-NEXT: movl %fs:__tls_array, %ecx ; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax -; X32_WIN-NEXT: movswl _s1@SECREL(%eax), %eax +; X32_WIN-NEXT: movswl _s1@SECREL32(%eax), %eax ; X32_WIN-NEXT: ret ; X64_WIN: f12: ; X64_WIN: movl _tls_index(%rip), %eax ; X64_WIN-NEXT: movq %gs:88, %rcx ; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax -; X64_WIN-NEXT: movswl s1@SECREL(%rax), %eax +; X64_WIN-NEXT: movswl s1@SECREL32(%rax), %eax ; X64_WIN-NEXT: ret entry: @@ -287,13 +287,13 @@ define i8 @f13() { ; X32_WIN: movl __tls_index, %eax ; X32_WIN-NEXT: movl %fs:__tls_array, %ecx ; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax -; X32_WIN-NEXT: movb _b1@SECREL(%eax), %al +; X32_WIN-NEXT: movb _b1@SECREL32(%eax), %al ; X32_WIN-NEXT: ret ; X64_WIN: f13: ; X64_WIN: movl _tls_index(%rip), %eax ; X64_WIN-NEXT: movq %gs:88, %rcx ; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax -; X64_WIN-NEXT: movb b1@SECREL(%rax), %al +; X64_WIN-NEXT: movb b1@SECREL32(%rax), %al ; X64_WIN-NEXT: ret entry: @@ -312,13 +312,13 @@ define i32 @f14() { ; X32_WIN: movl __tls_index, %eax ; X32_WIN-NEXT: movl %fs:__tls_array, %ecx ; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax -; X32_WIN-NEXT: movsbl _b1@SECREL(%eax), %eax +; X32_WIN-NEXT: movsbl _b1@SECREL32(%eax), %eax ; X32_WIN-NEXT: ret ; X64_WIN: f14: ; X64_WIN: movl _tls_index(%rip), %eax ; X64_WIN-NEXT: movq %gs:88, %rcx ; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax -; X64_WIN-NEXT: movsbl b1@SECREL(%rax), %eax +; X64_WIN-NEXT: movsbl b1@SECREL32(%rax), %eax ; X64_WIN-NEXT: ret entry: diff --git a/test/CodeGen/X86/unknown-location.ll b/test/CodeGen/X86/unknown-location.ll index b89372a..e02e3b5 100644 --- a/test/CodeGen/X86/unknown-location.ll +++ b/test/CodeGen/X86/unknown-location.ll @@ -21,9 +21,9 @@ entry: !llvm.dbg.cu = !{!3} !0 = metadata !{i32 786689, metadata !1, metadata !"x", metadata !2, i32 1, metadata !6} ; [ DW_TAG_arg_variable ] -!1 = metadata !{i32 786478, i32 0, metadata !2, metadata !"foo", metadata !"foo", metadata !"foo", metadata !2, i32 1, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 (i32, i32, i32, i32)* @foo, null, null, null, i32 1} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 786478, metadata !2, metadata !"foo", metadata !"foo", metadata !"foo", metadata !2, i32 1, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 (i32, i32, i32, i32)* @foo, null, null, null, i32 1} ; [ DW_TAG_subprogram ] !2 = metadata !{i32 786473, metadata !10} ; [ DW_TAG_file_type ] -!3 = metadata !{i32 786449, i32 0, i32 12, metadata !2, metadata !"producer", i1 false, metadata !"", i32 0, null, null, metadata !9, null, metadata !""} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 786449, metadata !10, i32 12, metadata !"producer", i1 false, metadata !"", i32 0, null, null, metadata !9, null, metadata !""} ; [ DW_TAG_compile_unit ] !4 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null} ; [ DW_TAG_subroutine_type ] !5 = metadata !{metadata !6} !6 = metadata !{i32 786468, metadata !2, metadata !"int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] diff --git a/test/CodeGen/X86/unwindraise.ll b/test/CodeGen/X86/unwindraise.ll index a438723..9bbe980 100644 --- a/test/CodeGen/X86/unwindraise.ll +++ b/test/CodeGen/X86/unwindraise.ll @@ -50,12 +50,12 @@ while.body: ; preds = %uw_update_context.e ] if.end3: ; preds = %while.body - %4 = load i32 (i32, i32, i64, %struct._Unwind_Exception*, %struct._Unwind_Context*)** %personality, align 8, !tbaa !0 + %4 = load i32 (i32, i32, i64, %struct._Unwind_Exception*, %struct._Unwind_Context*)** %personality, align 8 %tobool = icmp eq i32 (i32, i32, i64, %struct._Unwind_Exception*, %struct._Unwind_Context*)* %4, null br i1 %tobool, label %if.end13, label %if.then4 if.then4: ; preds = %if.end3 - %5 = load i64* %exception_class, align 8, !tbaa !3 + %5 = load i64* %exception_class, align 8 %call6 = call i32 %4(i32 1, i32 1, i64 %5, %struct._Unwind_Exception* %exc, %struct._Unwind_Context* %cur_context) switch i32 %call6, label %do.end21.loopexit46 [ i32 6, label %while.end @@ -64,7 +64,7 @@ if.then4: ; preds = %if.end3 if.end13: ; preds = %if.then4, %if.end3 call fastcc void @uw_update_context_1(%struct._Unwind_Context* %cur_context, %struct._Unwind_FrameState* %fs) - %6 = load i64* %retaddr_column.i, align 8, !tbaa !3 + %6 = load i64* %retaddr_column.i, align 8 %conv.i = trunc i64 %6 to i32 %cmp.i.i.i = icmp slt i32 %conv.i, 18 br i1 %cmp.i.i.i, label %cond.end.i.i.i, label %cond.true.i.i.i @@ -77,17 +77,17 @@ cond.end.i.i.i: ; preds = %if.end13 %sext.i = shl i64 %6, 32 %idxprom.i.i.i = ashr exact i64 %sext.i, 32 %arrayidx.i.i.i = getelementptr inbounds [18 x i8]* @dwarf_reg_size_table, i64 0, i64 %idxprom.i.i.i - %7 = load i8* %arrayidx.i.i.i, align 1, !tbaa !1 + %7 = load i8* %arrayidx.i.i.i, align 1 %arrayidx2.i.i.i = getelementptr inbounds %struct._Unwind_Context* %cur_context, i64 0, i32 0, i64 %idxprom.i.i.i - %8 = load i8** %arrayidx2.i.i.i, align 8, !tbaa !0 - %9 = load i64* %flags.i.i.i.i, align 8, !tbaa !3 + %8 = load i8** %arrayidx2.i.i.i, align 8 + %9 = load i64* %flags.i.i.i.i, align 8 %and.i.i.i.i = and i64 %9, 4611686018427387904 %tobool.i.i.i = icmp eq i64 %and.i.i.i.i, 0 br i1 %tobool.i.i.i, label %if.end.i.i.i, label %land.lhs.true.i.i.i land.lhs.true.i.i.i: ; preds = %cond.end.i.i.i %arrayidx4.i.i.i = getelementptr inbounds %struct._Unwind_Context* %cur_context, i64 0, i32 8, i64 %idxprom.i.i.i - %10 = load i8* %arrayidx4.i.i.i, align 1, !tbaa !1 + %10 = load i8* %arrayidx4.i.i.i, align 1 %tobool6.i.i.i = icmp eq i8 %10, 0 br i1 %tobool6.i.i.i, label %if.end.i.i.i, label %if.then.i.i.i @@ -101,7 +101,7 @@ if.end.i.i.i: ; preds = %land.lhs.true.i.i.i if.then10.i.i.i: ; preds = %if.end.i.i.i %12 = bitcast i8* %8 to i64* - %13 = load i64* %12, align 8, !tbaa !3 + %13 = load i64* %12, align 8 br label %uw_update_context.exit cond.true14.i.i.i: ; preds = %if.end.i.i.i @@ -111,16 +111,16 @@ cond.true14.i.i.i: ; preds = %if.end.i.i.i uw_update_context.exit: ; preds = %if.then10.i.i.i, %if.then.i.i.i %retval.0.i.i.i = phi i64 [ %11, %if.then.i.i.i ], [ %13, %if.then10.i.i.i ] %14 = inttoptr i64 %retval.0.i.i.i to i8* - store i8* %14, i8** %ra.i, align 8, !tbaa !0 + store i8* %14, i8** %ra.i, align 8 br label %while.body while.end: ; preds = %if.then4 %private_1 = getelementptr inbounds %struct._Unwind_Exception* %exc, i64 0, i32 2 - store i64 0, i64* %private_1, align 8, !tbaa !3 - %15 = load i8** %ra.i, align 8, !tbaa !0 + store i64 0, i64* %private_1, align 8 + %15 = load i8** %ra.i, align 8 %16 = ptrtoint i8* %15 to i64 %private_2 = getelementptr inbounds %struct._Unwind_Exception* %exc, i64 0, i32 3 - store i64 %16, i64* %private_2, align 8, !tbaa !3 + store i64 %16, i64* %private_2, align 8 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %2, i8* %3, i64 240, i32 8, i1 false) %17 = bitcast %struct._Unwind_FrameState* %fs.i to i8* call void @llvm.lifetime.start(i64 -1, i8* %17) @@ -130,21 +130,21 @@ while.end: ; preds = %if.then4 while.body.i: ; preds = %uw_update_context.exit44, %while.end %call.i = call fastcc i32 @uw_frame_state_for(%struct._Unwind_Context* %cur_context, %struct._Unwind_FrameState* %fs.i) - %18 = load i8** %ra.i, align 8, !tbaa !0 + %18 = load i8** %ra.i, align 8 %19 = ptrtoint i8* %18 to i64 - %20 = load i64* %private_2, align 8, !tbaa !3 + %20 = load i64* %private_2, align 8 %cmp.i = icmp eq i64 %19, %20 %cmp2.i = icmp eq i32 %call.i, 0 br i1 %cmp2.i, label %if.end.i, label %do.end21 if.end.i: ; preds = %while.body.i - %21 = load i32 (i32, i32, i64, %struct._Unwind_Exception*, %struct._Unwind_Context*)** %personality.i, align 8, !tbaa !0 + %21 = load i32 (i32, i32, i64, %struct._Unwind_Exception*, %struct._Unwind_Context*)** %personality.i, align 8 %tobool.i = icmp eq i32 (i32, i32, i64, %struct._Unwind_Exception*, %struct._Unwind_Context*)* %21, null br i1 %tobool.i, label %if.end12.i, label %if.then3.i if.then3.i: ; preds = %if.end.i %or.i = select i1 %cmp.i, i32 6, i32 2 - %22 = load i64* %exception_class, align 8, !tbaa !3 + %22 = load i64* %exception_class, align 8 %call5.i = call i32 %21(i32 1, i32 %or.i, i64 %22, %struct._Unwind_Exception* %exc, %struct._Unwind_Context* %cur_context) switch i32 %call5.i, label %do.end21 [ i32 7, label %do.body19 @@ -160,7 +160,7 @@ cond.true.i: ; preds = %if.end12.i cond.end.i: ; preds = %if.end12.i call fastcc void @uw_update_context_1(%struct._Unwind_Context* %cur_context, %struct._Unwind_FrameState* %fs.i) - %23 = load i64* %retaddr_column.i22, align 8, !tbaa !3 + %23 = load i64* %retaddr_column.i22, align 8 %conv.i23 = trunc i64 %23 to i32 %cmp.i.i.i24 = icmp slt i32 %conv.i23, 18 br i1 %cmp.i.i.i24, label %cond.end.i.i.i33, label %cond.true.i.i.i25 @@ -173,17 +173,17 @@ cond.end.i.i.i33: ; preds = %cond.end.i %sext.i26 = shl i64 %23, 32 %idxprom.i.i.i27 = ashr exact i64 %sext.i26, 32 %arrayidx.i.i.i28 = getelementptr inbounds [18 x i8]* @dwarf_reg_size_table, i64 0, i64 %idxprom.i.i.i27 - %24 = load i8* %arrayidx.i.i.i28, align 1, !tbaa !1 + %24 = load i8* %arrayidx.i.i.i28, align 1 %arrayidx2.i.i.i29 = getelementptr inbounds %struct._Unwind_Context* %cur_context, i64 0, i32 0, i64 %idxprom.i.i.i27 - %25 = load i8** %arrayidx2.i.i.i29, align 8, !tbaa !0 - %26 = load i64* %flags.i.i.i.i, align 8, !tbaa !3 + %25 = load i8** %arrayidx2.i.i.i29, align 8 + %26 = load i64* %flags.i.i.i.i, align 8 %and.i.i.i.i31 = and i64 %26, 4611686018427387904 %tobool.i.i.i32 = icmp eq i64 %and.i.i.i.i31, 0 br i1 %tobool.i.i.i32, label %if.end.i.i.i39, label %land.lhs.true.i.i.i36 land.lhs.true.i.i.i36: ; preds = %cond.end.i.i.i33 %arrayidx4.i.i.i34 = getelementptr inbounds %struct._Unwind_Context* %cur_context, i64 0, i32 8, i64 %idxprom.i.i.i27 - %27 = load i8* %arrayidx4.i.i.i34, align 1, !tbaa !1 + %27 = load i8* %arrayidx4.i.i.i34, align 1 %tobool6.i.i.i35 = icmp eq i8 %27, 0 br i1 %tobool6.i.i.i35, label %if.end.i.i.i39, label %if.then.i.i.i37 @@ -197,7 +197,7 @@ if.end.i.i.i39: ; preds = %land.lhs.true.i.i.i if.then10.i.i.i40: ; preds = %if.end.i.i.i39 %29 = bitcast i8* %25 to i64* - %30 = load i64* %29, align 8, !tbaa !3 + %30 = load i64* %29, align 8 br label %uw_update_context.exit44 cond.true14.i.i.i41: ; preds = %if.end.i.i.i39 @@ -207,13 +207,13 @@ cond.true14.i.i.i41: ; preds = %if.end.i.i.i39 uw_update_context.exit44: ; preds = %if.then10.i.i.i40, %if.then.i.i.i37 %retval.0.i.i.i42 = phi i64 [ %28, %if.then.i.i.i37 ], [ %30, %if.then10.i.i.i40 ] %31 = inttoptr i64 %retval.0.i.i.i42 to i8* - store i8* %31, i8** %ra.i, align 8, !tbaa !0 + store i8* %31, i8** %ra.i, align 8 br label %while.body.i do.body19: ; preds = %if.then3.i call void @llvm.lifetime.end(i64 -1, i8* %17) %call20 = call fastcc i64 @uw_install_context_1(%struct._Unwind_Context* %this_context, %struct._Unwind_Context* %cur_context) - %32 = load i8** %ra.i, align 8, !tbaa !0 + %32 = load i8** %ra.i, align 8 call void @llvm.eh.return.i64(i64 %call20, i8* %32) unreachable @@ -245,8 +245,3 @@ declare fastcc void @uw_update_context_1(%struct._Unwind_Context*, %struct._Unwi declare void @llvm.lifetime.start(i64, i8* nocapture) nounwind declare void @llvm.lifetime.end(i64, i8* nocapture) nounwind - -!0 = metadata !{metadata !"any pointer", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} -!3 = metadata !{metadata !"long", metadata !1} diff --git a/test/CodeGen/X86/v4f32-immediate.ll b/test/CodeGen/X86/v4f32-immediate.ll index b5ebaa7..68d20a0 100644 --- a/test/CodeGen/X86/v4f32-immediate.ll +++ b/test/CodeGen/X86/v4f32-immediate.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -march=x86 -mattr=+sse | grep movaps +; RUN: llc < %s -march=x86 -mattr=+sse | FileCheck %s + +; CHECK: movaps define <4 x float> @foo() { ret <4 x float> <float 0x4009C9D0A0000000, float 0x4002666660000000, float 0x3FF3333340000000, float 0x3FB99999A0000000> diff --git a/test/CodeGen/X86/vararg_tailcall.ll b/test/CodeGen/X86/vararg_tailcall.ll index 73d80eb..eeda5e1 100644 --- a/test/CodeGen/X86/vararg_tailcall.ll +++ b/test/CodeGen/X86/vararg_tailcall.ll @@ -39,7 +39,7 @@ declare void @bar2(i8*, i64) optsize noredzone ; WIN64: callq define i8* @foo2(i8* %arg) nounwind optsize ssp noredzone { entry: - %tmp1 = load i8** @sel, align 8, !tbaa !0 + %tmp1 = load i8** @sel, align 8 %call = tail call i8* (i8*, i8*, ...)* @x2(i8* %arg, i8* %tmp1) nounwind optsize noredzone ret i8* %call } @@ -52,10 +52,10 @@ declare i8* @x2(i8*, i8*, ...) optsize noredzone ; WIN64: callq define i8* @foo6(i8* %arg1, i8* %arg2) nounwind optsize ssp noredzone { entry: - %tmp2 = load i8** @sel3, align 8, !tbaa !0 - %tmp3 = load i8** @sel4, align 8, !tbaa !0 - %tmp4 = load i8** @sel5, align 8, !tbaa !0 - %tmp5 = load i8** @sel6, align 8, !tbaa !0 + %tmp2 = load i8** @sel3, align 8 + %tmp3 = load i8** @sel4, align 8 + %tmp4 = load i8** @sel5, align 8 + %tmp5 = load i8** @sel6, align 8 %call = tail call i8* (i8*, i8*, i8*, ...)* @x3(i8* %arg1, i8* %arg2, i8* %tmp2, i8* %tmp3, i8* %tmp4, i8* %tmp5) nounwind optsize noredzone ret i8* %call } @@ -68,11 +68,11 @@ declare i8* @x3(i8*, i8*, i8*, ...) optsize noredzone ; WIN64: callq define i8* @foo7(i8* %arg1, i8* %arg2) nounwind optsize ssp noredzone { entry: - %tmp2 = load i8** @sel3, align 8, !tbaa !0 - %tmp3 = load i8** @sel4, align 8, !tbaa !0 - %tmp4 = load i8** @sel5, align 8, !tbaa !0 - %tmp5 = load i8** @sel6, align 8, !tbaa !0 - %tmp6 = load i8** @sel7, align 8, !tbaa !0 + %tmp2 = load i8** @sel3, align 8 + %tmp3 = load i8** @sel4, align 8 + %tmp4 = load i8** @sel5, align 8 + %tmp5 = load i8** @sel6, align 8 + %tmp6 = load i8** @sel7, align 8 %call = tail call i8* (i8*, i8*, i8*, i8*, i8*, i8*, i8*, ...)* @x7(i8* %arg1, i8* %arg2, i8* %tmp2, i8* %tmp3, i8* %tmp4, i8* %tmp5, i8* %tmp6) nounwind optsize noredzone ret i8* %call } @@ -85,14 +85,10 @@ declare i8* @x7(i8*, i8*, i8*, i8*, i8*, i8*, i8*, ...) optsize noredzone ; WIN64: callq define i8* @foo8(i8* %arg1, i8* %arg2) nounwind optsize ssp noredzone { entry: - %tmp2 = load i8** @sel3, align 8, !tbaa !0 - %tmp3 = load i8** @sel4, align 8, !tbaa !0 - %tmp4 = load i8** @sel5, align 8, !tbaa !0 - %tmp5 = load i8** @sel6, align 8, !tbaa !0 + %tmp2 = load i8** @sel3, align 8 + %tmp3 = load i8** @sel4, align 8 + %tmp4 = load i8** @sel5, align 8 + %tmp5 = load i8** @sel6, align 8 %call = tail call i8* (i8*, i8*, i8*, ...)* @x3(i8* %arg1, i8* %arg2, i8* %tmp2, i8* %tmp3, i8* %tmp4, i8* %tmp5, i32 48879, i32 48879) nounwind optsize noredzone ret i8* %call } - -!0 = metadata !{metadata !"any pointer", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/X86/vec_compare.ll b/test/CodeGen/X86/vec_compare.ll index b6d91a3..85d8b2c 100644 --- a/test/CodeGen/X86/vec_compare.ll +++ b/test/CodeGen/X86/vec_compare.ll @@ -65,3 +65,139 @@ define <2 x i64> @test6(<2 x i64> %A, <2 x i64> %B) nounwind { %D = sext <2 x i1> %C to <2 x i64> ret <2 x i64> %D } + +define <2 x i64> @test7(<2 x i64> %A, <2 x i64> %B) nounwind { +; CHECK: test7: +; CHECK: pcmpgtd %xmm1 +; CHECK: pshufd $-96 +; CHECK: pcmpeqd +; CHECK: pshufd $-11 +; CHECK: pand +; CHECK: pshufd $-11 +; CHECK: por +; CHECK: ret + %C = icmp sgt <2 x i64> %A, %B + %D = sext <2 x i1> %C to <2 x i64> + ret <2 x i64> %D +} + +define <2 x i64> @test8(<2 x i64> %A, <2 x i64> %B) nounwind { +; CHECK: test8: +; CHECK: pcmpgtd %xmm0 +; CHECK: pshufd $-96 +; CHECK: pcmpeqd +; CHECK: pshufd $-11 +; CHECK: pand +; CHECK: pshufd $-11 +; CHECK: por +; CHECK: ret + %C = icmp slt <2 x i64> %A, %B + %D = sext <2 x i1> %C to <2 x i64> + ret <2 x i64> %D +} + +define <2 x i64> @test9(<2 x i64> %A, <2 x i64> %B) nounwind { +; CHECK: test9: +; CHECK: pcmpgtd %xmm0 +; CHECK: pshufd $-96 +; CHECK: pcmpeqd +; CHECK: pshufd $-11 +; CHECK: pand +; CHECK: pshufd $-11 +; CHECK: por +; CHECK: pcmpeqd +; CHECK: pxor +; CHECK: ret + %C = icmp sge <2 x i64> %A, %B + %D = sext <2 x i1> %C to <2 x i64> + ret <2 x i64> %D +} + +define <2 x i64> @test10(<2 x i64> %A, <2 x i64> %B) nounwind { +; CHECK: test10: +; CHECK: pcmpgtd %xmm1 +; CHECK: pshufd $-96 +; CHECK: pcmpeqd +; CHECK: pshufd $-11 +; CHECK: pand +; CHECK: pshufd $-11 +; CHECK: por +; CHECK: pcmpeqd +; CHECK: pxor +; CHECK: ret + %C = icmp sle <2 x i64> %A, %B + %D = sext <2 x i1> %C to <2 x i64> + ret <2 x i64> %D +} + +define <2 x i64> @test11(<2 x i64> %A, <2 x i64> %B) nounwind { +; CHECK: test11: +; CHECK: pxor +; CHECK: pxor +; CHECK: pcmpgtd %xmm1 +; CHECK: pshufd $-96 +; CHECK: pcmpeqd +; CHECK: pshufd $-11 +; CHECK: pand +; CHECK: pshufd $-11 +; CHECK: por +; CHECK: ret + %C = icmp ugt <2 x i64> %A, %B + %D = sext <2 x i1> %C to <2 x i64> + ret <2 x i64> %D +} + +define <2 x i64> @test12(<2 x i64> %A, <2 x i64> %B) nounwind { +; CHECK: test12: +; CHECK: pxor +; CHECK: pxor +; CHECK: pcmpgtd %xmm0 +; CHECK: pshufd $-96 +; CHECK: pcmpeqd +; CHECK: pshufd $-11 +; CHECK: pand +; CHECK: pshufd $-11 +; CHECK: por +; CHECK: ret + %C = icmp ult <2 x i64> %A, %B + %D = sext <2 x i1> %C to <2 x i64> + ret <2 x i64> %D +} + +define <2 x i64> @test13(<2 x i64> %A, <2 x i64> %B) nounwind { +; CHECK: test13: +; CHECK: pxor +; CHECK: pxor +; CHECK: pcmpgtd %xmm0 +; CHECK: pshufd $-96 +; CHECK: pcmpeqd +; CHECK: pshufd $-11 +; CHECK: pand +; CHECK: pshufd $-11 +; CHECK: por +; CHECK: pcmpeqd +; CHECK: pxor +; CHECK: ret + %C = icmp uge <2 x i64> %A, %B + %D = sext <2 x i1> %C to <2 x i64> + ret <2 x i64> %D +} + +define <2 x i64> @test14(<2 x i64> %A, <2 x i64> %B) nounwind { +; CHECK: test14: +; CHECK: pxor +; CHECK: pxor +; CHECK: pcmpgtd %xmm1 +; CHECK: pshufd $-96 +; CHECK: pcmpeqd +; CHECK: pshufd $-11 +; CHECK: pand +; CHECK: pshufd $-11 +; CHECK: por +; CHECK: pcmpeqd +; CHECK: pxor +; CHECK: ret + %C = icmp ule <2 x i64> %A, %B + %D = sext <2 x i1> %C to <2 x i64> + ret <2 x i64> %D +} diff --git a/test/CodeGen/X86/vec_fpext.ll b/test/CodeGen/X86/vec_fpext.ll index e4a8f46..863712f 100644 --- a/test/CodeGen/X86/vec_fpext.ll +++ b/test/CodeGen/X86/vec_fpext.ll @@ -1,5 +1,5 @@ ; RUN: llc < %s -march=x86 -mattr=+sse41,-avx | FileCheck %s -; RUN: llc < %s -march=x86 -mattr=+avx | FileCheck --check-prefix=AVX %s +; RUN: llc < %s -march=x86 -mcpu=corei7-avx | FileCheck --check-prefix=AVX %s ; PR11674 define void @fpext_frommem(<2 x float>* %in, <2 x double>* %out) { diff --git a/test/CodeGen/X86/vec_set-9.ll b/test/CodeGen/X86/vec_set-9.ll index b8ec0cf..6979f6b 100644 --- a/test/CodeGen/X86/vec_set-9.ll +++ b/test/CodeGen/X86/vec_set-9.ll @@ -1,5 +1,10 @@ -; RUN: llc < %s -march=x86-64 | grep movd | count 1 -; RUN: llc < %s -march=x86-64 | grep "movlhps.*%xmm0, %xmm0" +; RUN: llc < %s -march=x86-64 | FileCheck %s + +; CHECK: test3 +; CHECK: movd +; CHECK-NOT: movd +; CHECK: {{movlhps.*%xmm0, %xmm0}} +; CHECK-NEXT: ret define <2 x i64> @test3(i64 %A) nounwind { entry: diff --git a/test/CodeGen/X86/vec_set-B.ll b/test/CodeGen/X86/vec_set-B.ll index f5b3e8b..5578eca 100644 --- a/test/CodeGen/X86/vec_set-B.ll +++ b/test/CodeGen/X86/vec_set-B.ll @@ -1,6 +1,8 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep movaps +; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep esp | count 2 +; CHECK-NOT: movaps + ; These should both generate something like this: ;_test3: ; movl $1234567, %eax diff --git a/test/CodeGen/X86/vec_set-D.ll b/test/CodeGen/X86/vec_set-D.ll index 3d6369e..9c1e1ac 100644 --- a/test/CodeGen/X86/vec_set-D.ll +++ b/test/CodeGen/X86/vec_set-D.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movq +; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s + +; CHECK: movq define <4 x i32> @t(i32 %x, i32 %y) nounwind { %tmp1 = insertelement <4 x i32> zeroinitializer, i32 %x, i32 0 diff --git a/test/CodeGen/X86/vec_set-I.ll b/test/CodeGen/X86/vec_set-I.ll index 64f36f9..c5d6ab8 100644 --- a/test/CodeGen/X86/vec_set-I.ll +++ b/test/CodeGen/X86/vec_set-I.ll @@ -1,5 +1,8 @@ -; RUN: llc < %s -march=x86 -mattr=+sse2 | grep movd -; RUN: llc < %s -march=x86 -mattr=+sse2 | not grep xorp +; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s + +; CHECK-NOT: xorp +; CHECK: movd +; CHECK-NOT: xorp define void @t1() nounwind { %tmp298.i.i = load <4 x float>* null, align 16 diff --git a/test/CodeGen/X86/vec_shuffle-28.ll b/test/CodeGen/X86/vec_shuffle-28.ll index 343685b..ebf5577 100644 --- a/test/CodeGen/X86/vec_shuffle-28.ll +++ b/test/CodeGen/X86/vec_shuffle-28.ll @@ -1,5 +1,7 @@ -; RUN: llc < %s -march=x86 -mcpu=core2 -o %t -; RUN: grep pshufb %t | count 1 +; RUN: llc < %s -march=x86 -mcpu=core2 | FileCheck %s + +; CHECK: pshufb +; CHECK-NOT: pshufb ; FIXME: this test has a superfluous punpcklqdq pre-pshufb currently. ; Don't XFAIL it because it's still better than the previous code. diff --git a/test/CodeGen/X86/vec_zero_cse.ll b/test/CodeGen/X86/vec_zero_cse.ll index 41ea024..bda3fef 100644 --- a/test/CodeGen/X86/vec_zero_cse.ll +++ b/test/CodeGen/X86/vec_zero_cse.ll @@ -1,7 +1,13 @@ -; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | grep xorps | count 1 -; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | grep pcmpeqd | count 1 +; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | FileCheck %s +; RUN: llc < %s -relocation-model=static -march=x86 -mcpu=yonah | FileCheck -check-prefix CHECK2 %s ; 64-bit stores here do not use MMX. +; CHECK: xorps +; CHECK-NOT: xorps + +; CHECK2: pcmpeqd +; CHECK2-NOT: pcmpeqd + @M1 = external global <1 x i64> @M2 = external global <2 x i32> diff --git a/test/CodeGen/X86/vector.ll b/test/CodeGen/X86/vector.ll index 46b0e18..82d20a2 100644 --- a/test/CodeGen/X86/vector.ll +++ b/test/CodeGen/X86/vector.ll @@ -1,6 +1,6 @@ ; Test that vectors are scalarized/lowered correctly. -; RUN: llc < %s -march=x86 -mcpu=i386 > %t -; RUN: llc < %s -march=x86 -mcpu=yonah >> %t +; RUN: llc < %s -march=x86 -mcpu=i386 +; RUN: llc < %s -march=x86 -mcpu=yonah %d8 = type <8 x double> %f1 = type <1 x float> diff --git a/test/CodeGen/X86/viabs.ll b/test/CodeGen/X86/viabs.ll new file mode 100644 index 0000000..f748a14 --- /dev/null +++ b/test/CodeGen/X86/viabs.ll @@ -0,0 +1,183 @@ +; RUN: llc < %s -march=x86-64 -mcpu=x86-64 | FileCheck %s -check-prefix=SSE2 +; RUN: llc < %s -march=x86-64 -mcpu=corei7 | FileCheck %s -check-prefix=SSSE3 +; RUN: llc < %s -march=x86-64 -mcpu=core-avx2 | FileCheck %s -check-prefix=AVX2 + +define <4 x i32> @test1(<4 x i32> %a) nounwind { +; SSE2: test1: +; SSE2: movdqa +; SSE2: psrad $31 +; SSE2-NEXT: padd +; SSE2-NEXT: pxor +; SSE2-NEXT: ret + +; SSSE3: test1: +; SSSE3: pabsd +; SSSE3-NEXT: ret + +; AVX2: test1: +; AVX2: vpabsd +; AVX2-NEXT: ret + %tmp1neg = sub <4 x i32> zeroinitializer, %a + %b = icmp sgt <4 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1> + %abs = select <4 x i1> %b, <4 x i32> %a, <4 x i32> %tmp1neg + ret <4 x i32> %abs +} + +define <4 x i32> @test2(<4 x i32> %a) nounwind { +; SSE2: test2: +; SSE2: movdqa +; SSE2: psrad $31 +; SSE2-NEXT: padd +; SSE2-NEXT: pxor +; SSE2-NEXT: ret + +; SSSE3: test2: +; SSSE3: pabsd +; SSSE3-NEXT: ret + +; AVX2: test2: +; AVX2: vpabsd +; AVX2-NEXT: ret + %tmp1neg = sub <4 x i32> zeroinitializer, %a + %b = icmp sge <4 x i32> %a, zeroinitializer + %abs = select <4 x i1> %b, <4 x i32> %a, <4 x i32> %tmp1neg + ret <4 x i32> %abs +} + +define <8 x i16> @test3(<8 x i16> %a) nounwind { +; SSE2: test3: +; SSE2: movdqa +; SSE2: psraw $15 +; SSE2-NEXT: padd +; SSE2-NEXT: pxor +; SSE2-NEXT: ret + +; SSSE3: test3: +; SSSE3: pabsw +; SSSE3-NEXT: ret + +; AVX2: test3: +; AVX2: vpabsw +; AVX2-NEXT: ret + %tmp1neg = sub <8 x i16> zeroinitializer, %a + %b = icmp sgt <8 x i16> %a, zeroinitializer + %abs = select <8 x i1> %b, <8 x i16> %a, <8 x i16> %tmp1neg + ret <8 x i16> %abs +} + +define <16 x i8> @test4(<16 x i8> %a) nounwind { +; SSE2: test4: +; SSE2: pxor +; SSE2: pcmpgtb +; SSE2-NEXT: padd +; SSE2-NEXT: pxor +; SSE2-NEXT: ret + +; SSSE3: test4: +; SSSE3: pabsb +; SSSE3-NEXT: ret + +; AVX2: test4: +; AVX2: vpabsb +; AVX2-NEXT: ret + %tmp1neg = sub <16 x i8> zeroinitializer, %a + %b = icmp slt <16 x i8> %a, zeroinitializer + %abs = select <16 x i1> %b, <16 x i8> %tmp1neg, <16 x i8> %a + ret <16 x i8> %abs +} + +define <4 x i32> @test5(<4 x i32> %a) nounwind { +; SSE2: test5: +; SSE2: movdqa +; SSE2: psrad $31 +; SSE2-NEXT: padd +; SSE2-NEXT: pxor +; SSE2-NEXT: ret + +; SSSE3: test5: +; SSSE3: pabsd +; SSSE3-NEXT: ret + +; AVX2: test5: +; AVX2: vpabsd +; AVX2-NEXT: ret + %tmp1neg = sub <4 x i32> zeroinitializer, %a + %b = icmp sle <4 x i32> %a, zeroinitializer + %abs = select <4 x i1> %b, <4 x i32> %tmp1neg, <4 x i32> %a + ret <4 x i32> %abs +} + +define <8 x i32> @test6(<8 x i32> %a) nounwind { +; SSSE3: test6: +; SSSE3: pabsd +; SSSE3: pabsd +; SSSE3-NEXT: ret + +; AVX2: test6: +; AVX2: vpabsd {{.*}}%ymm +; AVX2-NEXT: ret + %tmp1neg = sub <8 x i32> zeroinitializer, %a + %b = icmp sgt <8 x i32> %a, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1> + %abs = select <8 x i1> %b, <8 x i32> %a, <8 x i32> %tmp1neg + ret <8 x i32> %abs +} + +define <8 x i32> @test7(<8 x i32> %a) nounwind { +; SSSE3: test7: +; SSSE3: pabsd +; SSSE3: pabsd +; SSSE3-NEXT: ret + +; AVX2: test7: +; AVX2: vpabsd {{.*}}%ymm +; AVX2-NEXT: ret + %tmp1neg = sub <8 x i32> zeroinitializer, %a + %b = icmp sge <8 x i32> %a, zeroinitializer + %abs = select <8 x i1> %b, <8 x i32> %a, <8 x i32> %tmp1neg + ret <8 x i32> %abs +} + +define <16 x i16> @test8(<16 x i16> %a) nounwind { +; SSSE3: test8: +; SSSE3: pabsw +; SSSE3: pabsw +; SSSE3-NEXT: ret + +; AVX2: test8: +; AVX2: vpabsw {{.*}}%ymm +; AVX2-NEXT: ret + %tmp1neg = sub <16 x i16> zeroinitializer, %a + %b = icmp sgt <16 x i16> %a, zeroinitializer + %abs = select <16 x i1> %b, <16 x i16> %a, <16 x i16> %tmp1neg + ret <16 x i16> %abs +} + +define <32 x i8> @test9(<32 x i8> %a) nounwind { +; SSSE3: test9: +; SSSE3: pabsb +; SSSE3: pabsb +; SSSE3-NEXT: ret + +; AVX2: test9: +; AVX2: vpabsb {{.*}}%ymm +; AVX2-NEXT: ret + %tmp1neg = sub <32 x i8> zeroinitializer, %a + %b = icmp slt <32 x i8> %a, zeroinitializer + %abs = select <32 x i1> %b, <32 x i8> %tmp1neg, <32 x i8> %a + ret <32 x i8> %abs +} + +define <8 x i32> @test10(<8 x i32> %a) nounwind { +; SSSE3: test10: +; SSSE3: pabsd +; SSSE3: pabsd +; SSSE3-NEXT: ret + +; AVX2: test10: +; AVX2: vpabsd {{.*}}%ymm +; AVX2-NEXT: ret + %tmp1neg = sub <8 x i32> zeroinitializer, %a + %b = icmp sle <8 x i32> %a, zeroinitializer + %abs = select <8 x i1> %b, <8 x i32> %tmp1neg, <8 x i32> %a + ret <8 x i32> %abs +} diff --git a/test/CodeGen/X86/wide-fma-contraction.ll b/test/CodeGen/X86/wide-fma-contraction.ll new file mode 100644 index 0000000..d93f33b --- /dev/null +++ b/test/CodeGen/X86/wide-fma-contraction.ll @@ -0,0 +1,20 @@ +; RUN: llc -march=x86 -mattr=+fma4 -mtriple=x86_64-apple-darwin < %s | FileCheck %s + +; CHECK: fmafunc +define <16 x float> @fmafunc(<16 x float> %a, <16 x float> %b, <16 x float> %c) { +; CHECK-NOT: vmulps +; CHECK-NOT: vaddps +; CHECK: vfmaddps +; CHECK-NOT: vmulps +; CHECK-NOT: vaddps +; CHECK: vfmaddps +; CHECK-NOT: vmulps +; CHECK-NOT: vaddps + %ret = tail call <16 x float> @llvm.fmuladd.v16f32(<16 x float> %a, <16 x float> %b, <16 x float> %c) + ret <16 x float> %ret +} + +declare <16 x float> @llvm.fmuladd.v16f32(<16 x float>, <16 x float>, <16 x float>) nounwind readnone + + + diff --git a/test/CodeGen/X86/win32_sret.ll b/test/CodeGen/X86/win32_sret.ll index 878c6db..2bfe5fb 100644 --- a/test/CodeGen/X86/win32_sret.ll +++ b/test/CodeGen/X86/win32_sret.ll @@ -1,28 +1,126 @@ -; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck %s -check-prefix=WIN_X32 -; RUN: llc < %s -mtriple=i686-pc-mingw32 | FileCheck %s -check-prefix=MINGW_X32 +; We specify -mcpu explicitly to avoid instruction reordering that happens on +; some setups (e.g., Atom) from affecting the output. +; RUN: llc < %s -mcpu=core2 -mtriple=i686-pc-win32 | FileCheck %s -check-prefix=WIN32 +; RUN: llc < %s -mtriple=i686-pc-mingw32 | FileCheck %s -check-prefix=MINGW_X86 ; RUN: llc < %s -mtriple=i386-pc-linux | FileCheck %s -check-prefix=LINUX -; RUN: llc < %s -O0 -mtriple=i686-pc-win32 | FileCheck %s -check-prefix=WIN_X32 -; RUN: llc < %s -O0 -mtriple=i686-pc-mingw32 | FileCheck %s -check-prefix=MINGW_X32 +; RUN: llc < %s -mcpu=core2 -O0 -mtriple=i686-pc-win32 | FileCheck %s -check-prefix=WIN32 +; RUN: llc < %s -O0 -mtriple=i686-pc-mingw32 | FileCheck %s -check-prefix=MINGW_X86 ; RUN: llc < %s -O0 -mtriple=i386-pc-linux | FileCheck %s -check-prefix=LINUX ; The SysV ABI used by most Unixes and Mingw on x86 specifies that an sret pointer ; is callee-cleanup. However, in MSVC's cdecl calling convention, sret pointer ; arguments are caller-cleanup like normal arguments. -define void @sret1(i8* sret) nounwind { +define void @sret1(i8* sret %x) nounwind { entry: -; WIN_X32: {{ret$}} -; MINGW_X32: ret $4 +; WIN32: sret1 +; WIN32: movb $42, (%eax) +; WIN32-NOT: popl %eax +; WIN32: {{ret$}} + +; MINGW_X86: sret1 +; MINGW_X86: ret $4 + +; LINUX: sret1 ; LINUX: ret $4 + + store i8 42, i8* %x, align 4 ret void } -define void @sret2(i32* sret %x, i32 %y) nounwind { +define void @sret2(i8* sret %x, i8 %y) nounwind { entry: -; WIN_X32: {{ret$}} -; MINGW_X32: ret $4 +; WIN32: sret2 +; WIN32: movb {{.*}}, (%eax) +; WIN32-NOT: popl %eax +; WIN32: {{ret$}} + +; MINGW_X86: sret2 +; MINGW_X86: ret $4 + +; LINUX: sret2 ; LINUX: ret $4 - store i32 %y, i32* %x + + store i8 %y, i8* %x ret void } +define void @sret3(i8* sret %x, i8* %y) nounwind { +entry: +; WIN32: sret3 +; WIN32: movb $42, (%eax) +; WIN32-NOT: movb $13, (%eax) +; WIN32-NOT: popl %eax +; WIN32: {{ret$}} + +; MINGW_X86: sret3 +; MINGW_X86: ret $4 + +; LINUX: sret3 +; LINUX: ret $4 + + store i8 42, i8* %x + store i8 13, i8* %y + ret void +} + +; PR15556 +%struct.S4 = type { i32, i32, i32 } + +define void @sret4(%struct.S4* noalias sret %agg.result) { +entry: +; WIN32: sret4 +; WIN32: movl $42, (%eax) +; WIN32-NOT: popl %eax +; WIN32: {{ret$}} + +; MINGW_X86: sret4 +; MINGW_X86: ret $4 + +; LINUX: sret4 +; LINUX: ret $4 + + %x = getelementptr inbounds %struct.S4* %agg.result, i32 0, i32 0 + store i32 42, i32* %x, align 4 + ret void +} + +%struct.S5 = type { i32 } +%class.C5 = type { i8 } + +define x86_thiscallcc void @"\01?foo@C5@@QAE?AUS5@@XZ"(%struct.S5* noalias sret %agg.result, %class.C5* %this) { +entry: + %this.addr = alloca %class.C5*, align 4 + store %class.C5* %this, %class.C5** %this.addr, align 4 + %this1 = load %class.C5** %this.addr + %x = getelementptr inbounds %struct.S5* %agg.result, i32 0, i32 0 + store i32 42, i32* %x, align 4 + ret void +; WIN32: {{^}}"?foo@C5@@QAE?AUS5@@XZ": + +; The address of the return structure is passed as an implicit parameter. +; In the -O0 build, %eax is spilled at the beginning of the function, hence we +; should match both 4(%esp) and 8(%esp). +; WIN32: {{[48]}}(%esp), %eax +; WIN32: movl $42, (%eax) +; WIN32: ret $4 +} + +define void @call_foo5() { +entry: + %c = alloca %class.C5, align 1 + %s = alloca %struct.S5, align 4 + call x86_thiscallcc void @"\01?foo@C5@@QAE?AUS5@@XZ"(%struct.S5* sret %s, %class.C5* %c) +; WIN32: {{^}}_call_foo5: + +; Load the address of the result and put it onto stack +; (through %ecx in the -O0 build). +; WIN32: leal {{[0-9]+}}(%esp), %eax +; WIN32: movl %eax, (%e{{[sc][px]}}) + +; The this pointer goes to ECX. +; WIN32-NEXT: leal {{[0-9]+}}(%esp), %ecx +; WIN32-NEXT: calll "?foo@C5@@QAE?AUS5@@XZ" +; WIN32: ret + ret void +} diff --git a/test/CodeGen/X86/win_ftol2.ll b/test/CodeGen/X86/win_ftol2.ll index 7f8ae07..1459124 100644 --- a/test/CodeGen/X86/win_ftol2.ll +++ b/test/CodeGen/X86/win_ftol2.ll @@ -63,9 +63,9 @@ define i64 @double_ui64_2(double %x, double %y, double %z) nounwind { %1 = fdiv double %x, %y %2 = fsub double %x, %z - %3 = fptoui double %1 to i64 - %4 = fptoui double %2 to i64 - %5 = sub i64 %3, %4 + %3 = fptoui double %2 to i64 + %4 = fptoui double %1 to i64 + %5 = sub i64 %4, %3 ret i64 %5 } @@ -121,9 +121,9 @@ define {double, i64} @double_ui64_4(double %x, double %y) nounwind { ; FTOL_2: calll __ftol2 ;; stack is %x - %1 = fptoui double %x to i64 - %2 = fptoui double %y to i64 - %3 = sub i64 %1, %2 + %1 = fptoui double %y to i64 + %2 = fptoui double %x to i64 + %3 = sub i64 %2, %1 %4 = insertvalue {double, i64} undef, double %x, 0 %5 = insertvalue {double, i64} %4, i64 %3, 1 ret {double, i64} %5 diff --git a/test/CodeGen/X86/x86-64-frameaddr.ll b/test/CodeGen/X86/x86-64-frameaddr.ll index 57163d3..7d36a7a 100644 --- a/test/CodeGen/X86/x86-64-frameaddr.ll +++ b/test/CodeGen/X86/x86-64-frameaddr.ll @@ -1,4 +1,9 @@ -; RUN: llc < %s -march=x86-64 | grep movq | grep rbp +; RUN: llc < %s -march=x86-64 | FileCheck %s + +; CHECK: stack_end_address +; CHECK: {{movq.+rbp.*$}} +; CHECK: {{movq.+rbp.*$}} +; CHECK: ret define i64* @stack_end_address() nounwind { entry: diff --git a/test/CodeGen/X86/x86-64-pic-3.ll b/test/CodeGen/X86/x86-64-pic-3.ll index ba93378..1b0ddc6 100644 --- a/test/CodeGen/X86/x86-64-pic-3.ll +++ b/test/CodeGen/X86/x86-64-pic-3.ll @@ -1,6 +1,9 @@ -; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic -o %t1 -; RUN: grep "callq f" %t1 -; RUN: not grep "callq f@PLT" %t1 +; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s + + +; CHECK-NOT: {{callq f@PLT}} +; CHECK: {{callq f}} +; CHECK-NOT: {{callq f@PLT}} define void @g() { entry: diff --git a/test/CodeGen/X86/x86-64-shortint.ll b/test/CodeGen/X86/x86-64-shortint.ll index cbf6588..75f8902 100644 --- a/test/CodeGen/X86/x86-64-shortint.ll +++ b/test/CodeGen/X86/x86-64-shortint.ll @@ -1,4 +1,6 @@ -; RUN: llc < %s | grep movswl +; RUN: llc < %s | FileCheck %s + +; CHECK: movswl target datalayout = "e-p:64:64" target triple = "x86_64-apple-darwin8" diff --git a/test/CodeGen/X86/xtest.ll b/test/CodeGen/X86/xtest.ll new file mode 100644 index 0000000..e85565e --- /dev/null +++ b/test/CodeGen/X86/xtest.ll @@ -0,0 +1,11 @@ +; RUN: llc < %s -march=x86-64 -mattr=+rtm | FileCheck %s + +declare i32 @llvm.x86.xtest() nounwind + +define i32 @test_xtest() nounwind uwtable { +entry: + %0 = tail call i32 @llvm.x86.xtest() nounwind + ret i32 %0 +; CHECK: test_xtest +; CHECK: xtest +} diff --git a/test/CodeGen/X86/zext-extract_subreg.ll b/test/CodeGen/X86/zext-extract_subreg.ll index 4f1dde3..168b898 100644 --- a/test/CodeGen/X86/zext-extract_subreg.ll +++ b/test/CodeGen/X86/zext-extract_subreg.ll @@ -6,7 +6,7 @@ entry: br i1 undef, label %return, label %if.end.i if.end.i: ; preds = %entry - %tmp7.i = load i32* undef, align 4, !tbaa !0 + %tmp7.i = load i32* undef, align 4 br i1 undef, label %return, label %if.end if.end: ; preds = %if.end.i @@ -55,7 +55,3 @@ cond.false280: ; preds = %cond.true225 return: ; preds = %if.end.i, %entry ret void } - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/X86/zext-inreg-0.ll b/test/CodeGen/X86/zext-inreg-0.ll index ae6221a..688b88d 100644 --- a/test/CodeGen/X86/zext-inreg-0.ll +++ b/test/CodeGen/X86/zext-inreg-0.ll @@ -1,9 +1,12 @@ -; RUN: llc < %s -march=x86 | not grep and -; RUN: llc < %s -march=x86-64 > %t -; RUN: not grep and %t -; RUN: not grep movzbq %t -; RUN: not grep movzwq %t -; RUN: not grep movzlq %t +; RUN: llc < %s -march=x86 | FileCheck -check-prefix=X86 %s +; RUN: llc < %s -march=x86-64 | FileCheck -check-prefix=X64 %s + +; X86-NOT: and + +; X64-NOT: and +; X64-NOT: movzbq +; X64-NOT: movzwq +; X64-NOT: movzlq ; These should use movzbl instead of 'and 255'. ; This related to not having a ZERO_EXTEND_REG opcode. diff --git a/test/CodeGen/XCore/global_negative_offset.ll b/test/CodeGen/XCore/offset_folding.ll index 0328fb0..30edfe6 100644 --- a/test/CodeGen/XCore/global_negative_offset.ll +++ b/test/CodeGen/XCore/offset_folding.ll @@ -1,23 +1,40 @@ ; RUN: llc < %s -march=xcore | FileCheck %s -; Don't fold negative offsets into cp / dp accesses to avoid a relocation -; error if the address + addend is less than the start of the cp / dp. - @a = external constant [0 x i32], section ".cp.rodata" @b = external global [0 x i32] -define i32 *@f() nounwind { +define i32 *@f1() nounwind { +entry: +; CHECK: f1: +; CHECK: ldaw r11, cp[a+4] +; CHECK: mov r0, r11 + %0 = getelementptr [0 x i32]* @a, i32 0, i32 1 + ret i32* %0 +} + +define i32 *@f2() nounwind { +entry: +; CHECK: f2: +; CHECK: ldaw r0, dp[b+4] + %0 = getelementptr [0 x i32]* @b, i32 0, i32 1 + ret i32* %0 +} + +; Don't fold negative offsets into cp / dp accesses to avoid a relocation +; error if the address + addend is less than the start of the cp / dp. + +define i32 *@f3() nounwind { entry: -; CHECK: f: +; CHECK: f3: ; CHECK: ldaw r11, cp[a] ; CHECK: sub r0, r11, 4 %0 = getelementptr [0 x i32]* @a, i32 0, i32 -1 ret i32* %0 } -define i32 *@g() nounwind { +define i32 *@f4() nounwind { entry: -; CHECK: g: +; CHECK: f4: ; CHECK: ldaw [[REG:r[0-9]+]], dp[b] ; CHECK: sub r0, [[REG]], 4 %0 = getelementptr [0 x i32]* @b, i32 0, i32 -1 diff --git a/test/CodeGen/XCore/unaligned_load.ll b/test/CodeGen/XCore/unaligned_load.ll index 0ee8e1c..772a847 100644 --- a/test/CodeGen/XCore/unaligned_load.ll +++ b/test/CodeGen/XCore/unaligned_load.ll @@ -1,20 +1,19 @@ -; RUN: llc < %s -march=xcore > %t1.s -; RUN: grep "bl __misaligned_load" %t1.s | count 1 -; RUN: grep ld16s %t1.s | count 2 -; RUN: grep ldw %t1.s | count 2 -; RUN: grep shl %t1.s | count 2 -; RUN: grep shr %t1.s | count 1 -; RUN: grep zext %t1.s | count 1 -; RUN: grep "or " %t1.s | count 2 +; RUN: llc < %s -march=xcore | FileCheck %s -; Byte aligned load. Expands to call to __misaligned_load. +; Byte aligned load. +; CHECK: align1 +; CHECK: bl __misaligned_load define i32 @align1(i32* %p) nounwind { entry: %0 = load i32* %p, align 1 ; <i32> [#uses=1] ret i32 %0 } -; Half word aligned load. Expands to two 16bit loads. +; Half word aligned load. +; CHECK: align2: +; CHECK: ld16s +; CHECK: ld16s +; CHECK: or define i32 @align2(i32* %p) nounwind { entry: %0 = load i32* %p, align 2 ; <i32> [#uses=1] @@ -23,7 +22,11 @@ entry: @a = global [5 x i8] zeroinitializer, align 4 -; Constant offset from word aligned base. Expands to two 32bit loads. +; Constant offset from word aligned base. +; CHECK: align3: +; CHECK: ldw {{r[0-9]+}}, dp +; CHECK: ldw {{r[0-9]+}}, dp +; CHECK: or define i32 @align3() nounwind { entry: %0 = load i32* bitcast (i8* getelementptr ([5 x i8]* @a, i32 0, i32 1) to i32*), align 1 diff --git a/test/CodeGen/XCore/unaligned_store.ll b/test/CodeGen/XCore/unaligned_store.ll index 62078e6..94e1852 100644 --- a/test/CodeGen/XCore/unaligned_store.ll +++ b/test/CodeGen/XCore/unaligned_store.ll @@ -1,16 +1,18 @@ -; RUN: llc < %s -march=xcore > %t1.s -; RUN: grep "bl __misaligned_store" %t1.s | count 1 -; RUN: grep st16 %t1.s | count 2 -; RUN: grep shr %t1.s | count 1 +; RUN: llc < %s -march=xcore | FileCheck %s -; Byte aligned store. Expands to call to __misaligned_store. +; Byte aligned store. +; CHECK: align1: +; CHECK: bl __misaligned_store define void @align1(i32* %p, i32 %val) nounwind { entry: store i32 %val, i32* %p, align 1 ret void } -; Half word aligned store. Expands to two 16bit stores. +; Half word aligned store. +; CHECK: align2 +; CHECK: st16 +; CHECK: st16 define void @align2(i32* %p, i32 %val) nounwind { entry: store i32 %val, i32* %p, align 2 diff --git a/test/DebugInfo/2009-11-03-InsertExtractValue.ll b/test/DebugInfo/2009-11-03-InsertExtractValue.ll index a7b43b3..5bfca21 100644 --- a/test/DebugInfo/2009-11-03-InsertExtractValue.ll +++ b/test/DebugInfo/2009-11-03-InsertExtractValue.ll @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s | llvm-dis | FileCheck %s !dbg = !{!0} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"bar", metadata !"bar", metadata !"_ZN3foo3barEv", metadata !1, i32 3, metadata !2, i1 false, i1 false, i32 0, i32 0, null, i32 258, i1 false, null, null, i32 0, metadata !1, i32 3} +!0 = metadata !{i32 786478, metadata !1, metadata !"bar", metadata !"bar", metadata !"_ZN3foo3barEv", metadata !1, i32 3, metadata !2, i1 false, i1 false, i32 0, i32 0, null, i32 258, i1 false, null, null, i32 0, metadata !1, i32 3} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 41, metadata !4} ; [ DW_TAG_file_type ] !2 = metadata !{i32 21, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !3, i32 0, null} ; [ DW_TAG_subroutine_type ] !3 = metadata !{null} diff --git a/test/DebugInfo/2009-11-05-DeadGlobalVariable.ll b/test/DebugInfo/2009-11-05-DeadGlobalVariable.ll index 6f6ccd6..13bd310 100644 --- a/test/DebugInfo/2009-11-05-DeadGlobalVariable.ll +++ b/test/DebugInfo/2009-11-05-DeadGlobalVariable.ll @@ -9,10 +9,10 @@ entry: !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 720913, i32 0, i32 12, metadata !6, metadata !"clang version 3.0 (trunk 139632)", i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !12, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 720913, i32 12, metadata !6, metadata !"clang version 3.0 (trunk 139632)", i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !12, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} -!5 = metadata !{i32 720942, i32 0, metadata !6, metadata !"foo", metadata !"foo", metadata !"", metadata !6, i32 1, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 true, i32 ()* @foo, null, null, metadata !10} ; [ DW_TAG_subprogram ] +!5 = metadata !{i32 720942, metadata !6, metadata !"foo", metadata !"foo", metadata !"", metadata !6, i32 1, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 true, i32 ()* @foo, null, null, metadata !10} ; [ DW_TAG_subprogram ] !6 = metadata !{i32 720937, metadata !"fb.c", metadata !"/private/tmp", null} ; [ DW_TAG_file_type ] !7 = metadata !{i32 720917, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !8 = metadata !{metadata !9} diff --git a/test/DebugInfo/2009-11-10-CurrentFn.ll b/test/DebugInfo/2009-11-10-CurrentFn.ll index e862eb0..83d6ac2 100644 --- a/test/DebugInfo/2009-11-10-CurrentFn.ll +++ b/test/DebugInfo/2009-11-10-CurrentFn.ll @@ -12,10 +12,10 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 720913, i32 0, i32 12, metadata !6, metadata !"clang version 3.0 (trunk 139632)", i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 720913, i32 12, metadata !6, metadata !"clang version 3.0 (trunk 139632)", i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} -!5 = metadata !{i32 720942, i32 0, metadata !6, metadata !"bar", metadata !"bar", metadata !"", metadata !6, i32 3, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, void (i32)* @bar, null, null, metadata !9} ; [ DW_TAG_subprogram ] +!5 = metadata !{i32 720942, metadata !6, metadata !"bar", metadata !"bar", metadata !"", metadata !6, i32 3, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, void (i32)* @bar, null, null, metadata !9} ; [ DW_TAG_subprogram ] !6 = metadata !{i32 720937, metadata !"cf.c", metadata !"/private/tmp", null} ; [ DW_TAG_file_type ] !7 = metadata !{i32 720917, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !8 = metadata !{null} diff --git a/test/DebugInfo/2010-03-19-DbgDeclare.ll b/test/DebugInfo/2010-03-19-DbgDeclare.ll index 1f7a889..9f52d11 100644 --- a/test/DebugInfo/2010-03-19-DbgDeclare.ll +++ b/test/DebugInfo/2010-03-19-DbgDeclare.ll @@ -1,12 +1,17 @@ -; RUN: llvm-as < %s | opt -verify -disable-output +; RUN: llvm-as < %s | opt -verify -S -asm-verbose | FileCheck %s + +; CHECK: lang 0x8001 define void @Foo(i32 %a, i32 %b) { entry: call void @llvm.dbg.declare(metadata !{i32* null}, metadata !1) ret void } - +!llvm.dbg.cu = !{!2} +!2 = metadata !{i32 786449, metadata !4, i32 32769, metadata !"clang version 3.3 ", i1 false, metadata !"", i32 0, metadata !3, metadata !3, metadata !3, metadata !3, metadata !3, metadata !""} ; [ DW_TAG_compile_unit ] [/usr/local/google/home/blaikie/dev/scratch/scratch.cpp] [lang 0x8001] +!3 = metadata !{} !0 = metadata !{i32 662302, i32 26, metadata !1, null} !1 = metadata !{i32 4, metadata !"foo"} +!4 = metadata !{metadata !"scratch.cpp", metadata !"/usr/local/google/home/blaikie/dev/scratch"} declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone diff --git a/test/DebugInfo/2010-03-24-MemberFn.ll b/test/DebugInfo/2010-03-24-MemberFn.ll index 65e1143..15197f4 100644 --- a/test/DebugInfo/2010-03-24-MemberFn.ll +++ b/test/DebugInfo/2010-03-24-MemberFn.ll @@ -41,24 +41,24 @@ declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone !0 = metadata !{i32 786688, metadata !1, metadata !"s1", metadata !4, i32 3, metadata !9, i32 0, null} ; [ DW_TAG_auto_variable ] !1 = metadata !{i32 786443, metadata !2, i32 3, i32 0} ; [ DW_TAG_lexical_block ] !2 = metadata !{i32 786443, metadata !3, i32 3, i32 0} ; [ DW_TAG_lexical_block ] -!3 = metadata !{i32 786478, i32 0, metadata !4, metadata !"bar", metadata !"bar", metadata !"_Z3barv", metadata !4, i32 3, metadata !6, i1 false, i1 true, i32 0, i32 0, null, i1 false, i32 ()* @_Z3barv, null, null, null, i32 3} ; [ DW_TAG_subprogram ] +!3 = metadata !{i32 786478, metadata !4, metadata !4, metadata !"bar", metadata !"bar", metadata !"_Z3barv", i32 3, metadata !6, i1 false, i1 true, i32 0, i32 0, null, i1 false, i32 ()* @_Z3barv, null, null, null, i32 3} ; [ DW_TAG_subprogram ] !4 = metadata !{i32 786473, metadata !25} ; [ DW_TAG_file_type ] -!5 = metadata !{i32 786449, i32 0, i32 4, metadata !4, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 false, metadata !"", i32 0, null, null, metadata !24, null, metadata !""} ; [ DW_TAG_compile_unit ] -!6 = metadata !{i32 786453, metadata !4, metadata !"", metadata !4, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !7, i32 0, null} ; [ DW_TAG_subroutine_type ] +!5 = metadata !{i32 786449, i32 4, metadata !4, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 false, metadata !"", i32 0, null, null, metadata !24, null, null, metadata !""} ; [ DW_TAG_compile_unit ] +!6 = metadata !{i32 786453, metadata !25, metadata !4, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !7, i32 0, null} ; [ DW_TAG_subroutine_type ] !7 = metadata !{metadata !8} -!8 = metadata !{i32 786468, metadata !4, metadata !"int", metadata !4, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!9 = metadata !{i32 786451, metadata !4, metadata !"S", metadata !10, i32 2, i64 8, i64 8, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_structure_type ] +!8 = metadata !{i32 786468, metadata !25, metadata !4, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!9 = metadata !{i32 786451, metadata !26, metadata !4, metadata !"S", i32 2, i64 8, i64 8, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_structure_type ] !10 = metadata !{i32 786473, metadata !26} ; [ DW_TAG_file_type ] !11 = metadata !{metadata !12} -!12 = metadata !{i32 786478, i32 0, metadata !9, metadata !"foo", metadata !"foo", metadata !"_ZN1S3fooEv", metadata !10, i32 3, metadata !13, i1 false, i1 true, i32 0, i32 0, null, i1 false, i32 (%struct.S*)* @_ZN1S3fooEv, null, null, null, i32 3} ; [ DW_TAG_subprogram ] -!13 = metadata !{i32 786453, metadata !4, metadata !"", metadata !4, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !14, i32 0, null} ; [ DW_TAG_subroutine_type ] +!12 = metadata !{i32 786478, metadata !10, metadata !9, metadata !"foo", metadata !"foo", metadata !"_ZN1S3fooEv", i32 3, metadata !13, i1 false, i1 true, i32 0, i32 0, null, i1 false, i32 (%struct.S*)* @_ZN1S3fooEv, null, null, null, i32 3} ; [ DW_TAG_subprogram ] +!13 = metadata !{i32 786453, metadata !25, metadata !4, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !14, i32 0, null} ; [ DW_TAG_subroutine_type ] !14 = metadata !{metadata !8, metadata !15} -!15 = metadata !{i32 786447, metadata !4, metadata !"", metadata !4, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !9} ; [ DW_TAG_pointer_type ] +!15 = metadata !{i32 786447, metadata !25, metadata !4, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 64, metadata !9} ; [ DW_TAG_pointer_type ] !16 = metadata !{i32 3, i32 0, metadata !1, null} !17 = metadata !{i32 3, i32 0, metadata !3, null} !18 = metadata !{i32 786689, metadata !12, metadata !"this", metadata !10, i32 3, metadata !19, i32 0, null} ; [ DW_TAG_arg_variable ] -!19 = metadata !{i32 786470, metadata !4, metadata !"", metadata !4, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !20} ; [ DW_TAG_const_type ] -!20 = metadata !{i32 786447, metadata !4, metadata !"", metadata !4, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !9} ; [ DW_TAG_pointer_type ] +!19 = metadata !{i32 786470, metadata !25, metadata !4, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 64, metadata !20} ; [ DW_TAG_const_type ] +!20 = metadata !{i32 786447, metadata !25, metadata !4, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !9} ; [ DW_TAG_pointer_type ] !21 = metadata !{i32 3, i32 0, metadata !12, null} !22 = metadata !{i32 3, i32 0, metadata !23, null} !23 = metadata !{i32 786443, metadata !12, i32 3, i32 0} ; [ DW_TAG_lexical_block ] diff --git a/test/DebugInfo/2010-04-06-NestedFnDbgInfo.ll b/test/DebugInfo/2010-04-06-NestedFnDbgInfo.ll index 949ebdd..7f8e418 100644 --- a/test/DebugInfo/2010-04-06-NestedFnDbgInfo.ll +++ b/test/DebugInfo/2010-04-06-NestedFnDbgInfo.ll @@ -55,18 +55,18 @@ entry: !0 = metadata !{i32 786688, metadata !1, metadata !"b", metadata !3, i32 16, metadata !8, i32 0, null} ; [ DW_TAG_auto_variable ] !1 = metadata !{i32 786443, metadata !2, i32 15, i32 12} ; [ DW_TAG_lexical_block ] -!2 = metadata !{i32 786478, i32 0, metadata !3, metadata !"main", metadata !"main", metadata !"main", metadata !3, i32 15, metadata !5, i1 false, i1 true, i32 0, i32 0, null, i1 false, i32 ()* @main, null, null, null, i32 15} ; [ DW_TAG_subprogram ] +!2 = metadata !{i32 786478, metadata !3, metadata !"main", metadata !"main", metadata !"main", metadata !3, i32 15, metadata !5, i1 false, i1 true, i32 0, i32 0, null, i1 false, i32 ()* @main, null, null, null, i32 15} ; [ DW_TAG_subprogram ] !3 = metadata !{i32 786473, metadata !"one.cc", metadata !"/tmp", metadata !4} ; [ DW_TAG_file_type ] -!4 = metadata !{i32 786449, i32 0, i32 4, metadata !3, metadata !"clang 1.5", i1 false, metadata !"", i32 0, null, null, metadata !37, null, metadata !""} ; [ DW_TAG_compile_unit ] -!5 = metadata !{i32 786453, metadata !3, metadata !"", metadata !3, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !6, i32 0, null} ; [ DW_TAG_subroutine_type ] +!4 = metadata !{i32 786449, i32 4, metadata !3, metadata !"clang 1.5", i1 false, metadata !"", i32 0, null, null, metadata !37, null, null, metadata !""} ; [ DW_TAG_compile_unit ] +!5 = metadata !{i32 786453, metadata !3, metadata !3, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !6, i32 0, null} ; [ DW_TAG_subroutine_type ] !6 = metadata !{metadata !7} -!7 = metadata !{i32 786468, metadata !3, metadata !"int", metadata !3, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!8 = metadata !{i32 786434, metadata !3, metadata !"B", metadata !3, i32 2, i64 8, i64 8, i64 0, i32 0, null, metadata !9, i32 0, null} ; [ DW_TAG_class_type ] +!7 = metadata !{i32 786468, metadata !3, metadata !3, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!8 = metadata !{i32 786434, metadata !3, metadata !3, metadata !"B", i32 2, i64 8, i64 8, i64 0, i32 0, null, metadata !9, i32 0, null} ; [ DW_TAG_class_type ] !9 = metadata !{metadata !10} -!10 = metadata !{i32 786478, i32 0, metadata !8, metadata !"fn", metadata !"fn", metadata !"_ZN1B2fnEv", metadata !3, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null, i1 false, i32 (%class.A*)* @_ZN1B2fnEv, null, null, null, i32 4} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 786453, metadata !3, metadata !"", metadata !3, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] +!10 = metadata !{i32 786478, metadata !8, metadata !"fn", metadata !"fn", metadata !"_ZN1B2fnEv", metadata !3, i32 4, metadata !11, i1 false, i1 true, i32 0, i32 0, null, i1 false, i32 (%class.A*)* @_ZN1B2fnEv, null, null, null, i32 4} ; [ DW_TAG_subprogram ] +!11 = metadata !{i32 786453, metadata !3, metadata !3, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] !12 = metadata !{metadata !7, metadata !13} -!13 = metadata !{i32 786447, metadata !3, metadata !"", metadata !3, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !8} ; [ DW_TAG_pointer_type ] +!13 = metadata !{i32 786447, metadata !3, metadata !3, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 64, metadata !8} ; [ DW_TAG_pointer_type ] !14 = metadata !{i32 16, i32 5, metadata !1, null} !15 = metadata !{i32 17, i32 3, metadata !1, null} !16 = metadata !{i32 18, i32 1, metadata !2, null} @@ -74,12 +74,12 @@ entry: !18 = metadata !{i32 4, i32 7, metadata !10, null} !19 = metadata !{i32 786688, metadata !20, metadata !"a", metadata !3, i32 9, metadata !21, i32 0, null} ; [ DW_TAG_auto_variable ] !20 = metadata !{i32 786443, metadata !10, i32 4, i32 12} ; [ DW_TAG_lexical_block ] -!21 = metadata !{i32 786434, metadata !10, metadata !"A", metadata !3, i32 5, i64 8, i64 8, i64 0, i32 0, null, metadata !22, i32 0, null} ; [ DW_TAG_class_type ] +!21 = metadata !{i32 786434, metadata !3, metadata !10, metadata !"A", i32 5, i64 8, i64 8, i64 0, i32 0, null, metadata !22, i32 0, null} ; [ DW_TAG_class_type ] !22 = metadata !{metadata !23} -!23 = metadata !{i32 786478, i32 0, metadata !21, metadata !"foo", metadata !"foo", metadata !"_ZZN1B2fnEvEN1A3fooEv", metadata !3, i32 7, metadata !24, i1 false, i1 true, i32 0, i32 0, null, i1 false, i32 (%class.A*)* @_ZZN1B2fnEvEN1A3fooEv, null, null, null, i32 7} ; [ DW_TAG_subprogram ] -!24 = metadata !{i32 786453, metadata !3, metadata !"", metadata !3, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !25, i32 0, null} ; [ DW_TAG_subroutine_type ] +!23 = metadata !{i32 786478, metadata !21, metadata !"foo", metadata !"foo", metadata !"_ZZN1B2fnEvEN1A3fooEv", metadata !3, i32 7, metadata !24, i1 false, i1 true, i32 0, i32 0, null, i1 false, i32 (%class.A*)* @_ZZN1B2fnEvEN1A3fooEv, null, null, null, i32 7} ; [ DW_TAG_subprogram ] +!24 = metadata !{i32 786453, metadata !3, metadata !3, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !25, i32 0, null} ; [ DW_TAG_subroutine_type ] !25 = metadata !{metadata !7, metadata !26} -!26 = metadata !{i32 786447, metadata !3, metadata !"", metadata !3, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !21} ; [ DW_TAG_pointer_type ] +!26 = metadata !{i32 786447, metadata !3, metadata !3, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 64, metadata !21} ; [ DW_TAG_pointer_type ] !27 = metadata !{i32 9, i32 7, metadata !20, null} !28 = metadata !{i32 786688, metadata !20, metadata !"i", metadata !3, i32 10, metadata !7, i32 0, null} ; [ DW_TAG_auto_variable ] !29 = metadata !{i32 10, i32 9, metadata !20, null} diff --git a/test/DebugInfo/2010-04-19-FramePtr.ll b/test/DebugInfo/2010-04-19-FramePtr.ll index bdfa6e6..88eebe6 100644 --- a/test/DebugInfo/2010-04-19-FramePtr.ll +++ b/test/DebugInfo/2010-04-19-FramePtr.ll @@ -23,9 +23,9 @@ return: ; preds = %entry !9 = metadata !{metadata !1} !0 = metadata !{i32 2, i32 0, metadata !1, null} -!1 = metadata !{i32 786478, i32 0, metadata !2, metadata !"foo", metadata !"foo", metadata !"foo", metadata !2, i32 2, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i1 false, i32 ()* @foo, null, null, null, i32 2} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 786478, metadata !2, metadata !"foo", metadata !"foo", metadata !"foo", metadata !2, i32 2, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i1 false, i32 ()* @foo, null, null, null, i32 2} ; [ DW_TAG_subprogram ] !2 = metadata !{i32 786473, metadata !"a.c", metadata !"/tmp", metadata !3} ; [ DW_TAG_file_type ] -!3 = metadata !{i32 786449, i32 0, i32 1, metadata !2, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 false, metadata !"", i32 0, null, null, metadata !9, null, metadata !""} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 786449, i32 1, metadata !2, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 false, metadata !"", i32 0, null, null, metadata !9, null, null, metadata !""} ; [ DW_TAG_compile_unit ] !4 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null} ; [ DW_TAG_subroutine_type ] !5 = metadata !{metadata !6} !6 = metadata !{i32 786468, metadata !2, metadata !"int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] diff --git a/test/DebugInfo/2010-05-10-MultipleCU.ll b/test/DebugInfo/2010-05-10-MultipleCU.ll index 35af20c..75e4389 100644 --- a/test/DebugInfo/2010-05-10-MultipleCU.ll +++ b/test/DebugInfo/2010-05-10-MultipleCU.ll @@ -32,17 +32,17 @@ return: !0 = metadata !{i32 3, i32 0, metadata !1, null} !1 = metadata !{i32 786443, metadata !2, i32 2, i32 0} ; [ DW_TAG_lexical_block ] -!2 = metadata !{i32 786478, i32 0, metadata !3, metadata !"foo", metadata !"foo", metadata !"foo", metadata !3, i32 2, metadata !5, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 ()* @foo, null, null, null, i32 0} ; [ DW_TAG_subprogram ] +!2 = metadata !{i32 786478, metadata !3, metadata !"foo", metadata !"foo", metadata !"foo", metadata !3, i32 2, metadata !5, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 ()* @foo, null, null, null, i32 0} ; [ DW_TAG_subprogram ] !3 = metadata !{i32 786473, metadata !"a.c", metadata !"/tmp/", metadata !4} ; [ DW_TAG_file_type ] -!4 = metadata !{i32 786449, i32 0, i32 1, metadata !3, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 false, metadata !"", i32 0, null, null, metadata !16, null, metadata !""} ; [ DW_TAG_compile_unit ] +!4 = metadata !{i32 786449, i32 1, metadata !3, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 false, metadata !"", i32 0, null, null, metadata !16, null, metadata !""} ; [ DW_TAG_compile_unit ] !5 = metadata !{i32 786453, metadata !3, metadata !"", metadata !3, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !6, i32 0, null} ; [ DW_TAG_subroutine_type ] !6 = metadata !{metadata !7} !7 = metadata !{i32 786468, metadata !3, metadata !"int", metadata !3, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !8 = metadata !{i32 3, i32 0, metadata !9, null} !9 = metadata !{i32 786443, metadata !10, i32 2, i32 0} ; [ DW_TAG_lexical_block ] -!10 = metadata !{i32 786478, i32 0, metadata !11, metadata !"bar", metadata !"bar", metadata !"bar", metadata !11, i32 2, metadata !13, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 ()* @bar, null, null, null, i32 0} ; [ DW_TAG_subprogram ] +!10 = metadata !{i32 786478, metadata !11, metadata !"bar", metadata !"bar", metadata !"bar", metadata !11, i32 2, metadata !13, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, i32 ()* @bar, null, null, null, i32 0} ; [ DW_TAG_subprogram ] !11 = metadata !{i32 786473, metadata !"b.c", metadata !"/tmp/", metadata !12} ; [ DW_TAG_file_type ] -!12 = metadata !{i32 786449, i32 0, i32 1, metadata !11, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 false, metadata !"", i32 0, null, null, metadata !17, null, metadata !""} ; [ DW_TAG_compile_unit ] +!12 = metadata !{i32 786449, i32 1, metadata !11, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 false, metadata !"", i32 0, null, null, metadata !17, null, metadata !""} ; [ DW_TAG_compile_unit ] !13 = metadata !{i32 786453, metadata !11, metadata !"", metadata !11, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !14, i32 0, null} ; [ DW_TAG_subroutine_type ] !14 = metadata !{metadata !15} !15 = metadata !{i32 786468, metadata !11, metadata !"int", metadata !11, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] diff --git a/test/DebugInfo/2010-06-29-InlinedFnLocalVar.ll b/test/DebugInfo/2010-06-29-InlinedFnLocalVar.ll index a305c57..f5ebb2d 100644 --- a/test/DebugInfo/2010-06-29-InlinedFnLocalVar.ll +++ b/test/DebugInfo/2010-06-29-InlinedFnLocalVar.ll @@ -23,25 +23,25 @@ entry: !llvm.dbg.cu = !{!2} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"", metadata !1, i32 9, metadata !3, i1 true, i1 true, i32 0, i32 0, null, i1 false, i1 true, null, null, null, metadata !24, i32 9} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786478, metadata !1, metadata !"foo", metadata !"foo", metadata !"", metadata !1, i32 9, metadata !3, i1 true, i1 true, i32 0, i32 0, null, i1 false, i1 true, null, null, null, metadata !24, i32 9} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786473, metadata !27} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 1, metadata !1, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, metadata !"", i32 0, null, null, metadata !25, metadata !26, metadata !""} ; [ DW_TAG_compile_unit ] -!3 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] +!2 = metadata !{i32 786449, i32 1, metadata !1, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, metadata !"", i32 0, null, null, metadata !25, metadata !26, metadata !26, metadata !""} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 786453, metadata !27, metadata !1, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] !4 = metadata !{metadata !5, metadata !5} -!5 = metadata !{i32 786468, metadata !1, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 786478, i32 0, metadata !1, metadata !"bar", metadata !"bar", metadata !"bar", metadata !1, i32 14, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 true, i32 ()* @bar} ; [ DW_TAG_subprogram ] -!7 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, null} ; [ DW_TAG_subroutine_type ] +!5 = metadata !{i32 786468, metadata !27, metadata !1, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 786478, metadata !1, metadata !"bar", metadata !"bar", metadata !"bar", metadata !1, i32 14, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 true, i32 ()* @bar} ; [ DW_TAG_subprogram ] +!7 = metadata !{i32 786453, metadata !27, metadata !1, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, null} ; [ DW_TAG_subroutine_type ] !8 = metadata !{metadata !5} !9 = metadata !{i32 786689, metadata !0, metadata !"j", metadata !1, i32 9, metadata !5, i32 0, null} ; [ DW_TAG_arg_variable ] !10 = metadata !{i32 786688, metadata !11, metadata !"xyz", metadata !1, i32 10, metadata !12, i32 0, null} ; [ DW_TAG_auto_variable ] -!11 = metadata !{i32 786443, metadata !0, i32 9, i32 0, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] -!12 = metadata !{i32 786451, metadata !0, metadata !"X", metadata !1, i32 10, i64 64, i64 32, i64 0, i32 0, null, metadata !13, i32 0, null} ; [ DW_TAG_structure_type ] +!11 = metadata !{i32 786443, metadata !1, metadata !0, i32 9, i32 0, i32 0} ; [ DW_TAG_lexical_block ] +!12 = metadata !{i32 786451, metadata !27, metadata !0, metadata !"X", i32 10, i64 64, i64 32, i64 0, i32 0, null, metadata !13, i32 0, null} ; [ DW_TAG_structure_type ] !13 = metadata !{metadata !14, metadata !15} -!14 = metadata !{i32 786445, metadata !12, metadata !"a", metadata !1, i32 10, i64 32, i64 32, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!15 = metadata !{i32 786445, metadata !12, metadata !"b", metadata !1, i32 10, i64 32, i64 32, i64 32, i32 0, metadata !5} ; [ DW_TAG_member ] +!14 = metadata !{i32 786445, metadata !27, metadata !12, metadata !"a", i32 10, i64 32, i64 32, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] +!15 = metadata !{i32 786445, metadata !27, metadata !12, metadata !"b", i32 10, i64 32, i64 32, i64 32, i32 0, metadata !5} ; [ DW_TAG_member ] !16 = metadata !{i32 786484, i32 0, metadata !1, metadata !"i", metadata !"i", metadata !"", metadata !1, i32 5, metadata !5, i1 false, i1 true, i32* @i} ; [ DW_TAG_variable ] !17 = metadata !{i32 15, i32 0, metadata !18, null} -!18 = metadata !{i32 786443, metadata !6, i32 14, i32 0, metadata !1, i32 1} ; [ DW_TAG_lexical_block ] +!18 = metadata !{i32 786443, metadata !1, metadata !6, i32 14, i32 0, i32 1} ; [ DW_TAG_lexical_block ] !19 = metadata !{i32 9, i32 0, metadata !0, metadata !17} !20 = metadata !{null} !21 = metadata !{i32 9, i32 0, metadata !11, metadata !17} diff --git a/test/DebugInfo/2010-10-01-crash.ll b/test/DebugInfo/2010-10-01-crash.ll index e61f63f..c4161b4 100644 --- a/test/DebugInfo/2010-10-01-crash.ll +++ b/test/DebugInfo/2010-10-01-crash.ll @@ -1,4 +1,5 @@ ; RUN: llc -O0 %s -o /dev/null +; XFAIL: hexagon ; PR 8235 define void @CGRectStandardize(i32* sret %agg.result, i32* byval %rect) nounwind ssp { diff --git a/test/DebugInfo/AArch64/dwarfdump.ll b/test/DebugInfo/AArch64/dwarfdump.ll index 06e8e24..bcdd462 100644 --- a/test/DebugInfo/AArch64/dwarfdump.ll +++ b/test/DebugInfo/AArch64/dwarfdump.ll @@ -22,10 +22,10 @@ attributes #0 = { nounwind } !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !4, metadata !"clang version 3.3 ", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !2, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] [/home/timnor01/llvm/build/tmp.c] [DW_LANG_C99] +!0 = metadata !{i32 786449, metadata !9, i32 12, metadata !"clang version 3.3 ", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !2, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] [/home/timnor01/llvm/build/tmp.c] [DW_LANG_C99] !1 = metadata !{i32 0} !2 = metadata !{metadata !3} -!3 = metadata !{i32 786478, i32 0, metadata !4, metadata !"main", metadata !"main", metadata !"", metadata !4, i32 1, metadata !5, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main, null, null, metadata !1, i32 1} ; [ DW_TAG_subprogram ] [line 1] [def] [main] +!3 = metadata !{i32 786478, metadata !4, metadata !"main", metadata !"main", metadata !"", metadata !4, i32 1, metadata !5, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main, null, null, metadata !1, i32 1} ; [ DW_TAG_subprogram ] [line 1] [def] [main] !4 = metadata !{i32 786473, metadata !9} ; [ DW_TAG_file_type ] !5 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !6, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !6 = metadata !{metadata !7} diff --git a/test/DebugInfo/AArch64/eh_frame.ll b/test/DebugInfo/AArch64/eh_frame.ll deleted file mode 100644 index 2539c56..0000000 --- a/test/DebugInfo/AArch64/eh_frame.ll +++ /dev/null @@ -1,51 +0,0 @@ -; RUN: llc -verify-machineinstrs -mtriple=aarch64-none-linux-gnu %s -filetype=obj -o %t -; RUN: llvm-objdump -s %t | FileCheck %s -@var = global i32 0 - -declare void @bar() - -define i64 @check_largest_class(i32 %in) { - %res = load i32* @var - call void @bar() - %ext = zext i32 %res to i64 - ret i64 %ext -} - -; The really key points we're checking here are: -; * Return register is x30. -; * Pointer format is 0x1b (GNU doesn't appear to understand others). - -; The rest is largely incidental, but not expected to change regularly. - -; Output is: - -; CHECK: Contents of section .eh_frame: -; CHECK-NEXT: 0000 10000000 00000000 017a5200 017c1e01 .........zR..|.. -; CHECK-NEXT: 0010 1b0c1f00 18000000 18000000 00000000 ................ - - -; Won't check the rest, it's rather incidental. -; 0020 24000000 00440c1f 10449e02 93040000 $....D...D...... - - -; The first CIE: -; ------------------- -; 10000000: length of first CIE = 0x10 -; 00000000: This is a CIE -; 01: version = 0x1 -; 7a 52 00: augmentation string "zR" -- pointer format is specified -; 01: code alignment factor 1 -; 7c: data alignment factor -4 -; 1e: return address register 30 (== x30). -; 01: 1 byte of augmentation -; 1b: pointer format 1b: DW_EH_PE_pcrel | DW_EH_PE_sdata4 -; 0c 1f 00: initial instructions: "DW_CFA_def_cfa x31 ofs 0" in this case - -; Next the FDE: -; ------------- -; 18000000: FDE length 0x18 -; 18000000: Uses CIE 0x18 backwards (only coincidentally same as above) -; 00000000: PC begin for this FDE is at 00000000 (relocation is applied here) -; 24000000: FDE applies up to PC begin+0x24 -; 00: Augmentation string length 0 for this FDE -; Rest: call frame instructions diff --git a/test/DebugInfo/AArch64/eh_frame.s b/test/DebugInfo/AArch64/eh_frame.s new file mode 100644 index 0000000..d8d6b6d --- /dev/null +++ b/test/DebugInfo/AArch64/eh_frame.s @@ -0,0 +1,48 @@ +// RUN: llvm-mc -triple aarch64-none-linux-gnu -filetype=obj %s -o %t +// RUN: llvm-objdump -s %t | FileCheck %s + .text + .globl foo + .type foo,@function +foo: + .cfi_startproc + ret + .cfi_endproc + +// The really key points we're checking here are: +// * Return register is x30. +// * Pointer format is 0x1b (GNU doesn't appear to understand others). + +// The rest is largely incidental, but not expected to change regularly. + +// Output is: + +// CHECK: Contents of section .eh_frame: +// CHECK-NEXT: 0000 10000000 00000000 017a5200 017c1e01 .........zR..|.. +// CHECK-NEXT: 0010 1b0c1f00 10000000 18000000 00000000 ................ + + +// Won't check the rest, it's rather incidental. +// 0020 04000000 00000000 ........ + + + +// The first CIE: +// ------------------- +// 10000000: length of first CIE = 0x10 +// 00000000: This is a CIE +// 01: version = 0x1 +// 7a 52 00: augmentation string "zR" -- pointer format is specified +// 01: code alignment factor 1 +// 7c: data alignment factor -4 +// 1e: return address register 30 (== x30). +// 01: 1 byte of augmentation +// 1b: pointer format 1b: DW_EH_PE_pcrel | DW_EH_PE_sdata4 +// 0c 1f 00: initial instructions: "DW_CFA_def_cfa x31 ofs 0" in this case + +// Next the FDE: +// ------------- +// 10000000: FDE length 0x10 +// 18000000: Uses CIE 0x18 backwards (only coincidentally same as above) +// 00000000: PC begin for this FDE is at 00000000 (relocation is applied here) +// 04000000: FDE applies up to PC begin+0x14 +// 00: Augmentation string length 0 for this FDE diff --git a/test/DebugInfo/AArch64/variable-loc.ll b/test/DebugInfo/AArch64/variable-loc.ll index 3c492a1..ba9e13a 100644 --- a/test/DebugInfo/AArch64/variable-loc.ll +++ b/test/DebugInfo/AArch64/variable-loc.ll @@ -69,24 +69,24 @@ declare i32 @printf(i8*, ...) !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !6, metadata !"clang version 3.2 ", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] [/home/timnor01/a64-trunk/build/simple.c] [DW_LANG_C99] +!0 = metadata !{i32 786449, metadata !29, i32 12, metadata !"clang version 3.2 ", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] [/home/timnor01/a64-trunk/build/simple.c] [DW_LANG_C99] !1 = metadata !{i32 0} !3 = metadata !{metadata !5, metadata !11, metadata !14} -!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"populate_array", metadata !"populate_array", metadata !"", metadata !6, i32 4, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (i32*, i32)* @populate_array, null, null, metadata !1, i32 4} ; [ DW_TAG_subprogram ] [line 4] [def] [populate_array] +!5 = metadata !{i32 786478, metadata !6, metadata !"populate_array", metadata !"populate_array", metadata !"", metadata !6, i32 4, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (i32*, i32)* @populate_array, null, null, metadata !1, i32 4} ; [ DW_TAG_subprogram ] [line 4] [def] [populate_array] !6 = metadata !{i32 786473, metadata !29} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !8 = metadata !{null, metadata !9, metadata !10} -!9 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !10} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from int] -!10 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] -!11 = metadata !{i32 786478, i32 0, metadata !6, metadata !"sum_array", metadata !"sum_array", metadata !"", metadata !6, i32 9, metadata !12, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (i32*, i32)* @sum_array, null, null, metadata !1, i32 9} ; [ DW_TAG_subprogram ] [line 9] [def] [sum_array] +!9 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !10} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from int] +!10 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] +!11 = metadata !{i32 786478, metadata !6, metadata !"sum_array", metadata !"sum_array", metadata !"", metadata !6, i32 9, metadata !12, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (i32*, i32)* @sum_array, null, null, metadata !1, i32 9} ; [ DW_TAG_subprogram ] [line 9] [def] [sum_array] !12 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !13, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !13 = metadata !{metadata !10, metadata !9, metadata !10} -!14 = metadata !{i32 786478, i32 0, metadata !6, metadata !"main", metadata !"main", metadata !"", metadata !6, i32 18, metadata !15, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 ()* @main, null, null, metadata !1, i32 18} ; [ DW_TAG_subprogram ] [line 18] [def] [main] +!14 = metadata !{i32 786478, metadata !6, metadata !"main", metadata !"main", metadata !"", metadata !6, i32 18, metadata !15, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 ()* @main, null, null, metadata !1, i32 18} ; [ DW_TAG_subprogram ] [line 18] [def] [main] !15 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !16, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !16 = metadata !{metadata !10} !17 = metadata !{i32 786688, metadata !18, metadata !"main_arr", metadata !6, i32 19, metadata !19, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [main_arr] [line 19] -!18 = metadata !{i32 786443, metadata !14, i32 18, i32 16, metadata !6, i32 4} ; [ DW_TAG_lexical_block ] [/home/timnor01/a64-trunk/build/simple.c] -!19 = metadata !{i32 786433, null, metadata !"", null, i32 0, i64 3200, i64 32, i32 0, i32 0, metadata !10, metadata !20, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 3200, align 32, offset 0] [from int] +!18 = metadata !{i32 786443, metadata !6, metadata !14, i32 18, i32 16, i32 4} ; [ DW_TAG_lexical_block ] [/home/timnor01/a64-trunk/build/simple.c] +!19 = metadata !{i32 786433, null, null, metadata !"", i32 0, i64 3200, i64 32, i32 0, i32 0, metadata !10, metadata !20, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 3200, align 32, offset 0] [from int] !20 = metadata !{i32 786465, i64 0, i64 99} ; [ DW_TAG_subrange_type ] [0, 99] !22 = metadata !{i32 19, i32 7, metadata !18, null} !23 = metadata !{i32 786688, metadata !18, metadata !"val", metadata !6, i32 20, metadata !10, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [val] [line 20] diff --git a/test/DebugInfo/Inputs/dwarfdump-test-zlib.cc b/test/DebugInfo/Inputs/dwarfdump-test-zlib.cc new file mode 100644 index 0000000..260c3c4 --- /dev/null +++ b/test/DebugInfo/Inputs/dwarfdump-test-zlib.cc @@ -0,0 +1,24 @@ +class DummyClass { + int a_; + public: + DummyClass(int a) : a_(a) {} + int add(int b) { + return a_ + b; + } +}; + +int f(int a, int b) { + DummyClass c(a); + return c.add(b); +} + +int main() { + return f(2, 3); +} + +// Built with Clang 3.2 and ld.gold linker: +// $ mkdir -p /tmp/dbginfo +// $ cp dwarfdump-test-zlib.cc /tmp/dbginfo +// $ cd /tmp/dbginfo +// $ clang++ -g dwarfdump-test-zlib.cc -Wl,--compress-debug-sections=zlib \ +// -o <output> diff --git a/test/DebugInfo/Inputs/dwarfdump-test-zlib.elf-x86-64 b/test/DebugInfo/Inputs/dwarfdump-test-zlib.elf-x86-64 Binary files differnew file mode 100755 index 0000000..16b3153 --- /dev/null +++ b/test/DebugInfo/Inputs/dwarfdump-test-zlib.elf-x86-64 diff --git a/test/DebugInfo/Inputs/dwarfdump-test3.elf-x86-64 b/test/DebugInfo/Inputs/dwarfdump-test3.elf-x86-64 space Binary files differindex 7330cd8..7330cd8 100755 --- a/test/DebugInfo/Inputs/dwarfdump-test3.elf-x86-64 +++ b/test/DebugInfo/Inputs/dwarfdump-test3.elf-x86-64 space diff --git a/test/DebugInfo/X86/2010-04-13-PubType.ll b/test/DebugInfo/X86/2010-04-13-PubType.ll index 1a60b8f..5bebeaa 100644 --- a/test/DebugInfo/X86/2010-04-13-PubType.ll +++ b/test/DebugInfo/X86/2010-04-13-PubType.ll @@ -31,18 +31,18 @@ declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!3} !0 = metadata !{i32 786689, metadata !1, metadata !"x", metadata !2, i32 7, metadata !7, i32 0, null} ; [ DW_TAG_arg_variable ] -!1 = metadata !{i32 786478, i32 0, metadata !2, metadata !"foo", metadata !"foo", metadata !"foo", metadata !2, i32 7, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 (%struct.X*, %struct.Y*)* @foo, null, null, null, i32 7} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 786478, metadata !2, metadata !"foo", metadata !"foo", metadata !"foo", metadata !2, i32 7, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 (%struct.X*, %struct.Y*)* @foo, null, null, null, i32 7} ; [ DW_TAG_subprogram ] !2 = metadata !{i32 786473, metadata !18} ; [ DW_TAG_file_type ] -!3 = metadata !{i32 786449, i32 0, i32 1, metadata !2, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 false, metadata !"", i32 0, null, null, metadata !17, null, metadata !""} ; [ DW_TAG_compile_unit ] -!4 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null} ; [ DW_TAG_subroutine_type ] +!3 = metadata !{i32 786449, i32 1, metadata !2, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 false, metadata !"", i32 0, null, null, metadata !17, null, null, metadata !""} ; [ DW_TAG_compile_unit ] +!4 = metadata !{i32 786453, metadata !18, metadata !2, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null} ; [ DW_TAG_subroutine_type ] !5 = metadata !{metadata !6, metadata !7, metadata !9} -!6 = metadata !{i32 786468, metadata !2, metadata !"int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!7 = metadata !{i32 786447, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !8} ; [ DW_TAG_pointer_type ] -!8 = metadata !{i32 786451, metadata !2, metadata !"X", metadata !2, i32 3, i64 0, i64 0, i64 0, i32 4, null, null, i32 0, null} ; [ DW_TAG_structure_type ] -!9 = metadata !{i32 786447, metadata !2, metadata !"", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !10} ; [ DW_TAG_pointer_type ] -!10 = metadata !{i32 786451, metadata !2, metadata !"Y", metadata !2, i32 4, i64 32, i64 32, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_structure_type ] +!6 = metadata !{i32 786468, metadata !18, metadata !2, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!7 = metadata !{i32 786447, metadata !18, metadata !2, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !8} ; [ DW_TAG_pointer_type ] +!8 = metadata !{i32 786451, metadata !18, metadata !2, metadata !"X", i32 3, i64 0, i64 0, i64 0, i32 4, null, null, i32 0, null} ; [ DW_TAG_structure_type ] +!9 = metadata !{i32 786447, metadata !18, metadata !2, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !10} ; [ DW_TAG_pointer_type ] +!10 = metadata !{i32 786451, metadata !18, metadata !2, metadata !"Y", i32 4, i64 32, i64 32, i64 0, i32 0, null, metadata !11, i32 0, null} ; [ DW_TAG_structure_type ] !11 = metadata !{metadata !12} -!12 = metadata !{i32 786445, metadata !10, metadata !"x", metadata !2, i32 5, i64 32, i64 32, i64 0, i32 0, metadata !6} ; [ DW_TAG_member ] +!12 = metadata !{i32 786445, metadata !18, metadata !10, metadata !"x", i32 5, i64 32, i64 32, i64 0, i32 0, metadata !6} ; [ DW_TAG_member ] !13 = metadata !{i32 7, i32 0, metadata !1, null} !14 = metadata !{i32 786689, metadata !1, metadata !"y", metadata !2, i32 7, metadata !9, i32 0, null} ; [ DW_TAG_arg_variable ] !15 = metadata !{i32 7, i32 0, metadata !16, null} diff --git a/test/DebugInfo/X86/2010-08-10-DbgConstant.ll b/test/DebugInfo/X86/2010-08-10-DbgConstant.ll index 3aedf91..94eba6a 100644 --- a/test/DebugInfo/X86/2010-08-10-DbgConstant.ll +++ b/test/DebugInfo/X86/2010-08-10-DbgConstant.ll @@ -13,9 +13,9 @@ declare void @bar(i32) !llvm.dbg.cu = !{!2} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"foo", metadata !1, i32 3, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, void ()* @foo, null, null, null, i32 3} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786478, metadata !1, metadata !"foo", metadata !"foo", metadata !"foo", metadata !1, i32 3, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 false, void ()* @foo, null, null, null, i32 3} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786473, metadata !12} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 12, metadata !1, metadata !"clang 2.8", i1 false, metadata !"", i32 0, null, null, metadata !10, metadata !11, metadata !""} ; [ DW_TAG_compile_unit ] +!2 = metadata !{i32 786449, metadata !12, i32 12, metadata !"clang 2.8", i1 false, metadata !"", i32 0, null, null, metadata !10, metadata !11, metadata !11, metadata !""} ; [ DW_TAG_compile_unit ] !3 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] !4 = metadata !{null} !5 = metadata !{i32 786471, i32 0, metadata !1, metadata !"ro", metadata !"ro", metadata !"ro", metadata !1, i32 1, metadata !6, i1 true, i1 true, i32 201, null} ; [ DW_TAG_constant ] diff --git a/test/DebugInfo/X86/2011-09-26-GlobalVarContext.ll b/test/DebugInfo/X86/2011-09-26-GlobalVarContext.ll index 12603bb..7b8d914 100644 --- a/test/DebugInfo/X86/2011-09-26-GlobalVarContext.ll +++ b/test/DebugInfo/X86/2011-09-26-GlobalVarContext.ll @@ -18,20 +18,20 @@ declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !6, metadata !"clang version 3.0 (trunk)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !12, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, metadata !20, i32 12, metadata !"clang version 3.0 (trunk)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !12, metadata !12, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} -!5 = metadata !{i32 720942, i32 0, metadata !6, metadata !"f", metadata !"f", metadata !"", metadata !6, i32 3, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 false, i32 ()* @f, null, null, metadata !10} ; [ DW_TAG_subprogram ] +!5 = metadata !{i32 720942, metadata !6, metadata !6, metadata !"f", metadata !"f", metadata !"", i32 3, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 false, i32 ()* @f, null, null, metadata !10} ; [ DW_TAG_subprogram ] !6 = metadata !{i32 720937, metadata !20} ; [ DW_TAG_file_type ] !7 = metadata !{i32 720917, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !8 = metadata !{metadata !9} -!9 = metadata !{i32 720932, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!9 = metadata !{i32 720932, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !10 = metadata !{metadata !11} !11 = metadata !{i32 720932} ; [ DW_TAG_base_type ] !12 = metadata !{metadata !14} !14 = metadata !{i32 720948, i32 0, null, metadata !"GLB", metadata !"GLB", metadata !"", metadata !6, i32 1, metadata !9, i32 0, i32 1, i32* @GLB, null} ; [ DW_TAG_variable ] !15 = metadata !{i32 786688, metadata !16, metadata !"LOC", metadata !6, i32 4, metadata !9, i32 0, i32 0} ; [ DW_TAG_auto_variable ] -!16 = metadata !{i32 786443, metadata !5, i32 3, i32 9, metadata !6, i32 0} ; [ DW_TAG_lexical_block ] +!16 = metadata !{i32 786443, metadata !20, metadata !5, i32 3, i32 9, i32 0} ; [ DW_TAG_lexical_block ] !17 = metadata !{i32 4, i32 9, metadata !16, null} !18 = metadata !{i32 4, i32 23, metadata !16, null} !19 = metadata !{i32 5, i32 5, metadata !16, null} diff --git a/test/DebugInfo/X86/2011-12-16-BadStructRef.ll b/test/DebugInfo/X86/2011-12-16-BadStructRef.ll index 1ce9db6..5464b87 100644 --- a/test/DebugInfo/X86/2011-12-16-BadStructRef.ll +++ b/test/DebugInfo/X86/2011-12-16-BadStructRef.ll @@ -88,50 +88,50 @@ entry: !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 720913, i32 0, i32 4, metadata !6, metadata !"clang version 3.1 (trunk 146596)", i1 false, metadata !"", i32 0, metadata !1, metadata !3, metadata !27, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 720913, i32 4, metadata !6, metadata !"clang version 3.1 (trunk 146596)", i1 false, metadata !"", i32 0, metadata !1, metadata !3, metadata !27, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5, metadata !9} -!5 = metadata !{i32 720898, null, metadata !"bar", metadata !6, i32 9, i64 128, i64 64, i32 0, i32 0, null, metadata !7, i32 0, null, null} ; [ DW_TAG_class_type ] +!5 = metadata !{i32 720898, metadata !82, null, metadata !"bar", i32 9, i64 128, i64 64, i32 0, i32 0, null, metadata !7, i32 0, null, null} ; [ DW_TAG_class_type ] !6 = metadata !{i32 720937, metadata !82} ; [ DW_TAG_file_type ] !7 = metadata !{metadata !8, metadata !19, metadata !21} -!8 = metadata !{i32 720909, metadata !5, metadata !"b", metadata !6, i32 11, i64 32, i64 32, i64 0, i32 0, metadata !9} ; [ DW_TAG_member ] -!9 = metadata !{i32 720898, null, metadata !"baz", metadata !6, i32 3, i64 32, i64 32, i32 0, i32 0, null, metadata !10, i32 0, null, null} ; [ DW_TAG_class_type ] +!8 = metadata !{i32 720909, metadata !82, metadata !5, metadata !"b", i32 11, i64 32, i64 32, i64 0, i32 0, metadata !9} ; [ DW_TAG_member ] +!9 = metadata !{i32 720898, metadata !82, null, metadata !"baz", i32 3, i64 32, i64 32, i32 0, i32 0, null, metadata !10, i32 0, null, null} ; [ DW_TAG_class_type ] !10 = metadata !{metadata !11, metadata !13} -!11 = metadata !{i32 720909, metadata !9, metadata !"h", metadata !6, i32 5, i64 32, i64 32, i64 0, i32 0, metadata !12} ; [ DW_TAG_member ] -!12 = metadata !{i32 720932, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!13 = metadata !{i32 720942, i32 0, metadata !9, metadata !"baz", metadata !"baz", metadata !"", metadata !6, i32 6, metadata !14, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, null, i32 0, metadata !17} ; [ DW_TAG_subprogram ] +!11 = metadata !{i32 720909, metadata !82, metadata !9, metadata !"h", i32 5, i64 32, i64 32, i64 0, i32 0, metadata !12} ; [ DW_TAG_member ] +!12 = metadata !{i32 720932, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!13 = metadata !{i32 720942, metadata !6, metadata !9, metadata !"baz", metadata !"baz", metadata !"", i32 6, metadata !14, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, null, i32 0, metadata !17} ; [ DW_TAG_subprogram ] !14 = metadata !{i32 720917, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !15, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !15 = metadata !{null, metadata !16, metadata !12} !16 = metadata !{i32 720911, i32 0, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !9} ; [ DW_TAG_pointer_type ] !17 = metadata !{metadata !18} !18 = metadata !{i32 720932} ; [ DW_TAG_base_type ] -!19 = metadata !{i32 720909, metadata !5, metadata !"b_ref", metadata !6, i32 12, i64 64, i64 64, i64 64, i32 0, metadata !20} ; [ DW_TAG_member ] +!19 = metadata !{i32 720909, metadata !82, metadata !5, metadata !"b_ref", i32 12, i64 64, i64 64, i64 64, i32 0, metadata !20} ; [ DW_TAG_member ] !20 = metadata !{i32 720912, null, null, null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !9} ; [ DW_TAG_reference_type ] -!21 = metadata !{i32 720942, i32 0, metadata !5, metadata !"bar", metadata !"bar", metadata !"", metadata !6, i32 13, metadata !22, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, null, i32 0, metadata !25} ; [ DW_TAG_subprogram ] +!21 = metadata !{i32 720942, metadata !6, metadata !5, metadata !"bar", metadata !"bar", metadata !"", i32 13, metadata !22, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, null, i32 0, metadata !25} ; [ DW_TAG_subprogram ] !22 = metadata !{i32 720917, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !23, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !23 = metadata !{null, metadata !24, metadata !12} !24 = metadata !{i32 720911, i32 0, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !5} ; [ DW_TAG_pointer_type ] !25 = metadata !{metadata !26} !26 = metadata !{i32 720932} ; [ DW_TAG_base_type ] !27 = metadata !{metadata !29, metadata !37, metadata !40, metadata !43, metadata !46} -!29 = metadata !{i32 720942, i32 0, metadata !6, metadata !"main", metadata !"main", metadata !"", metadata !6, i32 17, metadata !30, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, i32 (i32, i8**)* @main, null, null, metadata !35} ; [ DW_TAG_subprogram ] +!29 = metadata !{i32 720942, metadata !6, metadata !6, metadata !"main", metadata !"main", metadata !"", i32 17, metadata !30, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, i32 (i32, i8**)* @main, null, null, metadata !35} ; [ DW_TAG_subprogram ] !30 = metadata !{i32 720917, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !31, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !31 = metadata !{metadata !12, metadata !12, metadata !32} -!32 = metadata !{i32 720911, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !33} ; [ DW_TAG_pointer_type ] -!33 = metadata !{i32 720911, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !34} ; [ DW_TAG_pointer_type ] -!34 = metadata !{i32 720932, null, metadata !"char", null, i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ] +!32 = metadata !{i32 720911, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !33} ; [ DW_TAG_pointer_type ] +!33 = metadata !{i32 720911, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !34} ; [ DW_TAG_pointer_type ] +!34 = metadata !{i32 720932, null, null, metadata !"char", i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ] !35 = metadata !{metadata !36} !36 = metadata !{i32 720932} ; [ DW_TAG_base_type ] -!37 = metadata !{i32 720942, i32 0, null, metadata !"bar", metadata !"bar", metadata !"_ZN3barC1Ei", metadata !6, i32 13, metadata !22, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void (%struct.bar*, i32)* @_ZN3barC1Ei, null, metadata !21, metadata !38} ; [ DW_TAG_subprogram ] +!37 = metadata !{i32 720942, metadata !6, null, metadata !"bar", metadata !"bar", metadata !"_ZN3barC1Ei", i32 13, metadata !22, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void (%struct.bar*, i32)* @_ZN3barC1Ei, null, metadata !21, metadata !38} ; [ DW_TAG_subprogram ] !38 = metadata !{metadata !39} !39 = metadata !{i32 720932} ; [ DW_TAG_base_type ] -!40 = metadata !{i32 720942, i32 0, null, metadata !"bar", metadata !"bar", metadata !"_ZN3barC2Ei", metadata !6, i32 13, metadata !22, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void (%struct.bar*, i32)* @_ZN3barC2Ei, null, metadata !21, metadata !41} ; [ DW_TAG_subprogram ] +!40 = metadata !{i32 720942, metadata !6, null, metadata !"bar", metadata !"bar", metadata !"_ZN3barC2Ei", i32 13, metadata !22, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void (%struct.bar*, i32)* @_ZN3barC2Ei, null, metadata !21, metadata !41} ; [ DW_TAG_subprogram ] !41 = metadata !{metadata !42} !42 = metadata !{i32 720932} ; [ DW_TAG_base_type ] -!43 = metadata !{i32 720942, i32 0, null, metadata !"baz", metadata !"baz", metadata !"_ZN3bazC1Ei", metadata !6, i32 6, metadata !14, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void (%struct.baz*, i32)* @_ZN3bazC1Ei, null, metadata !13, metadata !44} ; [ DW_TAG_subprogram ] +!43 = metadata !{i32 720942, metadata !6, null, metadata !"baz", metadata !"baz", metadata !"_ZN3bazC1Ei", i32 6, metadata !14, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void (%struct.baz*, i32)* @_ZN3bazC1Ei, null, metadata !13, metadata !44} ; [ DW_TAG_subprogram ] !44 = metadata !{metadata !45} !45 = metadata !{i32 720932} ; [ DW_TAG_base_type ] -!46 = metadata !{i32 720942, i32 0, null, metadata !"baz", metadata !"baz", metadata !"_ZN3bazC2Ei", metadata !6, i32 6, metadata !14, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void (%struct.baz*, i32)* @_ZN3bazC2Ei, null, metadata !13, metadata !47} ; [ DW_TAG_subprogram ] +!46 = metadata !{i32 720942, metadata !6, null, metadata !"baz", metadata !"baz", metadata !"_ZN3bazC2Ei", i32 6, metadata !14, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void (%struct.baz*, i32)* @_ZN3bazC2Ei, null, metadata !13, metadata !47} ; [ DW_TAG_subprogram ] !47 = metadata !{metadata !48} !48 = metadata !{i32 720932} ; [ DW_TAG_base_type ] !49 = metadata !{i32 721153, metadata !29, metadata !"argc", metadata !6, i32 16777232, metadata !12, i32 0, i32 0} ; [ DW_TAG_arg_variable ] diff --git a/test/DebugInfo/X86/DW_AT_byte_size.ll b/test/DebugInfo/X86/DW_AT_byte_size.ll index 6a68a05..dcacba1 100644 --- a/test/DebugInfo/X86/DW_AT_byte_size.ll +++ b/test/DebugInfo/X86/DW_AT_byte_size.ll @@ -24,22 +24,22 @@ declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !6, metadata !"clang version 3.1 (trunk 150996)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, i32 4, metadata !6, metadata !"clang version 3.1 (trunk 150996)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} -!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"foo", metadata !"foo", metadata !"_Z3fooP1A", metadata !6, i32 3, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (%struct.A*)* @_Z3fooP1A, null, null, metadata !14, i32 3} ; [ DW_TAG_subprogram ] +!5 = metadata !{i32 786478, metadata !6, metadata !"foo", metadata !"foo", metadata !"_Z3fooP1A", metadata !6, i32 3, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (%struct.A*)* @_Z3fooP1A, null, null, metadata !14, i32 3} ; [ DW_TAG_subprogram ] !6 = metadata !{i32 786473, metadata !20} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !8 = metadata !{metadata !9, metadata !10} -!9 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!10 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !11} ; [ DW_TAG_pointer_type ] -!11 = metadata !{i32 786434, null, metadata !"A", metadata !6, i32 1, i64 32, i64 32, i32 0, i32 0, null, metadata !12, i32 0, null, null} ; [ DW_TAG_class_type ] +!9 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!10 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !11} ; [ DW_TAG_pointer_type ] +!11 = metadata !{i32 786434, metadata !20, null, metadata !"A", i32 1, i64 32, i64 32, i32 0, i32 0, null, metadata !12, i32 0, null, null} ; [ DW_TAG_class_type ] !12 = metadata !{metadata !13} -!13 = metadata !{i32 786445, metadata !11, metadata !"b", metadata !6, i32 1, i64 32, i64 32, i64 0, i32 0, metadata !9} ; [ DW_TAG_member ] +!13 = metadata !{i32 786445, metadata !20, metadata !11, metadata !"b", i32 1, i64 32, i64 32, i64 0, i32 0, metadata !9} ; [ DW_TAG_member ] !14 = metadata !{metadata !15} !15 = metadata !{i32 786468} ; [ DW_TAG_base_type ] !16 = metadata !{i32 786689, metadata !5, metadata !"a", metadata !6, i32 16777219, metadata !10, i32 0, i32 0} ; [ DW_TAG_arg_variable ] !17 = metadata !{i32 3, i32 13, metadata !5, null} !18 = metadata !{i32 4, i32 3, metadata !19, null} -!19 = metadata !{i32 786443, metadata !5, i32 3, i32 16, metadata !6, i32 0} ; [ DW_TAG_lexical_block ] +!19 = metadata !{i32 786443, metadata !6, metadata !5, i32 3, i32 16, i32 0} ; [ DW_TAG_lexical_block ] !20 = metadata !{metadata !"foo.cpp", metadata !"/Users/echristo"} diff --git a/test/DebugInfo/X86/DW_AT_location-reference.ll b/test/DebugInfo/X86/DW_AT_location-reference.ll index ecc9689..6f1aa41 100644 --- a/test/DebugInfo/X86/DW_AT_location-reference.ll +++ b/test/DebugInfo/X86/DW_AT_location-reference.ll @@ -49,7 +49,7 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 define void @f() nounwind { entry: %call = tail call i32 @g(i32 0, i32 0) nounwind, !dbg !8 - store i32 %call, i32* @a, align 4, !dbg !8, !tbaa !9 + store i32 %call, i32* @a, align 4, !dbg !8 tail call void @llvm.dbg.value(metadata !12, i64 0, metadata !5), !dbg !13 br label %while.body @@ -63,7 +63,7 @@ while.body: ; preds = %entry, %while.body while.end: ; preds = %while.body tail call void @llvm.dbg.value(metadata !{i32 %mul}, i64 0, metadata !5), !dbg !14 %call4 = tail call i32 @g(i32 %mul, i32 0) nounwind, !dbg !15 - store i32 %call4, i32* @a, align 4, !dbg !15, !tbaa !9 + store i32 %call4, i32* @a, align 4, !dbg !15 tail call void @llvm.dbg.value(metadata !16, i64 0, metadata !5), !dbg !17 br label %while.body9 @@ -77,7 +77,7 @@ while.body9: ; preds = %while.end, %while.b while.end13: ; preds = %while.body9 tail call void @llvm.dbg.value(metadata !{i32 %mul12}, i64 0, metadata !5), !dbg !18 %call15 = tail call i32 @g(i32 0, i32 %mul12) nounwind, !dbg !19 - store i32 %call15, i32* @a, align 4, !dbg !19, !tbaa !9 + store i32 %call15, i32* @a, align 4, !dbg !19 ret void, !dbg !20 } @@ -87,18 +87,15 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!2} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"f", metadata !"f", metadata !"", metadata !1, i32 4, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, void ()* @f, null, null, metadata !22, i32 4} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786478, metadata !1, metadata !"f", metadata !"f", metadata !"", metadata !1, i32 4, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, void ()* @f, null, null, metadata !22, i32 4} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786473, metadata !23} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 12, metadata !1, metadata !"clang version 3.0 (trunk)", i1 true, metadata !"", i32 0, null, null, metadata !21, null, null} ; [ DW_TAG_compile_unit ] +!2 = metadata !{i32 786449, i32 12, metadata !1, metadata !"clang version 3.0 (trunk)", i1 true, metadata !"", i32 0, null, null, metadata !21, null, null, null} ; [ DW_TAG_compile_unit ] !3 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !4 = metadata !{null} !5 = metadata !{i32 786688, metadata !6, metadata !"x", metadata !1, i32 5, metadata !7, i32 0, null} ; [ DW_TAG_auto_variable ] -!6 = metadata !{i32 786443, metadata !0, i32 4, i32 14, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!6 = metadata !{i32 786443, metadata !1, metadata !0, i32 4, i32 14, i32 0} ; [ DW_TAG_lexical_block ] !7 = metadata !{i32 786468, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !8 = metadata !{i32 6, i32 3, metadata !6, null} -!9 = metadata !{metadata !"int", metadata !10} -!10 = metadata !{metadata !"omnipotent char", metadata !11} -!11 = metadata !{metadata !"Simple C/C++ TBAA", null} !12 = metadata !{i32 1} !13 = metadata !{i32 7, i32 3, metadata !6, null} !14 = metadata !{i32 8, i32 3, metadata !6, null} diff --git a/test/DebugInfo/X86/DW_AT_object_pointer.ll b/test/DebugInfo/X86/DW_AT_object_pointer.ll index 37fb306..789f556 100644 --- a/test/DebugInfo/X86/DW_AT_object_pointer.ll +++ b/test/DebugInfo/X86/DW_AT_object_pointer.ll @@ -47,38 +47,38 @@ entry: !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !6, metadata !"clang version 3.2 (trunk 163586) (llvm/trunk 163570)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] [/Users/echristo/debug-tests/bar.cpp] [DW_LANG_C_plus_plus] +!0 = metadata !{i32 786449, metadata !37, i32 4, metadata !"clang version 3.2 (trunk 163586) (llvm/trunk 163570)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] [/Users/echristo/debug-tests/bar.cpp] [DW_LANG_C_plus_plus] !1 = metadata !{i32 0} !3 = metadata !{metadata !5, metadata !10, metadata !20} -!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"foo", metadata !"foo", metadata !"_Z3fooi", metadata !6, i32 7, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (i32)* @_Z3fooi, null, null, metadata !1, i32 7} ; [ DW_TAG_subprogram ] [line 7] [def] [foo] +!5 = metadata !{i32 786478, metadata !6, metadata !6, metadata !"foo", metadata !"foo", metadata !"_Z3fooi", i32 7, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (i32)* @_Z3fooi, null, null, metadata !1, i32 7} ; [ DW_TAG_subprogram ] [line 7] [def] [foo] !6 = metadata !{i32 786473, metadata !37} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !8 = metadata !{metadata !9} -!9 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] -!10 = metadata !{i32 786478, i32 0, null, metadata !"A", metadata !"A", metadata !"_ZN1AC1Ev", metadata !6, i32 3, metadata !11, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (%class.A*)* @_ZN1AC1Ev, null, metadata !17, metadata !1, i32 3} ; [ DW_TAG_subprogram ] [line 3] [def] [A] +!9 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] +!10 = metadata !{i32 786478, metadata !6, null, metadata !"A", metadata !"A", metadata !"_ZN1AC1Ev", i32 3, metadata !11, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (%class.A*)* @_ZN1AC1Ev, null, metadata !17, metadata !1, i32 3} ; [ DW_TAG_subprogram ] [line 3] [def] [A] !11 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !12 = metadata !{null, metadata !13} !13 = metadata !{i32 786447, i32 0, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 1088, metadata !14} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from A] -!14 = metadata !{i32 786434, null, metadata !"A", metadata !6, i32 1, i64 32, i64 32, i32 0, i32 0, null, metadata !15, i32 0, null, null} ; [ DW_TAG_class_type ] [A] [line 1, size 32, align 32, offset 0] [from ] +!14 = metadata !{i32 786434, metadata !37, null, metadata !"A", i32 1, i64 32, i64 32, i32 0, i32 0, null, metadata !15, i32 0, null, null} ; [ DW_TAG_class_type ] [A] [line 1, size 32, align 32, offset 0] [from ] !15 = metadata !{metadata !16, metadata !17} -!16 = metadata !{i32 786445, metadata !14, metadata !"m_a", metadata !6, i32 4, i64 32, i64 32, i64 0, i32 0, metadata !9} ; [ DW_TAG_member ] [m_a] [line 4, size 32, align 32, offset 0] [from int] -!17 = metadata !{i32 786478, i32 0, metadata !14, metadata !"A", metadata !"A", metadata !"", metadata !6, i32 3, metadata !11, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, null, i32 0, metadata !18, i32 3} ; [ DW_TAG_subprogram ] [line 3] [A] +!16 = metadata !{i32 786445, metadata !37, metadata !14, metadata !"m_a", i32 4, i64 32, i64 32, i64 0, i32 0, metadata !9} ; [ DW_TAG_member ] [m_a] [line 4, size 32, align 32, offset 0] [from int] +!17 = metadata !{i32 786478, metadata !6, metadata !14, metadata !"A", metadata !"A", metadata !"", i32 3, metadata !11, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, null, i32 0, metadata !18, i32 3} ; [ DW_TAG_subprogram ] [line 3] [A] !18 = metadata !{metadata !19} !19 = metadata !{i32 786468} ; [ DW_TAG_base_type ] [line 0, size 0, align 0, offset 0] -!20 = metadata !{i32 786478, i32 0, null, metadata !"A", metadata !"A", metadata !"_ZN1AC2Ev", metadata !6, i32 3, metadata !11, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (%class.A*)* @_ZN1AC2Ev, null, metadata !17, metadata !1, i32 3} ; [ DW_TAG_subprogram ] [line 3] [def] [A] +!20 = metadata !{i32 786478, metadata !6, null, metadata !"A", metadata !"A", metadata !"_ZN1AC2Ev", i32 3, metadata !11, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (%class.A*)* @_ZN1AC2Ev, null, metadata !17, metadata !1, i32 3} ; [ DW_TAG_subprogram ] [line 3] [def] [A] !21 = metadata !{i32 786688, metadata !22, metadata !"a", metadata !6, i32 8, metadata !14, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [a] [line 8] -!22 = metadata !{i32 786443, metadata !5, i32 7, i32 11, metadata !6, i32 0} ; [ DW_TAG_lexical_block ] [/Users/echristo/debug-tests/bar.cpp] +!22 = metadata !{i32 786443, metadata !6, metadata !5, i32 7, i32 11, i32 0} ; [ DW_TAG_lexical_block ] [/Users/echristo/debug-tests/bar.cpp] !23 = metadata !{i32 8, i32 5, metadata !22, null} !24 = metadata !{i32 8, i32 6, metadata !22, null} !25 = metadata !{i32 9, i32 3, metadata !22, null} !26 = metadata !{i32 786689, metadata !10, metadata !"this", metadata !6, i32 16777219, metadata !27, i32 1088, i32 0} ; [ DW_TAG_arg_variable ] [this] [line 3] -!27 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !14} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from A] +!27 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !14} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from A] !28 = metadata !{i32 3, i32 3, metadata !10, null} !29 = metadata !{i32 3, i32 18, metadata !10, null} !30 = metadata !{i32 786689, metadata !20, metadata !"this", metadata !6, i32 16777219, metadata !27, i32 1088, i32 0} ; [ DW_TAG_arg_variable ] [this] [line 3] !31 = metadata !{i32 3, i32 3, metadata !20, null} !32 = metadata !{i32 3, i32 9, metadata !33, null} -!33 = metadata !{i32 786443, metadata !20, i32 3, i32 7, metadata !6, i32 1} ; [ DW_TAG_lexical_block ] [/Users/echristo/debug-tests/bar.cpp] +!33 = metadata !{i32 786443, metadata !6, metadata !20, i32 3, i32 7, i32 1} ; [ DW_TAG_lexical_block ] [/Users/echristo/debug-tests/bar.cpp] !34 = metadata !{i32 3, i32 18, metadata !33, null} !35 = metadata !{i32 7, i32 0, metadata !5, null} !36 = metadata !{i32 786689, metadata !5, metadata !"", metadata !6, i32 16777223, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [line 7] diff --git a/test/DebugInfo/X86/DW_AT_specification.ll b/test/DebugInfo/X86/DW_AT_specification.ll index d897ff2..93e1ecf 100644 --- a/test/DebugInfo/X86/DW_AT_specification.ll +++ b/test/DebugInfo/X86/DW_AT_specification.ll @@ -16,17 +16,17 @@ entry: !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !6, metadata !"clang version 3.0 ()", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !18, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, metadata !27, i32 4, metadata !"clang version 3.0 ()", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !18, metadata !18, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} -!5 = metadata !{i32 720942, i32 0, null, metadata !"bar", metadata !"bar", metadata !"_ZN3foo3barEv", metadata !6, i32 4, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void ()* @_ZN3foo3barEv, null, metadata !11, metadata !16, i32 4} ; [ DW_TAG_subprogram ] +!5 = metadata !{i32 720942, metadata !6, null, metadata !"bar", metadata !"bar", metadata !"_ZN3foo3barEv", i32 4, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void ()* @_ZN3foo3barEv, null, metadata !11, metadata !16, i32 4} ; [ DW_TAG_subprogram ] !6 = metadata !{i32 720937, metadata !27} ; [ DW_TAG_file_type ] !7 = metadata !{i32 720917, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !8 = metadata !{null, metadata !9} !9 = metadata !{i32 786447, i32 0, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !10} ; [ DW_TAG_pointer_type ] -!10 = metadata !{i32 786451, null, metadata !"foo", metadata !6, i32 1, i64 0, i64 0, i32 0, i32 4, i32 0, null, i32 0, i32 0} ; [ DW_TAG_structure_type ] -!11 = metadata !{i32 720942, i32 0, metadata !12, metadata !"bar", metadata !"bar", metadata !"_ZN3foo3barEv", metadata !6, i32 2, metadata !7, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, null, i32 0, metadata !14, i32 2} ; [ DW_TAG_subprogram ] -!12 = metadata !{i32 720898, null, metadata !"foo", metadata !6, i32 1, i64 8, i64 8, i32 0, i32 0, null, metadata !13, i32 0, null, null} ; [ DW_TAG_class_type ] +!10 = metadata !{i32 786451, metadata !27, null, metadata !"foo", i32 1, i64 0, i64 0, i32 0, i32 4, i32 0, null, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!11 = metadata !{i32 720942, metadata !6, metadata !12, metadata !"bar", metadata !"bar", metadata !"_ZN3foo3barEv", i32 2, metadata !7, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, null, i32 0, metadata !14, i32 2} ; [ DW_TAG_subprogram ] +!12 = metadata !{i32 720898, metadata !27, null, metadata !"foo", i32 1, i64 8, i64 8, i32 0, i32 0, null, metadata !13, i32 0, null, null} ; [ DW_TAG_class_type ] !13 = metadata !{metadata !11} !14 = metadata !{metadata !15} !15 = metadata !{i32 720932} ; [ DW_TAG_base_type ] @@ -34,8 +34,8 @@ entry: !17 = metadata !{i32 720932} ; [ DW_TAG_base_type ] !18 = metadata !{metadata !20} !20 = metadata !{i32 720948, i32 0, metadata !5, metadata !"x", metadata !"x", metadata !"", metadata !6, i32 5, metadata !21, i32 1, i32 1, i32* @_ZZN3foo3barEvE1x, null} ; [ DW_TAG_variable ] -!21 = metadata !{i32 720934, null, metadata !"", null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !22} ; [ DW_TAG_const_type ] -!22 = metadata !{i32 720932, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!21 = metadata !{i32 720934, null, null, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, metadata !22} ; [ DW_TAG_const_type ] +!22 = metadata !{i32 720932, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !25 = metadata !{i32 6, i32 1, metadata !26, null} !26 = metadata !{i32 786443, metadata !5, i32 4, i32 17, metadata !6, i32 0} ; [ DW_TAG_lexical_block ] !27 = metadata !{metadata !"nsNativeAppSupportBase.ii", metadata !"/Users/espindola/mozilla-central/obj-x86_64-apple-darwin11.2.0/toolkit/library"} diff --git a/test/DebugInfo/X86/DW_TAG_friend.ll b/test/DebugInfo/X86/DW_TAG_friend.ll index 460d921..2e23222 100644 --- a/test/DebugInfo/X86/DW_TAG_friend.ll +++ b/test/DebugInfo/X86/DW_TAG_friend.ll @@ -17,26 +17,26 @@ !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !6, metadata !"clang version 3.1 (trunk 153413) (llvm/trunk 153428)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !3, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, metadata !28, i32 4, metadata !"clang version 3.1 (trunk 153413) (llvm/trunk 153428)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !3, metadata !3, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5, metadata !17} !5 = metadata !{i32 786484, i32 0, null, metadata !"a", metadata !"a", metadata !"", metadata !6, i32 10, metadata !7, i32 0, i32 1, %class.A* @a, null} ; [ DW_TAG_variable ] !6 = metadata !{i32 786473, metadata !28} ; [ DW_TAG_file_type ] -!7 = metadata !{i32 786434, null, metadata !"A", metadata !6, i32 1, i64 32, i64 32, i32 0, i32 0, null, metadata !8, i32 0, null, null} ; [ DW_TAG_class_type ] +!7 = metadata !{i32 786434, metadata !28, null, metadata !"A", i32 1, i64 32, i64 32, i32 0, i32 0, null, metadata !8, i32 0, null, null} ; [ DW_TAG_class_type ] !8 = metadata !{metadata !9, metadata !11} -!9 = metadata !{i32 786445, metadata !7, metadata !"a", metadata !6, i32 2, i64 32, i64 32, i64 0, i32 1, metadata !10} ; [ DW_TAG_member ] -!10 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!11 = metadata !{i32 786478, i32 0, metadata !7, metadata !"A", metadata !"A", metadata !"", metadata !6, i32 1, metadata !12, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !15, i32 1} ; [ DW_TAG_subprogram ] +!9 = metadata !{i32 786445, metadata !28, metadata !7, metadata !"a", i32 2, i64 32, i64 32, i64 0, i32 1, metadata !10} ; [ DW_TAG_member ] +!10 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!11 = metadata !{i32 786478, metadata !6, metadata !7, metadata !"A", metadata !"A", metadata !"", i32 1, metadata !12, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !15, i32 1} ; [ DW_TAG_subprogram ] !12 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !13, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !13 = metadata !{null, metadata !14} !14 = metadata !{i32 786447, i32 0, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !7} ; [ DW_TAG_pointer_type ] !15 = metadata !{metadata !16} !16 = metadata !{i32 786468} ; [ DW_TAG_base_type ] !17 = metadata !{i32 786484, i32 0, null, metadata !"b", metadata !"b", metadata !"", metadata !6, i32 11, metadata !18, i32 0, i32 1, %class.B* @b, null} ; [ DW_TAG_variable ] -!18 = metadata !{i32 786434, null, metadata !"B", metadata !6, i32 5, i64 32, i64 32, i32 0, i32 0, null, metadata !19, i32 0, null, null} ; [ DW_TAG_class_type ] +!18 = metadata !{i32 786434, metadata !28, null, metadata !"B", i32 5, i64 32, i64 32, i32 0, i32 0, null, metadata !19, i32 0, null, null} ; [ DW_TAG_class_type ] !19 = metadata !{metadata !20, metadata !21, metadata !27} -!20 = metadata !{i32 786445, metadata !18, metadata !"b", metadata !6, i32 7, i64 32, i64 32, i64 0, i32 1, metadata !10} ; [ DW_TAG_member ] -!21 = metadata !{i32 786478, i32 0, metadata !18, metadata !"B", metadata !"B", metadata !"", metadata !6, i32 5, metadata !22, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !25, i32 5} ; [ DW_TAG_subprogram ] +!20 = metadata !{i32 786445, metadata !28, metadata !18, metadata !"b", i32 7, i64 32, i64 32, i64 0, i32 1, metadata !10} ; [ DW_TAG_member ] +!21 = metadata !{i32 786478, metadata !6, metadata !18, metadata !"B", metadata !"B", metadata !"", i32 5, metadata !22, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !25, i32 5} ; [ DW_TAG_subprogram ] !22 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !23, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !23 = metadata !{null, metadata !24} !24 = metadata !{i32 786447, i32 0, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !18} ; [ DW_TAG_pointer_type ] diff --git a/test/DebugInfo/X86/aligned_stack_var.ll b/test/DebugInfo/X86/aligned_stack_var.ll index 9990daa..b99de3c 100644 --- a/test/DebugInfo/X86/aligned_stack_var.ll +++ b/test/DebugInfo/X86/aligned_stack_var.ll @@ -26,15 +26,15 @@ declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !6, metadata !"clang version 3.2 (trunk 155696:155697) (llvm/trunk 155696)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, i32 4, metadata !6, metadata !"clang version 3.2 (trunk 155696:155697) (llvm/trunk 155696)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} -!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"run", metadata !"run", metadata !"_Z3runv", metadata !6, i32 1, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void ()* @_Z3runv, null, null, metadata !1, i32 1} ; [ DW_TAG_subprogram ] +!5 = metadata !{i32 786478, metadata !6, metadata !"run", metadata !"run", metadata !"_Z3runv", metadata !6, i32 1, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void ()* @_Z3runv, null, null, metadata !1, i32 1} ; [ DW_TAG_subprogram ] !6 = metadata !{i32 786473, metadata !"test.cc", metadata !"/home/samsonov/debuginfo", null} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !8 = metadata !{null} !9 = metadata !{i32 786688, metadata !10, metadata !"x", metadata !6, i32 2, metadata !11, i32 0, i32 0} ; [ DW_TAG_auto_variable ] -!10 = metadata !{i32 786443, metadata !5, i32 1, i32 12, metadata !6, i32 0} ; [ DW_TAG_lexical_block ] +!10 = metadata !{i32 786443, metadata !6, metadata !5, i32 1, i32 12, i32 0} ; [ DW_TAG_lexical_block ] !11 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !12 = metadata !{i32 2, i32 7, metadata !10, null} !13 = metadata !{i32 3, i32 1, metadata !10, null} diff --git a/test/DebugInfo/X86/block-capture.ll b/test/DebugInfo/X86/block-capture.ll index 111e9f6..0046730 100644 --- a/test/DebugInfo/X86/block-capture.ll +++ b/test/DebugInfo/X86/block-capture.ll @@ -62,55 +62,55 @@ declare i32 @__objc_personality_v0(...) !llvm.dbg.cu = !{!0} !llvm.module.flags = !{!35, !36, !37, !38} -!0 = metadata !{i32 786449, i32 0, i32 16, metadata !6, metadata !"clang version 3.1 (trunk 151227)", i1 false, metadata !"", i32 2, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, metadata !63, i32 16, metadata !"clang version 3.1 (trunk 151227)", i1 false, metadata !"", i32 2, metadata !1, metadata !1, metadata !3, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5, metadata !28, metadata !31, metadata !34} -!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"foo", metadata !"foo", metadata !"", metadata !6, i32 5, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, null, null, null, metadata !26, i32 5} ; [ DW_TAG_subprogram ] +!5 = metadata !{i32 786478, metadata !6, metadata !6, metadata !"foo", metadata !"foo", metadata !"", i32 5, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, null, null, null, metadata !26, i32 5} ; [ DW_TAG_subprogram ] !6 = metadata !{i32 786473, metadata !63} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !8 = metadata !{null, metadata !9} -!9 = metadata !{i32 786454, null, metadata !"dispatch_block_t", metadata !6, i32 1, i64 0, i64 0, i64 0, i32 0, metadata !10} ; [ DW_TAG_typedef ] -!10 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 0, i64 0, i32 0, metadata !11} ; [ DW_TAG_pointer_type ] -!11 = metadata !{i32 786451, metadata !6, metadata !"__block_literal_generic", metadata !6, i32 5, i64 256, i64 0, i32 0, i32 8, null, metadata !12, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!9 = metadata !{i32 786454, metadata !63, null, metadata !"dispatch_block_t", i32 1, i64 0, i64 0, i64 0, i32 0, metadata !10} ; [ DW_TAG_typedef ] +!10 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 0, i64 0, i32 0, metadata !11} ; [ DW_TAG_pointer_type ] +!11 = metadata !{i32 786451, metadata !63, metadata !6, metadata !"__block_literal_generic", i32 5, i64 256, i64 0, i32 0, i32 8, null, metadata !12, i32 0, i32 0} ; [ DW_TAG_structure_type ] !12 = metadata !{metadata !13, metadata !15, metadata !17, metadata !18, metadata !19} -!13 = metadata !{i32 786445, metadata !6, metadata !"__isa", metadata !6, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !14} ; [ DW_TAG_member ] -!14 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ] -!15 = metadata !{i32 786445, metadata !6, metadata !"__flags", metadata !6, i32 0, i64 32, i64 32, i64 64, i32 0, metadata !16} ; [ DW_TAG_member ] -!16 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!17 = metadata !{i32 786445, metadata !6, metadata !"__reserved", metadata !6, i32 0, i64 32, i64 32, i64 96, i32 0, metadata !16} ; [ DW_TAG_member ] -!18 = metadata !{i32 786445, metadata !6, metadata !"__FuncPtr", metadata !6, i32 0, i64 64, i64 64, i64 128, i32 0, metadata !14} ; [ DW_TAG_member ] -!19 = metadata !{i32 786445, metadata !6, metadata !"__descriptor", metadata !6, i32 5, i64 64, i64 64, i64 192, i32 0, metadata !20} ; [ DW_TAG_member ] -!20 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 0, i64 0, i32 0, metadata !21} ; [ DW_TAG_pointer_type ] -!21 = metadata !{i32 786451, metadata !6, metadata !"__block_descriptor", metadata !6, i32 5, i64 128, i64 0, i32 0, i32 8, null, metadata !22, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!13 = metadata !{i32 786445, metadata !63, metadata !6, metadata !"__isa", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !14} ; [ DW_TAG_member ] +!14 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ] +!15 = metadata !{i32 786445, metadata !63, metadata !6, metadata !"__flags", i32 0, i64 32, i64 32, i64 64, i32 0, metadata !16} ; [ DW_TAG_member ] +!16 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!17 = metadata !{i32 786445, metadata !63, metadata !6, metadata !"__reserved", i32 0, i64 32, i64 32, i64 96, i32 0, metadata !16} ; [ DW_TAG_member ] +!18 = metadata !{i32 786445, metadata !63, metadata !6, metadata !"__FuncPtr", i32 0, i64 64, i64 64, i64 128, i32 0, metadata !14} ; [ DW_TAG_member ] +!19 = metadata !{i32 786445, metadata !63, metadata !6, metadata !"__descriptor", i32 5, i64 64, i64 64, i64 192, i32 0, metadata !20} ; [ DW_TAG_member ] +!20 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 0, i64 0, i32 0, metadata !21} ; [ DW_TAG_pointer_type ] +!21 = metadata !{i32 786451, metadata !63, metadata !6, metadata !"__block_descriptor", i32 5, i64 128, i64 0, i32 0, i32 8, null, metadata !22, i32 0, i32 0} ; [ DW_TAG_structure_type ] !22 = metadata !{metadata !23, metadata !25} -!23 = metadata !{i32 786445, metadata !6, metadata !"reserved", metadata !6, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !24} ; [ DW_TAG_member ] -!24 = metadata !{i32 786468, null, metadata !"long unsigned int", null, i32 0, i64 64, i64 64, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] -!25 = metadata !{i32 786445, metadata !6, metadata !"Size", metadata !6, i32 0, i64 64, i64 64, i64 64, i32 0, metadata !24} ; [ DW_TAG_member ] +!23 = metadata !{i32 786445, metadata !63, metadata !6, metadata !"reserved", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !24} ; [ DW_TAG_member ] +!24 = metadata !{i32 786468, null, null, metadata !"long unsigned int", i32 0, i64 64, i64 64, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] +!25 = metadata !{i32 786445, metadata !63, metadata !6, metadata !"Size", i32 0, i64 64, i64 64, i64 64, i32 0, metadata !24} ; [ DW_TAG_member ] !26 = metadata !{metadata !27} !27 = metadata !{i32 786468} ; [ DW_TAG_base_type ] -!28 = metadata !{i32 786478, i32 0, metadata !6, metadata !"__foo_block_invoke_0", metadata !"__foo_block_invoke_0", metadata !"", metadata !6, i32 7, metadata !29, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (i8*)* @__foo_block_invoke_0, null, null, metadata !26, i32 7} ; [ DW_TAG_subprogram ] +!28 = metadata !{i32 786478, metadata !6, metadata !6, metadata !"__foo_block_invoke_0", metadata !"__foo_block_invoke_0", metadata !"", i32 7, metadata !29, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (i8*)* @__foo_block_invoke_0, null, null, metadata !26, i32 7} ; [ DW_TAG_subprogram ] !29 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !30, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !30 = metadata !{null, metadata !14} -!31 = metadata !{i32 786478, i32 0, metadata !6, metadata !"__copy_helper_block_", metadata !"__copy_helper_block_", metadata !"", metadata !6, i32 10, metadata !32, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, null, null, null, metadata !26, i32 10} ; [ DW_TAG_subprogram ] +!31 = metadata !{i32 786478, metadata !6, metadata !6, metadata !"__copy_helper_block_", metadata !"__copy_helper_block_", metadata !"", i32 10, metadata !32, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, null, null, null, metadata !26, i32 10} ; [ DW_TAG_subprogram ] !32 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !33, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !33 = metadata !{null, metadata !14, metadata !14} -!34 = metadata !{i32 786478, i32 0, metadata !6, metadata !"__destroy_helper_block_", metadata !"__destroy_helper_block_", metadata !"", metadata !6, i32 10, metadata !29, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, null, null, null, metadata !26, i32 10} ; [ DW_TAG_subprogram ] +!34 = metadata !{i32 786478, metadata !6, metadata !6, metadata !"__destroy_helper_block_", metadata !"__destroy_helper_block_", metadata !"", i32 10, metadata !29, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, null, null, null, metadata !26, i32 10} ; [ DW_TAG_subprogram ] !35 = metadata !{i32 1, metadata !"Objective-C Version", i32 2} !36 = metadata !{i32 1, metadata !"Objective-C Image Info Version", i32 0} !37 = metadata !{i32 1, metadata !"Objective-C Image Info Section", metadata !"__DATA, __objc_imageinfo, regular, no_dead_strip"} !38 = metadata !{i32 4, metadata !"Objective-C Garbage Collection", i32 0} !39 = metadata !{i32 786689, metadata !28, metadata !".block_descriptor", metadata !6, i32 16777223, metadata !40, i32 64, i32 0} ; [ DW_TAG_arg_variable ] -!40 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 0, i64 0, i32 0, metadata !41} ; [ DW_TAG_pointer_type ] -!41 = metadata !{i32 786451, metadata !6, metadata !"__block_literal_1", metadata !6, i32 7, i64 320, i64 64, i32 0, i32 0, null, metadata !42, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!40 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 0, i64 0, i32 0, metadata !41} ; [ DW_TAG_pointer_type ] +!41 = metadata !{i32 786451, metadata !63, metadata !6, metadata !"__block_literal_1", i32 7, i64 320, i64 64, i32 0, i32 0, null, metadata !42, i32 0, i32 0} ; [ DW_TAG_structure_type ] !42 = metadata !{metadata !43, metadata !44, metadata !45, metadata !46, metadata !47, metadata !50} -!43 = metadata !{i32 786445, metadata !6, metadata !"__isa", metadata !6, i32 7, i64 64, i64 64, i64 0, i32 0, metadata !14} ; [ DW_TAG_member ] -!44 = metadata !{i32 786445, metadata !6, metadata !"__flags", metadata !6, i32 7, i64 32, i64 32, i64 64, i32 0, metadata !16} ; [ DW_TAG_member ] -!45 = metadata !{i32 786445, metadata !6, metadata !"__reserved", metadata !6, i32 7, i64 32, i64 32, i64 96, i32 0, metadata !16} ; [ DW_TAG_member ] -!46 = metadata !{i32 786445, metadata !6, metadata !"__FuncPtr", metadata !6, i32 7, i64 64, i64 64, i64 128, i32 0, metadata !14} ; [ DW_TAG_member ] -!47 = metadata !{i32 786445, metadata !6, metadata !"__descriptor", metadata !6, i32 7, i64 64, i64 64, i64 192, i32 0, metadata !48} ; [ DW_TAG_member ] -!48 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !49} ; [ DW_TAG_pointer_type ] -!49 = metadata !{i32 786451, null, metadata !"__block_descriptor_withcopydispose", metadata !6, i32 7, i32 0, i32 0, i32 0, i32 4, null, null, i32 0} ; [ DW_TAG_structure_type ] -!50 = metadata !{i32 786445, metadata !6, metadata !"block", metadata !6, i32 7, i64 64, i64 64, i64 256, i32 0, metadata !9} ; [ DW_TAG_member ] +!43 = metadata !{i32 786445, metadata !63, metadata !6, metadata !"__isa", i32 7, i64 64, i64 64, i64 0, i32 0, metadata !14} ; [ DW_TAG_member ] +!44 = metadata !{i32 786445, metadata !63, metadata !6, metadata !"__flags", i32 7, i64 32, i64 32, i64 64, i32 0, metadata !16} ; [ DW_TAG_member ] +!45 = metadata !{i32 786445, metadata !63, metadata !6, metadata !"__reserved", i32 7, i64 32, i64 32, i64 96, i32 0, metadata !16} ; [ DW_TAG_member ] +!46 = metadata !{i32 786445, metadata !63, metadata !6, metadata !"__FuncPtr", i32 7, i64 64, i64 64, i64 128, i32 0, metadata !14} ; [ DW_TAG_member ] +!47 = metadata !{i32 786445, metadata !63, metadata !6, metadata !"__descriptor", i32 7, i64 64, i64 64, i64 192, i32 0, metadata !48} ; [ DW_TAG_member ] +!48 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !49} ; [ DW_TAG_pointer_type ] +!49 = metadata !{i32 786451, metadata !63, null, metadata !"__block_descriptor_withcopydispose", i32 7, i32 0, i32 0, i32 0, i32 4, null, null, i32 0} ; [ DW_TAG_structure_type ] +!50 = metadata !{i32 786445, metadata !63, metadata !6, metadata !"block", i32 7, i64 64, i64 64, i64 256, i32 0, metadata !9} ; [ DW_TAG_member ] !51 = metadata !{i32 7, i32 18, metadata !28, null} !52 = metadata !{i32 7, i32 19, metadata !28, null} !53 = metadata !{i32 786688, metadata !28, metadata !"block", metadata !6, i32 5, metadata !9, i32 0, i32 0, i64 1, i64 32} ; [ DW_TAG_auto_variable ] diff --git a/test/DebugInfo/X86/concrete_out_of_line.ll b/test/DebugInfo/X86/concrete_out_of_line.ll index b036b5e..3b9aefc 100644 --- a/test/DebugInfo/X86/concrete_out_of_line.ll +++ b/test/DebugInfo/X86/concrete_out_of_line.ll @@ -34,41 +34,41 @@ declare void @_Z8moz_freePv(i8*) !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !6, metadata !"clang version 3.1 ()", i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !47, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, metadata !59, i32 4, metadata !"clang version 3.1 ()", i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !47, metadata !47, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5, metadata !23, metadata !27, metadata !31} -!5 = metadata !{i32 720942, i32 0, null, metadata !"Release", metadata !"Release", metadata !"_ZN17nsAutoRefCnt7ReleaseEv", metadata !6, i32 14, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32* null, null, metadata !12, metadata !20, i32 14} ; [ DW_TAG_subprogram ] +!5 = metadata !{i32 720942, metadata !6, null, metadata !"Release", metadata !"Release", metadata !"_ZN17nsAutoRefCnt7ReleaseEv", i32 14, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32* null, null, metadata !12, metadata !20, i32 14} ; [ DW_TAG_subprogram ] !6 = metadata !{i32 720937, metadata !59} ; [ DW_TAG_file_type ] !7 = metadata !{i32 720917, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !8 = metadata !{metadata !9, metadata !10} -!9 = metadata !{i32 720932, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!9 = metadata !{i32 720932, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !10 = metadata !{i32 786447, i32 0, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !11} ; [ DW_TAG_pointer_type ] -!11 = metadata !{i32 786451, null, metadata !"nsAutoRefCnt", metadata !6, i32 10, i64 0, i64 0, i32 0, i32 4, i32 0, null, i32 0, i32 0} ; [ DW_TAG_structure_type ] -!12 = metadata !{i32 720942, i32 0, metadata !13, metadata !"Release", metadata !"Release", metadata !"_ZN17nsAutoRefCnt7ReleaseEv", metadata !6, i32 11, metadata !7, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 true, null, null, i32 0, metadata !18, i32 11} ; [ DW_TAG_subprogram ] -!13 = metadata !{i32 720898, null, metadata !"nsAutoRefCnt", metadata !6, i32 10, i64 8, i64 8, i32 0, i32 0, null, metadata !14, i32 0, null, null} ; [ DW_TAG_class_type ] +!11 = metadata !{i32 786451, metadata !59, null, metadata !"nsAutoRefCnt", i32 10, i64 0, i64 0, i32 0, i32 4, i32 0, null, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!12 = metadata !{i32 720942, metadata !6, metadata !13, metadata !"Release", metadata !"Release", metadata !"_ZN17nsAutoRefCnt7ReleaseEv", i32 11, metadata !7, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 true, null, null, i32 0, metadata !18, i32 11} ; [ DW_TAG_subprogram ] +!13 = metadata !{i32 720898, metadata !59, null, metadata !"nsAutoRefCnt", i32 10, i64 8, i64 8, i32 0, i32 0, null, metadata !14, i32 0, null, null} ; [ DW_TAG_class_type ] !14 = metadata !{metadata !12, metadata !15} -!15 = metadata !{i32 720942, i32 0, metadata !13, metadata !"~nsAutoRefCnt", metadata !"~nsAutoRefCnt", metadata !"", metadata !6, i32 12, metadata !16, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 true, null, null, i32 0, metadata !18, i32 12} ; [ DW_TAG_subprogram ] +!15 = metadata !{i32 720942, metadata !6, metadata !13, metadata !"~nsAutoRefCnt", metadata !"~nsAutoRefCnt", metadata !"", i32 12, metadata !16, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 true, null, null, i32 0, metadata !18, i32 12} ; [ DW_TAG_subprogram ] !16 = metadata !{i32 720917, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !17, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !17 = metadata !{null, metadata !10} !18 = metadata !{i32 720932} ; [ DW_TAG_base_type ] !20 = metadata !{metadata !22} !22 = metadata !{i32 786689, metadata !5, metadata !"this", metadata !6, i32 16777230, metadata !10, i32 64, i32 0} ; [ DW_TAG_arg_variable ] -!23 = metadata !{i32 720942, i32 0, null, metadata !"~nsAutoRefCnt", metadata !"~nsAutoRefCnt", metadata !"_ZN17nsAutoRefCntD1Ev", metadata !6, i32 18, metadata !16, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32* null, null, metadata !15, metadata !24, i32 18} ; [ DW_TAG_subprogram ] +!23 = metadata !{i32 720942, metadata !6, null, metadata !"~nsAutoRefCnt", metadata !"~nsAutoRefCnt", metadata !"_ZN17nsAutoRefCntD1Ev", i32 18, metadata !16, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32* null, null, metadata !15, metadata !24, i32 18} ; [ DW_TAG_subprogram ] !24 = metadata !{metadata !26} !26 = metadata !{i32 786689, metadata !23, metadata !"this", metadata !6, i32 16777234, metadata !10, i32 64, i32 0} ; [ DW_TAG_arg_variable ] -!27 = metadata !{i32 720942, i32 0, null, metadata !"~nsAutoRefCnt", metadata !"~nsAutoRefCnt", metadata !"_ZN17nsAutoRefCntD2Ev", metadata !6, i32 18, metadata !16, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32* null, null, metadata !15, metadata !28, i32 18} ; [ DW_TAG_subprogram ] +!27 = metadata !{i32 720942, metadata !6, null, metadata !"~nsAutoRefCnt", metadata !"~nsAutoRefCnt", metadata !"_ZN17nsAutoRefCntD2Ev", i32 18, metadata !16, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32* null, null, metadata !15, metadata !28, i32 18} ; [ DW_TAG_subprogram ] !28 = metadata !{metadata !30} !30 = metadata !{i32 786689, metadata !27, metadata !"this", metadata !6, i32 16777234, metadata !10, i32 64, i32 0} ; [ DW_TAG_arg_variable ] -!31 = metadata !{i32 720942, i32 0, null, metadata !"operator=", metadata !"operator=", metadata !"_ZN12nsAutoRefCntaSEi", metadata !6, i32 4, metadata !32, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, null, null, metadata !36, metadata !43, i32 4} ; [ DW_TAG_subprogram ] +!31 = metadata !{i32 720942, metadata !6, null, metadata !"operator=", metadata !"operator=", metadata !"_ZN12nsAutoRefCntaSEi", i32 4, metadata !32, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, null, null, metadata !36, metadata !43, i32 4} ; [ DW_TAG_subprogram ] !32 = metadata !{i32 720917, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !33, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !33 = metadata !{metadata !9, metadata !34, metadata !9} !34 = metadata !{i32 786447, i32 0, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !35} ; [ DW_TAG_pointer_type ] -!35 = metadata !{i32 786451, null, metadata !"nsAutoRefCnt", metadata !6, i32 2, i64 0, i64 0, i32 0, i32 4, i32 0, null, i32 0, i32 0} ; [ DW_TAG_structure_type ] -!36 = metadata !{i32 720942, i32 0, metadata !37, metadata !"operator=", metadata !"operator=", metadata !"_ZN12nsAutoRefCntaSEi", metadata !6, i32 4, metadata !32, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 true, null, null, i32 0, metadata !18, i32 4} ; [ DW_TAG_subprogram ] -!37 = metadata !{i32 720898, null, metadata !"nsAutoRefCnt", metadata !6, i32 2, i64 32, i64 32, i32 0, i32 0, null, metadata !38, i32 0, null, null} ; [ DW_TAG_class_type ] +!35 = metadata !{i32 786451, metadata !59, null, metadata !"nsAutoRefCnt", i32 2, i64 0, i64 0, i32 0, i32 4, i32 0, null, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!36 = metadata !{i32 720942, metadata !6, metadata !37, metadata !"operator=", metadata !"operator=", metadata !"_ZN12nsAutoRefCntaSEi", i32 4, metadata !32, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 true, null, null, i32 0, metadata !18, i32 4} ; [ DW_TAG_subprogram ] +!37 = metadata !{i32 720898, metadata !59, null, metadata !"nsAutoRefCnt", i32 2, i64 32, i64 32, i32 0, i32 0, null, metadata !38, i32 0, null, null} ; [ DW_TAG_class_type ] !38 = metadata !{metadata !39, metadata !40, metadata !36} -!39 = metadata !{i32 786445, metadata !37, metadata !"mValue", metadata !6, i32 7, i64 32, i64 32, i64 0, i32 0, metadata !9} ; [ DW_TAG_member ] -!40 = metadata !{i32 720942, i32 0, metadata !37, metadata !"nsAutoRefCnt", metadata !"nsAutoRefCnt", metadata !"", metadata !6, i32 3, metadata !41, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 true, null, null, i32 0, metadata !18, i32 3} ; [ DW_TAG_subprogram ] +!39 = metadata !{i32 786445, metadata !59, metadata !37, metadata !"mValue", i32 7, i64 32, i64 32, i64 0, i32 0, metadata !9} ; [ DW_TAG_member ] +!40 = metadata !{i32 720942, metadata !6, metadata !37, metadata !"nsAutoRefCnt", metadata !"nsAutoRefCnt", metadata !"", i32 3, metadata !41, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 true, null, null, i32 0, metadata !18, i32 3} ; [ DW_TAG_subprogram ] !41 = metadata !{i32 720917, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !42, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !42 = metadata !{null, metadata !34} !43 = metadata !{metadata !45, metadata !46} @@ -77,11 +77,11 @@ declare void @_Z8moz_freePv(i8*) !47 = metadata !{metadata !49} !49 = metadata !{i32 720948, i32 0, null, metadata !"mRefCnt", metadata !"mRefCnt", metadata !"", metadata !6, i32 9, metadata !37, i32 0, i32 1, i32* null, null} ; [ DW_TAG_variable ] !50 = metadata !{i32 5, i32 5, metadata !51, metadata !52} -!51 = metadata !{i32 786443, metadata !31, i32 4, i32 29, metadata !6, i32 2} ; [ DW_TAG_lexical_block ] +!51 = metadata !{i32 786443, metadata !6, metadata !31, i32 4, i32 29, i32 2} ; [ DW_TAG_lexical_block ] !52 = metadata !{i32 15, i32 0, metadata !53, null} -!53 = metadata !{i32 786443, metadata !5, i32 14, i32 34, metadata !6, i32 0} ; [ DW_TAG_lexical_block ] +!53 = metadata !{i32 786443, metadata !6, metadata !5, i32 14, i32 34, i32 0} ; [ DW_TAG_lexical_block ] !54 = metadata !{i32 19, i32 3, metadata !55, metadata !56} -!55 = metadata !{i32 786443, metadata !27, i32 18, i32 41, metadata !6, i32 1} ; [ DW_TAG_lexical_block ] +!55 = metadata !{i32 786443, metadata !6, metadata !27, i32 18, i32 41, i32 1} ; [ DW_TAG_lexical_block ] !56 = metadata !{i32 18, i32 41, metadata !23, metadata !52} !57 = metadata !{i32 19, i32 3, metadata !55, metadata !58} !58 = metadata !{i32 18, i32 41, metadata !23, null} diff --git a/test/DebugInfo/X86/dbg-value-inlined-parameter.ll b/test/DebugInfo/X86/dbg-value-inlined-parameter.ll index 4368213..da6423f 100644 --- a/test/DebugInfo/X86/dbg-value-inlined-parameter.ll +++ b/test/DebugInfo/X86/dbg-value-inlined-parameter.ll @@ -22,10 +22,10 @@ entry: tail call void @llvm.dbg.value(metadata !{%struct.S1* %sp}, i64 0, metadata !9), !dbg !20 tail call void @llvm.dbg.value(metadata !{i32 %nums}, i64 0, metadata !18), !dbg !21 %tmp2 = getelementptr inbounds %struct.S1* %sp, i64 0, i32 1, !dbg !22 - store i32 %nums, i32* %tmp2, align 4, !dbg !22, !tbaa !24 + store i32 %nums, i32* %tmp2, align 4, !dbg !22 %call = tail call float* @bar(i32 %nums) nounwind optsize, !dbg !27 %tmp5 = getelementptr inbounds %struct.S1* %sp, i64 0, i32 0, !dbg !27 - store float* %call, float** %tmp5, align 8, !dbg !27, !tbaa !28 + store float* %call, float** %tmp5, align 8, !dbg !27 %cmp = icmp ne float* %call, null, !dbg !29 %cond = zext i1 %cmp to i32, !dbg !29 ret i32 %cond, !dbg !29 @@ -37,9 +37,9 @@ define void @foobar() nounwind optsize ssp { entry: tail call void @llvm.dbg.value(metadata !30, i64 0, metadata !9) nounwind, !dbg !31 tail call void @llvm.dbg.value(metadata !34, i64 0, metadata !18) nounwind, !dbg !35 - store i32 1, i32* getelementptr inbounds (%struct.S1* @p, i64 0, i32 1), align 8, !dbg !36, !tbaa !24 + store i32 1, i32* getelementptr inbounds (%struct.S1* @p, i64 0, i32 1), align 8, !dbg !36 %call.i = tail call float* @bar(i32 1) nounwind optsize, !dbg !37 - store float* %call.i, float** getelementptr inbounds (%struct.S1* @p, i64 0, i32 0), align 8, !dbg !37, !tbaa !28 + store float* %call.i, float** getelementptr inbounds (%struct.S1* @p, i64 0, i32 0), align 8, !dbg !37 ret void, !dbg !38 } @@ -47,40 +47,36 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!2} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"", metadata !1, i32 8, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (%struct.S1*, i32)* @foo, null, null, metadata !41, i32 8} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786478, metadata !1, metadata !1, metadata !"foo", metadata !"foo", metadata !"", i32 8, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i32 (%struct.S1*, i32)* @foo, null, null, metadata !41, i32 8} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786473, metadata !42} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 12, metadata !1, metadata !"clang version 2.9 (trunk 125693)", i1 true, metadata !"", i32 0, null, null, metadata !39, metadata !40, null} ; [ DW_TAG_compile_unit ] -!3 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!2 = metadata !{i32 786449, metadata !42, i32 12, metadata !"clang version 2.9 (trunk 125693)", i1 true, metadata !"", i32 0, null, null, metadata !39, metadata !40, metadata !40, null} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 786453, metadata !42, metadata !1, metadata !"", i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !4 = metadata !{metadata !5} -!5 = metadata !{i32 786468, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 786478, i32 0, metadata !1, metadata !"foobar", metadata !"foobar", metadata !"", metadata !1, i32 15, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 true, void ()* @foobar} ; [ DW_TAG_subprogram ] -!7 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!5 = metadata !{i32 786468, null, metadata !2, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!6 = metadata !{i32 786478, metadata !1, metadata !1, metadata !"foobar", metadata !"foobar", metadata !"", i32 15, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 true, void ()* @foobar} ; [ DW_TAG_subprogram ] +!7 = metadata !{i32 786453, metadata !42, metadata !1, metadata !"", i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !8 = metadata !{null} !9 = metadata !{i32 786689, metadata !0, metadata !"sp", metadata !1, i32 7, metadata !10, i32 0, metadata !32} ; [ DW_TAG_arg_variable ] -!10 = metadata !{i32 786447, metadata !2, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !11} ; [ DW_TAG_pointer_type ] -!11 = metadata !{i32 786454, metadata !2, metadata !"S1", metadata !1, i32 4, i64 0, i64 0, i64 0, i32 0, metadata !12} ; [ DW_TAG_typedef ] -!12 = metadata !{i32 786451, metadata !2, metadata !"S1", metadata !1, i32 1, i64 128, i64 64, i32 0, i32 0, i32 0, metadata !13, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!10 = metadata !{i32 786447, null, metadata !2, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !11} ; [ DW_TAG_pointer_type ] +!11 = metadata !{i32 786454, metadata !42, metadata !2, metadata !"S1", i32 4, i64 0, i64 0, i64 0, i32 0, metadata !12} ; [ DW_TAG_typedef ] +!12 = metadata !{i32 786451, metadata !42, metadata !2, metadata !"S1", i32 1, i64 128, i64 64, i32 0, i32 0, i32 0, metadata !13, i32 0, i32 0} ; [ DW_TAG_structure_type ] !13 = metadata !{metadata !14, metadata !17} -!14 = metadata !{i32 786445, metadata !1, metadata !"m", metadata !1, i32 2, i64 64, i64 64, i64 0, i32 0, metadata !15} ; [ DW_TAG_member ] -!15 = metadata !{i32 786447, metadata !2, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !16} ; [ DW_TAG_pointer_type ] -!16 = metadata !{i32 786468, metadata !2, metadata !"float", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] -!17 = metadata !{i32 786445, metadata !1, metadata !"nums", metadata !1, i32 3, i64 32, i64 32, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] +!14 = metadata !{i32 786445, metadata !42, metadata !1, metadata !"m", i32 2, i64 64, i64 64, i64 0, i32 0, metadata !15} ; [ DW_TAG_member ] +!15 = metadata !{i32 786447, null, metadata !2, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !16} ; [ DW_TAG_pointer_type ] +!16 = metadata !{i32 786468, null, metadata !2, metadata !"float", i32 0, i64 32, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] +!17 = metadata !{i32 786445, metadata !42, metadata !1, metadata !"nums", i32 3, i64 32, i64 32, i64 64, i32 0, metadata !5} ; [ DW_TAG_member ] !18 = metadata !{i32 786689, metadata !0, metadata !"nums", metadata !1, i32 7, metadata !5, i32 0, metadata !32} ; [ DW_TAG_arg_variable ] !19 = metadata !{i32 786484, i32 0, metadata !2, metadata !"p", metadata !"p", metadata !"", metadata !1, i32 14, metadata !11, i32 0, i32 1, %struct.S1* @p, null} ; [ DW_TAG_variable ] !20 = metadata !{i32 7, i32 13, metadata !0, null} !21 = metadata !{i32 7, i32 21, metadata !0, null} !22 = metadata !{i32 9, i32 3, metadata !23, null} -!23 = metadata !{i32 786443, metadata !0, i32 8, i32 1, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] -!24 = metadata !{metadata !"int", metadata !25} -!25 = metadata !{metadata !"omnipotent char", metadata !26} -!26 = metadata !{metadata !"Simple C/C++ TBAA", null} +!23 = metadata !{i32 786443, metadata !1, metadata !0, i32 8, i32 1, i32 0} ; [ DW_TAG_lexical_block ] !27 = metadata !{i32 10, i32 3, metadata !23, null} -!28 = metadata !{metadata !"any pointer", metadata !25} !29 = metadata !{i32 11, i32 3, metadata !23, null} !30 = metadata !{%struct.S1* @p} !31 = metadata !{i32 7, i32 13, metadata !0, metadata !32} !32 = metadata !{i32 16, i32 3, metadata !33, null} -!33 = metadata !{i32 786443, metadata !6, i32 15, i32 15, metadata !1, i32 1} ; [ DW_TAG_lexical_block ] +!33 = metadata !{i32 786443, metadata !1, metadata !6, i32 15, i32 15, i32 1} ; [ DW_TAG_lexical_block ] !34 = metadata !{i32 1} !35 = metadata !{i32 7, i32 21, metadata !0, metadata !32} !36 = metadata !{i32 9, i32 3, metadata !23, metadata !32} diff --git a/test/DebugInfo/debug-info-block-captured-self.ll b/test/DebugInfo/X86/debug-info-block-captured-self.ll index 2a5f324..7e318f6 100644 --- a/test/DebugInfo/debug-info-block-captured-self.ll +++ b/test/DebugInfo/X86/debug-info-block-captured-self.ll @@ -77,26 +77,26 @@ define internal void @"__24-[Main initWithContext:]_block_invoke_2"(i8* %.block_ } !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 16, metadata !1, metadata !"clang version 3.3 ", i1 false, metadata !"", i32 2, metadata !2, metadata !4, metadata !23, metadata !15, metadata !""} ; [ DW_TAG_compile_unit ] [llvm/tools/clang/test/CodeGenObjC/debug-info-block-captured-self.m] [DW_LANG_ObjC] +!0 = metadata !{i32 786449, i32 16, metadata !1, metadata !"clang version 3.3 ", i1 false, metadata !"", i32 2, metadata !2, metadata !4, metadata !23, metadata !15, metadata !15, metadata !""} ; [ DW_TAG_compile_unit ] [llvm/tools/clang/test/CodeGenObjC/debug-info-block-captured-self.m] [DW_LANG_ObjC] !1 = metadata !{i32 786473, metadata !107} ; [ DW_TAG_file_type ] !2 = metadata !{metadata !3} -!3 = metadata !{i32 786436, null, metadata !"", metadata !1, i32 20, i64 32, i64 32, i32 0, i32 0, null, metadata !4, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] [line 20, size 32, align 32, offset 0] [from ] +!3 = metadata !{i32 786436, metadata !107, null, metadata !"", i32 20, i64 32, i64 32, i32 0, i32 0, null, metadata !4, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] [line 20, size 32, align 32, offset 0] [from ] !4 = metadata !{} !15 = metadata !{i32 0} !23 = metadata !{metadata !38, metadata !42} -!27 = metadata !{i32 786454, null, metadata !"id", metadata !1, i32 31, i64 0, i64 0, i64 0, i32 0, metadata !28} ; [ DW_TAG_typedef ] [id] [line 31, size 0, align 0, offset 0] [from ] -!28 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !29} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from objc_object] -!29 = metadata !{i32 786451, null, metadata !"objc_object", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, null, metadata !30, i32 0, null, null} ; [ DW_TAG_structure_type ] [objc_object] [line 0, size 0, align 0, offset 0] [from ] +!27 = metadata !{i32 786454, metadata !107, null, metadata !"id", i32 31, i64 0, i64 0, i64 0, i32 0, metadata !28} ; [ DW_TAG_typedef ] [id] [line 31, size 0, align 0, offset 0] [from ] +!28 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !29} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from objc_object] +!29 = metadata !{i32 786451, metadata !107, null, metadata !"objc_object", i32 0, i64 0, i64 0, i32 0, i32 0, null, metadata !30, i32 0, null, null} ; [ DW_TAG_structure_type ] [objc_object] [line 0, size 0, align 0, offset 0] [from ] !30 = metadata !{metadata !31} -!31 = metadata !{i32 786445, metadata !29, metadata !"isa", metadata !1, i32 0, i64 64, i64 0, i64 0, i32 0, metadata !32} ; [ DW_TAG_member ] [isa] [line 0, size 64, align 0, offset 0] [from ] -!32 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 0, i64 0, i32 0, metadata !33} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 0, offset 0] [from objc_class] -!33 = metadata !{i32 786451, null, metadata !"objc_class", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 4, null, null, i32 0} ; [ DW_TAG_structure_type ] [objc_class] [line 0, size 0, align 0, offset 0] [fwd] [from ] -!34 = metadata !{i32 786451, i32 0, metadata !"Main", metadata !1, i32 23, i64 0, i64 0, i32 0, i32 1092, i32 0, i32 0, i32 16} ; [ DW_TAG_structure_type ] [Main] [line 23, size 0, align 0, offset 0] [artificial] [fwd] [from ] -!38 = metadata !{i32 786478, i32 0, metadata !1, metadata !"__24-[Main initWithContext:]_block_invoke", metadata !"__24-[Main initWithContext:]_block_invoke", metadata !"", metadata !1, i32 33, metadata !39, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (i8*, i8*)* @"__24-[Main initWithContext:]_block_invoke", null, null, metadata !15, i32 33} ; [ DW_TAG_subprogram ] [line 33] [local] [def] [__24-[Main initWithContext:]_block_invoke] -!39 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !40, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!31 = metadata !{i32 786445, metadata !107, metadata !29, metadata !"isa", i32 0, i64 64, i64 0, i64 0, i32 0, metadata !32} ; [ DW_TAG_member ] [isa] [line 0, size 64, align 0, offset 0] [from ] +!32 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 0, i64 0, i32 0, metadata !33} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 0, offset 0] [from objc_class] +!33 = metadata !{i32 786451, metadata !107, null, metadata !"objc_class", i32 0, i64 0, i64 0, i32 0, i32 4, null, null, i32 0} ; [ DW_TAG_structure_type ] [objc_class] [line 0, size 0, align 0, offset 0] [fwd] [from ] +!34 = metadata !{i32 786451, metadata !107, null, metadata !"Main", i32 23, i64 0, i64 0, i32 0, i32 1092, i32 0, i32 0, i32 16} ; [ DW_TAG_structure_type ] [Main] [line 23, size 0, align 0, offset 0] [artificial] [fwd] [from ] +!38 = metadata !{i32 786478, metadata !1, metadata !1, metadata !"__24-[Main initWithContext:]_block_invoke", metadata !"__24-[Main initWithContext:]_block_invoke", metadata !"", i32 33, metadata !39, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (i8*, i8*)* @"__24-[Main initWithContext:]_block_invoke", null, null, metadata !15, i32 33} ; [ DW_TAG_subprogram ] [line 33] [local] [def] [__24-[Main initWithContext:]_block_invoke] +!39 = metadata !{i32 786453, null, null, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !40, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !40 = metadata !{null, metadata !41, metadata !27} -!41 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from ] -!42 = metadata !{i32 786478, i32 0, metadata !1, metadata !"__24-[Main initWithContext:]_block_invoke_2", metadata !"__24-[Main initWithContext:]_block_invoke_2", metadata !"", metadata !1, i32 35, metadata !39, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (i8*, i8*)* @"__24-[Main initWithContext:]_block_invoke_2", null, null, metadata !15, i32 35} ; [ DW_TAG_subprogram ] [line 35] [local] [def] [__24-[Main initWithContext:]_block_invoke_2] +!41 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from ] +!42 = metadata !{i32 786478, metadata !1, metadata !1, metadata !"__24-[Main initWithContext:]_block_invoke_2", metadata !"__24-[Main initWithContext:]_block_invoke_2", metadata !"", i32 35, metadata !39, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (i8*, i8*)* @"__24-[Main initWithContext:]_block_invoke_2", null, null, metadata !15, i32 35} ; [ DW_TAG_subprogram ] [line 35] [local] [def] [__24-[Main initWithContext:]_block_invoke_2] !84 = metadata !{i32 33, i32 0, metadata !38, null} !86 = metadata !{i32 786688, metadata !38, metadata !"self", metadata !1, i32 41, metadata !34, i32 0, i32 0, i64 1, i64 32} ; [ DW_TAG_auto_variable ] [self] [line 41] !87 = metadata !{i32 41, i32 0, metadata !38, null} diff --git a/test/DebugInfo/X86/debug-info-blocks.ll b/test/DebugInfo/X86/debug-info-blocks.ll new file mode 100644 index 0000000..ae95033 --- /dev/null +++ b/test/DebugInfo/X86/debug-info-blocks.ll @@ -0,0 +1,372 @@ +; RUN: llc -mtriple x86_64-apple-darwin -filetype=obj -o %t.o < %s +; RUN: llvm-dwarfdump -debug-dump=info %t.o | FileCheck %s + +; Generated from llvm/tools/clang/test/CodeGenObjC/debug-info-blocks.m +; rdar://problem/9279956 +; test that the DW_AT_location of self is at ( fbreg +{{[0-9]+}}, deref, +{{[0-9]+}} ) + +; CHECK: DW_AT_name{{.*}}_block_invoke +; CHECK-NOT: DW_TAG_subprogram +; CHECK: DW_TAG_formal_parameter +; CHECK-NOT: DW_TAG +; CHECK: .block_descriptor +; CHECK-NOT: DW_TAG +; CHECK: DW_AT_location +; CHECK-NOT: DW_TAG_subprogram +; CHECK: DW_TAG_variable +; CHECK-NEXT: DW_AT_name{{.*}}"self" +; CHECK-NOT: DW_TAG +; CHECK: DW_AT_type{{.*}}{[[APTR:.*]]} +; CHECK-NOT: DW_TAG +; CHECK: DW_AT_artificial +; CHECK-NOT: DW_TAG +; 0x06 = DW_OP_deref +; 0x23 = DW_OP_uconst +; 0x91 = DW_OP_fbreg +; CHECK: DW_AT_location{{.*}}91 {{[0-9]+}} 06 23 {{[0-9]+}} ) +; CHECK: DW_TAG_structure_type +; CHECK: [[A:.*]]: DW_TAG_structure_type +; CHECK-NEXT: DW_AT_APPLE_objc_complete_type +; CHECK-NEXT: DW_AT_name{{.*}}"A" +; CHECK: [[APTR]]: DW_TAG_pointer_type [5] +; CHECK-NEXT: {[[A]]} + + +; ModuleID = 'llvm/tools/clang/test/CodeGenObjC/debug-info-blocks.m' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-darwin" + +%0 = type opaque +%1 = type opaque +%struct._class_t = type { %struct._class_t*, %struct._class_t*, %struct._objc_cache*, i8* (i8*, i8*)**, %struct._class_ro_t* } +%struct._objc_cache = type opaque +%struct._class_ro_t = type { i32, i32, i32, i8*, i8*, %struct.__method_list_t*, %struct._objc_protocol_list*, %struct._ivar_list_t*, i8*, %struct._prop_list_t* } +%struct.__method_list_t = type { i32, i32, [0 x %struct._objc_method] } +%struct._objc_method = type { i8*, i8*, i8* } +%struct._objc_protocol_list = type { i64, [0 x %struct._protocol_t*] } +%struct._protocol_t = type { i8*, i8*, %struct._objc_protocol_list*, %struct.__method_list_t*, %struct.__method_list_t*, %struct.__method_list_t*, %struct.__method_list_t*, %struct._prop_list_t*, i32, i32, i8** } +%struct._prop_list_t = type { i32, i32, [0 x %struct._prop_t] } +%struct._prop_t = type { i8*, i8* } +%struct._ivar_list_t = type { i32, i32, [0 x %struct._ivar_t] } +%struct._ivar_t = type { i64*, i8*, i8*, i32, i32 } +%struct._message_ref_t = type { i8*, i8* } +%struct._objc_super = type { i8*, i8* } +%struct.__block_descriptor = type { i64, i64 } +%struct.__block_literal_generic = type { i8*, i32, i32, i8*, %struct.__block_descriptor* } + +@"OBJC_CLASS_$_A" = global %struct._class_t { %struct._class_t* @"OBJC_METACLASS_$_A", %struct._class_t* @"OBJC_CLASS_$_NSObject", %struct._objc_cache* @_objc_empty_cache, i8* (i8*, i8*)** @_objc_empty_vtable, %struct._class_ro_t* @"\01l_OBJC_CLASS_RO_$_A" }, section "__DATA, __objc_data", align 8 +@"\01L_OBJC_CLASSLIST_SUP_REFS_$_" = internal global %struct._class_t* @"OBJC_CLASS_$_A", section "__DATA, __objc_superrefs, regular, no_dead_strip", align 8 +@"\01L_OBJC_METH_VAR_NAME_" = internal global [5 x i8] c"init\00", section "__TEXT,__objc_methname,cstring_literals", align 1 +@"\01L_OBJC_SELECTOR_REFERENCES_" = internal externally_initialized global i8* getelementptr inbounds ([5 x i8]* @"\01L_OBJC_METH_VAR_NAME_", i32 0, i32 0), section "__DATA, __objc_selrefs, literal_pointers, no_dead_strip" +@"OBJC_CLASS_$_NSMutableDictionary" = external global %struct._class_t +@"\01L_OBJC_CLASSLIST_REFERENCES_$_" = internal global %struct._class_t* @"OBJC_CLASS_$_NSMutableDictionary", section "__DATA, __objc_classrefs, regular, no_dead_strip", align 8 +@"\01L_OBJC_METH_VAR_NAME_1" = internal global [6 x i8] c"alloc\00", section "__TEXT,__objc_methname,cstring_literals", align 1 +@"\01l_objc_msgSend_fixup_alloc" = weak hidden global { i8* (i8*, %struct._message_ref_t*, ...)*, i8* } { i8* (i8*, %struct._message_ref_t*, ...)* @objc_msgSend_fixup, i8* getelementptr inbounds ([6 x i8]* @"\01L_OBJC_METH_VAR_NAME_1", i32 0, i32 0) }, section "__DATA, __objc_msgrefs, coalesced", align 16 +@"\01L_OBJC_METH_VAR_NAME_2" = internal global [6 x i8] c"count\00", section "__TEXT,__objc_methname,cstring_literals", align 1 +@"\01l_objc_msgSend_fixup_count" = weak hidden global { i8* (i8*, %struct._message_ref_t*, ...)*, i8* } { i8* (i8*, %struct._message_ref_t*, ...)* @objc_msgSend_fixup, i8* getelementptr inbounds ([6 x i8]* @"\01L_OBJC_METH_VAR_NAME_2", i32 0, i32 0) }, section "__DATA, __objc_msgrefs, coalesced", align 16 +@"OBJC_IVAR_$_A.ivar" = global i64 0, section "__DATA, __objc_ivar", align 8 +@_NSConcreteStackBlock = external global i8* +@.str = private unnamed_addr constant [6 x i8] c"v8@?0\00", align 1 +@__block_descriptor_tmp = internal constant { i64, i64, i8*, i8*, i8*, i64 } { i64 0, i64 40, i8* bitcast (void (i8*, i8*)* @__copy_helper_block_ to i8*), i8* bitcast (void (i8*)* @__destroy_helper_block_ to i8*), i8* getelementptr inbounds ([6 x i8]* @.str, i32 0, i32 0), i64 256 } +@_objc_empty_cache = external global %struct._objc_cache +@_objc_empty_vtable = external global i8* (i8*, i8*)* +@"OBJC_METACLASS_$_NSObject" = external global %struct._class_t +@"\01L_OBJC_CLASS_NAME_" = internal global [2 x i8] c"A\00", section "__TEXT,__objc_classname,cstring_literals", align 1 +@"\01l_OBJC_METACLASS_RO_$_A" = internal global %struct._class_ro_t { i32 1, i32 40, i32 40, i8* null, i8* getelementptr inbounds ([2 x i8]* @"\01L_OBJC_CLASS_NAME_", i32 0, i32 0), %struct.__method_list_t* null, %struct._objc_protocol_list* null, %struct._ivar_list_t* null, i8* null, %struct._prop_list_t* null }, section "__DATA, __objc_const", align 8 +@"OBJC_METACLASS_$_A" = global %struct._class_t { %struct._class_t* @"OBJC_METACLASS_$_NSObject", %struct._class_t* @"OBJC_METACLASS_$_NSObject", %struct._objc_cache* @_objc_empty_cache, i8* (i8*, i8*)** @_objc_empty_vtable, %struct._class_ro_t* @"\01l_OBJC_METACLASS_RO_$_A" }, section "__DATA, __objc_data", align 8 +@"OBJC_CLASS_$_NSObject" = external global %struct._class_t +@"\01L_OBJC_METH_VAR_TYPE_" = internal global [8 x i8] c"@16@0:8\00", section "__TEXT,__objc_methtype,cstring_literals", align 1 +@"\01l_OBJC_$_INSTANCE_METHODS_A" = internal global { i32, i32, [1 x %struct._objc_method] } { i32 24, i32 1, [1 x %struct._objc_method] [%struct._objc_method { i8* getelementptr inbounds ([5 x i8]* @"\01L_OBJC_METH_VAR_NAME_", i32 0, i32 0), i8* getelementptr inbounds ([8 x i8]* @"\01L_OBJC_METH_VAR_TYPE_", i32 0, i32 0), i8* bitcast (i8* (%0*, i8*)* @"\01-[A init]" to i8*) }] }, section "__DATA, __objc_const", align 8 +@"\01L_OBJC_METH_VAR_NAME_3" = internal global [5 x i8] c"ivar\00", section "__TEXT,__objc_methname,cstring_literals", align 1 +@"\01L_OBJC_METH_VAR_TYPE_4" = internal global [2 x i8] c"i\00", section "__TEXT,__objc_methtype,cstring_literals", align 1 +@"\01l_OBJC_$_INSTANCE_VARIABLES_A" = internal global { i32, i32, [1 x %struct._ivar_t] } { i32 32, i32 1, [1 x %struct._ivar_t] [%struct._ivar_t { i64* @"OBJC_IVAR_$_A.ivar", i8* getelementptr inbounds ([5 x i8]* @"\01L_OBJC_METH_VAR_NAME_3", i32 0, i32 0), i8* getelementptr inbounds ([2 x i8]* @"\01L_OBJC_METH_VAR_TYPE_4", i32 0, i32 0), i32 2, i32 4 }] }, section "__DATA, __objc_const", align 8 +@"\01l_OBJC_CLASS_RO_$_A" = internal global %struct._class_ro_t { i32 0, i32 0, i32 4, i8* null, i8* getelementptr inbounds ([2 x i8]* @"\01L_OBJC_CLASS_NAME_", i32 0, i32 0), %struct.__method_list_t* bitcast ({ i32, i32, [1 x %struct._objc_method] }* @"\01l_OBJC_$_INSTANCE_METHODS_A" to %struct.__method_list_t*), %struct._objc_protocol_list* null, %struct._ivar_list_t* bitcast ({ i32, i32, [1 x %struct._ivar_t] }* @"\01l_OBJC_$_INSTANCE_VARIABLES_A" to %struct._ivar_list_t*), i8* null, %struct._prop_list_t* null }, section "__DATA, __objc_const", align 8 +@"\01L_OBJC_CLASSLIST_REFERENCES_$_5" = internal global %struct._class_t* @"OBJC_CLASS_$_A", section "__DATA, __objc_classrefs, regular, no_dead_strip", align 8 +@"\01L_OBJC_LABEL_CLASS_$" = internal global [1 x i8*] [i8* bitcast (%struct._class_t* @"OBJC_CLASS_$_A" to i8*)], section "__DATA, __objc_classlist, regular, no_dead_strip", align 8 +@llvm.used = appending global [14 x i8*] [i8* bitcast (%struct._class_t** @"\01L_OBJC_CLASSLIST_SUP_REFS_$_" to i8*), i8* getelementptr inbounds ([5 x i8]* @"\01L_OBJC_METH_VAR_NAME_", i32 0, i32 0), i8* bitcast (i8** @"\01L_OBJC_SELECTOR_REFERENCES_" to i8*), i8* bitcast (%struct._class_t** @"\01L_OBJC_CLASSLIST_REFERENCES_$_" to i8*), i8* getelementptr inbounds ([6 x i8]* @"\01L_OBJC_METH_VAR_NAME_1", i32 0, i32 0), i8* getelementptr inbounds ([6 x i8]* @"\01L_OBJC_METH_VAR_NAME_2", i32 0, i32 0), i8* getelementptr inbounds ([2 x i8]* @"\01L_OBJC_CLASS_NAME_", i32 0, i32 0), i8* getelementptr inbounds ([8 x i8]* @"\01L_OBJC_METH_VAR_TYPE_", i32 0, i32 0), i8* bitcast ({ i32, i32, [1 x %struct._objc_method] }* @"\01l_OBJC_$_INSTANCE_METHODS_A" to i8*), i8* getelementptr inbounds ([5 x i8]* @"\01L_OBJC_METH_VAR_NAME_3", i32 0, i32 0), i8* getelementptr inbounds ([2 x i8]* @"\01L_OBJC_METH_VAR_TYPE_4", i32 0, i32 0), i8* bitcast ({ i32, i32, [1 x %struct._ivar_t] }* @"\01l_OBJC_$_INSTANCE_VARIABLES_A" to i8*), i8* bitcast (%struct._class_t** @"\01L_OBJC_CLASSLIST_REFERENCES_$_5" to i8*), i8* bitcast ([1 x i8*]* @"\01L_OBJC_LABEL_CLASS_$" to i8*)], section "llvm.metadata" + +define internal i8* @"\01-[A init]"(%0* %self, i8* %_cmd) #0 { + %1 = alloca %0*, align 8 + %2 = alloca i8*, align 8 + %3 = alloca %struct._objc_super + %4 = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>, align 8 + store %0* %self, %0** %1, align 8 + call void @llvm.dbg.declare(metadata !{%0** %1}, metadata !60), !dbg !62 + store i8* %_cmd, i8** %2, align 8 + call void @llvm.dbg.declare(metadata !{i8** %2}, metadata !63), !dbg !62 + %5 = load %0** %1, !dbg !65 + %6 = bitcast %0* %5 to i8*, !dbg !65 + %7 = getelementptr inbounds %struct._objc_super* %3, i32 0, i32 0, !dbg !65 + store i8* %6, i8** %7, !dbg !65 + %8 = load %struct._class_t** @"\01L_OBJC_CLASSLIST_SUP_REFS_$_", !dbg !65 + %9 = bitcast %struct._class_t* %8 to i8*, !dbg !65 + %10 = getelementptr inbounds %struct._objc_super* %3, i32 0, i32 1, !dbg !65 + store i8* %9, i8** %10, !dbg !65 + %11 = load i8** @"\01L_OBJC_SELECTOR_REFERENCES_", !dbg !65, !invariant.load !67 + %12 = call i8* bitcast (i8* (%struct._objc_super*, i8*, ...)* @objc_msgSendSuper2 to i8* (%struct._objc_super*, i8*)*)(%struct._objc_super* %3, i8* %11), !dbg !65 + %13 = bitcast i8* %12 to %0*, !dbg !65 + store %0* %13, %0** %1, align 8, !dbg !65 + %14 = icmp ne %0* %13, null, !dbg !65 + br i1 %14, label %15, label %24, !dbg !65 + +; <label>:15 ; preds = %0 + %16 = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %4, i32 0, i32 0, !dbg !68 + store i8* bitcast (i8** @_NSConcreteStackBlock to i8*), i8** %16, !dbg !68 + %17 = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %4, i32 0, i32 1, !dbg !68 + store i32 -1040187392, i32* %17, !dbg !68 + %18 = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %4, i32 0, i32 2, !dbg !68 + store i32 0, i32* %18, !dbg !68 + %19 = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %4, i32 0, i32 3, !dbg !68 + store i8* bitcast (void (i8*)* @"__9-[A init]_block_invoke" to i8*), i8** %19, !dbg !68 + %20 = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %4, i32 0, i32 4, !dbg !68 + store %struct.__block_descriptor* bitcast ({ i64, i64, i8*, i8*, i8*, i64 }* @__block_descriptor_tmp to %struct.__block_descriptor*), %struct.__block_descriptor** %20, !dbg !68 + %21 = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %4, i32 0, i32 5, !dbg !68 + %22 = load %0** %1, align 8, !dbg !68 + store %0* %22, %0** %21, align 8, !dbg !68 + %23 = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %4 to void ()*, !dbg !68 + call void @run(void ()* %23), !dbg !68 + br label %24, !dbg !70 + +; <label>:24 ; preds = %15, %0 + %25 = load %0** %1, align 8, !dbg !71 + %26 = bitcast %0* %25 to i8*, !dbg !71 + ret i8* %26, !dbg !71 +} + +declare void @llvm.dbg.declare(metadata, metadata) #1 + +declare i8* @objc_msgSendSuper2(%struct._objc_super*, i8*, ...) + +define internal void @run(void ()* %block) #0 { + %1 = alloca void ()*, align 8 + store void ()* %block, void ()** %1, align 8 + call void @llvm.dbg.declare(metadata !{void ()** %1}, metadata !72), !dbg !73 + %2 = load void ()** %1, align 8, !dbg !74 + %3 = bitcast void ()* %2 to %struct.__block_literal_generic*, !dbg !74 + %4 = getelementptr inbounds %struct.__block_literal_generic* %3, i32 0, i32 3, !dbg !74 + %5 = bitcast %struct.__block_literal_generic* %3 to i8*, !dbg !74 + %6 = load i8** %4, !dbg !74 + %7 = bitcast i8* %6 to void (i8*)*, !dbg !74 + call void %7(i8* %5), !dbg !74 + ret void, !dbg !75 +} + +define internal void @"__9-[A init]_block_invoke"(i8* %.block_descriptor) #0 { + %1 = alloca i8*, align 8 + %2 = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>*, align 8 + %d = alloca %1*, align 8 + store i8* %.block_descriptor, i8** %1, align 8 + %3 = load i8** %1 + call void @llvm.dbg.value(metadata !{i8* %3}, i64 0, metadata !76), !dbg !88 + call void @llvm.dbg.declare(metadata !{i8* %.block_descriptor}, metadata !76), !dbg !88 + %4 = bitcast i8* %.block_descriptor to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>*, !dbg !88 + store <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %4, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>** %2, align 8, !dbg !88 + %5 = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %4, i32 0, i32 5, !dbg !88 + call void @llvm.dbg.declare(metadata !{<{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>** %2}, metadata !89), !dbg !90 + call void @llvm.dbg.declare(metadata !{%1** %d}, metadata !91), !dbg !100 + %6 = load %struct._class_t** @"\01L_OBJC_CLASSLIST_REFERENCES_$_", !dbg !100 + %7 = bitcast %struct._class_t* %6 to i8*, !dbg !100 + %8 = load i8** getelementptr inbounds (%struct._message_ref_t* bitcast ({ i8* (i8*, %struct._message_ref_t*, ...)*, i8* }* @"\01l_objc_msgSend_fixup_alloc" to %struct._message_ref_t*), i32 0, i32 0), !dbg !100 + %9 = bitcast i8* %8 to i8* (i8*, i8*)*, !dbg !100 + %10 = call i8* %9(i8* %7, i8* bitcast ({ i8* (i8*, %struct._message_ref_t*, ...)*, i8* }* @"\01l_objc_msgSend_fixup_alloc" to i8*)), !dbg !100 + %11 = bitcast i8* %10 to %1*, !dbg !100 + %12 = load i8** @"\01L_OBJC_SELECTOR_REFERENCES_", !dbg !100, !invariant.load !67 + %13 = bitcast %1* %11 to i8*, !dbg !100 + %14 = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* %13, i8* %12), !dbg !100 + %15 = bitcast i8* %14 to %1*, !dbg !100 + store %1* %15, %1** %d, align 8, !dbg !100 + %16 = load %1** %d, align 8, !dbg !101 + %17 = bitcast %1* %16 to i8*, !dbg !101 + %18 = load i8** getelementptr inbounds (%struct._message_ref_t* bitcast ({ i8* (i8*, %struct._message_ref_t*, ...)*, i8* }* @"\01l_objc_msgSend_fixup_count" to %struct._message_ref_t*), i32 0, i32 0), !dbg !101 + %19 = bitcast i8* %18 to i32 (i8*, i8*)*, !dbg !101 + %20 = call i32 %19(i8* %17, i8* bitcast ({ i8* (i8*, %struct._message_ref_t*, ...)*, i8* }* @"\01l_objc_msgSend_fixup_count" to i8*)), !dbg !101 + %21 = add nsw i32 42, %20, !dbg !101 + %22 = load %0** %5, align 8, !dbg !101 + %23 = load i64* @"OBJC_IVAR_$_A.ivar", !dbg !101, !invariant.load !67 + %24 = bitcast %0* %22 to i8*, !dbg !101 + %25 = getelementptr inbounds i8* %24, i64 %23, !dbg !101 + %26 = bitcast i8* %25 to i32*, !dbg !101 + store i32 %21, i32* %26, align 4, !dbg !101 + ret void, !dbg !90 +} + +declare void @llvm.dbg.value(metadata, i64, metadata) #1 + +declare i8* @objc_msgSend_fixup(i8*, %struct._message_ref_t*, ...) + +declare i8* @objc_msgSend(i8*, i8*, ...) #2 + +define internal void @__copy_helper_block_(i8*, i8*) { + %3 = alloca i8*, align 8 + %4 = alloca i8*, align 8 + store i8* %0, i8** %3, align 8 + call void @llvm.dbg.declare(metadata !{i8** %3}, metadata !102), !dbg !103 + store i8* %1, i8** %4, align 8 + call void @llvm.dbg.declare(metadata !{i8** %4}, metadata !104), !dbg !103 + %5 = load i8** %4, !dbg !103 + %6 = bitcast i8* %5 to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>*, !dbg !103 + %7 = load i8** %3, !dbg !103 + %8 = bitcast i8* %7 to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>*, !dbg !103 + %9 = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %6, i32 0, i32 5, !dbg !103 + %10 = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %8, i32 0, i32 5, !dbg !103 + %11 = load %0** %9, !dbg !103 + %12 = bitcast %0* %11 to i8*, !dbg !103 + %13 = bitcast %0** %10 to i8*, !dbg !103 + call void @_Block_object_assign(i8* %13, i8* %12, i32 3) #3, !dbg !103 + ret void, !dbg !103 +} + +declare void @_Block_object_assign(i8*, i8*, i32) + +define internal void @__destroy_helper_block_(i8*) { + %2 = alloca i8*, align 8 + store i8* %0, i8** %2, align 8 + call void @llvm.dbg.declare(metadata !{i8** %2}, metadata !105), !dbg !106 + %3 = load i8** %2, !dbg !106 + %4 = bitcast i8* %3 to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>*, !dbg !106 + %5 = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, %0* }>* %4, i32 0, i32 5, !dbg !106 + %6 = load %0** %5, !dbg !106 + %7 = bitcast %0* %6 to i8*, !dbg !106 + call void @_Block_object_dispose(i8* %7, i32 3) #3, !dbg !106 + ret void, !dbg !106 +} + +declare void @_Block_object_dispose(i8*, i32) + +define i32 @main() #0 { + %1 = alloca i32, align 4 + %a = alloca %0*, align 8 + store i32 0, i32* %1 + call void @llvm.dbg.declare(metadata !{%0** %a}, metadata !107), !dbg !108 + %2 = load %struct._class_t** @"\01L_OBJC_CLASSLIST_REFERENCES_$_5", !dbg !108 + %3 = bitcast %struct._class_t* %2 to i8*, !dbg !108 + %4 = load i8** getelementptr inbounds (%struct._message_ref_t* bitcast ({ i8* (i8*, %struct._message_ref_t*, ...)*, i8* }* @"\01l_objc_msgSend_fixup_alloc" to %struct._message_ref_t*), i32 0, i32 0), !dbg !108 + %5 = bitcast i8* %4 to i8* (i8*, i8*)*, !dbg !108 + %6 = call i8* %5(i8* %3, i8* bitcast ({ i8* (i8*, %struct._message_ref_t*, ...)*, i8* }* @"\01l_objc_msgSend_fixup_alloc" to i8*)), !dbg !108 + %7 = bitcast i8* %6 to %0*, !dbg !108 + %8 = load i8** @"\01L_OBJC_SELECTOR_REFERENCES_", !dbg !108, !invariant.load !67 + %9 = bitcast %0* %7 to i8*, !dbg !108 + %10 = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* %9, i8* %8), !dbg !108 + %11 = bitcast i8* %10 to %0*, !dbg !108 + store %0* %11, %0** %a, align 8, !dbg !108 + ret i32 0, !dbg !109 +} + +attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind readnone } +attributes #2 = { nonlazybind } +attributes #3 = { nounwind } + +!llvm.dbg.cu = !{!0} +!llvm.module.flags = !{!56, !57, !58, !59} + +!0 = metadata !{i32 786449, metadata !1, i32 16, metadata !"clang version 3.3 ", i1 false, metadata !"", i32 2, metadata !2, metadata !3, metadata !12, metadata !2, metadata !2, metadata !""} ; [ DW_TAG_compile_unit ] [llvm/tools/clang/test/CodeGenObjC/<unknown>] [DW_LANG_ObjC] +!1 = metadata !{metadata !"llvm/tools/clang/test/CodeGenObjC/<unknown>", metadata !"llvm/_build.ninja.Debug"} +!2 = metadata !{i32 0} +!3 = metadata !{metadata !4} +!4 = metadata !{i32 786451, metadata !5, metadata !6, metadata !"A", i32 33, i64 32, i64 32, i32 0, i32 512, null, metadata !7, i32 16, null, null} ; [ DW_TAG_structure_type ] [A] [line 33, size 32, align 32, offset 0] [from ] +!5 = metadata !{metadata !"llvm/tools/clang/test/CodeGenObjC/debug-info-blocks.m", metadata !"llvm/_build.ninja.Debug"} +!6 = metadata !{i32 786473, metadata !5} ; [ DW_TAG_file_type ] [llvm/tools/clang/test/CodeGenObjC/debug-info-blocks.m] +!7 = metadata !{metadata !8, metadata !10} +!8 = metadata !{i32 786460, null, metadata !4, null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !9} ; [ DW_TAG_inheritance ] [line 0, size 0, align 0, offset 0] [from NSObject] +!9 = metadata !{i32 786451, metadata !5, metadata !6, metadata !"NSObject", i32 21, i64 0, i64 8, i32 0, i32 0, null, metadata !2, i32 16, null, null} ; [ DW_TAG_structure_type ] [NSObject] [line 21, size 0, align 8, offset 0] [from ] +!10 = metadata !{i32 786445, metadata !5, metadata !6, metadata !"ivar", i32 35, i64 32, i64 32, i64 0, i32 0, metadata !11, null} ; [ DW_TAG_member ] [ivar] [line 35, size 32, align 32, offset 0] [from int] +!11 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] +!12 = metadata !{metadata !13, metadata !27, metadata !31, metadata !35, metadata !36, metadata !39} +!13 = metadata !{i32 786478, metadata !5, metadata !6, metadata !"-[A init]", metadata !"-[A init]", metadata !"", i32 46, metadata !14, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, i8* (%0*, i8*)* @"\01-[A init]", null, null, metadata !2, i32 46} ; [ DW_TAG_subprogram ] [line 46] [local] [def] [-[A init]] +!14 = metadata !{i32 786453, i32 0, i32 0, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !15, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!15 = metadata !{metadata !16, metadata !23, metadata !24} +!16 = metadata !{i32 786454, metadata !5, null, metadata !"id", i32 46, i64 0, i64 0, i64 0, i32 0, metadata !17} ; [ DW_TAG_typedef ] [id] [line 46, size 0, align 0, offset 0] [from ] +!17 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !18} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from objc_object] +!18 = metadata !{i32 786451, metadata !1, null, metadata !"objc_object", i32 0, i64 0, i64 0, i32 0, i32 0, null, metadata !19, i32 0, null, null} ; [ DW_TAG_structure_type ] [objc_object] [line 0, size 0, align 0, offset 0] [from ] +!19 = metadata !{metadata !20} +!20 = metadata !{i32 786445, metadata !1, metadata !18, metadata !"isa", i32 0, i64 64, i64 0, i64 0, i32 0, metadata !21} ; [ DW_TAG_member ] [isa] [line 0, size 64, align 0, offset 0] [from ] +!21 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 0, i64 0, i32 0, metadata !22} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 0, offset 0] [from objc_class] +!22 = metadata !{i32 786451, metadata !1, null, metadata !"objc_class", i32 0, i64 0, i64 0, i32 0, i32 4, null, null, i32 0} ; [ DW_TAG_structure_type ] [objc_class] [line 0, size 0, align 0, offset 0] [fwd] [from ] +!23 = metadata !{i32 786447, i32 0, i32 0, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 1088, metadata !4} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [artificial] [from A] +!24 = metadata !{i32 786454, metadata !5, i32 0, metadata !"SEL", i32 46, i64 0, i64 0, i64 0, i32 64, metadata !25} ; [ DW_TAG_typedef ] [SEL] [line 46, size 0, align 0, offset 0] [artificial] [from ] +!25 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !26} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from objc_selector] +!26 = metadata !{i32 786451, metadata !1, null, metadata !"objc_selector", i32 0, i64 0, i64 0, i32 0, i32 4, null, null, i32 0} ; [ DW_TAG_structure_type ] [objc_selector] [line 0, size 0, align 0, offset 0] [fwd] [from ] +!27 = metadata !{i32 786478, metadata !5, metadata !6, metadata !"__9-[A init]_block_invoke", metadata !"__9-[A init]_block_invoke", metadata !"", i32 49, metadata !28, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (i8*)* @"__9-[A init]_block_invoke", null, null, metadata !2, i32 49} ; [ DW_TAG_subprogram ] [line 49] [local] [def] [__9-[A init]_block_invoke] +!28 = metadata !{i32 786453, i32 0, i32 0, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !29, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!29 = metadata !{null, metadata !30} +!30 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from ] +!31 = metadata !{i32 786478, metadata !1, metadata !32, metadata !"__copy_helper_block_", metadata !"__copy_helper_block_", metadata !"", i32 52, metadata !33, i1 true, i1 true, i32 0, i32 0, null, i32 0, i1 false, void (i8*, i8*)* @__copy_helper_block_, null, null, metadata !2, i32 52} ; [ DW_TAG_subprogram ] [line 52] [local] [def] [__copy_helper_block_] +!32 = metadata !{i32 786473, metadata !1} ; [ DW_TAG_file_type ] [llvm/tools/clang/test/CodeGenObjC/<unknown>] +!33 = metadata !{i32 786453, i32 0, i32 0, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !34, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!34 = metadata !{null, metadata !30, metadata !30} +!35 = metadata !{i32 786478, metadata !1, metadata !32, metadata !"__destroy_helper_block_", metadata !"__destroy_helper_block_", metadata !"", i32 52, metadata !28, i1 true, i1 true, i32 0, i32 0, null, i32 0, i1 false, void (i8*)* @__destroy_helper_block_, null, null, metadata !2, i32 52} ; [ DW_TAG_subprogram ] [line 52] [local] [def] [__destroy_helper_block_] +!36 = metadata !{i32 786478, metadata !5, metadata !6, metadata !"main", metadata !"main", metadata !"", i32 59, metadata !37, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main, null, null, metadata !2, i32 60} ; [ DW_TAG_subprogram ] [line 59] [def] [scope 60] [main] +!37 = metadata !{i32 786453, i32 0, i32 0, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !38, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!38 = metadata !{metadata !11} +!39 = metadata !{i32 786478, metadata !5, metadata !6, metadata !"run", metadata !"run", metadata !"", i32 39, metadata !40, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (void ()*)* @run, null, null, metadata !2, i32 40} ; [ DW_TAG_subprogram ] [line 39] [local] [def] [scope 40] [run] +!40 = metadata !{i32 786453, i32 0, i32 0, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !41, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!41 = metadata !{null, metadata !42} +!42 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 0, i64 0, i32 0, metadata !43} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 0, offset 0] [from __block_literal_generic] +!43 = metadata !{i32 786451, metadata !5, metadata !6, metadata !"__block_literal_generic", i32 40, i64 256, i64 0, i32 0, i32 8, null, metadata !44, i32 0, null, null} ; [ DW_TAG_structure_type ] [__block_literal_generic] [line 40, size 256, align 0, offset 0] [from ] +!44 = metadata !{metadata !45, metadata !46, metadata !47, metadata !48, metadata !49} +!45 = metadata !{i32 786445, metadata !5, metadata !6, metadata !"__isa", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !30} ; [ DW_TAG_member ] [__isa] [line 0, size 64, align 64, offset 0] [from ] +!46 = metadata !{i32 786445, metadata !5, metadata !6, metadata !"__flags", i32 0, i64 32, i64 32, i64 64, i32 0, metadata !11} ; [ DW_TAG_member ] [__flags] [line 0, size 32, align 32, offset 64] [from int] +!47 = metadata !{i32 786445, metadata !5, metadata !6, metadata !"__reserved", i32 0, i64 32, i64 32, i64 96, i32 0, metadata !11} ; [ DW_TAG_member ] [__reserved] [line 0, size 32, align 32, offset 96] [from int] +!48 = metadata !{i32 786445, metadata !5, metadata !6, metadata !"__FuncPtr", i32 0, i64 64, i64 64, i64 128, i32 0, metadata !30} ; [ DW_TAG_member ] [__FuncPtr] [line 0, size 64, align 64, offset 128] [from ] +!49 = metadata !{i32 786445, metadata !5, metadata !6, metadata !"__descriptor", i32 40, i64 64, i64 64, i64 192, i32 0, metadata !50} ; [ DW_TAG_member ] [__descriptor] [line 40, size 64, align 64, offset 192] [from ] +!50 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 0, i64 0, i32 0, metadata !51} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 0, offset 0] [from __block_descriptor] +!51 = metadata !{i32 786451, metadata !5, metadata !6, metadata !"__block_descriptor", i32 40, i64 128, i64 0, i32 0, i32 8, null, metadata !52, i32 0, null, null} ; [ DW_TAG_structure_type ] [__block_descriptor] [line 40, size 128, align 0, offset 0] [from ] +!52 = metadata !{metadata !53, metadata !55} +!53 = metadata !{i32 786445, metadata !5, metadata !6, metadata !"reserved", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !54} ; [ DW_TAG_member ] [reserved] [line 0, size 64, align 64, offset 0] [from long unsigned int] +!54 = metadata !{i32 786468, null, null, metadata !"long unsigned int", i32 0, i64 64, i64 64, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] [long unsigned int] [line 0, size 64, align 64, offset 0, enc DW_ATE_unsigned] +!55 = metadata !{i32 786445, metadata !5, metadata !6, metadata !"Size", i32 0, i64 64, i64 64, i64 64, i32 0, metadata !54} ; [ DW_TAG_member ] [Size] [line 0, size 64, align 64, offset 64] [from long unsigned int] +!56 = metadata !{i32 1, metadata !"Objective-C Version", i32 2} +!57 = metadata !{i32 1, metadata !"Objective-C Image Info Version", i32 0} +!58 = metadata !{i32 1, metadata !"Objective-C Image Info Section", metadata !"__DATA, __objc_imageinfo, regular, no_dead_strip"} +!59 = metadata !{i32 4, metadata !"Objective-C Garbage Collection", i32 0} +!60 = metadata !{i32 786689, metadata !13, metadata !"self", metadata !32, i32 16777262, metadata !61, i32 1088, i32 0} ; [ DW_TAG_arg_variable ] [self] [line 46] +!61 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !4} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from A] +!62 = metadata !{i32 46, i32 0, metadata !13, null} +!63 = metadata !{i32 786689, metadata !13, metadata !"_cmd", metadata !32, i32 33554478, metadata !64, i32 64, i32 0} ; [ DW_TAG_arg_variable ] [_cmd] [line 46] +!64 = metadata !{i32 786454, metadata !5, null, metadata !"SEL", i32 46, i64 0, i64 0, i64 0, i32 0, metadata !25} ; [ DW_TAG_typedef ] [SEL] [line 46, size 0, align 0, offset 0] [from ] +!65 = metadata !{i32 48, i32 0, metadata !66, null} +!66 = metadata !{i32 786443, metadata !5, metadata !13, i32 47, i32 0, i32 0} ; [ DW_TAG_lexical_block ] [llvm/tools/clang/test/CodeGenObjC/debug-info-blocks.m] +!67 = metadata !{} +!68 = metadata !{i32 49, i32 0, metadata !69, null} +!69 = metadata !{i32 786443, metadata !5, metadata !66, i32 48, i32 0, i32 1} ; [ DW_TAG_lexical_block ] [llvm/tools/clang/test/CodeGenObjC/debug-info-blocks.m] +!70 = metadata !{i32 53, i32 0, metadata !69, null} +!71 = metadata !{i32 54, i32 0, metadata !66, null} +!72 = metadata !{i32 786689, metadata !39, metadata !"block", metadata !6, i32 16777255, metadata !42, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [block] [line 39] +!73 = metadata !{i32 39, i32 0, metadata !39, null} +!74 = metadata !{i32 41, i32 0, metadata !39, null} +!75 = metadata !{i32 42, i32 0, metadata !39, null} +!76 = metadata !{i32 786689, metadata !27, metadata !".block_descriptor", metadata !6, i32 16777265, metadata !77, i32 64, i32 0} ; [ DW_TAG_arg_variable ] [.block_descriptor] [line 49] +!77 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 0, i64 0, i32 0, metadata !78} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 0, offset 0] [from __block_literal_1] +!78 = metadata !{i32 786451, metadata !5, metadata !6, metadata !"__block_literal_1", i32 49, i64 320, i64 64, i32 0, i32 0, null, metadata !79, i32 0, null, null} ; [ DW_TAG_structure_type ] [__block_literal_1] [line 49, size 320, align 64, offset 0] [from ] +!79 = metadata !{metadata !80, metadata !81, metadata !82, metadata !83, metadata !84, metadata !87} +!80 = metadata !{i32 786445, metadata !5, metadata !6, metadata !"__isa", i32 49, i64 64, i64 64, i64 0, i32 0, metadata !30} ; [ DW_TAG_member ] [__isa] [line 49, size 64, align 64, offset 0] [from ] +!81 = metadata !{i32 786445, metadata !5, metadata !6, metadata !"__flags", i32 49, i64 32, i64 32, i64 64, i32 0, metadata !11} ; [ DW_TAG_member ] [__flags] [line 49, size 32, align 32, offset 64] [from int] +!82 = metadata !{i32 786445, metadata !5, metadata !6, metadata !"__reserved", i32 49, i64 32, i64 32, i64 96, i32 0, metadata !11} ; [ DW_TAG_member ] [__reserved] [line 49, size 32, align 32, offset 96] [from int] +!83 = metadata !{i32 786445, metadata !5, metadata !6, metadata !"__FuncPtr", i32 49, i64 64, i64 64, i64 128, i32 0, metadata !30} ; [ DW_TAG_member ] [__FuncPtr] [line 49, size 64, align 64, offset 128] [from ] +!84 = metadata !{i32 786445, metadata !5, metadata !6, metadata !"__descriptor", i32 49, i64 64, i64 64, i64 192, i32 0, metadata !85} ; [ DW_TAG_member ] [__descriptor] [line 49, size 64, align 64, offset 192] [from ] +!85 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !86} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from __block_descriptor_withcopydispose] +!86 = metadata !{i32 786451, metadata !1, null, metadata !"__block_descriptor_withcopydispose", i32 49, i64 0, i64 0, i32 0, i32 4, null, null, i32 0} ; [ DW_TAG_structure_type ] [__block_descriptor_withcopydispose] [line 49, size 0, align 0, offset 0] [fwd] [from ] +!87 = metadata !{i32 786445, metadata !5, metadata !6, metadata !"self", i32 49, i64 64, i64 64, i64 256, i32 0, metadata !61} ; [ DW_TAG_member ] [self] [line 49, size 64, align 64, offset 256] [from ] +!88 = metadata !{i32 49, i32 0, metadata !27, null} +!89 = metadata !{i32 786688, metadata !27, metadata !"self", metadata !32, i32 52, metadata !23, i32 0, i32 0, i64 2, i64 1, i64 32} ; [ DW_TAG_auto_variable ] [self] [line 52] +!90 = metadata !{i32 52, i32 0, metadata !27, null} +!91 = metadata !{i32 786688, metadata !92, metadata !"d", metadata !6, i32 50, metadata !93, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [d] [line 50] +!92 = metadata !{i32 786443, metadata !5, metadata !27, i32 49, i32 0, i32 2} ; [ DW_TAG_lexical_block ] [llvm/tools/clang/test/CodeGenObjC/debug-info-blocks.m] +!93 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !94} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from NSMutableDictionary] +!94 = metadata !{i32 786451, metadata !5, metadata !6, metadata !"NSMutableDictionary", i32 30, i64 0, i64 8, i32 0, i32 0, null, metadata !95, i32 16, null, null} ; [ DW_TAG_structure_type ] [NSMutableDictionary] [line 30, size 0, align 8, offset 0] [from ] +!95 = metadata !{metadata !96} +!96 = metadata !{i32 786460, null, metadata !94, null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !97} ; [ DW_TAG_inheritance ] [line 0, size 0, align 0, offset 0] [from NSDictionary] +!97 = metadata !{i32 786451, metadata !5, metadata !6, metadata !"NSDictionary", i32 26, i64 0, i64 8, i32 0, i32 0, null, metadata !98, i32 16, null, null} ; [ DW_TAG_structure_type ] [NSDictionary] [line 26, size 0, align 8, offset 0] [from ] +!98 = metadata !{metadata !99} +!99 = metadata !{i32 786460, null, metadata !97, null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !9} ; [ DW_TAG_inheritance ] [line 0, size 0, align 0, offset 0] [from NSObject] +!100 = metadata !{i32 50, i32 0, metadata !92, null} +!101 = metadata !{i32 51, i32 0, metadata !92, null} +!102 = metadata !{i32 786689, metadata !31, metadata !"", metadata !32, i32 16777268, metadata !30, i32 1088, i32 0} ; [ DW_TAG_arg_variable ] [line 52] +!103 = metadata !{i32 52, i32 0, metadata !31, null} +!104 = metadata !{i32 786689, metadata !31, metadata !"", metadata !32, i32 33554484, metadata !30, i32 64, i32 0} ; [ DW_TAG_arg_variable ] [line 52] +!105 = metadata !{i32 786689, metadata !35, metadata !"", metadata !32, i32 16777268, metadata !30, i32 1088, i32 0} ; [ DW_TAG_arg_variable ] [line 52] +!106 = metadata !{i32 52, i32 0, metadata !35, null} +!107 = metadata !{i32 786688, metadata !36, metadata !"a", metadata !6, i32 61, metadata !61, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [a] [line 61] +!108 = metadata !{i32 61, i32 0, metadata !36, null} +!109 = metadata !{i32 62, i32 0, metadata !36, null} diff --git a/test/DebugInfo/X86/debug-info-static-member.ll b/test/DebugInfo/X86/debug-info-static-member.ll index 7a4af04..33485b6 100644 --- a/test/DebugInfo/X86/debug-info-static-member.ll +++ b/test/DebugInfo/X86/debug-info-static-member.ll @@ -58,30 +58,30 @@ declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !6, metadata !"clang version 3.3 (trunk 171914)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !10, metadata !""} ; [ DW_TAG_compile_unit ] [/home/probinson/projects/upstream/static-member/test/debug-info-static-member.cpp] [DW_LANG_C_plus_plus] +!0 = metadata !{i32 786449, i32 4, metadata !6, metadata !"clang version 3.3 (trunk 171914)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !10, metadata !10, metadata !""} ; [ DW_TAG_compile_unit ] [/home/probinson/projects/upstream/static-member/test/debug-info-static-member.cpp] [DW_LANG_C_plus_plus] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} -!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"main", metadata !"main", metadata !"", metadata !6, i32 18, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 ()* @main, null, null, metadata !1, i32 23} ; [ DW_TAG_subprogram ] [line 18] [def] [scope 23] [main] +!5 = metadata !{i32 786478, metadata !6, metadata !"main", metadata !"main", metadata !"", metadata !6, i32 18, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 ()* @main, null, null, metadata !1, i32 23} ; [ DW_TAG_subprogram ] [line 18] [def] [scope 23] [main] !6 = metadata !{i32 786473, metadata !33} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !8 = metadata !{metadata !9} -!9 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] +!9 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] !10 = metadata !{metadata !12, metadata !27, metadata !28} !12 = metadata !{i32 786484, i32 0, metadata !13, metadata !"a", metadata !"a", metadata !"_ZN1C1aE", metadata !6, i32 14, metadata !9, i32 0, i32 1, i32* @_ZN1C1aE, metadata !15} ; [ DW_TAG_variable ] [a] [line 14] [def] -!13 = metadata !{i32 786434, null, metadata !"C", metadata !6, i32 1, i64 32, i64 32, i32 0, i32 0, null, metadata !14, i32 0, null, null} ; [ DW_TAG_class_type ] [C] [line 1, size 32, align 32, offset 0] [from ] +!13 = metadata !{i32 786434, metadata !33, null, metadata !"C", i32 1, i64 32, i64 32, i32 0, i32 0, null, metadata !14, i32 0, null, null} ; [ DW_TAG_class_type ] [C] [line 1, size 32, align 32, offset 0] [from ] !14 = metadata !{metadata !15, metadata !16, metadata !19, metadata !20, metadata !23, metadata !24, metadata !26} -!15 = metadata !{i32 786445, metadata !13, metadata !"a", metadata !6, i32 3, i64 0, i64 0, i64 0, i32 4097, metadata !9, null} ; [ DW_TAG_member ] [a] [line 3, size 0, align 0, offset 0] [private] [static] [from int] -!16 = metadata !{i32 786445, metadata !13, metadata !"const_a", metadata !6, i32 4, i64 0, i64 0, i64 0, i32 4097, metadata !17, i1 true} ; [ DW_TAG_member ] [const_a] [line 4, size 0, align 0, offset 0] [private] [static] [from ] -!17 = metadata !{i32 786470, null, metadata !"", null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !18} ; [ DW_TAG_const_type ] [line 0, size 0, align 0, offset 0] [from bool] -!18 = metadata !{i32 786468, null, metadata !"bool", null, i32 0, i64 8, i64 8, i64 0, i32 0, i32 2} ; [ DW_TAG_base_type ] [bool] [line 0, size 8, align 8, offset 0, enc DW_ATE_boolean] -!19 = metadata !{i32 786445, metadata !13, metadata !"b", metadata !6, i32 6, i64 0, i64 0, i64 0, i32 4098, metadata !9, null} ; [ DW_TAG_member ] [b] [line 6, size 0, align 0, offset 0] [protected] [static] [from int] -!20 = metadata !{i32 786445, metadata !13, metadata !"const_b", metadata !6, i32 7, i64 0, i64 0, i64 0, i32 4098, metadata !21, float 0x40091EB860000000} ; [ DW_TAG_member ] [const_b] [line 7, size 0, align 0, offset 0] [protected] [static] [from ] -!21 = metadata !{i32 786470, null, metadata !"", null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !22} ; [ DW_TAG_const_type ] [line 0, size 0, align 0, offset 0] [from float] -!22 = metadata !{i32 786468, null, metadata !"float", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] [float] [line 0, size 32, align 32, offset 0, enc DW_ATE_float] -!23 = metadata !{i32 786445, metadata !13, metadata !"c", metadata !6, i32 9, i64 0, i64 0, i64 0, i32 4096, metadata !9, null} ; [ DW_TAG_member ] [c] [line 9, size 0, align 0, offset 0] [static] [from int] -!24 = metadata !{i32 786445, metadata !13, metadata !"const_c", metadata !6, i32 10, i64 0, i64 0, i64 0, i32 4096, metadata !25, i32 18} ; [ DW_TAG_member ] [const_c] [line 10, size 0, align 0, offset 0] [static] [from ] -!25 = metadata !{i32 786470, null, metadata !"", null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !9} ; [ DW_TAG_const_type ] [line 0, size 0, align 0, offset 0] [from int] -!26 = metadata !{i32 786445, metadata !13, metadata !"d", metadata !6, i32 11, i64 32, i64 32, i64 0, i32 0, metadata !9} ; [ DW_TAG_member ] [d] [line 11, size 32, align 32, offset 0] [from int] +!15 = metadata !{i32 786445, metadata !33, metadata !13, metadata !"a", i32 3, i64 0, i64 0, i64 0, i32 4097, metadata !9, null} ; [ DW_TAG_member ] [a] [line 3, size 0, align 0, offset 0] [private] [static] [from int] +!16 = metadata !{i32 786445, metadata !33, metadata !13, metadata !"const_a", i32 4, i64 0, i64 0, i64 0, i32 4097, metadata !17, i1 true} ; [ DW_TAG_member ] [const_a] [line 4, size 0, align 0, offset 0] [private] [static] [from ] +!17 = metadata !{i32 786470, null, null, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, metadata !18} ; [ DW_TAG_const_type ] [line 0, size 0, align 0, offset 0] [from bool] +!18 = metadata !{i32 786468, null, null, metadata !"bool", i32 0, i64 8, i64 8, i64 0, i32 0, i32 2} ; [ DW_TAG_base_type ] [bool] [line 0, size 8, align 8, offset 0, enc DW_ATE_boolean] +!19 = metadata !{i32 786445, metadata !33, metadata !13, metadata !"b", i32 6, i64 0, i64 0, i64 0, i32 4098, metadata !9, null} ; [ DW_TAG_member ] [b] [line 6, size 0, align 0, offset 0] [protected] [static] [from int] +!20 = metadata !{i32 786445, metadata !33, metadata !13, metadata !"const_b", i32 7, i64 0, i64 0, i64 0, i32 4098, metadata !21, float 0x40091EB860000000} ; [ DW_TAG_member ] [const_b] [line 7, size 0, align 0, offset 0] [protected] [static] [from ] +!21 = metadata !{i32 786470, null, null, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, metadata !22} ; [ DW_TAG_const_type ] [line 0, size 0, align 0, offset 0] [from float] +!22 = metadata !{i32 786468, null, null, metadata !"float", i32 0, i64 32, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] [float] [line 0, size 32, align 32, offset 0, enc DW_ATE_float] +!23 = metadata !{i32 786445, metadata !33, metadata !13, metadata !"c", i32 9, i64 0, i64 0, i64 0, i32 4096, metadata !9, null} ; [ DW_TAG_member ] [c] [line 9, size 0, align 0, offset 0] [static] [from int] +!24 = metadata !{i32 786445, metadata !33, metadata !13, metadata !"const_c", i32 10, i64 0, i64 0, i64 0, i32 4096, metadata !25, i32 18} ; [ DW_TAG_member ] [const_c] [line 10, size 0, align 0, offset 0] [static] [from ] +!25 = metadata !{i32 786470, null, null, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, metadata !9} ; [ DW_TAG_const_type ] [line 0, size 0, align 0, offset 0] [from int] +!26 = metadata !{i32 786445, metadata !33, metadata !13, metadata !"d", i32 11, i64 32, i64 32, i64 0, i32 0, metadata !9} ; [ DW_TAG_member ] [d] [line 11, size 32, align 32, offset 0] [from int] !27 = metadata !{i32 786484, i32 0, metadata !13, metadata !"b", metadata !"b", metadata !"_ZN1C1bE", metadata !6, i32 15, metadata !9, i32 0, i32 1, i32* @_ZN1C1bE, metadata !19} ; [ DW_TAG_variable ] [b] [line 15] [def] !28 = metadata !{i32 786484, i32 0, metadata !13, metadata !"c", metadata !"c", metadata !"_ZN1C1cE", metadata !6, i32 16, metadata !9, i32 0, i32 1, i32* @_ZN1C1cE, metadata !23} ; [ DW_TAG_variable ] [c] [line 16] [def] !29 = metadata !{i32 786688, metadata !5, metadata !"instance_C", metadata !6, i32 20, metadata !13, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [instance_C] [line 20] diff --git a/test/DebugInfo/X86/elf-names.ll b/test/DebugInfo/X86/elf-names.ll index 687bab4..7bc532e 100644 --- a/test/DebugInfo/X86/elf-names.ll +++ b/test/DebugInfo/X86/elf-names.ll @@ -21,13 +21,13 @@ define void @_ZN1DC2Ev(%class.D* nocapture %this) unnamed_addr nounwind uwtable entry: tail call void @llvm.dbg.value(metadata !{%class.D* %this}, i64 0, metadata !29), !dbg !36 %c1 = getelementptr inbounds %class.D* %this, i64 0, i32 0, !dbg !37 - store i32 1, i32* %c1, align 4, !dbg !37, !tbaa !39 + store i32 1, i32* %c1, align 4, !dbg !37 %c2 = getelementptr inbounds %class.D* %this, i64 0, i32 1, !dbg !42 - store i32 2, i32* %c2, align 4, !dbg !42, !tbaa !39 + store i32 2, i32* %c2, align 4, !dbg !42 %c3 = getelementptr inbounds %class.D* %this, i64 0, i32 2, !dbg !43 - store i32 3, i32* %c3, align 4, !dbg !43, !tbaa !39 + store i32 3, i32* %c3, align 4, !dbg !43 %c4 = getelementptr inbounds %class.D* %this, i64 0, i32 3, !dbg !44 - store i32 4, i32* %c4, align 4, !dbg !44, !tbaa !39 + store i32 4, i32* %c4, align 4, !dbg !44 ret void, !dbg !45 } @@ -36,21 +36,21 @@ entry: tail call void @llvm.dbg.value(metadata !{%class.D* %this}, i64 0, metadata !34), !dbg !46 tail call void @llvm.dbg.value(metadata !{%class.D* %d}, i64 0, metadata !35), !dbg !46 %c1 = getelementptr inbounds %class.D* %d, i64 0, i32 0, !dbg !47 - %0 = load i32* %c1, align 4, !dbg !47, !tbaa !39 + %0 = load i32* %c1, align 4, !dbg !47 %c12 = getelementptr inbounds %class.D* %this, i64 0, i32 0, !dbg !47 - store i32 %0, i32* %c12, align 4, !dbg !47, !tbaa !39 + store i32 %0, i32* %c12, align 4, !dbg !47 %c2 = getelementptr inbounds %class.D* %d, i64 0, i32 1, !dbg !49 - %1 = load i32* %c2, align 4, !dbg !49, !tbaa !39 + %1 = load i32* %c2, align 4, !dbg !49 %c23 = getelementptr inbounds %class.D* %this, i64 0, i32 1, !dbg !49 - store i32 %1, i32* %c23, align 4, !dbg !49, !tbaa !39 + store i32 %1, i32* %c23, align 4, !dbg !49 %c3 = getelementptr inbounds %class.D* %d, i64 0, i32 2, !dbg !50 - %2 = load i32* %c3, align 4, !dbg !50, !tbaa !39 + %2 = load i32* %c3, align 4, !dbg !50 %c34 = getelementptr inbounds %class.D* %this, i64 0, i32 2, !dbg !50 - store i32 %2, i32* %c34, align 4, !dbg !50, !tbaa !39 + store i32 %2, i32* %c34, align 4, !dbg !50 %c4 = getelementptr inbounds %class.D* %d, i64 0, i32 3, !dbg !51 - %3 = load i32* %c4, align 4, !dbg !51, !tbaa !39 + %3 = load i32* %c4, align 4, !dbg !51 %c45 = getelementptr inbounds %class.D* %this, i64 0, i32 3, !dbg !51 - store i32 %3, i32* %c45, align 4, !dbg !51, !tbaa !39 + store i32 %3, i32* %c45, align 4, !dbg !51 ret void, !dbg !52 } @@ -58,36 +58,36 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !6, metadata !"clang version 3.2 (trunk 167506) (llvm/trunk 167505)", i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] [/usr/local/google/home/echristo/foo.cpp] [DW_LANG_C_plus_plus] +!0 = metadata !{i32 786449, metadata !53, i32 4, metadata !"clang version 3.2 (trunk 167506) (llvm/trunk 167505)", i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] [/usr/local/google/home/echristo/foo.cpp] [DW_LANG_C_plus_plus] !1 = metadata !{i32 0} !3 = metadata !{metadata !5, metadata !31} -!5 = metadata !{i32 786478, i32 0, null, metadata !"D", metadata !"D", metadata !"_ZN1DC2Ev", metadata !6, i32 12, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, void (%class.D*)* @_ZN1DC2Ev, null, metadata !17, metadata !27, i32 12} ; [ DW_TAG_subprogram ] [line 12] [def] [D] +!5 = metadata !{i32 786478, metadata !6, null, metadata !"D", metadata !"D", metadata !"_ZN1DC2Ev", i32 12, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, void (%class.D*)* @_ZN1DC2Ev, null, metadata !17, metadata !27, i32 12} ; [ DW_TAG_subprogram ] [line 12] [def] [D] !6 = metadata !{i32 786473, metadata !53} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !8 = metadata !{null, metadata !9} !9 = metadata !{i32 786447, i32 0, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 1088, metadata !10} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from D] -!10 = metadata !{i32 786434, null, metadata !"D", metadata !6, i32 1, i64 128, i64 32, i32 0, i32 0, null, metadata !11, i32 0, null, null} ; [ DW_TAG_class_type ] [D] [line 1, size 128, align 32, offset 0] [from ] +!10 = metadata !{i32 786434, metadata !53, null, metadata !"D", i32 1, i64 128, i64 32, i32 0, i32 0, null, metadata !11, i32 0, null, null} ; [ DW_TAG_class_type ] [D] [line 1, size 128, align 32, offset 0] [from ] !11 = metadata !{metadata !12, metadata !14, metadata !15, metadata !16, metadata !17, metadata !20} -!12 = metadata !{i32 786445, metadata !10, metadata !"c1", metadata !6, i32 6, i64 32, i64 32, i64 0, i32 1, metadata !13} ; [ DW_TAG_member ] [c1] [line 6, size 32, align 32, offset 0] [private] [from int] -!13 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] -!14 = metadata !{i32 786445, metadata !10, metadata !"c2", metadata !6, i32 7, i64 32, i64 32, i64 32, i32 1, metadata !13} ; [ DW_TAG_member ] [c2] [line 7, size 32, align 32, offset 32] [private] [from int] -!15 = metadata !{i32 786445, metadata !10, metadata !"c3", metadata !6, i32 8, i64 32, i64 32, i64 64, i32 1, metadata !13} ; [ DW_TAG_member ] [c3] [line 8, size 32, align 32, offset 64] [private] [from int] -!16 = metadata !{i32 786445, metadata !10, metadata !"c4", metadata !6, i32 9, i64 32, i64 32, i64 96, i32 1, metadata !13} ; [ DW_TAG_member ] [c4] [line 9, size 32, align 32, offset 96] [private] [from int] -!17 = metadata !{i32 786478, i32 0, metadata !10, metadata !"D", metadata !"D", metadata !"", metadata !6, i32 3, metadata !7, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 true, null, null, i32 0, metadata !18, i32 3} ; [ DW_TAG_subprogram ] [line 3] [D] +!12 = metadata !{i32 786445, metadata !53, metadata !10, metadata !"c1", i32 6, i64 32, i64 32, i64 0, i32 1, metadata !13} ; [ DW_TAG_member ] [c1] [line 6, size 32, align 32, offset 0] [private] [from int] +!13 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] +!14 = metadata !{i32 786445, metadata !53, metadata !10, metadata !"c2", i32 7, i64 32, i64 32, i64 32, i32 1, metadata !13} ; [ DW_TAG_member ] [c2] [line 7, size 32, align 32, offset 32] [private] [from int] +!15 = metadata !{i32 786445, metadata !53, metadata !10, metadata !"c3", i32 8, i64 32, i64 32, i64 64, i32 1, metadata !13} ; [ DW_TAG_member ] [c3] [line 8, size 32, align 32, offset 64] [private] [from int] +!16 = metadata !{i32 786445, metadata !53, metadata !10, metadata !"c4", i32 9, i64 32, i64 32, i64 96, i32 1, metadata !13} ; [ DW_TAG_member ] [c4] [line 9, size 32, align 32, offset 96] [private] [from int] +!17 = metadata !{i32 786478, metadata !6, metadata !10, metadata !"D", metadata !"D", metadata !"", i32 3, metadata !7, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 true, null, null, i32 0, metadata !18, i32 3} ; [ DW_TAG_subprogram ] [line 3] [D] !18 = metadata !{metadata !19} !19 = metadata !{i32 786468} ; [ DW_TAG_base_type ] [line 0, size 0, align 0, offset 0] -!20 = metadata !{i32 786478, i32 0, metadata !10, metadata !"D", metadata !"D", metadata !"", metadata !6, i32 4, metadata !21, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 true, null, null, i32 0, metadata !25, i32 4} ; [ DW_TAG_subprogram ] [line 4] [D] +!20 = metadata !{i32 786478, metadata !6, metadata !10, metadata !"D", metadata !"D", metadata !"", i32 4, metadata !21, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 true, null, null, i32 0, metadata !25, i32 4} ; [ DW_TAG_subprogram ] [line 4] [D] !21 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !22, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !22 = metadata !{null, metadata !9, metadata !23} !23 = metadata !{i32 786448, null, null, null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !24} ; [ DW_TAG_reference_type ] [line 0, size 0, align 0, offset 0] [from ] -!24 = metadata !{i32 786470, null, metadata !"", null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !10} ; [ DW_TAG_const_type ] [line 0, size 0, align 0, offset 0] [from D] +!24 = metadata !{i32 786470, null, null, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, metadata !10} ; [ DW_TAG_const_type ] [line 0, size 0, align 0, offset 0] [from D] !25 = metadata !{metadata !26} !26 = metadata !{i32 786468} ; [ DW_TAG_base_type ] [line 0, size 0, align 0, offset 0] !27 = metadata !{metadata !28} !28 = metadata !{metadata !29} !29 = metadata !{i32 786689, metadata !5, metadata !"this", metadata !6, i32 16777228, metadata !30, i32 1088, i32 0} ; [ DW_TAG_arg_variable ] [this] [line 12] -!30 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !10} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from D] -!31 = metadata !{i32 786478, i32 0, null, metadata !"D", metadata !"D", metadata !"_ZN1DC2ERKS_", metadata !6, i32 19, metadata !21, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, void (%class.D*, %class.D*)* @_ZN1DC2ERKS_, null, metadata !20, metadata !32, i32 19} ; [ DW_TAG_subprogram ] [line 19] [def] [D] +!30 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !10} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from D] +!31 = metadata !{i32 786478, metadata !6, null, metadata !"D", metadata !"D", metadata !"_ZN1DC2ERKS_", i32 19, metadata !21, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, void (%class.D*, %class.D*)* @_ZN1DC2ERKS_, null, metadata !20, metadata !32, i32 19} ; [ DW_TAG_subprogram ] [line 19] [def] [D] !32 = metadata !{metadata !33} !33 = metadata !{metadata !34, metadata !35} !34 = metadata !{i32 786689, metadata !31, metadata !"this", metadata !6, i32 16777235, metadata !30, i32 1088, i32 0} ; [ DW_TAG_arg_variable ] [this] [line 19] @@ -95,9 +95,6 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !36 = metadata !{i32 12, i32 0, metadata !5, null} !37 = metadata !{i32 13, i32 0, metadata !38, null} !38 = metadata !{i32 786443, metadata !5, i32 12, i32 0, metadata !6, i32 0} ; [ DW_TAG_lexical_block ] [/usr/local/google/home/echristo/foo.cpp] -!39 = metadata !{metadata !"int", metadata !40} -!40 = metadata !{metadata !"omnipotent char", metadata !41} -!41 = metadata !{metadata !"Simple C/C++ TBAA"} !42 = metadata !{i32 14, i32 0, metadata !38, null} !43 = metadata !{i32 15, i32 0, metadata !38, null} !44 = metadata !{i32 16, i32 0, metadata !38, null} diff --git a/test/DebugInfo/X86/empty-and-one-elem-array.ll b/test/DebugInfo/X86/empty-and-one-elem-array.ll index d506e3f..ce3035e 100644 --- a/test/DebugInfo/X86/empty-and-one-elem-array.ll +++ b/test/DebugInfo/X86/empty-and-one-elem-array.ll @@ -59,30 +59,30 @@ declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !6, metadata !"clang version 3.3 (trunk 169136)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] [/Volumes/Sandbox/llvm/test.c] [DW_LANG_C99] +!0 = metadata !{i32 786449, metadata !32, i32 12, metadata !"clang version 3.3 (trunk 169136)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] [/Volumes/Sandbox/llvm/test.c] [DW_LANG_C99] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} -!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"func", metadata !"func", metadata !"", metadata !6, i32 11, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @func, null, null, metadata !1, i32 11} ; [ DW_TAG_subprogram ] [line 11] [def] [func] +!5 = metadata !{i32 786478, metadata !6, metadata !6, metadata !"func", metadata !"func", metadata !"", i32 11, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @func, null, null, metadata !1, i32 11} ; [ DW_TAG_subprogram ] [line 11] [def] [func] !6 = metadata !{i32 786473, metadata !32} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !8 = metadata !{metadata !9} -!9 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] +!9 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] !10 = metadata !{i32 786688, metadata !11, metadata !"my_foo", metadata !6, i32 12, metadata !12, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [my_foo] [line 12] -!11 = metadata !{i32 786443, metadata !5, i32 11, i32 0, metadata !6, i32 0} ; [ DW_TAG_lexical_block ] [/Volumes/Sandbox/llvm/test.c] -!12 = metadata !{i32 786451, null, metadata !"foo", metadata !6, i32 1, i64 64, i64 32, i32 0, i32 0, null, metadata !13, i32 0, i32 0, i32 0} ; [ DW_TAG_structure_type ] [foo] [line 1, size 64, align 32, offset 0] [from ] +!11 = metadata !{i32 786443, metadata !6, metadata !5, i32 11, i32 0, i32 0} ; [ DW_TAG_lexical_block ] [/Volumes/Sandbox/llvm/test.c] +!12 = metadata !{i32 786451, metadata !32, null, metadata !"foo", i32 1, i64 64, i64 32, i32 0, i32 0, null, metadata !13, i32 0, i32 0, i32 0} ; [ DW_TAG_structure_type ] [foo] [line 1, size 64, align 32, offset 0] [from ] !13 = metadata !{metadata !14, metadata !15} -!14 = metadata !{i32 786445, metadata !12, metadata !"a", metadata !6, i32 2, i64 32, i64 32, i64 0, i32 0, metadata !9} ; [ DW_TAG_member ] [a] [line 2, size 32, align 32, offset 0] [from int] -!15 = metadata !{i32 786445, metadata !12, metadata !"b", metadata !6, i32 3, i64 32, i64 32, i64 32, i32 0, metadata !16} ; [ DW_TAG_member ] [b] [line 3, size 32, align 32, offset 32] [from ] -!16 = metadata !{i32 786433, null, metadata !"", null, i32 0, i64 32, i64 32, i32 0, i32 0, metadata !9, metadata !17, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 32, align 32, offset 0] [from int] +!14 = metadata !{i32 786445, metadata !32, metadata !12, metadata !"a", i32 2, i64 32, i64 32, i64 0, i32 0, metadata !9} ; [ DW_TAG_member ] [a] [line 2, size 32, align 32, offset 0] [from int] +!15 = metadata !{i32 786445, metadata !32, metadata !12, metadata !"b", i32 3, i64 32, i64 32, i64 32, i32 0, metadata !16} ; [ DW_TAG_member ] [b] [line 3, size 32, align 32, offset 32] [from ] +!16 = metadata !{i32 786433, null, null, metadata !"", i32 0, i64 32, i64 32, i32 0, i32 0, metadata !9, metadata !17, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 32, align 32, offset 0] [from int] !17 = metadata !{metadata !18} !18 = metadata !{i32 786465, i64 0, i64 1} ; [ DW_TAG_subrange_type ] [0, 1] !19 = metadata !{i32 12, i32 0, metadata !11, null} !20 = metadata !{i32 786688, metadata !11, metadata !"my_bar", metadata !6, i32 13, metadata !21, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [my_bar] [line 13] -!21 = metadata !{i32 786451, null, metadata !"bar", metadata !6, i32 6, i64 32, i64 32, i32 0, i32 0, null, metadata !22, i32 0, i32 0, i32 0} ; [ DW_TAG_structure_type ] [bar] [line 6, size 32, align 32, offset 0] [from ] +!21 = metadata !{i32 786451, metadata !32, null, metadata !"bar", i32 6, i64 32, i64 32, i32 0, i32 0, null, metadata !22, i32 0, i32 0, i32 0} ; [ DW_TAG_structure_type ] [bar] [line 6, size 32, align 32, offset 0] [from ] !22 = metadata !{metadata !23, metadata !24} -!23 = metadata !{i32 786445, metadata !21, metadata !"a", metadata !6, i32 7, i64 32, i64 32, i64 0, i32 0, metadata !9} ; [ DW_TAG_member ] [a] [line 7, size 32, align 32, offset 0] [from int] -!24 = metadata !{i32 786445, metadata !21, metadata !"b", metadata !6, i32 8, i64 0, i64 32, i64 32, i32 0, metadata !25} ; [ DW_TAG_member ] [b] [line 8, size 0, align 32, offset 32] [from ] -!25 = metadata !{i32 786433, null, metadata !"", null, i32 0, i64 0, i64 32, i32 0, i32 0, metadata !9, metadata !26, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 0, align 32, offset 0] [from int] +!23 = metadata !{i32 786445, metadata !32, metadata !21, metadata !"a", i32 7, i64 32, i64 32, i64 0, i32 0, metadata !9} ; [ DW_TAG_member ] [a] [line 7, size 32, align 32, offset 0] [from int] +!24 = metadata !{i32 786445, metadata !32, metadata !21, metadata !"b", i32 8, i64 0, i64 32, i64 32, i32 0, metadata !25} ; [ DW_TAG_member ] [b] [line 8, size 0, align 32, offset 32] [from ] +!25 = metadata !{i32 786433, null, null, metadata !"", i32 0, i64 0, i64 32, i32 0, i32 0, metadata !9, metadata !26, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 0, align 32, offset 0] [from int] !26 = metadata !{metadata !27} !27 = metadata !{i32 786465, i64 0, i64 0} ; [ DW_TAG_subrange_type ] [0, 0] !28 = metadata !{i32 13, i32 0, metadata !11, null} diff --git a/test/DebugInfo/X86/empty-array.ll b/test/DebugInfo/X86/empty-array.ll index 0d8c245..1f46281 100644 --- a/test/DebugInfo/X86/empty-array.ll +++ b/test/DebugInfo/X86/empty-array.ll @@ -24,19 +24,19 @@ !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !6, metadata !"clang version 3.3 (trunk 169136)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !3, metadata !""} ; [ DW_TAG_compile_unit ] [/Volumes/Sandbox/llvm/t.cpp] [DW_LANG_C_plus_plus] +!0 = metadata !{i32 786449, metadata !20, i32 4, metadata !"clang version 3.3 (trunk 169136)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !3, metadata !3, metadata !""} ; [ DW_TAG_compile_unit ] [/Volumes/Sandbox/llvm/t.cpp] [DW_LANG_C_plus_plus] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} !5 = metadata !{i32 786484, i32 0, null, metadata !"a", metadata !"a", metadata !"", metadata !6, i32 1, metadata !7, i32 0, i32 1, %class.A* @a, null} ; [ DW_TAG_variable ] [a] [line 1] [def] !6 = metadata !{i32 786473, metadata !20} ; [ DW_TAG_file_type ] -!7 = metadata !{i32 786434, null, metadata !"A", metadata !6, i32 1, i64 0, i64 32, i32 0, i32 0, null, metadata !8, i32 0, null, null} ; [ DW_TAG_class_type ] [A] [line 1, size 0, align 32, offset 0] [from ] +!7 = metadata !{i32 786434, metadata !20, null, metadata !"A", i32 1, i64 0, i64 32, i32 0, i32 0, null, metadata !8, i32 0, null, null} ; [ DW_TAG_class_type ] [A] [line 1, size 0, align 32, offset 0] [from ] !8 = metadata !{metadata !9, metadata !14} -!9 = metadata !{i32 786445, metadata !7, metadata !"x", metadata !6, i32 1, i64 0, i64 0, i64 0, i32 1, metadata !10} ; [ DW_TAG_member ] [x] [line 1, size 0, align 0, offset 0] [private] [from ] -!10 = metadata !{i32 786433, null, metadata !"", null, i32 0, i64 0, i64 32, i32 0, i32 0, metadata !11, metadata !12, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 0, align 32, offset 0] [from int] -!11 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] +!9 = metadata !{i32 786445, metadata !20, metadata !7, metadata !"x", i32 1, i64 0, i64 0, i64 0, i32 1, metadata !10} ; [ DW_TAG_member ] [x] [line 1, size 0, align 0, offset 0] [private] [from ] +!10 = metadata !{i32 786433, null, null, metadata !"", i32 0, i64 0, i64 32, i32 0, i32 0, metadata !11, metadata !12, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 0, align 32, offset 0] [from int] +!11 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] !12 = metadata !{metadata !13} !13 = metadata !{i32 786465, i64 0, i64 -1} ; [ DW_TAG_subrange_type ] [unbound] -!14 = metadata !{i32 786478, i32 0, metadata !7, metadata !"A", metadata !"A", metadata !"", metadata !6, i32 1, metadata !15, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !18, i32 1} ; [ DW_TAG_subprogram ] [line 1] [A] +!14 = metadata !{i32 786478, metadata !6, metadata !7, metadata !"A", metadata !"A", metadata !"", i32 1, metadata !15, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !18, i32 1} ; [ DW_TAG_subprogram ] [line 1] [A] !15 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !16, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !16 = metadata !{null, metadata !17} !17 = metadata !{i32 786447, i32 0, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 1088, metadata !7} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from A] diff --git a/test/DebugInfo/X86/ending-run.ll b/test/DebugInfo/X86/ending-run.ll index 457f38e..b0156b8 100644 --- a/test/DebugInfo/X86/ending-run.ll +++ b/test/DebugInfo/X86/ending-run.ll @@ -28,10 +28,10 @@ declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !6, metadata !"clang version 3.1 (trunk 153921) (llvm/trunk 153916)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, metadata !19, i32 12, metadata !"clang version 3.1 (trunk 153921) (llvm/trunk 153916)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} -!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"callee", metadata !"callee", metadata !"", metadata !6, i32 4, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 (i32)* @callee, null, null, metadata !10, i32 7} ; [ DW_TAG_subprogram ] +!5 = metadata !{i32 786478, metadata !19, metadata !"callee", metadata !"callee", metadata !"", metadata !6, i32 4, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 (i32)* @callee, null, null, metadata !10, i32 7} ; [ DW_TAG_subprogram ] !6 = metadata !{i32 786473, metadata !19} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !8 = metadata !{metadata !9, metadata !9} @@ -41,7 +41,7 @@ declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone !12 = metadata !{i32 786689, metadata !5, metadata !"x", metadata !6, i32 16777221, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] !13 = metadata !{i32 5, i32 5, metadata !5, null} !14 = metadata !{i32 786688, metadata !15, metadata !"y", metadata !6, i32 8, metadata !9, i32 0, i32 0} ; [ DW_TAG_auto_variable ] -!15 = metadata !{i32 786443, metadata !5, i32 7, i32 1, metadata !6, i32 0} ; [ DW_TAG_lexical_block ] +!15 = metadata !{i32 786443, metadata !19, metadata !5, i32 7, i32 1, i32 0} ; [ DW_TAG_lexical_block ] !16 = metadata !{i32 8, i32 9, metadata !15, null} !17 = metadata !{i32 8, i32 18, metadata !15, null} !18 = metadata !{i32 9, i32 5, metadata !15, null} diff --git a/test/DebugInfo/X86/enum-class.ll b/test/DebugInfo/X86/enum-class.ll index b30b1c1..af6129c 100644 --- a/test/DebugInfo/X86/enum-class.ll +++ b/test/DebugInfo/X86/enum-class.ll @@ -7,18 +7,18 @@ !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !4, metadata !"clang version 3.2 (trunk 157269) (llvm/trunk 157264)", i1 false, metadata !"", i32 0, metadata !1, metadata !15, metadata !15, metadata !17, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, metadata !22, i32 4, metadata !"clang version 3.2 (trunk 157269) (llvm/trunk 157264)", i1 false, metadata !"", i32 0, metadata !1, metadata !15, metadata !15, metadata !17, metadata !17, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{metadata !3, metadata !8, metadata !12} -!3 = metadata !{i32 786436, null, metadata !"A", metadata !4, i32 1, i64 32, i64 32, i32 0, i32 0, metadata !5, metadata !6, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] +!3 = metadata !{i32 786436, metadata !4, null, metadata !"A", i32 1, i64 32, i64 32, i32 0, i32 0, metadata !5, metadata !6, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] !4 = metadata !{i32 786473, metadata !22} ; [ DW_TAG_file_type ] -!5 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!5 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !6 = metadata !{metadata !7} !7 = metadata !{i32 786472, metadata !"A1", i64 1} ; [ DW_TAG_enumerator ] -!8 = metadata !{i32 786436, null, metadata !"B", metadata !4, i32 2, i64 64, i64 64, i32 0, i32 0, metadata !9, metadata !10, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] -!9 = metadata !{i32 786468, null, metadata !"long unsigned int", null, i32 0, i64 64, i64 64, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] +!8 = metadata !{i32 786436, metadata !4, null, metadata !"B", i32 2, i64 64, i64 64, i32 0, i32 0, metadata !9, metadata !10, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] +!9 = metadata !{i32 786468, null, null, metadata !"long unsigned int", i32 0, i64 64, i64 64, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] !10 = metadata !{metadata !11} !11 = metadata !{i32 786472, metadata !"B1", i64 1} ; [ DW_TAG_enumerator ] -!12 = metadata !{i32 786436, null, metadata !"C", metadata !4, i32 3, i64 32, i64 32, i32 0, i32 0, null, metadata !13, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] +!12 = metadata !{i32 786436, metadata !4, null, metadata !"C", i32 3, i64 32, i64 32, i32 0, i32 0, null, metadata !13, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] !13 = metadata !{metadata !14} !14 = metadata !{i32 786472, metadata !"C1", i64 1} ; [ DW_TAG_enumerator ] !15 = metadata !{i32 0} diff --git a/test/DebugInfo/X86/enum-fwd-decl.ll b/test/DebugInfo/X86/enum-fwd-decl.ll index c2ab1bf..f4ff8b4 100644 --- a/test/DebugInfo/X86/enum-fwd-decl.ll +++ b/test/DebugInfo/X86/enum-fwd-decl.ll @@ -5,12 +5,12 @@ !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !6, metadata !"clang version 3.2 (trunk 165274) (llvm/trunk 165272)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !3, metadata !""} ; [ DW_TAG_compile_unit ] [/tmp/foo.cpp] [DW_LANG_C_plus_plus] +!0 = metadata !{i32 786449, i32 4, metadata !6, metadata !"clang version 3.2 (trunk 165274) (llvm/trunk 165272)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !3, metadata !3, metadata !""} ; [ DW_TAG_compile_unit ] [/tmp/foo.cpp] [DW_LANG_C_plus_plus] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} !5 = metadata !{i32 786484, i32 0, null, metadata !"e", metadata !"e", metadata !"", metadata !6, i32 2, metadata !7, i32 0, i32 1, i16* @e, null} ; [ DW_TAG_variable ] [e] [line 2] [def] !6 = metadata !{i32 786473, metadata !"foo.cpp", metadata !"/tmp", null} ; [ DW_TAG_file_type ] -!7 = metadata !{i32 786436, null, metadata !"E", metadata !6, i32 1, i64 16, i64 16, i32 0, i32 4, null, null, i32 0} ; [ DW_TAG_enumeration_type ] [E] [line 1, size 16, align 16, offset 0] [fwd] [from ] +!7 = metadata !{i32 786436, metadata !6, null, metadata !"E", i32 1, i64 16, i64 16, i32 0, i32 4, null, null, i32 0} ; [ DW_TAG_enumeration_type ] [E] [line 1, size 16, align 16, offset 0] [fwd] [from ] ; CHECK: DW_TAG_enumeration_type ; CHECK-NEXT: DW_AT_name diff --git a/test/DebugInfo/X86/fission-cu.ll b/test/DebugInfo/X86/fission-cu.ll index f729449..8ad3c2d 100644 --- a/test/DebugInfo/X86/fission-cu.ll +++ b/test/DebugInfo/X86/fission-cu.ll @@ -1,16 +1,17 @@ ; RUN: llc -split-dwarf=Enable -O0 %s -mtriple=x86_64-unknown-linux-gnu -filetype=obj -o %t ; RUN: llvm-dwarfdump -debug-dump=all %t | FileCheck %s +; RUN: llvm-readobj --relocations %t | FileCheck --check-prefix=OBJ %s @a = common global i32 0, align 4 !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !6, metadata !"clang version 3.3 (trunk 169021) (llvm/trunk 169020)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !3, metadata !"baz.dwo"} ; [ DW_TAG_compile_unit ] [/usr/local/google/home/echristo/tmp/baz.c] [DW_LANG_C99] +!0 = metadata !{i32 786449, metadata !8, i32 12, metadata !"clang version 3.3 (trunk 169021) (llvm/trunk 169020)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !3, metadata !3, metadata !"baz.dwo"} ; [ DW_TAG_compile_unit ] [/usr/local/google/home/echristo/tmp/baz.c] [DW_LANG_C99] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} !5 = metadata !{i32 786484, i32 0, null, metadata !"a", metadata !"a", metadata !"", metadata !6, i32 1, metadata !7, i32 0, i32 1, i32* @a, null} ; [ DW_TAG_variable ] [a] [line 1] [def] !6 = metadata !{i32 786473, metadata !8} ; [ DW_TAG_file_type ] -!7 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] +!7 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] !8 = metadata !{metadata !"baz.c", metadata !"/usr/local/google/home/echristo/tmp"} ; Check that the skeleton compile unit contains the proper attributes: @@ -48,9 +49,9 @@ ; CHECK: DW_AT_producer DW_FORM_GNU_str_index ; CHECK: DW_AT_language DW_FORM_data2 ; CHECK: DW_AT_name DW_FORM_GNU_str_index -; CHECK: DW_AT_low_pc DW_FORM_GNU_addr_index -; CHECK: DW_AT_stmt_list DW_FORM_data4 -; CHECK: DW_AT_comp_dir DW_FORM_GNU_str_index +; CHECK-NOT: DW_AT_low_pc +; CHECK-NOT: DW_AT_stmt_list +; CHECK-NOT: DW_AT_comp_dir ; CHECK: DW_AT_GNU_dwo_id DW_FORM_data8 ; CHECK: [2] DW_TAG_base_type DW_CHILDREN_no @@ -72,29 +73,40 @@ ; CHECK: DW_AT_producer [DW_FORM_GNU_str_index] ( indexed (00000000) string = "clang version 3.3 (trunk 169021) (llvm/trunk 169020)") ; CHECK: DW_AT_language [DW_FORM_data2] (0x000c) ; CHECK: DW_AT_name [DW_FORM_GNU_str_index] ( indexed (00000001) string = "baz.c") -; CHECK: DW_AT_low_pc [DW_FORM_GNU_addr_index] ( indexed (00000000) address = 0x0000000000000000) +; CHECK-NOT: DW_AT_low_pc +; CHECK-NOT: DW_AT_stmt_list +; CHECK-NOT: DW_AT_comp_dir ; CHECK: DW_AT_GNU_dwo_id [DW_FORM_data8] (0x0000000000000000) ; CHECK: DW_TAG_base_type -; CHECK: DW_AT_name [DW_FORM_GNU_str_index] ( indexed (00000004) string = "int") +; CHECK: DW_AT_name [DW_FORM_GNU_str_index] ( indexed (00000003) string = "int") ; CHECK: DW_TAG_variable -; CHECK: DW_AT_name [DW_FORM_GNU_str_index] ( indexed (00000003) string = "a") -; CHECK: DW_AT_type [DW_FORM_ref4] (cu + 0x001e => {0x0000001e}) +; CHECK: DW_AT_name [DW_FORM_GNU_str_index] ( indexed (00000002) string = "a") +; CHECK: DW_AT_type [DW_FORM_ref4] (cu + 0x0018 => {0x00000018}) ; CHECK: DW_AT_external [DW_FORM_flag_present] (true) ; CHECK: DW_AT_decl_file [DW_FORM_data1] (0x01) ; CHECK: DW_AT_decl_line [DW_FORM_data1] (0x01) -; CHECK: DW_AT_location [DW_FORM_block1] (<0x02> fb 01 ) +; CHECK: DW_AT_location [DW_FORM_block1] (<0x02> fb 00 ) ; CHECK: .debug_str.dwo contents: ; CHECK: 0x00000000: "clang version 3.3 (trunk 169021) (llvm/trunk 169020)" ; CHECK: 0x00000035: "baz.c" -; CHECK: 0x0000003b: "/usr/local/google/home/echristo/tmp" -; CHECK: 0x0000005f: "a" -; CHECK: 0x00000061: "int" +; CHECK: 0x0000003b: "a" +; CHECK: 0x0000003d: "int" ; CHECK: .debug_str_offsets.dwo contents: ; CHECK: 0x00000000: 00000000 ; CHECK: 0x00000004: 00000035 ; CHECK: 0x00000008: 0000003b -; CHECK: 0x0000000c: 0000005f -; CHECK: 0x00000010: 00000061 +; CHECK: 0x0000000c: 0000003d + +; Object file checks +; For x86-64-linux we should have this set of relocations for the debug info section +; +; OBJ: .debug_info +; OBJ-NEXT: R_X86_64_32 .debug_abbrev +; OBJ-NEXT: R_X86_64_32 .debug_str +; OBJ-NEXT: R_X86_64_32 .debug_addr +; OBJ-NEXT: R_X86_64_32 .debug_line +; OBJ-NEXT: R_X86_64_32 .debug_str +; OBJ-NEXT: } diff --git a/test/DebugInfo/X86/instcombine-instrinsics.ll b/test/DebugInfo/X86/instcombine-instrinsics.ll new file mode 100644 index 0000000..4466828 --- /dev/null +++ b/test/DebugInfo/X86/instcombine-instrinsics.ll @@ -0,0 +1,100 @@ +; RUN: opt < %s -O2 -S | FileCheck %s +; Verify that we emit the same intrinsic at most once. +; CHECK: call void @llvm.dbg.value(metadata !{%struct.i14** %i14} +; CHECK-NOT: call void @llvm.dbg.value(metadata !{%struct.i14** %i14} +; CHECK: ret + +;*** IR Dump After Dead Argument Elimination *** +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.8.0" + +%struct.i3 = type { i32 } +%struct.i14 = type { i32 } +%struct.i24 = type opaque + +define %struct.i3* @barz(i64 %i9) nounwind { +entry: + br label %while.cond + +while.cond: ; preds = %while.body, %entry + br label %while.body + +while.body: ; preds = %while.cond + br label %while.cond +} + +declare void @llvm.dbg.declare(metadata, metadata) + +define void @init() nounwind { +entry: + %i14 = alloca %struct.i14*, align 8 + call void @llvm.dbg.declare(metadata !{%struct.i14** %i14}, metadata !25) + store %struct.i14* null, %struct.i14** %i14, align 8 + %call = call i32 @foo(i8* bitcast (void ()* @bar to i8*), %struct.i14** %i14) + %0 = load %struct.i14** %i14, align 8 + %i16 = getelementptr inbounds %struct.i14* %0, i32 0, i32 0 + %1 = load i32* %i16, align 4 + %or = or i32 %1, 4 + store i32 %or, i32* %i16, align 4 + %call4 = call i32 @foo(i8* bitcast (void ()* @baz to i8*), %struct.i14** %i14) + ret void +} + +declare i32 @foo(i8*, %struct.i14**) nounwind + +define internal void @bar() nounwind { +entry: + %i9 = alloca i64, align 8 + store i64 0, i64* %i9, align 8 + %call = call i32 @put(i64 0, i64* %i9, i64 0, %struct.i24* null) + ret void +} + +define internal void @baz() nounwind { +entry: + ret void +} + +declare i32 @put(i64, i64*, i64, %struct.i24*) nounwind readnone + +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone + +!llvm.dbg.cu = !{!0} + +!0 = metadata !{i32 786449, metadata !1, i32 12, metadata !"clang version 3.3 ", i1 true, metadata !"", i32 0, metadata !2, metadata !2, metadata !3, metadata !48, metadata !""} ; [ DW_TAG_compile_unit ] +!1 = metadata !{metadata !"i1", metadata !""} +!2 = metadata !{i32 0} +!3 = metadata !{metadata !4, metadata !21, metadata !33, metadata !47} +!4 = metadata !{i32 786478, metadata !1, metadata !5, metadata !"i2", metadata !"i2", metadata !"", i32 31, metadata !6, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, %struct.i3* (i64)* @barz, null, null, metadata !16, i32 32} ; [ DW_TAG_subprogram ] [line 31] [scope 32] +!5 = metadata !{i32 786473, metadata !1} ; [ DW_TAG_file_type ] +!6 = metadata !{i32 786453, i32 0, i32 0, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !7, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!7 = metadata !{metadata !8, metadata !13} +!8 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !9} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from i3] +!9 = metadata !{i32 786451, metadata !1, null, metadata !"i3", i32 25, i64 32, i64 32, i32 0, i32 0, null, metadata !10, i32 0, null, null} ; [ DW_TAG_structure_type ] [line 25, size 32, align 32, offset 0] [from ] +!10 = metadata !{metadata !11} +!11 = metadata !{i32 786445, metadata !1, metadata !9, metadata !"i4", i32 26, i64 32, i64 32, i64 0, i32 0, metadata !12} ; [ DW_TAG_member ] [line 26, size 32, align 32, offset 0] [from i5] +!12 = metadata !{i32 786468, null, null, metadata !"i5", i32 0, i64 32, i64 32, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] [line 0, size 32, align 32, offset 0, enc DW_ATE_unsigned] +!13 = metadata !{i32 786454, metadata !1, null, metadata !"i6", i32 5, i64 0, i64 0, i64 0, i32 0, metadata !14} ; [ DW_TAG_typedef ] [line 5, size 0, align 0, offset 0] [from i7] +!14 = metadata !{i32 786454, metadata !1, null, metadata !"i7", i32 2, i64 0, i64 0, i64 0, i32 0, metadata !15} ; [ DW_TAG_typedef ] [line 2, size 0, align 0, offset 0] [from i8] +!15 = metadata !{i32 786468, null, null, metadata !"i8", i32 0, i64 64, i64 64, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] [line 0, size 64, align 64, offset 0, enc DW_ATE_unsigned] +!16 = metadata !{} +!21 = metadata !{i32 786478, metadata !1, metadata !5, metadata !"i13", metadata !"i13", metadata !"", i32 42, metadata !22, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, void ()* @init, null, null, metadata !24, i32 43} ; [ DW_TAG_subprogram ] [line 42] [scope 43] +!22 = metadata !{i32 786453, i32 0, i32 0, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !23, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!23 = metadata !{null} +!24 = metadata !{metadata !25} +!25 = metadata !{i32 786688, metadata !21, metadata !"i14", metadata !5, i32 45, metadata !27, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [line 45] +!27 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !28} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from i14] +!28 = metadata !{i32 786451, metadata !1, null, metadata !"i14", i32 16, i64 32, i64 32, i32 0, i32 0, null, metadata !29, i32 0, null, null} ; [ DW_TAG_structure_type ] [line 16, size 32, align 32, offset 0] [from ] +!29 = metadata !{metadata !30} +!30 = metadata !{i32 786445, metadata !1, metadata !28, metadata !"i16", i32 17, i64 32, i64 32, i64 0, i32 0, metadata !31} ; [ DW_TAG_member ] [line 17, size 32, align 32, offset 0] [from i17] +!31 = metadata !{i32 786454, metadata !1, null, metadata !"i17", i32 7, i64 0, i64 0, i64 0, i32 0, metadata !32} ; [ DW_TAG_typedef ] [line 7, size 0, align 0, offset 0] [from int] +!32 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] +!33 = metadata !{i32 786478, metadata !1, metadata !5, metadata !"i18", metadata !"i18", metadata !"", i32 54, metadata !22, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 true, void ()* @bar, null, null, metadata !34, i32 55} ; [ DW_TAG_subprogram ] [line 54] [scope 55] +!34 = metadata !{null} +!47 = metadata !{i32 786478, metadata !1, metadata !5, metadata !"i29", metadata !"i29", metadata !"", i32 53, metadata !22, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 true, void ()* @baz, null, null, metadata !2, i32 53} ; [ DW_TAG_subprogram ] [line 53] +!48 = metadata !{metadata !49} +!49 = metadata !{i32 786484, i32 0, metadata !21, metadata !"i30", metadata !"i30", metadata !"", metadata !5, i32 44, metadata !50, i32 1, i32 1, null, null} +!50 = metadata !{i32 786454, metadata !1, null, metadata !"i31", i32 6, i64 0, i64 0, i64 0, i32 0, metadata !32} ; [ DW_TAG_typedef ] [line 6, size 0, align 0, offset 0] [from int] +!52 = metadata !{i64 0} +!55 = metadata !{%struct.i3* null} +!72 = metadata !{%struct.i24* null} diff --git a/test/DebugInfo/X86/line-info.ll b/test/DebugInfo/X86/line-info.ll index 42875ee..fd813b3 100644 --- a/test/DebugInfo/X86/line-info.ll +++ b/test/DebugInfo/X86/line-info.ll @@ -1,7 +1,8 @@ ; RUN: llc -mtriple=x86_64-apple-darwin -filetype=obj -O0 < %s > %t ; RUN: llvm-dwarfdump %t | FileCheck %s -; CHECK: 2 0 1 0 is_stmt +; CHECK: [[FILEID:[0-9]+]]]{{.*}}list0.h +; CHECK: [[FILEID]] 0 1 0 is_stmt{{$}} ; IR generated from clang -g -emit-llvm with the following source: ; list0.h: @@ -13,7 +14,7 @@ ; int main() { ; } -define i32 @foo(i32 %x) nounwind uwtable { +define i32 @foo(i32 %x) #0 { entry: %x.addr = alloca i32, align 4 store i32 %x, i32* %x.addr, align 4 @@ -24,29 +25,34 @@ entry: ret i32 %inc, !dbg !16 } -declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone +declare void @llvm.dbg.declare(metadata, metadata) #1 -define i32 @main() nounwind uwtable { +define i32 @main() #0 { entry: ret i32 0, !dbg !17 } +attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { nounwind readnone } + !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !6, metadata !"clang version 3.3 ", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] [/usr/local/google/home/blaikie/dev/scratch/pr14566/list0.c] [DW_LANG_C99] -!1 = metadata !{i32 0} -!3 = metadata !{metadata !5, metadata !10} -!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"foo", metadata !"foo", metadata !"", metadata !6, i32 1, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (i32)* @foo, null, null, metadata !1, i32 1} ; [ DW_TAG_subprogram ] [line 1] [def] [foo] -!6 = metadata !{i32 786473, metadata !"./list0.h", metadata !"/usr/local/google/home/blaikie/dev/scratch/pr14566", null} ; [ DW_TAG_file_type ] -!7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!0 = metadata !{i32 786449, metadata !1, i32 12, metadata !"clang version 3.3 ", i1 false, metadata !"", i32 0, metadata !2, metadata !2, metadata !3, metadata !2, metadata !2, metadata !""} ; [ DW_TAG_compile_unit ] [/usr/local/google/home/blaikie/dev/scratch/list0.c] [DW_LANG_C99] +!1 = metadata !{metadata !"list0.c", metadata !"/usr/local/google/home/blaikie/dev/scratch"} +!2 = metadata !{i32 0} +!3 = metadata !{metadata !4, metadata !10} +!4 = metadata !{i32 786478, metadata !5, metadata !6, metadata !"foo", metadata !"foo", metadata !"", i32 1, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (i32)* @foo, null, null, metadata !2, i32 1} ; [ DW_TAG_subprogram ] [line 1] [def] [foo] +!5 = metadata !{metadata !"./list0.h", metadata !"/usr/local/google/home/blaikie/dev/scratch"} +!6 = metadata !{i32 786473, metadata !5} ; [ DW_TAG_file_type ] [/usr/local/google/home/blaikie/dev/scratch/./list0.h] +!7 = metadata !{i32 786453, i32 0, i32 0, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !8 = metadata !{metadata !9, metadata !9} -!9 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] -!10 = metadata !{i32 786478, i32 0, metadata !11, metadata !"main", metadata !"main", metadata !"", metadata !11, i32 2, metadata !12, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main, null, null, metadata !1, i32 2} ; [ DW_TAG_subprogram ] [line 2] [def] [main] -!11 = metadata !{i32 786473, metadata !"list0.c", metadata !"/usr/local/google/home/blaikie/dev/scratch/pr14566", null} ; [ DW_TAG_file_type ] -!12 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !13, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!9 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] +!10 = metadata !{i32 786478, metadata !1, metadata !11, metadata !"main", metadata !"main", metadata !"", i32 2, metadata !12, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main, null, null, metadata !2, i32 2} ; [ DW_TAG_subprogram ] [line 2] [def] [main] +!11 = metadata !{i32 786473, metadata !1} ; [ DW_TAG_file_type ] [/usr/local/google/home/blaikie/dev/scratch/list0.c] +!12 = metadata !{i32 786453, i32 0, i32 0, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !13, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !13 = metadata !{metadata !9} -!14 = metadata !{i32 786689, metadata !5, metadata !"x", metadata !6, i32 16777217, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [x] [line 1] -!15 = metadata !{i32 1, i32 0, metadata !5, null} -!16 = metadata !{i32 2, i32 0, metadata !5, null} +!14 = metadata !{i32 786689, metadata !4, metadata !"x", metadata !6, i32 16777217, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [x] [line 1] +!15 = metadata !{i32 1, i32 0, metadata !4, null} +!16 = metadata !{i32 2, i32 0, metadata !4, null} !17 = metadata !{i32 3, i32 0, metadata !18, null} -!18 = metadata !{i32 786443, metadata !10, metadata !11} ; [ DW_TAG_lexical_block ] [/usr/local/google/home/blaikie/dev/scratch/pr14566/list0.c] +!18 = metadata !{i32 786443, metadata !11, metadata !10} ; [ DW_TAG_lexical_block ] [/usr/local/google/home/blaikie/dev/scratch/list0.c] diff --git a/test/DebugInfo/X86/linkage-name.ll b/test/DebugInfo/X86/linkage-name.ll index c33a91c..c9bd2cf 100644 --- a/test/DebugInfo/X86/linkage-name.ll +++ b/test/DebugInfo/X86/linkage-name.ll @@ -26,18 +26,18 @@ declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !6, metadata !"clang version 3.1 (trunk 152691) (llvm/trunk 152692)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !18, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, i32 4, metadata !6, metadata !"clang version 3.1 (trunk 152691) (llvm/trunk 152692)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !18, metadata !18, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} -!5 = metadata !{i32 786478, i32 0, null, metadata !"a", metadata !"a", metadata !"_ZN1A1aEi", metadata !6, i32 5, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (%class.A*, i32)* @_ZN1A1aEi, null, metadata !13, metadata !16, i32 5} ; [ DW_TAG_subprogram ] +!5 = metadata !{i32 786478, metadata !6, null, metadata !"a", metadata !"a", metadata !"_ZN1A1aEi", i32 5, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (%class.A*, i32)* @_ZN1A1aEi, null, metadata !13, metadata !16, i32 5} ; [ DW_TAG_subprogram ] !6 = metadata !{i32 786473, metadata !28} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !8 = metadata !{metadata !9, metadata !10, metadata !9} -!9 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!9 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !10 = metadata !{i32 786447, i32 0, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !11} ; [ DW_TAG_pointer_type ] -!11 = metadata !{i32 786434, null, metadata !"A", metadata !6, i32 1, i64 8, i64 8, i32 0, i32 0, null, metadata !12, i32 0, null, null} ; [ DW_TAG_class_type ] +!11 = metadata !{i32 786434, metadata !28, null, metadata !"A", i32 1, i64 8, i64 8, i32 0, i32 0, null, metadata !12, i32 0, null, null} ; [ DW_TAG_class_type ] !12 = metadata !{metadata !13} -!13 = metadata !{i32 786478, i32 0, metadata !11, metadata !"a", metadata !"a", metadata !"_ZN1A1aEi", metadata !6, i32 2, metadata !7, i1 false, i1 false, i32 0, i32 0, null, i32 257, i1 false, null, null, i32 0, metadata !14} ; [ DW_TAG_subprogram ] +!13 = metadata !{i32 786478, metadata !6, metadata !11, metadata !"a", metadata !"a", metadata !"_ZN1A1aEi", i32 2, metadata !7, i1 false, i1 false, i32 0, i32 0, null, i32 257, i1 false, null, null, i32 0, metadata !14} ; [ DW_TAG_subprogram ] !14 = metadata !{metadata !15} !15 = metadata !{i32 786468} ; [ DW_TAG_base_type ] !16 = metadata !{metadata !17} @@ -45,10 +45,10 @@ declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone !18 = metadata !{metadata !20} !20 = metadata !{i32 786484, i32 0, null, metadata !"a", metadata !"a", metadata !"", metadata !6, i32 9, metadata !11, i32 0, i32 1, %class.A* @a, null} ; [ DW_TAG_variable ] !21 = metadata !{i32 786689, metadata !5, metadata !"this", metadata !6, i32 16777221, metadata !22, i32 64, i32 0} ; [ DW_TAG_arg_variable ] -!22 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !11} ; [ DW_TAG_pointer_type ] +!22 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !11} ; [ DW_TAG_pointer_type ] !23 = metadata !{i32 5, i32 8, metadata !5, null} !24 = metadata !{i32 786689, metadata !5, metadata !"b", metadata !6, i32 33554437, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] !25 = metadata !{i32 5, i32 14, metadata !5, null} !26 = metadata !{i32 6, i32 4, metadata !27, null} -!27 = metadata !{i32 786443, metadata !5, i32 5, i32 17, metadata !6, i32 0} ; [ DW_TAG_lexical_block ] +!27 = metadata !{i32 786443, metadata !6, metadata !5, i32 5, i32 17, i32 0} ; [ DW_TAG_lexical_block ] !28 = metadata !{metadata !"foo.cpp", metadata !"/Users/echristo"} diff --git a/test/DebugInfo/X86/low-pc-cu.ll b/test/DebugInfo/X86/low-pc-cu.ll index 1e57fcd..77f69b9 100644 --- a/test/DebugInfo/X86/low-pc-cu.ll +++ b/test/DebugInfo/X86/low-pc-cu.ll @@ -14,16 +14,16 @@ entry: !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !6, metadata !"clang version 3.1 (trunk 153454) (llvm/trunk 153471)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, i32 4, metadata !6, metadata !"clang version 3.1 (trunk 153454) (llvm/trunk 153471)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5, metadata !12} -!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"q", metadata !"q", metadata !"_Z1qv", metadata !6, i32 5, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 ()* @_Z1qv, null, null, metadata !10} ; [ DW_TAG_subprogram ] +!5 = metadata !{i32 786478, metadata !"_Z1qv", i32 0, metadata !6, metadata !"q", metadata !"q", metadata !6, i32 5, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 ()* @_Z1qv, null, null, metadata !10} ; [ DW_TAG_subprogram ] !6 = metadata !{i32 786473, metadata !"foo.cpp", metadata !"/Users/echristo/tmp", null} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !8 = metadata !{metadata !9} !9 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !10 = metadata !{metadata !11} !11 = metadata !{i32 786468} ; [ DW_TAG_base_type ] -!12 = metadata !{i32 786478, i32 0, metadata !6, metadata !"t", metadata !"t", metadata !"", metadata !6, i32 2, metadata !7, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, null, null, null, metadata !10} ; [ DW_TAG_subprogram ] +!12 = metadata !{i32 786478, metadata !"", i32 0, metadata !6, metadata !"t", metadata !"t", metadata !6, i32 2, metadata !7, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, null, null, null, metadata !10} ; [ DW_TAG_subprogram ] !13 = metadata !{i32 7, i32 1, metadata !14, null} !14 = metadata !{i32 786443, metadata !5, i32 5, i32 1, metadata !6, i32 0} ; [ DW_TAG_lexical_block ] diff --git a/test/DebugInfo/X86/misched-dbg-value.ll b/test/DebugInfo/X86/misched-dbg-value.ll index 7fe8441..4b78c88 100644 --- a/test/DebugInfo/X86/misched-dbg-value.ll +++ b/test/DebugInfo/X86/misched-dbg-value.ll @@ -43,15 +43,15 @@ entry: tail call void @llvm.dbg.value(metadata !{i32 %add}, i64 0, metadata !27), !dbg !68 %idxprom = sext i32 %add to i64, !dbg !69 %arrayidx = getelementptr inbounds i32* %Array1Par, i64 %idxprom, !dbg !69 - store i32 %IntParI2, i32* %arrayidx, align 4, !dbg !69, !tbaa !70 + store i32 %IntParI2, i32* %arrayidx, align 4, !dbg !69 %add3 = add nsw i32 %IntParI1, 6, !dbg !73 %idxprom4 = sext i32 %add3 to i64, !dbg !73 %arrayidx5 = getelementptr inbounds i32* %Array1Par, i64 %idxprom4, !dbg !73 - store i32 %IntParI2, i32* %arrayidx5, align 4, !dbg !73, !tbaa !70 + store i32 %IntParI2, i32* %arrayidx5, align 4, !dbg !73 %add6 = add nsw i32 %IntParI1, 35, !dbg !74 %idxprom7 = sext i32 %add6 to i64, !dbg !74 %arrayidx8 = getelementptr inbounds i32* %Array1Par, i64 %idxprom7, !dbg !74 - store i32 %add, i32* %arrayidx8, align 4, !dbg !74, !tbaa !70 + store i32 %add, i32* %arrayidx8, align 4, !dbg !74 tail call void @llvm.dbg.value(metadata !{i32 %add}, i64 0, metadata !28), !dbg !75 br label %for.body, !dbg !75 @@ -59,7 +59,7 @@ for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %idxprom, %entry ], [ %indvars.iv.next, %for.body ] %IntIndex.046 = phi i32 [ %add, %entry ], [ %inc, %for.body ] %arrayidx13 = getelementptr inbounds [51 x i32]* %Array2Par, i64 %idxprom, i64 %indvars.iv, !dbg !77 - store i32 %add, i32* %arrayidx13, align 4, !dbg !77, !tbaa !70 + store i32 %add, i32* %arrayidx13, align 4, !dbg !77 %inc = add nsw i32 %IntIndex.046, 1, !dbg !75 tail call void @llvm.dbg.value(metadata !{i32 %inc}, i64 0, metadata !28), !dbg !75 %cmp = icmp sgt i32 %inc, %add3, !dbg !75 @@ -70,15 +70,15 @@ for.end: ; preds = %for.body %sub = add nsw i32 %IntParI1, 4, !dbg !78 %idxprom14 = sext i32 %sub to i64, !dbg !78 %arrayidx17 = getelementptr inbounds [51 x i32]* %Array2Par, i64 %idxprom, i64 %idxprom14, !dbg !78 - %0 = load i32* %arrayidx17, align 4, !dbg !78, !tbaa !70 + %0 = load i32* %arrayidx17, align 4, !dbg !78 %inc18 = add nsw i32 %0, 1, !dbg !78 - store i32 %inc18, i32* %arrayidx17, align 4, !dbg !78, !tbaa !70 - %1 = load i32* %arrayidx, align 4, !dbg !79, !tbaa !70 + store i32 %inc18, i32* %arrayidx17, align 4, !dbg !78 + %1 = load i32* %arrayidx, align 4, !dbg !79 %add22 = add nsw i32 %IntParI1, 25, !dbg !79 %idxprom23 = sext i32 %add22 to i64, !dbg !79 %arrayidx25 = getelementptr inbounds [51 x i32]* %Array2Par, i64 %idxprom23, i64 %idxprom, !dbg !79 - store i32 %1, i32* %arrayidx25, align 4, !dbg !79, !tbaa !70 - store i32 5, i32* @IntGlob, align 4, !dbg !80, !tbaa !70 + store i32 %1, i32* %arrayidx25, align 4, !dbg !79 + store i32 5, i32* @IntGlob, align 4, !dbg !80 ret void, !dbg !81 } @@ -89,9 +89,9 @@ attributes #1 = { nounwind readnone } !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !3, metadata !"clang version 3.3 (trunk 175015)", i1 true, metadata !"", i32 0, metadata !1, metadata !10, metadata !11, metadata !29, metadata !""} ; [ DW_TAG_compile_unit ] [/Users/manmanren/test-Nov/rdar_13183203/test2/dry.c] [DW_LANG_C99] +!0 = metadata !{i32 786449, i32 12, metadata !3, metadata !"clang version 3.3 (trunk 175015)", i1 true, metadata !"", i32 0, metadata !1, metadata !10, metadata !11, metadata !29, metadata !29, metadata !""} ; [ DW_TAG_compile_unit ] [/Users/manmanren/test-Nov/rdar_13183203/test2/dry.c] [DW_LANG_C99] !1 = metadata !{metadata !2} -!2 = metadata !{i32 786436, null, metadata !"", metadata !3, i32 128, i64 32, i64 32, i32 0, i32 0, null, metadata !4, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] [line 128, size 32, align 32, offset 0] [from ] +!2 = metadata !{i32 786436, metadata !82, null, metadata !"", i32 128, i64 32, i64 32, i32 0, i32 0, null, metadata !4, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] [line 128, size 32, align 32, offset 0] [from ] !3 = metadata !{i32 786473, metadata !82} ; [ DW_TAG_file_type ] !4 = metadata !{metadata !5, metadata !6, metadata !7, metadata !8, metadata !9} !5 = metadata !{i32 786472, metadata !"Ident1", i64 0} ; [ DW_TAG_enumerator ] [Ident1 :: 0] @@ -101,16 +101,16 @@ attributes #1 = { nounwind readnone } !9 = metadata !{i32 786472, metadata !"Ident5", i64 10003} ; [ DW_TAG_enumerator ] [Ident5 :: 10003] !10 = metadata !{i32 0} !11 = metadata !{metadata !12} -!12 = metadata !{i32 786478, i32 0, metadata !3, metadata !"Proc8", metadata !"Proc8", metadata !"", metadata !3, i32 180, metadata !13, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 true, void (i32*, [51 x i32]*, i32, i32)* @Proc8, null, null, metadata !22, i32 185} ; [ DW_TAG_subprogram ] [line 180] [def] [scope 185] [Proc8] +!12 = metadata !{i32 786478, metadata !3, metadata !"Proc8", metadata !"Proc8", metadata !"", metadata !3, i32 180, metadata !13, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 true, void (i32*, [51 x i32]*, i32, i32)* @Proc8, null, null, metadata !22, i32 185} ; [ DW_TAG_subprogram ] [line 180] [def] [scope 185] [Proc8] !13 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !14, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !14 = metadata !{null, metadata !15, metadata !17, metadata !21, metadata !21} -!15 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !16} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from int] -!16 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] -!17 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !18} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from ] -!18 = metadata !{i32 786433, null, metadata !"", null, i32 0, i64 1632, i64 32, i32 0, i32 0, metadata !16, metadata !19, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 1632, align 32, offset 0] [from int] +!15 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !16} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from int] +!16 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] +!17 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !18} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from ] +!18 = metadata !{i32 786433, null, null, metadata !"", i32 0, i64 1632, i64 32, i32 0, i32 0, metadata !16, metadata !19, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 1632, align 32, offset 0] [from int] !19 = metadata !{metadata !20} !20 = metadata !{i32 786465, i64 0, i64 51} ; [ DW_TAG_subrange_type ] [0, 50] -!21 = metadata !{i32 786454, null, metadata !"OneToFifty", metadata !3, i32 132, i64 0, i64 0, i64 0, i32 0, metadata !16} ; [ DW_TAG_typedef ] [OneToFifty] [line 132, size 0, align 0, offset 0] [from int] +!21 = metadata !{i32 786454, metadata !82, null, metadata !"OneToFifty", i32 132, i64 0, i64 0, i64 0, i32 0, metadata !16} ; [ DW_TAG_typedef ] [OneToFifty] [line 132, size 0, align 0, offset 0] [from int] !22 = metadata !{metadata !23, metadata !24, metadata !25, metadata !26, metadata !27, metadata !28} !23 = metadata !{i32 786689, metadata !12, metadata !"Array1Par", metadata !3, i32 16777397, metadata !15, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [Array1Par] [line 181] !24 = metadata !{i32 786689, metadata !12, metadata !"Array2Par", metadata !3, i32 33554614, metadata !17, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [Array2Par] [line 182] @@ -120,36 +120,36 @@ attributes #1 = { nounwind readnone } !28 = metadata !{i32 786688, metadata !12, metadata !"IntIndex", metadata !3, i32 187, metadata !21, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [IntIndex] [line 187] !29 = metadata !{metadata !30, metadata !35, metadata !36, metadata !38, metadata !39, metadata !40, metadata !42, metadata !46, metadata !63} !30 = metadata !{i32 786484, i32 0, null, metadata !"Version", metadata !"Version", metadata !"", metadata !3, i32 111, metadata !31, i32 0, i32 1, [4 x i8]* @Version, null} ; [ DW_TAG_variable ] [Version] [line 111] [def] -!31 = metadata !{i32 786433, null, metadata !"", null, i32 0, i64 32, i64 8, i32 0, i32 0, metadata !32, metadata !33, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 32, align 8, offset 0] [from char] -!32 = metadata !{i32 786468, null, metadata !"char", null, i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ] [char] [line 0, size 8, align 8, offset 0, enc DW_ATE_signed_char] +!31 = metadata !{i32 786433, null, null, metadata !"", i32 0, i64 32, i64 8, i32 0, i32 0, metadata !32, metadata !33, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 32, align 8, offset 0] [from char] +!32 = metadata !{i32 786468, null, null, metadata !"char", i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ] [char] [line 0, size 8, align 8, offset 0, enc DW_ATE_signed_char] !33 = metadata !{metadata !34} !34 = metadata !{i32 786465, i64 0, i64 4} ; [ DW_TAG_subrange_type ] [0, 3] !35 = metadata !{i32 786484, i32 0, null, metadata !"IntGlob", metadata !"IntGlob", metadata !"", metadata !3, i32 171, metadata !16, i32 0, i32 1, i32* @IntGlob, null} ; [ DW_TAG_variable ] [IntGlob] [line 171] [def] !36 = metadata !{i32 786484, i32 0, null, metadata !"BoolGlob", metadata !"BoolGlob", metadata !"", metadata !3, i32 172, metadata !37, i32 0, i32 1, i32* @BoolGlob, null} ; [ DW_TAG_variable ] [BoolGlob] [line 172] [def] -!37 = metadata !{i32 786454, null, metadata !"boolean", metadata !3, i32 149, i64 0, i64 0, i64 0, i32 0, metadata !16} ; [ DW_TAG_typedef ] [boolean] [line 149, size 0, align 0, offset 0] [from int] +!37 = metadata !{i32 786454, metadata !82, null, metadata !"boolean", i32 149, i64 0, i64 0, i64 0, i32 0, metadata !16} ; [ DW_TAG_typedef ] [boolean] [line 149, size 0, align 0, offset 0] [from int] !38 = metadata !{i32 786484, i32 0, null, metadata !"Char1Glob", metadata !"Char1Glob", metadata !"", metadata !3, i32 173, metadata !32, i32 0, i32 1, i8* @Char1Glob, null} ; [ DW_TAG_variable ] [Char1Glob] [line 173] [def] !39 = metadata !{i32 786484, i32 0, null, metadata !"Char2Glob", metadata !"Char2Glob", metadata !"", metadata !3, i32 174, metadata !32, i32 0, i32 1, i8* @Char2Glob, null} ; [ DW_TAG_variable ] [Char2Glob] [line 174] [def] !40 = metadata !{i32 786484, i32 0, null, metadata !"Array1Glob", metadata !"Array1Glob", metadata !"", metadata !3, i32 175, metadata !41, i32 0, i32 1, [51 x i32]* @Array1Glob, null} ; [ DW_TAG_variable ] [Array1Glob] [line 175] [def] -!41 = metadata !{i32 786454, null, metadata !"Array1Dim", metadata !3, i32 135, i64 0, i64 0, i64 0, i32 0, metadata !18} ; [ DW_TAG_typedef ] [Array1Dim] [line 135, size 0, align 0, offset 0] [from ] +!41 = metadata !{i32 786454, metadata !82, null, metadata !"Array1Dim", i32 135, i64 0, i64 0, i64 0, i32 0, metadata !18} ; [ DW_TAG_typedef ] [Array1Dim] [line 135, size 0, align 0, offset 0] [from ] !42 = metadata !{i32 786484, i32 0, null, metadata !"Array2Glob", metadata !"Array2Glob", metadata !"", metadata !3, i32 176, metadata !43, i32 0, i32 1, [51 x [51 x i32]]* @Array2Glob, null} ; [ DW_TAG_variable ] [Array2Glob] [line 176] [def] -!43 = metadata !{i32 786454, null, metadata !"Array2Dim", metadata !3, i32 136, i64 0, i64 0, i64 0, i32 0, metadata !44} ; [ DW_TAG_typedef ] [Array2Dim] [line 136, size 0, align 0, offset 0] [from ] -!44 = metadata !{i32 786433, null, metadata !"", null, i32 0, i64 83232, i64 32, i32 0, i32 0, metadata !16, metadata !45, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 83232, align 32, offset 0] [from int] +!43 = metadata !{i32 786454, metadata !82, null, metadata !"Array2Dim", i32 136, i64 0, i64 0, i64 0, i32 0, metadata !44} ; [ DW_TAG_typedef ] [Array2Dim] [line 136, size 0, align 0, offset 0] [from ] +!44 = metadata !{i32 786433, null, null, metadata !"", i32 0, i64 83232, i64 32, i32 0, i32 0, metadata !16, metadata !45, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 83232, align 32, offset 0] [from int] !45 = metadata !{metadata !20, metadata !20} !46 = metadata !{i32 786484, i32 0, null, metadata !"PtrGlb", metadata !"PtrGlb", metadata !"", metadata !3, i32 177, metadata !47, i32 0, i32 1, %struct.Record** @PtrGlb, null} ; [ DW_TAG_variable ] [PtrGlb] [line 177] [def] -!47 = metadata !{i32 786454, null, metadata !"RecordPtr", metadata !3, i32 148, i64 0, i64 0, i64 0, i32 0, metadata !48} ; [ DW_TAG_typedef ] [RecordPtr] [line 148, size 0, align 0, offset 0] [from ] -!48 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !49} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from RecordType] -!49 = metadata !{i32 786454, null, metadata !"RecordType", metadata !3, i32 147, i64 0, i64 0, i64 0, i32 0, metadata !50} ; [ DW_TAG_typedef ] [RecordType] [line 147, size 0, align 0, offset 0] [from Record] -!50 = metadata !{i32 786451, null, metadata !"Record", metadata !3, i32 138, i64 448, i64 64, i32 0, i32 0, null, metadata !51, i32 0, i32 0, i32 0} ; [ DW_TAG_structure_type ] [Record] [line 138, size 448, align 64, offset 0] [from ] +!47 = metadata !{i32 786454, metadata !82, null, metadata !"RecordPtr", i32 148, i64 0, i64 0, i64 0, i32 0, metadata !48} ; [ DW_TAG_typedef ] [RecordPtr] [line 148, size 0, align 0, offset 0] [from ] +!48 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !49} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from RecordType] +!49 = metadata !{i32 786454, metadata !82, null, metadata !"RecordType", i32 147, i64 0, i64 0, i64 0, i32 0, metadata !50} ; [ DW_TAG_typedef ] [RecordType] [line 147, size 0, align 0, offset 0] [from Record] +!50 = metadata !{i32 786451, metadata !82, null, metadata !"Record", i32 138, i64 448, i64 64, i32 0, i32 0, null, metadata !51, i32 0, i32 0, i32 0} ; [ DW_TAG_structure_type ] [Record] [line 138, size 448, align 64, offset 0] [from ] !51 = metadata !{metadata !52, metadata !54, metadata !56, metadata !57, metadata !58} -!52 = metadata !{i32 786445, metadata !50, metadata !"PtrComp", metadata !3, i32 140, i64 64, i64 64, i64 0, i32 0, metadata !53} ; [ DW_TAG_member ] [PtrComp] [line 140, size 64, align 64, offset 0] [from ] -!53 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !50} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from Record] -!54 = metadata !{i32 786445, metadata !50, metadata !"Discr", metadata !3, i32 141, i64 32, i64 32, i64 64, i32 0, metadata !55} ; [ DW_TAG_member ] [Discr] [line 141, size 32, align 32, offset 64] [from Enumeration] -!55 = metadata !{i32 786454, null, metadata !"Enumeration", metadata !3, i32 128, i64 0, i64 0, i64 0, i32 0, metadata !2} ; [ DW_TAG_typedef ] [Enumeration] [line 128, size 0, align 0, offset 0] [from ] -!56 = metadata !{i32 786445, metadata !50, metadata !"EnumComp", metadata !3, i32 142, i64 32, i64 32, i64 96, i32 0, metadata !55} ; [ DW_TAG_member ] [EnumComp] [line 142, size 32, align 32, offset 96] [from Enumeration] -!57 = metadata !{i32 786445, metadata !50, metadata !"IntComp", metadata !3, i32 143, i64 32, i64 32, i64 128, i32 0, metadata !21} ; [ DW_TAG_member ] [IntComp] [line 143, size 32, align 32, offset 128] [from OneToFifty] -!58 = metadata !{i32 786445, metadata !50, metadata !"StringComp", metadata !3, i32 144, i64 248, i64 8, i64 160, i32 0, metadata !59} ; [ DW_TAG_member ] [StringComp] [line 144, size 248, align 8, offset 160] [from String30] -!59 = metadata !{i32 786454, null, metadata !"String30", metadata !3, i32 134, i64 0, i64 0, i64 0, i32 0, metadata !60} ; [ DW_TAG_typedef ] [String30] [line 134, size 0, align 0, offset 0] [from ] -!60 = metadata !{i32 786433, null, metadata !"", null, i32 0, i64 248, i64 8, i32 0, i32 0, metadata !32, metadata !61, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 248, align 8, offset 0] [from char] +!52 = metadata !{i32 786445, metadata !82, metadata !50, metadata !"PtrComp", i32 140, i64 64, i64 64, i64 0, i32 0, metadata !53} ; [ DW_TAG_member ] [PtrComp] [line 140, size 64, align 64, offset 0] [from ] +!53 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !50} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from Record] +!54 = metadata !{i32 786445, metadata !82, metadata !50, metadata !"Discr", i32 141, i64 32, i64 32, i64 64, i32 0, metadata !55} ; [ DW_TAG_member ] [Discr] [line 141, size 32, align 32, offset 64] [from Enumeration] +!55 = metadata !{i32 786454, metadata !82, null, metadata !"Enumeration", i32 128, i64 0, i64 0, i64 0, i32 0, metadata !2} ; [ DW_TAG_typedef ] [Enumeration] [line 128, size 0, align 0, offset 0] [from ] +!56 = metadata !{i32 786445, metadata !82, metadata !50, metadata !"EnumComp", i32 142, i64 32, i64 32, i64 96, i32 0, metadata !55} ; [ DW_TAG_member ] [EnumComp] [line 142, size 32, align 32, offset 96] [from Enumeration] +!57 = metadata !{i32 786445, metadata !82, metadata !50, metadata !"IntComp", i32 143, i64 32, i64 32, i64 128, i32 0, metadata !21} ; [ DW_TAG_member ] [IntComp] [line 143, size 32, align 32, offset 128] [from OneToFifty] +!58 = metadata !{i32 786445, metadata !82, metadata !50, metadata !"StringComp", i32 144, i64 248, i64 8, i64 160, i32 0, metadata !59} ; [ DW_TAG_member ] [StringComp] [line 144, size 248, align 8, offset 160] [from String30] +!59 = metadata !{i32 786454, metadata !82, null, metadata !"String30", i32 134, i64 0, i64 0, i64 0, i32 0, metadata !60} ; [ DW_TAG_typedef ] [String30] [line 134, size 0, align 0, offset 0] [from ] +!60 = metadata !{i32 786433, null, null, metadata !"", i32 0, i64 248, i64 8, i32 0, i32 0, metadata !32, metadata !61, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 248, align 8, offset 0] [from char] !61 = metadata !{metadata !62} !62 = metadata !{i32 786465, i64 0, i64 31} ; [ DW_TAG_subrange_type ] [0, 30] !63 = metadata !{i32 786484, i32 0, null, metadata !"PtrGlbNext", metadata !"PtrGlbNext", metadata !"", metadata !3, i32 178, metadata !47, i32 0, i32 1, %struct.Record** @PtrGlbNext, null} ; [ DW_TAG_variable ] [PtrGlbNext] [line 178] [def] @@ -159,9 +159,6 @@ attributes #1 = { nounwind readnone } !67 = metadata !{i32 184, i32 0, metadata !12, null} !68 = metadata !{i32 189, i32 0, metadata !12, null} !69 = metadata !{i32 190, i32 0, metadata !12, null} -!70 = metadata !{metadata !"int", metadata !71} -!71 = metadata !{metadata !"omnipotent char", metadata !72} -!72 = metadata !{metadata !"Simple C/C++ TBAA"} !73 = metadata !{i32 191, i32 0, metadata !12, null} !74 = metadata !{i32 192, i32 0, metadata !12, null} !75 = metadata !{i32 193, i32 0, metadata !76, null} diff --git a/test/DebugInfo/X86/multiple-at-const-val.ll b/test/DebugInfo/X86/multiple-at-const-val.ll index c7e5e94..7779d1e 100644 --- a/test/DebugInfo/X86/multiple-at-const-val.ll +++ b/test/DebugInfo/X86/multiple-at-const-val.ll @@ -31,25 +31,25 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !961, metadata !"clang version 3.3 (trunk 174207)", i1 true, metadata !"", i32 0, metadata !1, metadata !955, metadata !956, metadata !1786, metadata !""} ; [ DW_TAG_compile_unit ] [/privite/tmp/student2.cpp] [DW_LANG_C_plus_plus] +!0 = metadata !{i32 786449, i32 4, metadata !961, metadata !"clang version 3.3 (trunk 174207)", i1 true, metadata !"", i32 0, metadata !1, metadata !955, metadata !956, metadata !1786, metadata !1786, metadata !""} ; [ DW_TAG_compile_unit ] [/privite/tmp/student2.cpp] [DW_LANG_C_plus_plus] !1 = metadata !{metadata !26} !4 = metadata !{i32 786489, null, metadata !"std", metadata !5, i32 48} ; [ DW_TAG_namespace ] !5 = metadata !{i32 786473, metadata !1801} ; [ DW_TAG_file_type ] !25 = metadata !{i32 786472, metadata !"_S_os_fmtflags_end", i64 65536} ; [ DW_TAG_enumerator ] -!26 = metadata !{i32 786436, metadata !4, metadata !"_Ios_Iostate", metadata !5, i32 146, i64 32, i64 32, i32 0, i32 0, null, metadata !27, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] +!26 = metadata !{i32 786436, metadata !1801, metadata !4, metadata !"_Ios_Iostate", i32 146, i64 32, i64 32, i32 0, i32 0, null, metadata !27, i32 0, i32 0} ; [ DW_TAG_enumeration_type ] !27 = metadata !{metadata !28, metadata !29, metadata !30, metadata !31, metadata !32} !28 = metadata !{i32 786472, metadata !"_S_goodbit", i64 0} ; [ DW_TAG_enumerator ] [_S_goodbit :: 0] !29 = metadata !{i32 786472, metadata !"_S_badbit", i64 1} ; [ DW_TAG_enumerator ] [_S_badbit :: 1] !30 = metadata !{i32 786472, metadata !"_S_eofbit", i64 2} ; [ DW_TAG_enumerator ] [_S_eofbit :: 2] !31 = metadata !{i32 786472, metadata !"_S_failbit", i64 4} ; [ DW_TAG_enumerator ] [_S_failbit :: 4] !32 = metadata !{i32 786472, metadata !"_S_os_ostate_end", i64 65536} ; [ DW_TAG_enumerator ] [_S_os_ostate_end :: 65536] -!49 = metadata !{i32 786434, metadata !4, metadata !"os_base", metadata !5, i32 200, i64 1728, i64 64, i32 0, i32 0, null, metadata !50, i32 0, metadata !49, null} ; [ DW_TAG_class_type ] +!49 = metadata !{i32 786434, metadata !1801, metadata !4, metadata !"os_base", i32 200, i64 1728, i64 64, i32 0, i32 0, null, metadata !50, i32 0, metadata !49, null} ; [ DW_TAG_class_type ] !50 = metadata !{metadata !77} !54 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !55, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !55 = metadata !{metadata !56} -!56 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!77 = metadata !{i32 786445, metadata !49, metadata !"badbit", metadata !5, i32 331, i64 0, i64 0, i64 0, i32 4096, metadata !78, i32 1} ; [ DW_TAG_member ] -!78 = metadata !{i32 786470, null, metadata !"", null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !79} ; [ DW_TAG_const_type ] +!56 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!77 = metadata !{i32 786445, metadata !1801, metadata !49, metadata !"badbit", i32 331, i64 0, i64 0, i64 0, i32 4096, metadata !78, i32 1} ; [ DW_TAG_member ] +!78 = metadata !{i32 786470, null, null, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, metadata !79} ; [ DW_TAG_const_type ] !79 = metadata !{i32 786454, metadata !49, metadata !"ostate", metadata !5, i32 327, i64 0, i64 0, i64 0, i32 0, metadata !26} ; [ DW_TAG_typedef ] !955 = metadata !{i32 0} !956 = metadata !{metadata !960} diff --git a/test/DebugInfo/X86/nondefault-subrange-array.ll b/test/DebugInfo/X86/nondefault-subrange-array.ll index c09b1ea..a5f786c 100644 --- a/test/DebugInfo/X86/nondefault-subrange-array.ll +++ b/test/DebugInfo/X86/nondefault-subrange-array.ll @@ -27,19 +27,19 @@ !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !6, metadata !"clang version 3.3 (trunk 169136)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !3, metadata !""} ; [ DW_TAG_compile_unit ] [/Volumes/Sandbox/llvm/t.cpp] [DW_LANG_C_plus_plus] +!0 = metadata !{i32 786449, metadata !20, i32 4, metadata !"clang version 3.3 (trunk 169136)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !3, metadata !3, metadata !""} ; [ DW_TAG_compile_unit ] [/Volumes/Sandbox/llvm/t.cpp] [DW_LANG_C_plus_plus] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} !5 = metadata !{i32 786484, i32 0, null, metadata !"a", metadata !"a", metadata !"", metadata !6, i32 1, metadata !7, i32 0, i32 1, %class.A* @a, null} ; [ DW_TAG_variable ] [a] [line 1] [def] !6 = metadata !{i32 786473, metadata !20} ; [ DW_TAG_file_type ] -!7 = metadata !{i32 786434, null, metadata !"A", metadata !6, i32 1, i64 0, i64 32, i32 0, i32 0, null, metadata !8, i32 0, null, null} ; [ DW_TAG_class_type ] [A] [line 1, size 0, align 32, offset 0] [from ] +!7 = metadata !{i32 786434, metadata !20, null, metadata !"A", i32 1, i64 0, i64 32, i32 0, i32 0, null, metadata !8, i32 0, null, null} ; [ DW_TAG_class_type ] [A] [line 1, size 0, align 32, offset 0] [from ] !8 = metadata !{metadata !9, metadata !14} -!9 = metadata !{i32 786445, metadata !7, metadata !"x", metadata !6, i32 1, i64 0, i64 0, i64 0, i32 1, metadata !10} ; [ DW_TAG_member ] [x] [line 1, size 0, align 0, offset 0] [private] [from ] -!10 = metadata !{i32 786433, null, metadata !"", null, i32 0, i64 0, i64 32, i32 0, i32 0, metadata !11, metadata !12, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 0, align 32, offset 0] [from int] -!11 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] +!9 = metadata !{i32 786445, metadata !20, metadata !7, metadata !"x", i32 1, i64 0, i64 0, i64 0, i32 1, metadata !10} ; [ DW_TAG_member ] [x] [line 1, size 0, align 0, offset 0] [private] [from ] +!10 = metadata !{i32 786433, null, null, metadata !"", i32 0, i64 0, i64 32, i32 0, i32 0, metadata !11, metadata !12, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 0, align 32, offset 0] [from int] +!11 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] !12 = metadata !{metadata !13} !13 = metadata !{i32 786465, i64 -3, i64 42} ; [ DW_TAG_subrange_type ] [-3, 39] -!14 = metadata !{i32 786478, i32 0, metadata !7, metadata !"A", metadata !"A", metadata !"", metadata !6, i32 1, metadata !15, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !18, i32 1} ; [ DW_TAG_subprogram ] [line 1] [A] +!14 = metadata !{i32 786478, metadata !6, metadata !7, metadata !"A", metadata !"A", metadata !"", i32 1, metadata !15, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !18, i32 1} ; [ DW_TAG_subprogram ] [line 1] [A] !15 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !16, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !16 = metadata !{null, metadata !17} !17 = metadata !{i32 786447, i32 0, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 1088, metadata !7} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from A] diff --git a/test/DebugInfo/X86/objc-fwd-decl.ll b/test/DebugInfo/X86/objc-fwd-decl.ll index 6e64742..3070ff8 100644 --- a/test/DebugInfo/X86/objc-fwd-decl.ll +++ b/test/DebugInfo/X86/objc-fwd-decl.ll @@ -12,13 +12,13 @@ !llvm.dbg.cu = !{!0} !llvm.module.flags = !{!9, !10, !11, !12} -!0 = metadata !{i32 786449, i32 0, i32 16, metadata !6, metadata !"clang version 3.1 (trunk 152054 trunk 152094)", i1 false, metadata !"", i32 2, metadata !1, metadata !1, metadata !1, metadata !3, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, metadata !13, i32 16, metadata !"clang version 3.1 (trunk 152054 trunk 152094)", i1 false, metadata !"", i32 2, metadata !1, metadata !1, metadata !1, metadata !3, metadata !3, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} !5 = metadata !{i32 786484, i32 0, null, metadata !"a", metadata !"a", metadata !"", metadata !6, i32 3, metadata !7, i32 0, i32 1, %0** @a, null} ; [ DW_TAG_variable ] !6 = metadata !{i32 786473, metadata !13} ; [ DW_TAG_file_type ] -!7 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !8} ; [ DW_TAG_pointer_type ] -!8 = metadata !{i32 786451, null, metadata !"FooBarBaz", metadata !6, i32 1, i32 0, i32 0, i32 0, i32 4, null, null, i32 16} ; [ DW_TAG_structure_type ] +!7 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !8} ; [ DW_TAG_pointer_type ] +!8 = metadata !{i32 786451, metadata !13, null, metadata !"FooBarBaz", i32 1, i32 0, i32 0, i32 0, i32 4, null, null, i32 16} ; [ DW_TAG_structure_type ] !9 = metadata !{i32 1, metadata !"Objective-C Version", i32 2} !10 = metadata !{i32 1, metadata !"Objective-C Image Info Version", i32 0} !11 = metadata !{i32 1, metadata !"Objective-C Image Info Section", metadata !"__DATA, __objc_imageinfo, regular, no_dead_strip"} diff --git a/test/DebugInfo/X86/op_deref.ll b/test/DebugInfo/X86/op_deref.ll index 3086207..c3580a7 100644 --- a/test/DebugInfo/X86/op_deref.ll +++ b/test/DebugInfo/X86/op_deref.ll @@ -59,29 +59,29 @@ declare void @llvm.stackrestore(i8*) nounwind !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !6, metadata !"clang version 3.2 (trunk 156005) (llvm/trunk 156000)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, metadata !28, i32 12, metadata !"clang version 3.2 (trunk 156005) (llvm/trunk 156000)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} -!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"testVLAwithSize", metadata !"testVLAwithSize", metadata !"", metadata !6, i32 1, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (i32)* @testVLAwithSize, null, null, metadata !1, i32 2} ; [ DW_TAG_subprogram ] +!5 = metadata !{i32 786478, metadata !6, metadata !"testVLAwithSize", metadata !"testVLAwithSize", metadata !"", metadata !6, i32 1, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (i32)* @testVLAwithSize, null, null, metadata !1, i32 2} ; [ DW_TAG_subprogram ] !6 = metadata !{i32 786473, metadata !28} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !8 = metadata !{null, metadata !9} -!9 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!9 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !10 = metadata !{i32 786689, metadata !5, metadata !"s", metadata !6, i32 16777217, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] !11 = metadata !{i32 1, i32 26, metadata !5, null} !12 = metadata !{i32 3, i32 13, metadata !13, null} -!13 = metadata !{i32 786443, metadata !5, i32 2, i32 1, metadata !6, i32 0} ; [ DW_TAG_lexical_block ] +!13 = metadata !{i32 786443, metadata !6, metadata !5, i32 2, i32 1, i32 0} ; [ DW_TAG_lexical_block ] !14 = metadata !{i32 786688, metadata !13, metadata !"vla", metadata !6, i32 3, metadata !15, i32 0, i32 0, i64 2} ; [ DW_TAG_auto_variable ] -!15 = metadata !{i32 786433, null, metadata !"", null, i32 0, i64 0, i64 32, i32 0, i32 0, metadata !9, metadata !16, i32 0, i32 0} ; [ DW_TAG_array_type ] +!15 = metadata !{i32 786433, null, null, metadata !"", i32 0, i64 0, i64 32, i32 0, i32 0, metadata !9, metadata !16, i32 0, i32 0} ; [ DW_TAG_array_type ] !16 = metadata !{metadata !17} !17 = metadata !{i32 786465, i64 0, i64 -1} ; [ DW_TAG_subrange_type ] !18 = metadata !{i32 3, i32 7, metadata !13, null} !19 = metadata !{i32 786688, metadata !13, metadata !"i", metadata !6, i32 4, metadata !9, i32 0, i32 0} ; [ DW_TAG_auto_variable ] !20 = metadata !{i32 4, i32 7, metadata !13, null} !21 = metadata !{i32 5, i32 8, metadata !22, null} -!22 = metadata !{i32 786443, metadata !13, i32 5, i32 3, metadata !6, i32 1} ; [ DW_TAG_lexical_block ] +!22 = metadata !{i32 786443, metadata !6, metadata !13, i32 5, i32 3, i32 1} ; [ DW_TAG_lexical_block ] !23 = metadata !{i32 6, i32 5, metadata !24, null} -!24 = metadata !{i32 786443, metadata !22, i32 5, i32 27, metadata !6, i32 2} ; [ DW_TAG_lexical_block ] +!24 = metadata !{i32 786443, metadata !6, metadata !22, i32 5, i32 27, i32 2} ; [ DW_TAG_lexical_block ] !25 = metadata !{i32 7, i32 3, metadata !24, null} !26 = metadata !{i32 5, i32 22, metadata !22, null} !27 = metadata !{i32 8, i32 1, metadata !13, null} diff --git a/test/DebugInfo/X86/pointer-type-size.ll b/test/DebugInfo/X86/pointer-type-size.ll index a38a96b..b065353 100644 --- a/test/DebugInfo/X86/pointer-type-size.ll +++ b/test/DebugInfo/X86/pointer-type-size.ll @@ -10,15 +10,15 @@ !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !6, metadata !"clang version 3.1 (trunk 147882)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !3, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, i32 12, metadata !6, metadata !"clang version 3.1 (trunk 147882)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !3, metadata !3, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} !5 = metadata !{i32 720948, i32 0, null, metadata !"crass", metadata !"crass", metadata !"", metadata !6, i32 1, metadata !7, i32 0, i32 1, %struct.crass* @crass, null} ; [ DW_TAG_variable ] !6 = metadata !{i32 720937, metadata !13} ; [ DW_TAG_file_type ] -!7 = metadata !{i32 786451, null, metadata !"crass", metadata !6, i32 1, i64 64, i64 64, i32 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!7 = metadata !{i32 786451, metadata !13, null, metadata !"crass", i32 1, i64 64, i64 64, i32 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_structure_type ] !8 = metadata !{metadata !9} -!9 = metadata !{i32 786445, metadata !7, metadata !"ptr", metadata !6, i32 1, i64 64, i64 64, i64 0, i32 0, metadata !10} ; [ DW_TAG_member ] -!10 = metadata !{i32 720934, null, metadata !"", null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !11} ; [ DW_TAG_const_type ] -!11 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !12} ; [ DW_TAG_pointer_type ] -!12 = metadata !{i32 720932, null, metadata !"char", null, i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ] +!9 = metadata !{i32 786445, metadata !13, metadata !7, metadata !"ptr", i32 1, i64 64, i64 64, i64 0, i32 0, metadata !10} ; [ DW_TAG_member ] +!10 = metadata !{i32 720934, null, null, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, metadata !11} ; [ DW_TAG_const_type ] +!11 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !12} ; [ DW_TAG_pointer_type ] +!12 = metadata !{i32 720932, null, null, metadata !"char", i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ] !13 = metadata !{metadata !"foo.c", metadata !"/Users/echristo/tmp"} diff --git a/test/DebugInfo/X86/pr11300.ll b/test/DebugInfo/X86/pr11300.ll index 29042e2..54e0c8b 100644 --- a/test/DebugInfo/X86/pr11300.ll +++ b/test/DebugInfo/X86/pr11300.ll @@ -31,17 +31,17 @@ entry: !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !6, metadata !"clang version 3.0 ()", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, metadata !32, i32 4, metadata !"clang version 3.0 ()", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5, metadata !20} -!5 = metadata !{i32 720942, i32 0, metadata !6, metadata !"zed", metadata !"zed", metadata !"_Z3zedP3foo", metadata !6, i32 4, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void (%struct.foo*)* @_Z3zedP3foo, null, null, metadata !18, i32 4} ; [ DW_TAG_subprogram ] +!5 = metadata !{i32 720942, metadata !6, metadata !6, metadata !"zed", metadata !"zed", metadata !"_Z3zedP3foo", i32 4, metadata !7, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void (%struct.foo*)* @_Z3zedP3foo, null, null, metadata !18, i32 4} ; [ DW_TAG_subprogram ] !6 = metadata !{i32 720937, metadata !32} ; [ DW_TAG_file_type ] !7 = metadata !{i32 720917, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !8 = metadata !{null, metadata !9} -!9 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !10} ; [ DW_TAG_pointer_type ] -!10 = metadata !{i32 720898, null, metadata !"foo", metadata !6, i32 1, i64 8, i64 8, i32 0, i32 0, null, metadata !11, i32 0, null, null} ; [ DW_TAG_class_type ] +!9 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !10} ; [ DW_TAG_pointer_type ] +!10 = metadata !{i32 720898, metadata !32, null, metadata !"foo", i32 1, i64 8, i64 8, i32 0, i32 0, null, metadata !11, i32 0, null, null} ; [ DW_TAG_class_type ] !11 = metadata !{metadata !12} -!12 = metadata !{i32 720942, i32 0, metadata !10, metadata !"bar", metadata !"bar", metadata !"_ZN3foo3barEv", metadata !6, i32 2, metadata !13, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, null, i32 0, metadata !16, i32 2} ; [ DW_TAG_subprogram ] +!12 = metadata !{i32 720942, metadata !6, metadata !10, metadata !"bar", metadata !"bar", metadata !"_ZN3foo3barEv", i32 2, metadata !13, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, null, i32 0, metadata !16, i32 2} ; [ DW_TAG_subprogram ] !13 = metadata !{i32 720917, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !14, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !14 = metadata !{null, metadata !15} !15 = metadata !{i32 786447, i32 0, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !10} ; [ DW_TAG_pointer_type ] @@ -49,16 +49,16 @@ entry: !17 = metadata !{i32 720932} ; [ DW_TAG_base_type ] !18 = metadata !{metadata !19} !19 = metadata !{i32 720932} ; [ DW_TAG_base_type ] -!20 = metadata !{i32 720942, i32 0, null, metadata !"bar", metadata !"bar", metadata !"_ZN3foo3barEv", metadata !6, i32 2, metadata !13, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void (%struct.foo*)* @_ZN3foo3barEv, null, metadata !12, metadata !21, i32 2} ; [ DW_TAG_subprogram ] +!20 = metadata !{i32 720942, metadata !6, null, metadata !"bar", metadata !"bar", metadata !"_ZN3foo3barEv", i32 2, metadata !13, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, void (%struct.foo*)* @_ZN3foo3barEv, null, metadata !12, metadata !21, i32 2} ; [ DW_TAG_subprogram ] !21 = metadata !{metadata !22} !22 = metadata !{i32 720932} ; [ DW_TAG_base_type ] !23 = metadata !{i32 786689, metadata !5, metadata !"x", metadata !6, i32 16777220, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] !24 = metadata !{i32 4, i32 15, metadata !5, null} !25 = metadata !{i32 4, i32 20, metadata !26, null} -!26 = metadata !{i32 786443, metadata !5, i32 4, i32 18, metadata !6, i32 0} ; [ DW_TAG_lexical_block ] +!26 = metadata !{i32 786443, metadata !6, metadata !5, i32 4, i32 18, i32 0} ; [ DW_TAG_lexical_block ] !27 = metadata !{i32 4, i32 30, metadata !26, null} !28 = metadata !{i32 786689, metadata !20, metadata !"this", metadata !6, i32 16777218, metadata !15, i32 64, i32 0} ; [ DW_TAG_arg_variable ] !29 = metadata !{i32 2, i32 8, metadata !20, null} !30 = metadata !{i32 2, i32 15, metadata !31, null} -!31 = metadata !{i32 786443, metadata !20, i32 2, i32 14, metadata !6, i32 1} ; [ DW_TAG_lexical_block ] +!31 = metadata !{i32 786443, metadata !6, metadata !20, i32 2, i32 14, i32 1} ; [ DW_TAG_lexical_block ] !32 = metadata !{metadata !"/home/espindola/llvm/test.cc", metadata !"/home/espindola/tmpfs/build"} diff --git a/test/DebugInfo/X86/pr12831.ll b/test/DebugInfo/X86/pr12831.ll index a24e477..295c018 100644 --- a/test/DebugInfo/X86/pr12831.ll +++ b/test/DebugInfo/X86/pr12831.ll @@ -77,10 +77,10 @@ entry: !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !159, metadata !"clang version 3.2 ", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !128, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, i32 4, metadata !159, metadata !"clang version 3.2 ", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !128, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5, metadata !106, metadata !107, metadata !126, metadata !127} -!5 = metadata !{i32 786478, i32 0, null, metadata !"writeExpr", metadata !"writeExpr", metadata !"_ZN17BPLFunctionWriter9writeExprEv", metadata !6, i32 19, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (%class.BPLFunctionWriter*)* @_ZN17BPLFunctionWriter9writeExprEv, null, metadata !103, metadata !1, i32 19} ; [ DW_TAG_subprogram ] +!5 = metadata !{i32 786478, metadata !"_ZN17BPLFunctionWriter9writeExprEv", i32 0, null, metadata !"writeExpr", metadata !"writeExpr", metadata !6, i32 19, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (%class.BPLFunctionWriter*)* @_ZN17BPLFunctionWriter9writeExprEv, null, metadata !103, metadata !1, i32 19} ; [ DW_TAG_subprogram ] !6 = metadata !{i32 786473, metadata !"BPLFunctionWriter2.ii", metadata !"/home/peter/crashdelta", null} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !8 = metadata !{null, metadata !9} @@ -91,32 +91,32 @@ entry: !13 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !14} ; [ DW_TAG_pointer_type ] !14 = metadata !{i32 786434, null, metadata !"BPLModuleWriter", metadata !6, i32 12, i64 8, i64 8, i32 0, i32 0, null, metadata !15, i32 0, null, null} ; [ DW_TAG_class_type ] !15 = metadata !{metadata !16} -!16 = metadata !{i32 786478, i32 0, metadata !14, metadata !"writeIntrinsic", metadata !"writeIntrinsic", metadata !"_ZN15BPLModuleWriter14writeIntrinsicE8functionIFvvEE", metadata !6, i32 13, metadata !17, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, null, i32 0, metadata !101, i32 13} ; [ DW_TAG_subprogram ] +!16 = metadata !{i32 786478, metadata !"_ZN15BPLModuleWriter14writeIntrinsicE8functionIFvvEE", i32 0, metadata !14, metadata !"writeIntrinsic", metadata !"writeIntrinsic", metadata !6, i32 13, metadata !17, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, null, i32 0, metadata !101, i32 13} ; [ DW_TAG_subprogram ] !17 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !18, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !18 = metadata !{null, metadata !19, metadata !20} !19 = metadata !{i32 786447, i32 0, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !14} ; [ DW_TAG_pointer_type ] !20 = metadata !{i32 786434, null, metadata !"function<void ()>", metadata !6, i32 6, i64 8, i64 8, i32 0, i32 0, null, metadata !21, i32 0, null, metadata !97} ; [ DW_TAG_class_type ] !21 = metadata !{metadata !22, metadata !51, metadata !58, metadata !86, metadata !92} -!22 = metadata !{i32 786478, i32 0, metadata !20, metadata !"function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:20:36> >", metadata !"function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:20:36> >", metadata !"", metadata !6, i32 8, metadata !23, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, metadata !47, i32 0, metadata !49, i32 8} ; [ DW_TAG_subprogram ] +!22 = metadata !{i32 786478, metadata !"", i32 0, metadata !20, metadata !"function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:20:36> >", metadata !"function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:20:36> >", metadata !6, i32 8, metadata !23, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, metadata !47, i32 0, metadata !49, i32 8} ; [ DW_TAG_subprogram ] !23 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !24, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !24 = metadata !{null, metadata !25, metadata !26} !25 = metadata !{i32 786447, i32 0, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !20} ; [ DW_TAG_pointer_type ] !26 = metadata !{i32 786434, metadata !5, metadata !"", metadata !6, i32 20, i64 8, i64 8, i32 0, i32 0, null, metadata !27, i32 0, null, null} ; [ DW_TAG_class_type ] !27 = metadata !{metadata !28, metadata !35, metadata !41} -!28 = metadata !{i32 786478, i32 0, metadata !26, metadata !"operator()", metadata !"operator()", metadata !"", metadata !6, i32 20, metadata !29, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, null, i32 0, metadata !33, i32 20} ; [ DW_TAG_subprogram ] +!28 = metadata !{i32 786478, metadata !"", i32 0, metadata !26, metadata !"operator()", metadata !"operator()", metadata !6, i32 20, metadata !29, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, null, i32 0, metadata !33, i32 20} ; [ DW_TAG_subprogram ] !29 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !30, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !30 = metadata !{null, metadata !31} !31 = metadata !{i32 786447, i32 0, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !32} ; [ DW_TAG_pointer_type ] !32 = metadata !{i32 786470, null, metadata !"", null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !26} ; [ DW_TAG_const_type ] !33 = metadata !{metadata !34} !34 = metadata !{i32 786468} ; [ DW_TAG_base_type ] -!35 = metadata !{i32 786478, i32 0, metadata !26, metadata !"~", metadata !"~", metadata !"", metadata !6, i32 20, metadata !36, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !39, i32 20} ; [ DW_TAG_subprogram ] +!35 = metadata !{i32 786478, metadata !"", i32 0, metadata !26, metadata !"~", metadata !"~", metadata !6, i32 20, metadata !36, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !39, i32 20} ; [ DW_TAG_subprogram ] !36 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !37, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !37 = metadata !{null, metadata !38} !38 = metadata !{i32 786447, i32 0, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !26} ; [ DW_TAG_pointer_type ] !39 = metadata !{metadata !40} !40 = metadata !{i32 786468} ; [ DW_TAG_base_type ] -!41 = metadata !{i32 786478, i32 0, metadata !26, metadata !"", metadata !"", metadata !"", metadata !6, i32 20, metadata !42, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !45, i32 20} ; [ DW_TAG_subprogram ] +!41 = metadata !{i32 786478, metadata !"", i32 0, metadata !26, metadata !"", metadata !"", metadata !6, i32 20, metadata !42, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !45, i32 20} ; [ DW_TAG_subprogram ] !42 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !43, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !43 = metadata !{null, metadata !38, metadata !44} !44 = metadata !{i32 786498, null, null, null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !26} ; [ DW_TAG_rvalue_reference_type ] @@ -126,32 +126,32 @@ entry: !48 = metadata !{i32 786479, null, metadata !"_Functor", metadata !26, null, i32 0, i32 0} ; [ DW_TAG_template_type_parameter ] !49 = metadata !{metadata !50} !50 = metadata !{i32 786468} ; [ DW_TAG_base_type ] -!51 = metadata !{i32 786478, i32 0, metadata !20, metadata !"function<function<void ()> >", metadata !"function<function<void ()> >", metadata !"", metadata !6, i32 8, metadata !52, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, metadata !54, i32 0, metadata !56, i32 8} ; [ DW_TAG_subprogram ] +!51 = metadata !{i32 786478, metadata !"", i32 0, metadata !20, metadata !"function<function<void ()> >", metadata !"function<function<void ()> >", metadata !6, i32 8, metadata !52, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, metadata !54, i32 0, metadata !56, i32 8} ; [ DW_TAG_subprogram ] !52 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !53, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !53 = metadata !{null, metadata !25, metadata !20} !54 = metadata !{metadata !55} !55 = metadata !{i32 786479, null, metadata !"_Functor", metadata !20, null, i32 0, i32 0} ; [ DW_TAG_template_type_parameter ] !56 = metadata !{metadata !57} !57 = metadata !{i32 786468} ; [ DW_TAG_base_type ] -!58 = metadata !{i32 786478, i32 0, metadata !20, metadata !"function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:23:36> >", metadata !"function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:23:36> >", metadata !"", metadata !6, i32 8, metadata !59, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, metadata !82, i32 0, metadata !84, i32 8} ; [ DW_TAG_subprogram ] +!58 = metadata !{i32 786478, metadata !"", i32 0, metadata !20, metadata !"function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:23:36> >", metadata !"function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:23:36> >", metadata !6, i32 8, metadata !59, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, metadata !82, i32 0, metadata !84, i32 8} ; [ DW_TAG_subprogram ] !59 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !60, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !60 = metadata !{null, metadata !25, metadata !61} !61 = metadata !{i32 786434, metadata !5, metadata !"", metadata !6, i32 23, i64 8, i64 8, i32 0, i32 0, null, metadata !62, i32 0, null, null} ; [ DW_TAG_class_type ] !62 = metadata !{metadata !63, metadata !70, metadata !76} -!63 = metadata !{i32 786478, i32 0, metadata !61, metadata !"operator()", metadata !"operator()", metadata !"", metadata !6, i32 23, metadata !64, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, null, i32 0, metadata !68, i32 23} ; [ DW_TAG_subprogram ] +!63 = metadata !{i32 786478, metadata !"", i32 0, metadata !61, metadata !"operator()", metadata !"operator()", metadata !6, i32 23, metadata !64, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, null, i32 0, metadata !68, i32 23} ; [ DW_TAG_subprogram ] !64 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !65, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !65 = metadata !{null, metadata !66} !66 = metadata !{i32 786447, i32 0, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !67} ; [ DW_TAG_pointer_type ] !67 = metadata !{i32 786470, null, metadata !"", null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !61} ; [ DW_TAG_const_type ] !68 = metadata !{metadata !69} !69 = metadata !{i32 786468} ; [ DW_TAG_base_type ] -!70 = metadata !{i32 786478, i32 0, metadata !61, metadata !"~", metadata !"~", metadata !"", metadata !6, i32 23, metadata !71, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !74, i32 23} ; [ DW_TAG_subprogram ] +!70 = metadata !{i32 786478, metadata !"", i32 0, metadata !61, metadata !"~", metadata !"~", metadata !6, i32 23, metadata !71, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !74, i32 23} ; [ DW_TAG_subprogram ] !71 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !72, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !72 = metadata !{null, metadata !73} !73 = metadata !{i32 786447, i32 0, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !61} ; [ DW_TAG_pointer_type ] !74 = metadata !{metadata !75} !75 = metadata !{i32 786468} ; [ DW_TAG_base_type ] -!76 = metadata !{i32 786478, i32 0, metadata !61, metadata !"", metadata !"", metadata !"", metadata !6, i32 23, metadata !77, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !80, i32 23} ; [ DW_TAG_subprogram ] +!76 = metadata !{i32 786478, metadata !"", i32 0, metadata !61, metadata !"", metadata !"", metadata !6, i32 23, metadata !77, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !80, i32 23} ; [ DW_TAG_subprogram ] !77 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !78, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !78 = metadata !{null, metadata !73, metadata !79} !79 = metadata !{i32 786498, null, null, null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !61} ; [ DW_TAG_rvalue_reference_type ] @@ -161,13 +161,13 @@ entry: !83 = metadata !{i32 786479, null, metadata !"_Functor", metadata !61, null, i32 0, i32 0} ; [ DW_TAG_template_type_parameter ] !84 = metadata !{metadata !85} !85 = metadata !{i32 786468} ; [ DW_TAG_base_type ] -!86 = metadata !{i32 786478, i32 0, metadata !20, metadata !"function", metadata !"function", metadata !"", metadata !6, i32 6, metadata !87, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !90, i32 6} ; [ DW_TAG_subprogram ] +!86 = metadata !{i32 786478, metadata !"", i32 0, metadata !20, metadata !"function", metadata !"function", metadata !6, i32 6, metadata !87, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !90, i32 6} ; [ DW_TAG_subprogram ] !87 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !88, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !88 = metadata !{null, metadata !25, metadata !89} !89 = metadata !{i32 786498, null, null, null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !20} ; [ DW_TAG_rvalue_reference_type ] !90 = metadata !{metadata !91} !91 = metadata !{i32 786468} ; [ DW_TAG_base_type ] -!92 = metadata !{i32 786478, i32 0, metadata !20, metadata !"~function", metadata !"~function", metadata !"", metadata !6, i32 6, metadata !93, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !95, i32 6} ; [ DW_TAG_subprogram ] +!92 = metadata !{i32 786478, metadata !"", i32 0, metadata !20, metadata !"~function", metadata !"~function", metadata !6, i32 6, metadata !93, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !95, i32 6} ; [ DW_TAG_subprogram ] !93 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !94, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !94 = metadata !{null, metadata !25} !95 = metadata !{metadata !96} @@ -178,20 +178,20 @@ entry: !100 = metadata !{null} !101 = metadata !{metadata !102} !102 = metadata !{i32 786468} ; [ DW_TAG_base_type ] -!103 = metadata !{i32 786478, i32 0, metadata !10, metadata !"writeExpr", metadata !"writeExpr", metadata !"_ZN17BPLFunctionWriter9writeExprEv", metadata !6, i32 17, metadata !7, i1 false, i1 false, i32 0, i32 0, null, i32 257, i1 false, null, null, i32 0, metadata !104, i32 17} ; [ DW_TAG_subprogram ] +!103 = metadata !{i32 786478, metadata !"_ZN17BPLFunctionWriter9writeExprEv", i32 0, metadata !10, metadata !"writeExpr", metadata !"writeExpr", metadata !6, i32 17, metadata !7, i1 false, i1 false, i32 0, i32 0, null, i32 257, i1 false, null, null, i32 0, metadata !104, i32 17} ; [ DW_TAG_subprogram ] !104 = metadata !{metadata !105} !105 = metadata !{i32 786468} ; [ DW_TAG_base_type ] -!106 = metadata !{i32 786478, i32 0, null, metadata !"function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:23:36> >", metadata !"function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:23:36> >", metadata !"_ZN8functionIFvvEEC2IZN17BPLFunctionWriter9writeExprEvE3$_1_0EET_", metadata !6, i32 8, metadata !59, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (%class.function*)* @"_ZN8functionIFvvEEC2IZN17BPLFunctionWriter9writeExprEvE3$_1_0EET_", metadata !82, metadata !58, metadata !1, i32 8} ; [ DW_TAG_subprogram ] -!107 = metadata !{i32 786478, i32 0, null, metadata !"_M_not_empty_function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:23:36> >", metadata !"_M_not_empty_function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:23:36> >", metadata !"_ZN13_Base_manager21_M_not_empty_functionIZN17BPLFunctionWriter9writeExprEvE3$_1_0EEvRKT_", metadata !6, i32 3, metadata !108, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (%class.anon.0*)* @"_ZN13_Base_manager21_M_not_empty_functionIZN17BPLFunctionWriter9writeExprEvE3$_1_0EEvRKT_", metadata !111, metadata !113, metadata !1, i32 3} ; [ DW_TAG_subprogram ] +!106 = metadata !{i32 786478, metadata !"_ZN8functionIFvvEEC2IZN17BPLFunctionWriter9writeExprEvE3$_1_0EET_", i32 0, null, metadata !"function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:23:36> >", metadata !"function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:23:36> >", metadata !6, i32 8, metadata !59, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (%class.function*)* @"_ZN8functionIFvvEEC2IZN17BPLFunctionWriter9writeExprEvE3$_1_0EET_", metadata !82, metadata !58, metadata !1, i32 8} ; [ DW_TAG_subprogram ] +!107 = metadata !{i32 786478, metadata !"_ZN13_Base_manager21_M_not_empty_functionIZN17BPLFunctionWriter9writeExprEvE3$_1_0EEvRKT_", i32 0, null, metadata !"_M_not_empty_function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:23:36> >", metadata !"_M_not_empty_function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:23:36> >", metadata !6, i32 3, metadata !108, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (%class.anon.0*)* @"_ZN13_Base_manager21_M_not_empty_functionIZN17BPLFunctionWriter9writeExprEvE3$_1_0EEvRKT_", metadata !111, metadata !113, metadata !1, i32 3} ; [ DW_TAG_subprogram ] !108 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !109, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !109 = metadata !{null, metadata !110} !110 = metadata !{i32 786448, null, null, null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !61} ; [ DW_TAG_reference_type ] !111 = metadata !{metadata !112} !112 = metadata !{i32 786479, null, metadata !"_Tp", metadata !61, null, i32 0, i32 0} ; [ DW_TAG_template_type_parameter ] -!113 = metadata !{i32 786478, i32 0, metadata !114, metadata !"_M_not_empty_function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:23:36> >", metadata !"_M_not_empty_function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:23:36> >", metadata !"_ZN13_Base_manager21_M_not_empty_functionIZN17BPLFunctionWriter9writeExprEvE3$_1_0EEvRKT_", metadata !6, i32 3, metadata !108, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, metadata !111, i32 0, metadata !124, i32 3} ; [ DW_TAG_subprogram ] +!113 = metadata !{i32 786478, metadata !"_ZN13_Base_manager21_M_not_empty_functionIZN17BPLFunctionWriter9writeExprEvE3$_1_0EEvRKT_", i32 0, metadata !114, metadata !"_M_not_empty_function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:23:36> >", metadata !"_M_not_empty_function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:23:36> >", metadata !6, i32 3, metadata !108, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, metadata !111, i32 0, metadata !124, i32 3} ; [ DW_TAG_subprogram ] !114 = metadata !{i32 786434, null, metadata !"_Base_manager", metadata !6, i32 1, i64 8, i64 8, i32 0, i32 0, null, metadata !115, i32 0, null, null} ; [ DW_TAG_class_type ] !115 = metadata !{metadata !116, metadata !113} -!116 = metadata !{i32 786478, i32 0, metadata !114, metadata !"_M_not_empty_function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:20:36> >", metadata !"_M_not_empty_function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:20:36> >", metadata !"_ZN13_Base_manager21_M_not_empty_functionIZN17BPLFunctionWriter9writeExprEvE3$_0EEvRKT_", metadata !6, i32 3, metadata !117, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, metadata !120, i32 0, metadata !122, i32 3} ; [ DW_TAG_subprogram ] +!116 = metadata !{i32 786478, metadata !"_ZN13_Base_manager21_M_not_empty_functionIZN17BPLFunctionWriter9writeExprEvE3$_0EEvRKT_", i32 0, metadata !114, metadata !"_M_not_empty_function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:20:36> >", metadata !"_M_not_empty_function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:20:36> >", metadata !6, i32 3, metadata !117, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, metadata !120, i32 0, metadata !122, i32 3} ; [ DW_TAG_subprogram ] !117 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !118, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !118 = metadata !{null, metadata !119} !119 = metadata !{i32 786448, null, null, null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !26} ; [ DW_TAG_reference_type ] @@ -201,8 +201,8 @@ entry: !123 = metadata !{i32 786468} ; [ DW_TAG_base_type ] !124 = metadata !{metadata !125} !125 = metadata !{i32 786468} ; [ DW_TAG_base_type ] -!126 = metadata !{i32 786478, i32 0, null, metadata !"function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:20:36> >", metadata !"function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:20:36> >", metadata !"_ZN8functionIFvvEEC2IZN17BPLFunctionWriter9writeExprEvE3$_0EET_", metadata !6, i32 8, metadata !23, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (%class.function*)* @"_ZN8functionIFvvEEC2IZN17BPLFunctionWriter9writeExprEvE3$_0EET_", metadata !47, metadata !22, metadata !1, i32 8} ; [ DW_TAG_subprogram ] -!127 = metadata !{i32 786478, i32 0, null, metadata !"_M_not_empty_function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:20:36> >", metadata !"_M_not_empty_function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:20:36> >", metadata !"_ZN13_Base_manager21_M_not_empty_functionIZN17BPLFunctionWriter9writeExprEvE3$_0EEvRKT_", metadata !6, i32 3, metadata !117, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (%class.anon*)* @"_ZN13_Base_manager21_M_not_empty_functionIZN17BPLFunctionWriter9writeExprEvE3$_0EEvRKT_", metadata !120, metadata !116, metadata !1, i32 3} ; [ DW_TAG_subprogram ] +!126 = metadata !{i32 786478, metadata !"_ZN8functionIFvvEEC2IZN17BPLFunctionWriter9writeExprEvE3$_0EET_", i32 0, null, metadata !"function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:20:36> >", metadata !"function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:20:36> >", metadata !6, i32 8, metadata !23, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (%class.function*)* @"_ZN8functionIFvvEEC2IZN17BPLFunctionWriter9writeExprEvE3$_0EET_", metadata !47, metadata !22, metadata !1, i32 8} ; [ DW_TAG_subprogram ] +!127 = metadata !{i32 786478, metadata !"_ZN13_Base_manager21_M_not_empty_functionIZN17BPLFunctionWriter9writeExprEvE3$_0EEvRKT_", i32 0, null, metadata !"_M_not_empty_function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:20:36> >", metadata !"_M_not_empty_function<BPLFunctionWriter::<lambda at BPLFunctionWriter2.ii:20:36> >", metadata !6, i32 3, metadata !117, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (%class.anon*)* @"_ZN13_Base_manager21_M_not_empty_functionIZN17BPLFunctionWriter9writeExprEvE3$_0EEvRKT_", metadata !120, metadata !116, metadata !1, i32 3} ; [ DW_TAG_subprogram ] !128 = metadata !{metadata !130} !130 = metadata !{i32 786484, i32 0, metadata !114, metadata !"__stored_locally", metadata !"__stored_locally", metadata !"__stored_locally", metadata !6, i32 2, metadata !131, i32 1, i32 1, i1 true} ; [ DW_TAG_variable ] !131 = metadata !{i32 786470, null, metadata !"", null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !132} ; [ DW_TAG_const_type ] diff --git a/test/DebugInfo/X86/pr13303.ll b/test/DebugInfo/X86/pr13303.ll index 52ab413..63ddfa7 100644 --- a/test/DebugInfo/X86/pr13303.ll +++ b/test/DebugInfo/X86/pr13303.ll @@ -14,13 +14,13 @@ entry: !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !6, metadata !"clang version 3.2 (trunk 160143)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] [/home/probinson/PR13303.c] [DW_LANG_C99] +!0 = metadata !{i32 786449, i32 12, metadata !6, metadata !"clang version 3.2 (trunk 160143)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] [/home/probinson/PR13303.c] [DW_LANG_C99] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} -!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"main", metadata !"main", metadata !"", metadata !6, i32 1, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main, null, null, metadata !1, i32 1} ; [ DW_TAG_subprogram ] [line 1] [def] [main] +!5 = metadata !{i32 786478, metadata !6, metadata !"main", metadata !"main", metadata !"", metadata !6, i32 1, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @main, null, null, metadata !1, i32 1} ; [ DW_TAG_subprogram ] [line 1] [def] [main] !6 = metadata !{i32 786473, metadata !"PR13303.c", metadata !"/home/probinson", null} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !8 = metadata !{metadata !9} !9 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] !10 = metadata !{i32 1, i32 14, metadata !11, null} -!11 = metadata !{i32 786443, metadata !5, i32 1, i32 12, metadata !6, i32 0} ; [ DW_TAG_lexical_block ] [/home/probinson/PR13303.c] +!11 = metadata !{i32 786443, metadata !6, metadata !5, i32 1, i32 12, i32 0} ; [ DW_TAG_lexical_block ] [/home/probinson/PR13303.c] diff --git a/test/DebugInfo/X86/prologue-stack.ll b/test/DebugInfo/X86/prologue-stack.ll index 30cca60..00ee7a0 100644 --- a/test/DebugInfo/X86/prologue-stack.ll +++ b/test/DebugInfo/X86/prologue-stack.ll @@ -20,14 +20,14 @@ declare i32 @callme(i32) !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !6, metadata !"clang version 3.2 (trunk 164980) (llvm/trunk 164979)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] [/usr/local/google/home/echristo/tmp/bar.c] [DW_LANG_C99] +!0 = metadata !{i32 786449, i32 12, metadata !6, metadata !"clang version 3.2 (trunk 164980) (llvm/trunk 164979)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] [/usr/local/google/home/echristo/tmp/bar.c] [DW_LANG_C99] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} -!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"isel_line_test2", metadata !"isel_line_test2", metadata !"", metadata !6, i32 3, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @isel_line_test2, null, null, metadata !1, i32 4} ; [ DW_TAG_subprogram ] [line 3] [def] [scope 4] [isel_line_test2] +!5 = metadata !{i32 786478, metadata !6, metadata !"isel_line_test2", metadata !"isel_line_test2", metadata !"", metadata !6, i32 3, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 ()* @isel_line_test2, null, null, metadata !1, i32 4} ; [ DW_TAG_subprogram ] [line 3] [def] [scope 4] [isel_line_test2] !6 = metadata !{i32 786473, metadata !"bar.c", metadata !"/usr/local/google/home/echristo/tmp", null} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !8 = metadata !{metadata !9} !9 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] !10 = metadata !{i32 5, i32 3, metadata !11, null} -!11 = metadata !{i32 786443, metadata !5, i32 4, i32 1, metadata !6, i32 0} ; [ DW_TAG_lexical_block ] [/usr/local/google/home/echristo/tmp/bar.c] +!11 = metadata !{i32 786443, metadata !6, metadata !5, i32 4, i32 1, i32 0} ; [ DW_TAG_lexical_block ] [/usr/local/google/home/echristo/tmp/bar.c] !12 = metadata !{i32 6, i32 3, metadata !11, null} diff --git a/test/DebugInfo/X86/rvalue-ref.ll b/test/DebugInfo/X86/rvalue-ref.ll index 8e194c4..b5aa4f6 100644 --- a/test/DebugInfo/X86/rvalue-ref.ll +++ b/test/DebugInfo/X86/rvalue-ref.ll @@ -22,10 +22,10 @@ declare i32 @printf(i8*, ...) !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !6, metadata !"clang version 3.2 (trunk 157054) (llvm/trunk 157060)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, i32 4, metadata !6, metadata !"clang version 3.2 (trunk 157054) (llvm/trunk 157060)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} -!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"foo", metadata !"foo", metadata !"_Z3fooOi", metadata !6, i32 4, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (i32*)* @_Z3fooOi, null, null, metadata !1, i32 5} ; [ DW_TAG_subprogram ] +!5 = metadata !{i32 786478, metadata !6, metadata !"foo", metadata !"foo", metadata !"_Z3fooOi", metadata !6, i32 4, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (i32*)* @_Z3fooOi, null, null, metadata !1, i32 5} ; [ DW_TAG_subprogram ] !6 = metadata !{i32 786473, metadata !16} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !8 = metadata !{null, metadata !9} @@ -34,6 +34,6 @@ declare i32 @printf(i8*, ...) !11 = metadata !{i32 786689, metadata !5, metadata !"i", metadata !6, i32 16777220, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] !12 = metadata !{i32 4, i32 17, metadata !5, null} !13 = metadata !{i32 6, i32 3, metadata !14, null} -!14 = metadata !{i32 786443, metadata !5, i32 5, i32 1, metadata !6, i32 0} ; [ DW_TAG_lexical_block ] +!14 = metadata !{i32 786443, metadata !6, metadata !5, i32 5, i32 1, i32 0} ; [ DW_TAG_lexical_block ] !15 = metadata !{i32 7, i32 1, metadata !14, null} !16 = metadata !{metadata !"foo.cpp", metadata !"/Users/echristo/tmp"} diff --git a/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll b/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll index 2f3c648..e7af892 100644 --- a/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll +++ b/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll @@ -42,26 +42,26 @@ entry: } !llvm.dbg.cu = !{!0, !10} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !6, metadata !"clang version 3.3", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, metadata !23, i32 12, metadata !"clang version 3.3", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{metadata !2} !2 = metadata !{i32 0} !3 = metadata !{metadata !5} -!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"test", metadata !"test", metadata !"", metadata !6, i32 2, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (i32)* @test, null, null, metadata !1, i32 3} ; [ DW_TAG_subprogram ] [line 2] [def] [scope 3] [test] +!5 = metadata !{i32 786478, metadata !23, metadata !"test", metadata !"test", metadata !"", metadata !6, i32 2, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (i32)* @test, null, null, metadata !1, i32 3} ; [ DW_TAG_subprogram ] [line 2] [def] [scope 3] [test] !6 = metadata !{i32 786473, metadata !23} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !8 = metadata !{metadata !9, metadata !9} !9 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] -!10 = metadata !{i32 786449, i32 0, i32 12, metadata !14, metadata !"clang version 3.3 (trunk 172862)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !11, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] +!10 = metadata !{i32 786449, metadata !24, i32 12, metadata !"clang version 3.3 (trunk 172862)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !11, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] !11 = metadata !{metadata !13} -!13 = metadata !{i32 786478, i32 0, metadata !14, metadata !"fn", metadata !"fn", metadata !"", metadata !14, i32 1, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (i32)* @fn, null, null, metadata !1, i32 1} ; [ DW_TAG_subprogram ] [line 1] [def] [fn] +!13 = metadata !{i32 786478, metadata !24, metadata !"fn", metadata !"fn", metadata !"", metadata !14, i32 1, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (i32)* @fn, null, null, metadata !1, i32 1} ; [ DW_TAG_subprogram ] [line 1] [def] [fn] !14 = metadata !{i32 786473, metadata !24} ; [ DW_TAG_file_type ] !15 = metadata !{i32 786689, metadata !5, metadata !"a", metadata !6, i32 16777218, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [a] [line 2] !16 = metadata !{i32 2, i32 0, metadata !5, null} !17 = metadata !{i32 4, i32 0, metadata !18, null} -!18 = metadata !{i32 786443, metadata !5, i32 3, i32 0, metadata !6, i32 0} ; [ DW_TAG_lexical_block ] +!18 = metadata !{i32 786443, metadata !23, metadata !5, i32 3, i32 0, i32 0} ; [ DW_TAG_lexical_block ] !19 = metadata !{i32 786689, metadata !13, metadata !"a", metadata !14, i32 16777217, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [a] [line 1] !20 = metadata !{i32 1, i32 0, metadata !13, null} !21 = metadata !{i32 2, i32 0, metadata !22, null} -!22 = metadata !{i32 786443, metadata !13, i32 1, i32 0, metadata !14, i32 0} ; [ DW_TAG_lexical_block ] +!22 = metadata !{i32 786443, metadata !24, metadata !13, i32 1, i32 0, i32 0} ; [ DW_TAG_lexical_block ] !23 = metadata !{metadata !"simple.c", metadata !"/private/tmp"} !24 = metadata !{metadata !"simple2.c", metadata !"/private/tmp"} diff --git a/test/DebugInfo/X86/stringpool.ll b/test/DebugInfo/X86/stringpool.ll index 3bcce1c..d9604de 100644 --- a/test/DebugInfo/X86/stringpool.ll +++ b/test/DebugInfo/X86/stringpool.ll @@ -5,12 +5,12 @@ !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !6, metadata !"clang version 3.1 (trunk 143009)", i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !3, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, metadata !8, i32 12, metadata !"clang version 3.1 (trunk 143009)", i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !3, metadata !3, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} !5 = metadata !{i32 720948, i32 0, null, metadata !"yyyy", metadata !"yyyy", metadata !"", metadata !6, i32 1, metadata !7, i32 0, i32 1, i32* @yyyy, null} ; [ DW_TAG_variable ] !6 = metadata !{i32 720937, metadata !8} ; [ DW_TAG_file_type ] -!7 = metadata !{i32 720932, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!7 = metadata !{i32 720932, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !8 = metadata !{metadata !"z.c", metadata !"/home/nicholas"} ; Verify that we refer to 'yyyy' with a relocation. diff --git a/test/DebugInfo/X86/struct-loc.ll b/test/DebugInfo/X86/struct-loc.ll index 7a94154..76cb1f7 100644 --- a/test/DebugInfo/X86/struct-loc.ll +++ b/test/DebugInfo/X86/struct-loc.ll @@ -13,13 +13,13 @@ !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !6, metadata !"clang version 3.1 (trunk 152837) (llvm/trunk 152845)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !3, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, i32 12, metadata !6, metadata !"clang version 3.1 (trunk 152837) (llvm/trunk 152845)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !3, metadata !3, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} !5 = metadata !{i32 786484, i32 0, null, metadata !"f", metadata !"f", metadata !"", metadata !6, i32 5, metadata !7, i32 0, i32 1, %struct.foo* @f, null} ; [ DW_TAG_variable ] !6 = metadata !{i32 786473, metadata !11} ; [ DW_TAG_file_type ] -!7 = metadata !{i32 786451, null, metadata !"foo", metadata !6, i32 1, i64 32, i64 32, i32 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_structure_type ] +!7 = metadata !{i32 786451, metadata !11, null, metadata !"foo", i32 1, i64 32, i64 32, i32 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_structure_type ] !8 = metadata !{metadata !9} -!9 = metadata !{i32 786445, metadata !7, metadata !"a", metadata !6, i32 2, i64 32, i64 32, i64 0, i32 0, metadata !10} ; [ DW_TAG_member ] -!10 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!9 = metadata !{i32 786445, metadata !11, metadata !7, metadata !"a", i32 2, i64 32, i64 32, i64 0, i32 0, metadata !10} ; [ DW_TAG_member ] +!10 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !11 = metadata !{metadata !"struct_bug.c", metadata !"/Users/echristo/tmp"} diff --git a/test/DebugInfo/X86/subrange-type.ll b/test/DebugInfo/X86/subrange-type.ll index bd7fdab..da95893 100644 --- a/test/DebugInfo/X86/subrange-type.ll +++ b/test/DebugInfo/X86/subrange-type.ll @@ -20,17 +20,17 @@ declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !6, metadata !"clang version 3.3 (trunk 171472) (llvm/trunk 171487)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] [/usr/local/google/home/echristo/tmp/foo.c] [DW_LANG_C99] +!0 = metadata !{i32 786449, metadata !17, i32 12, metadata !"clang version 3.3 (trunk 171472) (llvm/trunk 171487)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] [/usr/local/google/home/echristo/tmp/foo.c] [DW_LANG_C99] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} -!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"main", metadata !"main", metadata !"", metadata !6, i32 2, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 ()* @main, null, null, metadata !1, i32 3} ; [ DW_TAG_subprogram ] [line 2] [def] [scope 3] [main] +!5 = metadata !{i32 786478, metadata !6, metadata !6, metadata !"main", metadata !"main", metadata !"", i32 2, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 ()* @main, null, null, metadata !1, i32 3} ; [ DW_TAG_subprogram ] [line 2] [def] [scope 3] [main] !6 = metadata !{i32 786473, metadata !17} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !8 = metadata !{metadata !9} -!9 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] +!9 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] !10 = metadata !{i32 786688, metadata !11, metadata !"i", metadata !6, i32 4, metadata !12, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [i] [line 4] -!11 = metadata !{i32 786443, metadata !5, i32 3, i32 0, metadata !6, i32 0} ; [ DW_TAG_lexical_block ] [/usr/local/google/home/echristo/tmp/foo.c] -!12 = metadata !{i32 786433, null, metadata !"", null, i32 0, i64 64, i64 32, i32 0, i32 0, metadata !9, metadata !13, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 64, align 32, offset 0] [from int] +!11 = metadata !{i32 786443, metadata !6, metadata !5, i32 3, i32 0, i32 0} ; [ DW_TAG_lexical_block ] [/usr/local/google/home/echristo/tmp/foo.c] +!12 = metadata !{i32 786433, null, null, metadata !"", i32 0, i64 64, i64 32, i32 0, i32 0, metadata !9, metadata !13, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 64, align 32, offset 0] [from int] !13 = metadata !{metadata !14} !14 = metadata !{i32 786465, i64 0, i64 2} ; [ DW_TAG_subrange_type ] [0, 1] !15 = metadata !{i32 4, i32 0, metadata !11, null} diff --git a/test/DebugInfo/X86/subreg.ll b/test/DebugInfo/X86/subreg.ll index 1666ebb..c7f8638 100644 --- a/test/DebugInfo/X86/subreg.ll +++ b/test/DebugInfo/X86/subreg.ll @@ -20,11 +20,11 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !9 = metadata !{metadata !1} !0 = metadata !{i32 786689, metadata !1, metadata !"zzz", metadata !2, i32 16777219, metadata !6, i32 0, null} ; [ DW_TAG_arg_variable ] -!1 = metadata !{i32 786478, i32 0, metadata !2, metadata !"f", metadata !"f", metadata !"", metadata !2, i32 3, metadata !4, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, i16 (i16)* @f, null, null, null, i32 3} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 786478, metadata !2, metadata !"f", metadata !"f", metadata !"", metadata !2, i32 3, metadata !4, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, i16 (i16)* @f, null, null, null, i32 3} ; [ DW_TAG_subprogram ] !2 = metadata !{i32 786473, metadata !"/home/espindola/llvm/test.c", metadata !"/home/espindola/tmpfs/build", metadata !3} ; [ DW_TAG_file_type ] -!3 = metadata !{i32 786449, i32 0, i32 12, metadata !2, metadata !"clang version 3.0 ()", i1 false, metadata !"", i32 0, null, null, metadata !9, null, metadata !""} ; [ DW_TAG_compile_unit ] +!3 = metadata !{i32 786449, i32 12, metadata !2, metadata !"clang version 3.0 ()", i1 false, metadata !"", i32 0, null, null, metadata !9, null, null, metadata !""} ; [ DW_TAG_compile_unit ] !4 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !5, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !5 = metadata !{null} !6 = metadata !{i32 786468, metadata !3, metadata !"short", null, i32 0, i64 16, i64 16, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !7 = metadata !{i32 4, i32 22, metadata !8, null} -!8 = metadata !{i32 786443, metadata !1, i32 3, i32 19, metadata !2, i32 0} ; [ DW_TAG_lexical_block ] +!8 = metadata !{i32 786443, metadata !2, metadata !1, i32 3, i32 19, i32 0} ; [ DW_TAG_lexical_block ] diff --git a/test/DebugInfo/X86/union-template.ll b/test/DebugInfo/X86/union-template.ll new file mode 100644 index 0000000..8d23cae --- /dev/null +++ b/test/DebugInfo/X86/union-template.ll @@ -0,0 +1,58 @@ +; RUN: llc -O0 -mtriple=x86_64-linux-gnu %s -o %t -filetype=obj +; RUN: llvm-dwarfdump -debug-dump=info %t | FileCheck %s + +; Verify that we've emitted template arguments for the union +; CHECK: DW_TAG_union_type +; CHECK-NEXT: "Value<float>" +; CHECK: DW_TAG_template_type_parameter +; CHECK: "T" + +%"union.PR15637::Value" = type { i32 } + +@_ZN7PR156371fE = global %"union.PR15637::Value" zeroinitializer, align 4 + +define void @_ZN7PR156371gEf(float %value) #0 { +entry: + %value.addr = alloca float, align 4 + %tempValue = alloca %"union.PR15637::Value", align 4 + store float %value, float* %value.addr, align 4 + call void @llvm.dbg.declare(metadata !{float* %value.addr}, metadata !23), !dbg !24 + call void @llvm.dbg.declare(metadata !{%"union.PR15637::Value"* %tempValue}, metadata !25), !dbg !26 + ret void, !dbg !27 +} + +declare void @llvm.dbg.declare(metadata, metadata) #1 + +attributes #0 = { nounwind } +attributes #1 = { nounwind readnone } + +!llvm.dbg.cu = !{!0} + +!0 = metadata !{i32 786449, metadata !1, i32 4, metadata !"clang version 3.3 (trunk 178499) (llvm/trunk 178472)", i1 false, metadata !"", i32 0, metadata !2, metadata !2, metadata !3, metadata !9, metadata !9, metadata !""} ; [ DW_TAG_compile_unit ] [/usr/local/google/home/echristo/tmp/foo.cc] [DW_LANG_C_plus_plus] +!1 = metadata !{metadata !"foo.cc", metadata !"/usr/local/google/home/echristo/tmp"} +!2 = metadata !{i32 0} +!3 = metadata !{metadata !4} +!4 = metadata !{i32 786478, metadata !1, metadata !5, metadata !"g", metadata !"g", metadata !"_ZN7PR156371gEf", i32 3, metadata !6, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (float)* @_ZN7PR156371gEf, null, null, metadata !2, i32 3} ; [ DW_TAG_subprogram ] [line 3] [def] [g] +!5 = metadata !{i32 786489, metadata !1, null, metadata !"PR15637", i32 1} ; [ DW_TAG_namespace ] [PR15637] [line 1] +!6 = metadata !{i32 786453, i32 0, i32 0, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !7, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!7 = metadata !{null, metadata !8} +!8 = metadata !{i32 786468, null, null, metadata !"float", i32 0, i64 32, i64 32, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ] [float] [line 0, size 32, align 32, offset 0, enc DW_ATE_float] +!9 = metadata !{metadata !10} +!10 = metadata !{i32 786484, i32 0, metadata !5, metadata !"f", metadata !"f", metadata !"_ZN7PR156371fE", metadata !11, i32 6, metadata !12, i32 0, i32 1, %"union.PR15637::Value"* @_ZN7PR156371fE, null} ; [ DW_TAG_variable ] [f] [line 6] [def] +!11 = metadata !{i32 786473, metadata !1} ; [ DW_TAG_file_type ] [/usr/local/google/home/echristo/tmp/foo.cc] +!12 = metadata !{i32 786455, metadata !1, metadata !5, metadata !"Value<float>", i32 2, i64 32, i64 32, i64 0, i32 0, null, metadata !13, i32 0, null, metadata !21} ; [ DW_TAG_union_type ] [Value<float>] [line 2, size 32, align 32, offset 0] [from ] +!13 = metadata !{metadata !14, metadata !16} +!14 = metadata !{i32 786445, metadata !1, metadata !12, metadata !"a", i32 2, i64 32, i64 32, i64 0, i32 0, metadata !15} ; [ DW_TAG_member ] [a] [line 2, size 32, align 32, offset 0] [from int] +!15 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] +!16 = metadata !{i32 786478, metadata !1, metadata !12, metadata !"Value", metadata !"Value", metadata !"", i32 2, metadata !17, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !20, i32 2} ; [ DW_TAG_subprogram ] [line 2] [Value] +!17 = metadata !{i32 786453, i32 0, i32 0, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !18, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!18 = metadata !{null, metadata !19} +!19 = metadata !{i32 786447, i32 0, i32 0, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 1088, metadata !12} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [artificial] [from Value<float>] +!20 = metadata !{i32 786468} +!21 = metadata !{metadata !22} +!22 = metadata !{i32 786479, null, metadata !"T", metadata !8, null, i32 0, i32 0} ; [ DW_TAG_template_type_parameter ] +!23 = metadata !{i32 786689, metadata !4, metadata !"value", metadata !11, i32 16777219, metadata !8, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [value] [line 3] +!24 = metadata !{i32 3, i32 0, metadata !4, null} +!25 = metadata !{i32 786688, metadata !4, metadata !"tempValue", metadata !11, i32 4, metadata !12, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [tempValue] [line 4] +!26 = metadata !{i32 4, i32 0, metadata !4, null} +!27 = metadata !{i32 5, i32 0, metadata !4, null} diff --git a/test/DebugInfo/X86/vector.ll b/test/DebugInfo/X86/vector.ll index 3d2573c..658303a 100644 --- a/test/DebugInfo/X86/vector.ll +++ b/test/DebugInfo/X86/vector.ll @@ -11,14 +11,14 @@ !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !6, metadata !"clang version 3.3 (trunk 171825) (llvm/trunk 171822)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !3, metadata !""} ; [ DW_TAG_compile_unit ] [/Users/echristo/foo.c] [DW_LANG_C99] +!0 = metadata !{i32 786449, i32 12, metadata !6, metadata !"clang version 3.3 (trunk 171825) (llvm/trunk 171822)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !3, metadata !3, metadata !""} ; [ DW_TAG_compile_unit ] [/Users/echristo/foo.c] [DW_LANG_C99] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} !5 = metadata !{i32 786484, i32 0, null, metadata !"a", metadata !"a", metadata !"", metadata !6, i32 3, metadata !7, i32 0, i32 1, <4 x i32>* @a, null} ; [ DW_TAG_variable ] [a] [line 3] [def] !6 = metadata !{i32 786473, metadata !12} ; [ DW_TAG_file_type ] -!7 = metadata !{i32 786454, null, metadata !"v4si", metadata !6, i32 1, i64 0, i64 0, i64 0, i32 0, metadata !8} ; [ DW_TAG_typedef ] [v4si] [line 1, size 0, align 0, offset 0] [from ] -!8 = metadata !{i32 786433, null, metadata !"", null, i32 0, i64 128, i64 128, i32 0, i32 2048, metadata !9, metadata !10, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 128, align 128, offset 0] [vector] [from int] -!9 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] +!7 = metadata !{i32 786454, metadata !12, null, metadata !"v4si", i32 1, i64 0, i64 0, i64 0, i32 0, metadata !8} ; [ DW_TAG_typedef ] [v4si] [line 1, size 0, align 0, offset 0] [from ] +!8 = metadata !{i32 786433, null, null, metadata !"", i32 0, i64 128, i64 128, i32 0, i32 2048, metadata !9, metadata !10, i32 0, i32 0} ; [ DW_TAG_array_type ] [line 0, size 128, align 128, offset 0] [vector] [from int] +!9 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] !10 = metadata !{metadata !11} !11 = metadata !{i32 786465, i64 0, i64 4} ; [ DW_TAG_subrange_type ] [0, 3] !12 = metadata !{metadata !"foo.c", metadata !"/Users/echristo"} diff --git a/test/DebugInfo/array.ll b/test/DebugInfo/array.ll index 5b7d649..7dd57d7 100644 --- a/test/DebugInfo/array.ll +++ b/test/DebugInfo/array.ll @@ -14,14 +14,14 @@ declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!2} -!0 = metadata !{i32 786478, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 3, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 false, i32 ()* @main, null, null, null, i32 3} ; [ DW_TAG_subprogram ] +!0 = metadata !{i32 786478, metadata !1, metadata !"main", metadata !"main", metadata !"", metadata !1, i32 3, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 0, i1 false, i32 ()* @main, null, null, null, i32 3} ; [ DW_TAG_subprogram ] !1 = metadata !{i32 786473, metadata !14} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 786449, i32 0, i32 12, metadata !1, metadata !"clang version 3.0 (trunk 129138)", i1 false, metadata !"", i32 0, null, null, metadata !13, null, null} ; [ DW_TAG_compile_unit ] +!2 = metadata !{i32 786449, metadata !1, i32 12, metadata !"clang version 3.0 (trunk 129138)", i1 false, metadata !"", i32 0, null, null, metadata !13, null, null, null} ; [ DW_TAG_compile_unit ] !3 = metadata !{i32 786453, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !4 = metadata !{metadata !5} !5 = metadata !{i32 786468, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] !6 = metadata !{i32 786688, metadata !7, metadata !"a", metadata !1, i32 4, metadata !8, i32 0, null} ; [ DW_TAG_auto_variable ] -!7 = metadata !{i32 786443, metadata !0, i32 3, i32 12, metadata !1, i32 0} ; [ DW_TAG_lexical_block ] +!7 = metadata !{i32 786443, metadata !1, metadata !0, i32 3, i32 12, i32 0} ; [ DW_TAG_lexical_block ] !8 = metadata !{i32 786433, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 32, i32 0, i32 0, metadata !5, metadata !9, i32 0, i32 0} ; [ DW_TAG_array_type ] !9 = metadata !{metadata !10} ;CHECK: DW_TAG_subrange_type diff --git a/test/DebugInfo/dwarf-public-names.ll b/test/DebugInfo/dwarf-public-names.ll index d2dfdd9..5d33048 100644 --- a/test/DebugInfo/dwarf-public-names.ll +++ b/test/DebugInfo/dwarf-public-names.ll @@ -1,6 +1,7 @@ +; REQUIRES: object-emission + ; RUN: llc -generate-dwarf-pubnames -filetype=obj -o %t.o < %s ; RUN: llvm-dwarfdump -debug-dump=pubnames %t.o | FileCheck %s -; ; ModuleID = 'dwarf-public-names.cpp' ; ; Generated from: @@ -85,27 +86,27 @@ attributes #1 = { nounwind readnone } !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !4, metadata !"clang version 3.3 (http://llvm.org/git/clang.git a09cd8103a6a719cb2628cdf0c91682250a17bd2) (http://llvm.org/git/llvm.git 47d03cec0afca0c01ae42b82916d1d731716cd20)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !2, metadata !24, metadata !""} ; [ DW_TAG_compile_unit ] [/usr2/kparzysz/s.hex/t/dwarf-public-names.cpp] [DW_LANG_C_plus_plus] +!0 = metadata !{i32 786449, i32 4, metadata !4, metadata !"clang version 3.3 (http://llvm.org/git/clang.git a09cd8103a6a719cb2628cdf0c91682250a17bd2) (http://llvm.org/git/llvm.git 47d03cec0afca0c01ae42b82916d1d731716cd20)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !2, metadata !24, metadata !24, metadata !""} ; [ DW_TAG_compile_unit ] [/usr2/kparzysz/s.hex/t/dwarf-public-names.cpp] [DW_LANG_C_plus_plus] !1 = metadata !{i32 0} !2 = metadata !{metadata !3, metadata !18, metadata !19, metadata !20} -!3 = metadata !{i32 786478, i32 0, null, metadata !"member_function", metadata !"member_function", metadata !"_ZN1C15member_functionEv", metadata !4, i32 9, metadata !5, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (%struct.C*)* @_ZN1C15member_functionEv, null, metadata !12, metadata !1, i32 9} ; [ DW_TAG_subprogram ] [line 9] [def] [member_function] +!3 = metadata !{i32 786478, metadata !4, null, metadata !"member_function", metadata !"member_function", metadata !"_ZN1C15member_functionEv", i32 9, metadata !5, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (%struct.C*)* @_ZN1C15member_functionEv, null, metadata !12, metadata !1, i32 9} ; [ DW_TAG_subprogram ] [line 9] [def] [member_function] !4 = metadata !{i32 786473, metadata !37} ; [ DW_TAG_file_type ] !5 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !6, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !6 = metadata !{null, metadata !7} !7 = metadata !{i32 786447, i32 0, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 1088, metadata !8} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [artificial] [from C] -!8 = metadata !{i32 786451, null, metadata !"C", metadata !4, i32 1, i64 8, i64 8, i32 0, i32 0, null, metadata !9, i32 0, null, null} ; [ DW_TAG_structure_type ] [C] [line 1, size 8, align 8, offset 0] [from ] +!8 = metadata !{i32 786451, metadata !37, null, metadata !"C", i32 1, i64 8, i64 8, i32 0, i32 0, null, metadata !9, i32 0, null, null} ; [ DW_TAG_structure_type ] [C] [line 1, size 8, align 8, offset 0] [from ] !9 = metadata !{metadata !10, metadata !12, metadata !14} -!10 = metadata !{i32 786445, metadata !8, metadata !"static_member_variable", metadata !4, i32 4, i64 0, i64 0, i64 0, i32 4096, metadata !11, null} ; [ DW_TAG_member ] [static_member_variable] [line 4, size 0, align 0, offset 0] [static] [from int] -!11 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] -!12 = metadata !{i32 786478, i32 0, metadata !8, metadata !"member_function", metadata !"member_function", metadata !"_ZN1C15member_functionEv", metadata !4, i32 2, metadata !5, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, null, i32 0, metadata !13, i32 2} ; [ DW_TAG_subprogram ] [line 2] [member_function] +!10 = metadata !{i32 786445, metadata !37, metadata !8, metadata !"static_member_variable", i32 4, i64 0, i64 0, i64 0, i32 4096, metadata !11, null} ; [ DW_TAG_member ] [static_member_variable] [line 4, size 0, align 0, offset 0] [static] [from int] +!11 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] +!12 = metadata !{i32 786478, metadata !4, metadata !8, metadata !"member_function", metadata !"member_function", metadata !"_ZN1C15member_functionEv", i32 2, metadata !5, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, null, i32 0, metadata !13, i32 2} ; [ DW_TAG_subprogram ] [line 2] [member_function] !13 = metadata !{i32 786468} ; [ DW_TAG_base_type ] [line 0, size 0, align 0, offset 0] -!14 = metadata !{i32 786478, i32 0, metadata !8, metadata !"static_member_function", metadata !"static_member_function", metadata !"_ZN1C22static_member_functionEv", metadata !4, i32 3, metadata !15, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, null, i32 0, metadata !17, i32 3} ; [ DW_TAG_subprogram ] [line 3] [static_member_function] +!14 = metadata !{i32 786478, metadata !4, metadata !8, metadata !"static_member_function", metadata !"static_member_function", metadata !"_ZN1C22static_member_functionEv", i32 3, metadata !15, i1 false, i1 false, i32 0, i32 0, null, i32 256, i1 false, null, null, i32 0, metadata !17, i32 3} ; [ DW_TAG_subprogram ] [line 3] [static_member_function] !15 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !16, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !16 = metadata !{metadata !11} !17 = metadata !{i32 786468} ; [ DW_TAG_base_type ] [line 0, size 0, align 0, offset 0] -!18 = metadata !{i32 786478, i32 0, null, metadata !"static_member_function", metadata !"static_member_function", metadata !"_ZN1C22static_member_functionEv", metadata !4, i32 13, metadata !15, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 ()* @_ZN1C22static_member_functionEv, null, metadata !14, metadata !1, i32 13} ; [ DW_TAG_subprogram ] [line 13] [def] [static_member_function] -!19 = metadata !{i32 786478, i32 0, metadata !4, metadata !"global_function", metadata !"global_function", metadata !"_Z15global_functionv", metadata !4, i32 19, metadata !15, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 ()* @_Z15global_functionv, null, null, metadata !1, i32 19} ; [ DW_TAG_subprogram ] [line 19] [def] [global_function] -!20 = metadata !{i32 786478, i32 0, metadata !21, metadata !"global_namespace_function", metadata !"global_namespace_function", metadata !"_ZN2ns25global_namespace_functionEv", metadata !4, i32 24, metadata !22, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void ()* @_ZN2ns25global_namespace_functionEv, null, null, metadata !1, i32 24} ; [ DW_TAG_subprogram ] [line 24] [def] [global_namespace_function] +!18 = metadata !{i32 786478, metadata !4, null, metadata !"static_member_function", metadata !"static_member_function", metadata !"_ZN1C22static_member_functionEv", i32 13, metadata !15, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 ()* @_ZN1C22static_member_functionEv, null, metadata !14, metadata !1, i32 13} ; [ DW_TAG_subprogram ] [line 13] [def] [static_member_function] +!19 = metadata !{i32 786478, metadata !4, metadata !4, metadata !"global_function", metadata !"global_function", metadata !"_Z15global_functionv", i32 19, metadata !15, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 ()* @_Z15global_functionv, null, null, metadata !1, i32 19} ; [ DW_TAG_subprogram ] [line 19] [def] [global_function] +!20 = metadata !{i32 786478, metadata !4, metadata !21, metadata !"global_namespace_function", metadata !"global_namespace_function", metadata !"_ZN2ns25global_namespace_functionEv", i32 24, metadata !22, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void ()* @_ZN2ns25global_namespace_functionEv, null, null, metadata !1, i32 24} ; [ DW_TAG_subprogram ] [line 24] [def] [global_namespace_function] !21 = metadata !{i32 786489, null, metadata !"ns", metadata !4, i32 23} ; [ DW_TAG_namespace ] [/usr2/kparzysz/s.hex/t/dwarf-public-names.cpp] !22 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !23, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !23 = metadata !{null} @@ -114,7 +115,7 @@ attributes #1 = { nounwind readnone } !26 = metadata !{i32 786484, i32 0, null, metadata !"global_variable", metadata !"global_variable", metadata !"", metadata !4, i32 17, metadata !8, i32 0, i32 1, %struct.C* @global_variable, null} ; [ DW_TAG_variable ] [global_variable] [line 17] [def] !27 = metadata !{i32 786484, i32 0, metadata !21, metadata !"global_namespace_variable", metadata !"global_namespace_variable", metadata !"_ZN2ns25global_namespace_variableE", metadata !4, i32 27, metadata !11, i32 0, i32 1, i32* @_ZN2ns25global_namespace_variableE, null} ; [ DW_TAG_variable ] [global_namespace_variable] [line 27] [def] !28 = metadata !{i32 786689, metadata !3, metadata !"this", metadata !4, i32 16777225, metadata !29, i32 1088, i32 0} ; [ DW_TAG_arg_variable ] [this] [line 9] -!29 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !8} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from C] +!29 = metadata !{i32 786447, null, null, metadata !"", i32 0, i64 64, i64 64, i64 0, i32 0, metadata !8} ; [ DW_TAG_pointer_type ] [line 0, size 64, align 64, offset 0] [from C] !30 = metadata !{i32 9, i32 0, metadata !3, null} !31 = metadata !{i32 10, i32 0, metadata !3, null} !32 = metadata !{i32 11, i32 0, metadata !3, null} diff --git a/test/DebugInfo/dwarfdump-test.test b/test/DebugInfo/dwarfdump-test.test index 355445e..058d6a3 100644 --- a/test/DebugInfo/dwarfdump-test.test +++ b/test/DebugInfo/dwarfdump-test.test @@ -8,11 +8,11 @@ RUN: llvm-dwarfdump %p/Inputs/dwarfdump-test2.elf-x86-64 \ RUN: --address=0x4004e8 --functions | FileCheck %s -check-prefix MANY_CU_1 RUN: llvm-dwarfdump %p/Inputs/dwarfdump-test2.elf-x86-64 \ RUN: --address=0x4004f4 --functions | FileCheck %s -check-prefix MANY_CU_2 -RUN: llvm-dwarfdump %p/Inputs/dwarfdump-test3.elf-x86-64 \ +RUN: llvm-dwarfdump "%p/Inputs/dwarfdump-test3.elf-x86-64 space" \ RUN: --address=0x640 --functions | FileCheck %s -check-prefix ABS_ORIGIN_1 -RUN: llvm-dwarfdump %p/Inputs/dwarfdump-test3.elf-x86-64 \ +RUN: llvm-dwarfdump "%p/Inputs/dwarfdump-test3.elf-x86-64 space" \ RUN: --address=0x633 --functions | FileCheck %s -check-prefix INCLUDE_TEST_1 -RUN: llvm-dwarfdump %p/Inputs/dwarfdump-test3.elf-x86-64 \ +RUN: llvm-dwarfdump "%p/Inputs/dwarfdump-test3.elf-x86-64 space" \ RUN: --address=0x62d --functions | FileCheck %s -check-prefix INCLUDE_TEST_2 RUN: llvm-dwarfdump %p/Inputs/dwarfdump-test4.elf-x86-64 \ RUN: --address=0x62c --functions \ diff --git a/test/DebugInfo/dwarfdump-zlib.test b/test/DebugInfo/dwarfdump-zlib.test new file mode 100644 index 0000000..8ce2cf7 --- /dev/null +++ b/test/DebugInfo/dwarfdump-zlib.test @@ -0,0 +1,12 @@ +REQUIRES: zlib + +RUN: llvm-dwarfdump %p/Inputs/dwarfdump-test-zlib.elf-x86-64 \ +RUN: | FileCheck %s -check-prefix FULLDUMP +RUN: llvm-dwarfdump %p/Inputs/dwarfdump-test-zlib.elf-x86-64 \ +RUN: --address=0x400559 --functions | FileCheck %s -check-prefix MAIN + +FULLDUMP: .debug_abbrev contents +FULLDUMP: .debug_info contents + +MAIN: main +MAIN-NEXT: /tmp/dbginfo{{[/\\]}}dwarfdump-test-zlib.cc:16 diff --git a/test/DebugInfo/inline-debug-info-multiret.ll b/test/DebugInfo/inline-debug-info-multiret.ll new file mode 100644 index 0000000..108f212 --- /dev/null +++ b/test/DebugInfo/inline-debug-info-multiret.ll @@ -0,0 +1,154 @@ +; RUN: opt -inline -S < %s | FileCheck %s +; +; A hand-edited version of inline-debug-info.ll to test inlining of a +; function with multiple returns. +; +; Make sure the branch instructions created during inlining has a debug location, +; so the range of the inlined function is correct. +; CHECK: br label %_Z4testi.exit, !dbg ![[MD:[0-9]+]] +; CHECK: br label %_Z4testi.exit, !dbg ![[MD]] +; CHECK: br label %invoke.cont, !dbg ![[MD]] +; The branch instruction has the source location of line 9 and its inlined location +; has the source location of line 14. +; CHECK: ![[INL:[0-9]+]] = metadata !{i32 14, i32 0, metadata {{.*}}, null} +; CHECK: ![[MD]] = metadata !{i32 9, i32 0, metadata {{.*}}, metadata ![[INL]]} + +; ModuleID = 'test.cpp' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-darwin12.0.0" + +@_ZTIi = external constant i8* +@global_var = external global i32 + +; copy of above function with multiple returns +define i32 @_Z4testi(i32 %k) { +entry: + %retval = alloca i32, align 4 + %k.addr = alloca i32, align 4 + %k2 = alloca i32, align 4 + store i32 %k, i32* %k.addr, align 4 + call void @llvm.dbg.declare(metadata !{i32* %k.addr}, metadata !13), !dbg !14 + call void @llvm.dbg.declare(metadata !{i32* %k2}, metadata !15), !dbg !16 + %0 = load i32* %k.addr, align 4, !dbg !16 + %call = call i32 @_Z8test_exti(i32 %0), !dbg !16 + store i32 %call, i32* %k2, align 4, !dbg !16 + %1 = load i32* %k2, align 4, !dbg !17 + %cmp = icmp sgt i32 %1, 100, !dbg !17 + br i1 %cmp, label %if.then, label %if.end, !dbg !17 + +if.then: ; preds = %entry + %2 = load i32* %k2, align 4, !dbg !18 + store i32 %2, i32* %retval, !dbg !18 + br label %return, !dbg !18 + +if.end: ; preds = %entry + store i32 0, i32* %retval, !dbg !19 + %3 = load i32* %retval, !dbg !20 ; hand-edited + ret i32 %3, !dbg !20 ; hand-edited + +return: ; preds = %if.end, %if.then + %4 = load i32* %retval, !dbg !20 + ret i32 %4, !dbg !20 +} + + +; Function Attrs: nounwind readnone +declare void @llvm.dbg.declare(metadata, metadata) #1 + +declare i32 @_Z8test_exti(i32) + +define i32 @_Z5test2v() { +entry: + %exn.slot = alloca i8* + %ehselector.slot = alloca i32 + %e = alloca i32, align 4 + %0 = load i32* @global_var, align 4, !dbg !21 + %call = invoke i32 @_Z4testi(i32 %0) + to label %invoke.cont unwind label %lpad, !dbg !21 + +invoke.cont: ; preds = %entry + br label %try.cont, !dbg !23 + +lpad: ; preds = %entry + %1 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) + catch i8* bitcast (i8** @_ZTIi to i8*), !dbg !21 + %2 = extractvalue { i8*, i32 } %1, 0, !dbg !21 + store i8* %2, i8** %exn.slot, !dbg !21 + %3 = extractvalue { i8*, i32 } %1, 1, !dbg !21 + store i32 %3, i32* %ehselector.slot, !dbg !21 + br label %catch.dispatch, !dbg !21 + +catch.dispatch: ; preds = %lpad + %sel = load i32* %ehselector.slot, !dbg !23 + %4 = call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTIi to i8*)) #2, !dbg !23 + %matches = icmp eq i32 %sel, %4, !dbg !23 + br i1 %matches, label %catch, label %eh.resume, !dbg !23 + +catch: ; preds = %catch.dispatch + call void @llvm.dbg.declare(metadata !{i32* %e}, metadata !24), !dbg !25 + %exn = load i8** %exn.slot, !dbg !23 + %5 = call i8* @__cxa_begin_catch(i8* %exn) #2, !dbg !23 + %6 = bitcast i8* %5 to i32*, !dbg !23 + %7 = load i32* %6, align 4, !dbg !23 + store i32 %7, i32* %e, align 4, !dbg !23 + store i32 0, i32* @global_var, align 4, !dbg !26 + call void @__cxa_end_catch() #2, !dbg !28 + br label %try.cont, !dbg !28 + +try.cont: ; preds = %catch, %invoke.cont + store i32 1, i32* @global_var, align 4, !dbg !29 + ret i32 0, !dbg !30 + +eh.resume: ; preds = %catch.dispatch + %exn1 = load i8** %exn.slot, !dbg !23 + %sel2 = load i32* %ehselector.slot, !dbg !23 + %lpad.val = insertvalue { i8*, i32 } undef, i8* %exn1, 0, !dbg !23 + %lpad.val3 = insertvalue { i8*, i32 } %lpad.val, i32 %sel2, 1, !dbg !23 + resume { i8*, i32 } %lpad.val3, !dbg !23 +} + +declare i32 @__gxx_personality_v0(...) + +; Function Attrs: nounwind readnone +declare i32 @llvm.eh.typeid.for(i8*) #1 + +declare i8* @__cxa_begin_catch(i8*) + +declare void @__cxa_end_catch() + +attributes #1 = { nounwind readnone } +attributes #2 = { nounwind } + +!llvm.dbg.cu = !{!0} + +!0 = metadata !{i32 786449, metadata !1, i32 4, metadata !"clang version 3.3 ", i1 false, metadata !"", i32 0, metadata !2, metadata !2, metadata !3, metadata !2, metadata !2, metadata !""} ; [ DW_TAG_compile_unit ] [<unknown>] [DW_LANG_C_plus_plus] +!1 = metadata !{metadata !"<unknown>", metadata !""} +!2 = metadata !{i32 0} +!3 = metadata !{metadata !4, metadata !10} +!4 = metadata !{i32 786478, metadata !5, metadata !6, metadata !"test", metadata !"test", metadata !"_Z4testi", i32 4, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (i32)* @_Z4testi, null, null, metadata !2, i32 4} ; [ DW_TAG_subprogram ] [line 4] [def] [test] +!5 = metadata !{metadata !"test.cpp", metadata !""} +!6 = metadata !{i32 786473, metadata !5} ; [ DW_TAG_file_type ] [test.cpp] +!7 = metadata !{i32 786453, i32 0, i32 0, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!8 = metadata !{metadata !9, metadata !9} +!9 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] +!10 = metadata !{i32 786478, metadata !5, metadata !6, metadata !"test2", metadata !"test2", metadata !"_Z5test2v", i32 11, metadata !11, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 ()* @_Z5test2v, null, null, metadata !2, i32 11} ; [ DW_TAG_subprogram ] [line 11] [def] [test2] +!11 = metadata !{i32 786453, i32 0, i32 0, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!12 = metadata !{metadata !9} +!13 = metadata !{i32 786689, metadata !4, metadata !"k", metadata !6, i32 16777220, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [k] [line 4] +!14 = metadata !{i32 4, i32 0, metadata !4, null} +!15 = metadata !{i32 786688, metadata !4, metadata !"k2", metadata !6, i32 5, metadata !9, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [k2] [line 5] +!16 = metadata !{i32 5, i32 0, metadata !4, null} +!17 = metadata !{i32 6, i32 0, metadata !4, null} +!18 = metadata !{i32 7, i32 0, metadata !4, null} +!19 = metadata !{i32 8, i32 0, metadata !4, null} +!20 = metadata !{i32 9, i32 0, metadata !4, null} +!21 = metadata !{i32 14, i32 0, metadata !22, null} +!22 = metadata !{i32 786443, metadata !5, metadata !10, i32 13, i32 0, i32 0} ; [ DW_TAG_lexical_block ] [test.cpp] +!23 = metadata !{i32 15, i32 0, metadata !22, null} +!24 = metadata !{i32 786688, metadata !10, metadata !"e", metadata !6, i32 16, metadata !9, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [e] [line 16] +!25 = metadata !{i32 16, i32 0, metadata !10, null} +!26 = metadata !{i32 17, i32 0, metadata !27, null} +!27 = metadata !{i32 786443, metadata !5, metadata !10, i32 16, i32 0, i32 1} ; [ DW_TAG_lexical_block ] [test.cpp] +!28 = metadata !{i32 18, i32 0, metadata !27, null} +!29 = metadata !{i32 19, i32 0, metadata !10, null} +!30 = metadata !{i32 20, i32 0, metadata !10, null} diff --git a/test/DebugInfo/inline-debug-info.ll b/test/DebugInfo/inline-debug-info.ll new file mode 100644 index 0000000..7c3267a --- /dev/null +++ b/test/DebugInfo/inline-debug-info.ll @@ -0,0 +1,172 @@ +; RUN: opt -inline -S < %s | FileCheck %s + +; Created from source +; +; +; 1 // test.cpp +; 2 extern int global_var; +; 3 extern int test_ext(int k); +; 4 int test (int k) { +; 5 int k2 = test_ext(k); +; 6 if (k2 > 100) +; 7 return k2; +; 8 return 0; +; 9 } +; 10 +; 11 int test2() { +; 12 try +; 13 { +; 14 test(global_var); +; 15 } +; 16 catch (int e) { +; 17 global_var = 0; +; 18 } +; 19 global_var = 1; +; 20 return 0; +; 21 } + +; CHECK: _Z4testi.exit: +; Make sure the branch instruction created during inlining has a debug location, +; so the range of the inlined function is correct. +; CHECK: br label %invoke.cont, !dbg ![[MD:[0-9]+]] +; The branch instruction has the source location of line 9 and its inlined location +; has the source location of line 14. +; CHECK: ![[INL:[0-9]+]] = metadata !{i32 14, i32 0, metadata {{.*}}, null} +; CHECK: ![[MD]] = metadata !{i32 9, i32 0, metadata {{.*}}, metadata ![[INL]]} + +; ModuleID = 'test.cpp' +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-darwin12.0.0" + +@_ZTIi = external constant i8* +@global_var = external global i32 + +define i32 @_Z4testi(i32 %k) { +entry: + %retval = alloca i32, align 4 + %k.addr = alloca i32, align 4 + %k2 = alloca i32, align 4 + store i32 %k, i32* %k.addr, align 4 + call void @llvm.dbg.declare(metadata !{i32* %k.addr}, metadata !13), !dbg !14 + call void @llvm.dbg.declare(metadata !{i32* %k2}, metadata !15), !dbg !16 + %0 = load i32* %k.addr, align 4, !dbg !16 + %call = call i32 @_Z8test_exti(i32 %0), !dbg !16 + store i32 %call, i32* %k2, align 4, !dbg !16 + %1 = load i32* %k2, align 4, !dbg !17 + %cmp = icmp sgt i32 %1, 100, !dbg !17 + br i1 %cmp, label %if.then, label %if.end, !dbg !17 + +if.then: ; preds = %entry + %2 = load i32* %k2, align 4, !dbg !18 + store i32 %2, i32* %retval, !dbg !18 + br label %return, !dbg !18 + +if.end: ; preds = %entry + store i32 0, i32* %retval, !dbg !19 + br label %return, !dbg !19 + +return: ; preds = %if.end, %if.then + %3 = load i32* %retval, !dbg !20 + ret i32 %3, !dbg !20 +} + +; Function Attrs: nounwind readnone +declare void @llvm.dbg.declare(metadata, metadata) #1 + +declare i32 @_Z8test_exti(i32) + +define i32 @_Z5test2v() { +entry: + %exn.slot = alloca i8* + %ehselector.slot = alloca i32 + %e = alloca i32, align 4 + %0 = load i32* @global_var, align 4, !dbg !21 + %call = invoke i32 @_Z4testi(i32 %0) + to label %invoke.cont unwind label %lpad, !dbg !21 + +invoke.cont: ; preds = %entry + br label %try.cont, !dbg !23 + +lpad: ; preds = %entry + %1 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) + catch i8* bitcast (i8** @_ZTIi to i8*), !dbg !21 + %2 = extractvalue { i8*, i32 } %1, 0, !dbg !21 + store i8* %2, i8** %exn.slot, !dbg !21 + %3 = extractvalue { i8*, i32 } %1, 1, !dbg !21 + store i32 %3, i32* %ehselector.slot, !dbg !21 + br label %catch.dispatch, !dbg !21 + +catch.dispatch: ; preds = %lpad + %sel = load i32* %ehselector.slot, !dbg !23 + %4 = call i32 @llvm.eh.typeid.for(i8* bitcast (i8** @_ZTIi to i8*)) #2, !dbg !23 + %matches = icmp eq i32 %sel, %4, !dbg !23 + br i1 %matches, label %catch, label %eh.resume, !dbg !23 + +catch: ; preds = %catch.dispatch + call void @llvm.dbg.declare(metadata !{i32* %e}, metadata !24), !dbg !25 + %exn = load i8** %exn.slot, !dbg !23 + %5 = call i8* @__cxa_begin_catch(i8* %exn) #2, !dbg !23 + %6 = bitcast i8* %5 to i32*, !dbg !23 + %7 = load i32* %6, align 4, !dbg !23 + store i32 %7, i32* %e, align 4, !dbg !23 + store i32 0, i32* @global_var, align 4, !dbg !26 + call void @__cxa_end_catch() #2, !dbg !28 + br label %try.cont, !dbg !28 + +try.cont: ; preds = %catch, %invoke.cont + store i32 1, i32* @global_var, align 4, !dbg !29 + ret i32 0, !dbg !30 + +eh.resume: ; preds = %catch.dispatch + %exn1 = load i8** %exn.slot, !dbg !23 + %sel2 = load i32* %ehselector.slot, !dbg !23 + %lpad.val = insertvalue { i8*, i32 } undef, i8* %exn1, 0, !dbg !23 + %lpad.val3 = insertvalue { i8*, i32 } %lpad.val, i32 %sel2, 1, !dbg !23 + resume { i8*, i32 } %lpad.val3, !dbg !23 +} + +declare i32 @__gxx_personality_v0(...) + +; Function Attrs: nounwind readnone +declare i32 @llvm.eh.typeid.for(i8*) #1 + +declare i8* @__cxa_begin_catch(i8*) + +declare void @__cxa_end_catch() + +attributes #1 = { nounwind readnone } +attributes #2 = { nounwind } + +!llvm.dbg.cu = !{!0} + +!0 = metadata !{i32 786449, metadata !1, i32 4, metadata !"clang version 3.3 ", i1 false, metadata !"", i32 0, metadata !2, metadata !2, metadata !3, metadata !2, metadata !2, metadata !""} ; [ DW_TAG_compile_unit ] [<unknown>] [DW_LANG_C_plus_plus] +!1 = metadata !{metadata !"<unknown>", metadata !""} +!2 = metadata !{i32 0} +!3 = metadata !{metadata !4, metadata !10} +!4 = metadata !{i32 786478, metadata !5, metadata !6, metadata !"test", metadata !"test", metadata !"_Z4testi", i32 4, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (i32)* @_Z4testi, null, null, metadata !2, i32 4} ; [ DW_TAG_subprogram ] [line 4] [def] [test] +!5 = metadata !{metadata !"test.cpp", metadata !""} +!6 = metadata !{i32 786473, metadata !5} ; [ DW_TAG_file_type ] [test.cpp] +!7 = metadata !{i32 786453, i32 0, i32 0, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!8 = metadata !{metadata !9, metadata !9} +!9 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] +!10 = metadata !{i32 786478, metadata !5, metadata !6, metadata !"test2", metadata !"test2", metadata !"_Z5test2v", i32 11, metadata !11, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 ()* @_Z5test2v, null, null, metadata !2, i32 11} ; [ DW_TAG_subprogram ] [line 11] [def] [test2] +!11 = metadata !{i32 786453, i32 0, i32 0, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!12 = metadata !{metadata !9} +!13 = metadata !{i32 786689, metadata !4, metadata !"k", metadata !6, i32 16777220, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] [k] [line 4] +!14 = metadata !{i32 4, i32 0, metadata !4, null} +!15 = metadata !{i32 786688, metadata !4, metadata !"k2", metadata !6, i32 5, metadata !9, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [k2] [line 5] +!16 = metadata !{i32 5, i32 0, metadata !4, null} +!17 = metadata !{i32 6, i32 0, metadata !4, null} +!18 = metadata !{i32 7, i32 0, metadata !4, null} +!19 = metadata !{i32 8, i32 0, metadata !4, null} +!20 = metadata !{i32 9, i32 0, metadata !4, null} +!21 = metadata !{i32 14, i32 0, metadata !22, null} +!22 = metadata !{i32 786443, metadata !5, metadata !10, i32 13, i32 0, i32 0} ; [ DW_TAG_lexical_block ] [test.cpp] +!23 = metadata !{i32 15, i32 0, metadata !22, null} +!24 = metadata !{i32 786688, metadata !10, metadata !"e", metadata !6, i32 16, metadata !9, i32 0, i32 0} ; [ DW_TAG_auto_variable ] [e] [line 16] +!25 = metadata !{i32 16, i32 0, metadata !10, null} +!26 = metadata !{i32 17, i32 0, metadata !27, null} +!27 = metadata !{i32 786443, metadata !5, metadata !10, i32 16, i32 0, i32 1} ; [ DW_TAG_lexical_block ] [test.cpp] +!28 = metadata !{i32 18, i32 0, metadata !27, null} +!29 = metadata !{i32 19, i32 0, metadata !10, null} +!30 = metadata !{i32 20, i32 0, metadata !10, null} diff --git a/test/DebugInfo/inlined-vars.ll b/test/DebugInfo/inlined-vars.ll index 1698c7f..841daaa 100644 --- a/test/DebugInfo/inlined-vars.ll +++ b/test/DebugInfo/inlined-vars.ll @@ -17,16 +17,16 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !6, metadata !"clang version 3.2 (trunk 159419)", i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, i32 4, metadata !6, metadata !"clang version 3.2 (trunk 159419)", i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5, metadata !10} -!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"main", metadata !"main", metadata !"", metadata !6, i32 10, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i32 ()* @main, null, null, metadata !1, i32 10} ; [ DW_TAG_subprogram ] -!6 = metadata !{i32 786473, metadata !"inline-bug.cc", metadata !"/tmp/dbginfo/pr13202"} ; [ DW_TAG_file_type ] -!7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!5 = metadata !{i32 786478, metadata !6, metadata !"main", metadata !"main", metadata !"", metadata !6, i32 10, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i32 ()* @main, null, null, metadata !1, i32 10} ; [ DW_TAG_subprogram ] +!6 = metadata !{i32 786473, metadata !26} ; [ DW_TAG_file_type ] +!7 = metadata !{i32 786453, null, null, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !8 = metadata !{metadata !9} -!9 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!10 = metadata !{i32 786478, i32 0, metadata !6, metadata !"f", metadata !"f", metadata !"_ZL1fi", metadata !6, i32 3, metadata !11, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 true, null, null, null, metadata !13, i32 3} ; [ DW_TAG_subprogram ] -!11 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!9 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!10 = metadata !{i32 786478, metadata !6, metadata !"f", metadata !"f", metadata !"_ZL1fi", metadata !6, i32 3, metadata !11, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 true, null, null, null, metadata !13, i32 3} ; [ DW_TAG_subprogram ] +!11 = metadata !{i32 786453, null, null, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !12 = metadata !{metadata !9, metadata !9} !13 = metadata !{metadata !14} !14 = metadata !{metadata !15, metadata !16} @@ -51,3 +51,4 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !23 = metadata !{i32 4, i32 16, metadata !10, metadata !19} !24 = metadata !{i32 5, i32 3, metadata !10, metadata !19} !25 = metadata !{i32 6, i32 3, metadata !10, metadata !19} +!26 = metadata !{metadata !"inline-bug.cc", metadata !"/tmp/dbginfo/pr13202"} diff --git a/test/DebugInfo/llvm-symbolizer.test b/test/DebugInfo/llvm-symbolizer.test new file mode 100644 index 0000000..163bd8e --- /dev/null +++ b/test/DebugInfo/llvm-symbolizer.test @@ -0,0 +1,25 @@ +RUN: echo "%p/Inputs/dwarfdump-test.elf-x86-64 0x400559" > %t.input +RUN: echo "%p/Inputs/dwarfdump-test4.elf-x86-64 0x62c" >> %t.input +RUN: echo "%p/Inputs/dwarfdump-inl-test.elf-x86-64 0x710" >> %t.input +RUN: echo "\"%p/Inputs/dwarfdump-test3.elf-x86-64 space\" 0x633" >> %t.input + +RUN: llvm-symbolizer --functions --inlining --demangle=false < %t.input \ +RUN: | FileCheck %s + +REQUIRES: shell + +CHECK: main +CHECK-NEXT: /tmp/dbginfo{{[/\\]}}dwarfdump-test.cc:16 +CHECK: _Z1cv +CHECK-NEXT: /tmp/dbginfo{{[/\\]}}dwarfdump-test4-part1.cc:2 +CHECK: inlined_h +CHECK-NEXT: dwarfdump-inl-test.h:2 +CHECK-NEXT: inlined_g +CHECK-NEXT: dwarfdump-inl-test.h:7 +CHECK-NEXT: inlined_f +CHECK-NEXT: dwarfdump-inl-test.cc:3 +CHECK-NEXT: main +CHECK-NEXT: dwarfdump-inl-test.cc: + +CHECK: _Z3do1v +CHECK-NEXT: dwarfdump-test3-decl.h:7 diff --git a/test/DebugInfo/member-pointers.ll b/test/DebugInfo/member-pointers.ll index 031056e..20f4e68 100644 --- a/test/DebugInfo/member-pointers.ll +++ b/test/DebugInfo/member-pointers.ll @@ -1,10 +1,13 @@ +; REQUIRES: object-emission +; XFAIL: hexagon + ; RUN: llc -filetype=obj -O0 < %s > %t ; RUN: llvm-dwarfdump -debug-dump=info %t | FileCheck %s ; CHECK: DW_TAG_ptr_to_member_type ; CHECK: [[TYPE:.*]]: DW_TAG_subroutine_type ; CHECK: DW_TAG_formal_parameter ; CHECK-NEXT: DW_AT_type -; CHECK-NEXT: DW_AT_artificial [DW_FORM_flag_present] +; CHECK-NEXT: DW_AT_artificial [DW_FORM_flag ; CHECK: DW_TAG_ptr_to_member_type ; CHECK-NEXT: DW_AT_type [DW_FORM_ref4] (cu + {{.*}} => {[[TYPE]]}) ; IR generated from clang -g with the following source: @@ -19,14 +22,14 @@ !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !6, metadata !"clang version 3.3 ", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !3, metadata !""} ; [ DW_TAG_compile_unit ] [/home/blaikie/Development/scratch/simple.cpp] [DW_LANG_C_plus_plus] +!0 = metadata !{i32 786449, i32 4, metadata !6, metadata !"clang version 3.3 ", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !3, metadata !3, metadata !""} ; [ DW_TAG_compile_unit ] [/home/blaikie/Development/scratch/simple.cpp] [DW_LANG_C_plus_plus] !1 = metadata !{i32 0} !3 = metadata !{metadata !5, metadata !10} !5 = metadata !{i32 786484, i32 0, null, metadata !"x", metadata !"x", metadata !"", metadata !6, i32 4, metadata !7, i32 0, i32 1, i64* @x, null} ; [ DW_TAG_variable ] [x] [line 4] [def] !6 = metadata !{i32 786473, metadata !15} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786463, null, null, null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !8, metadata !9} ; [ DW_TAG_ptr_to_member_type ] [line 0, size 0, align 0, offset 0] [from int] -!8 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] -!9 = metadata !{i32 786451, null, metadata !"S", metadata !6, i32 1, i64 8, i64 8, i32 0, i32 0, null, metadata !1, i32 0, null, null} ; [ DW_TAG_structure_type ] [S] [line 1, size 8, align 8, offset 0] [from ] +!8 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] +!9 = metadata !{i32 786451, metadata !15, null, metadata !"S", i32 1, i64 8, i64 8, i32 0, i32 0, null, metadata !1, i32 0, null, null} ; [ DW_TAG_structure_type ] [S] [line 1, size 8, align 8, offset 0] [from ] !10 = metadata !{i32 786484, i32 0, null, metadata !"y", metadata !"y", metadata !"", metadata !6, i32 5, metadata !11, i32 0, i32 1, { i64, i64 }* @y, null} ; [ DW_TAG_variable ] [y] [line 5] [def] !11 = metadata !{i32 786463, null, null, null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !12, metadata !9} ; [ DW_TAG_ptr_to_member_type ] [line 0, size 0, align 0, offset 0] [from ] !12 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !13, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] diff --git a/test/DebugInfo/namespace.ll b/test/DebugInfo/namespace.ll new file mode 100644 index 0000000..dc5d282 --- /dev/null +++ b/test/DebugInfo/namespace.ll @@ -0,0 +1,72 @@ +; REQUIRES: object-emission + +; RUN: llc -O0 -filetype=obj < %s > %t +; RUN: llvm-dwarfdump %t | FileCheck %s +; CHECK: debug_info contents +; CHECK: DW_TAG_namespace +; CHECK-NEXT: DW_AT_name{{.*}} = "A" +; CHECK-NEXT: DW_AT_decl_file{{.*}}(0x0[[F1:[0-9]]]) +; CHECK-NEXT: DW_AT_decl_line{{.*}}(0x03) +; CHECK-NOT: NULL +; CHECK: [[NS2:0x[0-9a-f]*]]:{{ *}}DW_TAG_namespace +; CHECK-NEXT: DW_AT_name{{.*}} = "B" +; CHECK-NEXT: DW_AT_decl_file{{.*}}(0x0[[F2:[0-9]]]) +; CHECK-NEXT: DW_AT_decl_line{{.*}}(0x01) +; CHECK-NOT: NULL +; CHECK: DW_TAG_variable +; CHECK-NEXT: DW_AT_name{{.*}}= "i" +; CHECK: DW_TAG_subprogram +; CHECK-NEXT: DW_AT_MIPS_linkage_name +; CHECK-NEXT: DW_AT_name{{.*}}= "func" +; CHECK-NOT: NULL +; CHECK: DW_TAG_imported_module +; CHECK-NEXT: DW_AT_decl_file{{.*}}(0x0[[F2]]) +; CHECK-NEXT: DW_AT_decl_line{{.*}}(0x07) +; CHECK-NEXT: DW_AT_import{{.*}}=> {[[NS2]]}) +; CHECK: file_names[ [[F1]]]{{.*}}debug-info-namespace.cpp +; CHECK: file_names[ [[F2]]]{{.*}}foo.cpp + +; IR generated from clang/test/CodeGenCXX/debug-info-namespace.cpp, file paths +; changed to protect the guilty. The C++ source code is simply: +; namespace A { +; #line 1 "foo.cpp" +; namespace B { +; int i; +; } +; } +; +; int func() { +; using namespace A::B; +; return i; +; } + +@_ZN1A1B1iE = global i32 0, align 4 + +; Function Attrs: nounwind uwtable +define i32 @_Z4funcv() #0 { +entry: + %0 = load i32* @_ZN1A1B1iE, align 4, !dbg !16 + ret i32 %0, !dbg !16 +} + +attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } + +!llvm.dbg.cu = !{!0} + +!0 = metadata !{i32 786449, metadata !1, i32 4, metadata !"clang version 3.3 ", i1 false, metadata !"", i32 0, metadata !2, metadata !2, metadata !3, metadata !10, metadata !14, metadata !""} ; [ DW_TAG_compile_unit ] [/usr/local/google/home/blaikie/dev/llvm/src/tools/clang//usr/local/google/home/blaikie/dev/llvm/src/tools/clang/test/CodeGenCXX/debug-info-namespace.cpp] [DW_LANG_C_plus_plus] +!1 = metadata !{metadata !"/usr/local/google/home/blaikie/dev/llvm/src/tools/clang/test/CodeGenCXX/debug-info-namespace.cpp", metadata !"/usr/local/google/home/blaikie/dev/llvm/src/tools/clang"} +!2 = metadata !{i32 0} +!3 = metadata !{metadata !4} +!4 = metadata !{i32 786478, metadata !5, metadata !6, metadata !"func", metadata !"func", metadata !"_Z4funcv", i32 6, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 ()* @_Z4funcv, null, null, metadata !2, i32 6} ; [ DW_TAG_subprogram ] [line 6] [def] [func] +!5 = metadata !{metadata !"foo.cpp", metadata !"/usr/local/google/home/blaikie/dev/llvm/src/tools/clang"} +!6 = metadata !{i32 786473, metadata !5} ; [ DW_TAG_file_type ] [/usr/local/google/home/blaikie/dev/llvm/src/tools/clang/foo.cpp] +!7 = metadata !{i32 786453, i32 0, i32 0, metadata !"", i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!8 = metadata !{metadata !9} +!9 = metadata !{i32 786468, null, null, metadata !"int", i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] [int] [line 0, size 32, align 32, offset 0, enc DW_ATE_signed] +!10 = metadata !{metadata !11} +!11 = metadata !{i32 786484, i32 0, metadata !12, metadata !"i", metadata !"i", metadata !"_ZN1A1B1iE", metadata !6, i32 2, metadata !9, i32 0, i32 1, i32* @_ZN1A1B1iE, null} ; [ DW_TAG_variable ] [i] [line 2] [def] +!12 = metadata !{i32 786489, metadata !5, metadata !13, metadata !"B", i32 1} ; [ DW_TAG_namespace ] [B] [line 1] +!13 = metadata !{i32 786489, metadata !1, null, metadata !"A", i32 3} ; [ DW_TAG_namespace ] [A] [line 3] +!14 = metadata !{metadata !15} +!15 = metadata !{i32 786490, metadata !4, metadata !12, i32 7} ; [ DW_TAG_imported_module ] +!16 = metadata !{i32 8, i32 0, metadata !4, null} diff --git a/test/DebugInfo/two-cus-from-same-file.ll b/test/DebugInfo/two-cus-from-same-file.ll index c751713..22cf4eb 100644 --- a/test/DebugInfo/two-cus-from-same-file.ll +++ b/test/DebugInfo/two-cus-from-same-file.ll @@ -3,6 +3,8 @@ ; blow llc up and produces something reasonable. ; +; REQUIRES: object-emission + ; RUN: llc %s -o %t -filetype=obj -O0 ; RUN: llvm-dwarfdump -debug-dump=info %t | FileCheck %s @@ -32,16 +34,16 @@ declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!0, !9} -!0 = metadata !{i32 786449, i32 0, i32 12, metadata !6, metadata !"clang version 3.2 (trunk 156513)", i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] +!0 = metadata !{i32 786449, metadata !32, i32 12, metadata !"clang version 3.2 (trunk 156513)", i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] !1 = metadata !{i32 0} !3 = metadata !{metadata !5} -!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"foo", metadata !"foo", metadata !"", metadata !6, i32 5, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, void ()* @foo, null, null, metadata !1, i32 5} ; [ DW_TAG_subprogram ] +!5 = metadata !{i32 786478, metadata !6, metadata !"foo", metadata !"foo", metadata !"", metadata !6, i32 5, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, void ()* @foo, null, null, metadata !1, i32 5} ; [ DW_TAG_subprogram ] !6 = metadata !{i32 786473, metadata !32} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !8 = metadata !{null} -!9 = metadata !{i32 786449, i32 0, i32 12, metadata !6, metadata !"clang version 3.2 (trunk 156513)", i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !10, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] +!9 = metadata !{i32 786449, metadata !32, i32 12, metadata !"clang version 3.2 (trunk 156513)", i1 true, metadata !"", i32 0, metadata !1, metadata !1, metadata !10, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] !10 = metadata !{metadata !12} -!12 = metadata !{i32 786478, i32 0, metadata !6, metadata !"main", metadata !"main", metadata !"", metadata !6, i32 11, metadata !13, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i32 (i32, i8**)* @main, null, null, metadata !19, i32 11} ; [ DW_TAG_subprogram ] +!12 = metadata !{i32 786478, metadata !6, metadata !"main", metadata !"main", metadata !"", metadata !6, i32 11, metadata !13, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 true, i32 (i32, i8**)* @main, null, null, metadata !19, i32 11} ; [ DW_TAG_subprogram ] !13 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !14, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !14 = metadata !{metadata !15, metadata !15, metadata !16} !15 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] diff --git a/test/ExecutionEngine/2008-06-05-APInt-OverAShr.ll b/test/ExecutionEngine/2008-06-05-APInt-OverAShr.ll index 0ab0274..349db69 100644 --- a/test/ExecutionEngine/2008-06-05-APInt-OverAShr.ll +++ b/test/ExecutionEngine/2008-06-05-APInt-OverAShr.ll @@ -1,4 +1,5 @@ -; RUN: %lli -force-interpreter=true %s | grep 1 +; RUN: %lli -force-interpreter=true %s | FileCheck %s +; CHECK: 1 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" target triple = "i686-pc-linux-gnu" diff --git a/test/ExecutionEngine/MCJIT/2008-06-05-APInt-OverAShr.ll b/test/ExecutionEngine/MCJIT/2008-06-05-APInt-OverAShr.ll index 0912897..9897602 100644 --- a/test/ExecutionEngine/MCJIT/2008-06-05-APInt-OverAShr.ll +++ b/test/ExecutionEngine/MCJIT/2008-06-05-APInt-OverAShr.ll @@ -1,4 +1,5 @@ -; RUN: %lli_mcjit -force-interpreter=true %s | grep 1 +; RUN: %lli_mcjit -force-interpreter=true %s | FileCheck %s +; CHECK: 1 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" target triple = "i686-pc-linux-gnu" diff --git a/test/ExecutionEngine/MCJIT/2013-04-04-RelocAddend.ll b/test/ExecutionEngine/MCJIT/2013-04-04-RelocAddend.ll new file mode 100644 index 0000000..3f402c5 --- /dev/null +++ b/test/ExecutionEngine/MCJIT/2013-04-04-RelocAddend.ll @@ -0,0 +1,25 @@ +; RUN: %lli_mcjit %s +; +; Verify relocations to global symbols with addend work correctly. +; +; Compiled from this C code: +; +; int test[2] = { -1, 0 }; +; int *p = &test[1]; +; +; int main (void) +; { +; return *p; +; } +; + +@test = global [2 x i32] [i32 -1, i32 0], align 4 +@p = global i32* getelementptr inbounds ([2 x i32]* @test, i64 0, i64 1), align 8 + +define i32 @main() { +entry: + %0 = load i32** @p, align 8 + %1 = load i32* %0, align 4 + ret i32 %1 +} + diff --git a/test/ExecutionEngine/MCJIT/fpbitcast.ll b/test/ExecutionEngine/MCJIT/fpbitcast.ll index fb5ab6f..ea39617 100644 --- a/test/ExecutionEngine/MCJIT/fpbitcast.ll +++ b/test/ExecutionEngine/MCJIT/fpbitcast.ll @@ -1,5 +1,6 @@ -; RUN: %lli_mcjit -force-interpreter=true %s | grep 40091eb8 -; +; RUN: %lli_mcjit -force-interpreter=true %s | FileCheck %s +; CHECK: 40091eb8 + define i32 @test(double %x) { entry: %x46.i = bitcast double %x to i64 diff --git a/test/ExecutionEngine/MCJIT/lit.local.cfg b/test/ExecutionEngine/MCJIT/lit.local.cfg index fc29f65..3630286 100644 --- a/test/ExecutionEngine/MCJIT/lit.local.cfg +++ b/test/ExecutionEngine/MCJIT/lit.local.cfg @@ -14,10 +14,10 @@ if ('X86' in targets) | ('ARM' in targets) | ('Mips' in targets) | \ else: config.unsupported = True -if root.host_arch not in ['x86', 'x86_64', 'ARM', 'Mips', 'PowerPC']: +if root.host_arch not in ['i386', 'x86', 'x86_64', 'ARM', 'Mips', 'PowerPC']: config.unsupported = True -if root.host_os in ['Darwin']: +if 'i386-apple-darwin' in root.target_triple: config.unsupported = True if 'powerpc' in root.target_triple and not 'powerpc64' in root.target_triple: diff --git a/test/ExecutionEngine/MCJIT/non-extern-addend.ll b/test/ExecutionEngine/MCJIT/non-extern-addend.ll new file mode 100644 index 0000000..3a6e634 --- /dev/null +++ b/test/ExecutionEngine/MCJIT/non-extern-addend.ll @@ -0,0 +1,12 @@ +; RUN: %lli_mcjit %s > /dev/null + +define i32 @foo(i32 %X, i32 %Y, double %A) { + %cond212 = fcmp ueq double %A, 2.000000e+00 ; <i1> [#uses=1] + %cast110 = zext i1 %cond212 to i32 ; <i32> [#uses=1] + ret i32 %cast110 +} + +define i32 @main() { + %reg212 = call i32 @foo( i32 0, i32 1, double 1.000000e+00 ) ; <i32> [#uses=1] + ret i32 %reg212 +} diff --git a/test/ExecutionEngine/MCJIT/test-global-ctors.ll b/test/ExecutionEngine/MCJIT/test-global-ctors.ll index 4510d9b..947d8f5 100644 --- a/test/ExecutionEngine/MCJIT/test-global-ctors.ll +++ b/test/ExecutionEngine/MCJIT/test-global-ctors.ll @@ -1,4 +1,5 @@ ; RUN: %lli_mcjit %s > /dev/null +; XFAIL: darwin @var = global i32 1, align 4 @llvm.global_ctors = appending global [1 x { i32, void ()* }] [{ i32, void ()* } { i32 65535, void ()* @ctor_func }] @llvm.global_dtors = appending global [1 x { i32, void ()* }] [{ i32, void ()* } { i32 65535, void ()* @dtor_func }] diff --git a/test/ExecutionEngine/fpbitcast.ll b/test/ExecutionEngine/fpbitcast.ll index fa84be4..e6d06f8 100644 --- a/test/ExecutionEngine/fpbitcast.ll +++ b/test/ExecutionEngine/fpbitcast.ll @@ -1,5 +1,6 @@ -; RUN: %lli -force-interpreter=true %s | grep 40091eb8 -; +; RUN: %lli -force-interpreter=true %s | FileCheck %s +; CHECK: 40091eb8 + define i32 @test(double %x) { entry: %x46.i = bitcast double %x to i64 diff --git a/test/ExecutionEngine/lit.local.cfg b/test/ExecutionEngine/lit.local.cfg index dd6a5bb..1f8ae69 100644 --- a/test/ExecutionEngine/lit.local.cfg +++ b/test/ExecutionEngine/lit.local.cfg @@ -10,3 +10,5 @@ root = getRoot(config) if root.host_arch in ['PowerPC', 'AArch64']: config.unsupported = True +if 'hexagon' in root.target_triple: + config.unsupported = True diff --git a/test/ExecutionEngine/test-interp-vec-arithm_float.ll b/test/ExecutionEngine/test-interp-vec-arithm_float.ll new file mode 100644 index 0000000..d7f4ac9 --- /dev/null +++ b/test/ExecutionEngine/test-interp-vec-arithm_float.ll @@ -0,0 +1,20 @@ +; RUN: %lli %s > /dev/null + + +define i32 @main() { + + %A_float = fadd <4 x float> <float 0.0, float 11.0, float 22.0, float 33.0>, <float 44.0, float 55.0, float 66.0, float 77.0> + %B_float = fsub <4 x float> %A_float, <float 88.0, float 99.0, float 100.0, float 111.0> + %C_float = fmul <4 x float> %B_float, %B_float + %D_float = fdiv <4 x float> %C_float, %B_float + %E_float = frem <4 x float> %D_float, %A_float + + + %A_double = fadd <3 x double> <double 0.0, double 111.0, double 222.0>, <double 444.0, double 555.0, double 665.0> + %B_double = fsub <3 x double> %A_double, <double 888.0, double 999.0, double 1001.0> + %C_double = fmul <3 x double> %B_double, %B_double + %D_double = fdiv <3 x double> %C_double, %B_double + %E_double = frem <3 x double> %D_double, %A_double + + ret i32 0 +} diff --git a/test/ExecutionEngine/test-interp-vec-arithm_int.ll b/test/ExecutionEngine/test-interp-vec-arithm_int.ll new file mode 100644 index 0000000..0ee14fe --- /dev/null +++ b/test/ExecutionEngine/test-interp-vec-arithm_int.ll @@ -0,0 +1,37 @@ +; RUN: %lli %s > /dev/null + +define i32 @main() { + %A_i8 = add <5 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4>, <i8 12, i8 34, i8 56, i8 78, i8 89> + %B_i8 = sub <5 x i8> %A_i8, <i8 11, i8 22, i8 33, i8 44, i8 55> + %C_i8 = mul <5 x i8> %B_i8, %B_i8 + %D_i8 = sdiv <5 x i8> %C_i8, %C_i8 + %E_i8 = srem <5 x i8> %D_i8, %D_i8 + %F_i8 = udiv <5 x i8> <i8 5, i8 6, i8 7, i8 8, i8 9>, <i8 6, i8 5, i8 4, i8 3, i8 2> + %G_i8 = urem <5 x i8> <i8 6, i8 7, i8 8, i8 9, i8 10>, <i8 5, i8 4, i8 2, i8 2, i8 1> + + %A_i16 = add <4 x i16> <i16 0, i16 1, i16 2, i16 3>, <i16 123, i16 345, i16 567, i16 789> + %B_i16 = sub <4 x i16> %A_i16, <i16 111, i16 222, i16 333, i16 444> + %C_i16 = mul <4 x i16> %B_i16, %B_i16 + %D_i16 = sdiv <4 x i16> %C_i16, %C_i16 + %E_i16 = srem <4 x i16> %D_i16, %D_i16 + %F_i16 = udiv <4 x i16> <i16 5, i16 6, i16 7, i16 8>, <i16 6, i16 5, i16 4, i16 3> + %G_i16 = urem <4 x i16> <i16 6, i16 7, i16 8, i16 9>, <i16 5, i16 4, i16 3, i16 2> + + %A_i32 = add <3 x i32> <i32 0, i32 1, i32 2>, <i32 1234, i32 3456, i32 5678> + %B_i32 = sub <3 x i32> %A_i32, <i32 1111, i32 2222, i32 3333> + %C_i32 = mul <3 x i32> %B_i32, %B_i32 + %D_i32 = sdiv <3 x i32> %C_i32, %C_i32 + %E_i32 = srem <3 x i32> %D_i32, %D_i32 + %F_i32 = udiv <3 x i32> <i32 5, i32 6, i32 7>, <i32 6, i32 5, i32 4> + %G_i32 = urem <3 x i32> <i32 6, i32 7, i32 8>, <i32 5, i32 4, i32 3> + + %A_i64 = add <2 x i64> <i64 0, i64 1>, <i64 12455, i64 34567> + %B_i64 = sub <2 x i64> %A_i64, <i64 11111, i64 22222> + %C_i64 = mul <2 x i64> %B_i64, %B_i64 + %D_i64 = sdiv <2 x i64> %C_i64, %C_i64 + %E_i64 = srem <2 x i64> %D_i64, %D_i64 + %F_i64 = udiv <2 x i64> <i64 5, i64 6>, <i64 6, i64 5> + %G_i64 = urem <2 x i64> <i64 6, i64 7>, <i64 5, i64 3> + + ret i32 0 +} diff --git a/test/ExecutionEngine/test-interp-vec-loadstore.ll b/test/ExecutionEngine/test-interp-vec-loadstore.ll new file mode 100644 index 0000000..e500711 --- /dev/null +++ b/test/ExecutionEngine/test-interp-vec-loadstore.ll @@ -0,0 +1,85 @@ +; RUN: %lli -force-interpreter=true %s | FileCheck %s +; XFAIL: mips +; CHECK: 1 +; CHECK: 2 +; CHECK: 3 +; CHECK: 4 +; CHECK: 5.{{[0]+}}e+{{[0]+}} +; CHECK: 6.{{[0]+}}e+{{[0]+}} +; CHECK: 7.{{[0]+}}e+{{[0]+}} +; CHECK: 8.{{[0]+}}e+{{[0]+}} +; CHECK: 9.{{[0]+}}e+{{[0]+}} +; CHECK: 1.{{[0]+}}e+{{[0]+}}1 +; CHECK: 1.1{{[0]+}}e+{{[0]+}}1 +; CHECK: 1.2{{[0]+}}e+{{[0]+}}1 + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" + +@format_i32 = internal global [4 x i8] c"%d\0A\00" +@format_float = internal global [4 x i8] c"%e\0A\00" + +declare i32 @printf(i8*, ...) + +define i32 @main() { + %a = alloca <4 x i32>, align 16 + %b = alloca <4 x double>, align 16 + %c = alloca <4 x float>, align 16 + + store <4 x i32> <i32 1, i32 2, i32 3, i32 4>, <4 x i32>* %a, align 16 + + %val0 = load <4 x i32> *%a, align 16 + + %res_i32_0 = extractelement <4 x i32> %val0, i32 0 + %res_i32_1 = extractelement <4 x i32> %val0, i32 1 + %res_i32_2 = extractelement <4 x i32> %val0, i32 2 + %res_i32_3 = extractelement <4 x i32> %val0, i32 3 + + %ptr0 = getelementptr [4 x i8]* @format_i32, i32 0, i32 0 + call i32 (i8*,...)* @printf(i8* %ptr0, i32 %res_i32_0) + call i32 (i8*,...)* @printf(i8* %ptr0, i32 %res_i32_1) + call i32 (i8*,...)* @printf(i8* %ptr0, i32 %res_i32_2) + call i32 (i8*,...)* @printf(i8* %ptr0, i32 %res_i32_3) + + store <4 x double> <double 5.0, double 6.0, double 7.0, double 8.0>, <4 x double>* %b, align 16 + + %val1 = load <4 x double> *%b, align 16 + + %res_double_0 = extractelement <4 x double> %val1, i32 0 + %res_double_1 = extractelement <4 x double> %val1, i32 1 + %res_double_2 = extractelement <4 x double> %val1, i32 2 + %res_double_3 = extractelement <4 x double> %val1, i32 3 + + %ptr1 = getelementptr [4 x i8]* @format_float, i32 0, i32 0 + call i32 (i8*,...)* @printf(i8* %ptr1, double %res_double_0) + call i32 (i8*,...)* @printf(i8* %ptr1, double %res_double_1) + call i32 (i8*,...)* @printf(i8* %ptr1, double %res_double_2) + call i32 (i8*,...)* @printf(i8* %ptr1, double %res_double_3) + + + store <4 x float> <float 9.0, float 10.0, float 11.0, float 12.0>, <4 x float>* %c, align 16 + + %val2 = load <4 x float> *%c, align 16 + + %ptr2 = getelementptr [4 x i8]* @format_float, i32 0, i32 0 + + ; by some reason printf doesn't print float correctly, so + ; floats are casted to doubles and are printed as doubles + + %res_serv_0 = extractelement <4 x float> %val2, i32 0 + %res_float_0 = fpext float %res_serv_0 to double + %res_serv_1 = extractelement <4 x float> %val2, i32 1 + %res_float_1 = fpext float %res_serv_1 to double + %res_serv_2 = extractelement <4 x float> %val2, i32 2 + %res_float_2 = fpext float %res_serv_2 to double + %res_serv_3 = extractelement <4 x float> %val2, i32 3 + %res_float_3 = fpext float %res_serv_3 to double + + + call i32 (i8*,...)* @printf(i8* %ptr1, double %res_float_0) + call i32 (i8*,...)* @printf(i8* %ptr1, double %res_float_1) + call i32 (i8*,...)* @printf(i8* %ptr1, double %res_float_2) + call i32 (i8*,...)* @printf(i8* %ptr1, double %res_float_3) + + + ret i32 0 +} diff --git a/test/ExecutionEngine/test-interp-vec-logical.ll b/test/ExecutionEngine/test-interp-vec-logical.ll new file mode 100644 index 0000000..f8f1f0d --- /dev/null +++ b/test/ExecutionEngine/test-interp-vec-logical.ll @@ -0,0 +1,22 @@ +; RUN: %lli %s > /dev/null + +define i32 @main() { + %A_i8 = and <5 x i8> <i8 4, i8 4, i8 4, i8 4, i8 4>, <i8 8, i8 8, i8 8, i8 8, i8 8> + %B_i8 = or <5 x i8> %A_i8, <i8 7, i8 7, i8 7, i8 7, i8 7> + %C_i8 = xor <5 x i8> %B_i8, %A_i8 + + %A_i16 = and <4 x i16> <i16 4, i16 4, i16 4, i16 4>, <i16 8, i16 8, i16 8, i16 8> + %B_i16 = or <4 x i16> %A_i16, <i16 7, i16 7, i16 7, i16 7> + %C_i16 = xor <4 x i16> %B_i16, %A_i16 + + %A_i32 = and <3 x i32> <i32 4, i32 4, i32 4>, <i32 8, i32 8, i32 8> + %B_i32 = or <3 x i32> %A_i32, <i32 7, i32 7, i32 7> + %C_i32 = xor <3 x i32> %B_i32, %A_i32 + + %A_i64 = and <2 x i64> <i64 4, i64 4>, <i64 8, i64 8> + %B_i64 = or <2 x i64> %A_i64, <i64 7, i64 7> + %C_i64 = xor <2 x i64> %B_i64, %A_i64 + + ret i32 0 +} + diff --git a/test/ExecutionEngine/test-interp-vec-setcond-fp.ll b/test/ExecutionEngine/test-interp-vec-setcond-fp.ll new file mode 100644 index 0000000..8b9b7c7 --- /dev/null +++ b/test/ExecutionEngine/test-interp-vec-setcond-fp.ll @@ -0,0 +1,25 @@ +; RUN: %lli %s > /dev/null + +define i32 @main() { + %double1 = fadd <2 x double> <double 0.0, double 0.0>, <double 0.0, double 0.0> + %double2 = fadd <2 x double> <double 0.0, double 0.0>, <double 0.0, double 0.0> + %float1 = fadd <3 x float> <float 0.0, float 0.0, float 0.0>, <float 0.0, float 0.0, float 0.0> + %float2 = fadd <3 x float> <float 0.0, float 0.0, float 0.0>, <float 0.0, float 0.0, float 0.0> + %test49 = fcmp oeq <3 x float> %float1, %float2 + %test50 = fcmp oge <3 x float> %float1, %float2 + %test51 = fcmp ogt <3 x float> %float1, %float2 + %test52 = fcmp ole <3 x float> %float1, %float2 + %test53 = fcmp olt <3 x float> %float1, %float2 + %test54 = fcmp une <3 x float> %float1, %float2 + + %test55 = fcmp oeq <2 x double> %double1, %double2 + %test56 = fcmp oge <2 x double> %double1, %double2 + %test57 = fcmp ogt <2 x double> %double1, %double2 + %test58 = fcmp ole <2 x double> %double1, %double2 + %test59 = fcmp olt <2 x double> %double1, %double2 + %test60 = fcmp une <2 x double> %double1, %double2 + + ret i32 0 +} + + diff --git a/test/ExecutionEngine/test-interp-vec-setcond-int.ll b/test/ExecutionEngine/test-interp-vec-setcond-int.ll new file mode 100644 index 0000000..4c89109 --- /dev/null +++ b/test/ExecutionEngine/test-interp-vec-setcond-int.ll @@ -0,0 +1,69 @@ +; RUN: %lli %s > /dev/null + +define i32 @main() { + %int1 = add <3 x i32> <i32 0, i32 0, i32 0>, <i32 0, i32 0, i32 0> + %int2 = add <3 x i32> <i32 0, i32 0, i32 0>, <i32 0, i32 0, i32 0> + %long1 = add <2 x i64> <i64 0, i64 0>, <i64 0, i64 0> + %long2 = add <2 x i64> <i64 0, i64 0>, <i64 0, i64 0> + %sbyte1 = add <5 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0>, <i8 0, i8 0, i8 0, i8 0, i8 0> + %sbyte2 = add <5 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0>, <i8 0, i8 0, i8 0, i8 0, i8 0> + %short1 = add <4 x i16> <i16 0, i16 0, i16 0, i16 0>, <i16 0, i16 0, i16 0, i16 0> + %short2 = add <4 x i16> <i16 0, i16 0, i16 0, i16 0>, <i16 0, i16 0, i16 0, i16 0> + %ubyte1 = add <5 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0>, <i8 0, i8 0, i8 0, i8 0, i8 0> + %ubyte2 = add <5 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0>, <i8 0, i8 0, i8 0, i8 0, i8 0> + %uint1 = add <3 x i32> <i32 0, i32 0, i32 0>, <i32 0, i32 0, i32 0> + %uint2 = add <3 x i32> <i32 0, i32 0, i32 0>, <i32 0, i32 0, i32 0> + %ulong1 = add <2 x i64> <i64 0, i64 0>, <i64 0, i64 0> + %ulong2 = add <2 x i64> <i64 0, i64 0>, <i64 0, i64 0> + %ushort1 = add <4 x i16> <i16 0, i16 0, i16 0, i16 0>, <i16 0, i16 0, i16 0, i16 0> + %ushort2 = add <4 x i16> <i16 0, i16 0, i16 0, i16 0>, <i16 0, i16 0, i16 0, i16 0> + %test1 = icmp eq <5 x i8> %ubyte1, %ubyte2 + %test2 = icmp uge <5 x i8> %ubyte1, %ubyte2 + %test3 = icmp ugt <5 x i8> %ubyte1, %ubyte2 + %test4 = icmp ule <5 x i8> %ubyte1, %ubyte2 + %test5 = icmp ult <5 x i8> %ubyte1, %ubyte2 + %test6 = icmp ne <5 x i8> %ubyte1, %ubyte2 + %test7 = icmp eq <4 x i16> %ushort1, %ushort2 + %test8 = icmp uge <4 x i16> %ushort1, %ushort2 + %test9 = icmp ugt <4 x i16> %ushort1, %ushort2 + %test10 = icmp ule <4 x i16> %ushort1, %ushort2 + %test11 = icmp ult <4 x i16> %ushort1, %ushort2 + %test12 = icmp ne <4 x i16> %ushort1, %ushort2 + %test13 = icmp eq <3 x i32> %uint1, %uint2 + %test14 = icmp uge <3 x i32> %uint1, %uint2 + %test15 = icmp ugt <3 x i32> %uint1, %uint2 + %test16 = icmp ule <3 x i32> %uint1, %uint2 + %test17 = icmp ult <3 x i32> %uint1, %uint2 + %test18 = icmp ne <3 x i32> %uint1, %uint2 + %test19 = icmp eq <2 x i64> %ulong1, %ulong2 + %test20 = icmp uge <2 x i64> %ulong1, %ulong2 + %test21 = icmp ugt <2 x i64> %ulong1, %ulong2 + %test22 = icmp ule <2 x i64> %ulong1, %ulong2 + %test23 = icmp ult <2 x i64> %ulong1, %ulong2 + %test24 = icmp ne <2 x i64> %ulong1, %ulong2 + %test25 = icmp eq <5 x i8> %sbyte1, %sbyte2 + %test26 = icmp sge <5 x i8> %sbyte1, %sbyte2 + %test27 = icmp sgt <5 x i8> %sbyte1, %sbyte2 + %test28 = icmp sle <5 x i8> %sbyte1, %sbyte2 + %test29 = icmp slt <5 x i8> %sbyte1, %sbyte2 + %test30 = icmp ne <5 x i8> %sbyte1, %sbyte2 + %test31 = icmp eq <4 x i16> %short1, %short2 + %test32 = icmp sge <4 x i16> %short1, %short2 + %test33 = icmp sgt <4 x i16> %short1, %short2 + %test34 = icmp sle <4 x i16> %short1, %short2 + %test35 = icmp slt <4 x i16> %short1, %short2 + %test36 = icmp ne <4 x i16> %short1, %short2 + %test37 = icmp eq <3 x i32> %int1, %int2 + %test38 = icmp sge <3 x i32> %int1, %int2 + %test39 = icmp sgt <3 x i32> %int1, %int2 + %test40 = icmp sle <3 x i32> %int1, %int2 + %test41 = icmp slt <3 x i32> %int1, %int2 + %test42 = icmp ne <3 x i32> %int1, %int2 + %test43 = icmp eq <2 x i64> %long1, %long2 + %test44 = icmp sge <2 x i64> %long1, %long2 + %test45 = icmp sgt <2 x i64> %long1, %long2 + %test46 = icmp sle <2 x i64> %long1, %long2 + %test47 = icmp slt <2 x i64> %long1, %long2 + %test48 = icmp ne <2 x i64> %long1, %long2 + ret i32 0 +} diff --git a/test/Feature/aliases.ll b/test/Feature/aliases.ll index d44dff4..1393812 100644 --- a/test/Feature/aliases.ll +++ b/test/Feature/aliases.ll @@ -2,6 +2,8 @@ ; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll ; RUN: diff %t1.ll %t2.ll +@llvm.used = appending global [1 x i8*] [i8* bitcast (i32* @foo1 to i8*)], section "llvm.metadata" + @bar = external global i32 @foo1 = alias i32* @bar @foo2 = alias i32* @bar diff --git a/test/FileCheck/check-not-diaginfo.txt b/test/FileCheck/check-not-diaginfo.txt new file mode 100644 index 0000000..a4c3ca8 --- /dev/null +++ b/test/FileCheck/check-not-diaginfo.txt @@ -0,0 +1,7 @@ +; RUN: FileCheck -input-file %s %s 2>&1 | FileCheck -check-prefix DIAG %s + +CHECK-NOT: test + +DIAG: CHECK-NOT: pattern specified here +DIAG-NEXT: CHECK-NOT: test +DIAG-NEXT: {{^ \^}} diff --git a/test/Instrumentation/AddressSanitizer/debug_info.ll b/test/Instrumentation/AddressSanitizer/debug_info.ll index fa4213e..ec51cae 100644 --- a/test/Instrumentation/AddressSanitizer/debug_info.ll +++ b/test/Instrumentation/AddressSanitizer/debug_info.ll @@ -37,7 +37,7 @@ declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone !2 = metadata !{i32 0} !3 = metadata !{metadata !4} !4 = metadata !{metadata !5} -!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"zzz", metadata !"zzz", metadata !"_Z3zzzi", metadata !6, i32 1, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (i32)* @_Z3zzzi, null, null, metadata !1, i32 1} ; [ DW_TAG_subprogram ] [line 1] [def] [zzz] +!5 = metadata !{i32 786478, metadata !6, metadata !"zzz", metadata !"zzz", metadata !"_Z3zzzi", metadata !6, i32 1, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (i32)* @_Z3zzzi, null, null, metadata !1, i32 1} ; [ DW_TAG_subprogram ] [line 1] [def] [zzz] !6 = metadata !{i32 786473, metadata !16} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] !8 = metadata !{metadata !9, metadata !9} diff --git a/test/Instrumentation/MemorySanitizer/unreachable.ll b/test/Instrumentation/MemorySanitizer/unreachable.ll index 66a9575..c813071 100644 --- a/test/Instrumentation/MemorySanitizer/unreachable.ll +++ b/test/Instrumentation/MemorySanitizer/unreachable.ll @@ -21,3 +21,19 @@ exit: ; CHECK: @Func ; CHECK: store i32 0, {{.*}} @__msan_retval_tls ; CHECK: ret i32 42 + + +define i32 @UnreachableLoop() nounwind uwtable { +entry: + ret i32 0 + +zzz: + br label %xxx + +xxx: + br label %zzz +} + +; CHECK: @UnreachableLoop +; CHECK: store i32 0, {{.*}} @__msan_retval_tls +; CHECK: ret i32 0 diff --git a/test/Instrumentation/ThreadSanitizer/read_from_global.ll b/test/Instrumentation/ThreadSanitizer/read_from_global.ll index a08453a..7b6b94e 100644 --- a/test/Instrumentation/ThreadSanitizer/read_from_global.ll +++ b/test/Instrumentation/ThreadSanitizer/read_from_global.ll @@ -48,7 +48,7 @@ entry: } ; CHECK: define void @call_virtual_func -; CHECK: __tsan_read +; CHECK: __tsan_vptr_read ; CHECK: = load ; CHECK-NOT: __tsan_read ; CHECK: = load diff --git a/test/Instrumentation/ThreadSanitizer/tsan_basic.ll b/test/Instrumentation/ThreadSanitizer/tsan_basic.ll index 33c703b..19dd45b 100644 --- a/test/Instrumentation/ThreadSanitizer/tsan_basic.ll +++ b/test/Instrumentation/ThreadSanitizer/tsan_basic.ll @@ -20,3 +20,36 @@ entry: ; CHECK: ret i32 +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) +declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) + + +; Check that tsan converts mem intrinsics back to function calls. + +define void @MemCpyTest(i8* nocapture %x, i8* nocapture %y) { +entry: + tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %x, i8* %y, i64 16, i32 4, i1 false) + ret void +; CHECK: define void @MemCpyTest +; CHECK: call i8* @memcpy +; CHECK: ret void +} + +define void @MemMoveTest(i8* nocapture %x, i8* nocapture %y) { +entry: + tail call void @llvm.memmove.p0i8.p0i8.i64(i8* %x, i8* %y, i64 16, i32 4, i1 false) + ret void +; CHECK: define void @MemMoveTest +; CHECK: call i8* @memmove +; CHECK: ret void +} + +define void @MemSetTest(i8* nocapture %x) { +entry: + tail call void @llvm.memset.p0i8.i64(i8* %x, i8 77, i64 16, i32 4, i1 false) + ret void +; CHECK: define void @MemSetTest +; CHECK: call i8* @memset +; CHECK: ret void +} diff --git a/test/Instrumentation/ThreadSanitizer/vptr_read.ll b/test/Instrumentation/ThreadSanitizer/vptr_read.ll new file mode 100644 index 0000000..404ca3f --- /dev/null +++ b/test/Instrumentation/ThreadSanitizer/vptr_read.ll @@ -0,0 +1,13 @@ +; RUN: opt < %s -tsan -S | FileCheck %s +; Check that vptr reads are treated in a special way. +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" + +define i8 @Foo(i8* %a) nounwind uwtable { +entry: +; CHECK: call void @__tsan_vptr_read + %0 = load i8* %a, align 8, !tbaa !0 + ret i8 %0 +} +!0 = metadata !{metadata !"vtable pointer", metadata !1} +!1 = metadata !{metadata !"Simple C/C++ TBAA", null} + diff --git a/test/Integer/2007-01-19-TruncSext.ll b/test/Integer/2007-01-19-TruncSext.ll index 3fee6bc..e6d89dd 100644 --- a/test/Integer/2007-01-19-TruncSext.ll +++ b/test/Integer/2007-01-19-TruncSext.ll @@ -1,7 +1,8 @@ ; RUN: llvm-as %s -o - | llvm-dis > %t1.ll ; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll ; RUN: diff %t1.ll %t2.ll -; RUN: llvm-as < %s | lli --force-interpreter=true | grep -- -255 +; RUN: llvm-as < %s | lli --force-interpreter=true | FileCheck %s +; CHECK: -255 @ARRAY = global [ 20 x i17 ] zeroinitializer @FORMAT = constant [ 4 x i8 ] c"%d\0A\00" diff --git a/test/Integer/fold-fpcast_bt.ll b/test/Integer/fold-fpcast_bt.ll index 8e5f838..0ce776d 100644 --- a/test/Integer/fold-fpcast_bt.ll +++ b/test/Integer/fold-fpcast_bt.ll @@ -1,4 +1,5 @@ -; RUN: llvm-as < %s | llvm-dis | not grep bitcast +; RUN: llvm-as < %s | llvm-dis | FileCheck %s +; CHECK-NOT: bitcast define i60 @test1() { ret i60 fptoui(float 0x400D9999A0000000 to i60) diff --git a/test/Integer/packed_struct_bt.ll b/test/Integer/packed_struct_bt.ll index 257c1c6..b8301ba 100644 --- a/test/Integer/packed_struct_bt.ll +++ b/test/Integer/packed_struct_bt.ll @@ -1,9 +1,9 @@ ; RUN: llvm-as < %s | llvm-dis > %t1.ll ; RUN: llvm-as %t1.ll -o - | llvm-dis > %t2.ll ; RUN: diff %t1.ll %t2.ll -; RUN: not grep cast %t2.ll -; RUN: grep "}>" %t2.ll -; END. +; RUN: FileCheck %s --input-file=%t2.ll +; CHECK-NOT: cast +; CHECK: }> %struct.anon = type <{ i8, i35, i35, i35 }> @foos = external global %struct.anon diff --git a/test/Linker/2003-01-30-LinkerRename.ll b/test/Linker/2003-01-30-LinkerRename.ll index e7431ec..cbf7541 100644 --- a/test/Linker/2003-01-30-LinkerRename.ll +++ b/test/Linker/2003-01-30-LinkerRename.ll @@ -3,7 +3,8 @@ ; RUN: echo "define internal i32 @foo() { ret i32 7 } " | llvm-as > %t.1.bc ; RUN: llvm-as %s -o %t.2.bc -; RUN: llvm-link %t.1.bc %t.2.bc -S | grep "@foo()" | grep -v internal +; RUN: llvm-link %t.1.bc %t.2.bc -S | FileCheck %s +; CHECK: internal{{.*}}@foo{{[0-9]}}() define i32 @foo() { ret i32 0 } diff --git a/test/Linker/2003-01-30-LinkerTypeRename.ll b/test/Linker/2003-01-30-LinkerTypeRename.ll index 94fb5e0..d61eb6d 100644 --- a/test/Linker/2003-01-30-LinkerTypeRename.ll +++ b/test/Linker/2003-01-30-LinkerTypeRename.ll @@ -3,8 +3,9 @@ ; RUN: echo "%%Ty = type opaque @GV = external global %%Ty*" | llvm-as > %t.1.bc ; RUN: llvm-as < %s > %t.2.bc -; RUN: llvm-link %t.1.bc %t.2.bc -S | grep "%%Ty " | not grep opaque +; RUN: llvm-link %t.1.bc %t.2.bc -S | FileCheck %s +; CHECK: = global %Ty %Ty = type {i32} -@GV = global %Ty* null
\ No newline at end of file +@GV = global %Ty* null diff --git a/test/Linker/2003-04-23-LinkOnceLost.ll b/test/Linker/2003-04-23-LinkOnceLost.ll index 98a943a..e452890 100644 --- a/test/Linker/2003-04-23-LinkOnceLost.ll +++ b/test/Linker/2003-04-23-LinkOnceLost.ll @@ -4,7 +4,8 @@ ; RUN: echo " define linkonce void @foo() { ret void } " | \ ; RUN: llvm-as -o %t.2.bc ; RUN: llvm-as %s -o %t.1.bc -; RUN: llvm-link %t.1.bc %t.2.bc -S | grep foo | grep linkonce +; RUN: llvm-link %t.1.bc %t.2.bc -S | FileCheck %s +; CHECK: linkonce{{.*}}foo declare void @foo() diff --git a/test/Linker/2003-05-31-LinkerRename.ll b/test/Linker/2003-05-31-LinkerRename.ll index dff861d..2e734be 100644 --- a/test/Linker/2003-05-31-LinkerRename.ll +++ b/test/Linker/2003-05-31-LinkerRename.ll @@ -6,7 +6,8 @@ ; RUN: echo " define internal i32 @foo() { ret i32 7 } " | llvm-as > %t.1.bc ; RUN: llvm-as < %s > %t.2.bc -; RUN: llvm-link %t.1.bc %t.2.bc -S | grep internal | not grep "@foo(" +; RUN: llvm-link %t.1.bc %t.2.bc -S | FileCheck %s +; CHECK: internal {{.*}} @foo{{[0-9]}}( declare i32 @foo() diff --git a/test/Linker/2003-08-23-GlobalVarLinking.ll b/test/Linker/2003-08-23-GlobalVarLinking.ll index e934836..122bc41 100644 --- a/test/Linker/2003-08-23-GlobalVarLinking.ll +++ b/test/Linker/2003-08-23-GlobalVarLinking.ll @@ -1,7 +1,8 @@ ; RUN: llvm-as < %s > %t.out1.bc ; RUN: echo "%%T1 = type opaque %%T2 = type opaque @S = external global { i32, %%T1* } declare void @F(%%T2*)"\ ; RUN: | llvm-as > %t.out2.bc -; RUN: llvm-link %t.out1.bc %t.out2.bc -S | not grep opaque +; RUN: llvm-link %t.out1.bc %t.out2.bc -S | FileCheck %s +; CHECK-NOT: opaque ; After linking this testcase, there should be no opaque types left. The two ; S's should cause the opaque type to be resolved to 'int'. diff --git a/test/Linker/2003-08-24-InheritPtrSize.ll b/test/Linker/2003-08-24-InheritPtrSize.ll index 51d544b..dbaf9bc 100644 --- a/test/Linker/2003-08-24-InheritPtrSize.ll +++ b/test/Linker/2003-08-24-InheritPtrSize.ll @@ -3,7 +3,8 @@ ; RUN: llvm-as < %s > %t.out1.bc ; RUN: echo "" | llvm-as > %t.out2.bc -; RUN: llvm-link %t.out1.bc %t.out2.bc 2>&1 | not grep warning +; RUN: llvm-link %t.out1.bc %t.out2.bc 2>&1 | FileCheck %s +; CHECK-NOT: warning target datalayout = "e-p:64:64" diff --git a/test/Linker/2004-12-03-DisagreeingType.ll b/test/Linker/2004-12-03-DisagreeingType.ll index 73d7a40..63e1529 100644 --- a/test/Linker/2004-12-03-DisagreeingType.ll +++ b/test/Linker/2004-12-03-DisagreeingType.ll @@ -1,7 +1,8 @@ ; RUN: echo "@G = weak global {{{{double}}}} zeroinitializer " | \ ; RUN: llvm-as > %t.out2.bc ; RUN: llvm-as < %s > %t.out1.bc -; RUN: llvm-link %t.out1.bc %t.out2.bc -S | not grep "}" +; RUN: llvm-link %t.out1.bc %t.out2.bc -S | FileCheck %s +; CHECK-NOT: } ; When linked, the global above should be eliminated, being merged with the ; global below. diff --git a/test/Linker/2005-02-12-ConstantGlobals-2.ll b/test/Linker/2005-02-12-ConstantGlobals-2.ll index 30bfafe..7d2e813 100644 --- a/test/Linker/2005-02-12-ConstantGlobals-2.ll +++ b/test/Linker/2005-02-12-ConstantGlobals-2.ll @@ -3,6 +3,7 @@ ; RUN: echo "@X = external constant i32" | llvm-as > %t.2.bc ; RUN: llvm-as < %s > %t.1.bc -; RUN: llvm-link %t.1.bc %t.2.bc -S | grep "global i32 7" +; RUN: llvm-link %t.1.bc %t.2.bc -S | FileCheck %s +; CHECK: global i32 7 @X = global i32 7 diff --git a/test/Linker/2005-02-12-ConstantGlobals.ll b/test/Linker/2005-02-12-ConstantGlobals.ll index 93709cf..db99060 100644 --- a/test/Linker/2005-02-12-ConstantGlobals.ll +++ b/test/Linker/2005-02-12-ConstantGlobals.ll @@ -3,6 +3,7 @@ ; RUN: echo "@X = global i32 7" | llvm-as > %t.2.bc ; RUN: llvm-as < %s > %t.1.bc -; RUN: llvm-link %t.1.bc %t.2.bc -S | grep "global i32 7" +; RUN: llvm-link %t.1.bc %t.2.bc -S | FileCheck %s +; CHECK: global i32 7 @X = external constant i32 ; <i32*> [#uses=0] diff --git a/test/Linker/2005-12-06-AppendingZeroLengthArrays.ll b/test/Linker/2005-12-06-AppendingZeroLengthArrays.ll index d7a34c8..b99b3a8 100644 --- a/test/Linker/2005-12-06-AppendingZeroLengthArrays.ll +++ b/test/Linker/2005-12-06-AppendingZeroLengthArrays.ll @@ -1,7 +1,8 @@ ; RUN: echo " @G = appending global [0 x i32] zeroinitializer " | \ ; RUN: llvm-as > %t.out2.bc ; RUN: llvm-as < %s > %t.out1.bc -; RUN: llvm-link %t.out1.bc %t.out2.bc -S | grep "@G =" +; RUN: llvm-link %t.out1.bc %t.out2.bc -S | FileCheck %s +; CHECK: @G = ; When linked, the globals should be merged, and the result should still ; be named '@G'. diff --git a/test/Linker/2006-06-15-GlobalVarAlignment.ll b/test/Linker/2006-06-15-GlobalVarAlignment.ll index eec8f63..c9f9b0e 100644 --- a/test/Linker/2006-06-15-GlobalVarAlignment.ll +++ b/test/Linker/2006-06-15-GlobalVarAlignment.ll @@ -2,6 +2,7 @@ ; RUN: echo "@X = global i32 7, align 8" | llvm-as > %t.2.bc ; RUN: llvm-as < %s > %t.1.bc -; RUN: llvm-link %t.1.bc %t.2.bc -S | grep "align 8" +; RUN: llvm-link %t.1.bc %t.2.bc -S | FileCheck %s +; CHECK: align 8 @X = weak global i32 7, align 4 diff --git a/test/Linker/2008-03-07-DroppedSection_a.ll b/test/Linker/2008-03-07-DroppedSection_a.ll index ec9d5c2..58baad9 100644 --- a/test/Linker/2008-03-07-DroppedSection_a.ll +++ b/test/Linker/2008-03-07-DroppedSection_a.ll @@ -1,7 +1,8 @@ ; RUN: llvm-as < %s > %t.bc ; RUN: llvm-as < %p/2008-03-07-DroppedSection_b.ll > %t2.bc ; RUN: llvm-link %t.bc %t2.bc -o %t3.bc -; RUN: llvm-dis < %t3.bc | grep ".data.init_task" +; RUN: llvm-dis < %t3.bc | FileCheck %s +; CHECK: .data.init_task ; ModuleID = 't.bc' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" diff --git a/test/Linker/2008-03-07-DroppedSection_b.ll b/test/Linker/2008-03-07-DroppedSection_b.ll index 63b64f6..9bcb80d 100644 --- a/test/Linker/2008-03-07-DroppedSection_b.ll +++ b/test/Linker/2008-03-07-DroppedSection_b.ll @@ -1,7 +1,8 @@ ; RUN: llvm-as < %s > %t.bc ; RUN: llvm-as < %p/2008-03-07-DroppedSection_a.ll > %t2.bc ; RUN: llvm-link %t.bc %t2.bc -o %t3.bc -; RUN: llvm-dis < %t3.bc | grep ".data.init_task" +; RUN: llvm-dis < %t3.bc | FileCheck %s +; CHECK: .data.init_task ; ModuleID = 'u.bc' target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" diff --git a/test/Linker/2008-06-26-AddressSpace.ll b/test/Linker/2008-06-26-AddressSpace.ll index e1d3574..d4310bc 100644 --- a/test/Linker/2008-06-26-AddressSpace.ll +++ b/test/Linker/2008-06-26-AddressSpace.ll @@ -2,8 +2,9 @@ ; in different modules. ; RUN: llvm-as %s -o %t.foo1.bc ; RUN: echo | llvm-as -o %t.foo2.bc -; RUN: llvm-link %t.foo2.bc %t.foo1.bc -S | grep "addrspace(2)" -; RUN: llvm-link %t.foo1.bc %t.foo2.bc -S | grep "addrspace(2)" +; RUN: llvm-link %t.foo2.bc %t.foo1.bc -S | FileCheck %s +; RUN: llvm-link %t.foo1.bc %t.foo2.bc -S | FileCheck %s +; CHECK: addrspace(2) ; rdar://6038021 @G = addrspace(2) global i32 256 diff --git a/test/Linker/2011-08-18-unique-class-type.ll b/test/Linker/2011-08-18-unique-class-type.ll index cae1245..328e83b 100644 --- a/test/Linker/2011-08-18-unique-class-type.ll +++ b/test/Linker/2011-08-18-unique-class-type.ll @@ -1,4 +1,6 @@ -; RUN: llvm-link %s %p/2011-08-18-unique-class-type2.ll -S -o - | grep DW_TAG_class_type | count 1 +; RUN: llvm-link %s %p/2011-08-18-unique-class-type2.ll -S -o - | FileCheck %s +; CHECK: DW_TAG_class_type +; CHECK-NOT: DW_TAG_class_type ; Test to check there is only one MDNode for class A after linking. target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" diff --git a/test/Linker/2011-08-18-unique-debug-type.ll b/test/Linker/2011-08-18-unique-debug-type.ll index 696fdb3..cc0df4d 100644 --- a/test/Linker/2011-08-18-unique-debug-type.ll +++ b/test/Linker/2011-08-18-unique-debug-type.ll @@ -1,6 +1,6 @@ - -; RUN: llvm-link %s %p/2011-08-18-unique-debug-type2.ll -S -o - | grep "int" | grep -v "^; ModuleID" | count 1 +; RUN: llvm-link %s %p/2011-08-18-unique-debug-type2.ll -S -o - | FileCheck %s ; Test to check only one MDNode for "int" after linking. +; CHECK: !"int" target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-apple-macosx10.7.0" diff --git a/test/Linker/AppendingLinkage.ll b/test/Linker/AppendingLinkage.ll index 014ead9..5beff5a 100644 --- a/test/Linker/AppendingLinkage.ll +++ b/test/Linker/AppendingLinkage.ll @@ -3,7 +3,8 @@ ; RUN: echo "@X = appending global [1 x i32] [i32 8] " | \ ; RUN: llvm-as > %t.2.bc ; RUN: llvm-as < %s > %t.1.bc -; RUN: llvm-link %t.1.bc %t.2.bc -S | grep 7 | grep 4 | grep 8 +; RUN: llvm-link %t.1.bc %t.2.bc -S | FileCheck %s +; CHECK: [i32 7, i32 4, i32 8] @X = appending global [2 x i32] [ i32 7, i32 4 ] ; <[2 x i32]*> [#uses=2] @Y = global i32* getelementptr ([2 x i32]* @X, i64 0, i64 0) ; <i32**> [#uses=0] diff --git a/test/Linker/AppendingLinkage2.ll b/test/Linker/AppendingLinkage2.ll index 7385efb..341ca16 100644 --- a/test/Linker/AppendingLinkage2.ll +++ b/test/Linker/AppendingLinkage2.ll @@ -3,6 +3,7 @@ ; RUN: echo "@X = appending global [1 x i32] [i32 8] " | \ ; RUN: llvm-as > %t.2.bc ; RUN: llvm-as < %s > %t.1.bc -; RUN: llvm-link %t.1.bc %t.2.bc -S | grep 7 | grep 8 +; RUN: llvm-link %t.1.bc %t.2.bc -S | FileCheck %s +; CHECK: [i32 7, i32 8] @X = appending global [1 x i32] [ i32 7 ] ; <[1 x i32]*> [#uses=0] diff --git a/test/Linker/ConstantGlobals1.ll b/test/Linker/ConstantGlobals1.ll index 716eb3d..a2bb6fb 100644 --- a/test/Linker/ConstantGlobals1.ll +++ b/test/Linker/ConstantGlobals1.ll @@ -3,7 +3,8 @@ ; RUN: echo "@X = constant [1 x i32] [i32 8] " | \ ; RUN: llvm-as > %t.2.bc ; RUN: llvm-as < %s > %t.1.bc -; RUN: llvm-link %t.1.bc %t.2.bc -S | grep constant +; RUN: llvm-link %t.1.bc %t.2.bc -S | FileCheck %s +; CHECK: constant @X = external global [1 x i32] ; <[1 x i32]*> [#uses=0] diff --git a/test/Linker/ConstantGlobals2.ll b/test/Linker/ConstantGlobals2.ll index ad0f8e2..4713779 100644 --- a/test/Linker/ConstantGlobals2.ll +++ b/test/Linker/ConstantGlobals2.ll @@ -3,7 +3,8 @@ ; RUN: echo "@X = external global [1 x i32] " | \ ; RUN: llvm-as > %t.2.bc ; RUN: llvm-as < %s > %t.1.bc -; RUN: llvm-link %t.1.bc %t.2.bc -S | grep constant +; RUN: llvm-link %t.1.bc %t.2.bc -S | FileCheck %s +; CHECK: constant @X = constant [1 x i32] [ i32 12 ] ; <[1 x i32]*> [#uses=0] diff --git a/test/Linker/ConstantGlobals3.ll b/test/Linker/ConstantGlobals3.ll index 5aa26bc..6b4ed24 100644 --- a/test/Linker/ConstantGlobals3.ll +++ b/test/Linker/ConstantGlobals3.ll @@ -3,6 +3,7 @@ ; RUN: echo "@X = external constant [1 x i32] " | \ ; RUN: llvm-as > %t.2.bc ; RUN: llvm-as < %s > %t.1.bc -; RUN: llvm-link %t.1.bc %t.2.bc -S | grep constant +; RUN: llvm-link %t.1.bc %t.2.bc -S | FileCheck %s +; CHECK: constant @X = external global [1 x i32] ; <[1 x i32]*> [#uses=0] diff --git a/test/Linker/link-global-to-func.ll b/test/Linker/link-global-to-func.ll index 9d969d7..4d83fe5 100644 --- a/test/Linker/link-global-to-func.ll +++ b/test/Linker/link-global-to-func.ll @@ -1,7 +1,8 @@ ; RUN: llvm-as %s -o %t1.bc ; RUN: echo "declare void @__eprintf(i8*, i8*, i32, i8*) noreturn define void @foo() { tail call void @__eprintf( i8* undef, i8* undef, i32 4, i8* null ) noreturn nounwind unreachable }" | llvm-as -o %t2.bc -; RUN: llvm-link %t2.bc %t1.bc -S | grep __eprintf -; RUN: llvm-link %t1.bc %t2.bc -S | grep __eprintf +; RUN: llvm-link %t2.bc %t1.bc -S | FileCheck %s +; RUN: llvm-link %t1.bc %t2.bc -S | FileCheck %s +; CHECK: __eprintf ; rdar://6072702 diff --git a/test/Linker/linknamedmdnode.ll b/test/Linker/linknamedmdnode.ll index e6b779f..73e7554 100644 --- a/test/Linker/linknamedmdnode.ll +++ b/test/Linker/linknamedmdnode.ll @@ -1,6 +1,7 @@ ; RUN: llvm-as < %s > %t.bc ; RUN: llvm-as < %p/linknamedmdnode2.ll > %t2.bc -; RUN: llvm-link %t.bc %t2.bc -S | grep "!llvm.stuff = !{!0, !1}" +; RUN: llvm-link %t.bc %t2.bc -S | FileCheck %s +; CHECK: !llvm.stuff = !{!0, !1} !0 = metadata !{i32 42} !llvm.stuff = !{!0} diff --git a/test/Linker/redefinition.ll b/test/Linker/redefinition.ll index 23ba6a1..64a8c34 100644 --- a/test/Linker/redefinition.ll +++ b/test/Linker/redefinition.ll @@ -3,8 +3,7 @@ ; RUN: llvm-as %s -o %t.foo1.bc ; RUN: llvm-as %s -o %t.foo2.bc ; RUN: echo "define void @foo(i32 %x) { ret void }" | llvm-as -o %t.foo3.bc -; RUN: not llvm-link %t.foo1.bc %t.foo2.bc -o %t.bc 2>&1 | \ -; RUN: grep "symbol multiply defined" -; RUN: not llvm-link %t.foo1.bc %t.foo3.bc -o %t.bc 2>&1 | \ -; RUN: grep "symbol multiply defined" +; RUN: not llvm-link %t.foo1.bc %t.foo2.bc -o %t.bc 2>&1 | FileCheck %s +; RUN: not llvm-link %t.foo1.bc %t.foo3.bc -o %t.bc 2>&1 | FileCheck %s +; CHECK: symbol multiply defined define void @foo() { ret void } diff --git a/test/Linker/weakextern.ll b/test/Linker/weakextern.ll index 3a72a48..b9f2584 100644 --- a/test/Linker/weakextern.ll +++ b/test/Linker/weakextern.ll @@ -1,9 +1,10 @@ ; RUN: llvm-as < %s > %t.bc ; RUN: llvm-as < %p/testlink1.ll > %t2.bc ; RUN: llvm-link %t.bc %t.bc %t2.bc -o %t1.bc -; RUN: llvm-dis < %t1.bc | grep "kallsyms_names = extern_weak" -; RUN: llvm-dis < %t1.bc | grep "MyVar = external global i32" -; RUN: llvm-dis < %t1.bc | grep "Inte = global i32" +; RUN: llvm-dis < %t1.bc | FileCheck %s +; CHECK: kallsyms_names = extern_weak +; CHECK: Inte = global i32 +; CHECK: MyVar = external global i32 @kallsyms_names = extern_weak global [0 x i8] ; <[0 x i8]*> [#uses=0] @MyVar = extern_weak global i32 ; <i32*> [#uses=0] diff --git a/test/MC/AArch64/elf-globaladdress.ll b/test/MC/AArch64/elf-globaladdress.ll index 190439d..942920b 100644 --- a/test/MC/AArch64/elf-globaladdress.ll +++ b/test/MC/AArch64/elf-globaladdress.ll @@ -1,10 +1,10 @@ ;; RUN: llc -mtriple=aarch64-none-linux-gnu -filetype=obj %s -o - | \ -;; RUN: elf-dump | FileCheck -check-prefix=OBJ %s +;; RUN: llvm-readobj -h -r | FileCheck -check-prefix=OBJ %s ; Also take it on a round-trip through llvm-mc to stretch assembly-parsing's legs: ;; RUN: llc -mtriple=aarch64-none-linux-gnu %s -o - | \ -;; RUN: llvm-mc -arch=aarch64 -filetype=obj -o - | \ -;; RUN: elf-dump | FileCheck -check-prefix=OBJ %s +;; RUN: llvm-mc -triple=aarch64-none-linux-gnu -filetype=obj -o - | \ +;; RUN: llvm-readobj -h -r | FileCheck -check-prefix=OBJ %s @var8 = global i8 0 @var16 = global i16 0 @@ -35,77 +35,28 @@ define void @address() { } ; Check we're using EM_AARCH64 -; OBJ: 'e_machine', 0x00 - -; OBJ: .rela.text - -; var8 -; R_AARCH64_ADR_PREL_PG_HI21 against var8 -; OBJ: 'r_sym', 0x0000000f -; OBJ-NEXT: 'r_type', 0x00000113 - -; R_AARCH64_LDST8_ABS_LO12_NC against var8 -; OBJ: 'r_sym', 0x0000000f -; OBJ-NEXT: 'r_type', 0x00000116 - - -; var16 -; R_AARCH64_ADR_PREL_PG_HI21 against var16 -; OBJ: 'r_sym', 0x0000000c -; OBJ-NEXT: 'r_type', 0x00000113 - -; R_AARCH64_LDST16_ABS_LO12_NC against var16 -; OBJ: 'r_sym', 0x0000000c -; OBJ-NEXT: 'r_type', 0x0000011c - - -; var32 -; R_AARCH64_ADR_PREL_PG_HI21 against var32 -; OBJ: 'r_sym', 0x0000000d -; OBJ-NEXT: 'r_type', 0x00000113 - -; R_AARCH64_LDST32_ABS_LO12_NC against var32 -; OBJ: 'r_sym', 0x0000000d -; OBJ-NEXT: 'r_type', 0x0000011d - - -; var64 -; R_AARCH64_ADR_PREL_PG_HI21 against var64 -; OBJ: 'r_sym', 0x0000000e -; OBJ-NEXT: 'r_type', 0x00000113 - -; R_AARCH64_LDST64_ABS_LO12_NC against var64 -; OBJ: 'r_sym', 0x0000000e -; OBJ-NEXT: 'r_type', 0x0000011e +; OBJ: ElfHeader { +; OBJ: Machine: EM_AARCH64 +; OBJ: } + +; OBJ: Relocations [ +; OBJ: Section (1) .text { +; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var8 +; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST8_ABS_LO12_NC var8 +; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var16 +; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST16_ABS_LO12_NC var16 +; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var32 +; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST32_ABS_LO12_NC var32 +; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var64 +; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST64_ABS_LO12_NC var64 ; This is on the store, so not really important, but it stops the next ; match working. -; R_AARCH64_LDST64_ABS_LO12_NC against var64 -; OBJ: 'r_sym', 0x0000000e -; OBJ-NEXT: 'r_type', 0x0000011e - +; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_LDST64_ABS_LO12_NC var64 ; Pure address-calculation against var64 -; R_AARCH64_ADR_PREL_PG_HI21 against var64 -; OBJ: 'r_sym', 0x0000000e -; OBJ-NEXT: 'r_type', 0x00000113 - -; R_AARCH64_ADD_ABS_LO12_NC against var64 -; OBJ: 'r_sym', 0x0000000e -; OBJ-NEXT: 'r_type', 0x00000115 - - -; Make sure the symbols don't move around, otherwise relocation info -; will be wrong: - -; OBJ: Symbol 12 -; OBJ-NEXT: var16 - -; OBJ: Symbol 13 -; OBJ-NEXT: var32 - -; OBJ: Symbol 14 -; OBJ-NEXT: var64 +; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADR_PREL_PG_HI21 var64 +; OBJ: 0x{{[0-9,A-F]+}} R_AARCH64_ADD_ABS_LO12_NC var64 -; OBJ: Symbol 15 -; OBJ-NEXT: var8 +; OBJ: } +; OBJ: ] diff --git a/test/MC/AArch64/elf-objdump.s b/test/MC/AArch64/elf-objdump.s index c5aa5b1..51d444a 100644 --- a/test/MC/AArch64/elf-objdump.s +++ b/test/MC/AArch64/elf-objdump.s @@ -1,5 +1,5 @@ // 64 bit little endian -// RUN: llvm-mc -filetype=obj -arch=aarch64 -triple aarch64-none-linux-gnu %s -o - | llvm-objdump -d +// RUN: llvm-mc -filetype=obj -triple aarch64-none-linux-gnu %s -o - | llvm-objdump -d // We just want to see if llvm-objdump works at all. // CHECK: .text diff --git a/test/MC/AArch64/elf-reloc-addsubimm.s b/test/MC/AArch64/elf-reloc-addsubimm.s index 7fa6e90..0321dda 100644 --- a/test/MC/AArch64/elf-reloc-addsubimm.s +++ b/test/MC/AArch64/elf-reloc-addsubimm.s @@ -1,13 +1,10 @@ -// RUN: llvm-mc -arch=aarch64 -filetype=obj %s -o - | \ -// RUN: elf-dump | FileCheck -check-prefix=OBJ %s +// RUN: llvm-mc -triple=aarch64-none-linux-gnu -filetype=obj %s -o - | \ +// RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s add x2, x3, #:lo12:some_label -// OBJ: .rela.text -// OBJ: 'r_offset', 0x0000000000000000 -// OBJ-NEXT: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x00000115 - -// OBJ: .symtab -// OBJ: Symbol 5 -// OBJ-NEXT: some_label
\ No newline at end of file +// OBJ: Relocations [ +// OBJ-NEXT: Section (1) .text { +// OBJ-NEXT: 0x0 R_AARCH64_ADD_ABS_LO12_NC some_label 0x0 +// OBJ-NEXT: } +// OBJ-NEXT: ] diff --git a/test/MC/AArch64/elf-reloc-condbr.s b/test/MC/AArch64/elf-reloc-condbr.s index 283d3b9..684e75a 100644 --- a/test/MC/AArch64/elf-reloc-condbr.s +++ b/test/MC/AArch64/elf-reloc-condbr.s @@ -1,13 +1,10 @@ -// RUN: llvm-mc -arch=aarch64 -filetype=obj %s -o - | \ -// RUN: elf-dump | FileCheck -check-prefix=OBJ %s +// RUN: llvm-mc -triple=aarch64-none-linux-gnu -filetype=obj %s -o - | \ +// RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s b.eq somewhere -// OBJ: .rela.text -// OBJ: 'r_offset', 0x0000000000000000 -// OBJ-NEXT: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x00000118 - -// OBJ: .symtab -// OBJ: Symbol 5 -// OBJ-NEXT: somewhere
\ No newline at end of file +// OBJ: Relocations [ +// OBJ-NEXT: Section (1) .text { +// OBJ-NEXT: 0x0 R_AARCH64_CONDBR19 somewhere 0x0 +// OBJ-NEXT: } +// OBJ-NEXT: ] diff --git a/test/MC/AArch64/elf-reloc-ldrlit.s b/test/MC/AArch64/elf-reloc-ldrlit.s index ce9ff49..de43c4f 100644 --- a/test/MC/AArch64/elf-reloc-ldrlit.s +++ b/test/MC/AArch64/elf-reloc-ldrlit.s @@ -1,28 +1,16 @@ -// RUN: llvm-mc -arch=aarch64 -filetype=obj %s -o - | \ -// RUN: elf-dump | FileCheck -check-prefix=OBJ %s +// RUN: llvm-mc -triple=aarch64-none-linux-gnu -filetype=obj %s -o - | \ +// RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s ldr x0, some_label ldr w3, some_label ldrsw x9, some_label prfm pldl3keep, some_label -// OBJ: .rela.text -// OBJ: 'r_offset', 0x0000000000000000 -// OBJ: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x00000111 - -// OBJ: 'r_offset', 0x0000000000000004 -// OBJ: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x00000111 - -// OBJ: 'r_offset', 0x0000000000000008 -// OBJ: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x00000111 - -// OBJ: 'r_offset', 0x000000000000000c -// OBJ: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x00000111 - -// OBJ: .symtab -// OBJ: Symbol 5 -// OBJ-NEXT: some_label
\ No newline at end of file +// OBJ: Relocations [ +// OBJ-NEXT: Section (1) .text { +// OBJ-NEXT: 0x0 R_AARCH64_LD_PREL_LO19 some_label 0x0 +// OBJ-NEXT: 0x4 R_AARCH64_LD_PREL_LO19 some_label 0x0 +// OBJ-NEXT: 0x8 R_AARCH64_LD_PREL_LO19 some_label 0x0 +// OBJ-NEXT: 0xC R_AARCH64_LD_PREL_LO19 some_label 0x0 +// OBJ-NEXT: } +// OBJ-NEXT: ] diff --git a/test/MC/AArch64/elf-reloc-ldstunsimm.s b/test/MC/AArch64/elf-reloc-ldstunsimm.s index 345fc82..e1f841bd 100644 --- a/test/MC/AArch64/elf-reloc-ldstunsimm.s +++ b/test/MC/AArch64/elf-reloc-ldstunsimm.s @@ -1,5 +1,5 @@ -// RUN: llvm-mc -arch=aarch64 -filetype=obj %s -o - | \ -// RUN: elf-dump | FileCheck -check-prefix=OBJ %s +// RUN: llvm-mc -triple=aarch64-none-linux-gnu -filetype=obj %s -o - | \ +// RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s ldrb w0, [sp, #:lo12:some_label] ldrh w0, [sp, #:lo12:some_label] @@ -7,28 +7,12 @@ ldr x0, [sp, #:lo12:some_label] str q0, [sp, #:lo12:some_label] -// OBJ: .rela.text - -// OBJ: 'r_offset', 0x0000000000000000 -// OBJ-NEXT: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x00000116 - -// OBJ: 'r_offset', 0x0000000000000004 -// OBJ-NEXT: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x0000011c - -// OBJ: 'r_offset', 0x0000000000000008 -// OBJ-NEXT: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x0000011d - -// OBJ: 'r_offset', 0x000000000000000c -// OBJ-NEXT: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x0000011e - -// OBJ: 'r_offset', 0x0000000000000010 -// OBJ-NEXT: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x0000012b - -// OBJ: .symtab -// OBJ: Symbol 5 -// OBJ-NEXT: some_label +// OBJ: Relocations [ +// OBJ-NEXT: Section (1) .text { +// OBJ-NEXT: 0x0 R_AARCH64_LDST8_ABS_LO12_NC some_label 0x0 +// OBJ-NEXT: 0x4 R_AARCH64_LDST16_ABS_LO12_NC some_label 0x0 +// OBJ-NEXT: 0x8 R_AARCH64_LDST32_ABS_LO12_NC some_label 0x0 +// OBJ-NEXT: 0xC R_AARCH64_LDST64_ABS_LO12_NC some_label 0x0 +// OBJ-NEXT: 0x10 R_AARCH64_LDST128_ABS_LO12_NC some_label 0x0 +// OBJ-NEXT: } +// OBJ-NEXT: ] diff --git a/test/MC/AArch64/elf-reloc-movw.s b/test/MC/AArch64/elf-reloc-movw.s index cb7dc67..8a7e532 100644 --- a/test/MC/AArch64/elf-reloc-movw.s +++ b/test/MC/AArch64/elf-reloc-movw.s @@ -1,5 +1,5 @@ -// RUN: llvm-mc -arch=aarch64 -filetype=obj %s -o - | \ -// RUN: elf-dump | FileCheck -check-prefix=OBJ %s +// RUN: llvm-mc -triple=aarch64-none-linux-gnu -filetype=obj %s -o - | \ +// RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s movz x0, #:abs_g0:some_label movk x0, #:abs_g0_nc:some_label @@ -21,78 +21,22 @@ movz x19, #:abs_g2_s:some_label movn x19, #:abs_g2_s:some_label -// OBJ: .rela.text -// :abs_g0: => R_AARCH64_MOVW_UABS_G0 -// OBJ: 'r_offset', 0x0000000000000000 -// OBJ: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x00000107 - -// :abs_g0_nc: => R_AARCH64_MOVW_UABS_G0_NC -// OBJ: 'r_offset', 0x0000000000000004 -// OBJ: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x00000108 - -// :abs_g1: => R_AARCH64_MOVW_UABS_G1 -// OBJ: 'r_offset', 0x0000000000000008 -// OBJ: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x00000109 - -// :abs_g1_nc: => R_AARCH64_MOVW_UABS_G1_NC -// OBJ: 'r_offset', 0x000000000000000c -// OBJ: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x0000010a - -// :abs_g2: => R_AARCH64_MOVW_UABS_G2 -// OBJ: 'r_offset', 0x0000000000000010 -// OBJ: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x0000010b - -// :abs_g2_nc: => R_AARCH64_MOVW_UABS_G2_NC -// OBJ: 'r_offset', 0x0000000000000014 -// OBJ: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x0000010c - -// :abs_g3: => R_AARCH64_MOVW_UABS_G3 -// OBJ: 'r_offset', 0x0000000000000018 -// OBJ: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x0000010d - -// :abs_g3: => R_AARCH64_MOVW_UABS_G3 -// OBJ: 'r_offset', 0x000000000000001c -// OBJ: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x0000010d - -// :abs_g0_s: => R_AARCH64_MOVW_SABS_G0 -// OBJ: 'r_offset', 0x0000000000000020 -// OBJ: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x0000010e - -// :abs_g0_s: => R_AARCH64_MOVW_SABS_G0 -// OBJ: 'r_offset', 0x0000000000000024 -// OBJ: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x0000010e - -// :abs_g1_s: => R_AARCH64_MOVW_SABS_G1 -// OBJ: 'r_offset', 0x0000000000000028 -// OBJ: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x0000010f - -// :abs_g1_s: => R_AARCH64_MOVW_SABS_G1 -// OBJ: 'r_offset', 0x000000000000002c -// OBJ: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x0000010f - -// :abs_g2_s: => R_AARCH64_MOVW_SABS_G2 -// OBJ: 'r_offset', 0x0000000000000030 -// OBJ: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x00000110 - -// :abs_g2_s: => R_AARCH64_MOVW_SABS_G2 -// OBJ: 'r_offset', 0x0000000000000034 -// OBJ: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x00000110 - -// OBJ: .symtab -// OBJ: Symbol 5 -// OBJ-NEXT: some_label +// OBJ: Relocations [ +// OBJ-NEXT: Section (1) .text { +// OBJ-NEXT: 0x0 R_AARCH64_MOVW_UABS_G0 some_label 0x0 +// OBJ-NEXT: 0x4 R_AARCH64_MOVW_UABS_G0_NC some_label 0x0 +// OBJ-NEXT: 0x8 R_AARCH64_MOVW_UABS_G1 some_label 0x0 +// OBJ-NEXT: 0xC R_AARCH64_MOVW_UABS_G1_NC some_label 0x0 +// OBJ-NEXT: 0x10 R_AARCH64_MOVW_UABS_G2 some_label 0x0 +// OBJ-NEXT: 0x14 R_AARCH64_MOVW_UABS_G2_NC some_label 0x0 +// OBJ-NEXT: 0x18 R_AARCH64_MOVW_UABS_G3 some_label 0x0 +// OBJ-NEXT: 0x1C R_AARCH64_MOVW_UABS_G3 some_label 0x0 +// OBJ-NEXT: 0x20 R_AARCH64_MOVW_SABS_G0 some_label 0x0 +// OBJ-NEXT: 0x24 R_AARCH64_MOVW_SABS_G0 some_label 0x0 +// OBJ-NEXT: 0x28 R_AARCH64_MOVW_SABS_G1 some_label 0x0 +// OBJ-NEXT: 0x2C R_AARCH64_MOVW_SABS_G1 some_label 0x0 +// OBJ-NEXT: 0x30 R_AARCH64_MOVW_SABS_G2 some_label 0x0 +// OBJ-NEXT: 0x34 R_AARCH64_MOVW_SABS_G2 some_label 0x0 +// OBJ-NEXT: } +// OBJ-NEXT: ] diff --git a/test/MC/AArch64/elf-reloc-pcreladdressing.s b/test/MC/AArch64/elf-reloc-pcreladdressing.s index 39a8ba9..b5f0727 100644 --- a/test/MC/AArch64/elf-reloc-pcreladdressing.s +++ b/test/MC/AArch64/elf-reloc-pcreladdressing.s @@ -1,29 +1,17 @@ -// RUN: llvm-mc -arch=aarch64 -filetype=obj %s -o - | \ -// RUN: elf-dump | FileCheck -check-prefix=OBJ %s +// RUN: llvm-mc -triple=aarch64-none-linux-gnu -filetype=obj %s -o - | \ +// RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s adr x2, some_label adrp x5, some_label adrp x5, :got:some_label ldr x0, [x5, #:got_lo12:some_label] -// OBJ: .rela.text -// OBJ: 'r_offset', 0x0000000000000000 -// OBJ-NEXT: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x00000112 - -// OBJ: 'r_offset', 0x0000000000000004 -// OBJ-NEXT: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x00000113 - -// OBJ: 'r_offset', 0x0000000000000008 -// OBJ-NEXT: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x00000137 - -// OBJ: 'r_offset', 0x000000000000000c -// OBJ-NEXT: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x00000138 - -// OBJ: .symtab -// OBJ: Symbol 5 -// OBJ-NEXT: some_label
\ No newline at end of file +// OBJ: Relocations [ +// OBJ-NEXT: Section (1) .text { +// OBJ-NEXT: 0x0 R_AARCH64_ADR_PREL_LO21 some_label 0x0 +// OBJ-NEXT: 0x4 R_AARCH64_ADR_PREL_PG_HI21 some_label 0x0 +// OBJ-NEXT: 0x8 R_AARCH64_ADR_GOT_PAGE some_label 0x0 +// OBJ-NEXT: 0xC R_AARCH64_LD64_GOT_LO12_NC some_label 0x0 +// OBJ-NEXT: } +// OBJ-NEXT: ] diff --git a/test/MC/AArch64/elf-reloc-tstb.s b/test/MC/AArch64/elf-reloc-tstb.s index c5e2981..037e896 100644 --- a/test/MC/AArch64/elf-reloc-tstb.s +++ b/test/MC/AArch64/elf-reloc-tstb.s @@ -1,18 +1,12 @@ -// RUN: llvm-mc -arch=aarch64 -filetype=obj %s -o - | \ -// RUN: elf-dump | FileCheck -check-prefix=OBJ %s +// RUN: llvm-mc -triple=aarch64-none-linux-gnu -filetype=obj %s -o - | \ +// RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s tbz x6, #45, somewhere tbnz w3, #15, somewhere -// OBJ: .rela.text -// OBJ: 'r_offset', 0x0000000000000000 -// OBJ-NEXT: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x00000117 - -// OBJ: 'r_offset', 0x0000000000000004 -// OBJ-NEXT: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x00000117 - -// OBJ: .symtab -// OBJ: Symbol 5 -// OBJ-NEXT: somewhere +// OBJ: Relocations [ +// OBJ-NEXT: Section (1) .text { +// OBJ-NEXT: 0x0 R_AARCH64_TSTBR14 somewhere 0x0 +// OBJ-NEXT: 0x4 R_AARCH64_TSTBR14 somewhere 0x0 +// OBJ-NEXT: } +// OBJ-NEXT: ] diff --git a/test/MC/AArch64/elf-reloc-uncondbrimm.s b/test/MC/AArch64/elf-reloc-uncondbrimm.s index 0e97bc6..bead07c 100644 --- a/test/MC/AArch64/elf-reloc-uncondbrimm.s +++ b/test/MC/AArch64/elf-reloc-uncondbrimm.s @@ -1,18 +1,12 @@ -// RUN: llvm-mc -arch=aarch64 -filetype=obj %s -o - | \ -// RUN: elf-dump | FileCheck -check-prefix=OBJ %s +// RUN: llvm-mc -triple=aarch64-none-linux-gnu -filetype=obj %s -o - | \ +// RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s b somewhere bl somewhere -// OBJ: .rela.text -// OBJ: 'r_offset', 0x0000000000000000 -// OBJ-NEXT: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x0000011a - -// OBJ: 'r_offset', 0x0000000000000004 -// OBJ-NEXT: 'r_sym', 0x00000005 -// OBJ-NEXT: 'r_type', 0x0000011b - -// OBJ: .symtab -// OBJ: Symbol 5 -// OBJ-NEXT: somewhere
\ No newline at end of file +// OBJ: Relocations [ +// OBJ-NEXT: Section (1) .text { +// OBJ-NEXT: 0x0 R_AARCH64_JUMP26 somewhere 0x0 +// OBJ-NEXT: 0x4 R_AARCH64_CALL26 somewhere 0x0 +// OBJ-NEXT: } +// OBJ-NEXT: ] diff --git a/test/MC/AArch64/gicv3-regs-diagnostics.s b/test/MC/AArch64/gicv3-regs-diagnostics.s new file mode 100644 index 0000000..e891adb --- /dev/null +++ b/test/MC/AArch64/gicv3-regs-diagnostics.s @@ -0,0 +1,61 @@ +// RUN: llvm-mc -triple aarch64-none-linux-gnu < %s 2>&1 | FileCheck %s + + // Write-only + mrs x10, icc_eoir1_el1 + mrs x7, icc_eoir0_el1 + mrs x22, icc_dir_el1 + mrs x24, icc_sgi1r_el1 + mrs x8, icc_asgi1r_el1 + mrs x28, icc_sgi0r_el1 +// CHECK: error: expected readable system register +// CHECK-NEXT: mrs x10, icc_eoir1_el1 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected readable system register +// CHECK-NEXT: mrs x7, icc_eoir0_el1 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected readable system register +// CHECK-NEXT: mrs x22, icc_dir_el1 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected readable system register +// CHECK-NEXT: mrs x24, icc_sgi1r_el1 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected readable system register +// CHECK-NEXT: mrs x8, icc_asgi1r_el1 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected readable system register +// CHECK-NEXT: mrs x28, icc_sgi0r_el1 +// CHECK-NEXT: ^ + + // Read-only + msr icc_iar1_el1, x16 + msr icc_iar0_el1, x19 + msr icc_hppir1_el1, x29 + msr icc_hppir0_el1, x14 + msr icc_rpr_el1, x6 + msr ich_vtr_el2, x8 + msr ich_eisr_el2, x22 + msr ich_elsr_el2, x8 +// CHECK: error: expected writable system register or pstate +// CHECK-NEXT: msr icc_iar1_el1, x16 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr icc_iar0_el1, x19 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr icc_hppir1_el1, x29 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr icc_hppir0_el1, x14 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr icc_rpr_el1, x6 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr ich_vtr_el2, x8 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr ich_eisr_el2, x22 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr ich_elsr_el2, x8 +// CHECK-NEXT: ^ diff --git a/test/MC/AArch64/gicv3-regs.s b/test/MC/AArch64/gicv3-regs.s new file mode 100644 index 0000000..f777651 --- /dev/null +++ b/test/MC/AArch64/gicv3-regs.s @@ -0,0 +1,223 @@ + // RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding < %s | FileCheck %s + + mrs x8, icc_iar1_el1 + mrs x26, icc_iar0_el1 + mrs x2, icc_hppir1_el1 + mrs x17, icc_hppir0_el1 + mrs x29, icc_rpr_el1 + mrs x4, ich_vtr_el2 + mrs x24, ich_eisr_el2 + mrs x9, ich_elsr_el2 + mrs x24, icc_bpr1_el1 + mrs x14, icc_bpr0_el1 + mrs x19, icc_pmr_el1 + mrs x23, icc_ctlr_el1 + mrs x20, icc_ctlr_el3 + mrs x28, icc_sre_el1 + mrs x25, icc_sre_el2 + mrs x8, icc_sre_el3 + mrs x22, icc_igrpen0_el1 + mrs x5, icc_igrpen1_el1 + mrs x7, icc_igrpen1_el3 + mrs x22, icc_seien_el1 + mrs x4, icc_ap0r0_el1 + mrs x11, icc_ap0r1_el1 + mrs x27, icc_ap0r2_el1 + mrs x21, icc_ap0r3_el1 + mrs x2, icc_ap1r0_el1 + mrs x21, icc_ap1r1_el1 + mrs x10, icc_ap1r2_el1 + mrs x27, icc_ap1r3_el1 + mrs x20, ich_ap0r0_el2 + mrs x21, ich_ap0r1_el2 + mrs x5, ich_ap0r2_el2 + mrs x4, ich_ap0r3_el2 + mrs x15, ich_ap1r0_el2 + mrs x12, ich_ap1r1_el2 + mrs x27, ich_ap1r2_el2 + mrs x20, ich_ap1r3_el2 + mrs x10, ich_hcr_el2 + mrs x27, ich_misr_el2 + mrs x6, ich_vmcr_el2 + mrs x19, ich_vseir_el2 + mrs x3, ich_lr0_el2 + mrs x1, ich_lr1_el2 + mrs x22, ich_lr2_el2 + mrs x21, ich_lr3_el2 + mrs x6, ich_lr4_el2 + mrs x10, ich_lr5_el2 + mrs x11, ich_lr6_el2 + mrs x12, ich_lr7_el2 + mrs x0, ich_lr8_el2 + mrs x21, ich_lr9_el2 + mrs x13, ich_lr10_el2 + mrs x26, ich_lr11_el2 + mrs x1, ich_lr12_el2 + mrs x8, ich_lr13_el2 + mrs x2, ich_lr14_el2 + mrs x8, ich_lr15_el2 +// CHECK: mrs x8, icc_iar1_el1 // encoding: [0x08,0xcc,0x38,0xd5] +// CHECK: mrs x26, icc_iar0_el1 // encoding: [0x1a,0xc8,0x38,0xd5] +// CHECK: mrs x2, icc_hppir1_el1 // encoding: [0x42,0xcc,0x38,0xd5] +// CHECK: mrs x17, icc_hppir0_el1 // encoding: [0x51,0xc8,0x38,0xd5] +// CHECK: mrs x29, icc_rpr_el1 // encoding: [0x7d,0xcb,0x38,0xd5] +// CHECK: mrs x4, ich_vtr_el2 // encoding: [0x24,0xcb,0x3c,0xd5] +// CHECK: mrs x24, ich_eisr_el2 // encoding: [0x78,0xcb,0x3c,0xd5] +// CHECK: mrs x9, ich_elsr_el2 // encoding: [0xa9,0xcb,0x3c,0xd5] +// CHECK: mrs x24, icc_bpr1_el1 // encoding: [0x78,0xcc,0x38,0xd5] +// CHECK: mrs x14, icc_bpr0_el1 // encoding: [0x6e,0xc8,0x38,0xd5] +// CHECK: mrs x19, icc_pmr_el1 // encoding: [0x13,0x46,0x38,0xd5] +// CHECK: mrs x23, icc_ctlr_el1 // encoding: [0x97,0xcc,0x38,0xd5] +// CHECK: mrs x20, icc_ctlr_el3 // encoding: [0x94,0xcc,0x3e,0xd5] +// CHECK: mrs x28, icc_sre_el1 // encoding: [0xbc,0xcc,0x38,0xd5] +// CHECK: mrs x25, icc_sre_el2 // encoding: [0xb9,0xc9,0x3c,0xd5] +// CHECK: mrs x8, icc_sre_el3 // encoding: [0xa8,0xcc,0x3e,0xd5] +// CHECK: mrs x22, icc_igrpen0_el1 // encoding: [0xd6,0xcc,0x38,0xd5] +// CHECK: mrs x5, icc_igrpen1_el1 // encoding: [0xe5,0xcc,0x38,0xd5] +// CHECK: mrs x7, icc_igrpen1_el3 // encoding: [0xe7,0xcc,0x3e,0xd5] +// CHECK: mrs x22, icc_seien_el1 // encoding: [0x16,0xcd,0x38,0xd5] +// CHECK: mrs x4, icc_ap0r0_el1 // encoding: [0x84,0xc8,0x38,0xd5] +// CHECK: mrs x11, icc_ap0r1_el1 // encoding: [0xab,0xc8,0x38,0xd5] +// CHECK: mrs x27, icc_ap0r2_el1 // encoding: [0xdb,0xc8,0x38,0xd5] +// CHECK: mrs x21, icc_ap0r3_el1 // encoding: [0xf5,0xc8,0x38,0xd5] +// CHECK: mrs x2, icc_ap1r0_el1 // encoding: [0x02,0xc9,0x38,0xd5] +// CHECK: mrs x21, icc_ap1r1_el1 // encoding: [0x35,0xc9,0x38,0xd5] +// CHECK: mrs x10, icc_ap1r2_el1 // encoding: [0x4a,0xc9,0x38,0xd5] +// CHECK: mrs x27, icc_ap1r3_el1 // encoding: [0x7b,0xc9,0x38,0xd5] +// CHECK: mrs x20, ich_ap0r0_el2 // encoding: [0x14,0xc8,0x3c,0xd5] +// CHECK: mrs x21, ich_ap0r1_el2 // encoding: [0x35,0xc8,0x3c,0xd5] +// CHECK: mrs x5, ich_ap0r2_el2 // encoding: [0x45,0xc8,0x3c,0xd5] +// CHECK: mrs x4, ich_ap0r3_el2 // encoding: [0x64,0xc8,0x3c,0xd5] +// CHECK: mrs x15, ich_ap1r0_el2 // encoding: [0x0f,0xc9,0x3c,0xd5] +// CHECK: mrs x12, ich_ap1r1_el2 // encoding: [0x2c,0xc9,0x3c,0xd5] +// CHECK: mrs x27, ich_ap1r2_el2 // encoding: [0x5b,0xc9,0x3c,0xd5] +// CHECK: mrs x20, ich_ap1r3_el2 // encoding: [0x74,0xc9,0x3c,0xd5] +// CHECK: mrs x10, ich_hcr_el2 // encoding: [0x0a,0xcb,0x3c,0xd5] +// CHECK: mrs x27, ich_misr_el2 // encoding: [0x5b,0xcb,0x3c,0xd5] +// CHECK: mrs x6, ich_vmcr_el2 // encoding: [0xe6,0xcb,0x3c,0xd5] +// CHECK: mrs x19, ich_vseir_el2 // encoding: [0x93,0xc9,0x3c,0xd5] +// CHECK: mrs x3, ich_lr0_el2 // encoding: [0x03,0xcc,0x3c,0xd5] +// CHECK: mrs x1, ich_lr1_el2 // encoding: [0x21,0xcc,0x3c,0xd5] +// CHECK: mrs x22, ich_lr2_el2 // encoding: [0x56,0xcc,0x3c,0xd5] +// CHECK: mrs x21, ich_lr3_el2 // encoding: [0x75,0xcc,0x3c,0xd5] +// CHECK: mrs x6, ich_lr4_el2 // encoding: [0x86,0xcc,0x3c,0xd5] +// CHECK: mrs x10, ich_lr5_el2 // encoding: [0xaa,0xcc,0x3c,0xd5] +// CHECK: mrs x11, ich_lr6_el2 // encoding: [0xcb,0xcc,0x3c,0xd5] +// CHECK: mrs x12, ich_lr7_el2 // encoding: [0xec,0xcc,0x3c,0xd5] +// CHECK: mrs x0, ich_lr8_el2 // encoding: [0x00,0xcd,0x3c,0xd5] +// CHECK: mrs x21, ich_lr9_el2 // encoding: [0x35,0xcd,0x3c,0xd5] +// CHECK: mrs x13, ich_lr10_el2 // encoding: [0x4d,0xcd,0x3c,0xd5] +// CHECK: mrs x26, ich_lr11_el2 // encoding: [0x7a,0xcd,0x3c,0xd5] +// CHECK: mrs x1, ich_lr12_el2 // encoding: [0x81,0xcd,0x3c,0xd5] +// CHECK: mrs x8, ich_lr13_el2 // encoding: [0xa8,0xcd,0x3c,0xd5] +// CHECK: mrs x2, ich_lr14_el2 // encoding: [0xc2,0xcd,0x3c,0xd5] +// CHECK: mrs x8, ich_lr15_el2 // encoding: [0xe8,0xcd,0x3c,0xd5] + + msr icc_eoir1_el1, x27 + msr icc_eoir0_el1, x5 + msr icc_dir_el1, x13 + msr icc_sgi1r_el1, x21 + msr icc_asgi1r_el1, x25 + msr icc_sgi0r_el1, x28 + msr icc_bpr1_el1, x7 + msr icc_bpr0_el1, x9 + msr icc_pmr_el1, x29 + msr icc_ctlr_el1, x24 + msr icc_ctlr_el3, x0 + msr icc_sre_el1, x2 + msr icc_sre_el2, x5 + msr icc_sre_el3, x10 + msr icc_igrpen0_el1, x22 + msr icc_igrpen1_el1, x11 + msr icc_igrpen1_el3, x8 + msr icc_seien_el1, x4 + msr icc_ap0r0_el1, x27 + msr icc_ap0r1_el1, x5 + msr icc_ap0r2_el1, x20 + msr icc_ap0r3_el1, x0 + msr icc_ap1r0_el1, x2 + msr icc_ap1r1_el1, x29 + msr icc_ap1r2_el1, x23 + msr icc_ap1r3_el1, x11 + msr ich_ap0r0_el2, x2 + msr ich_ap0r1_el2, x27 + msr ich_ap0r2_el2, x7 + msr ich_ap0r3_el2, x1 + msr ich_ap1r0_el2, x7 + msr ich_ap1r1_el2, x12 + msr ich_ap1r2_el2, x14 + msr ich_ap1r3_el2, x13 + msr ich_hcr_el2, x1 + msr ich_misr_el2, x10 + msr ich_vmcr_el2, x24 + msr ich_vseir_el2, x29 + msr ich_lr0_el2, x26 + msr ich_lr1_el2, x9 + msr ich_lr2_el2, x18 + msr ich_lr3_el2, x26 + msr ich_lr4_el2, x22 + msr ich_lr5_el2, x26 + msr ich_lr6_el2, x27 + msr ich_lr7_el2, x8 + msr ich_lr8_el2, x17 + msr ich_lr9_el2, x19 + msr ich_lr10_el2, x17 + msr ich_lr11_el2, x5 + msr ich_lr12_el2, x29 + msr ich_lr13_el2, x2 + msr ich_lr14_el2, x13 + msr ich_lr15_el2, x27 +// CHECK: msr icc_eoir1_el1, x27 // encoding: [0x3b,0xcc,0x18,0xd5] +// CHECK: msr icc_eoir0_el1, x5 // encoding: [0x25,0xc8,0x18,0xd5] +// CHECK: msr icc_dir_el1, x13 // encoding: [0x2d,0xcb,0x18,0xd5] +// CHECK: msr icc_sgi1r_el1, x21 // encoding: [0xb5,0xcb,0x18,0xd5] +// CHECK: msr icc_asgi1r_el1, x25 // encoding: [0xd9,0xcb,0x18,0xd5] +// CHECK: msr icc_sgi0r_el1, x28 // encoding: [0xfc,0xcb,0x18,0xd5] +// CHECK: msr icc_bpr1_el1, x7 // encoding: [0x67,0xcc,0x18,0xd5] +// CHECK: msr icc_bpr0_el1, x9 // encoding: [0x69,0xc8,0x18,0xd5] +// CHECK: msr icc_pmr_el1, x29 // encoding: [0x1d,0x46,0x18,0xd5] +// CHECK: msr icc_ctlr_el1, x24 // encoding: [0x98,0xcc,0x18,0xd5] +// CHECK: msr icc_ctlr_el3, x0 // encoding: [0x80,0xcc,0x1e,0xd5] +// CHECK: msr icc_sre_el1, x2 // encoding: [0xa2,0xcc,0x18,0xd5] +// CHECK: msr icc_sre_el2, x5 // encoding: [0xa5,0xc9,0x1c,0xd5] +// CHECK: msr icc_sre_el3, x10 // encoding: [0xaa,0xcc,0x1e,0xd5] +// CHECK: msr icc_igrpen0_el1, x22 // encoding: [0xd6,0xcc,0x18,0xd5] +// CHECK: msr icc_igrpen1_el1, x11 // encoding: [0xeb,0xcc,0x18,0xd5] +// CHECK: msr icc_igrpen1_el3, x8 // encoding: [0xe8,0xcc,0x1e,0xd5] +// CHECK: msr icc_seien_el1, x4 // encoding: [0x04,0xcd,0x18,0xd5] +// CHECK: msr icc_ap0r0_el1, x27 // encoding: [0x9b,0xc8,0x18,0xd5] +// CHECK: msr icc_ap0r1_el1, x5 // encoding: [0xa5,0xc8,0x18,0xd5] +// CHECK: msr icc_ap0r2_el1, x20 // encoding: [0xd4,0xc8,0x18,0xd5] +// CHECK: msr icc_ap0r3_el1, x0 // encoding: [0xe0,0xc8,0x18,0xd5] +// CHECK: msr icc_ap1r0_el1, x2 // encoding: [0x02,0xc9,0x18,0xd5] +// CHECK: msr icc_ap1r1_el1, x29 // encoding: [0x3d,0xc9,0x18,0xd5] +// CHECK: msr icc_ap1r2_el1, x23 // encoding: [0x57,0xc9,0x18,0xd5] +// CHECK: msr icc_ap1r3_el1, x11 // encoding: [0x6b,0xc9,0x18,0xd5] +// CHECK: msr ich_ap0r0_el2, x2 // encoding: [0x02,0xc8,0x1c,0xd5] +// CHECK: msr ich_ap0r1_el2, x27 // encoding: [0x3b,0xc8,0x1c,0xd5] +// CHECK: msr ich_ap0r2_el2, x7 // encoding: [0x47,0xc8,0x1c,0xd5] +// CHECK: msr ich_ap0r3_el2, x1 // encoding: [0x61,0xc8,0x1c,0xd5] +// CHECK: msr ich_ap1r0_el2, x7 // encoding: [0x07,0xc9,0x1c,0xd5] +// CHECK: msr ich_ap1r1_el2, x12 // encoding: [0x2c,0xc9,0x1c,0xd5] +// CHECK: msr ich_ap1r2_el2, x14 // encoding: [0x4e,0xc9,0x1c,0xd5] +// CHECK: msr ich_ap1r3_el2, x13 // encoding: [0x6d,0xc9,0x1c,0xd5] +// CHECK: msr ich_hcr_el2, x1 // encoding: [0x01,0xcb,0x1c,0xd5] +// CHECK: msr ich_misr_el2, x10 // encoding: [0x4a,0xcb,0x1c,0xd5] +// CHECK: msr ich_vmcr_el2, x24 // encoding: [0xf8,0xcb,0x1c,0xd5] +// CHECK: msr ich_vseir_el2, x29 // encoding: [0x9d,0xc9,0x1c,0xd5] +// CHECK: msr ich_lr0_el2, x26 // encoding: [0x1a,0xcc,0x1c,0xd5] +// CHECK: msr ich_lr1_el2, x9 // encoding: [0x29,0xcc,0x1c,0xd5] +// CHECK: msr ich_lr2_el2, x18 // encoding: [0x52,0xcc,0x1c,0xd5] +// CHECK: msr ich_lr3_el2, x26 // encoding: [0x7a,0xcc,0x1c,0xd5] +// CHECK: msr ich_lr4_el2, x22 // encoding: [0x96,0xcc,0x1c,0xd5] +// CHECK: msr ich_lr5_el2, x26 // encoding: [0xba,0xcc,0x1c,0xd5] +// CHECK: msr ich_lr6_el2, x27 // encoding: [0xdb,0xcc,0x1c,0xd5] +// CHECK: msr ich_lr7_el2, x8 // encoding: [0xe8,0xcc,0x1c,0xd5] +// CHECK: msr ich_lr8_el2, x17 // encoding: [0x11,0xcd,0x1c,0xd5] +// CHECK: msr ich_lr9_el2, x19 // encoding: [0x33,0xcd,0x1c,0xd5] +// CHECK: msr ich_lr10_el2, x17 // encoding: [0x51,0xcd,0x1c,0xd5] +// CHECK: msr ich_lr11_el2, x5 // encoding: [0x65,0xcd,0x1c,0xd5] +// CHECK: msr ich_lr12_el2, x29 // encoding: [0x9d,0xcd,0x1c,0xd5] +// CHECK: msr ich_lr13_el2, x2 // encoding: [0xa2,0xcd,0x1c,0xd5] +// CHECK: msr ich_lr14_el2, x13 // encoding: [0xcd,0xcd,0x1c,0xd5] +// CHECK: msr ich_lr15_el2, x27 // encoding: [0xfb,0xcd,0x1c,0xd5] diff --git a/test/MC/AArch64/tls-relocs.s b/test/MC/AArch64/tls-relocs.s index 690fa8c..d0e336e 100644 --- a/test/MC/AArch64/tls-relocs.s +++ b/test/MC/AArch64/tls-relocs.s @@ -1,9 +1,6 @@ -// RUN: llvm-mc -arch=aarch64 -show-encoding < %s | FileCheck %s -// RUN: llvm-mc -arch=aarch64 -filetype=obj < %s -o %t -// RUN: elf-dump %t | FileCheck --check-prefix=CHECK-ELF %s -// RUN: llvm-objdump -r %t | FileCheck --check-prefix=CHECK-ELF-NAMES %s - -// CHECK-ELF: .rela.text +// RUN: llvm-mc -triple=aarch64-none-linux-gnu -show-encoding < %s | FileCheck %s +// RUN: llvm-mc -triple=aarch64-none-linux-gnu -filetype=obj < %s -o - | \ +// RUN: llvm-readobj -r -t | FileCheck --check-prefix=CHECK-ELF %s // TLS local-dynamic forms movz x1, #:dtprel_g2:var @@ -12,34 +9,20 @@ movn x4, #:dtprel_g2:var // CHECK: movz x1, #:dtprel_g2:var // encoding: [0x01'A',A,0xc0'A',0x92'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g2:var, kind: fixup_a64_movw_dtprel_g2 -// CHECK-NEXT: movn x2, #:dtprel_g2:var // encoding: [0x02'A',A,0xc0'A',0x92'A'] +// CHECK: movn x2, #:dtprel_g2:var // encoding: [0x02'A',A,0xc0'A',0x92'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g2:var, kind: fixup_a64_movw_dtprel_g2 -// CHECK-NEXT: movz x3, #:dtprel_g2:var // encoding: [0x03'A',A,0xc0'A',0x92'A'] +// CHECK: movz x3, #:dtprel_g2:var // encoding: [0x03'A',A,0xc0'A',0x92'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g2:var, kind: fixup_a64_movw_dtprel_g2 -// CHECK-NEXT: movn x4, #:dtprel_g2:var // encoding: [0x04'A',A,0xc0'A',0x92'A'] +// CHECK: movn x4, #:dtprel_g2:var // encoding: [0x04'A',A,0xc0'A',0x92'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g2:var, kind: fixup_a64_movw_dtprel_g2 -// CHECK-ELF: # Relocation 0 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000000) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM:0x[0-9a-f]+]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000020b) -// CHECK-ELF: # Relocation 1 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000004) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000020b) -// CHECK-ELF: # Relocation 2 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000008) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000020b) -// CHECK-ELF: # Relocation 3 -// CHECK-ELF-NEXT: (('r_offset', 0x000000000000000c) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000020b) - -// CHECK-ELF-NAMES: 0 R_AARCH64_TLSLD_MOVW_DTPREL_G2 -// CHECK-ELF-NAMES: 4 R_AARCH64_TLSLD_MOVW_DTPREL_G2 -// CHECK-ELF-NAMES: 8 R_AARCH64_TLSLD_MOVW_DTPREL_G2 -// CHECK-ELF-NAMES: 12 R_AARCH64_TLSLD_MOVW_DTPREL_G2 +// CHECK-ELF: Relocations [ +// CHECK-ELF-NEXT: Section (1) .text { +// CHECK-ELF-NEXT: 0x0 R_AARCH64_TLSLD_MOVW_DTPREL_G2 [[VARSYM:[^ ]+]] +// CHECK-ELF-NEXT: 0x4 R_AARCH64_TLSLD_MOVW_DTPREL_G2 [[VARSYM]] +// CHECK-ELF-NEXT: 0x8 R_AARCH64_TLSLD_MOVW_DTPREL_G2 [[VARSYM]] +// CHECK-ELF-NEXT: 0xC R_AARCH64_TLSLD_MOVW_DTPREL_G2 [[VARSYM]] + movz x5, #:dtprel_g1:var movn x6, #:dtprel_g1:var @@ -54,46 +37,22 @@ // CHECK-NEXT: movn w8, #:dtprel_g1:var // encoding: [0x08'A',A,0xa0'A',0x12'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g1:var, kind: fixup_a64_movw_dtprel_g1 -// CHECK-ELF: # Relocation 4 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000010) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000020c) -// CHECK-ELF: # Relocation 5 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000014) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000020c) -// CHECK-ELF: # Relocation 6 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000018) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000020c) -// CHECK-ELF: # Relocation 7 -// CHECK-ELF-NEXT: (('r_offset', 0x000000000000001c) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000020c) - -// CHECK-ELF-NAMES: 16 R_AARCH64_TLSLD_MOVW_DTPREL_G1 -// CHECK-ELF-NAMES: 20 R_AARCH64_TLSLD_MOVW_DTPREL_G1 -// CHECK-ELF-NAMES: 24 R_AARCH64_TLSLD_MOVW_DTPREL_G1 -// CHECK-ELF-NAMES: 28 R_AARCH64_TLSLD_MOVW_DTPREL_G1 +// CHECK-ELF-NEXT: 0x10 R_AARCH64_TLSLD_MOVW_DTPREL_G1 [[VARSYM]] +// CHECK-ELF-NEXT: 0x14 R_AARCH64_TLSLD_MOVW_DTPREL_G1 [[VARSYM]] +// CHECK-ELF-NEXT: 0x18 R_AARCH64_TLSLD_MOVW_DTPREL_G1 [[VARSYM]] +// CHECK-ELF-NEXT: 0x1C R_AARCH64_TLSLD_MOVW_DTPREL_G1 [[VARSYM]] + movk x9, #:dtprel_g1_nc:var movk w10, #:dtprel_g1_nc:var // CHECK: movk x9, #:dtprel_g1_nc:var // encoding: [0x09'A',A,0xa0'A',0xf2'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g1_nc:var, kind: fixup_a64_movw_dtprel_g1_nc -// CHECK-NEXT: movk w10, #:dtprel_g1_nc:var // encoding: [0x0a'A',A,0xa0'A',0x72'A'] +// CHECK: movk w10, #:dtprel_g1_nc:var // encoding: [0x0a'A',A,0xa0'A',0x72'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g1_nc:var, kind: fixup_a64_movw_dtprel_g1_nc -// CHECK-ELF: # Relocation 8 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000020) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000020d) -// CHECK-ELF: # Relocation 9 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000024) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000020d) +// CHECK-ELF-NEXT: 0x20 R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC [[VARSYM]] +// CHECK-ELF-NEXT: 0x24 R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC [[VARSYM]] -// CHECK-ELF-NAMES: 32 R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC -// CHECK-ELF-NAMES: 36 R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC movz x11, #:dtprel_g0:var movn x12, #:dtprel_g0:var @@ -101,275 +60,156 @@ movn w14, #:dtprel_g0:var // CHECK: movz x11, #:dtprel_g0:var // encoding: [0x0b'A',A,0x80'A',0x92'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g0:var, kind: fixup_a64_movw_dtprel_g0 -// CHECK-NEXT: movn x12, #:dtprel_g0:var // encoding: [0x0c'A',A,0x80'A',0x92'A'] +// CHECK: movn x12, #:dtprel_g0:var // encoding: [0x0c'A',A,0x80'A',0x92'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g0:var, kind: fixup_a64_movw_dtprel_g0 -// CHECK-NEXT: movz w13, #:dtprel_g0:var // encoding: [0x0d'A',A,0x80'A',0x12'A'] +// CHECK: movz w13, #:dtprel_g0:var // encoding: [0x0d'A',A,0x80'A',0x12'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g0:var, kind: fixup_a64_movw_dtprel_g0 -// CHECK-NEXT: movn w14, #:dtprel_g0:var // encoding: [0x0e'A',A,0x80'A',0x12'A'] - - -// CHECK-ELF: # Relocation 10 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000028) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000020e) -// CHECK-ELF: # Relocation 11 -// CHECK-ELF-NEXT: (('r_offset', 0x000000000000002c) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000020e) -// CHECK-ELF: # Relocation 12 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000030) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000020e) -// CHECK-ELF: # Relocation 13 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000034) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000020e) - -// CHECK-ELF-NAMES: 40 R_AARCH64_TLSLD_MOVW_DTPREL_G0 -// CHECK-ELF-NAMES: 44 R_AARCH64_TLSLD_MOVW_DTPREL_G0 -// CHECK-ELF-NAMES: 48 R_AARCH64_TLSLD_MOVW_DTPREL_G0 -// CHECK-ELF-NAMES: 52 R_AARCH64_TLSLD_MOVW_DTPREL_G0 +// CHECK: movn w14, #:dtprel_g0:var // encoding: [0x0e'A',A,0x80'A',0x12'A'] + +// CHECK-ELF-NEXT: 0x28 R_AARCH64_TLSLD_MOVW_DTPREL_G0 [[VARSYM]] +// CHECK-ELF-NEXT: 0x2C R_AARCH64_TLSLD_MOVW_DTPREL_G0 [[VARSYM]] +// CHECK-ELF-NEXT: 0x30 R_AARCH64_TLSLD_MOVW_DTPREL_G0 [[VARSYM]] +// CHECK-ELF-NEXT: 0x34 R_AARCH64_TLSLD_MOVW_DTPREL_G0 [[VARSYM]] movk x15, #:dtprel_g0_nc:var movk w16, #:dtprel_g0_nc:var // CHECK: movk x15, #:dtprel_g0_nc:var // encoding: [0x0f'A',A,0x80'A',0xf2'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g0_nc:var, kind: fixup_a64_movw_dtprel_g0_nc -// CHECK-NEXT: movk w16, #:dtprel_g0_nc:var // encoding: [0x10'A',A,0x80'A',0x72'A'] +// CHECK: movk w16, #:dtprel_g0_nc:var // encoding: [0x10'A',A,0x80'A',0x72'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_g0_nc:var, kind: fixup_a64_movw_dtprel_g0_nc -// CHECK-ELF: # Relocation 14 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000038) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000020f) -// CHECK-ELF: # Relocation 15 -// CHECK-ELF-NEXT: (('r_offset', 0x000000000000003c) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000020f) +// CHECK-ELF-NEXT: 0x38 R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC [[VARSYM]] +// CHECK-ELF-NEXT: 0x3C R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC [[VARSYM]] -// CHECK-ELF-NAMES: 56 R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC -// CHECK-ELF-NAMES: 60 R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC add x17, x18, #:dtprel_hi12:var, lsl #12 add w19, w20, #:dtprel_hi12:var, lsl #12 // CHECK: add x17, x18, #:dtprel_hi12:var, lsl #12 // encoding: [0x51'A',0x02'A',0x40'A',0x91'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_hi12:var, kind: fixup_a64_add_dtprel_hi12 -// CHECK-NEXT: add w19, w20, #:dtprel_hi12:var, lsl #12 // encoding: [0x93'A',0x02'A',0x40'A',0x11'A'] +// CHECK: add w19, w20, #:dtprel_hi12:var, lsl #12 // encoding: [0x93'A',0x02'A',0x40'A',0x11'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_hi12:var, kind: fixup_a64_add_dtprel_hi12 -// CHECK-ELF: # Relocation 16 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000040) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000210) -// CHECK-ELF: # Relocation 17 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000044) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000210) - -// CHECK-ELF-NAMES: 64 R_AARCH64_TLSLD_ADD_DTPREL_HI12 -// CHECK-ELF-NAMES: 68 R_AARCH64_TLSLD_ADD_DTPREL_HI12 +// CHECK-ELF-NEXT: 0x40 R_AARCH64_TLSLD_ADD_DTPREL_HI12 [[VARSYM]] +// CHECK-ELF-NEXT: 0x44 R_AARCH64_TLSLD_ADD_DTPREL_HI12 [[VARSYM]] add x21, x22, #:dtprel_lo12:var add w23, w24, #:dtprel_lo12:var // CHECK: add x21, x22, #:dtprel_lo12:var // encoding: [0xd5'A',0x02'A',A,0x91'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_lo12:var, kind: fixup_a64_add_dtprel_lo12 -// CHECK-NEXT: add w23, w24, #:dtprel_lo12:var // encoding: [0x17'A',0x03'A',A,0x11'A'] +// CHECK: add w23, w24, #:dtprel_lo12:var // encoding: [0x17'A',0x03'A',A,0x11'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_lo12:var, kind: fixup_a64_add_dtprel_lo12 -// CHECK-ELF: # Relocation 18 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000048) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000211) -// CHECK-ELF: # Relocation 19 -// CHECK-ELF-NEXT: (('r_offset', 0x000000000000004c) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000211) +// CHECK-ELF-NEXT: 0x48 R_AARCH64_TLSLD_ADD_DTPREL_LO12 [[VARSYM]] +// CHECK-ELF-NEXT: 0x4C R_AARCH64_TLSLD_ADD_DTPREL_LO12 [[VARSYM]] -// CHECK-ELF-NAMES: 72 R_AARCH64_TLSLD_ADD_DTPREL_LO12 -// CHECK-ELF-NAMES: 76 R_AARCH64_TLSLD_ADD_DTPREL_LO12 add x25, x26, #:dtprel_lo12_nc:var add w27, w28, #:dtprel_lo12_nc:var // CHECK: add x25, x26, #:dtprel_lo12_nc:var // encoding: [0x59'A',0x03'A',A,0x91'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_lo12_nc:var, kind: fixup_a64_add_dtprel_lo12_nc -// CHECK-NEXT: add w27, w28, #:dtprel_lo12_nc:var // encoding: [0x9b'A',0x03'A',A,0x11'A'] +// CHECK: add w27, w28, #:dtprel_lo12_nc:var // encoding: [0x9b'A',0x03'A',A,0x11'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_lo12_nc:var, kind: fixup_a64_add_dtprel_lo12_nc -// CHECK-ELF: # Relocation 20 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000050) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000212) -// CHECK-ELF: # Relocation 21 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000054) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000212) +// CHECK-ELF-NEXT: 0x50 R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC [[VARSYM]] +// CHECK-ELF-NEXT: 0x54 R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC [[VARSYM]] -// CHECK-ELF-NAMES: 80 R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC -// CHECK-ELF-NAMES: 84 R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC ldrb w29, [x30, #:dtprel_lo12:var] ldrsb x29, [x28, #:dtprel_lo12_nc:var] // CHECK: ldrb w29, [x30, #:dtprel_lo12:var] // encoding: [0xdd'A',0x03'A',0x40'A',0x39'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_lo12:var, kind: fixup_a64_ldst8_dtprel_lo12 -// CHECK-NEXT: ldrsb x29, [x28, #:dtprel_lo12_nc:var] // encoding: [0x9d'A',0x03'A',0x80'A',0x39'A'] +// CHECK: ldrsb x29, [x28, #:dtprel_lo12_nc:var] // encoding: [0x9d'A',0x03'A',0x80'A',0x39'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_lo12_nc:var, kind: fixup_a64_ldst8_dtprel_lo12_nc -// CHECK-ELF: # Relocation 22 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000058) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000213) -// CHECK-ELF: # Relocation 23 -// CHECK-ELF-NEXT: (('r_offset', 0x000000000000005c) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000214) +// CHECK-ELF-NEXT: 0x58 R_AARCH64_TLSLD_LDST8_DTPREL_LO12 [[VARSYM]] +// CHECK-ELF-NEXT: 0x5C R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC [[VARSYM]] -// CHECK-ELF-NAMES: 88 R_AARCH64_TLSLD_LDST8_DTPREL_LO12 -// CHECK-ELF-NAMES: 92 R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC strh w27, [x26, #:dtprel_lo12:var] ldrsh x25, [x24, #:dtprel_lo12_nc:var] // CHECK: strh w27, [x26, #:dtprel_lo12:var] // encoding: [0x5b'A',0x03'A',A,0x79'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_lo12:var, kind: fixup_a64_ldst16_dtprel_lo12 -// CHECK-NEXT: ldrsh x25, [x24, #:dtprel_lo12_nc:var] // encoding: [0x19'A',0x03'A',0x80'A',0x79'A'] +// CHECK: ldrsh x25, [x24, #:dtprel_lo12_nc:var] // encoding: [0x19'A',0x03'A',0x80'A',0x79'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_lo12_nc:var, kind: fixup_a64_ldst16_dtprel_lo12_n -// CHECK-ELF: # Relocation 24 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000060) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000215) -// CHECK-ELF: # Relocation 25 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000064) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000216) +// CHECK-ELF-NEXT: 0x60 R_AARCH64_TLSLD_LDST16_DTPREL_LO12 [[VARSYM]] +// CHECK-ELF-NEXT: 0x64 R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC [[VARSYM]] -// CHECK-ELF-NAMES: 96 R_AARCH64_TLSLD_LDST16_DTPREL_LO12 -// CHECK-ELF-NAMES: 100 R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC ldr w23, [x22, #:dtprel_lo12:var] ldrsw x21, [x20, #:dtprel_lo12_nc:var] // CHECK: ldr w23, [x22, #:dtprel_lo12:var] // encoding: [0xd7'A',0x02'A',0x40'A',0xb9'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_lo12:var, kind: fixup_a64_ldst32_dtprel_lo12 -// CHECK-NEXT: ldrsw x21, [x20, #:dtprel_lo12_nc:var] // encoding: [0x95'A',0x02'A',0x80'A',0xb9'A'] +// CHECK: ldrsw x21, [x20, #:dtprel_lo12_nc:var] // encoding: [0x95'A',0x02'A',0x80'A',0xb9'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_lo12_nc:var, kind: fixup_a64_ldst32_dtprel_lo12_n -// CHECK-ELF: # Relocation 26 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000068) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000217) -// CHECK-ELF: # Relocation 27 -// CHECK-ELF-NEXT: (('r_offset', 0x000000000000006c) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000218) +// CHECK-ELF-NEXT: 0x68 R_AARCH64_TLSLD_LDST32_DTPREL_LO12 [[VARSYM]] +// CHECK-ELF-NEXT: 0x6C R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC [[VARSYM]] -// CHECK-ELF-NAMES: 104 R_AARCH64_TLSLD_LDST32_DTPREL_LO12 -// CHECK-ELF-NAMES: 108 R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC ldr x19, [x18, #:dtprel_lo12:var] str x17, [x16, #:dtprel_lo12_nc:var] // CHECK: ldr x19, [x18, #:dtprel_lo12:var] // encoding: [0x53'A',0x02'A',0x40'A',0xf9'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_lo12:var, kind: fixup_a64_ldst64_dtprel_lo12 -// CHECK-NEXT: str x17, [x16, #:dtprel_lo12_nc:var] // encoding: [0x11'A',0x02'A',A,0xf9'A'] +// CHECK: str x17, [x16, #:dtprel_lo12_nc:var] // encoding: [0x11'A',0x02'A',A,0xf9'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :dtprel_lo12_nc:var, kind: fixup_a64_ldst64_dtprel_lo12_nc -// CHECK-ELF: # Relocation 28 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000070) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000219) -// CHECK-ELF: # Relocation 29 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000074) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000021a) +// CHECK-ELF-NEXT: 0x70 R_AARCH64_TLSLD_LDST64_DTPREL_LO12 [[VARSYM]] +// CHECK-ELF-NEXT: 0x74 R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC [[VARSYM]] -// CHECK-ELF-NAMES: 112 R_AARCH64_TLSLD_LDST64_DTPREL_LO12 -// CHECK-ELF-NAMES: 116 R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC // TLS initial-exec forms movz x15, #:gottprel_g1:var movz w14, #:gottprel_g1:var // CHECK: movz x15, #:gottprel_g1:var // encoding: [0x0f'A',A,0xa0'A',0x92'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :gottprel_g1:var, kind: fixup_a64_movw_gottprel_g1 -// CHECK-NEXT: movz w14, #:gottprel_g1:var // encoding: [0x0e'A',A,0xa0'A',0x12'A'] +// CHECK: movz w14, #:gottprel_g1:var // encoding: [0x0e'A',A,0xa0'A',0x12'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :gottprel_g1:var, kind: fixup_a64_movw_gottprel_g1 -// CHECK-ELF: # Relocation 30 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000078) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000021b) -// CHECK-ELF: # Relocation 31 -// CHECK-ELF-NEXT: (('r_offset', 0x000000000000007c) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000021b) +// CHECK-ELF-NEXT: 0x78 R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 [[VARSYM]] +// CHECK-ELF-NEXT: 0x7C R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 [[VARSYM]] -// CHECK-ELF-NAMES: 120 R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 -// CHECK-ELF-NAMES: 124 R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 movk x13, #:gottprel_g0_nc:var movk w12, #:gottprel_g0_nc:var // CHECK: movk x13, #:gottprel_g0_nc:var // encoding: [0x0d'A',A,0x80'A',0xf2'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :gottprel_g0_nc:var, kind: fixup_a64_movw_gottprel_g0_nc -// CHECK-NEXT: movk w12, #:gottprel_g0_nc:var // encoding: [0x0c'A',A,0x80'A',0x72'A'] +// CHECK: movk w12, #:gottprel_g0_nc:var // encoding: [0x0c'A',A,0x80'A',0x72'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :gottprel_g0_nc:var, kind: fixup_a64_movw_gottprel_g0_nc -// CHECK-ELF: # Relocation 32 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000080) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000021c) -// CHECK-ELF: # Relocation 33 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000084) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000021c) +// CHECK-ELF-NEXT: 0x80 R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC [[VARSYM]] +// CHECK-ELF-NEXT: 0x84 R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC [[VARSYM]] -// CHECK-ELF-NAMES: 128 R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC -// CHECK-ELF-NAMES: 132 R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC adrp x11, :gottprel:var ldr x10, [x0, #:gottprel_lo12:var] ldr x9, :gottprel:var // CHECK: adrp x11, :gottprel:var // encoding: [0x0b'A',A,A,0x90'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :gottprel:var, kind: fixup_a64_adr_gottprel_page -// CHECK-NEXT: ldr x10, [x0, #:gottprel_lo12:var] // encoding: [0x0a'A',A,0x40'A',0xf9'A'] +// CHECK: ldr x10, [x0, #:gottprel_lo12:var] // encoding: [0x0a'A',A,0x40'A',0xf9'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :gottprel_lo12:var, kind: fixup_a64_ld64_gottprel_lo12_nc -// CHECK-NEXT: ldr x9, :gottprel:var // encoding: [0x09'A',A,A,0x58'A'] +// CHECK: ldr x9, :gottprel:var // encoding: [0x09'A',A,A,0x58'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :gottprel:var, kind: fixup_a64_ld_gottprel_prel19 -// CHECK-ELF: # Relocation 34 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000088) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000021d) -// CHECK-ELF: # Relocation 35 -// CHECK-ELF-NEXT: (('r_offset', 0x000000000000008c) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000021e) -// CHECK-ELF: # Relocation 36 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000090) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000021f) - -// CHECK-ELF-NAMES: 136 R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE -// CHECK-ELF-NAMES: 140 R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC -// CHECK-ELF-NAMES: 144 R_AARCH64_TLSIE_LD_GOTTPREL_PREL19 +// CHECK-ELF-NEXT: 0x88 R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 [[VARSYM]] +// CHECK-ELF-NEXT: 0x8C R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC [[VARSYM]] +// CHECK-ELF-NEXT: 0x90 R_AARCH64_TLSIE_LD_GOTTPREL_PREL19 [[VARSYM]] + // TLS local-exec forms movz x3, #:tprel_g2:var movn x4, #:tprel_g2:var // CHECK: movz x3, #:tprel_g2:var // encoding: [0x03'A',A,0xc0'A',0x92'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g2:var, kind: fixup_a64_movw_tprel_g2 -// CHECK-NEXT: movn x4, #:tprel_g2:var // encoding: [0x04'A',A,0xc0'A',0x92'A'] +// CHECK: movn x4, #:tprel_g2:var // encoding: [0x04'A',A,0xc0'A',0x92'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g2:var, kind: fixup_a64_movw_tprel_g2 -// CHECK-ELF: # Relocation 37 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000094) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000220) -// CHECK-ELF: # Relocation 38 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000098) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000220) +// CHECK-ELF-NEXT: 0x94 R_AARCH64_TLSLE_MOVW_TPREL_G2 [[VARSYM]] +// CHECK-ELF-NEXT: 0x98 R_AARCH64_TLSLE_MOVW_TPREL_G2 [[VARSYM]] -// CHECK-ELF-NAMES: 148 R_AARCH64_TLSLE_MOVW_TPREL_G2 -// CHECK-ELF-NAMES: 152 R_AARCH64_TLSLE_MOVW_TPREL_G2 movz x5, #:tprel_g1:var movn x6, #:tprel_g1:var @@ -377,53 +217,29 @@ movn w8, #:tprel_g1:var // CHECK: movz x5, #:tprel_g1:var // encoding: [0x05'A',A,0xa0'A',0x92'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g1:var, kind: fixup_a64_movw_tprel_g1 -// CHECK-NEXT: movn x6, #:tprel_g1:var // encoding: [0x06'A',A,0xa0'A',0x92'A'] +// CHECK: movn x6, #:tprel_g1:var // encoding: [0x06'A',A,0xa0'A',0x92'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g1:var, kind: fixup_a64_movw_tprel_g1 -// CHECK-NEXT: movz w7, #:tprel_g1:var // encoding: [0x07'A',A,0xa0'A',0x12'A'] +// CHECK: movz w7, #:tprel_g1:var // encoding: [0x07'A',A,0xa0'A',0x12'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g1:var, kind: fixup_a64_movw_tprel_g1 -// CHECK-NEXT: movn w8, #:tprel_g1:var // encoding: [0x08'A',A,0xa0'A',0x12'A'] +// CHECK: movn w8, #:tprel_g1:var // encoding: [0x08'A',A,0xa0'A',0x12'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g1:var, kind: fixup_a64_movw_tprel_g1 -// CHECK-ELF: # Relocation 39 -// CHECK-ELF-NEXT: (('r_offset', 0x000000000000009c) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000221) -// CHECK-ELF: # Relocation 40 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000a0) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000221) -// CHECK-ELF: # Relocation 41 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000a4) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000221) -// CHECK-ELF: # Relocation 42 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000a8) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000221) - -// CHECK-ELF-NAMES: 156 R_AARCH64_TLSLE_MOVW_TPREL_G1 -// CHECK-ELF-NAMES: 160 R_AARCH64_TLSLE_MOVW_TPREL_G1 -// CHECK-ELF-NAMES: 164 R_AARCH64_TLSLE_MOVW_TPREL_G1 -// CHECK-ELF-NAMES: 168 R_AARCH64_TLSLE_MOVW_TPREL_G1 +// CHECK-ELF-NEXT: 0x9C R_AARCH64_TLSLE_MOVW_TPREL_G1 [[VARSYM]] +// CHECK-ELF-NEXT: 0xA0 R_AARCH64_TLSLE_MOVW_TPREL_G1 [[VARSYM]] +// CHECK-ELF-NEXT: 0xA4 R_AARCH64_TLSLE_MOVW_TPREL_G1 [[VARSYM]] +// CHECK-ELF-NEXT: 0xA8 R_AARCH64_TLSLE_MOVW_TPREL_G1 [[VARSYM]] + movk x9, #:tprel_g1_nc:var movk w10, #:tprel_g1_nc:var // CHECK: movk x9, #:tprel_g1_nc:var // encoding: [0x09'A',A,0xa0'A',0xf2'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g1_nc:var, kind: fixup_a64_movw_tprel_g1_nc -// CHECK-NEXT: movk w10, #:tprel_g1_nc:var // encoding: [0x0a'A',A,0xa0'A',0x72'A'] +// CHECK: movk w10, #:tprel_g1_nc:var // encoding: [0x0a'A',A,0xa0'A',0x72'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g1_nc:var, kind: fixup_a64_movw_tprel_g1_nc -// CHECK-ELF: # Relocation 43 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000ac) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000222) -// CHECK-ELF: # Relocation 44 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000b0) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000222) +// CHECK-ELF-NEXT: 0xAC R_AARCH64_TLSLE_MOVW_TPREL_G1_NC [[VARSYM]] +// CHECK-ELF-NEXT: 0xB0 R_AARCH64_TLSLE_MOVW_TPREL_G1_NC [[VARSYM]] -// CHECK-ELF-NAMES: 172 R_AARCH64_TLSLE_MOVW_TPREL_G1_NC -// CHECK-ELF-NAMES: 176 R_AARCH64_TLSLE_MOVW_TPREL_G1_NC movz x11, #:tprel_g0:var movn x12, #:tprel_g0:var @@ -431,187 +247,104 @@ movn w14, #:tprel_g0:var // CHECK: movz x11, #:tprel_g0:var // encoding: [0x0b'A',A,0x80'A',0x92'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g0:var, kind: fixup_a64_movw_tprel_g0 -// CHECK-NEXT: movn x12, #:tprel_g0:var // encoding: [0x0c'A',A,0x80'A',0x92'A'] +// CHECK: movn x12, #:tprel_g0:var // encoding: [0x0c'A',A,0x80'A',0x92'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g0:var, kind: fixup_a64_movw_tprel_g0 -// CHECK-NEXT: movz w13, #:tprel_g0:var // encoding: [0x0d'A',A,0x80'A',0x12'A'] +// CHECK: movz w13, #:tprel_g0:var // encoding: [0x0d'A',A,0x80'A',0x12'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g0:var, kind: fixup_a64_movw_tprel_g0 -// CHECK-NEXT: movn w14, #:tprel_g0:var // encoding: [0x0e'A',A,0x80'A',0x12'A'] +// CHECK: movn w14, #:tprel_g0:var // encoding: [0x0e'A',A,0x80'A',0x12'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g0:var, kind: fixup_a64_movw_tprel_g0 -// CHECK-ELF: # Relocation 45 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000b4) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000223) -// CHECK-ELF: # Relocation 46 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000b8) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000223) -// CHECK-ELF: # Relocation 47 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000bc) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000223) -// CHECK-ELF: # Relocation 48 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000c0) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000223) - -// CHECK-ELF-NAMES: 180 R_AARCH64_TLSLE_MOVW_TPREL_G0 -// CHECK-ELF-NAMES: 184 R_AARCH64_TLSLE_MOVW_TPREL_G0 -// CHECK-ELF-NAMES: 188 R_AARCH64_TLSLE_MOVW_TPREL_G0 -// CHECK-ELF-NAMES: 192 R_AARCH64_TLSLE_MOVW_TPREL_G0 +// CHECK-ELF-NEXT: 0xB4 R_AARCH64_TLSLE_MOVW_TPREL_G0 [[VARSYM]] +// CHECK-ELF-NEXT: 0xB8 R_AARCH64_TLSLE_MOVW_TPREL_G0 [[VARSYM]] +// CHECK-ELF-NEXT: 0xBC R_AARCH64_TLSLE_MOVW_TPREL_G0 [[VARSYM]] +// CHECK-ELF-NEXT: 0xC0 R_AARCH64_TLSLE_MOVW_TPREL_G0 [[VARSYM]] + movk x15, #:tprel_g0_nc:var movk w16, #:tprel_g0_nc:var // CHECK: movk x15, #:tprel_g0_nc:var // encoding: [0x0f'A',A,0x80'A',0xf2'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g0_nc:var, kind: fixup_a64_movw_tprel_g0_nc -// CHECK-NEXT: movk w16, #:tprel_g0_nc:var // encoding: [0x10'A',A,0x80'A',0x72'A'] +// CHECK: movk w16, #:tprel_g0_nc:var // encoding: [0x10'A',A,0x80'A',0x72'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_g0_nc:var, kind: fixup_a64_movw_tprel_g0_nc -// CHECK-ELF: # Relocation 49 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000c4) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000224) -// CHECK-ELF: # Relocation 50 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000c8) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000224) +// CHECK-ELF-NEXT: 0xC4 R_AARCH64_TLSLE_MOVW_TPREL_G0_NC [[VARSYM]] +// CHECK-ELF-NEXT: 0xC8 R_AARCH64_TLSLE_MOVW_TPREL_G0_NC [[VARSYM]] -// CHECK-ELF-NAMES: 196 R_AARCH64_TLSLE_MOVW_TPREL_G0_NC -// CHECK-ELF-NAMES: 200 R_AARCH64_TLSLE_MOVW_TPREL_G0_NC add x17, x18, #:tprel_hi12:var, lsl #12 add w19, w20, #:tprel_hi12:var, lsl #12 // CHECK: add x17, x18, #:tprel_hi12:var, lsl #12 // encoding: [0x51'A',0x02'A',0x40'A',0x91'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_hi12:var, kind: fixup_a64_add_tprel_hi12 -// CHECK-NEXT: add w19, w20, #:tprel_hi12:var, lsl #12 // encoding: [0x93'A',0x02'A',0x40'A',0x11'A'] +// CHECK: add w19, w20, #:tprel_hi12:var, lsl #12 // encoding: [0x93'A',0x02'A',0x40'A',0x11'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_hi12:var, kind: fixup_a64_add_tprel_hi12 -// CHECK-ELF: # Relocation 51 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000cc) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000225) -// CHECK-ELF: # Relocation 52 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000d0) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000225) +// CHECK-ELF-NEXT: 0xCC R_AARCH64_TLSLE_ADD_TPREL_HI12 [[VARSYM]] +// CHECK-ELF-NEXT: 0xD0 R_AARCH64_TLSLE_ADD_TPREL_HI12 [[VARSYM]] -// CHECK-ELF-NAMES: 204 R_AARCH64_TLSLE_ADD_TPREL_HI12 -// CHECK-ELF-NAMES: 208 R_AARCH64_TLSLE_ADD_TPREL_HI12 add x21, x22, #:tprel_lo12:var add w23, w24, #:tprel_lo12:var // CHECK: add x21, x22, #:tprel_lo12:var // encoding: [0xd5'A',0x02'A',A,0x91'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_lo12:var, kind: fixup_a64_add_tprel_lo12 -// CHECK-NEXT: add w23, w24, #:tprel_lo12:var // encoding: [0x17'A',0x03'A',A,0x11'A'] +// CHECK: add w23, w24, #:tprel_lo12:var // encoding: [0x17'A',0x03'A',A,0x11'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_lo12:var, kind: fixup_a64_add_tprel_lo12 -// CHECK-ELF: # Relocation 53 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000d4) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000226) -// CHECK-ELF: # Relocation 54 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000d8) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000226) +// CHECK-ELF-NEXT: 0xD4 R_AARCH64_TLSLE_ADD_TPREL_LO12 [[VARSYM]] +// CHECK-ELF-NEXT: 0xD8 R_AARCH64_TLSLE_ADD_TPREL_LO12 [[VARSYM]] -// CHECK-ELF-NAMES: 212 R_AARCH64_TLSLE_ADD_TPREL_LO12 -// CHECK-ELF-NAMES: 216 R_AARCH64_TLSLE_ADD_TPREL_LO12 add x25, x26, #:tprel_lo12_nc:var add w27, w28, #:tprel_lo12_nc:var // CHECK: add x25, x26, #:tprel_lo12_nc:var // encoding: [0x59'A',0x03'A',A,0x91'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_lo12_nc:var, kind: fixup_a64_add_tprel_lo12_nc -// CHECK-NEXT: add w27, w28, #:tprel_lo12_nc:var // encoding: [0x9b'A',0x03'A',A,0x11'A'] +// CHECK: add w27, w28, #:tprel_lo12_nc:var // encoding: [0x9b'A',0x03'A',A,0x11'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_lo12_nc:var, kind: fixup_a64_add_tprel_lo12_nc -// CHECK-ELF: # Relocation 55 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000dc) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000227) -// CHECK-ELF: # Relocation 56 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000e0) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000227) - +// CHECK-ELF-NEXT: 0xDC R_AARCH64_TLSLE_ADD_TPREL_LO12_NC [[VARSYM]] +// CHECK-ELF-NEXT: 0xE0 R_AARCH64_TLSLE_ADD_TPREL_LO12_NC [[VARSYM]] -// CHECK-ELF-NAMES: 220 R_AARCH64_TLSLE_ADD_TPREL_LO12_NC -// CHECK-ELF-NAMES: 224 R_AARCH64_TLSLE_ADD_TPREL_LO12_NC ldrb w29, [x30, #:tprel_lo12:var] ldrsb x29, [x28, #:tprel_lo12_nc:var] // CHECK: ldrb w29, [x30, #:tprel_lo12:var] // encoding: [0xdd'A',0x03'A',0x40'A',0x39'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_lo12:var, kind: fixup_a64_ldst8_tprel_lo12 -// CHECK-NEXT: ldrsb x29, [x28, #:tprel_lo12_nc:var] // encoding: [0x9d'A',0x03'A',0x80'A',0x39'A'] +// CHECK: ldrsb x29, [x28, #:tprel_lo12_nc:var] // encoding: [0x9d'A',0x03'A',0x80'A',0x39'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_lo12_nc:var, kind: fixup_a64_ldst8_tprel_lo12_nc -// CHECK-ELF: # Relocation 57 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000e4) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000228) -// CHECK-ELF: # Relocation 58 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000e8) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000229) +// CHECK-ELF-NEXT: 0xE4 R_AARCH64_TLSLE_LDST8_TPREL_LO12 [[VARSYM]] +// CHECK-ELF-NEXT: 0xE8 R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC [[VARSYM]] -// CHECK-ELF-NAMES: 228 R_AARCH64_TLSLE_LDST8_TPREL_LO12 -// CHECK-ELF-NAMES: 232 R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC strh w27, [x26, #:tprel_lo12:var] ldrsh x25, [x24, #:tprel_lo12_nc:var] // CHECK: strh w27, [x26, #:tprel_lo12:var] // encoding: [0x5b'A',0x03'A',A,0x79'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_lo12:var, kind: fixup_a64_ldst16_tprel_lo12 -// CHECK-NEXT: ldrsh x25, [x24, #:tprel_lo12_nc:var] // encoding: [0x19'A',0x03'A',0x80'A',0x79'A'] +// CHECK: ldrsh x25, [x24, #:tprel_lo12_nc:var] // encoding: [0x19'A',0x03'A',0x80'A',0x79'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_lo12_nc:var, kind: fixup_a64_ldst16_tprel_lo12_n -// CHECK-ELF: # Relocation 59 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000ec) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000022a) -// CHECK-ELF: # Relocation 60 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000f0) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000022b) +// CHECK-ELF-NEXT: 0xEC R_AARCH64_TLSLE_LDST16_TPREL_LO12 [[VARSYM]] +// CHECK-ELF-NEXT: 0xF0 R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC [[VARSYM]] -// CHECK-ELF-NAMES: 236 R_AARCH64_TLSLE_LDST16_TPREL_LO12 -// CHECK-ELF-NAMES: 240 R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC ldr w23, [x22, #:tprel_lo12:var] ldrsw x21, [x20, #:tprel_lo12_nc:var] // CHECK: ldr w23, [x22, #:tprel_lo12:var] // encoding: [0xd7'A',0x02'A',0x40'A',0xb9'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_lo12:var, kind: fixup_a64_ldst32_tprel_lo12 -// CHECK-NEXT: ldrsw x21, [x20, #:tprel_lo12_nc:var] // encoding: [0x95'A',0x02'A',0x80'A',0xb9'A'] +// CHECK: ldrsw x21, [x20, #:tprel_lo12_nc:var] // encoding: [0x95'A',0x02'A',0x80'A',0xb9'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_lo12_nc:var, kind: fixup_a64_ldst32_tprel_lo12_n -// CHECK-ELF: # Relocation 61 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000f4) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000022c) -// CHECK-ELF: # Relocation 62 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000f8) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000022d) - -// CHECK-ELF-NAMES: 244 R_AARCH64_TLSLE_LDST32_TPREL_LO12 -// CHECK-ELF-NAMES: 248 R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC +// CHECK-ELF-NEXT: 0xF4 R_AARCH64_TLSLE_LDST32_TPREL_LO12 [[VARSYM]] +// CHECK-ELF-NEXT: 0xF8 R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC [[VARSYM]] ldr x19, [x18, #:tprel_lo12:var] str x17, [x16, #:tprel_lo12_nc:var] // CHECK: ldr x19, [x18, #:tprel_lo12:var] // encoding: [0x53'A',0x02'A',0x40'A',0xf9'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_lo12:var, kind: fixup_a64_ldst64_tprel_lo12 -// CHECK-NEXT: str x17, [x16, #:tprel_lo12_nc:var] // encoding: [0x11'A',0x02'A',A,0xf9'A'] +// CHECK: str x17, [x16, #:tprel_lo12_nc:var] // encoding: [0x11'A',0x02'A',A,0xf9'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tprel_lo12_nc:var, kind: fixup_a64_ldst64_tprel_lo12_nc -// CHECK-ELF: # Relocation 63 -// CHECK-ELF-NEXT: (('r_offset', 0x00000000000000fc) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000022e) -// CHECK-ELF: # Relocation 64 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000100) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x0000022f) - -// CHECK-ELF-NAMES: 252 R_AARCH64_TLSLE_LDST64_TPREL_LO12 -// CHECK-ELF-NAMES: 256 R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC +// CHECK-ELF-NEXT: 0xFC R_AARCH64_TLSLE_LDST64_TPREL_LO12 [[VARSYM]] +// CHECK-ELF-NEXT: 0x100 R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC [[VARSYM]] // TLS descriptor forms adrp x8, :tlsdesc:var @@ -622,41 +355,27 @@ // CHECK: adrp x8, :tlsdesc:var // encoding: [0x08'A',A,A,0x90'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tlsdesc:var, kind: fixup_a64_tlsdesc_adr_page -// CHECK-NEXT: ldr x7, [x6, #:tlsdesc_lo12:var] // encoding: [0xc7'A',A,0x40'A',0xf9'A'] +// CHECK: ldr x7, [x6, #:tlsdesc_lo12:var] // encoding: [0xc7'A',A,0x40'A',0xf9'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tlsdesc_lo12:var, kind: fixup_a64_tlsdesc_ld64_lo12_nc -// CHECK-NEXT: add x5, x4, #:tlsdesc_lo12:var // encoding: [0x85'A',A,A,0x91'A'] +// CHECK: add x5, x4, #:tlsdesc_lo12:var // encoding: [0x85'A',A,A,0x91'A'] // CHECK-NEXT: // fixup A - offset: 0, value: :tlsdesc_lo12:var, kind: fixup_a64_tlsdesc_add_lo12_nc -// CHECK-NEXT: .tlsdesccall var // encoding: [] +// CHECK: .tlsdesccall var // encoding: [] // CHECK-NEXT: // fixup A - offset: 0, value: :tlsdesc:var, kind: fixup_a64_tlsdesc_call // CHECK: blr x3 // encoding: [0x60,0x00,0x3f,0xd6] -// CHECK-ELF: # Relocation 65 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000104) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000232) -// CHECK-ELF: # Relocation 66 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000108) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000233) -// CHECK-ELF: # Relocation 67 -// CHECK-ELF-NEXT: (('r_offset', 0x000000000000010c) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000234) -// CHECK-ELF: # Relocation 68 -// CHECK-ELF-NEXT: (('r_offset', 0x0000000000000110) -// CHECK-ELF-NEXT: ('r_sym', [[VARSYM]]) -// CHECK-ELF-NEXT: ('r_type', 0x00000239) - -// CHECK-ELF-NAMES: 260 R_AARCH64_TLSDESC_ADR_PAGE -// CHECK-ELF-NAMES: 264 R_AARCH64_TLSDESC_LD64_LO12_NC -// CHECK-ELF-NAMES: 268 R_AARCH64_TLSDESC_ADD_LO12_NC -// CHECK-ELF-NAMES: 272 R_AARCH64_TLSDESC_CALL +// CHECK-ELF-NEXT: 0x104 R_AARCH64_TLSDESC_ADR_PAGE [[VARSYM]] +// CHECK-ELF-NEXT: 0x108 R_AARCH64_TLSDESC_LD64_LO12_NC [[VARSYM]] +// CHECK-ELF-NEXT: 0x10C R_AARCH64_TLSDESC_ADD_LO12_NC [[VARSYM]] +// CHECK-ELF-NEXT: 0x110 R_AARCH64_TLSDESC_CALL [[VARSYM]] // Make sure symbol 5 has type STT_TLS: -// CHECK-ELF: # Symbol 5 -// CHECK-ELF-NEXT: (('st_name', 0x00000006) # 'var' -// CHECK-ELF-NEXT: ('st_bind', 0x1) -// CHECK-ELF-NEXT: ('st_type', 0x6) +// CHECK-ELF: Symbols [ +// CHECK-ELF: Symbol { +// CHECK-ELF: Name: var (6) +// CHECK-ELF-NEXT: Value: +// CHECK-ELF-NEXT: Size: +// CHECK-ELF-NEXT: Binding: Global +// CHECK-ELF-NEXT: Type: TLS diff --git a/test/MC/AArch64/trace-regs-diagnostics.s b/test/MC/AArch64/trace-regs-diagnostics.s new file mode 100644 index 0000000..82ec7c0 --- /dev/null +++ b/test/MC/AArch64/trace-regs-diagnostics.s @@ -0,0 +1,156 @@ +// RUN: llvm-mc -triple aarch64-none-linux-gnu < %s 2>&1 | FileCheck %s + // Write-only + mrs x12, trcoslar + mrs x10, trclar +// CHECK: error: expected readable system register +// CHECK-NEXT: mrs x12, trcoslar +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected readable system register +// CHECK-NEXT: mrs x10, trclar +// CHECK-NEXT: ^ + + // Read-only + msr trcstatr, x0 + msr trcidr8, x13 + msr trcidr9, x25 + msr trcidr10, x2 + msr trcidr11, x19 + msr trcidr12, x15 + msr trcidr13, x24 + msr trcidr0, x20 + msr trcidr1, x5 + msr trcidr2, x18 + msr trcidr3, x10 + msr trcidr4, x1 + msr trcidr5, x10 + msr trcidr6, x4 + msr trcidr7, x0 + msr trcoslsr, x23 + msr trcpdsr, x21 + msr trcdevaff0, x4 + msr trcdevaff1, x17 + msr trclsr, x18 + msr trcauthstatus, x10 + msr trcdevarch, x8 + msr trcdevid, x11 + msr trcdevtype, x1 + msr trcpidr4, x2 + msr trcpidr5, x7 + msr trcpidr6, x17 + msr trcpidr7, x5 + msr trcpidr0, x0 + msr trcpidr1, x16 + msr trcpidr2, x29 + msr trcpidr3, x1 + msr trccidr0, x27 + msr trccidr1, x1 + msr trccidr2, x24 + msr trccidr3, x8 +// CHECK: error: expected writable system register or pstate +// CHECK-NEXT: msr trcstatr, x0 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcidr8, x13 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcidr9, x25 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcidr10, x2 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcidr11, x19 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcidr12, x15 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcidr13, x24 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcidr0, x20 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcidr1, x5 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcidr2, x18 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcidr3, x10 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcidr4, x1 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcidr5, x10 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcidr6, x4 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcidr7, x0 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcoslsr, x23 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcpdsr, x21 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcdevaff0, x4 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcdevaff1, x17 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trclsr, x18 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcauthstatus, x10 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcdevarch, x8 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcdevid, x11 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcdevtype, x1 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcpidr4, x2 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcpidr5, x7 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcpidr6, x17 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcpidr7, x5 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcpidr0, x0 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcpidr1, x16 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcpidr2, x29 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trcpidr3, x1 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trccidr0, x27 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trccidr1, x1 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trccidr2, x24 +// CHECK-NEXT: ^ +// CHECK-NEXT: error: expected writable system register or pstate +// CHECK-NEXT: msr trccidr3, x8 +// CHECK-NEXT: ^ diff --git a/test/MC/AArch64/trace-regs.s b/test/MC/AArch64/trace-regs.s new file mode 100644 index 0000000..f9ab4c9 --- /dev/null +++ b/test/MC/AArch64/trace-regs.s @@ -0,0 +1,766 @@ +// RUN: llvm-mc -triple=aarch64-none-linux-gnu -show-encoding < %s | FileCheck %s + mrs x8, trcstatr + mrs x9, trcidr8 + mrs x11, trcidr9 + mrs x25, trcidr10 + mrs x7, trcidr11 + mrs x7, trcidr12 + mrs x6, trcidr13 + mrs x27, trcidr0 + mrs x29, trcidr1 + mrs x4, trcidr2 + mrs x8, trcidr3 + mrs x15, trcidr4 + mrs x20, trcidr5 + mrs x6, trcidr6 + mrs x6, trcidr7 + mrs x24, trcoslsr + mrs x18, trcpdsr + mrs x28, trcdevaff0 + mrs x5, trcdevaff1 + mrs x5, trclsr + mrs x11, trcauthstatus + mrs x13, trcdevarch + mrs x18, trcdevid + mrs x22, trcdevtype + mrs x14, trcpidr4 + mrs x5, trcpidr5 + mrs x5, trcpidr6 + mrs x9, trcpidr7 + mrs x15, trcpidr0 + mrs x6, trcpidr1 + mrs x11, trcpidr2 + mrs x20, trcpidr3 + mrs x17, trccidr0 + mrs x2, trccidr1 + mrs x20, trccidr2 + mrs x4, trccidr3 + mrs x11, trcprgctlr + mrs x23, trcprocselr + mrs x13, trcconfigr + mrs x23, trcauxctlr + mrs x9, trceventctl0r + mrs x16, trceventctl1r + mrs x4, trcstallctlr + mrs x14, trctsctlr + mrs x24, trcsyncpr + mrs x28, trcccctlr + mrs x15, trcbbctlr + mrs x1, trctraceidr + mrs x20, trcqctlr + mrs x2, trcvictlr + mrs x12, trcviiectlr + mrs x16, trcvissctlr + mrs x8, trcvipcssctlr + mrs x27, trcvdctlr + mrs x9, trcvdsacctlr + mrs x0, trcvdarcctlr + mrs x13, trcseqevr0 + mrs x11, trcseqevr1 + mrs x26, trcseqevr2 + mrs x14, trcseqrstevr + mrs x4, trcseqstr + mrs x17, trcextinselr + mrs x21, trccntrldvr0 + mrs x10, trccntrldvr1 + mrs x20, trccntrldvr2 + mrs x5, trccntrldvr3 + mrs x17, trccntctlr0 + mrs x1, trccntctlr1 + mrs x17, trccntctlr2 + mrs x6, trccntctlr3 + mrs x28, trccntvr0 + mrs x23, trccntvr1 + mrs x9, trccntvr2 + mrs x6, trccntvr3 + mrs x24, trcimspec0 + mrs x24, trcimspec1 + mrs x15, trcimspec2 + mrs x10, trcimspec3 + mrs x29, trcimspec4 + mrs x18, trcimspec5 + mrs x29, trcimspec6 + mrs x2, trcimspec7 + mrs x8, trcrsctlr2 + mrs x0, trcrsctlr3 + mrs x12, trcrsctlr4 + mrs x26, trcrsctlr5 + mrs x29, trcrsctlr6 + mrs x17, trcrsctlr7 + mrs x0, trcrsctlr8 + mrs x1, trcrsctlr9 + mrs x17, trcrsctlr10 + mrs x21, trcrsctlr11 + mrs x1, trcrsctlr12 + mrs x8, trcrsctlr13 + mrs x24, trcrsctlr14 + mrs x0, trcrsctlr15 + mrs x2, trcrsctlr16 + mrs x29, trcrsctlr17 + mrs x22, trcrsctlr18 + mrs x6, trcrsctlr19 + mrs x26, trcrsctlr20 + mrs x26, trcrsctlr21 + mrs x4, trcrsctlr22 + mrs x12, trcrsctlr23 + mrs x1, trcrsctlr24 + mrs x0, trcrsctlr25 + mrs x17, trcrsctlr26 + mrs x8, trcrsctlr27 + mrs x10, trcrsctlr28 + mrs x25, trcrsctlr29 + mrs x12, trcrsctlr30 + mrs x11, trcrsctlr31 + mrs x18, trcssccr0 + mrs x12, trcssccr1 + mrs x3, trcssccr2 + mrs x2, trcssccr3 + mrs x21, trcssccr4 + mrs x10, trcssccr5 + mrs x22, trcssccr6 + mrs x23, trcssccr7 + mrs x23, trcsscsr0 + mrs x19, trcsscsr1 + mrs x25, trcsscsr2 + mrs x17, trcsscsr3 + mrs x19, trcsscsr4 + mrs x11, trcsscsr5 + mrs x5, trcsscsr6 + mrs x9, trcsscsr7 + mrs x1, trcsspcicr0 + mrs x12, trcsspcicr1 + mrs x21, trcsspcicr2 + mrs x11, trcsspcicr3 + mrs x3, trcsspcicr4 + mrs x9, trcsspcicr5 + mrs x5, trcsspcicr6 + mrs x2, trcsspcicr7 + mrs x26, trcpdcr + mrs x8, trcacvr0 + mrs x15, trcacvr1 + mrs x19, trcacvr2 + mrs x8, trcacvr3 + mrs x28, trcacvr4 + mrs x3, trcacvr5 + mrs x25, trcacvr6 + mrs x24, trcacvr7 + mrs x6, trcacvr8 + mrs x3, trcacvr9 + mrs x24, trcacvr10 + mrs x3, trcacvr11 + mrs x12, trcacvr12 + mrs x9, trcacvr13 + mrs x14, trcacvr14 + mrs x3, trcacvr15 + mrs x21, trcacatr0 + mrs x26, trcacatr1 + mrs x8, trcacatr2 + mrs x22, trcacatr3 + mrs x6, trcacatr4 + mrs x29, trcacatr5 + mrs x5, trcacatr6 + mrs x18, trcacatr7 + mrs x2, trcacatr8 + mrs x19, trcacatr9 + mrs x13, trcacatr10 + mrs x25, trcacatr11 + mrs x18, trcacatr12 + mrs x29, trcacatr13 + mrs x9, trcacatr14 + mrs x18, trcacatr15 + mrs x29, trcdvcvr0 + mrs x15, trcdvcvr1 + mrs x15, trcdvcvr2 + mrs x15, trcdvcvr3 + mrs x19, trcdvcvr4 + mrs x22, trcdvcvr5 + mrs x27, trcdvcvr6 + mrs x1, trcdvcvr7 + mrs x29, trcdvcmr0 + mrs x9, trcdvcmr1 + mrs x1, trcdvcmr2 + mrs x2, trcdvcmr3 + mrs x5, trcdvcmr4 + mrs x21, trcdvcmr5 + mrs x5, trcdvcmr6 + mrs x1, trcdvcmr7 + mrs x21, trccidcvr0 + mrs x24, trccidcvr1 + mrs x24, trccidcvr2 + mrs x12, trccidcvr3 + mrs x10, trccidcvr4 + mrs x9, trccidcvr5 + mrs x6, trccidcvr6 + mrs x20, trccidcvr7 + mrs x20, trcvmidcvr0 + mrs x20, trcvmidcvr1 + mrs x26, trcvmidcvr2 + mrs x1, trcvmidcvr3 + mrs x14, trcvmidcvr4 + mrs x27, trcvmidcvr5 + mrs x29, trcvmidcvr6 + mrs x17, trcvmidcvr7 + mrs x10, trccidcctlr0 + mrs x4, trccidcctlr1 + mrs x9, trcvmidcctlr0 + mrs x11, trcvmidcctlr1 + mrs x22, trcitctrl + mrs x23, trcclaimset + mrs x14, trcclaimclr +// CHECK: mrs x8, trcstatr // encoding: [0x08,0x03,0x31,0xd5] +// CHECK: mrs x9, trcidr8 // encoding: [0xc9,0x00,0x31,0xd5] +// CHECK: mrs x11, trcidr9 // encoding: [0xcb,0x01,0x31,0xd5] +// CHECK: mrs x25, trcidr10 // encoding: [0xd9,0x02,0x31,0xd5] +// CHECK: mrs x7, trcidr11 // encoding: [0xc7,0x03,0x31,0xd5] +// CHECK: mrs x7, trcidr12 // encoding: [0xc7,0x04,0x31,0xd5] +// CHECK: mrs x6, trcidr13 // encoding: [0xc6,0x05,0x31,0xd5] +// CHECK: mrs x27, trcidr0 // encoding: [0xfb,0x08,0x31,0xd5] +// CHECK: mrs x29, trcidr1 // encoding: [0xfd,0x09,0x31,0xd5] +// CHECK: mrs x4, trcidr2 // encoding: [0xe4,0x0a,0x31,0xd5] +// CHECK: mrs x8, trcidr3 // encoding: [0xe8,0x0b,0x31,0xd5] +// CHECK: mrs x15, trcidr4 // encoding: [0xef,0x0c,0x31,0xd5] +// CHECK: mrs x20, trcidr5 // encoding: [0xf4,0x0d,0x31,0xd5] +// CHECK: mrs x6, trcidr6 // encoding: [0xe6,0x0e,0x31,0xd5] +// CHECK: mrs x6, trcidr7 // encoding: [0xe6,0x0f,0x31,0xd5] +// CHECK: mrs x24, trcoslsr // encoding: [0x98,0x11,0x31,0xd5] +// CHECK: mrs x18, trcpdsr // encoding: [0x92,0x15,0x31,0xd5] +// CHECK: mrs x28, trcdevaff0 // encoding: [0xdc,0x7a,0x31,0xd5] +// CHECK: mrs x5, trcdevaff1 // encoding: [0xc5,0x7b,0x31,0xd5] +// CHECK: mrs x5, trclsr // encoding: [0xc5,0x7d,0x31,0xd5] +// CHECK: mrs x11, trcauthstatus // encoding: [0xcb,0x7e,0x31,0xd5] +// CHECK: mrs x13, trcdevarch // encoding: [0xcd,0x7f,0x31,0xd5] +// CHECK: mrs x18, trcdevid // encoding: [0xf2,0x72,0x31,0xd5] +// CHECK: mrs x22, trcdevtype // encoding: [0xf6,0x73,0x31,0xd5] +// CHECK: mrs x14, trcpidr4 // encoding: [0xee,0x74,0x31,0xd5] +// CHECK: mrs x5, trcpidr5 // encoding: [0xe5,0x75,0x31,0xd5] +// CHECK: mrs x5, trcpidr6 // encoding: [0xe5,0x76,0x31,0xd5] +// CHECK: mrs x9, trcpidr7 // encoding: [0xe9,0x77,0x31,0xd5] +// CHECK: mrs x15, trcpidr0 // encoding: [0xef,0x78,0x31,0xd5] +// CHECK: mrs x6, trcpidr1 // encoding: [0xe6,0x79,0x31,0xd5] +// CHECK: mrs x11, trcpidr2 // encoding: [0xeb,0x7a,0x31,0xd5] +// CHECK: mrs x20, trcpidr3 // encoding: [0xf4,0x7b,0x31,0xd5] +// CHECK: mrs x17, trccidr0 // encoding: [0xf1,0x7c,0x31,0xd5] +// CHECK: mrs x2, trccidr1 // encoding: [0xe2,0x7d,0x31,0xd5] +// CHECK: mrs x20, trccidr2 // encoding: [0xf4,0x7e,0x31,0xd5] +// CHECK: mrs x4, trccidr3 // encoding: [0xe4,0x7f,0x31,0xd5] +// CHECK: mrs x11, trcprgctlr // encoding: [0x0b,0x01,0x31,0xd5] +// CHECK: mrs x23, trcprocselr // encoding: [0x17,0x02,0x31,0xd5] +// CHECK: mrs x13, trcconfigr // encoding: [0x0d,0x04,0x31,0xd5] +// CHECK: mrs x23, trcauxctlr // encoding: [0x17,0x06,0x31,0xd5] +// CHECK: mrs x9, trceventctl0r // encoding: [0x09,0x08,0x31,0xd5] +// CHECK: mrs x16, trceventctl1r // encoding: [0x10,0x09,0x31,0xd5] +// CHECK: mrs x4, trcstallctlr // encoding: [0x04,0x0b,0x31,0xd5] +// CHECK: mrs x14, trctsctlr // encoding: [0x0e,0x0c,0x31,0xd5] +// CHECK: mrs x24, trcsyncpr // encoding: [0x18,0x0d,0x31,0xd5] +// CHECK: mrs x28, trcccctlr // encoding: [0x1c,0x0e,0x31,0xd5] +// CHECK: mrs x15, trcbbctlr // encoding: [0x0f,0x0f,0x31,0xd5] +// CHECK: mrs x1, trctraceidr // encoding: [0x21,0x00,0x31,0xd5] +// CHECK: mrs x20, trcqctlr // encoding: [0x34,0x01,0x31,0xd5] +// CHECK: mrs x2, trcvictlr // encoding: [0x42,0x00,0x31,0xd5] +// CHECK: mrs x12, trcviiectlr // encoding: [0x4c,0x01,0x31,0xd5] +// CHECK: mrs x16, trcvissctlr // encoding: [0x50,0x02,0x31,0xd5] +// CHECK: mrs x8, trcvipcssctlr // encoding: [0x48,0x03,0x31,0xd5] +// CHECK: mrs x27, trcvdctlr // encoding: [0x5b,0x08,0x31,0xd5] +// CHECK: mrs x9, trcvdsacctlr // encoding: [0x49,0x09,0x31,0xd5] +// CHECK: mrs x0, trcvdarcctlr // encoding: [0x40,0x0a,0x31,0xd5] +// CHECK: mrs x13, trcseqevr0 // encoding: [0x8d,0x00,0x31,0xd5] +// CHECK: mrs x11, trcseqevr1 // encoding: [0x8b,0x01,0x31,0xd5] +// CHECK: mrs x26, trcseqevr2 // encoding: [0x9a,0x02,0x31,0xd5] +// CHECK: mrs x14, trcseqrstevr // encoding: [0x8e,0x06,0x31,0xd5] +// CHECK: mrs x4, trcseqstr // encoding: [0x84,0x07,0x31,0xd5] +// CHECK: mrs x17, trcextinselr // encoding: [0x91,0x08,0x31,0xd5] +// CHECK: mrs x21, trccntrldvr0 // encoding: [0xb5,0x00,0x31,0xd5] +// CHECK: mrs x10, trccntrldvr1 // encoding: [0xaa,0x01,0x31,0xd5] +// CHECK: mrs x20, trccntrldvr2 // encoding: [0xb4,0x02,0x31,0xd5] +// CHECK: mrs x5, trccntrldvr3 // encoding: [0xa5,0x03,0x31,0xd5] +// CHECK: mrs x17, trccntctlr0 // encoding: [0xb1,0x04,0x31,0xd5] +// CHECK: mrs x1, trccntctlr1 // encoding: [0xa1,0x05,0x31,0xd5] +// CHECK: mrs x17, trccntctlr2 // encoding: [0xb1,0x06,0x31,0xd5] +// CHECK: mrs x6, trccntctlr3 // encoding: [0xa6,0x07,0x31,0xd5] +// CHECK: mrs x28, trccntvr0 // encoding: [0xbc,0x08,0x31,0xd5] +// CHECK: mrs x23, trccntvr1 // encoding: [0xb7,0x09,0x31,0xd5] +// CHECK: mrs x9, trccntvr2 // encoding: [0xa9,0x0a,0x31,0xd5] +// CHECK: mrs x6, trccntvr3 // encoding: [0xa6,0x0b,0x31,0xd5] +// CHECK: mrs x24, trcimspec0 // encoding: [0xf8,0x00,0x31,0xd5] +// CHECK: mrs x24, trcimspec1 // encoding: [0xf8,0x01,0x31,0xd5] +// CHECK: mrs x15, trcimspec2 // encoding: [0xef,0x02,0x31,0xd5] +// CHECK: mrs x10, trcimspec3 // encoding: [0xea,0x03,0x31,0xd5] +// CHECK: mrs x29, trcimspec4 // encoding: [0xfd,0x04,0x31,0xd5] +// CHECK: mrs x18, trcimspec5 // encoding: [0xf2,0x05,0x31,0xd5] +// CHECK: mrs x29, trcimspec6 // encoding: [0xfd,0x06,0x31,0xd5] +// CHECK: mrs x2, trcimspec7 // encoding: [0xe2,0x07,0x31,0xd5] +// CHECK: mrs x8, trcrsctlr2 // encoding: [0x08,0x12,0x31,0xd5] +// CHECK: mrs x0, trcrsctlr3 // encoding: [0x00,0x13,0x31,0xd5] +// CHECK: mrs x12, trcrsctlr4 // encoding: [0x0c,0x14,0x31,0xd5] +// CHECK: mrs x26, trcrsctlr5 // encoding: [0x1a,0x15,0x31,0xd5] +// CHECK: mrs x29, trcrsctlr6 // encoding: [0x1d,0x16,0x31,0xd5] +// CHECK: mrs x17, trcrsctlr7 // encoding: [0x11,0x17,0x31,0xd5] +// CHECK: mrs x0, trcrsctlr8 // encoding: [0x00,0x18,0x31,0xd5] +// CHECK: mrs x1, trcrsctlr9 // encoding: [0x01,0x19,0x31,0xd5] +// CHECK: mrs x17, trcrsctlr10 // encoding: [0x11,0x1a,0x31,0xd5] +// CHECK: mrs x21, trcrsctlr11 // encoding: [0x15,0x1b,0x31,0xd5] +// CHECK: mrs x1, trcrsctlr12 // encoding: [0x01,0x1c,0x31,0xd5] +// CHECK: mrs x8, trcrsctlr13 // encoding: [0x08,0x1d,0x31,0xd5] +// CHECK: mrs x24, trcrsctlr14 // encoding: [0x18,0x1e,0x31,0xd5] +// CHECK: mrs x0, trcrsctlr15 // encoding: [0x00,0x1f,0x31,0xd5] +// CHECK: mrs x2, trcrsctlr16 // encoding: [0x22,0x10,0x31,0xd5] +// CHECK: mrs x29, trcrsctlr17 // encoding: [0x3d,0x11,0x31,0xd5] +// CHECK: mrs x22, trcrsctlr18 // encoding: [0x36,0x12,0x31,0xd5] +// CHECK: mrs x6, trcrsctlr19 // encoding: [0x26,0x13,0x31,0xd5] +// CHECK: mrs x26, trcrsctlr20 // encoding: [0x3a,0x14,0x31,0xd5] +// CHECK: mrs x26, trcrsctlr21 // encoding: [0x3a,0x15,0x31,0xd5] +// CHECK: mrs x4, trcrsctlr22 // encoding: [0x24,0x16,0x31,0xd5] +// CHECK: mrs x12, trcrsctlr23 // encoding: [0x2c,0x17,0x31,0xd5] +// CHECK: mrs x1, trcrsctlr24 // encoding: [0x21,0x18,0x31,0xd5] +// CHECK: mrs x0, trcrsctlr25 // encoding: [0x20,0x19,0x31,0xd5] +// CHECK: mrs x17, trcrsctlr26 // encoding: [0x31,0x1a,0x31,0xd5] +// CHECK: mrs x8, trcrsctlr27 // encoding: [0x28,0x1b,0x31,0xd5] +// CHECK: mrs x10, trcrsctlr28 // encoding: [0x2a,0x1c,0x31,0xd5] +// CHECK: mrs x25, trcrsctlr29 // encoding: [0x39,0x1d,0x31,0xd5] +// CHECK: mrs x12, trcrsctlr30 // encoding: [0x2c,0x1e,0x31,0xd5] +// CHECK: mrs x11, trcrsctlr31 // encoding: [0x2b,0x1f,0x31,0xd5] +// CHECK: mrs x18, trcssccr0 // encoding: [0x52,0x10,0x31,0xd5] +// CHECK: mrs x12, trcssccr1 // encoding: [0x4c,0x11,0x31,0xd5] +// CHECK: mrs x3, trcssccr2 // encoding: [0x43,0x12,0x31,0xd5] +// CHECK: mrs x2, trcssccr3 // encoding: [0x42,0x13,0x31,0xd5] +// CHECK: mrs x21, trcssccr4 // encoding: [0x55,0x14,0x31,0xd5] +// CHECK: mrs x10, trcssccr5 // encoding: [0x4a,0x15,0x31,0xd5] +// CHECK: mrs x22, trcssccr6 // encoding: [0x56,0x16,0x31,0xd5] +// CHECK: mrs x23, trcssccr7 // encoding: [0x57,0x17,0x31,0xd5] +// CHECK: mrs x23, trcsscsr0 // encoding: [0x57,0x18,0x31,0xd5] +// CHECK: mrs x19, trcsscsr1 // encoding: [0x53,0x19,0x31,0xd5] +// CHECK: mrs x25, trcsscsr2 // encoding: [0x59,0x1a,0x31,0xd5] +// CHECK: mrs x17, trcsscsr3 // encoding: [0x51,0x1b,0x31,0xd5] +// CHECK: mrs x19, trcsscsr4 // encoding: [0x53,0x1c,0x31,0xd5] +// CHECK: mrs x11, trcsscsr5 // encoding: [0x4b,0x1d,0x31,0xd5] +// CHECK: mrs x5, trcsscsr6 // encoding: [0x45,0x1e,0x31,0xd5] +// CHECK: mrs x9, trcsscsr7 // encoding: [0x49,0x1f,0x31,0xd5] +// CHECK: mrs x1, trcsspcicr0 // encoding: [0x61,0x10,0x31,0xd5] +// CHECK: mrs x12, trcsspcicr1 // encoding: [0x6c,0x11,0x31,0xd5] +// CHECK: mrs x21, trcsspcicr2 // encoding: [0x75,0x12,0x31,0xd5] +// CHECK: mrs x11, trcsspcicr3 // encoding: [0x6b,0x13,0x31,0xd5] +// CHECK: mrs x3, trcsspcicr4 // encoding: [0x63,0x14,0x31,0xd5] +// CHECK: mrs x9, trcsspcicr5 // encoding: [0x69,0x15,0x31,0xd5] +// CHECK: mrs x5, trcsspcicr6 // encoding: [0x65,0x16,0x31,0xd5] +// CHECK: mrs x2, trcsspcicr7 // encoding: [0x62,0x17,0x31,0xd5] +// CHECK: mrs x26, trcpdcr // encoding: [0x9a,0x14,0x31,0xd5] +// CHECK: mrs x8, trcacvr0 // encoding: [0x08,0x20,0x31,0xd5] +// CHECK: mrs x15, trcacvr1 // encoding: [0x0f,0x22,0x31,0xd5] +// CHECK: mrs x19, trcacvr2 // encoding: [0x13,0x24,0x31,0xd5] +// CHECK: mrs x8, trcacvr3 // encoding: [0x08,0x26,0x31,0xd5] +// CHECK: mrs x28, trcacvr4 // encoding: [0x1c,0x28,0x31,0xd5] +// CHECK: mrs x3, trcacvr5 // encoding: [0x03,0x2a,0x31,0xd5] +// CHECK: mrs x25, trcacvr6 // encoding: [0x19,0x2c,0x31,0xd5] +// CHECK: mrs x24, trcacvr7 // encoding: [0x18,0x2e,0x31,0xd5] +// CHECK: mrs x6, trcacvr8 // encoding: [0x26,0x20,0x31,0xd5] +// CHECK: mrs x3, trcacvr9 // encoding: [0x23,0x22,0x31,0xd5] +// CHECK: mrs x24, trcacvr10 // encoding: [0x38,0x24,0x31,0xd5] +// CHECK: mrs x3, trcacvr11 // encoding: [0x23,0x26,0x31,0xd5] +// CHECK: mrs x12, trcacvr12 // encoding: [0x2c,0x28,0x31,0xd5] +// CHECK: mrs x9, trcacvr13 // encoding: [0x29,0x2a,0x31,0xd5] +// CHECK: mrs x14, trcacvr14 // encoding: [0x2e,0x2c,0x31,0xd5] +// CHECK: mrs x3, trcacvr15 // encoding: [0x23,0x2e,0x31,0xd5] +// CHECK: mrs x21, trcacatr0 // encoding: [0x55,0x20,0x31,0xd5] +// CHECK: mrs x26, trcacatr1 // encoding: [0x5a,0x22,0x31,0xd5] +// CHECK: mrs x8, trcacatr2 // encoding: [0x48,0x24,0x31,0xd5] +// CHECK: mrs x22, trcacatr3 // encoding: [0x56,0x26,0x31,0xd5] +// CHECK: mrs x6, trcacatr4 // encoding: [0x46,0x28,0x31,0xd5] +// CHECK: mrs x29, trcacatr5 // encoding: [0x5d,0x2a,0x31,0xd5] +// CHECK: mrs x5, trcacatr6 // encoding: [0x45,0x2c,0x31,0xd5] +// CHECK: mrs x18, trcacatr7 // encoding: [0x52,0x2e,0x31,0xd5] +// CHECK: mrs x2, trcacatr8 // encoding: [0x62,0x20,0x31,0xd5] +// CHECK: mrs x19, trcacatr9 // encoding: [0x73,0x22,0x31,0xd5] +// CHECK: mrs x13, trcacatr10 // encoding: [0x6d,0x24,0x31,0xd5] +// CHECK: mrs x25, trcacatr11 // encoding: [0x79,0x26,0x31,0xd5] +// CHECK: mrs x18, trcacatr12 // encoding: [0x72,0x28,0x31,0xd5] +// CHECK: mrs x29, trcacatr13 // encoding: [0x7d,0x2a,0x31,0xd5] +// CHECK: mrs x9, trcacatr14 // encoding: [0x69,0x2c,0x31,0xd5] +// CHECK: mrs x18, trcacatr15 // encoding: [0x72,0x2e,0x31,0xd5] +// CHECK: mrs x29, trcdvcvr0 // encoding: [0x9d,0x20,0x31,0xd5] +// CHECK: mrs x15, trcdvcvr1 // encoding: [0x8f,0x24,0x31,0xd5] +// CHECK: mrs x15, trcdvcvr2 // encoding: [0x8f,0x28,0x31,0xd5] +// CHECK: mrs x15, trcdvcvr3 // encoding: [0x8f,0x2c,0x31,0xd5] +// CHECK: mrs x19, trcdvcvr4 // encoding: [0xb3,0x20,0x31,0xd5] +// CHECK: mrs x22, trcdvcvr5 // encoding: [0xb6,0x24,0x31,0xd5] +// CHECK: mrs x27, trcdvcvr6 // encoding: [0xbb,0x28,0x31,0xd5] +// CHECK: mrs x1, trcdvcvr7 // encoding: [0xa1,0x2c,0x31,0xd5] +// CHECK: mrs x29, trcdvcmr0 // encoding: [0xdd,0x20,0x31,0xd5] +// CHECK: mrs x9, trcdvcmr1 // encoding: [0xc9,0x24,0x31,0xd5] +// CHECK: mrs x1, trcdvcmr2 // encoding: [0xc1,0x28,0x31,0xd5] +// CHECK: mrs x2, trcdvcmr3 // encoding: [0xc2,0x2c,0x31,0xd5] +// CHECK: mrs x5, trcdvcmr4 // encoding: [0xe5,0x20,0x31,0xd5] +// CHECK: mrs x21, trcdvcmr5 // encoding: [0xf5,0x24,0x31,0xd5] +// CHECK: mrs x5, trcdvcmr6 // encoding: [0xe5,0x28,0x31,0xd5] +// CHECK: mrs x1, trcdvcmr7 // encoding: [0xe1,0x2c,0x31,0xd5] +// CHECK: mrs x21, trccidcvr0 // encoding: [0x15,0x30,0x31,0xd5] +// CHECK: mrs x24, trccidcvr1 // encoding: [0x18,0x32,0x31,0xd5] +// CHECK: mrs x24, trccidcvr2 // encoding: [0x18,0x34,0x31,0xd5] +// CHECK: mrs x12, trccidcvr3 // encoding: [0x0c,0x36,0x31,0xd5] +// CHECK: mrs x10, trccidcvr4 // encoding: [0x0a,0x38,0x31,0xd5] +// CHECK: mrs x9, trccidcvr5 // encoding: [0x09,0x3a,0x31,0xd5] +// CHECK: mrs x6, trccidcvr6 // encoding: [0x06,0x3c,0x31,0xd5] +// CHECK: mrs x20, trccidcvr7 // encoding: [0x14,0x3e,0x31,0xd5] +// CHECK: mrs x20, trcvmidcvr0 // encoding: [0x34,0x30,0x31,0xd5] +// CHECK: mrs x20, trcvmidcvr1 // encoding: [0x34,0x32,0x31,0xd5] +// CHECK: mrs x26, trcvmidcvr2 // encoding: [0x3a,0x34,0x31,0xd5] +// CHECK: mrs x1, trcvmidcvr3 // encoding: [0x21,0x36,0x31,0xd5] +// CHECK: mrs x14, trcvmidcvr4 // encoding: [0x2e,0x38,0x31,0xd5] +// CHECK: mrs x27, trcvmidcvr5 // encoding: [0x3b,0x3a,0x31,0xd5] +// CHECK: mrs x29, trcvmidcvr6 // encoding: [0x3d,0x3c,0x31,0xd5] +// CHECK: mrs x17, trcvmidcvr7 // encoding: [0x31,0x3e,0x31,0xd5] +// CHECK: mrs x10, trccidcctlr0 // encoding: [0x4a,0x30,0x31,0xd5] +// CHECK: mrs x4, trccidcctlr1 // encoding: [0x44,0x31,0x31,0xd5] +// CHECK: mrs x9, trcvmidcctlr0 // encoding: [0x49,0x32,0x31,0xd5] +// CHECK: mrs x11, trcvmidcctlr1 // encoding: [0x4b,0x33,0x31,0xd5] +// CHECK: mrs x22, trcitctrl // encoding: [0x96,0x70,0x31,0xd5] +// CHECK: mrs x23, trcclaimset // encoding: [0xd7,0x78,0x31,0xd5] +// CHECK: mrs x14, trcclaimclr // encoding: [0xce,0x79,0x31,0xd5] + + msr trcoslar, x28 + msr trclar, x14 + msr trcprgctlr, x10 + msr trcprocselr, x27 + msr trcconfigr, x24 + msr trcauxctlr, x8 + msr trceventctl0r, x16 + msr trceventctl1r, x27 + msr trcstallctlr, x26 + msr trctsctlr, x0 + msr trcsyncpr, x14 + msr trcccctlr, x8 + msr trcbbctlr, x6 + msr trctraceidr, x23 + msr trcqctlr, x5 + msr trcvictlr, x0 + msr trcviiectlr, x0 + msr trcvissctlr, x1 + msr trcvipcssctlr, x0 + msr trcvdctlr, x7 + msr trcvdsacctlr, x18 + msr trcvdarcctlr, x24 + msr trcseqevr0, x28 + msr trcseqevr1, x21 + msr trcseqevr2, x16 + msr trcseqrstevr, x16 + msr trcseqstr, x25 + msr trcextinselr, x29 + msr trccntrldvr0, x20 + msr trccntrldvr1, x20 + msr trccntrldvr2, x22 + msr trccntrldvr3, x12 + msr trccntctlr0, x20 + msr trccntctlr1, x4 + msr trccntctlr2, x8 + msr trccntctlr3, x16 + msr trccntvr0, x5 + msr trccntvr1, x27 + msr trccntvr2, x21 + msr trccntvr3, x8 + msr trcimspec0, x6 + msr trcimspec1, x27 + msr trcimspec2, x23 + msr trcimspec3, x15 + msr trcimspec4, x13 + msr trcimspec5, x25 + msr trcimspec6, x19 + msr trcimspec7, x27 + msr trcrsctlr2, x4 + msr trcrsctlr3, x0 + msr trcrsctlr4, x21 + msr trcrsctlr5, x8 + msr trcrsctlr6, x20 + msr trcrsctlr7, x11 + msr trcrsctlr8, x18 + msr trcrsctlr9, x24 + msr trcrsctlr10, x15 + msr trcrsctlr11, x21 + msr trcrsctlr12, x4 + msr trcrsctlr13, x28 + msr trcrsctlr14, x3 + msr trcrsctlr15, x20 + msr trcrsctlr16, x12 + msr trcrsctlr17, x17 + msr trcrsctlr18, x10 + msr trcrsctlr19, x11 + msr trcrsctlr20, x3 + msr trcrsctlr21, x18 + msr trcrsctlr22, x26 + msr trcrsctlr23, x5 + msr trcrsctlr24, x25 + msr trcrsctlr25, x5 + msr trcrsctlr26, x4 + msr trcrsctlr27, x20 + msr trcrsctlr28, x5 + msr trcrsctlr29, x10 + msr trcrsctlr30, x24 + msr trcrsctlr31, x20 + msr trcssccr0, x23 + msr trcssccr1, x27 + msr trcssccr2, x27 + msr trcssccr3, x6 + msr trcssccr4, x3 + msr trcssccr5, x12 + msr trcssccr6, x7 + msr trcssccr7, x6 + msr trcsscsr0, x20 + msr trcsscsr1, x17 + msr trcsscsr2, x11 + msr trcsscsr3, x4 + msr trcsscsr4, x14 + msr trcsscsr5, x22 + msr trcsscsr6, x3 + msr trcsscsr7, x11 + msr trcsspcicr0, x2 + msr trcsspcicr1, x3 + msr trcsspcicr2, x5 + msr trcsspcicr3, x7 + msr trcsspcicr4, x11 + msr trcsspcicr5, x13 + msr trcsspcicr6, x17 + msr trcsspcicr7, x23 + msr trcpdcr, x3 + msr trcacvr0, x6 + msr trcacvr1, x20 + msr trcacvr2, x25 + msr trcacvr3, x1 + msr trcacvr4, x28 + msr trcacvr5, x15 + msr trcacvr6, x25 + msr trcacvr7, x12 + msr trcacvr8, x5 + msr trcacvr9, x25 + msr trcacvr10, x13 + msr trcacvr11, x10 + msr trcacvr12, x19 + msr trcacvr13, x10 + msr trcacvr14, x19 + msr trcacvr15, x2 + msr trcacatr0, x15 + msr trcacatr1, x13 + msr trcacatr2, x8 + msr trcacatr3, x1 + msr trcacatr4, x11 + msr trcacatr5, x8 + msr trcacatr6, x24 + msr trcacatr7, x6 + msr trcacatr8, x23 + msr trcacatr9, x5 + msr trcacatr10, x11 + msr trcacatr11, x11 + msr trcacatr12, x3 + msr trcacatr13, x28 + msr trcacatr14, x25 + msr trcacatr15, x4 + msr trcdvcvr0, x6 + msr trcdvcvr1, x3 + msr trcdvcvr2, x5 + msr trcdvcvr3, x11 + msr trcdvcvr4, x9 + msr trcdvcvr5, x14 + msr trcdvcvr6, x10 + msr trcdvcvr7, x12 + msr trcdvcmr0, x8 + msr trcdvcmr1, x8 + msr trcdvcmr2, x22 + msr trcdvcmr3, x22 + msr trcdvcmr4, x5 + msr trcdvcmr5, x16 + msr trcdvcmr6, x27 + msr trcdvcmr7, x21 + msr trccidcvr0, x8 + msr trccidcvr1, x6 + msr trccidcvr2, x9 + msr trccidcvr3, x8 + msr trccidcvr4, x3 + msr trccidcvr5, x21 + msr trccidcvr6, x12 + msr trccidcvr7, x7 + msr trcvmidcvr0, x4 + msr trcvmidcvr1, x3 + msr trcvmidcvr2, x9 + msr trcvmidcvr3, x17 + msr trcvmidcvr4, x14 + msr trcvmidcvr5, x12 + msr trcvmidcvr6, x10 + msr trcvmidcvr7, x3 + msr trccidcctlr0, x14 + msr trccidcctlr1, x22 + msr trcvmidcctlr0, x8 + msr trcvmidcctlr1, x15 + msr trcitctrl, x1 + msr trcclaimset, x7 + msr trcclaimclr, x29 +// CHECK: msr trcoslar, x28 // encoding: [0x9c,0x10,0x11,0xd5] +// CHECK: msr trclar, x14 // encoding: [0xce,0x7c,0x11,0xd5] +// CHECK: msr trcprgctlr, x10 // encoding: [0x0a,0x01,0x11,0xd5] +// CHECK: msr trcprocselr, x27 // encoding: [0x1b,0x02,0x11,0xd5] +// CHECK: msr trcconfigr, x24 // encoding: [0x18,0x04,0x11,0xd5] +// CHECK: msr trcauxctlr, x8 // encoding: [0x08,0x06,0x11,0xd5] +// CHECK: msr trceventctl0r, x16 // encoding: [0x10,0x08,0x11,0xd5] +// CHECK: msr trceventctl1r, x27 // encoding: [0x1b,0x09,0x11,0xd5] +// CHECK: msr trcstallctlr, x26 // encoding: [0x1a,0x0b,0x11,0xd5] +// CHECK: msr trctsctlr, x0 // encoding: [0x00,0x0c,0x11,0xd5] +// CHECK: msr trcsyncpr, x14 // encoding: [0x0e,0x0d,0x11,0xd5] +// CHECK: msr trcccctlr, x8 // encoding: [0x08,0x0e,0x11,0xd5] +// CHECK: msr trcbbctlr, x6 // encoding: [0x06,0x0f,0x11,0xd5] +// CHECK: msr trctraceidr, x23 // encoding: [0x37,0x00,0x11,0xd5] +// CHECK: msr trcqctlr, x5 // encoding: [0x25,0x01,0x11,0xd5] +// CHECK: msr trcvictlr, x0 // encoding: [0x40,0x00,0x11,0xd5] +// CHECK: msr trcviiectlr, x0 // encoding: [0x40,0x01,0x11,0xd5] +// CHECK: msr trcvissctlr, x1 // encoding: [0x41,0x02,0x11,0xd5] +// CHECK: msr trcvipcssctlr, x0 // encoding: [0x40,0x03,0x11,0xd5] +// CHECK: msr trcvdctlr, x7 // encoding: [0x47,0x08,0x11,0xd5] +// CHECK: msr trcvdsacctlr, x18 // encoding: [0x52,0x09,0x11,0xd5] +// CHECK: msr trcvdarcctlr, x24 // encoding: [0x58,0x0a,0x11,0xd5] +// CHECK: msr trcseqevr0, x28 // encoding: [0x9c,0x00,0x11,0xd5] +// CHECK: msr trcseqevr1, x21 // encoding: [0x95,0x01,0x11,0xd5] +// CHECK: msr trcseqevr2, x16 // encoding: [0x90,0x02,0x11,0xd5] +// CHECK: msr trcseqrstevr, x16 // encoding: [0x90,0x06,0x11,0xd5] +// CHECK: msr trcseqstr, x25 // encoding: [0x99,0x07,0x11,0xd5] +// CHECK: msr trcextinselr, x29 // encoding: [0x9d,0x08,0x11,0xd5] +// CHECK: msr trccntrldvr0, x20 // encoding: [0xb4,0x00,0x11,0xd5] +// CHECK: msr trccntrldvr1, x20 // encoding: [0xb4,0x01,0x11,0xd5] +// CHECK: msr trccntrldvr2, x22 // encoding: [0xb6,0x02,0x11,0xd5] +// CHECK: msr trccntrldvr3, x12 // encoding: [0xac,0x03,0x11,0xd5] +// CHECK: msr trccntctlr0, x20 // encoding: [0xb4,0x04,0x11,0xd5] +// CHECK: msr trccntctlr1, x4 // encoding: [0xa4,0x05,0x11,0xd5] +// CHECK: msr trccntctlr2, x8 // encoding: [0xa8,0x06,0x11,0xd5] +// CHECK: msr trccntctlr3, x16 // encoding: [0xb0,0x07,0x11,0xd5] +// CHECK: msr trccntvr0, x5 // encoding: [0xa5,0x08,0x11,0xd5] +// CHECK: msr trccntvr1, x27 // encoding: [0xbb,0x09,0x11,0xd5] +// CHECK: msr trccntvr2, x21 // encoding: [0xb5,0x0a,0x11,0xd5] +// CHECK: msr trccntvr3, x8 // encoding: [0xa8,0x0b,0x11,0xd5] +// CHECK: msr trcimspec0, x6 // encoding: [0xe6,0x00,0x11,0xd5] +// CHECK: msr trcimspec1, x27 // encoding: [0xfb,0x01,0x11,0xd5] +// CHECK: msr trcimspec2, x23 // encoding: [0xf7,0x02,0x11,0xd5] +// CHECK: msr trcimspec3, x15 // encoding: [0xef,0x03,0x11,0xd5] +// CHECK: msr trcimspec4, x13 // encoding: [0xed,0x04,0x11,0xd5] +// CHECK: msr trcimspec5, x25 // encoding: [0xf9,0x05,0x11,0xd5] +// CHECK: msr trcimspec6, x19 // encoding: [0xf3,0x06,0x11,0xd5] +// CHECK: msr trcimspec7, x27 // encoding: [0xfb,0x07,0x11,0xd5] +// CHECK: msr trcrsctlr2, x4 // encoding: [0x04,0x12,0x11,0xd5] +// CHECK: msr trcrsctlr3, x0 // encoding: [0x00,0x13,0x11,0xd5] +// CHECK: msr trcrsctlr4, x21 // encoding: [0x15,0x14,0x11,0xd5] +// CHECK: msr trcrsctlr5, x8 // encoding: [0x08,0x15,0x11,0xd5] +// CHECK: msr trcrsctlr6, x20 // encoding: [0x14,0x16,0x11,0xd5] +// CHECK: msr trcrsctlr7, x11 // encoding: [0x0b,0x17,0x11,0xd5] +// CHECK: msr trcrsctlr8, x18 // encoding: [0x12,0x18,0x11,0xd5] +// CHECK: msr trcrsctlr9, x24 // encoding: [0x18,0x19,0x11,0xd5] +// CHECK: msr trcrsctlr10, x15 // encoding: [0x0f,0x1a,0x11,0xd5] +// CHECK: msr trcrsctlr11, x21 // encoding: [0x15,0x1b,0x11,0xd5] +// CHECK: msr trcrsctlr12, x4 // encoding: [0x04,0x1c,0x11,0xd5] +// CHECK: msr trcrsctlr13, x28 // encoding: [0x1c,0x1d,0x11,0xd5] +// CHECK: msr trcrsctlr14, x3 // encoding: [0x03,0x1e,0x11,0xd5] +// CHECK: msr trcrsctlr15, x20 // encoding: [0x14,0x1f,0x11,0xd5] +// CHECK: msr trcrsctlr16, x12 // encoding: [0x2c,0x10,0x11,0xd5] +// CHECK: msr trcrsctlr17, x17 // encoding: [0x31,0x11,0x11,0xd5] +// CHECK: msr trcrsctlr18, x10 // encoding: [0x2a,0x12,0x11,0xd5] +// CHECK: msr trcrsctlr19, x11 // encoding: [0x2b,0x13,0x11,0xd5] +// CHECK: msr trcrsctlr20, x3 // encoding: [0x23,0x14,0x11,0xd5] +// CHECK: msr trcrsctlr21, x18 // encoding: [0x32,0x15,0x11,0xd5] +// CHECK: msr trcrsctlr22, x26 // encoding: [0x3a,0x16,0x11,0xd5] +// CHECK: msr trcrsctlr23, x5 // encoding: [0x25,0x17,0x11,0xd5] +// CHECK: msr trcrsctlr24, x25 // encoding: [0x39,0x18,0x11,0xd5] +// CHECK: msr trcrsctlr25, x5 // encoding: [0x25,0x19,0x11,0xd5] +// CHECK: msr trcrsctlr26, x4 // encoding: [0x24,0x1a,0x11,0xd5] +// CHECK: msr trcrsctlr27, x20 // encoding: [0x34,0x1b,0x11,0xd5] +// CHECK: msr trcrsctlr28, x5 // encoding: [0x25,0x1c,0x11,0xd5] +// CHECK: msr trcrsctlr29, x10 // encoding: [0x2a,0x1d,0x11,0xd5] +// CHECK: msr trcrsctlr30, x24 // encoding: [0x38,0x1e,0x11,0xd5] +// CHECK: msr trcrsctlr31, x20 // encoding: [0x34,0x1f,0x11,0xd5] +// CHECK: msr trcssccr0, x23 // encoding: [0x57,0x10,0x11,0xd5] +// CHECK: msr trcssccr1, x27 // encoding: [0x5b,0x11,0x11,0xd5] +// CHECK: msr trcssccr2, x27 // encoding: [0x5b,0x12,0x11,0xd5] +// CHECK: msr trcssccr3, x6 // encoding: [0x46,0x13,0x11,0xd5] +// CHECK: msr trcssccr4, x3 // encoding: [0x43,0x14,0x11,0xd5] +// CHECK: msr trcssccr5, x12 // encoding: [0x4c,0x15,0x11,0xd5] +// CHECK: msr trcssccr6, x7 // encoding: [0x47,0x16,0x11,0xd5] +// CHECK: msr trcssccr7, x6 // encoding: [0x46,0x17,0x11,0xd5] +// CHECK: msr trcsscsr0, x20 // encoding: [0x54,0x18,0x11,0xd5] +// CHECK: msr trcsscsr1, x17 // encoding: [0x51,0x19,0x11,0xd5] +// CHECK: msr trcsscsr2, x11 // encoding: [0x4b,0x1a,0x11,0xd5] +// CHECK: msr trcsscsr3, x4 // encoding: [0x44,0x1b,0x11,0xd5] +// CHECK: msr trcsscsr4, x14 // encoding: [0x4e,0x1c,0x11,0xd5] +// CHECK: msr trcsscsr5, x22 // encoding: [0x56,0x1d,0x11,0xd5] +// CHECK: msr trcsscsr6, x3 // encoding: [0x43,0x1e,0x11,0xd5] +// CHECK: msr trcsscsr7, x11 // encoding: [0x4b,0x1f,0x11,0xd5] +// CHECK: msr trcsspcicr0, x2 // encoding: [0x62,0x10,0x11,0xd5] +// CHECK: msr trcsspcicr1, x3 // encoding: [0x63,0x11,0x11,0xd5] +// CHECK: msr trcsspcicr2, x5 // encoding: [0x65,0x12,0x11,0xd5] +// CHECK: msr trcsspcicr3, x7 // encoding: [0x67,0x13,0x11,0xd5] +// CHECK: msr trcsspcicr4, x11 // encoding: [0x6b,0x14,0x11,0xd5] +// CHECK: msr trcsspcicr5, x13 // encoding: [0x6d,0x15,0x11,0xd5] +// CHECK: msr trcsspcicr6, x17 // encoding: [0x71,0x16,0x11,0xd5] +// CHECK: msr trcsspcicr7, x23 // encoding: [0x77,0x17,0x11,0xd5] +// CHECK: msr trcpdcr, x3 // encoding: [0x83,0x14,0x11,0xd5] +// CHECK: msr trcacvr0, x6 // encoding: [0x06,0x20,0x11,0xd5] +// CHECK: msr trcacvr1, x20 // encoding: [0x14,0x22,0x11,0xd5] +// CHECK: msr trcacvr2, x25 // encoding: [0x19,0x24,0x11,0xd5] +// CHECK: msr trcacvr3, x1 // encoding: [0x01,0x26,0x11,0xd5] +// CHECK: msr trcacvr4, x28 // encoding: [0x1c,0x28,0x11,0xd5] +// CHECK: msr trcacvr5, x15 // encoding: [0x0f,0x2a,0x11,0xd5] +// CHECK: msr trcacvr6, x25 // encoding: [0x19,0x2c,0x11,0xd5] +// CHECK: msr trcacvr7, x12 // encoding: [0x0c,0x2e,0x11,0xd5] +// CHECK: msr trcacvr8, x5 // encoding: [0x25,0x20,0x11,0xd5] +// CHECK: msr trcacvr9, x25 // encoding: [0x39,0x22,0x11,0xd5] +// CHECK: msr trcacvr10, x13 // encoding: [0x2d,0x24,0x11,0xd5] +// CHECK: msr trcacvr11, x10 // encoding: [0x2a,0x26,0x11,0xd5] +// CHECK: msr trcacvr12, x19 // encoding: [0x33,0x28,0x11,0xd5] +// CHECK: msr trcacvr13, x10 // encoding: [0x2a,0x2a,0x11,0xd5] +// CHECK: msr trcacvr14, x19 // encoding: [0x33,0x2c,0x11,0xd5] +// CHECK: msr trcacvr15, x2 // encoding: [0x22,0x2e,0x11,0xd5] +// CHECK: msr trcacatr0, x15 // encoding: [0x4f,0x20,0x11,0xd5] +// CHECK: msr trcacatr1, x13 // encoding: [0x4d,0x22,0x11,0xd5] +// CHECK: msr trcacatr2, x8 // encoding: [0x48,0x24,0x11,0xd5] +// CHECK: msr trcacatr3, x1 // encoding: [0x41,0x26,0x11,0xd5] +// CHECK: msr trcacatr4, x11 // encoding: [0x4b,0x28,0x11,0xd5] +// CHECK: msr trcacatr5, x8 // encoding: [0x48,0x2a,0x11,0xd5] +// CHECK: msr trcacatr6, x24 // encoding: [0x58,0x2c,0x11,0xd5] +// CHECK: msr trcacatr7, x6 // encoding: [0x46,0x2e,0x11,0xd5] +// CHECK: msr trcacatr8, x23 // encoding: [0x77,0x20,0x11,0xd5] +// CHECK: msr trcacatr9, x5 // encoding: [0x65,0x22,0x11,0xd5] +// CHECK: msr trcacatr10, x11 // encoding: [0x6b,0x24,0x11,0xd5] +// CHECK: msr trcacatr11, x11 // encoding: [0x6b,0x26,0x11,0xd5] +// CHECK: msr trcacatr12, x3 // encoding: [0x63,0x28,0x11,0xd5] +// CHECK: msr trcacatr13, x28 // encoding: [0x7c,0x2a,0x11,0xd5] +// CHECK: msr trcacatr14, x25 // encoding: [0x79,0x2c,0x11,0xd5] +// CHECK: msr trcacatr15, x4 // encoding: [0x64,0x2e,0x11,0xd5] +// CHECK: msr trcdvcvr0, x6 // encoding: [0x86,0x20,0x11,0xd5] +// CHECK: msr trcdvcvr1, x3 // encoding: [0x83,0x24,0x11,0xd5] +// CHECK: msr trcdvcvr2, x5 // encoding: [0x85,0x28,0x11,0xd5] +// CHECK: msr trcdvcvr3, x11 // encoding: [0x8b,0x2c,0x11,0xd5] +// CHECK: msr trcdvcvr4, x9 // encoding: [0xa9,0x20,0x11,0xd5] +// CHECK: msr trcdvcvr5, x14 // encoding: [0xae,0x24,0x11,0xd5] +// CHECK: msr trcdvcvr6, x10 // encoding: [0xaa,0x28,0x11,0xd5] +// CHECK: msr trcdvcvr7, x12 // encoding: [0xac,0x2c,0x11,0xd5] +// CHECK: msr trcdvcmr0, x8 // encoding: [0xc8,0x20,0x11,0xd5] +// CHECK: msr trcdvcmr1, x8 // encoding: [0xc8,0x24,0x11,0xd5] +// CHECK: msr trcdvcmr2, x22 // encoding: [0xd6,0x28,0x11,0xd5] +// CHECK: msr trcdvcmr3, x22 // encoding: [0xd6,0x2c,0x11,0xd5] +// CHECK: msr trcdvcmr4, x5 // encoding: [0xe5,0x20,0x11,0xd5] +// CHECK: msr trcdvcmr5, x16 // encoding: [0xf0,0x24,0x11,0xd5] +// CHECK: msr trcdvcmr6, x27 // encoding: [0xfb,0x28,0x11,0xd5] +// CHECK: msr trcdvcmr7, x21 // encoding: [0xf5,0x2c,0x11,0xd5] +// CHECK: msr trccidcvr0, x8 // encoding: [0x08,0x30,0x11,0xd5] +// CHECK: msr trccidcvr1, x6 // encoding: [0x06,0x32,0x11,0xd5] +// CHECK: msr trccidcvr2, x9 // encoding: [0x09,0x34,0x11,0xd5] +// CHECK: msr trccidcvr3, x8 // encoding: [0x08,0x36,0x11,0xd5] +// CHECK: msr trccidcvr4, x3 // encoding: [0x03,0x38,0x11,0xd5] +// CHECK: msr trccidcvr5, x21 // encoding: [0x15,0x3a,0x11,0xd5] +// CHECK: msr trccidcvr6, x12 // encoding: [0x0c,0x3c,0x11,0xd5] +// CHECK: msr trccidcvr7, x7 // encoding: [0x07,0x3e,0x11,0xd5] +// CHECK: msr trcvmidcvr0, x4 // encoding: [0x24,0x30,0x11,0xd5] +// CHECK: msr trcvmidcvr1, x3 // encoding: [0x23,0x32,0x11,0xd5] +// CHECK: msr trcvmidcvr2, x9 // encoding: [0x29,0x34,0x11,0xd5] +// CHECK: msr trcvmidcvr3, x17 // encoding: [0x31,0x36,0x11,0xd5] +// CHECK: msr trcvmidcvr4, x14 // encoding: [0x2e,0x38,0x11,0xd5] +// CHECK: msr trcvmidcvr5, x12 // encoding: [0x2c,0x3a,0x11,0xd5] +// CHECK: msr trcvmidcvr6, x10 // encoding: [0x2a,0x3c,0x11,0xd5] +// CHECK: msr trcvmidcvr7, x3 // encoding: [0x23,0x3e,0x11,0xd5] +// CHECK: msr trccidcctlr0, x14 // encoding: [0x4e,0x30,0x11,0xd5] +// CHECK: msr trccidcctlr1, x22 // encoding: [0x56,0x31,0x11,0xd5] +// CHECK: msr trcvmidcctlr0, x8 // encoding: [0x48,0x32,0x11,0xd5] +// CHECK: msr trcvmidcctlr1, x15 // encoding: [0x4f,0x33,0x11,0xd5] +// CHECK: msr trcitctrl, x1 // encoding: [0x81,0x70,0x11,0xd5] +// CHECK: msr trcclaimset, x7 // encoding: [0xc7,0x78,0x11,0xd5] +// CHECK: msr trcclaimclr, x29 // encoding: [0xdd,0x79,0x11,0xd5] diff --git a/test/MC/ARM/2013-03-18-Br-to-label-named-like-reg.s b/test/MC/ARM/2013-03-18-Br-to-label-named-like-reg.s new file mode 100644 index 0000000..172abcf --- /dev/null +++ b/test/MC/ARM/2013-03-18-Br-to-label-named-like-reg.s @@ -0,0 +1,5 @@ +@ RUN: llvm-mc -arch arm %s +@ CHECK: test: +@ CHECK: br r1 +test: + bl r1 diff --git a/test/MC/ARM/arm-thumb-trustzone.s b/test/MC/ARM/arm-thumb-trustzone.s new file mode 100644 index 0000000..a080b3e --- /dev/null +++ b/test/MC/ARM/arm-thumb-trustzone.s @@ -0,0 +1,25 @@ +@ RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -show-encoding -mattr=-trustzone < %s | FileCheck %s -check-prefix=NOTZ +@ RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -show-encoding -mattr=trustzone < %s | FileCheck %s -check-prefix=TZ + + .syntax unified + .globl _func + +@ Check that the assembler processes SMC instructions when TrustZone support is +@ active and that it rejects them when this feature is not enabled + +_func: +@ CHECK: _func + + +@------------------------------------------------------------------------------ +@ SMC +@------------------------------------------------------------------------------ + smc #0xf + ite eq + smceq #0 + +@ NOTZ-NOT: smc #15 +@ NOTZ-NOT: smceq #0 +@ TZ: smc #15 @ encoding: [0xff,0xf7,0x00,0x80] +@ TZ: ite eq @ encoding: [0x0c,0xbf] +@ TZ: smceq #0 @ encoding: [0xf0,0xf7,0x00,0x80] diff --git a/test/MC/ARM/arm-trustzone.s b/test/MC/ARM/arm-trustzone.s new file mode 100644 index 0000000..69157f6 --- /dev/null +++ b/test/MC/ARM/arm-trustzone.s @@ -0,0 +1,24 @@ +@ RUN: llvm-mc -triple=armv7-apple-darwin -mcpu=cortex-a8 -show-encoding -mattr=-trustzone < %s | FileCheck %s -check-prefix=NOTZ +@ RUN: llvm-mc -triple=armv7-apple-darwin -mcpu=cortex-a8 -show-encoding -mattr=trustzone < %s | FileCheck %s -check-prefix=TZ + + .syntax unified + .globl _func + +@ Check that the assembler processes SMC instructions when TrustZone support is +@ active and that it rejects them when this feature is not enabled + +_func: +@ CHECK: _func + + +@------------------------------------------------------------------------------ +@ SMC +@------------------------------------------------------------------------------ + smc #0xf + smceq #0 + +@ NOTZ-NOT: smc #15 +@ NOTZ-NOT: smceq #0 +@ TZ: smc #15 @ encoding: [0x7f,0x00,0x60,0xe1] +@ TZ: smceq #0 @ encoding: [0x70,0x00,0x60,0x01] + diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s index 560a0d6..71b5b5d 100644 --- a/test/MC/ARM/basic-arm-instructions.s +++ b/test/MC/ARM/basic-arm-instructions.s @@ -1791,15 +1791,6 @@ Lforward: @ CHECK: shsub8gt r4, r8, r2 @ encoding: [0xf2,0x4f,0x38,0xc6] @------------------------------------------------------------------------------ -@ SMC -@------------------------------------------------------------------------------ - smc #0xf - smceq #0 - -@ CHECK: smc #15 @ encoding: [0x7f,0x00,0x60,0xe1] -@ CHECK: smceq #0 @ encoding: [0x70,0x00,0x60,0x01] - -@------------------------------------------------------------------------------ @ SMLABB/SMLABT/SMLATB/SMLATT @------------------------------------------------------------------------------ smlabb r3, r1, r9, r0 @@ -2318,7 +2309,7 @@ Lforward: strpl r3, [r10, #0]! @ CHECK: strpl r3, [r10, #-0]! @ encoding: [0x00,0x30,0x2a,0x55] -@ CHECK: strpl r3, [r10]! @ encoding: [0x00,0x30,0xaa,0x55] +@ CHECK: strpl r3, [r10, #0]! @ encoding: [0x00,0x30,0xaa,0x55] @------------------------------------------------------------------------------ @ SUB @@ -2879,7 +2870,6 @@ Lforward: wfilt yield yieldne - hint #5 hint #4 hint #3 hint #2 @@ -2892,7 +2882,6 @@ Lforward: @ CHECK: wfilt @ encoding: [0x03,0xf0,0x20,0xb3] @ CHECK: yield @ encoding: [0x01,0xf0,0x20,0xe3] @ CHECK: yieldne @ encoding: [0x01,0xf0,0x20,0x13] -@ CHECK: hint #5 @ encoding: [0x05,0xf0,0x20,0xe3] @ CHECK: sev @ encoding: [0x04,0xf0,0x20,0xe3] @ CHECK: wfi @ encoding: [0x03,0xf0,0x20,0xe3] @ CHECK: wfe @ encoding: [0x02,0xf0,0x20,0xe3] diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s index 9278a2a..8127feb 100644 --- a/test/MC/ARM/basic-thumb2-instructions.s +++ b/test/MC/ARM/basic-thumb2-instructions.s @@ -3486,8 +3486,6 @@ _func: wfelt wfige yieldlt - hint #5 - hint.w #5 hint.w #4 hint #3 hint #2 @@ -3501,8 +3499,6 @@ _func: @ CHECK: wfelt @ encoding: [0x20,0xbf] @ CHECK: wfige @ encoding: [0x30,0xbf] @ CHECK: yieldlt @ encoding: [0x10,0xbf] -@ CHECK: hint #5 @ encoding: [0xaf,0xf3,0x05,0x80] -@ CHECK: hint #5 @ encoding: [0xaf,0xf3,0x05,0x80] @ CHECK: sev.w @ encoding: [0xaf,0xf3,0x04,0x80] @ CHECK: wfi.w @ encoding: [0xaf,0xf3,0x03,0x80] @ CHECK: wfe.w @ encoding: [0xaf,0xf3,0x02,0x80] diff --git a/test/MC/ARM/cxx-global-constructor.ll b/test/MC/ARM/cxx-global-constructor.ll index e06d2c7..4afd1e1 100644 --- a/test/MC/ARM/cxx-global-constructor.ll +++ b/test/MC/ARM/cxx-global-constructor.ll @@ -1,5 +1,5 @@ ; RUN: llc %s -mtriple=armv7-linux-gnueabi -relocation-model=pic \ -; RUN: -filetype=obj -o - | elf-dump --dump-section-data | FileCheck %s +; RUN: -filetype=obj -o - | llvm-readobj -r | FileCheck %s @llvm.global_ctors = appending global [1 x { i32, void ()* }] [{ i32, void ()* } { i32 65535, void ()* @f }] @@ -9,4 +9,5 @@ define void @f() { } ; Check for a relocation of type R_ARM_TARGET1. -; CHECK: ('r_type', 0x26) +; CHECK: Relocations [ +; CHECK: 0x{{[0-9,A-F]+}} R_ARM_TARGET1 diff --git a/test/MC/ARM/data-in-code.ll b/test/MC/ARM/data-in-code.ll index c2feec5..e3325b6 100644 --- a/test/MC/ARM/data-in-code.ll +++ b/test/MC/ARM/data-in-code.ll @@ -1,8 +1,8 @@ ;; RUN: llc -O0 -mtriple=armv7-linux-gnueabi -filetype=obj %s -o - | \ -;; RUN: elf-dump | FileCheck -check-prefix=ARM %s +;; RUN: llvm-readobj -t | FileCheck -check-prefix=ARM %s ;; RUN: llc -O0 -mtriple=thumbv7-linux-gnueabi -filetype=obj %s -o - | \ -;; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=TMB %s +;; RUN: llvm-readobj -t | FileCheck -check-prefix=TMB %s ;; Ensure that if a jump table is generated that it has Mapping Symbols ;; marking the data-in-code region. @@ -108,68 +108,68 @@ exit: ret void } -;; ARM: # Symbol 2 -;; ARM-NEXT: $a -;; ARM-NEXT: 'st_value', 0x00000000 -;; ARM-NEXT: 'st_size', 0x00000000 -;; ARM-NEXT: 'st_bind', 0x0 -;; ARM-NEXT: 'st_type', 0x0 -;; ARM-NEXT: 'st_other' -;; ARM-NEXT: 'st_shndx', [[MIXED_SECT:0x[0-9a-f]+]] - -;; ARM: # Symbol 3 -;; ARM-NEXT: $a -;; ARM-NEXT: 'st_value', 0x000000ac -;; ARM-NEXT: 'st_size', 0x00000000 -;; ARM-NEXT: 'st_bind', 0x0 -;; ARM-NEXT: 'st_type', 0x0 -;; ARM-NEXT: 'st_other' -;; ARM-NEXT: 'st_shndx', [[MIXED_SECT]] - -;; ARM: # Symbol 4 -;; ARM-NEXT: $d -;; ARM-NEXT: 'st_value', 0x00000000 -;; ARM-NEXT: 'st_size', 0x00000000 -;; ARM-NEXT: 'st_bind', 0x0 -;; ARM-NEXT: 'st_type', 0x0 - -;; ARM: # Symbol 5 -;; ARM-NEXT: $d -;; ARM-NEXT: 'st_value', 0x00000030 -;; ARM-NEXT: 'st_size', 0x00000000 -;; ARM-NEXT: 'st_bind', 0x0 -;; ARM-NEXT: 'st_type', 0x0 -;; ARM-NEXT: 'st_other' -;; ARM-NEXT: 'st_shndx', [[MIXED_SECT]] +;; ARM: Symbol { +;; ARM: Name: $a +;; ARM-NEXT: Value: 0x0 +;; ARM-NEXT: Size: 0 +;; ARM-NEXT: Binding: Local +;; ARM-NEXT: Type: None +;; ARM-NEXT: Other: +;; ARM-NEXT: Section: [[MIXED_SECT:[^ ]+]] + +;; ARM: Symbol { +;; ARM: Name: $a +;; ARM-NEXT: Value: 0xAC +;; ARM-NEXT: Size: 0 +;; ARM-NEXT: Binding: Local +;; ARM-NEXT: Type: None +;; ARM-NEXT: Other: +;; ARM-NEXT: Section: [[MIXED_SECT]] + +;; ARM: Symbol { +;; ARM: Name: $d +;; ARM-NEXT: Value: 0 +;; ARM-NEXT: Size: 0 +;; ARM-NEXT: Binding: Local +;; ARM-NEXT: Type: None + +;; ARM: Symbol { +;; ARM: Name: $d +;; ARM-NEXT: Value: 0x30 +;; ARM-NEXT: Size: 0 +;; ARM-NEXT: Binding: Local +;; ARM-NEXT: Type: None +;; ARM-NEXT: Other: +;; ARM-NEXT: Section: [[MIXED_SECT]] ;; ARM-NOT: ${{[atd]}} -;; TMB: # Symbol 3 -;; TMB-NEXT: $d -;; TMB-NEXT: 'st_value', 0x00000016 -;; TMB-NEXT: 'st_size', 0x00000000 -;; TMB-NEXT: 'st_bind', 0x0 -;; TMB-NEXT: 'st_type', 0x0 -;; TMB-NEXT: 'st_other' -;; TMB-NEXT: 'st_shndx', [[MIXED_SECT:0x[0-9a-f]+]] - -;; TMB: # Symbol 4 -;; TMB-NEXT: $t -;; TMB-NEXT: 'st_value', 0x00000000 -;; TMB-NEXT: 'st_size', 0x00000000 -;; TMB-NEXT: 'st_bind', 0x0 -;; TMB-NEXT: 'st_type', 0x0 -;; TMB-NEXT: 'st_other' -;; TMB-NEXT: 'st_shndx', [[MIXED_SECT]] - -;; TMB: # Symbol 5 -;; TMB-NEXT: $t -;; TMB-NEXT: 'st_value', 0x00000036 -;; TMB-NEXT: 'st_size', 0x00000000 -;; TMB-NEXT: 'st_bind', 0x0 -;; TMB-NEXT: 'st_type', 0x0 -;; TMB-NEXT: 'st_other' -;; TMB-NEXT: 'st_shndx', [[MIXED_SECT]] +;; TMB: Symbol { +;; TMB: Name: $d.2 +;; TMB-NEXT: Value: 0x16 +;; TMB-NEXT: Size: 0 +;; TMB-NEXT: Binding: Local +;; TMB-NEXT: Type: None +;; TMB-NEXT: Other: +;; TMB-NEXT: Section: [[MIXED_SECT:[^ ]+]] + +;; TMB: Symbol { +;; TMB: Name: $t +;; TMB-NEXT: Value: 0x0 +;; TMB-NEXT: Size: 0 +;; TMB-NEXT: Binding: Local +;; TMB-NEXT: Type: None +;; TMB-NEXT: Other: +;; TMB-NEXT: Section: [[MIXED_SECT]] + +;; TMB: Symbol { +;; TMB: Name: $t +;; TMB-NEXT: Value: 0x36 +;; TMB-NEXT: Size: 0 +;; TMB-NEXT: Binding: Local +;; TMB-NEXT: Type: None +;; TMB-NEXT: Other: +;; TMB-NEXT: Section: [[MIXED_SECT]] ;; TMB-NOT: ${{[atd]}} diff --git a/test/MC/ARM/elf-eflags-eabi-cg.ll b/test/MC/ARM/elf-eflags-eabi-cg.ll index 2e86a0f..0b9de7f 100644 --- a/test/MC/ARM/elf-eflags-eabi-cg.ll +++ b/test/MC/ARM/elf-eflags-eabi-cg.ll @@ -1,7 +1,7 @@ ; Codegen version to check for ELF header flags. ; ; RUN: llc %s -mtriple=thumbv7-linux-gnueabi -relocation-model=pic \ -; RUN: -filetype=obj -o - | elf-dump --dump-section-data | \ +; RUN: -filetype=obj -o - | llvm-readobj -h | \ ; RUN: FileCheck %s define void @bar() nounwind { @@ -10,4 +10,5 @@ entry: } ; For now the only e_flag set is EF_ARM_EABI_VER5 -;CHECK: 'e_flags', 0x05000000 +; CHECK: ElfHeader { +; CHECK: Flags [ (0x5000000) diff --git a/test/MC/ARM/elf-eflags-eabi.s b/test/MC/ARM/elf-eflags-eabi.s index ea89eac..fe0b6c0 100644 --- a/test/MC/ARM/elf-eflags-eabi.s +++ b/test/MC/ARM/elf-eflags-eabi.s @@ -1,5 +1,5 @@ @ RUN: llvm-mc %s -triple=armv7-linux-gnueabi -filetype=obj -o - | \ -@ RUN: elf-dump --dump-section-data | FileCheck -check-prefix=OBJ %s +@ RUN: llvm-readobj -h | FileCheck -check-prefix=OBJ %s .syntax unified .text .globl barf @@ -10,4 +10,5 @@ barf: @ @barf b foo @@@ make sure the EF_ARM_EABIMASK comes out OK -@OBJ: 'e_flags', 0x05000000 +@OBJ: ElfHeader { +@OBJ: Flags [ (0x5000000) diff --git a/test/MC/ARM/elf-movt.s b/test/MC/ARM/elf-movt.s index 02bb5a6..74b3c9f 100644 --- a/test/MC/ARM/elf-movt.s +++ b/test/MC/ARM/elf-movt.s @@ -1,6 +1,6 @@ @ RUN: llvm-mc %s -triple=armv7-linux-gnueabi | FileCheck -check-prefix=ASM %s @ RUN: llvm-mc %s -triple=armv7-linux-gnueabi -filetype=obj -o - | \ -@ RUN: elf-dump --dump-section-data | FileCheck -check-prefix=OBJ %s +@ RUN: llvm-readobj -s -sd -sr | FileCheck -check-prefix=OBJ %s .syntax unified .text .globl barf @@ -15,25 +15,24 @@ barf: @ @barf @ ASM-NEXT: movt r0, :upper16:(GOT-(.LPC0_2+8)) @@ make sure that the text section fixups are sane too -@ OBJ: '.text' -@ OBJ-NEXT: 'sh_type', 0x00000001 -@ OBJ-NEXT: 'sh_flags', 0x00000006 -@ OBJ-NEXT: 'sh_addr', 0x00000000 -@ OBJ-NEXT: 'sh_offset', 0x00000034 -@ OBJ-NEXT: 'sh_size', 0x00000008 -@ OBJ-NEXT: 'sh_link', 0x00000000 -@ OBJ-NEXT: 'sh_info', 0x00000000 -@ OBJ-NEXT: 'sh_addralign', 0x00000004 -@ OBJ-NEXT: 'sh_entsize', 0x00000000 -@ OBJ-NEXT: '_section_data', 'f00f0fe3 f40f4fe3' - -@ OBJ: Relocation 0 -@ OBJ-NEXT: 'r_offset', 0x00000000 -@ OBJ-NEXT: 'r_sym' -@ OBJ-NEXT: 'r_type', 0x2d - -@ OBJ: Relocation 1 -@ OBJ-NEXT: 'r_offset', 0x00000004 -@ OBJ-NEXT: 'r_sym' -@ OBJ-NEXT: 'r_type', 0x2e - +@ OBJ: Section { +@ OBJ: Name: .text +@ OBJ-NEXT: Type: SHT_PROGBITS +@ OBJ-NEXT: Flags [ (0x6) +@ OBJ-NEXT: SHF_ALLOC +@ OBJ-NEXT: SHF_EXECINSTR +@ OBJ-NEXT: ] +@ OBJ-NEXT: Address: 0x0 +@ OBJ-NEXT: Offset: 0x34 +@ OBJ-NEXT: Size: 8 +@ OBJ-NEXT: Link: 0 +@ OBJ-NEXT: Info: 0 +@ OBJ-NEXT: AddressAlignment: 4 +@ OBJ-NEXT: EntrySize: 0 +@ OBJ-NEXT: Relocations [ +@ OBJ-NEXT: 0x0 R_ARM_MOVW_PREL_NC +@ OBJ-NEXT: 0x4 R_ARM_MOVT_PREL +@ OBJ-NEXT: ] +@ OBJ-NEXT: SectionData ( +@ OBJ-NEXT: 0000: F00F0FE3 F40F4FE3 +@ OBJ-NEXT: ) diff --git a/test/MC/ARM/elf-reloc-01.ll b/test/MC/ARM/elf-reloc-01.ll index 3ebd7c6..9b5dbd9 100644 --- a/test/MC/ARM/elf-reloc-01.ll +++ b/test/MC/ARM/elf-reloc-01.ll @@ -1,7 +1,7 @@ ;; RUN: llc -mtriple=armv7-linux-gnueabi -O3 \ ;; RUN: -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2 -arm-reserve-r9 \ ;; RUN: -filetype=obj %s -o - | \ -;; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=OBJ %s +;; RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s ;; FIXME: This file needs to be in .s form! ;; The args to llc are there to constrain the codegen only. @@ -60,11 +60,8 @@ bb3: ; preds = %bb, %entry declare void @exit(i32) noreturn nounwind -;; OBJ: Relocation 1 -;; OBJ-NEXT: 'r_offset', -;; OBJ-NEXT: 'r_sym', 0x000007 -;; OBJ-NEXT: 'r_type', 0x2b - -;; OBJ: Symbol 7 -;; OBJ-NEXT: '_MergedGlobals' -;; OBJ-NEXT: 'st_value', 0x00000010 +; OBJ: Relocations [ +; OBJ: Section (1) .text { +; OBJ: 0x{{[0-9,A-F]+}} R_ARM_MOVW_ABS_NC _MergedGlobals +; OBJ: } +; OBJ: ] diff --git a/test/MC/ARM/elf-reloc-02.ll b/test/MC/ARM/elf-reloc-02.ll index 6b6b03c..f021764 100644 --- a/test/MC/ARM/elf-reloc-02.ll +++ b/test/MC/ARM/elf-reloc-02.ll @@ -1,7 +1,7 @@ ;; RUN: llc -mtriple=armv7-linux-gnueabi -O3 \ ;; RUN: -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2 -arm-reserve-r9 \ ;; RUN: -filetype=obj %s -o - | \ -;; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=OBJ %s +;; RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s ;; FIXME: This file needs to be in .s form! ;; The args to llc are there to constrain the codegen only. @@ -41,10 +41,8 @@ declare i32 @write(...) declare void @exit(i32) noreturn nounwind -;; OBJ: Relocation 0 -;; OBJ-NEXT: 'r_offset', -;; OBJ-NEXT: 'r_sym', 0x000005 -;; OBJ-NEXT: 'r_type', 0x2b - -;; OBJ: Symbol 5 -;; OBJ-NEXT: '.L.str' +;; OBJ: Relocations [ +;; OBJ: Section (1) .text { +;; OBJ-NEXT: 0x{{[0-9,A-F]+}} R_ARM_MOVW_ABS_NC .L.str +;; OBJ: } +;; OBJ: ] diff --git a/test/MC/ARM/elf-reloc-03.ll b/test/MC/ARM/elf-reloc-03.ll index 87f91c1..ac46e69 100644 --- a/test/MC/ARM/elf-reloc-03.ll +++ b/test/MC/ARM/elf-reloc-03.ll @@ -1,7 +1,7 @@ ;; RUN: llc -mtriple=armv7-linux-gnueabi -O3 \ ;; RUN: -mcpu=cortex-a8 -mattr=-neon -mattr=+vfp2 -arm-reserve-r9 \ ;; RUN: -filetype=obj %s -o - | \ -;; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=OBJ %s +;; RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s ;; FIXME: This file needs to be in .s form! ;; The args to llc are there to constrain the codegen only. @@ -88,10 +88,8 @@ entry: declare void @exit(i32) noreturn nounwind -;; OBJ: Relocation 1 -;; OBJ-NEXT: 'r_offset', -;; OBJ-NEXT: 'r_sym', 0x000010 -;; OBJ-NEXT: 'r_type', 0x2b - -;; OBJ: Symbol 16 -;; OBJ-NEXT: 'vtable' +;; OBJ: Relocations [ +;; OBJ: Section (1) .text { +;; OBJ: 0x{{[0-9,A-F]+}} R_ARM_MOVW_ABS_NC vtable +;; OBJ: } +;; OBJ: ] diff --git a/test/MC/ARM/elf-reloc-condcall.s b/test/MC/ARM/elf-reloc-condcall.s index 3fafb43..612942f 100644 --- a/test/MC/ARM/elf-reloc-condcall.s +++ b/test/MC/ARM/elf-reloc-condcall.s @@ -1,33 +1,18 @@ // RUN: llvm-mc -triple=armv7-linux-gnueabi -filetype=obj %s -o - | \ -// RUN: elf-dump | FileCheck -check-prefix=OBJ %s +// RUN: llvm-readobj -r | FileCheck -check-prefix=OBJ %s bleq some_label bl some_label blx some_label beq some_label b some_label -// OBJ: .rel.text -// OBJ: 'r_offset', 0x00000000 -// OBJ-NEXT: 'r_sym', 0x000005 -// OBJ-NEXT: 'r_type', 0x1d - -// OBJ: 'r_offset', 0x00000004 -// OBJ-NEXT: 'r_sym', 0x000005 -// OBJ-NEXT: 'r_type', 0x1c - -// OBJ: 'r_offset', 0x00000008 -// OBJ-NEXT: 'r_sym', 0x000005 -// OBJ-NEXT: 'r_type', 0x1c - -// OBJ: 'r_offset', 0x0000000c -// OBJ-NEXT: 'r_sym', 0x000005 -// OBJ-NEXT: 'r_type', 0x1d - -// OBJ: 'r_offset', 0x00000010 -// OBJ-NEXT: 'r_sym', 0x000005 -// OBJ-NEXT: 'r_type', 0x1d - -// OBJ: .symtab -// OBJ: Symbol 5 -// OBJ-NEXT: some_label +// OBJ: Relocations [ +// OBJ-NEXT: Section (1) .text { +// OBJ-NEXT: 0x0 R_ARM_JUMP24 some_label 0x0 +// OBJ-NEXT: 0x4 R_ARM_CALL some_label 0x0 +// OBJ-NEXT: 0x8 R_ARM_CALL some_label 0x0 +// OBJ-NEXT: 0xC R_ARM_JUMP24 some_label 0x0 +// OBJ-NEXT: 0x10 R_ARM_JUMP24 some_label 0x0 +// OBJ-NEXT: } +// OBJ-NEXT: ] diff --git a/test/MC/ARM/elf-thumbfunc-reloc.ll b/test/MC/ARM/elf-thumbfunc-reloc.ll index b2f253d..e7d2c34 100644 --- a/test/MC/ARM/elf-thumbfunc-reloc.ll +++ b/test/MC/ARM/elf-thumbfunc-reloc.ll @@ -1,5 +1,5 @@ ; RUN: llc %s -mtriple=thumbv7-linux-gnueabi -relocation-model=pic \ -; RUN: -filetype=obj -o - | elf-dump --dump-section-data | \ +; RUN: -filetype=obj -o - | llvm-readobj -s -sd -r -t | \ ; RUN: FileCheck %s ; FIXME: This file needs to be in .s form! @@ -22,16 +22,20 @@ entry: ; make sure that bl 0 <foo> (fff7feff) is correctly encoded -; CHECK: '_section_data', '704700bf 2de90048 fff7feff bde80088' - -; Offset Info Type Sym.Value Sym. Name -; 00000008 0000070a R_ARM_THM_CALL 00000001 foo -; CHECK: Relocation 0 -; CHECK-NEXT: 'r_offset', 0x00000008 -; CHECK-NEXT: 'r_sym', 0x000009 -; CHECK-NEXT: 'r_type', 0x0a +; CHECK: Sections [ +; CHECK: SectionData ( +; CHECK: 0000: 704700BF 2DE90048 FFF7FEFF BDE80088 +; CHECK: ) +; CHECK: ] + +; CHECK: Relocations [ +; CHECK-NEXT: Section (1) .text { +; CHECK-NEXT: 0x8 R_ARM_THM_CALL foo 0x0 +; CHECK-NEXT: } +; CHECK-NEXT: ] ; make sure foo is thumb function: bit 0 = 1 -; CHECK: Symbol 9 -; CHECK-NEXT: 'foo' -; CHECK-NEXT: 'st_value', 0x00000001 +; CHECK: Symbols [ +; CHECK: Symbol { +; CHECK: Name: foo +; CHECK-NEXT: Value: 0x1 diff --git a/test/MC/ARM/elf-thumbfunc-reloc.s b/test/MC/ARM/elf-thumbfunc-reloc.s index 4a311dd..87a26d8 100644 --- a/test/MC/ARM/elf-thumbfunc-reloc.s +++ b/test/MC/ARM/elf-thumbfunc-reloc.s @@ -1,6 +1,6 @@ @@ test st_value bit 0 of thumb function @ RUN: llvm-mc %s -triple=arm-freebsd-eabi -filetype=obj -o - | \ -@ RUN: elf-dump | FileCheck %s +@ RUN: llvm-readobj -r | FileCheck %s .syntax unified @@ -17,7 +17,8 @@ f: pop {r7, pc} @@ make sure an R_ARM_THM_CALL relocation is generated for the call to g -@CHECK: ('_relocations', [ -@CHECK: (('r_offset', 0x00000004) -@CHECK-NEXT: ('r_sym', 0x{{[0-9a-fA-F]+}}) -@CHECK-NEXT: ('r_type', 0x0a) +@CHECK: Relocations [ +@CHECK-NEXT: Section (1) .text { +@CHECK-NEXT: 0x4 R_ARM_THM_CALL g 0x0 +@CHECK-NEXT: } +@CHECK-NEXT: ] diff --git a/test/MC/ARM/elf-thumbfunc.s b/test/MC/ARM/elf-thumbfunc.s index 91b2eee..26f5f0b 100644 --- a/test/MC/ARM/elf-thumbfunc.s +++ b/test/MC/ARM/elf-thumbfunc.s @@ -1,6 +1,6 @@ @@ test st_value bit 0 of thumb function @ RUN: llvm-mc %s -triple=thumbv7-linux-gnueabi -filetype=obj -o - | \ -@ RUN: elf-dump | FileCheck %s +@ RUN: llvm-readobj -t | FileCheck %s .syntax unified .text .globl foo @@ -12,9 +12,9 @@ foo: bx lr @@ make sure foo is thumb function: bit 0 = 1 (st_value) -@CHECK: Symbol 5 -@CHECK-NEXT: 'st_name', 0x00000001 -@CHECK-NEXT: 'st_value', 0x00000001 -@CHECK-NEXT: 'st_size', 0x00000000 -@CHECK-NEXT: 'st_bind', 0x1 -@CHECK-NEXT: 'st_type', 0x2 +@CHECK: Symbol { +@CHECK: Name: foo +@CHECK-NEXT: Value: 0x1 +@CHECK-NEXT: Size: 0 +@CHECK-NEXT: Binding: Global +@CHECK-NEXT: Type: Function diff --git a/test/MC/ARM/invalid-hint-arm.s b/test/MC/ARM/invalid-hint-arm.s new file mode 100644 index 0000000..e0cd97a --- /dev/null +++ b/test/MC/ARM/invalid-hint-arm.s @@ -0,0 +1,7 @@ +@ RUN: llvm-mc -triple=armv7-apple-darwin -mcpu=cortex-a8 < %s 2>&1 | FileCheck %s + +hint #5 +hint #100 + +@ CHECK: error: immediate operand must be in the range [0,4] +@ CHECK: error: immediate operand must be in the range [0,4] diff --git a/test/MC/ARM/invalid-hint-thumb.s b/test/MC/ARM/invalid-hint-thumb.s new file mode 100644 index 0000000..fd0a761 --- /dev/null +++ b/test/MC/ARM/invalid-hint-thumb.s @@ -0,0 +1,9 @@ +@ RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 < %s 2>&1 | FileCheck %s + +hint #5 +hint.w #5 +hint #100 + +@ CHECK: error: immediate operand must be in the range [0,4] +@ CHECK: error: immediate operand must be in the range [0,4] +@ CHECK: error: immediate operand must be in the range [0,4] diff --git a/test/MC/ARM/neon-cmp-encoding.s b/test/MC/ARM/neon-cmp-encoding.s index b3aedb8..cffbeab 100644 --- a/test/MC/ARM/neon-cmp-encoding.s +++ b/test/MC/ARM/neon-cmp-encoding.s @@ -174,3 +174,24 @@ @ CHECK: vcge.u16 q8, q9, q8 @ encoding: [0xf0,0x03,0x52,0xf3] @ CHECK: vcge.u32 q8, q9, q8 @ encoding: [0xf0,0x03,0x62,0xf3] @ CHECK: vcge.f32 q8, q9, q8 @ encoding: [0xe0,0x0e,0x42,0xf3] + + +@ VACLT is an alias for VACGT w/ the source operands reversed. +@ VACLE is an alias for VACGE w/ the source operands reversed. + vaclt.f32 q9, q11, q12 + vaclt.f32 d9, d11, d12 + vaclt.f32 q11, q12 + vaclt.f32 d11, d12 + vacle.f32 q9, q11, q12 + vacle.f32 d9, d11, d12 + vacle.f32 q11, q12 + vacle.f32 d11, d12 + +@ CHECK: vacgt.f32 q9, q12, q11 @ encoding: [0xf6,0x2e,0x68,0xf3] +@ CHECK: vacgt.f32 d9, d12, d11 @ encoding: [0x1b,0x9e,0x2c,0xf3] +@ CHECK: vacgt.f32 q11, q12, q11 @ encoding: [0xf6,0x6e,0x68,0xf3] +@ CHECK: vacgt.f32 d11, d12, d11 @ encoding: [0x1b,0xbe,0x2c,0xf3] +@ CHECK: vacge.f32 q9, q12, q11 @ encoding: [0xf6,0x2e,0x48,0xf3] +@ CHECK: vacge.f32 d9, d12, d11 @ encoding: [0x1b,0x9e,0x0c,0xf3] +@ CHECK: vacge.f32 q11, q12, q11 @ encoding: [0xf6,0x6e,0x48,0xf3] +@ CHECK: vacge.f32 d11, d12, d11 @ encoding: [0x1b,0xbe,0x0c,0xf3] diff --git a/test/MC/ARM/xscale-attributes.ll b/test/MC/ARM/xscale-attributes.ll index 3ccf02b..d1e9931 100644 --- a/test/MC/ARM/xscale-attributes.ll +++ b/test/MC/ARM/xscale-attributes.ll @@ -2,7 +2,7 @@ ; RUN: FileCheck -check-prefix=ASM %s ; RUN: llc %s -mtriple=thumbv5-linux-gnueabi -filetype=obj \ -; RUN: -mcpu=xscale -o - | elf-dump --dump-section-data | \ +; RUN: -mcpu=xscale -o - | llvm-readobj -s -sd | \ ; RUN: FileCheck -check-prefix=OBJ %s ; FIXME: The OBJ test should be a .s to .o test and the ASM test should @@ -17,15 +17,22 @@ entry: ; ASM-NEXT: .eabi_attribute 8, 1 ; ASM-NEXT: .eabi_attribute 9, 1 -; OBJ: Section 4 -; OBJ-NEXT: 'sh_name', 0x0000000c -; OBJ-NEXT: 'sh_type', 0x70000003 -; OBJ-NEXT: 'sh_flags', 0x00000000 -; OBJ-NEXT: 'sh_addr', 0x00000000 -; OBJ-NEXT: 'sh_offset', 0x00000038 -; OBJ-NEXT: 'sh_size', 0x00000020 -; OBJ-NEXT: 'sh_link', 0x00000000 -; OBJ-NEXT: 'sh_info', 0x00000000 -; OBJ-NEXT: 'sh_addralign', 0x00000001 -; OBJ-NEXT: 'sh_entsize', 0x00000000 -; OBJ-NEXT: '_section_data', '411f0000 00616561 62690001 15000000 06050801 09011401 15011703 18011901' +; OBJ: Sections [ +; OBJ: Section { +; OBJ: Index: 4 +; OBJ-NEXT: Name: .ARM.attributes (12) +; OBJ-NEXT: Type: SHT_ARM_ATTRIBUTES +; OBJ-NEXT: Flags [ (0x0) +; OBJ-NEXT: ] +; OBJ-NEXT: Address: 0x0 +; OBJ-NEXT: Offset: 0x38 +; OBJ-NEXT: Size: 32 +; OBJ-NEXT: Link: 0 +; OBJ-NEXT: Info: 0 +; OBJ-NEXT: AddressAlignment: 1 +; OBJ-NEXT: EntrySize: 0 +; OBJ-NEXT: SectionData ( +; OBJ-NEXT: 0000: 411F0000 00616561 62690001 15000000 +; OBJ-NEXT: 0010: 06050801 09011401 15011703 18011901 +; OBJ-NEXT: ) +; OBJ-NEXT: } diff --git a/test/MC/AsmParser/section.s b/test/MC/AsmParser/section.s index 5abacc7..0c3828d 100644 --- a/test/MC/AsmParser/section.s +++ b/test/MC/AsmParser/section.s @@ -1,5 +1,5 @@ # RUN: llvm-mc -triple i386-pc-linux-gnu -filetype=obj -o %t %s -# RUN: elf-dump --dump-section-data < %t | FileCheck %s +# RUN: llvm-readobj -s -sd < %t | FileCheck %s .section test1 .byte 1 .section test2 @@ -45,63 +45,85 @@ .previous .byte 1 .previous -# CHECK: (('sh_name', 0x00000044) # 'test1' -# CHECK-NEXT: ('sh_type', 0x00000001) -# CHECK-NEXT: ('sh_flags', 0x00000000) -# CHECK-NEXT: ('sh_addr', 0x00000000) -# CHECK-NEXT: ('sh_offset', 0x00000034) -# CHECK-NEXT: ('sh_size', 0x00000007) -# CHECK-NEXT: ('sh_link', 0x00000000) -# CHECK-NEXT: ('sh_info', 0x00000000) -# CHECK-NEXT: ('sh_addralign', 0x00000001) -# CHECK-NEXT: ('sh_entsize', 0x00000000) -# CHECK-NEXT: ('_section_data', '01010101 010101') -# CHECK-NEXT: ), -# CHECK: (('sh_name', 0x0000003e) # 'test2' -# CHECK-NEXT: ('sh_type', 0x00000001) -# CHECK-NEXT: ('sh_flags', 0x00000000) -# CHECK-NEXT: ('sh_addr', 0x00000000) -# CHECK-NEXT: ('sh_offset', 0x0000003b) -# CHECK-NEXT: ('sh_size', 0x00000006) -# CHECK-NEXT: ('sh_link', 0x00000000) -# CHECK-NEXT: ('sh_info', 0x00000000) -# CHECK-NEXT: ('sh_addralign', 0x00000001) -# CHECK-NEXT: ('sh_entsize', 0x00000000) -# CHECK-NEXT: ('_section_data', '02020202 0202') -# CHECK-NEXT: ), -# CHECK: (('sh_name', 0x00000038) # 'test3' -# CHECK-NEXT: ('sh_type', 0x00000001) -# CHECK-NEXT: ('sh_flags', 0x00000000) -# CHECK-NEXT: ('sh_addr', 0x00000000) -# CHECK-NEXT: ('sh_offset', 0x00000041) -# CHECK-NEXT: ('sh_size', 0x00000005) -# CHECK-NEXT: ('sh_link', 0x00000000) -# CHECK-NEXT: ('sh_info', 0x00000000) -# CHECK-NEXT: ('sh_addralign', 0x00000001) -# CHECK-NEXT: ('sh_entsize', 0x00000000) -# CHECK-NEXT: ('_section_data', '03030303 03') -# CHECK-NEXT: ), -# CHECK: (('sh_name', 0x00000032) # 'test4' -# CHECK-NEXT: ('sh_type', 0x00000001) -# CHECK-NEXT: ('sh_flags', 0x00000000) -# CHECK-NEXT: ('sh_addr', 0x00000000) -# CHECK-NEXT: ('sh_offset', 0x00000046) -# CHECK-NEXT: ('sh_size', 0x00000003) -# CHECK-NEXT: ('sh_link', 0x00000000) -# CHECK-NEXT: ('sh_info', 0x00000000) -# CHECK-NEXT: ('sh_addralign', 0x00000001) -# CHECK-NEXT: ('sh_entsize', 0x00000000) -# CHECK-NEXT: ('_section_data', '040404') -# CHECK-NEXT: ), -# CHECK: (('sh_name', 0x0000002c) # 'test5' -# CHECK-NEXT: ('sh_type', 0x00000001) -# CHECK-NEXT: ('sh_flags', 0x00000000) -# CHECK-NEXT: ('sh_addr', 0x00000000) -# CHECK-NEXT: ('sh_offset', 0x00000049) -# CHECK-NEXT: ('sh_size', 0x00000001) -# CHECK-NEXT: ('sh_link', 0x00000000) -# CHECK-NEXT: ('sh_info', 0x00000000) -# CHECK-NEXT: ('sh_addralign', 0x00000001) -# CHECK-NEXT: ('sh_entsize', 0x00000000) -# CHECK-NEXT: ('_section_data', '05') -# CHECK-NEXT: ), + +# CHECK: Sections [ +# CHECK: Section { +# CHECK: Name: test1 (68) +# CHECK-NEXT: Type: SHT_PROGBITS +# CHECK-NEXT: Flags [ (0x0) +# CHECK-NEXT: ] +# CHECK-NEXT: Address: 0x0 +# CHECK-NEXT: Offset: 0x34 +# CHECK-NEXT: Size: 7 +# CHECK-NEXT: Link: 0 +# CHECK-NEXT: Info: 0 +# CHECK-NEXT: AddressAlignment: 1 +# CHECK-NEXT: EntrySize: 0 +# CHECK-NEXT: SectionData ( +# CHECK-NEXT: 0000: 01010101 010101 +# CHECK-NEXT: ) +# CHECK-NEXT: } +# CHECK: Section { +# CHECK: Name: test2 (62) +# CHECK-NEXT: Type: SHT_PROGBITS +# CHECK-NEXT: Flags [ (0x0) +# CHECK-NEXT: ] +# CHECK-NEXT: Address: 0x0 +# CHECK-NEXT: Offset: 0x3B +# CHECK-NEXT: Size: 6 +# CHECK-NEXT: Link: 0 +# CHECK-NEXT: Info: 0 +# CHECK-NEXT: AddressAlignment: 1 +# CHECK-NEXT: EntrySize: 0 +# CHECK-NEXT: SectionData ( +# CHECK-NEXT: 0000: 02020202 0202 +# CHECK-NEXT: ) +# CHECK-NEXT: } +# CHECK: Section { +# CHECK: Name: test3 (56) +# CHECK-NEXT: Type: SHT_PROGBITS +# CHECK-NEXT: Flags [ (0x0) +# CHECK-NEXT: ] +# CHECK-NEXT: Address: 0x0 +# CHECK-NEXT: Offset: 0x41 +# CHECK-NEXT: Size: 5 +# CHECK-NEXT: Link: 0 +# CHECK-NEXT: Info: 0 +# CHECK-NEXT: AddressAlignment: 1 +# CHECK-NEXT: EntrySize: 0 +# CHECK-NEXT: SectionData ( +# CHECK-NEXT: 0000: 03030303 03 +# CHECK-NEXT: ) +# CHECK-NEXT: } +# CHECK: Section { +# CHECK: Name: test4 (50) +# CHECK-NEXT: Type: SHT_PROGBITS +# CHECK-NEXT: Flags [ (0x0) +# CHECK-NEXT: ] +# CHECK-NEXT: Address: 0x0 +# CHECK-NEXT: Offset: 0x46 +# CHECK-NEXT: Size: 3 +# CHECK-NEXT: Link: 0 +# CHECK-NEXT: Info: 0 +# CHECK-NEXT: AddressAlignment: 1 +# CHECK-NEXT: EntrySize: 0 +# CHECK-NEXT: SectionData ( +# CHECK-NEXT: 0000: 040404 +# CHECK-NEXT: ) +# CHECK-NEXT: } +# CHECK: Section { +# CHECK: Name: test5 (44) +# CHECK-NEXT: Type: SHT_PROGBITS +# CHECK-NEXT: Flags [ (0x0) +# CHECK-NEXT: ] +# CHECK-NEXT: Address: 0x0 +# CHECK-NEXT: Offset: 0x49 +# CHECK-NEXT: Size: 1 +# CHECK-NEXT: Link: 0 +# CHECK-NEXT: Info: 0 +# CHECK-NEXT: AddressAlignment: 1 +# CHECK-NEXT: EntrySize: 0 +# CHECK-NEXT: SectionData ( +# CHECK-NEXT: 0000: 05 +# CHECK-NEXT: ) +# CHECK-NEXT: } diff --git a/test/MC/AsmParser/section_names.s b/test/MC/AsmParser/section_names.s index 332cdbe..3883e15 100644 --- a/test/MC/AsmParser/section_names.s +++ b/test/MC/AsmParser/section_names.s @@ -1,5 +1,5 @@ # RUN: llvm-mc -triple i386-pc-linux-gnu -filetype=obj -o %t %s -# RUN: elf-dump --dump-section-data < %t | FileCheck %s +# RUN: llvm-readobj -s < %t | FileCheck %s .section .nobits .byte 1 .section .nobits2 @@ -30,33 +30,33 @@ .byte 1 .section .notefoo .byte 1 -# CHECK: (('sh_name', 0x00000{{...}}) # '.nobits' -# CHECK-NEXT: ('sh_type', 0x00000001) -# CHECK: (('sh_name', 0x00000{{...}}) # '.nobits2' -# CHECK-NEXT: ('sh_type', 0x00000001) -# CHECK: (('sh_name', 0x00000{{...}}) # '.nobitsfoo' -# CHECK-NEXT: ('sh_type', 0x00000001) -# CHECK: (('sh_name', 0x00000{{...}}) # '.init_array' -# CHECK-NEXT: ('sh_type', 0x0000000e) -# CHECK: (('sh_name', 0x00000{{...}}) # '.init_array2' -# CHECK-NEXT: ('sh_type', 0x00000001) -# CHECK: (('sh_name', 0x00000{{...}}) # '.init_arrayfoo' -# CHECK-NEXT: ('sh_type', 0x00000001) -# CHECK: (('sh_name', 0x00000{{...}}) # '.fini_array' -# CHECK-NEXT: ('sh_type', 0x0000000f) -# CHECK: (('sh_name', 0x00000{{...}}) # '.fini_array2' -# CHECK-NEXT: ('sh_type', 0x00000001) -# CHECK: (('sh_name', 0x00000{{...}}) # '.fini_arrayfoo' -# CHECK-NEXT: ('sh_type', 0x00000001) -# CHECK: (('sh_name', 0x00000{{...}}) # '.preinit_array' -# CHECK-NEXT: ('sh_type', 0x00000010) -# CHECK: (('sh_name', 0x00000{{...}}) # '.preinit_array2' -# CHECK-NEXT: ('sh_type', 0x00000001) -# CHECK: (('sh_name', 0x00000{{...}}) # '.preinit_arrayfoo' -# CHECK-NEXT: ('sh_type', 0x00000001) -# CHECK: (('sh_name', 0x00000{{...}}) # '.note' -# CHECK-NEXT: ('sh_type', 0x00000007) -# CHECK: (('sh_name', 0x00000{{...}}) # '.note2' -# CHECK-NEXT: ('sh_type', 0x00000007) -#CHECK: (('sh_name', 0x00000{{...}}) # '.notefoo' -# CHECK-NEXT: ('sh_type', 0x00000007) +# CHECK: Name: .nobits +# CHECK-NEXT: Type: SHT_PROGBITS +# CHECK: Name: .nobits2 +# CHECK-NEXT: Type: SHT_PROGBITS +# CHECK: Name: .nobitsfoo +# CHECK-NEXT: Type: SHT_PROGBITS +# CHECK: Name: .init_array +# CHECK-NEXT: Type: SHT_INIT_ARRAY +# CHECK: Name: .init_array2 +# CHECK-NEXT: Type: SHT_PROGBITS +# CHECK: Name: .init_arrayfoo +# CHECK-NEXT: Type: SHT_PROGBITS +# CHECK: Name: .fini_array +# CHECK-NEXT: Type: SHT_FINI_ARRAY +# CHECK: Name: .fini_array2 +# CHECK-NEXT: Type: SHT_PROGBITS +# CHECK: Name: .fini_arrayfoo +# CHECK-NEXT: Type: SHT_PROGBITS +# CHECK: Name: .preinit_array +# CHECK-NEXT: Type: SHT_PREINIT_ARRAY +# CHECK: Name: .preinit_array2 +# CHECK-NEXT: Type: SHT_PROGBITS +# CHECK: Name: .preinit_arrayfoo +# CHECK-NEXT: Type: SHT_PROGBITS +# CHECK: Name: .note +# CHECK-NEXT: Type: SHT_NOTE +# CHECK: Name: .note2 +# CHECK-NEXT: Type: SHT_NOTE +# CHECK: Name: .notefoo +# CHECK-NEXT: Type: SHT_NOTE diff --git a/test/MC/COFF/align-nops.s b/test/MC/COFF/align-nops.s index 2971ec6..02b4884 100644 --- a/test/MC/COFF/align-nops.s +++ b/test/MC/COFF/align-nops.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s -o - | coff-dump.py | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | llvm-readobj -s -sd | FileCheck %s // Test that we get optimal nops in text .text @@ -15,36 +15,40 @@ f0: .long 0 .align 8 -//CHECK: Name = .text -//CHECK-NEXT: VirtualSize -//CHECK-NEXT: VirtualAddress -//CHECK-NEXT: SizeOfRawData = 16 -//CHECK-NEXT: PointerToRawData -//CHECK-NEXT: PointerToRelocations -//CHECK-NEXT: PointerToLineNumbers -//CHECK-NEXT: NumberOfRelocations -//CHECK-NEXT: NumberOfLineNumbers -//CHECK-NEXT: Charateristics = 0x60400020 -//CHECK-NEXT: IMAGE_SCN_CNT_CODE +//CHECK: Name: .text +//CHECK-NEXT: VirtualSize +//CHECK-NEXT: VirtualAddress +//CHECK-NEXT: RawDataSize: 16 +//CHECK-NEXT: PointerToRawData +//CHECK-NEXT: PointerToRelocations +//CHECK-NEXT: PointerToLineNumbers +//CHECK-NEXT: RelocationCount +//CHECK-NEXT: LineNumberCount +//CHECK-NEXT: Characteristics [ (0x60400020) //CHECK-NEXT: IMAGE_SCN_ALIGN_8BYTES +//CHECK-NEXT: IMAGE_SCN_CNT_CODE //CHECK-NEXT: IMAGE_SCN_MEM_EXECUTE //CHECK-NEXT: IMAGE_SCN_MEM_READ -//CHECK-NEXT: SectionData = -//CHECK-NEXT: 00 00 00 00 0F 1F 40 00 - 00 00 00 00 0F 1F 40 00 +//CHECK-NEXT: ] +//CHECK-NEXT: SectionData ( +//CHECK-NEXT: 0000: 00000000 0F1F4000 00000000 0F1F4000 +//CHECK-NEXT: ) -//CHECK: Name = .data -//CHECK-NEXT: VirtualSize -//CHECK-NEXT: VirtualAddress -//CHECK-NEXT: SizeOfRawData = 16 -//CHECK-NEXT: PointerToRawData -//CHECK-NEXT: PointerToRelocations -//CHECK-NEXT: PointerToLineNumbers -//CHECK-NEXT: NumberOfRelocations -//CHECK-NEXT: NumberOfLineNumbers -//CHECK-NEXT: Charateristics = 0xC0400040 -//CHECK-NEXT: IMAGE_SCN_CNT_INITIALIZED_DATA -//CHECK-NEXT: IMAGE_SCN_ALIGN_8BYTES -//CHECK-NEXT: IMAGE_SCN_MEM_READ -//CHECK-NEXT: IMAGE_SCN_MEM_WRITE -//CHECK-NEXT: SectionData = -//CHECK-NEXT: 00 00 00 00 90 90 90 90 - 00 00 00 00 00 00 00 00 +//CHECK: Name: .data +//CHECK-NEXT: VirtualSize: +//CHECK-NEXT: VirtualAddress: +//CHECK-NEXT: RawDataSize: 16 +//CHECK-NEXT: PointerToRawData: +//CHECK-NEXT: PointerToRelocations: +//CHECK-NEXT: PointerToLineNumbers: +//CHECK-NEXT: RelocationCount: +//CHECK-NEXT: LineNumberCount: +//CHECK-NEXT: Characteristics [ (0xC0400040) +//CHECK-NEXT: IMAGE_SCN_ALIGN_8BYTES +//CHECK-NEXT: IMAGE_SCN_CNT_INITIALIZED_DATA +//CHECK-NEXT: IMAGE_SCN_MEM_READ +//CHECK-NEXT: IMAGE_SCN_MEM_WRITE +//CHECK-NEXT: ] +//CHECK-NEXT: SectionData ( +//CHECK-NEXT: 0000: 00000000 90909090 00000000 00000000 +//CHECK-NEXT: ) diff --git a/test/MC/COFF/basic-coff-64.s b/test/MC/COFF/basic-coff-64.s new file mode 100644 index 0000000..89d1745 --- /dev/null +++ b/test/MC/COFF/basic-coff-64.s @@ -0,0 +1,137 @@ +// This test checks that the COFF object emitter works for the most basic +// programs. + +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-win32 %s | llvm-readobj -h -s -sr -sd -t | FileCheck %s + +.def _main; + .scl 2; + .type 32; + .endef + .text + .globl _main + .align 16, 0x90 +_main: # @main +# BB#0: # %entry + subl $4, %esp + movl $.L_.str, (%esp) + call _printf + xorl %eax, %eax + addl $4, %esp + ret + + .data +.L_.str: # @.str + .asciz "Hello World" + +// CHECK: ImageFileHeader { +// CHECK: Machine: IMAGE_FILE_MACHINE_AMD64 +// CHECK: SectionCount: 2 +// CHECK: TimeDateStamp: {{[0-9]+}} +// CHECK: PointerToSymbolTable: 0x{{[0-9A-F]+}} +// CHECK: SymbolCount: 6 +// CHECK: OptionalHeaderSize: 0 +// CHECK: Characteristics [ (0x0) +// CHECK: ] +// CHECK: } +// CHECK: Sections [ +// CHECK: Section { +// CHECK: Number: [[TextNum:[0-9]+]] +// CHECK: Name: .text +// CHECK: VirtualSize: 0 +// CHECK: VirtualAddress: 0 +// CHECK: RawDataSize: [[TextSize:[0-9]+]] +// CHECK: PointerToRawData: 0x{{[0-9A-F]+}} +// CHECK: PointerToRelocations: 0x{{[0-9A-F]+}} +// CHECK: PointerToLineNumbers: 0x0 +// CHECK: RelocationCount: 2 +// CHECK: LineNumberCount: 0 +// CHECK: Characteristics [ (0x60500020) +// CHECK: IMAGE_SCN_ALIGN_16BYTES +// CHECK: IMAGE_SCN_CNT_CODE +// CHECK: IMAGE_SCN_MEM_EXECUTE +// CHECK: IMAGE_SCN_MEM_READ +// CHECK: ] +// CHECK: Relocations [ +// CHECK: 0x{{[0-9A-F]+}} IMAGE_REL_AMD64_ADDR32 .data +// CHECK: 0x{{[0-9A-F]+}} IMAGE_REL_AMD64_REL32 _printf +// CHECK: ] +// CHECK: } +// CHECK: Section { +// CHECK: Number: [[DataNum:[0-9]+]] +// CHECK: Name: .data +// CHECK: VirtualSize: 0 +// CHECK: VirtualAddress: 0 +// CHECK: RawDataSize: [[DataSize:[0-9]+]] +// CHECK: PointerToRawData: 0x{{[0-9A-F]+}} +// CHECK: PointerToRelocations: 0x0 +// CHECK: PointerToLineNumbers: 0x0 +// CHECK: RelocationCount: 0 +// CHECK: LineNumberCount: 0 +// CHECK: Characteristics [ (0xC0300040) +// CHECK: IMAGE_SCN_ALIGN_4BYTES +// CHECK: IMAGE_SCN_CNT_INITIALIZED_DATA +// CHECK: IMAGE_SCN_MEM_READ +// CHECK: IMAGE_SCN_MEM_WRITE +// CHECK: ] +// CHECK: Relocations [ +// CHECK: ] +// CHECK: SectionData ( +// CHECK: 0000: 48656C6C 6F20576F 726C6400 |Hello World.| +// CHECK: ) +// CHECK: } +// CHECK: ] +// CHECK: Symbols [ +// CHECK: Symbol { +// CHECK: Name: .text +// CHECK: Value: 0 +// CHECK: Section: .text +// CHECK: BaseType: Null +// CHECK: ComplexType: Null +// CHECK: StorageClass: Static +// CHECK: AuxSymbolCount: 1 +// CHECK: AuxSectionDef { +// CHECK: Length: [[TextSize]] +// CHECK: RelocationCount: 2 +// CHECK: LineNumberCount: 0 +// CHECK: Checksum: 0x0 +// CHECK: Number: [[TextNum]] +// CHECK: Selection: 0x0 +// CHECK: } +// CHECK: } +// CHECK: Symbol { +// CHECK: Name: .data +// CHECK: Value: 0 +// CHECK: Section: .data +// CHECK: BaseType: Null +// CHECK: ComplexType: Null +// CHECK: StorageClass: Static +// CHECK: AuxSymbolCount: 1 +// CHECK: AuxSectionDef { +// CHECK: Length: [[DataSize]] +// CHECK: RelocationCount: 0 +// CHECK: LineNumberCount: 0 +// CHECK: Checksum: 0x0 +// CHECK: Number: [[DataNum]] +// CHECK: Selection: 0x0 +// CHECK: Unused: (00 00 00) +// CHECK: } +// CHECK: } +// CHECK: Symbol { +// CHECK: Name: _main +// CHECK: Value: 0 +// CHECK: Section: .text +// CHECK: BaseType: Null +// CHECK: ComplexType: Function +// CHECK: StorageClass: External +// CHECK: AuxSymbolCount: 0 +// CHECK: } +// CHECK: Symbol { +// CHECK: Name: _printf +// CHECK: Value: 0 +// CHECK: Section: (0) +// CHECK: BaseType: Null +// CHECK: ComplexType: Null +// CHECK: StorageClass: External +// CHECK: AuxSymbolCount: 0 +// CHECK: } +// CHECK: ] diff --git a/test/MC/COFF/basic-coff.s b/test/MC/COFF/basic-coff.s index 23156b8..9b29970 100644 --- a/test/MC/COFF/basic-coff.s +++ b/test/MC/COFF/basic-coff.s @@ -1,8 +1,7 @@ // This test checks that the COFF object emitter works for the most basic // programs. -// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | coff-dump.py | FileCheck %s -// I WOULD RUN, BUT THIS FAILS: llvm-mc -filetype=obj -triple x86_64-pc-win32 %s +// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | llvm-readobj -h -s -sr -sd -t | FileCheck %s .def _main; .scl 2; @@ -15,119 +14,124 @@ _main: # @main # BB#0: # %entry subl $4, %esp movl $L_.str, (%esp) - calll _printf + call _printf xorl %eax, %eax addl $4, %esp ret .data L_.str: # @.str - .asciz "Hello World" + .asciz "Hello World" -// CHECK: { -// CHECK: MachineType = IMAGE_FILE_MACHINE_I386 (0x14C) -// CHECK: NumberOfSections = 2 -// CHECK: TimeDateStamp = {{[0-9]+}} -// CHECK: PointerToSymbolTable = 0x{{[0-9A-F]+}} -// CHECK: NumberOfSymbols = 6 -// CHECK: SizeOfOptionalHeader = 0 -// CHECK: Characteristics = 0x0 -// CHECK: Sections = [ -// CHECK: 1 = { -// CHECK: Name = .text -// CHECK: VirtualSize = 0 -// CHECK: VirtualAddress = 0 -// CHECK: SizeOfRawData = {{[0-9]+}} -// CHECK: PointerToRawData = 0x{{[0-9A-F]+}} -// CHECK: PointerToRelocations = 0x{{[0-9A-F]+}} -// CHECK: PointerToLineNumbers = 0x0 -// CHECK: NumberOfRelocations = 2 -// CHECK: NumberOfLineNumbers = 0 -// CHECK: Charateristics = 0x60500020 -// CHECK: IMAGE_SCN_CNT_CODE -// CHECK: IMAGE_SCN_ALIGN_16BYTES -// CHECK: IMAGE_SCN_MEM_EXECUTE -// CHECK: IMAGE_SCN_MEM_READ -// CHECK: SectionData = -// CHECK: Relocations = [ -// CHECK: 0 = { -// CHECK: VirtualAddress = 0x{{[0-9A-F]+}} -// CHECK: SymbolTableIndex = 2 -// CHECK: Type = IMAGE_REL_I386_DIR32 (6) -// CHECK: SymbolName = .data -// CHECK: } -// CHECK: 1 = { -// CHECK: VirtualAddress = 0x{{[0-9A-F]+}} -// CHECK: SymbolTableIndex = 5 -// CHECK: Type = IMAGE_REL_I386_REL32 (20) -// CHECK: SymbolName = _printf -// CHECK: } -// CHECK: ] -// CHECK: } -// CHECK: 2 = { -// CHECK: Name = .data -// CHECK: VirtualSize = 0 -// CHECK: VirtualAddress = 0 -// CHECK: SizeOfRawData = {{[0-9]+}} -// CHECK: PointerToRawData = 0x{{[0-9A-F]+}} -// CHECK: PointerToRelocations = 0x0 -// CHECK: PointerToLineNumbers = 0x0 -// CHECK: NumberOfRelocations = 0 -// CHECK: NumberOfLineNumbers = 0 -// CHECK: Charateristics = 0xC0300040 -// CHECK: IMAGE_SCN_CNT_INITIALIZED_DATA -// CHECK: IMAGE_SCN_ALIGN_4BYTES -// CHECK: IMAGE_SCN_MEM_READ -// CHECK: IMAGE_SCN_MEM_WRITE -// CHECK: SectionData = -// CHECK: 48 65 6C 6C 6F 20 57 6F - 72 6C 64 00 |Hello World.| -// CHECK: Relocations = None -// CHECK: } +// CHECK: ImageFileHeader { +// CHECK: Machine: IMAGE_FILE_MACHINE_I386 +// CHECK: SectionCount: 2 +// CHECK: TimeDateStamp: {{[0-9]+}} +// CHECK: PointerToSymbolTable: 0x{{[0-9A-F]+}} +// CHECK: SymbolCount: 6 +// CHECK: OptionalHeaderSize: 0 +// CHECK: Characteristics [ (0x0) // CHECK: ] -// CHECK: Symbols = [ -// CHECK: 0 = { -// CHECK: Name = .text -// CHECK: Value = 0 -// CHECK: SectionNumber = 1 -// CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0) -// CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0) -// CHECK: StorageClass = IMAGE_SYM_CLASS_STATIC (3) -// CHECK: NumberOfAuxSymbols = 1 -// CHECK: AuxillaryData = -// CHECK: 15 00 00 00 02 00 00 00 - 00 00 00 00 01 00 00 00 |................| -// CHECK: 00 00 |..| -// CHECK: } -// CHECK: 2 = { -// CHECK: Name = .data -// CHECK: Value = 0 -// CHECK: SectionNumber = 2 -// CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0) -// CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0) -// CHECK: StorageClass = IMAGE_SYM_CLASS_STATIC (3) -// CHECK: NumberOfAuxSymbols = 1 -// CHECK: AuxillaryData = -// CHECK: 0C 00 00 00 00 00 00 00 - 00 00 00 00 02 00 00 00 |................| -// CHECK: 00 00 |..| -// CHECK: } -// CHECK: 4 = { -// CHECK: Name = _main -// CHECK: Value = 0 -// CHECK: SectionNumber = 1 -// CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0) -// CHECK: ComplexType = IMAGE_SYM_DTYPE_FUNCTION (2) -// CHECK: StorageClass = IMAGE_SYM_CLASS_EXTERNAL (2) -// CHECK: NumberOfAuxSymbols = 0 -// CHECK: AuxillaryData = +// CHECK: } +// CHECK: Sections [ +// CHECK: Section { +// CHECK: Number: [[TextNum:[0-9]+]] +// CHECK: Name: .text +// CHECK: VirtualSize: 0 +// CHECK: VirtualAddress: 0 +// CHECK: RawDataSize: {{[0-9]+}} +// CHECK: PointerToRawData: 0x{{[0-9A-F]+}} +// CHECK: PointerToRelocations: 0x{{[0-9A-F]+}} +// CHECK: PointerToLineNumbers: 0x0 +// CHECK: RelocationCount: 2 +// CHECK: LineNumberCount: 0 +// CHECK: Characteristics [ (0x60500020) +// CHECK: IMAGE_SCN_ALIGN_16BYTES +// CHECK: IMAGE_SCN_CNT_CODE +// CHECK: IMAGE_SCN_MEM_EXECUTE +// CHECK: IMAGE_SCN_MEM_READ +// CHECK: ] +// CHECK: Relocations [ +// CHECK: 0x{{[0-9A-F]+}} IMAGE_REL_I386_DIR32 .data +// CHECK: 0x{{[0-9A-F]+}} IMAGE_REL_I386_REL32 _printf +// CHECK: ] +// CHECK: } +// CHECK: Section { +// CHECK: Number: [[DataNum:[0-9]+]] +// CHECK: Name: .data +// CHECK: VirtualSize: 0 +// CHECK: VirtualAddress: 0 +// CHECK: RawDataSize: {{[0-9]+}} +// CHECK: PointerToRawData: 0x{{[0-9A-F]+}} +// CHECK: PointerToRelocations: 0x0 +// CHECK: PointerToLineNumbers: 0x0 +// CHECK: RelocationCount: 0 +// CHECK: LineNumberCount: 0 +// CHECK: Characteristics [ (0xC0300040) +// CHECK: IMAGE_SCN_ALIGN_4BYTES +// CHECK: IMAGE_SCN_CNT_INITIALIZED_DATA +// CHECK: IMAGE_SCN_MEM_READ +// CHECK: IMAGE_SCN_MEM_WRITE +// CHECK: ] +// CHECK: Relocations [ +// CHECK: ] +// CHECK: SectionData ( +// CHECK: 0000: 48656C6C 6F20576F 726C6400 |Hello World.| +// CHECK: ) +// CHECK: } +// CHECK: ] +// CHECK: Symbols [ +// CHECK: Symbol { +// CHECK: Name: .text +// CHECK: Value: 0 +// CHECK: Section: .text +// CHECK: BaseType: Null +// CHECK: ComplexType: Null +// CHECK: StorageClass: Static +// CHECK: AuxSymbolCount: 1 +// CHECK: AuxSectionDef { +// CHECK: Length: 21 +// CHECK: RelocationCount: 2 +// CHECK: LineNumberCount: 0 +// CHECK: Checksum: 0x0 +// CHECK: Number: 1 +// CHECK: Selection: 0x0 // CHECK: } -// CHECK: 5 = { -// CHECK: Name = _printf -// CHECK: Value = 0 -// CHECK: SectionNumber = 0 -// CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0) -// CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0) -// CHECK: StorageClass = IMAGE_SYM_CLASS_EXTERNAL (2) -// CHECK: NumberOfAuxSymbols = 0 -// CHECK: AuxillaryData = +// CHECK: } +// CHECK: Symbol { +// CHECK: Name: .data +// CHECK: Value: 0 +// CHECK: Section: .data +// CHECK: BaseType: Null +// CHECK: ComplexType: Null +// CHECK: StorageClass: Static +// CHECK: AuxSymbolCount: 1 +// CHECK: AuxSectionDef { +// CHECK: Length: 12 +// CHECK: RelocationCount: 0 +// CHECK: LineNumberCount: 0 +// CHECK: Checksum: 0x0 +// CHECK: Number: 2 +// CHECK: Selection: 0x0 +// CHECK: Unused: (00 00 00) // CHECK: } -// CHECK: ] -// CHECK: } +// CHECK: } +// CHECK: Symbol { +// CHECK: Name: _main +// CHECK: Value: 0 +// CHECK: Section: .text +// CHECK: BaseType: Null +// CHECK: ComplexType: Function +// CHECK: StorageClass: External +// CHECK: AuxSymbolCount: 0 +// CHECK: } +// CHECK: Symbol { +// CHECK: Name: _printf +// CHECK: Value: 0 +// CHECK: Section: (0) +// CHECK: BaseType: Null +// CHECK: ComplexType: Null +// CHECK: StorageClass: External +// CHECK: AuxSymbolCount: 0 +// CHECK: } +// CHECK: ] diff --git a/test/MC/COFF/bss.s b/test/MC/COFF/bss.s index 3bed13d..86294c1 100644 --- a/test/MC/COFF/bss.s +++ b/test/MC/COFF/bss.s @@ -1,7 +1,7 @@ // The purpose of this test is to verify that bss sections are emited correctly. -// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | coff-dump.py | FileCheck %s -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-win32 %s | coff-dump.py | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | llvm-readobj -s | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-win32 %s | llvm-readobj -s | FileCheck %s .bss .globl _g0 @@ -9,7 +9,7 @@ _g0: .long 0 -// CHECK: Name = .bss -// CHECK-NEXT: VirtualSize = 0 -// CHECK-NEXT: VirtualAddress = 0 -// CHECK-NEXT: SizeOfRawData = 4 +// CHECK: Name: .bss +// CHECK-NEXT: VirtualSize: 0 +// CHECK-NEXT: VirtualAddress: 0 +// CHECK-NEXT: RawDataSize: 4 diff --git a/test/MC/COFF/diff.s b/test/MC/COFF/diff.s index aa683f2..820272a 100644 --- a/test/MC/COFF/diff.s +++ b/test/MC/COFF/diff.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple i686-pc-mingw32 %s | coff-dump.py | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple i686-pc-mingw32 %s | llvm-readobj -s -sr -sd | FileCheck %s .def _foobar; .scl 2; @@ -21,26 +21,12 @@ _rust_crate: .long _foobar-_rust_crate .long _foobar-_rust_crate -// CHECK: Name = .data -// CHECK: SectionData = -// CHECK-NEXT: 00 00 00 00 00 00 00 00 - 1C 00 00 00 20 00 00 00 |............ ...| -// CHECK: Relocations = [ -// CHECK-NEXT: 0 = { -// CHECK-NEXT: VirtualAddress = 0x4 -// CHECK-NEXT: SymbolTableIndex = -// CHECK-NEXT: Type = IMAGE_REL_I386_DIR32 (6) -// CHECK-NEXT: SymbolName = _foobar -// CHECK-NEXT: } -// CHECK-NEXT: 1 = { -// CHECK-NEXT: VirtualAddress = 0x8 -// CHECK-NEXT: SymbolTableIndex = 0 -// CHECK-NEXT: Type = IMAGE_REL_I386_REL32 (20) -// CHECK-NEXT: SymbolName = .text -// CHECK-NEXT: } -// CHECK-NEXT: 2 = { -// CHECK-NEXT: VirtualAddress = 0xC -// CHECK-NEXT: SymbolTableIndex = 0 -// CHECK-NEXT: Type = IMAGE_REL_I386_REL32 (20) -// CHECK-NEXT: SymbolName = .text -// CHECK-NEXT: } -// CHECK-NEXT: ] +// CHECK: Name: .data +// CHECK: Relocations [ +// CHECK-NEXT: 0x4 IMAGE_REL_I386_DIR32 _foobar +// CHECK-NEXT: 0x8 IMAGE_REL_I386_REL32 .text +// CHECK-NEXT: 0xC IMAGE_REL_I386_REL32 .text +// CHECK-NEXT: ] +// CHECK: SectionData ( +// CHECK-NEXT: 0000: 00000000 00000000 1C000000 20000000 +// CHECK-NEXT: ) diff --git a/test/MC/COFF/linker-options.ll b/test/MC/COFF/linker-options.ll new file mode 100755 index 0000000..de11941 --- /dev/null +++ b/test/MC/COFF/linker-options.ll @@ -0,0 +1,21 @@ +; RUN: llc -O0 -mtriple=i386-pc-win32 -filetype=asm -o - %s | FileCheck %s + +!0 = metadata !{ i32 6, metadata !"Linker Options", + metadata !{ + metadata !{ metadata !"/DEFAULTLIB:msvcrt.lib" }, + metadata !{ metadata !"/DEFAULTLIB:msvcrt.lib", + metadata !"/DEFAULTLIB:secur32.lib" }, + metadata !{ metadata !"/with spaces" } } } + +!llvm.module.flags = !{ !0 } + +define dllexport void @foo() { + ret void +} + +; CHECK: .section .drectve,"r" +; CHECK: .ascii " /DEFAULTLIB:msvcrt.lib" +; CHECK: .ascii " /DEFAULTLIB:msvcrt.lib" +; CHECK: .ascii " /DEFAULTLIB:secur32.lib" +; CHECK: .ascii " \"/with spaces\"" +; CHECK: .ascii " /EXPORT:_foo" diff --git a/test/MC/COFF/module-asm.ll b/test/MC/COFF/module-asm.ll index 9c6d00d..bf14dc6 100644 --- a/test/MC/COFF/module-asm.ll +++ b/test/MC/COFF/module-asm.ll @@ -1,26 +1,28 @@ ; The purpose of this test is to verify that various module level assembly ; constructs work. -; RUN: llc -filetype=obj -mtriple i686-pc-win32 %s -o - | coff-dump.py | FileCheck %s -; RUN: llc -filetype=obj -mtriple x86_64-pc-win32 %s -o - | coff-dump.py | FileCheck %s +; RUN: llc -filetype=obj -mtriple i686-pc-win32 %s -o - | llvm-readobj -s -sd | FileCheck %s +; RUN: llc -filetype=obj -mtriple x86_64-pc-win32 %s -o - | llvm-readobj -s -sd | FileCheck %s module asm ".text" module asm "_foo:" module asm " ret" -; CHECK: Name = .text -; CHECK-NEXT: VirtualSize = 0 -; CHECK-NEXT: VirtualAddress = 0 -; CHECK-NEXT: SizeOfRawData = {{[0-9]+}} -; CHECK-NEXT: PointerToRawData = 0x{{[0-9A-F]+}} -; CHECK-NEXT: PointerToRelocations = 0x{{[0-9A-F]+}} -; CHECK-NEXT: PointerToLineNumbers = 0x0 -; CHECK-NEXT: NumberOfRelocations = 0 -; CHECK-NEXT: NumberOfLineNumbers = 0 -; CHECK-NEXT: Charateristics = 0x60300020 -; CHECK-NEXT: IMAGE_SCN_CNT_CODE +; CHECK: Name: .text +; CHECK-NEXT: VirtualSize: 0 +; CHECK-NEXT: VirtualAddress: 0 +; CHECK-NEXT: RawDataSize: {{[0-9]+}} +; CHECK-NEXT: PointerToRawData: 0x{{[0-9A-F]+}} +; CHECK-NEXT: PointerToRelocations: 0x{{[0-9A-F]+}} +; CHECK-NEXT: PointerToLineNumbers: 0x0 +; CHECK-NEXT: RelocationCount: 0 +; CHECK-NEXT: LineNumberCount: 0 +; CHECK-NEXT: Characteristics [ (0x60300020) ; CHECK-NEXT: IMAGE_SCN_ALIGN_4BYTES +; CHECK-NEXT: IMAGE_SCN_CNT_CODE ; CHECK-NEXT: IMAGE_SCN_MEM_EXECUTE ; CHECK-NEXT: IMAGE_SCN_MEM_READ -; CHECK-NEXT: SectionData = -; CHECK-NEXT: C3 +; CHECK-NEXT: ] +; CHECK-NEXT: SectionData ( +; CHECK-NEXT: 0000: C3 +; CHECK-NEXT: ) diff --git a/test/MC/COFF/relocation-imgrel.s b/test/MC/COFF/relocation-imgrel.s new file mode 100644 index 0000000..ccd19ee --- /dev/null +++ b/test/MC/COFF/relocation-imgrel.s @@ -0,0 +1,29 @@ +// COFF Image-relative relocations +// +// Test that we produce image-relative relocations (IMAGE_REL_I386_DIR32NB +// and IMAGE_REL_AMD64_ADDR32NB) when accessing foo@imgrel. + +// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | llvm-readobj -r | FileCheck --check-prefix=W32 %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-win32 %s | llvm-readobj -r | FileCheck --check-prefix=W64 %s + +.data +foo: + .long 1 + +.text + mov foo@IMGREL(%ebx, %ecx, 4), %eax + mov foo@imgrel(%ebx, %ecx, 4), %eax + +// W32: Relocations [ +// W32-NEXT: Section (1) .text { +// W32-NEXT: 0x3 IMAGE_REL_I386_DIR32NB foo +// W32-NEXT: 0xA IMAGE_REL_I386_DIR32NB foo +// W32-NEXT: } +// W32-NEXT: ] + +// W64: Relocations [ +// W64-NEXT: Section (1) .text { +// W64-NEXT: 0x4 IMAGE_REL_AMD64_ADDR32NB foo +// W64-NEXT: 0xC IMAGE_REL_AMD64_ADDR32NB foo +// W64-NEXT: } +// W64-NEXT: ] diff --git a/test/MC/COFF/secrel-variant.s b/test/MC/COFF/secrel-variant.s new file mode 100644 index 0000000..1061bd4 --- /dev/null +++ b/test/MC/COFF/secrel-variant.s @@ -0,0 +1,19 @@ +// COFF section-relative relocations + +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-win32 %s | llvm-readobj -r | FileCheck %s + +.data +values: + .long 1 + .long 0 + +.text + movq values@SECREL32(%rax), %rcx + movq values@SECREL32+8(%rax), %rax + +// CHECK: Relocations [ +// CHECK-NEXT: Section (1) .text { +// CHECK-NEXT: 0x3 IMAGE_REL_AMD64_SECREL values +// CHECK-NEXT: 0xA IMAGE_REL_AMD64_SECREL values +// CHECK-NEXT: } +// CHECK-NEXT: ] diff --git a/test/MC/COFF/secrel32.s b/test/MC/COFF/secrel32.s index ce148db..deadfe0 100644 --- a/test/MC/COFF/secrel32.s +++ b/test/MC/COFF/secrel32.s @@ -1,14 +1,10 @@ -// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | coff-dump.py | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | llvm-readobj -s -sr | FileCheck %s // check that we produce the correct relocation for .secrel32 Lfoo: .secrel32 Lfoo -// CHECK: Relocations = [ -// CHECK-NEXT: 0 = { -// CHECK-NEXT: VirtualAddress = 0x0 -// CHECK-NEXT: SymbolTableIndex = 0 -// CHECK-NEXT: Type = IMAGE_REL_I386_SECREL (11) -// CHECK-NEXT: SymbolName = .text -// CHECK-NEXT: } +// CHECK: Relocations [ +// CHECK-NEXT: 0x0 IMAGE_REL_I386_SECREL .text +// CHECK-NEXT: ] diff --git a/test/MC/COFF/seh-section.s b/test/MC/COFF/seh-section.s index 802cba5..7f05cc3 100644 --- a/test/MC/COFF/seh-section.s +++ b/test/MC/COFF/seh-section.s @@ -1,24 +1,26 @@ // This test ensures that, if the section containing a function has a suffix // (e.g. .text$foo), its unwind info section also has a suffix (.xdata$foo). -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-win32 %s | coff-dump.py | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-win32 %s | llvm-readobj -s -sd | FileCheck %s // XFAIL: * -// CHECK: Name = .xdata$foo +// CHECK: Name: .xdata$foo // CHECK-NEXT: VirtualSize // CHECK-NEXT: VirtualAddress -// CHECK-NEXT: SizeOfRawData = 8 +// CHECK-NEXT: RawDataSize: 8 // CHECK-NEXT: PointerToRawData // CHECK-NEXT: PointerToRelocations // CHECK-NEXT: PointerToLineNumbers -// CHECK-NEXT: NumberOfRelocations = 0 -// CHECK-NEXT: NumberOfLineNumbers = 0 -// CHECK-NEXT: Charateristics -// CHECK-NEXT: IMAGE_SCN_CNT_INITIALIZED_DATA +// CHECK-NEXT: RelocationCount: 0 +// CHECK-NEXT: LineNumberCount: 0 +// CHECK-NEXT: Characteristics [ // CHECK-NEXT: IMAGE_SCN_ALIGN_4BYTES +// CHECK-NEXT: IMAGE_SCN_CNT_INITIALIZED_DATA // CHECK-NEXT: IMAGE_SCN_MEM_READ // CHECK-NEXT: IMAGE_SCN_MEM_WRITE -// CHECK-NEXT: SectionData -// CHECK-NEXT: 01 05 02 00 05 50 04 02 +// CHECK-NEXT: ] +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 01050200 05500402 +// CHECK-NEXT: ) .section .text$foo,"x" .globl foo diff --git a/test/MC/COFF/seh.s b/test/MC/COFF/seh.s index 3f72805..bef425e 100644 --- a/test/MC/COFF/seh.s +++ b/test/MC/COFF/seh.s @@ -1,24 +1,105 @@ // This test checks that the SEH directives emit the correct unwind data. -// RUN: llvm-mc -triple x86_64-pc-win32 -filetype=obj %s | coff-dump.py | FileCheck %s -// CHECK: Name = .xdata -// CHECK-NEXT: VirtualSize -// CHECK-NEXT: VirtualAddress -// CHECK-NEXT: SizeOfRawData = 52 -// CHECK-NEXT: PointerToRawData -// CHECK-NEXT: PointerToRelocations -// CHECK-NEXT: PointerToLineNumbers -// CHECK-NEXT: NumberOfRelocations = 4 -// CHECK-NEXT: NumberOfLineNumbers = 0 -// CHECK-NEXT: Charateristics -// CHECK-NEXT: IMAGE_SCN_CNT_INITIALIZED_DATA -// CHECK-NEXT: IMAGE_SCN_ALIGN_4BYTES -// CHECK-NEXT: IMAGE_SCN_MEM_READ -// CHECK-NEXT: SectionData -// CHECK-NEXT: 09 12 08 03 00 03 0F 30 - 0E 88 00 00 09 64 02 00 -// CHECK-NEXT: 04 22 00 1A 00 00 00 00 - 00 00 00 00 21 00 00 00 -// CHECK-NEXT: 00 00 00 00 1B 00 00 00 - 00 00 00 00 01 00 00 00 -// CHECK-NEXT: 00 00 00 00 +// TODO: Expected fail because SET_FPREG has a wrong offset. +// XFAIL: * +// RUN: llvm-mc -triple x86_64-pc-win32 -filetype=obj %s | llvm-readobj -s -u | FileCheck %s + +// CHECK: Sections [ +// CHECK: Section { +// CHECK: Name: .text +// CHECK: RelocationCount: 0 +// CHECK: Characteristics [ +// CHECK-NEXT: ALIGN_4BYTES +// CHECK-NEXT: CNT_CODE +// CHECK-NEXT: MEM_EXECUTE +// CHECK-NEXT: MEM_READ +// CHECK-NEXT: ] +// CHECK-NEXT: } +// CHECK: Section { +// CHECK: Name: .xdata +// CHECK: RawDataSize: 52 +// CHECK: RelocationCount: 4 +// CHECK: Characteristics [ +// CHECK-NEXT: ALIGN_4BYTES +// CHECK-NEXT: CNT_INITIALIZED_DATA +// CHECK-NEXT: MEM_READ +// CHECK-NEXT: ] +// CHECK-NEXT: } +// CHECK: Section { +// CHECK: Name: .pdata +// CHECK: RelocationCount: 9 +// CHECK: Characteristics [ +// CHECK-NEXT: ALIGN_4BYTES +// CHECK-NEXT: CNT_INITIALIZED_DATA +// CHECK-NEXT: MEM_READ +// CHECK-NEXT: ] +// CHECK-NEXT: } +// CHECK-NEXT: ] + +// CHECK: UnwindInformation [ +// CHECK-NEXT: RuntimeFunction { +// CHECK-NEXT: StartAddress: [[CodeSect1:[^ ]+]] [[BeginDisp1:(\+0x[A-F0-9]+)?]] +// CHECK-NEXT: EndAddress: [[CodeSect1]] [[EndDisp1:(\+0x[A-F0-9]+)?]] +// CHECK-NEXT: UnwindInfoAddress: +// CHECK-NEXT: UnwindInfo { +// CHECK-NEXT: Version: 1 +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ExceptionHandler +// CHECK-NEXT: ] +// CHECK-NEXT: PrologSize: 18 +// CHECK-NEXT: FrameRegister: RBX +// CHECK-NEXT: FrameOffset: 0x0 +// CHECK-NEXT: UnwindCodeCount: 8 +// CHECK-NEXT: UnwindCodes [ +// CHECK-NEXT: 0x12: SET_FPREG reg=RBX, offset=0x0 +// CHECK-NEXT: 0x0F: PUSH_NONVOL reg=RBX +// CHECK-NEXT: 0x0E: SAVE_XMM128 reg=XMM8, offset=0x0 +// CHECK-NEXT: 0x09: SAVE_NONVOL reg=RSI, offset=0x10 +// CHECK-NEXT: 0x04: ALLOC_SMALL size=24 +// CHECK-NEXT: 0x00: PUSH_MACHFRAME errcode=yes +// CHECK-NEXT: ] +// CHECK-NEXT: Handler: __C_specific_handler +// CHECK-NEXT: } +// CHECK-NEXT: } +// CHECK-NEXT: RuntimeFunction { +// CHECK-NEXT: StartAddress: [[CodeSect2:[^ ]+]] [[BeginDisp2:(\+0x[A-F0-9]+)?]] +// CHECK-NEXT: EndAddress: [[CodeSect2]] [[BeginDisp2:(\+0x[A-F0-9]+)?]] +// CHECK-NEXT: UnwindInfoAddress: +// CHECK-NEXT: UnwindInfo { +// CHECK-NEXT: Version: 1 +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ChainInfo +// CHECK-NEXT: ] +// CHECK-NEXT: PrologSize: 0 +// CHECK-NEXT: FrameRegister: - +// CHECK-NEXT: FrameOffset: - +// CHECK-NEXT: UnwindCodeCount: 0 +// CHECK-NEXT: UnwindCodes [ +// CHECK-NEXT: ] +// CHECK-NEXT: Chained { +// CHECK-NEXT: StartAddress: [[CodeSect1]] [[BeginDisp1]] +// CHECK-NEXT: EndAddress: [[CodeSect1]] [[EndDisp1]] +// CHECK-NEXT: UnwindInfoAddress: +// CHECK-NEXT: } +// CHECK-NEXT: } +// CHECK-NEXT: } +// CHECK-NEXT: RuntimeFunction { +// CHECK-NEXT: StartAddress: [[CodeSect3:[^ ]+]] [[BeginDisp3:(\+0x[A-F0-9]+)?]] +// CHECK-NEXT: EndAddress: [[CodeSect3]] [[BeginDisp3:(\+0x[A-F0-9]+)?]] +// CHECK-NEXT: UnwindInfoAddress: +// CHECK-NEXT: UnwindInfo { +// CHECK-NEXT: Version: 1 +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: PrologSize: 0 +// CHECK-NEXT: FrameRegister: - +// CHECK-NEXT: FrameOffset: - +// CHECK-NEXT: UnwindCodeCount: 0 +// CHECK-NEXT: UnwindCodes [ +// CHECK-NEXT: ] +// CHECK-NEXT: } +// CHECK-NEXT: } +// CHECK-NEXT: ] .text .globl func diff --git a/test/MC/COFF/simple-fixups.s b/test/MC/COFF/simple-fixups.s index 4c9b4d4..2a74f21 100644 --- a/test/MC/COFF/simple-fixups.s +++ b/test/MC/COFF/simple-fixups.s @@ -1,8 +1,8 @@ // The purpose of this test is to verify that we do not produce unneeded // relocations when symbols are in the same section and we know their offset. -// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | coff-dump.py | FileCheck %s -// I WOULD RUN, BUT THIS FAILS: llvm-mc -filetype=obj -triple x86_64-pc-win32 %s | coff-dump.py | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | llvm-readobj -s | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-win32 %s | llvm-readobj -s | FileCheck %s .def _foo; .scl 2; @@ -41,10 +41,9 @@ _baz: # @baz # BB#0: # %e subl $4, %esp Ltmp0: - calll _baz + call _baz addl $4, %esp ret -// CHECK: Sections = [ -// CHECK-NOT: NumberOfRelocations = {{[^0]}} -// CHECK: Symbols = [ +// CHECK: Sections [ +// CHECK-NOT: RelocationCount: {{[^0]}} diff --git a/test/MC/COFF/symbol-alias.s b/test/MC/COFF/symbol-alias.s index 4b1772c..ccada37 100644 --- a/test/MC/COFF/symbol-alias.s +++ b/test/MC/COFF/symbol-alias.s @@ -1,9 +1,9 @@ // The purpose of this test is to verify that symbol aliases -// (@foo = alias <type> @bar) generate the correct entries in the symbol table. +// (@foo: alias <type> @bar) generate the correct entries in the symbol table. // They should be identical except for the name. -// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | coff-dump.py | FileCheck %s -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-win32 %s | coff-dump.py | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | llvm-readobj -t | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-win32 %s | llvm-readobj -t | FileCheck %s .def _foo; .scl 2; @@ -31,43 +31,43 @@ _bar_alias_alias = _bar_alias .globl _bar_alias _bar_alias = _bar -// CHECK: Name = {{_?}}foo -// CHECK-NEXT: Value = [[FOO_VALUE:.*$]] -// CHECK-NEXT: SectionNumber = [[FOO_SECTION_NUMBER:.*$]] -// CHECK-NEXT: SimpleType = [[FOO_SIMPLE_TYPE:.*$]] -// CHECK-NEXT: ComplexType = [[FOO_COMPLEX_TYPE:.*$]] -// CHECK-NEXT: StorageClass = [[FOO_STORAGE_CLASS:.*$]] -// CHECK-NEXT: NumberOfAuxSymbols = [[FOO_NUMBER_OF_AUX_SYMBOLS:.*$]] +// CHECK: Name: {{_?}}foo +// CHECK-NEXT: Value: [[FOO_VALUE:.*$]] +// CHECK-NEXT: Section: [[FOO_SECTION_NUMBER:.*$]] +// CHECK-NEXT: BaseType: [[FOO_SIMPLE_TYPE:.*$]] +// CHECK-NEXT: ComplexType: [[FOO_COMPLEX_TYPE:.*$]] +// CHECK-NEXT: StorageClass: [[FOO_STORAGE_CLASS:.*$]] +// CHECK-NEXT: AuxSymbolCount: [[FOO_NUMBER_OF_AUX_SYMBOLS:.*$]] -// CHECK: Name = {{_?}}bar -// CHECK-NEXT: Value = [[BAR_VALUE:.*$]] -// CHECK-NEXT: SectionNumber = [[BAR_SECTION_NUMBER:.*$]] -// CHECK-NEXT: SimpleType = [[BAR_SIMPLE_TYPE:.*$]] -// CHECK-NEXT: ComplexType = [[BAR_COMPLEX_TYPE:.*$]] -// CHECK-NEXT: StorageClass = [[BAR_STORAGE_CLASS:.*$]] -// CHECK-NEXT: NumberOfAuxSymbols = [[BAR_NUMBER_OF_AUX_SYMBOLS:.*$]] +// CHECK: Name: {{_?}}bar +// CHECK-NEXT: Value: [[BAR_VALUE:.*$]] +// CHECK-NEXT: Section: [[BAR_SECTION_NUMBER:.*$]] +// CHECK-NEXT: BaseType: [[BAR_SIMPLE_TYPE:.*$]] +// CHECK-NEXT: ComplexType: [[BAR_COMPLEX_TYPE:.*$]] +// CHECK-NEXT: StorageClass: [[BAR_STORAGE_CLASS:.*$]] +// CHECK-NEXT: AuxSymbolCount: [[BAR_NUMBER_OF_AUX_SYMBOLS:.*$]] -// CHECK: Name = {{_?}}foo_alias -// CHECK-NEXT: Value = [[FOO_VALUE]] -// CHECK-NEXT: SectionNumber = [[FOO_SECTION_NUMBER]] -// CHECK-NEXT: SimpleType = [[FOO_SIMPLE_TYPE]] -// CHECK-NEXT: ComplexType = [[FOO_COMPLEX_TYPE]] -// CHECK-NEXT: StorageClass = [[FOO_STORAGE_CLASS]] -// CHECK-NEXT: NumberOfAuxSymbols = [[FOO_NUMBER_OF_AUX_SYMBOLS]] +// CHECK: Name: {{_?}}foo_alias +// CHECK-NEXT: Value: [[FOO_VALUE]] +// CHECK-NEXT: Section: [[FOO_SECTION_NUMBER]] +// CHECK-NEXT: BaseType: [[FOO_SIMPLE_TYPE]] +// CHECK-NEXT: ComplexType: [[FOO_COMPLEX_TYPE]] +// CHECK-NEXT: StorageClass: [[FOO_STORAGE_CLASS]] +// CHECK-NEXT: AuxSymbolCount: [[FOO_NUMBER_OF_AUX_SYMBOLS]] -// CHECK: Name = {{_?}}bar_alias_alias -// CHECK-NEXT: Value = [[BAR_VALUE]] -// CHECK-NEXT: SectionNumber = [[BAR_SECTION_NUMBER]] -// CHECK-NEXT: SimpleType = [[BAR_SIMPLE_TYPE]] -// CHECK-NEXT: ComplexType = [[BAR_COMPLEX_TYPE]] -// CHECK-NEXT: StorageClass = [[BAR_STORAGE_CLASS]] -// CHECK-NEXT: NumberOfAuxSymbols = [[BAR_NUMBER_OF_AUX_SYMBOLS]] +// CHECK: Name: {{_?}}bar_alias_alias +// CHECK-NEXT: Value: [[BAR_VALUE]] +// CHECK-NEXT: Section: [[BAR_SECTION_NUMBER]] +// CHECK-NEXT: BaseType: [[BAR_SIMPLE_TYPE]] +// CHECK-NEXT: ComplexType: [[BAR_COMPLEX_TYPE]] +// CHECK-NEXT: StorageClass: [[BAR_STORAGE_CLASS]] +// CHECK-NEXT: AuxSymbolCount: [[BAR_NUMBER_OF_AUX_SYMBOLS]] -// CHECK: Name = {{_?}}bar_alias -// CHECK-NEXT: Value = [[BAR_VALUE]] -// CHECK-NEXT: SectionNumber = [[BAR_SECTION_NUMBER]] -// CHECK-NEXT: SimpleType = [[BAR_SIMPLE_TYPE]] -// CHECK-NEXT: ComplexType = [[BAR_COMPLEX_TYPE]] -// CHECK-NEXT: StorageClass = [[BAR_STORAGE_CLASS]] -// CHECK-NEXT: NumberOfAuxSymbols = [[BAR_NUMBER_OF_AUX_SYMBOLS]] +// CHECK: Name: {{_?}}bar_alias +// CHECK-NEXT: Value: [[BAR_VALUE]] +// CHECK-NEXT: Section: [[BAR_SECTION_NUMBER]] +// CHECK-NEXT: BaseType: [[BAR_SIMPLE_TYPE]] +// CHECK-NEXT: ComplexType: [[BAR_COMPLEX_TYPE]] +// CHECK-NEXT: StorageClass: [[BAR_STORAGE_CLASS]] +// CHECK-NEXT: AuxSymbolCount: [[BAR_NUMBER_OF_AUX_SYMBOLS]] diff --git a/test/MC/COFF/symbol-fragment-offset-64.s b/test/MC/COFF/symbol-fragment-offset-64.s new file mode 100644 index 0000000..b824470 --- /dev/null +++ b/test/MC/COFF/symbol-fragment-offset-64.s @@ -0,0 +1,168 @@ +// The purpose of this test is to see if the COFF object writer is emitting the +// proper relocations for multiple pieces of data in a single data fragment. + +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-win32 %s | llvm-readobj -h -s -sr -sd -t | FileCheck %s + +.def _main; + .scl 2; + .type 32; + .endef + .text + .globl _main + .align 16, 0x90 +_main: # @main +# BB#0: # %entry + subl $4, %esp + movl $.L_.str0, (%esp) + callq _printf + movl $.L_.str1, (%esp) + callq _puts + movl $.L_.str2, (%esp) + callq _puts + xorl %eax, %eax + addl $4, %esp + ret + + .data +.L_.str0: # @.str0 + .asciz "Hello " + +.L_.str1: # @.str1 + .asciz "World!" + + .align 16 # @.str2 +.L_.str2: + .asciz "I'm The Last Line." + +// CHECK: { +// CHECK: Machine: IMAGE_FILE_MACHINE_AMD64 +// CHECK: SectionCount: 2 +// CHECK: TimeDateStamp: {{[0-9]+}} +// CHECK: PointerToSymbolTable: 0x{{[0-9A-F]+}} +// CHECK: SymbolCount: 7 +// CHECK: OptionalHeaderSize: 0 +// CHECK: Characteristics [ (0x0) +// CHECK: ] +// CHECK: } +// CHECK: Sections [ +// CHECK: Section { +// CHECK: Number: 1 +// CHECK: Name: .text +// CHECK: VirtualSize: 0 +// CHECK: VirtualAddress: 0 +// CHECK: RawDataSize: {{[0-9]+}} +// CHECK: PointerToRawData: 0x{{[0-9A-F]+}} +// CHECK: PointerToRelocations: 0x{{[0-9A-F]+}} +// CHECK: PointerToLineNumbers: 0x0 +// CHECK: RelocationCount: 6 +// CHECK: LineNumberCount: 0 +// CHECK: Characteristics [ (0x60500020) +// CHECK: IMAGE_SCN_ALIGN_16BYTES +// CHECK: IMAGE_SCN_CNT_CODE +// CHECK: IMAGE_SCN_MEM_EXECUTE +// CHECK: IMAGE_SCN_MEM_READ +// CHECK: ] +// CHECK: Relocations [ +// CHECK: 0x7 IMAGE_REL_AMD64_ADDR32 .data +// CHECK: 0xC IMAGE_REL_AMD64_REL32 _printf +// CHECK: 0x14 IMAGE_REL_AMD64_ADDR32 .data +// CHECK: 0x19 IMAGE_REL_AMD64_REL32 _puts +// CHECK: 0x21 IMAGE_REL_AMD64_ADDR32 .data +// CHECK: 0x26 IMAGE_REL_AMD64_REL32 _puts +// CHECK: ] +// CHECK: SectionData ( +// CHECK: 0000: 83EC0467 C7042400 000000E8 00000000 +// CHECK: 0010: 67C70424 07000000 E8000000 0067C704 +// CHECK: 0020: 24100000 00E80000 000031C0 83C404C3 +// CHECK: ) +// CHECK: } +// CHECK: Section { +// CHECK: Number: 2 +// CHECK: Name: .data +// CHECK: VirtualSize: 0 +// CHECK: VirtualAddress: 0 +// CHECK: RawDataSize: {{[0-9]+}} +// CHECK: PointerToRawData: 0x{{[0-9A-F]+}} +// CHECK: PointerToRelocations: 0x0 +// CHECK: PointerToLineNumbers: 0x0 +// CHECK: RelocationCount: 0 +// CHECK: LineNumberCount: 0 +// CHECK: Characteristics [ (0xC0500040) +// CHECK: IMAGE_SCN_ALIGN_16BYTES +// CHECK: IMAGE_SCN_CNT_INITIALIZED_DATA +// CHECK: IMAGE_SCN_MEM_READ +// CHECK: IMAGE_SCN_MEM_WRITE +// CHECK: Relocations [ +// CHECK: ] +// CHECK: SectionData ( +// CHECK: 0000: 48656C6C 6F200057 6F726C64 21000000 |Hello .World!...| +// CHECK: 0010: 49276D20 54686520 4C617374 204C696E |I'm The Last Lin| +// CHECK: 0020: 652E00 |e..| +// CHECK: ) +// CHECK: } +// CHECK: ] +// CHECK: Symbols [ +// CHECK: Symbol { +// CHECK: Name: .text +// CHECK: Value: 0 +// CHECK: Section: .text +// CHECK: BaseType: Null +// CHECK: ComplexType: Null +// CHECK: StorageClass: Static +// CHECK: AuxSymbolCount: 1 +// CHECK: AuxSectionDef { +// CHECK: Length: 48 +// CHECK: RelocationCount: 6 +// CHECK: LineNumberCount: 0 +// CHECK: Checksum: 0x0 +// CHECK: Number: 1 +// CHECK: Selection: 0x0 +// CHECK: Unused: (00 00 00) +// CHECK: } +// CHECK: } +// CHECK: Symbol { +// CHECK: Name: .data +// CHECK: Value: 0 +// CHECK: Section: .data +// CHECK: BaseType: Null +// CHECK: ComplexType: Null +// CHECK: StorageClass: Static +// CHECK: AuxSymbolCount: 1 +// CHECK: AuxSectionDef { +// CHECK: Length: 35 +// CHECK: RelocationCount: 0 +// CHECK: LineNumberCount: 0 +// CHECK: Checksum: 0x0 +// CHECK: Number: 2 +// CHECK: Selection: 0x0 +// CHECK: Unused: (00 00 00) +// CHECK: } +// CHECK: } +// CHECK: Symbol { +// CHECK: Name: _main +// CHECK: Value: 0 +// CHECK: Section: .text +// CHECK: BaseType: Null +// CHECK: ComplexType: Function +// CHECK: StorageClass: External +// CHECK: AuxSymbolCount: 0 +// CHECK: } +// CHECK: Symbol { +// CHECK: Name: _printf +// CHECK: Value: 0 +// CHECK: Section: (0) +// CHECK: BaseType: Null +// CHECK: ComplexType: Null +// CHECK: StorageClass: External +// CHECK: AuxSymbolCount: 0 +// CHECK: } +// CHECK: Symbol { +// CHECK: Name: _puts +// CHECK: Value: 0 +// CHECK: Section: (0) +// CHECK: BaseType: Null +// CHECK: ComplexType: Null +// CHECK: StorageClass: External +// CHECK: AuxSymbolCount: 0 +// CHECK: } +// CHECK: ] diff --git a/test/MC/COFF/symbol-fragment-offset.s b/test/MC/COFF/symbol-fragment-offset.s index 1df8baa..71b1703 100644 --- a/test/MC/COFF/symbol-fragment-offset.s +++ b/test/MC/COFF/symbol-fragment-offset.s @@ -1,8 +1,7 @@ // The purpose of this test is to see if the COFF object writer is emitting the // proper relocations for multiple pieces of data in a single data fragment. -// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | coff-dump.py | FileCheck %s -// I WOULD RUN, BUT THIS FAILS: llvm-mc -filetype=obj -triple x86_64-pc-win32 %s +// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | llvm-readobj -h -s -sr -sd -t | FileCheck %s .def _main; .scl 2; @@ -36,152 +35,134 @@ L_.str2: .asciz "I'm The Last Line." // CHECK: { -// CHECK: MachineType = IMAGE_FILE_MACHINE_I386 (0x14C) -// CHECK: NumberOfSections = 2 -// CHECK: TimeDateStamp = {{[0-9]+}} -// CHECK: PointerToSymbolTable = 0x{{[0-9A-F]+}} -// CHECK: NumberOfSymbols = 7 -// CHECK: SizeOfOptionalHeader = 0 -// CHECK: Characteristics = 0x0 -// CHECK: Sections = [ -// CHECK: 1 = { -// CHECK: Name = .text -// CHECK: VirtualSize = 0 -// CHECK: VirtualAddress = 0 -// CHECK: SizeOfRawData = {{[0-9]+}} -// CHECK: PointerToRawData = 0x{{[0-9A-F]+}} -// CHECK: PointerToRelocations = 0x{{[0-9A-F]+}} -// CHECK: PointerToLineNumbers = 0x0 -// CHECK: NumberOfRelocations = 6 -// CHECK: NumberOfLineNumbers = 0 -// CHECK: Charateristics = 0x60500020 -// CHECK: IMAGE_SCN_CNT_CODE -// CHECK: IMAGE_SCN_ALIGN_16BYTES -// CHECK: IMAGE_SCN_MEM_EXECUTE -// CHECK: IMAGE_SCN_MEM_READ -// CHECK: SectionData = -// CHECK: 83 EC 04 C7 04 24 00 00 - 00 00 E8 00 00 00 00 C7 |.....$..........| -// CHECK: 04 24 07 00 00 00 E8 00 - 00 00 00 C7 04 24 10 00 |.$...........$..| -// CHECK: 00 00 E8 00 00 00 00 31 - C0 83 C4 04 C3 |.......1.....| -// CHECK: Relocations = [ -// CHECK: 0 = { -// CHECK: VirtualAddress = 0x6 -// CHECK: SymbolTableIndex = 2 -// CHECK: Type = IMAGE_REL_I386_DIR32 (6) -// CHECK: SymbolName = .data -// CHECK: } -// CHECK: 1 = { -// CHECK: VirtualAddress = 0xB -// CHECK: SymbolTableIndex = 5 -// CHECK: Type = IMAGE_REL_I386_REL32 (20) -// CHECK: SymbolName = _printf -// CHECK: } -// CHECK: 2 = { -// CHECK: VirtualAddress = 0x12 -// CHECK: SymbolTableIndex = 2 -// CHECK: Type = IMAGE_REL_I386_DIR32 (6) -// CHECK: SymbolName = .data -// CHECK: } -// CHECK: 3 = { -// CHECK: VirtualAddress = 0x17 -// CHECK: SymbolTableIndex = 6 -// CHECK: Type = IMAGE_REL_I386_REL32 (20) -// CHECK: SymbolName = _puts -// CHECK: } -// CHECK: 4 = { -// CHECK: VirtualAddress = 0x1E -// CHECK: SymbolTableIndex = 2 -// CHECK: Type = IMAGE_REL_I386_DIR32 (6) -// CHECK: SymbolName = .data -// CHECK: } -// CHECK: 5 = { -// CHECK: VirtualAddress = 0x23 -// CHECK: SymbolTableIndex = 6 -// CHECK: Type = IMAGE_REL_I386_REL32 (20) -// CHECK: SymbolName = _puts -// CHECK: } -// CHECK: ] -// CHECK: } -// CHECK: 2 = { -// CHECK: Name = .data -// CHECK: VirtualSize = 0 -// CHECK: VirtualAddress = 0 -// CHECK: SizeOfRawData = {{[0-9]+}} -// CHECK: PointerToRawData = 0x{{[0-9A-F]+}} -// CHECK: PointerToRelocations = 0x0 -// CHECK: PointerToLineNumbers = 0x0 -// CHECK: NumberOfRelocations = 0 -// CHECK: NumberOfLineNumbers = 0 -// CHECK: Charateristics = 0xC0500040 -// CHECK: IMAGE_SCN_CNT_INITIALIZED_DATA -// CHECK: IMAGE_SCN_ALIGN_16BYTES -// CHECK: IMAGE_SCN_MEM_READ -// CHECK: IMAGE_SCN_MEM_WRITE -// CHECK: SectionData = -// CHECK: 48 65 6C 6C 6F 20 00 57 - 6F 72 6C 64 21 00 00 00 |Hello .World!...| -// CHECK: 49 27 6D 20 54 68 65 20 - 4C 61 73 74 20 4C 69 6E |I'm The Last Lin| -// CHECK: 65 2E 00 |e..| -// CHECK: Relocations = None -// CHECK: } +// CHECK: Machine: IMAGE_FILE_MACHINE_I386 (0x14C) +// CHECK: SectionCount: 2 +// CHECK: TimeDateStamp: {{[0-9]+}} +// CHECK: PointerToSymbolTable: 0x{{[0-9A-F]+}} +// CHECK: SymbolCount: 7 +// CHECK: OptionalHeaderSize: 0 +// CHECK: Characteristics [ (0x0) // CHECK: ] -// CHECK: Symbols = [ -// CHECK: 0 = { -// CHECK: Name = .text -// CHECK: Value = 0 -// CHECK: SectionNumber = 1 -// CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0) -// CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0) -// CHECK: StorageClass = IMAGE_SYM_CLASS_STATIC (3) -// CHECK: NumberOfAuxSymbols = 1 -// CHECK: AuxillaryData = -// CHECK: 2D 00 00 00 06 00 00 00 - 00 00 00 00 01 00 00 00 |-...............| -// CHECK: 00 00 |..| - -// CHECK: } -// CHECK: 2 = { -// CHECK: Name = .data -// CHECK: Value = 0 -// CHECK: SectionNumber = 2 -// CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0) -// CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0) -// CHECK: StorageClass = IMAGE_SYM_CLASS_STATIC (3) -// CHECK: NumberOfAuxSymbols = 1 -// CHECK: AuxillaryData = -// CHECK: 23 00 00 00 00 00 00 00 - 00 00 00 00 02 00 00 00 |#...............| -// CHECK: 00 00 |..| - -// CHECK: } -// CHECK: 4 = { -// CHECK: Name = _main -// CHECK: Value = 0 -// CHECK: SectionNumber = 1 -// CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0) -// CHECK: ComplexType = IMAGE_SYM_DTYPE_FUNCTION (2) -// CHECK: StorageClass = IMAGE_SYM_CLASS_EXTERNAL (2) -// CHECK: NumberOfAuxSymbols = 0 -// CHECK: AuxillaryData = - -// CHECK: 5 = { -// CHECK: Name = _printf -// CHECK: Value = 0 -// CHECK: SectionNumber = 0 -// CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0) -// CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0) -// CHECK: StorageClass = IMAGE_SYM_CLASS_EXTERNAL (2) -// CHECK: NumberOfAuxSymbols = 0 -// CHECK: AuxillaryData = - +// CHECK: } +// CHECK: Sections [ +// CHECK: Section { +// CHECK: Number: 1 +// CHECK: Name: .text +// CHECK: VirtualSize: 0 +// CHECK: VirtualAddress: 0 +// CHECK: RawDataSize: {{[0-9]+}} +// CHECK: PointerToRawData: 0x{{[0-9A-F]+}} +// CHECK: PointerToRelocations: 0x{{[0-9A-F]+}} +// CHECK: PointerToLineNumbers: 0x0 +// CHECK: RelocationCount: 6 +// CHECK: LineNumberCount: 0 +// CHECK: Characteristics [ (0x60500020) +// CHECK: IMAGE_SCN_ALIGN_16BYTES +// CHECK: IMAGE_SCN_CNT_CODE +// CHECK: IMAGE_SCN_MEM_EXECUTE +// CHECK: IMAGE_SCN_MEM_READ +// CHECK: ] +// CHECK: Relocations [ +// CHECK: 0x6 IMAGE_REL_I386_DIR32 .data +// CHECK: 0xB IMAGE_REL_I386_REL32 _printf +// CHECK: 0x12 IMAGE_REL_I386_DIR32 .data +// CHECK: 0x17 IMAGE_REL_I386_REL32 _puts +// CHECK: 0x1E IMAGE_REL_I386_DIR32 .data +// CHECK: 0x23 IMAGE_REL_I386_REL32 _puts +// CHECK: ] +// CHECK: SectionData ( +// CHECK: 0000: 83EC04C7 04240000 0000E800 000000C7 |.....$..........| +// CHECK: 0010: 04240700 0000E800 000000C7 04241000 |.$...........$..| +// CHECK: 0020: 0000E800 00000031 C083C404 C3 |.......1.....| +// CHECK: ) +// CHECK: } +// CHECK: Section { +// CHECK: Number: 2 +// CHECK: Name: .data +// CHECK: VirtualSize: 0 +// CHECK: VirtualAddress: 0 +// CHECK: RawDataSize: {{[0-9]+}} +// CHECK: PointerToRawData: 0x{{[0-9A-F]+}} +// CHECK: PointerToRelocations: 0x0 +// CHECK: PointerToLineNumbers: 0x0 +// CHECK: RelocationCount: 0 +// CHECK: LineNumberCount: 0 +// CHECK: Characteristics [ (0xC0500040) +// CHECK: IMAGE_SCN_ALIGN_16BYTES +// CHECK: IMAGE_SCN_CNT_INITIALIZED_DATA +// CHECK: IMAGE_SCN_MEM_READ +// CHECK: IMAGE_SCN_MEM_WRITE +// CHECK: Relocations [ +// CHECK: ] +// CHECK: SectionData ( +// CHECK: 0000: 48656C6C 6F200057 6F726C64 21000000 |Hello .World!...| +// CHECK: 0010: 49276D20 54686520 4C617374 204C696E |I'm The Last Lin| +// CHECK: 0020: 652E00 |e..| +// CHECK: ) +// CHECK: } +// CHECK: ] +// CHECK: Symbols [ +// CHECK: Symbol { +// CHECK: Name: .text +// CHECK: Value: 0 +// CHECK: Section: .text +// CHECK: BaseType: Null +// CHECK: ComplexType: Null +// CHECK: StorageClass: Static +// CHECK: AuxSymbolCount: 1 +// CHECK: AuxSectionDef { +// CHECK: Length: 45 +// CHECK: RelocationCount: 6 +// CHECK: LineNumberCount: 0 +// CHECK: Checksum: 0x0 +// CHECK: Number: 1 +// CHECK: Selection: 0x0 +// CHECK: Unused: (00 00 00) // CHECK: } -// CHECK: 6 = { -// CHECK: Name = _puts -// CHECK: Value = 0 -// CHECK: SectionNumber = 0 -// CHECK: SimpleType = IMAGE_SYM_TYPE_NULL (0) -// CHECK: ComplexType = IMAGE_SYM_DTYPE_NULL (0) -// CHECK: StorageClass = IMAGE_SYM_CLASS_EXTERNAL (2) -// CHECK: NumberOfAuxSymbols = 0 -// CHECK: AuxillaryData = - +// CHECK: } +// CHECK: Symbol { +// CHECK: Name: .data +// CHECK: Value: 0 +// CHECK: Section: .data +// CHECK: BaseType: Null +// CHECK: ComplexType: Null +// CHECK: StorageClass: Static +// CHECK: AuxSymbolCount: 1 +// CHECK: AuxSectionDef { +// CHECK: Length: 35 +// CHECK: RelocationCount: 0 +// CHECK: LineNumberCount: 0 +// CHECK: Checksum: 0x0 +// CHECK: Number: 2 +// CHECK: Selection: 0x0 +// CHECK: Unused: (00 00 00) // CHECK: } -// CHECK: ] -// CHECK: } +// CHECK: } +// CHECK: Symbol { +// CHECK: Name: _main +// CHECK: Value: 0 +// CHECK: Section: .text +// CHECK: BaseType: Null +// CHECK: ComplexType: Function +// CHECK: StorageClass: External +// CHECK: AuxSymbolCount: 0 +// CHECK: } +// CHECK: Symbol { +// CHECK: Name: _printf +// CHECK: Value: 0 +// CHECK: Section: (0) +// CHECK: BaseType: Null +// CHECK: ComplexType: Null +// CHECK: StorageClass: External +// CHECK: AuxSymbolCount: 0 +// CHECK: } +// CHECK: Symbol { +// CHECK: Name: _puts +// CHECK: Value: 0 +// CHECK: Section: (0) +// CHECK: BaseType: Null +// CHECK: ComplexType: Null +// CHECK: StorageClass: External +// CHECK: AuxSymbolCount: 0 +// CHECK: } +// CHECK: ] diff --git a/test/MC/COFF/weak-symbol-section-specification.ll b/test/MC/COFF/weak-symbol-section-specification.ll index 5049372..4772c92 100644 --- a/test/MC/COFF/weak-symbol-section-specification.ll +++ b/test/MC/COFF/weak-symbol-section-specification.ll @@ -1,23 +1,25 @@ ; The purpose of this test is to verify that weak linkage type is not ignored by backend, ; if section was specialized. -; RUN: llc -filetype=obj -mtriple i686-pc-win32 %s -o - | coff-dump.py | FileCheck %s +; RUN: llc -filetype=obj -mtriple i686-pc-win32 %s -o - | llvm-readobj -s -sd | FileCheck %s @a = weak unnamed_addr constant { i32, i32, i32 } { i32 0, i32 0, i32 0}, section ".data" -; CHECK: Name = .data$a -; CHECK-NEXT: VirtualSize = 0 -; CHECK-NEXT: VirtualAddress = 0 -; CHECK-NEXT: SizeOfRawData = {{[0-9]+}} -; CHECK-NEXT: PointerToRawData = 0x{{[0-9A-F]+}} -; CHECK-NEXT: PointerToRelocations = 0x0 -; CHECK-NEXT: PointerToLineNumbers = 0x0 -; CHECK-NEXT: NumberOfRelocations = 0 -; CHECK-NEXT: NumberOfLineNumbers = 0 -; CHECK-NEXT: Charateristics = 0x40401040 +; CHECK: Name: .data$a +; CHECK-NEXT: VirtualSize: 0 +; CHECK-NEXT: VirtualAddress: 0 +; CHECK-NEXT: RawDataSize: {{[0-9]+}} +; CHECK-NEXT: PointerToRawData: 0x{{[0-9A-F]+}} +; CHECK-NEXT: PointerToRelocations: 0x0 +; CHECK-NEXT: PointerToLineNumbers: 0x0 +; CHECK-NEXT: RelocationCount: 0 +; CHECK-NEXT: LineNumberCount: 0 +; CHECK-NEXT: Characteristics [ (0x40401040) +; CHECK-NEXT: IMAGE_SCN_ALIGN_8BYTES ; CHECK-NEXT: IMAGE_SCN_CNT_INITIALIZED_DATA ; CHECK-NEXT: IMAGE_SCN_LNK_COMDAT -; CHECK-NEXT: IMAGE_SCN_ALIGN_8BYTES ; CHECK-NEXT: IMAGE_SCN_MEM_READ -; CHECK-NEXT: SectionData = -; CHECK-NEXT: 00 00 00 00 00 00 00 00 - 00 00 00 00 +; CHECK-NEXT: ] +; CHECK-NEXT: SectionData ( +; CHECK-NEXT: 0000: 00000000 00000000 00000000 +; CHECK-NEXT: ) diff --git a/test/MC/COFF/weak.s b/test/MC/COFF/weak.s index 0f99313..b9df0f1 100644 --- a/test/MC/COFF/weak.s +++ b/test/MC/COFF/weak.s @@ -1,7 +1,8 @@ // This tests that default-null weak symbols (a GNU extension) are created // properly via the .weak directive. -// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 < %s | coff-dump.py | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple i686-pc-win32 %s | llvm-readobj -t | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-win32 %s | llvm-readobj -t | FileCheck %s .def _main; .scl 2; @@ -17,7 +18,7 @@ _main: # @main testl %eax, %eax je LBB0_2 # BB#1: # %if.then - calll _test_weak + call _test_weak movl $1, %eax addl $4, %esp ret @@ -28,24 +29,47 @@ LBB0_2: # %return .weak _test_weak -// CHECK: Symbols = [ - -// CHECK: Name = _test_weak -// CHECK-NEXT: Value = 0 -// CHECK-NEXT: SectionNumber = 0 -// CHECK-NEXT: SimpleType = IMAGE_SYM_TYPE_NULL (0) -// CHECK-NEXT: ComplexType = IMAGE_SYM_DTYPE_NULL (0) -// CHECK-NEXT: StorageClass = IMAGE_SYM_CLASS_WEAK_EXTERNAL (105) -// CHECK-NEXT: NumberOfAuxSymbols = 1 -// CHECK-NEXT: AuxillaryData = -// CHECK-NEXT: 05 00 00 00 02 00 00 00 - 00 00 00 00 00 00 00 00 |................| -// CHECK-NEXT: 00 00 |..| - -// CHECK: Name = .weak._test_weak.default -// CHECK-NEXT: Value = 0 -// CHECK-NEXT: SectionNumber = 65535 -// CHECK-NEXT: SimpleType = IMAGE_SYM_TYPE_NULL (0) -// CHECK-NEXT: ComplexType = IMAGE_SYM_DTYPE_NULL (0) -// CHECK-NEXT: StorageClass = IMAGE_SYM_CLASS_EXTERNAL (2) -// CHECK-NEXT: NumberOfAuxSymbols = 0 -// CHECK-NEXT: AuxillaryData = + .weak _test_weak_alias + _test_weak_alias=_main + +// CHECK: Symbols [ + +// CHECK: Symbol { +// CHECK: Name: _test_weak +// CHECK-NEXT: Value: 0 +// CHECK-NEXT: Section: (0) +// CHECK-NEXT: BaseType: Null +// CHECK-NEXT: ComplexType: Null +// CHECK-NEXT: StorageClass: WeakExternal +// CHECK-NEXT: AuxSymbolCount: 1 +// CHECK-NEXT: AuxWeakExternal { +// CHECK-NEXT: Linked: .weak._test_weak.default +// CHECK-NEXT: Search: Library +// CHECK-NEXT: Unused: (00 00 00 00 00 00 00 00 00 00) +// CHECK-NEXT: } +// CHECK-NEXT: } + +// CHECK: Symbol { +// CHECK: Name: .weak._test_weak.default +// CHECK-NEXT: Value: 0 +// CHECK-NEXT: Section: (-1) +// CHECK-NEXT: BaseType: Null +// CHECK-NEXT: ComplexType: Null +// CHECK-NEXT: StorageClass: External +// CHECK-NEXT: AuxSymbolCount: 0 +// CHECK-NEXT: } + +// CHECK: Symbol { +// CHECK: Name: _test_weak_alias +// CHECK-NEXT: Value: 0 +// CHECK-NEXT: Section: (0) +// CHECK-NEXT: BaseType: Null +// CHECK-NEXT: ComplexType: Null +// CHECK-NEXT: StorageClass: WeakExternal +// CHECK-NEXT: AuxSymbolCount: 1 +// CHECK-NEXT: AuxWeakExternal { +// CHECK-NEXT: Linked: _main +// CHECK-NEXT: Search: Library +// CHECK-NEXT: Unused: (00 00 00 00 00 00 00 00 00 00) +// CHECK-NEXT: } +// CHECK-NEXT: } diff --git a/test/MC/Disassembler/AArch64/gicv3-regs.txt b/test/MC/Disassembler/AArch64/gicv3-regs.txt new file mode 100644 index 0000000..4351f64 --- /dev/null +++ b/test/MC/Disassembler/AArch64/gicv3-regs.txt @@ -0,0 +1,222 @@ +# RUN: llvm-mc -triple aarch64-none-linux-gnu -disassemble < %s | FileCheck %s + +0x8 0xcc 0x38 0xd5 +# CHECK: mrs x8, icc_iar1_el1 +0x1a 0xc8 0x38 0xd5 +# CHECK: mrs x26, icc_iar0_el1 +0x42 0xcc 0x38 0xd5 +# CHECK: mrs x2, icc_hppir1_el1 +0x51 0xc8 0x38 0xd5 +# CHECK: mrs x17, icc_hppir0_el1 +0x7d 0xcb 0x38 0xd5 +# CHECK: mrs x29, icc_rpr_el1 +0x24 0xcb 0x3c 0xd5 +# CHECK: mrs x4, ich_vtr_el2 +0x78 0xcb 0x3c 0xd5 +# CHECK: mrs x24, ich_eisr_el2 +0xa9 0xcb 0x3c 0xd5 +# CHECK: mrs x9, ich_elsr_el2 +0x78 0xcc 0x38 0xd5 +# CHECK: mrs x24, icc_bpr1_el1 +0x6e 0xc8 0x38 0xd5 +# CHECK: mrs x14, icc_bpr0_el1 +0x13 0x46 0x38 0xd5 +# CHECK: mrs x19, icc_pmr_el1 +0x97 0xcc 0x38 0xd5 +# CHECK: mrs x23, icc_ctlr_el1 +0x94 0xcc 0x3e 0xd5 +# CHECK: mrs x20, icc_ctlr_el3 +0xbc 0xcc 0x38 0xd5 +# CHECK: mrs x28, icc_sre_el1 +0xb9 0xc9 0x3c 0xd5 +# CHECK: mrs x25, icc_sre_el2 +0xa8 0xcc 0x3e 0xd5 +# CHECK: mrs x8, icc_sre_el3 +0xd6 0xcc 0x38 0xd5 +# CHECK: mrs x22, icc_igrpen0_el1 +0xe5 0xcc 0x38 0xd5 +# CHECK: mrs x5, icc_igrpen1_el1 +0xe7 0xcc 0x3e 0xd5 +# CHECK: mrs x7, icc_igrpen1_el3 +0x16 0xcd 0x38 0xd5 +# CHECK: mrs x22, icc_seien_el1 +0x84 0xc8 0x38 0xd5 +# CHECK: mrs x4, icc_ap0r0_el1 +0xab 0xc8 0x38 0xd5 +# CHECK: mrs x11, icc_ap0r1_el1 +0xdb 0xc8 0x38 0xd5 +# CHECK: mrs x27, icc_ap0r2_el1 +0xf5 0xc8 0x38 0xd5 +# CHECK: mrs x21, icc_ap0r3_el1 +0x2 0xc9 0x38 0xd5 +# CHECK: mrs x2, icc_ap1r0_el1 +0x35 0xc9 0x38 0xd5 +# CHECK: mrs x21, icc_ap1r1_el1 +0x4a 0xc9 0x38 0xd5 +# CHECK: mrs x10, icc_ap1r2_el1 +0x7b 0xc9 0x38 0xd5 +# CHECK: mrs x27, icc_ap1r3_el1 +0x14 0xc8 0x3c 0xd5 +# CHECK: mrs x20, ich_ap0r0_el2 +0x35 0xc8 0x3c 0xd5 +# CHECK: mrs x21, ich_ap0r1_el2 +0x45 0xc8 0x3c 0xd5 +# CHECK: mrs x5, ich_ap0r2_el2 +0x64 0xc8 0x3c 0xd5 +# CHECK: mrs x4, ich_ap0r3_el2 +0xf 0xc9 0x3c 0xd5 +# CHECK: mrs x15, ich_ap1r0_el2 +0x2c 0xc9 0x3c 0xd5 +# CHECK: mrs x12, ich_ap1r1_el2 +0x5b 0xc9 0x3c 0xd5 +# CHECK: mrs x27, ich_ap1r2_el2 +0x74 0xc9 0x3c 0xd5 +# CHECK: mrs x20, ich_ap1r3_el2 +0xa 0xcb 0x3c 0xd5 +# CHECK: mrs x10, ich_hcr_el2 +0x5b 0xcb 0x3c 0xd5 +# CHECK: mrs x27, ich_misr_el2 +0xe6 0xcb 0x3c 0xd5 +# CHECK: mrs x6, ich_vmcr_el2 +0x93 0xc9 0x3c 0xd5 +# CHECK: mrs x19, ich_vseir_el2 +0x3 0xcc 0x3c 0xd5 +# CHECK: mrs x3, ich_lr0_el2 +0x21 0xcc 0x3c 0xd5 +# CHECK: mrs x1, ich_lr1_el2 +0x56 0xcc 0x3c 0xd5 +# CHECK: mrs x22, ich_lr2_el2 +0x75 0xcc 0x3c 0xd5 +# CHECK: mrs x21, ich_lr3_el2 +0x86 0xcc 0x3c 0xd5 +# CHECK: mrs x6, ich_lr4_el2 +0xaa 0xcc 0x3c 0xd5 +# CHECK: mrs x10, ich_lr5_el2 +0xcb 0xcc 0x3c 0xd5 +# CHECK: mrs x11, ich_lr6_el2 +0xec 0xcc 0x3c 0xd5 +# CHECK: mrs x12, ich_lr7_el2 +0x0 0xcd 0x3c 0xd5 +# CHECK: mrs x0, ich_lr8_el2 +0x35 0xcd 0x3c 0xd5 +# CHECK: mrs x21, ich_lr9_el2 +0x4d 0xcd 0x3c 0xd5 +# CHECK: mrs x13, ich_lr10_el2 +0x7a 0xcd 0x3c 0xd5 +# CHECK: mrs x26, ich_lr11_el2 +0x81 0xcd 0x3c 0xd5 +# CHECK: mrs x1, ich_lr12_el2 +0xa8 0xcd 0x3c 0xd5 +# CHECK: mrs x8, ich_lr13_el2 +0xc2 0xcd 0x3c 0xd5 +# CHECK: mrs x2, ich_lr14_el2 +0xe8 0xcd 0x3c 0xd5 +# CHECK: mrs x8, ich_lr15_el2 +0x3b 0xcc 0x18 0xd5 +# CHECK: msr icc_eoir1_el1, x27 +0x25 0xc8 0x18 0xd5 +# CHECK: msr icc_eoir0_el1, x5 +0x2d 0xcb 0x18 0xd5 +# CHECK: msr icc_dir_el1, x13 +0xb5 0xcb 0x18 0xd5 +# CHECK: msr icc_sgi1r_el1, x21 +0xd9 0xcb 0x18 0xd5 +# CHECK: msr icc_asgi1r_el1, x25 +0xfc 0xcb 0x18 0xd5 +# CHECK: msr icc_sgi0r_el1, x28 +0x67 0xcc 0x18 0xd5 +# CHECK: msr icc_bpr1_el1, x7 +0x69 0xc8 0x18 0xd5 +# CHECK: msr icc_bpr0_el1, x9 +0x1d 0x46 0x18 0xd5 +# CHECK: msr icc_pmr_el1, x29 +0x98 0xcc 0x18 0xd5 +# CHECK: msr icc_ctlr_el1, x24 +0x80 0xcc 0x1e 0xd5 +# CHECK: msr icc_ctlr_el3, x0 +0xa2 0xcc 0x18 0xd5 +# CHECK: msr icc_sre_el1, x2 +0xa5 0xc9 0x1c 0xd5 +# CHECK: msr icc_sre_el2, x5 +0xaa 0xcc 0x1e 0xd5 +# CHECK: msr icc_sre_el3, x10 +0xd6 0xcc 0x18 0xd5 +# CHECK: msr icc_igrpen0_el1, x22 +0xeb 0xcc 0x18 0xd5 +# CHECK: msr icc_igrpen1_el1, x11 +0xe8 0xcc 0x1e 0xd5 +# CHECK: msr icc_igrpen1_el3, x8 +0x4 0xcd 0x18 0xd5 +# CHECK: msr icc_seien_el1, x4 +0x9b 0xc8 0x18 0xd5 +# CHECK: msr icc_ap0r0_el1, x27 +0xa5 0xc8 0x18 0xd5 +# CHECK: msr icc_ap0r1_el1, x5 +0xd4 0xc8 0x18 0xd5 +# CHECK: msr icc_ap0r2_el1, x20 +0xe0 0xc8 0x18 0xd5 +# CHECK: msr icc_ap0r3_el1, x0 +0x2 0xc9 0x18 0xd5 +# CHECK: msr icc_ap1r0_el1, x2 +0x3d 0xc9 0x18 0xd5 +# CHECK: msr icc_ap1r1_el1, x29 +0x57 0xc9 0x18 0xd5 +# CHECK: msr icc_ap1r2_el1, x23 +0x6b 0xc9 0x18 0xd5 +# CHECK: msr icc_ap1r3_el1, x11 +0x2 0xc8 0x1c 0xd5 +# CHECK: msr ich_ap0r0_el2, x2 +0x3b 0xc8 0x1c 0xd5 +# CHECK: msr ich_ap0r1_el2, x27 +0x47 0xc8 0x1c 0xd5 +# CHECK: msr ich_ap0r2_el2, x7 +0x61 0xc8 0x1c 0xd5 +# CHECK: msr ich_ap0r3_el2, x1 +0x7 0xc9 0x1c 0xd5 +# CHECK: msr ich_ap1r0_el2, x7 +0x2c 0xc9 0x1c 0xd5 +# CHECK: msr ich_ap1r1_el2, x12 +0x4e 0xc9 0x1c 0xd5 +# CHECK: msr ich_ap1r2_el2, x14 +0x6d 0xc9 0x1c 0xd5 +# CHECK: msr ich_ap1r3_el2, x13 +0x1 0xcb 0x1c 0xd5 +# CHECK: msr ich_hcr_el2, x1 +0x4a 0xcb 0x1c 0xd5 +# CHECK: msr ich_misr_el2, x10 +0xf8 0xcb 0x1c 0xd5 +# CHECK: msr ich_vmcr_el2, x24 +0x9d 0xc9 0x1c 0xd5 +# CHECK: msr ich_vseir_el2, x29 +0x1a 0xcc 0x1c 0xd5 +# CHECK: msr ich_lr0_el2, x26 +0x29 0xcc 0x1c 0xd5 +# CHECK: msr ich_lr1_el2, x9 +0x52 0xcc 0x1c 0xd5 +# CHECK: msr ich_lr2_el2, x18 +0x7a 0xcc 0x1c 0xd5 +# CHECK: msr ich_lr3_el2, x26 +0x96 0xcc 0x1c 0xd5 +# CHECK: msr ich_lr4_el2, x22 +0xba 0xcc 0x1c 0xd5 +# CHECK: msr ich_lr5_el2, x26 +0xdb 0xcc 0x1c 0xd5 +# CHECK: msr ich_lr6_el2, x27 +0xe8 0xcc 0x1c 0xd5 +# CHECK: msr ich_lr7_el2, x8 +0x11 0xcd 0x1c 0xd5 +# CHECK: msr ich_lr8_el2, x17 +0x33 0xcd 0x1c 0xd5 +# CHECK: msr ich_lr9_el2, x19 +0x51 0xcd 0x1c 0xd5 +# CHECK: msr ich_lr10_el2, x17 +0x65 0xcd 0x1c 0xd5 +# CHECK: msr ich_lr11_el2, x5 +0x9d 0xcd 0x1c 0xd5 +# CHECK: msr ich_lr12_el2, x29 +0xa2 0xcd 0x1c 0xd5 +# CHECK: msr ich_lr13_el2, x2 +0xcd 0xcd 0x1c 0xd5 +# CHECK: msr ich_lr14_el2, x13 +0xfb 0xcd 0x1c 0xd5 +# CHECK: msr ich_lr15_el2, x27 diff --git a/test/MC/Disassembler/AArch64/trace-regs.txt b/test/MC/Disassembler/AArch64/trace-regs.txt new file mode 100644 index 0000000..10c5937 --- /dev/null +++ b/test/MC/Disassembler/AArch64/trace-regs.txt @@ -0,0 +1,736 @@ +# RUN: llvm-mc -triple aarch64-none-linux-gnu -disassemble < %s | FileCheck %s + +0x8 0x3 0x31 0xd5 +# CHECK: mrs x8, trcstatr +0xc9 0x0 0x31 0xd5 +# CHECK: mrs x9, trcidr8 +0xcb 0x1 0x31 0xd5 +# CHECK: mrs x11, trcidr9 +0xd9 0x2 0x31 0xd5 +# CHECK: mrs x25, trcidr10 +0xc7 0x3 0x31 0xd5 +# CHECK: mrs x7, trcidr11 +0xc7 0x4 0x31 0xd5 +# CHECK: mrs x7, trcidr12 +0xc6 0x5 0x31 0xd5 +# CHECK: mrs x6, trcidr13 +0xfb 0x8 0x31 0xd5 +# CHECK: mrs x27, trcidr0 +0xfd 0x9 0x31 0xd5 +# CHECK: mrs x29, trcidr1 +0xe4 0xa 0x31 0xd5 +# CHECK: mrs x4, trcidr2 +0xe8 0xb 0x31 0xd5 +# CHECK: mrs x8, trcidr3 +0xef 0xc 0x31 0xd5 +# CHECK: mrs x15, trcidr4 +0xf4 0xd 0x31 0xd5 +# CHECK: mrs x20, trcidr5 +0xe6 0xe 0x31 0xd5 +# CHECK: mrs x6, trcidr6 +0xe6 0xf 0x31 0xd5 +# CHECK: mrs x6, trcidr7 +0x98 0x11 0x31 0xd5 +# CHECK: mrs x24, trcoslsr +0x92 0x15 0x31 0xd5 +# CHECK: mrs x18, trcpdsr +0xdc 0x7a 0x31 0xd5 +# CHECK: mrs x28, trcdevaff0 +0xc5 0x7b 0x31 0xd5 +# CHECK: mrs x5, trcdevaff1 +0xc5 0x7d 0x31 0xd5 +# CHECK: mrs x5, trclsr +0xcb 0x7e 0x31 0xd5 +# CHECK: mrs x11, trcauthstatus +0xcd 0x7f 0x31 0xd5 +# CHECK: mrs x13, trcdevarch +0xf2 0x72 0x31 0xd5 +# CHECK: mrs x18, trcdevid +0xf6 0x73 0x31 0xd5 +# CHECK: mrs x22, trcdevtype +0xee 0x74 0x31 0xd5 +# CHECK: mrs x14, trcpidr4 +0xe5 0x75 0x31 0xd5 +# CHECK: mrs x5, trcpidr5 +0xe5 0x76 0x31 0xd5 +# CHECK: mrs x5, trcpidr6 +0xe9 0x77 0x31 0xd5 +# CHECK: mrs x9, trcpidr7 +0xef 0x78 0x31 0xd5 +# CHECK: mrs x15, trcpidr0 +0xe6 0x79 0x31 0xd5 +# CHECK: mrs x6, trcpidr1 +0xeb 0x7a 0x31 0xd5 +# CHECK: mrs x11, trcpidr2 +0xf4 0x7b 0x31 0xd5 +# CHECK: mrs x20, trcpidr3 +0xf1 0x7c 0x31 0xd5 +# CHECK: mrs x17, trccidr0 +0xe2 0x7d 0x31 0xd5 +# CHECK: mrs x2, trccidr1 +0xf4 0x7e 0x31 0xd5 +# CHECK: mrs x20, trccidr2 +0xe4 0x7f 0x31 0xd5 +# CHECK: mrs x4, trccidr3 +0xb 0x1 0x31 0xd5 +# CHECK: mrs x11, trcprgctlr +0x17 0x2 0x31 0xd5 +# CHECK: mrs x23, trcprocselr +0xd 0x4 0x31 0xd5 +# CHECK: mrs x13, trcconfigr +0x17 0x6 0x31 0xd5 +# CHECK: mrs x23, trcauxctlr +0x9 0x8 0x31 0xd5 +# CHECK: mrs x9, trceventctl0r +0x10 0x9 0x31 0xd5 +# CHECK: mrs x16, trceventctl1r +0x4 0xb 0x31 0xd5 +# CHECK: mrs x4, trcstallctlr +0xe 0xc 0x31 0xd5 +# CHECK: mrs x14, trctsctlr +0x18 0xd 0x31 0xd5 +# CHECK: mrs x24, trcsyncpr +0x1c 0xe 0x31 0xd5 +# CHECK: mrs x28, trcccctlr +0xf 0xf 0x31 0xd5 +# CHECK: mrs x15, trcbbctlr +0x21 0x0 0x31 0xd5 +# CHECK: mrs x1, trctraceidr +0x34 0x1 0x31 0xd5 +# CHECK: mrs x20, trcqctlr +0x42 0x0 0x31 0xd5 +# CHECK: mrs x2, trcvictlr +0x4c 0x1 0x31 0xd5 +# CHECK: mrs x12, trcviiectlr +0x50 0x2 0x31 0xd5 +# CHECK: mrs x16, trcvissctlr +0x48 0x3 0x31 0xd5 +# CHECK: mrs x8, trcvipcssctlr +0x5b 0x8 0x31 0xd5 +# CHECK: mrs x27, trcvdctlr +0x49 0x9 0x31 0xd5 +# CHECK: mrs x9, trcvdsacctlr +0x40 0xa 0x31 0xd5 +# CHECK: mrs x0, trcvdarcctlr +0x8d 0x0 0x31 0xd5 +# CHECK: mrs x13, trcseqevr0 +0x8b 0x1 0x31 0xd5 +# CHECK: mrs x11, trcseqevr1 +0x9a 0x2 0x31 0xd5 +# CHECK: mrs x26, trcseqevr2 +0x8e 0x6 0x31 0xd5 +# CHECK: mrs x14, trcseqrstevr +0x84 0x7 0x31 0xd5 +# CHECK: mrs x4, trcseqstr +0x91 0x8 0x31 0xd5 +# CHECK: mrs x17, trcextinselr +0xb5 0x0 0x31 0xd5 +# CHECK: mrs x21, trccntrldvr0 +0xaa 0x1 0x31 0xd5 +# CHECK: mrs x10, trccntrldvr1 +0xb4 0x2 0x31 0xd5 +# CHECK: mrs x20, trccntrldvr2 +0xa5 0x3 0x31 0xd5 +# CHECK: mrs x5, trccntrldvr3 +0xb1 0x4 0x31 0xd5 +# CHECK: mrs x17, trccntctlr0 +0xa1 0x5 0x31 0xd5 +# CHECK: mrs x1, trccntctlr1 +0xb1 0x6 0x31 0xd5 +# CHECK: mrs x17, trccntctlr2 +0xa6 0x7 0x31 0xd5 +# CHECK: mrs x6, trccntctlr3 +0xbc 0x8 0x31 0xd5 +# CHECK: mrs x28, trccntvr0 +0xb7 0x9 0x31 0xd5 +# CHECK: mrs x23, trccntvr1 +0xa9 0xa 0x31 0xd5 +# CHECK: mrs x9, trccntvr2 +0xa6 0xb 0x31 0xd5 +# CHECK: mrs x6, trccntvr3 +0xf8 0x0 0x31 0xd5 +# CHECK: mrs x24, trcimspec0 +0xf8 0x1 0x31 0xd5 +# CHECK: mrs x24, trcimspec1 +0xef 0x2 0x31 0xd5 +# CHECK: mrs x15, trcimspec2 +0xea 0x3 0x31 0xd5 +# CHECK: mrs x10, trcimspec3 +0xfd 0x4 0x31 0xd5 +# CHECK: mrs x29, trcimspec4 +0xf2 0x5 0x31 0xd5 +# CHECK: mrs x18, trcimspec5 +0xfd 0x6 0x31 0xd5 +# CHECK: mrs x29, trcimspec6 +0xe2 0x7 0x31 0xd5 +# CHECK: mrs x2, trcimspec7 +0x8 0x12 0x31 0xd5 +# CHECK: mrs x8, trcrsctlr2 +0x0 0x13 0x31 0xd5 +# CHECK: mrs x0, trcrsctlr3 +0xc 0x14 0x31 0xd5 +# CHECK: mrs x12, trcrsctlr4 +0x1a 0x15 0x31 0xd5 +# CHECK: mrs x26, trcrsctlr5 +0x1d 0x16 0x31 0xd5 +# CHECK: mrs x29, trcrsctlr6 +0x11 0x17 0x31 0xd5 +# CHECK: mrs x17, trcrsctlr7 +0x0 0x18 0x31 0xd5 +# CHECK: mrs x0, trcrsctlr8 +0x1 0x19 0x31 0xd5 +# CHECK: mrs x1, trcrsctlr9 +0x11 0x1a 0x31 0xd5 +# CHECK: mrs x17, trcrsctlr10 +0x15 0x1b 0x31 0xd5 +# CHECK: mrs x21, trcrsctlr11 +0x1 0x1c 0x31 0xd5 +# CHECK: mrs x1, trcrsctlr12 +0x8 0x1d 0x31 0xd5 +# CHECK: mrs x8, trcrsctlr13 +0x18 0x1e 0x31 0xd5 +# CHECK: mrs x24, trcrsctlr14 +0x0 0x1f 0x31 0xd5 +# CHECK: mrs x0, trcrsctlr15 +0x22 0x10 0x31 0xd5 +# CHECK: mrs x2, trcrsctlr16 +0x3d 0x11 0x31 0xd5 +# CHECK: mrs x29, trcrsctlr17 +0x36 0x12 0x31 0xd5 +# CHECK: mrs x22, trcrsctlr18 +0x26 0x13 0x31 0xd5 +# CHECK: mrs x6, trcrsctlr19 +0x3a 0x14 0x31 0xd5 +# CHECK: mrs x26, trcrsctlr20 +0x3a 0x15 0x31 0xd5 +# CHECK: mrs x26, trcrsctlr21 +0x24 0x16 0x31 0xd5 +# CHECK: mrs x4, trcrsctlr22 +0x2c 0x17 0x31 0xd5 +# CHECK: mrs x12, trcrsctlr23 +0x21 0x18 0x31 0xd5 +# CHECK: mrs x1, trcrsctlr24 +0x20 0x19 0x31 0xd5 +# CHECK: mrs x0, trcrsctlr25 +0x31 0x1a 0x31 0xd5 +# CHECK: mrs x17, trcrsctlr26 +0x28 0x1b 0x31 0xd5 +# CHECK: mrs x8, trcrsctlr27 +0x2a 0x1c 0x31 0xd5 +# CHECK: mrs x10, trcrsctlr28 +0x39 0x1d 0x31 0xd5 +# CHECK: mrs x25, trcrsctlr29 +0x2c 0x1e 0x31 0xd5 +# CHECK: mrs x12, trcrsctlr30 +0x2b 0x1f 0x31 0xd5 +# CHECK: mrs x11, trcrsctlr31 +0x52 0x10 0x31 0xd5 +# CHECK: mrs x18, trcssccr0 +0x4c 0x11 0x31 0xd5 +# CHECK: mrs x12, trcssccr1 +0x43 0x12 0x31 0xd5 +# CHECK: mrs x3, trcssccr2 +0x42 0x13 0x31 0xd5 +# CHECK: mrs x2, trcssccr3 +0x55 0x14 0x31 0xd5 +# CHECK: mrs x21, trcssccr4 +0x4a 0x15 0x31 0xd5 +# CHECK: mrs x10, trcssccr5 +0x56 0x16 0x31 0xd5 +# CHECK: mrs x22, trcssccr6 +0x57 0x17 0x31 0xd5 +# CHECK: mrs x23, trcssccr7 +0x57 0x18 0x31 0xd5 +# CHECK: mrs x23, trcsscsr0 +0x53 0x19 0x31 0xd5 +# CHECK: mrs x19, trcsscsr1 +0x59 0x1a 0x31 0xd5 +# CHECK: mrs x25, trcsscsr2 +0x51 0x1b 0x31 0xd5 +# CHECK: mrs x17, trcsscsr3 +0x53 0x1c 0x31 0xd5 +# CHECK: mrs x19, trcsscsr4 +0x4b 0x1d 0x31 0xd5 +# CHECK: mrs x11, trcsscsr5 +0x45 0x1e 0x31 0xd5 +# CHECK: mrs x5, trcsscsr6 +0x49 0x1f 0x31 0xd5 +# CHECK: mrs x9, trcsscsr7 +0x9a 0x14 0x31 0xd5 +# CHECK: mrs x26, trcpdcr +0x8 0x20 0x31 0xd5 +# CHECK: mrs x8, trcacvr0 +0xf 0x22 0x31 0xd5 +# CHECK: mrs x15, trcacvr1 +0x13 0x24 0x31 0xd5 +# CHECK: mrs x19, trcacvr2 +0x8 0x26 0x31 0xd5 +# CHECK: mrs x8, trcacvr3 +0x1c 0x28 0x31 0xd5 +# CHECK: mrs x28, trcacvr4 +0x3 0x2a 0x31 0xd5 +# CHECK: mrs x3, trcacvr5 +0x19 0x2c 0x31 0xd5 +# CHECK: mrs x25, trcacvr6 +0x18 0x2e 0x31 0xd5 +# CHECK: mrs x24, trcacvr7 +0x26 0x20 0x31 0xd5 +# CHECK: mrs x6, trcacvr8 +0x23 0x22 0x31 0xd5 +# CHECK: mrs x3, trcacvr9 +0x38 0x24 0x31 0xd5 +# CHECK: mrs x24, trcacvr10 +0x23 0x26 0x31 0xd5 +# CHECK: mrs x3, trcacvr11 +0x2c 0x28 0x31 0xd5 +# CHECK: mrs x12, trcacvr12 +0x29 0x2a 0x31 0xd5 +# CHECK: mrs x9, trcacvr13 +0x2e 0x2c 0x31 0xd5 +# CHECK: mrs x14, trcacvr14 +0x23 0x2e 0x31 0xd5 +# CHECK: mrs x3, trcacvr15 +0x55 0x20 0x31 0xd5 +# CHECK: mrs x21, trcacatr0 +0x5a 0x22 0x31 0xd5 +# CHECK: mrs x26, trcacatr1 +0x48 0x24 0x31 0xd5 +# CHECK: mrs x8, trcacatr2 +0x56 0x26 0x31 0xd5 +# CHECK: mrs x22, trcacatr3 +0x46 0x28 0x31 0xd5 +# CHECK: mrs x6, trcacatr4 +0x5d 0x2a 0x31 0xd5 +# CHECK: mrs x29, trcacatr5 +0x45 0x2c 0x31 0xd5 +# CHECK: mrs x5, trcacatr6 +0x52 0x2e 0x31 0xd5 +# CHECK: mrs x18, trcacatr7 +0x62 0x20 0x31 0xd5 +# CHECK: mrs x2, trcacatr8 +0x73 0x22 0x31 0xd5 +# CHECK: mrs x19, trcacatr9 +0x6d 0x24 0x31 0xd5 +# CHECK: mrs x13, trcacatr10 +0x79 0x26 0x31 0xd5 +# CHECK: mrs x25, trcacatr11 +0x72 0x28 0x31 0xd5 +# CHECK: mrs x18, trcacatr12 +0x7d 0x2a 0x31 0xd5 +# CHECK: mrs x29, trcacatr13 +0x69 0x2c 0x31 0xd5 +# CHECK: mrs x9, trcacatr14 +0x72 0x2e 0x31 0xd5 +# CHECK: mrs x18, trcacatr15 +0x9d 0x20 0x31 0xd5 +# CHECK: mrs x29, trcdvcvr0 +0x8f 0x24 0x31 0xd5 +# CHECK: mrs x15, trcdvcvr1 +0x8f 0x28 0x31 0xd5 +# CHECK: mrs x15, trcdvcvr2 +0x8f 0x2c 0x31 0xd5 +# CHECK: mrs x15, trcdvcvr3 +0xb3 0x20 0x31 0xd5 +# CHECK: mrs x19, trcdvcvr4 +0xb6 0x24 0x31 0xd5 +# CHECK: mrs x22, trcdvcvr5 +0xbb 0x28 0x31 0xd5 +# CHECK: mrs x27, trcdvcvr6 +0xa1 0x2c 0x31 0xd5 +# CHECK: mrs x1, trcdvcvr7 +0xdd 0x20 0x31 0xd5 +# CHECK: mrs x29, trcdvcmr0 +0xc9 0x24 0x31 0xd5 +# CHECK: mrs x9, trcdvcmr1 +0xc1 0x28 0x31 0xd5 +# CHECK: mrs x1, trcdvcmr2 +0xc2 0x2c 0x31 0xd5 +# CHECK: mrs x2, trcdvcmr3 +0xe5 0x20 0x31 0xd5 +# CHECK: mrs x5, trcdvcmr4 +0xf5 0x24 0x31 0xd5 +# CHECK: mrs x21, trcdvcmr5 +0xe5 0x28 0x31 0xd5 +# CHECK: mrs x5, trcdvcmr6 +0xe1 0x2c 0x31 0xd5 +# CHECK: mrs x1, trcdvcmr7 +0x15 0x30 0x31 0xd5 +# CHECK: mrs x21, trccidcvr0 +0x18 0x32 0x31 0xd5 +# CHECK: mrs x24, trccidcvr1 +0x18 0x34 0x31 0xd5 +# CHECK: mrs x24, trccidcvr2 +0xc 0x36 0x31 0xd5 +# CHECK: mrs x12, trccidcvr3 +0xa 0x38 0x31 0xd5 +# CHECK: mrs x10, trccidcvr4 +0x9 0x3a 0x31 0xd5 +# CHECK: mrs x9, trccidcvr5 +0x6 0x3c 0x31 0xd5 +# CHECK: mrs x6, trccidcvr6 +0x14 0x3e 0x31 0xd5 +# CHECK: mrs x20, trccidcvr7 +0x34 0x30 0x31 0xd5 +# CHECK: mrs x20, trcvmidcvr0 +0x34 0x32 0x31 0xd5 +# CHECK: mrs x20, trcvmidcvr1 +0x3a 0x34 0x31 0xd5 +# CHECK: mrs x26, trcvmidcvr2 +0x21 0x36 0x31 0xd5 +# CHECK: mrs x1, trcvmidcvr3 +0x2e 0x38 0x31 0xd5 +# CHECK: mrs x14, trcvmidcvr4 +0x3b 0x3a 0x31 0xd5 +# CHECK: mrs x27, trcvmidcvr5 +0x3d 0x3c 0x31 0xd5 +# CHECK: mrs x29, trcvmidcvr6 +0x31 0x3e 0x31 0xd5 +# CHECK: mrs x17, trcvmidcvr7 +0x4a 0x30 0x31 0xd5 +# CHECK: mrs x10, trccidcctlr0 +0x44 0x31 0x31 0xd5 +# CHECK: mrs x4, trccidcctlr1 +0x49 0x32 0x31 0xd5 +# CHECK: mrs x9, trcvmidcctlr0 +0x4b 0x33 0x31 0xd5 +# CHECK: mrs x11, trcvmidcctlr1 +0x96 0x70 0x31 0xd5 +# CHECK: mrs x22, trcitctrl +0xd7 0x78 0x31 0xd5 +# CHECK: mrs x23, trcclaimset +0xce 0x79 0x31 0xd5 +# CHECK: mrs x14, trcclaimclr +0x9c 0x10 0x11 0xd5 +# CHECK: msr trcoslar, x28 +0xce 0x7c 0x11 0xd5 +# CHECK: msr trclar, x14 +0xa 0x1 0x11 0xd5 +# CHECK: msr trcprgctlr, x10 +0x1b 0x2 0x11 0xd5 +# CHECK: msr trcprocselr, x27 +0x18 0x4 0x11 0xd5 +# CHECK: msr trcconfigr, x24 +0x8 0x6 0x11 0xd5 +# CHECK: msr trcauxctlr, x8 +0x10 0x8 0x11 0xd5 +# CHECK: msr trceventctl0r, x16 +0x1b 0x9 0x11 0xd5 +# CHECK: msr trceventctl1r, x27 +0x1a 0xb 0x11 0xd5 +# CHECK: msr trcstallctlr, x26 +0x0 0xc 0x11 0xd5 +# CHECK: msr trctsctlr, x0 +0xe 0xd 0x11 0xd5 +# CHECK: msr trcsyncpr, x14 +0x8 0xe 0x11 0xd5 +# CHECK: msr trcccctlr, x8 +0x6 0xf 0x11 0xd5 +# CHECK: msr trcbbctlr, x6 +0x37 0x0 0x11 0xd5 +# CHECK: msr trctraceidr, x23 +0x25 0x1 0x11 0xd5 +# CHECK: msr trcqctlr, x5 +0x40 0x0 0x11 0xd5 +# CHECK: msr trcvictlr, x0 +0x40 0x1 0x11 0xd5 +# CHECK: msr trcviiectlr, x0 +0x41 0x2 0x11 0xd5 +# CHECK: msr trcvissctlr, x1 +0x40 0x3 0x11 0xd5 +# CHECK: msr trcvipcssctlr, x0 +0x47 0x8 0x11 0xd5 +# CHECK: msr trcvdctlr, x7 +0x52 0x9 0x11 0xd5 +# CHECK: msr trcvdsacctlr, x18 +0x58 0xa 0x11 0xd5 +# CHECK: msr trcvdarcctlr, x24 +0x9c 0x0 0x11 0xd5 +# CHECK: msr trcseqevr0, x28 +0x95 0x1 0x11 0xd5 +# CHECK: msr trcseqevr1, x21 +0x90 0x2 0x11 0xd5 +# CHECK: msr trcseqevr2, x16 +0x90 0x6 0x11 0xd5 +# CHECK: msr trcseqrstevr, x16 +0x99 0x7 0x11 0xd5 +# CHECK: msr trcseqstr, x25 +0x9d 0x8 0x11 0xd5 +# CHECK: msr trcextinselr, x29 +0xb4 0x0 0x11 0xd5 +# CHECK: msr trccntrldvr0, x20 +0xb4 0x1 0x11 0xd5 +# CHECK: msr trccntrldvr1, x20 +0xb6 0x2 0x11 0xd5 +# CHECK: msr trccntrldvr2, x22 +0xac 0x3 0x11 0xd5 +# CHECK: msr trccntrldvr3, x12 +0xb4 0x4 0x11 0xd5 +# CHECK: msr trccntctlr0, x20 +0xa4 0x5 0x11 0xd5 +# CHECK: msr trccntctlr1, x4 +0xa8 0x6 0x11 0xd5 +# CHECK: msr trccntctlr2, x8 +0xb0 0x7 0x11 0xd5 +# CHECK: msr trccntctlr3, x16 +0xa5 0x8 0x11 0xd5 +# CHECK: msr trccntvr0, x5 +0xbb 0x9 0x11 0xd5 +# CHECK: msr trccntvr1, x27 +0xb5 0xa 0x11 0xd5 +# CHECK: msr trccntvr2, x21 +0xa8 0xb 0x11 0xd5 +# CHECK: msr trccntvr3, x8 +0xe6 0x0 0x11 0xd5 +# CHECK: msr trcimspec0, x6 +0xfb 0x1 0x11 0xd5 +# CHECK: msr trcimspec1, x27 +0xf7 0x2 0x11 0xd5 +# CHECK: msr trcimspec2, x23 +0xef 0x3 0x11 0xd5 +# CHECK: msr trcimspec3, x15 +0xed 0x4 0x11 0xd5 +# CHECK: msr trcimspec4, x13 +0xf9 0x5 0x11 0xd5 +# CHECK: msr trcimspec5, x25 +0xf3 0x6 0x11 0xd5 +# CHECK: msr trcimspec6, x19 +0xfb 0x7 0x11 0xd5 +# CHECK: msr trcimspec7, x27 +0x4 0x12 0x11 0xd5 +# CHECK: msr trcrsctlr2, x4 +0x0 0x13 0x11 0xd5 +# CHECK: msr trcrsctlr3, x0 +0x15 0x14 0x11 0xd5 +# CHECK: msr trcrsctlr4, x21 +0x8 0x15 0x11 0xd5 +# CHECK: msr trcrsctlr5, x8 +0x14 0x16 0x11 0xd5 +# CHECK: msr trcrsctlr6, x20 +0xb 0x17 0x11 0xd5 +# CHECK: msr trcrsctlr7, x11 +0x12 0x18 0x11 0xd5 +# CHECK: msr trcrsctlr8, x18 +0x18 0x19 0x11 0xd5 +# CHECK: msr trcrsctlr9, x24 +0xf 0x1a 0x11 0xd5 +# CHECK: msr trcrsctlr10, x15 +0x15 0x1b 0x11 0xd5 +# CHECK: msr trcrsctlr11, x21 +0x4 0x1c 0x11 0xd5 +# CHECK: msr trcrsctlr12, x4 +0x1c 0x1d 0x11 0xd5 +# CHECK: msr trcrsctlr13, x28 +0x3 0x1e 0x11 0xd5 +# CHECK: msr trcrsctlr14, x3 +0x14 0x1f 0x11 0xd5 +# CHECK: msr trcrsctlr15, x20 +0x2c 0x10 0x11 0xd5 +# CHECK: msr trcrsctlr16, x12 +0x31 0x11 0x11 0xd5 +# CHECK: msr trcrsctlr17, x17 +0x2a 0x12 0x11 0xd5 +# CHECK: msr trcrsctlr18, x10 +0x2b 0x13 0x11 0xd5 +# CHECK: msr trcrsctlr19, x11 +0x23 0x14 0x11 0xd5 +# CHECK: msr trcrsctlr20, x3 +0x32 0x15 0x11 0xd5 +# CHECK: msr trcrsctlr21, x18 +0x3a 0x16 0x11 0xd5 +# CHECK: msr trcrsctlr22, x26 +0x25 0x17 0x11 0xd5 +# CHECK: msr trcrsctlr23, x5 +0x39 0x18 0x11 0xd5 +# CHECK: msr trcrsctlr24, x25 +0x25 0x19 0x11 0xd5 +# CHECK: msr trcrsctlr25, x5 +0x24 0x1a 0x11 0xd5 +# CHECK: msr trcrsctlr26, x4 +0x34 0x1b 0x11 0xd5 +# CHECK: msr trcrsctlr27, x20 +0x25 0x1c 0x11 0xd5 +# CHECK: msr trcrsctlr28, x5 +0x2a 0x1d 0x11 0xd5 +# CHECK: msr trcrsctlr29, x10 +0x38 0x1e 0x11 0xd5 +# CHECK: msr trcrsctlr30, x24 +0x34 0x1f 0x11 0xd5 +# CHECK: msr trcrsctlr31, x20 +0x57 0x10 0x11 0xd5 +# CHECK: msr trcssccr0, x23 +0x5b 0x11 0x11 0xd5 +# CHECK: msr trcssccr1, x27 +0x5b 0x12 0x11 0xd5 +# CHECK: msr trcssccr2, x27 +0x46 0x13 0x11 0xd5 +# CHECK: msr trcssccr3, x6 +0x43 0x14 0x11 0xd5 +# CHECK: msr trcssccr4, x3 +0x4c 0x15 0x11 0xd5 +# CHECK: msr trcssccr5, x12 +0x47 0x16 0x11 0xd5 +# CHECK: msr trcssccr6, x7 +0x46 0x17 0x11 0xd5 +# CHECK: msr trcssccr7, x6 +0x54 0x18 0x11 0xd5 +# CHECK: msr trcsscsr0, x20 +0x51 0x19 0x11 0xd5 +# CHECK: msr trcsscsr1, x17 +0x4b 0x1a 0x11 0xd5 +# CHECK: msr trcsscsr2, x11 +0x44 0x1b 0x11 0xd5 +# CHECK: msr trcsscsr3, x4 +0x4e 0x1c 0x11 0xd5 +# CHECK: msr trcsscsr4, x14 +0x56 0x1d 0x11 0xd5 +# CHECK: msr trcsscsr5, x22 +0x43 0x1e 0x11 0xd5 +# CHECK: msr trcsscsr6, x3 +0x4b 0x1f 0x11 0xd5 +# CHECK: msr trcsscsr7, x11 +0x83 0x14 0x11 0xd5 +# CHECK: msr trcpdcr, x3 +0x6 0x20 0x11 0xd5 +# CHECK: msr trcacvr0, x6 +0x14 0x22 0x11 0xd5 +# CHECK: msr trcacvr1, x20 +0x19 0x24 0x11 0xd5 +# CHECK: msr trcacvr2, x25 +0x1 0x26 0x11 0xd5 +# CHECK: msr trcacvr3, x1 +0x1c 0x28 0x11 0xd5 +# CHECK: msr trcacvr4, x28 +0xf 0x2a 0x11 0xd5 +# CHECK: msr trcacvr5, x15 +0x19 0x2c 0x11 0xd5 +# CHECK: msr trcacvr6, x25 +0xc 0x2e 0x11 0xd5 +# CHECK: msr trcacvr7, x12 +0x25 0x20 0x11 0xd5 +# CHECK: msr trcacvr8, x5 +0x39 0x22 0x11 0xd5 +# CHECK: msr trcacvr9, x25 +0x2d 0x24 0x11 0xd5 +# CHECK: msr trcacvr10, x13 +0x2a 0x26 0x11 0xd5 +# CHECK: msr trcacvr11, x10 +0x33 0x28 0x11 0xd5 +# CHECK: msr trcacvr12, x19 +0x2a 0x2a 0x11 0xd5 +# CHECK: msr trcacvr13, x10 +0x33 0x2c 0x11 0xd5 +# CHECK: msr trcacvr14, x19 +0x22 0x2e 0x11 0xd5 +# CHECK: msr trcacvr15, x2 +0x4f 0x20 0x11 0xd5 +# CHECK: msr trcacatr0, x15 +0x4d 0x22 0x11 0xd5 +# CHECK: msr trcacatr1, x13 +0x48 0x24 0x11 0xd5 +# CHECK: msr trcacatr2, x8 +0x41 0x26 0x11 0xd5 +# CHECK: msr trcacatr3, x1 +0x4b 0x28 0x11 0xd5 +# CHECK: msr trcacatr4, x11 +0x48 0x2a 0x11 0xd5 +# CHECK: msr trcacatr5, x8 +0x58 0x2c 0x11 0xd5 +# CHECK: msr trcacatr6, x24 +0x46 0x2e 0x11 0xd5 +# CHECK: msr trcacatr7, x6 +0x77 0x20 0x11 0xd5 +# CHECK: msr trcacatr8, x23 +0x65 0x22 0x11 0xd5 +# CHECK: msr trcacatr9, x5 +0x6b 0x24 0x11 0xd5 +# CHECK: msr trcacatr10, x11 +0x6b 0x26 0x11 0xd5 +# CHECK: msr trcacatr11, x11 +0x63 0x28 0x11 0xd5 +# CHECK: msr trcacatr12, x3 +0x7c 0x2a 0x11 0xd5 +# CHECK: msr trcacatr13, x28 +0x79 0x2c 0x11 0xd5 +# CHECK: msr trcacatr14, x25 +0x64 0x2e 0x11 0xd5 +# CHECK: msr trcacatr15, x4 +0x86 0x20 0x11 0xd5 +# CHECK: msr trcdvcvr0, x6 +0x83 0x24 0x11 0xd5 +# CHECK: msr trcdvcvr1, x3 +0x85 0x28 0x11 0xd5 +# CHECK: msr trcdvcvr2, x5 +0x8b 0x2c 0x11 0xd5 +# CHECK: msr trcdvcvr3, x11 +0xa9 0x20 0x11 0xd5 +# CHECK: msr trcdvcvr4, x9 +0xae 0x24 0x11 0xd5 +# CHECK: msr trcdvcvr5, x14 +0xaa 0x28 0x11 0xd5 +# CHECK: msr trcdvcvr6, x10 +0xac 0x2c 0x11 0xd5 +# CHECK: msr trcdvcvr7, x12 +0xc8 0x20 0x11 0xd5 +# CHECK: msr trcdvcmr0, x8 +0xc8 0x24 0x11 0xd5 +# CHECK: msr trcdvcmr1, x8 +0xd6 0x28 0x11 0xd5 +# CHECK: msr trcdvcmr2, x22 +0xd6 0x2c 0x11 0xd5 +# CHECK: msr trcdvcmr3, x22 +0xe5 0x20 0x11 0xd5 +# CHECK: msr trcdvcmr4, x5 +0xf0 0x24 0x11 0xd5 +# CHECK: msr trcdvcmr5, x16 +0xfb 0x28 0x11 0xd5 +# CHECK: msr trcdvcmr6, x27 +0xf5 0x2c 0x11 0xd5 +# CHECK: msr trcdvcmr7, x21 +0x8 0x30 0x11 0xd5 +# CHECK: msr trccidcvr0, x8 +0x6 0x32 0x11 0xd5 +# CHECK: msr trccidcvr1, x6 +0x9 0x34 0x11 0xd5 +# CHECK: msr trccidcvr2, x9 +0x8 0x36 0x11 0xd5 +# CHECK: msr trccidcvr3, x8 +0x3 0x38 0x11 0xd5 +# CHECK: msr trccidcvr4, x3 +0x15 0x3a 0x11 0xd5 +# CHECK: msr trccidcvr5, x21 +0xc 0x3c 0x11 0xd5 +# CHECK: msr trccidcvr6, x12 +0x7 0x3e 0x11 0xd5 +# CHECK: msr trccidcvr7, x7 +0x24 0x30 0x11 0xd5 +# CHECK: msr trcvmidcvr0, x4 +0x23 0x32 0x11 0xd5 +# CHECK: msr trcvmidcvr1, x3 +0x29 0x34 0x11 0xd5 +# CHECK: msr trcvmidcvr2, x9 +0x31 0x36 0x11 0xd5 +# CHECK: msr trcvmidcvr3, x17 +0x2e 0x38 0x11 0xd5 +# CHECK: msr trcvmidcvr4, x14 +0x2c 0x3a 0x11 0xd5 +# CHECK: msr trcvmidcvr5, x12 +0x2a 0x3c 0x11 0xd5 +# CHECK: msr trcvmidcvr6, x10 +0x23 0x3e 0x11 0xd5 +# CHECK: msr trcvmidcvr7, x3 +0x4e 0x30 0x11 0xd5 +# CHECK: msr trccidcctlr0, x14 +0x56 0x31 0x11 0xd5 +# CHECK: msr trccidcctlr1, x22 +0x48 0x32 0x11 0xd5 +# CHECK: msr trcvmidcctlr0, x8 +0x4f 0x33 0x11 0xd5 +# CHECK: msr trcvmidcctlr1, x15 +0x81 0x70 0x11 0xd5 +# CHECK: msr trcitctrl, x1 +0xc7 0x78 0x11 0xd5 +# CHECK: msr trcclaimset, x7 +0xdd 0x79 0x11 0xd5 +# CHECK: msr trcclaimclr, x29 + + diff --git a/test/MC/Disassembler/ARM/arm-tests.txt b/test/MC/Disassembler/ARM/arm-tests.txt index 0c9aaab..98daaa7 100644 --- a/test/MC/Disassembler/ARM/arm-tests.txt +++ b/test/MC/Disassembler/ARM/arm-tests.txt @@ -51,24 +51,48 @@ # CHECKx: ldclvc p5, cr15, [r8], #-0 #0x00 0xf5 0x78 0x7c +# CHECK: ldc p13, c9, [r2, #0]! +0x00 0x9d 0xb2 0xed + +# CHECK: ldcl p1, c9, [r3, #0]! +0x00 0x91 0xf3 0xed + # CHECK: ldr r0, [r2], #15 0x0f 0x00 0x92 0xe4 # CHECK: ldr r5, [r7, -r10, lsl #2] 0x0a 0x51 0x17 0xe7 +# CHECK: ldr r4, [r5, #0]! +0x00 0x40 0xb5 0xe5 + +# CHECK: ldrb lr, [r10, #0]! +0x00 0xe0 0xfa 0xe5 + +# CHECK: ldrd r4, r5, [r0, #0]! +0xd0 0x40 0xe0 0xe1 + # CHECK: ldrh r0, [r2], #0 0xb0 0x00 0xd2 0xe0 # CHECK: ldrh r0, [r2] 0xb0 0x00 0xd2 0xe1 +# CHECK: ldrh lr, [sp, #0]! +0xb0 0xe0 0xfd 0xe1 + # CHECK: ldrht r0, [r2], #15 0xbf 0x00 0xf2 0xe0 +# CHECK: ldrsb r1, [lr, #0]! +0xd0 0x10 0xfe 0xe1 + # CHECK: ldrsbtvs lr, [r2], -r9 0xd9 0xe0 0x32 0x60 +# CHECK: ldrsh r9, [r1, #0] +0xf0 0x90 0xf1 0xe1 + # CHECK: lsls r0, r2, #31 0x82 0x0f 0xb0 0xe1 @@ -245,9 +269,27 @@ # CHECK: stc p2, c4, [r9], {157} 0x9d 0x42 0x89 0xec +# CHECK: stc p15, c0, [r3, #0]! +0x00 0x0f 0xa3 0xed + # CHECK: stc2 p2, c4, [r9], {157} 0x9d 0x42 0x89 0xfc +# CHECK: stcl p13, c12, [r9, #0]! +0x00 0xcd 0xe9 0xed + +# CHECK: str pc, [r11, #0]! +0x00 0xf0 0xab 0xe5 + +# CHECK: strb r9, [r10, #0]! +0x00 0x90 0xea 0xe5 + +# CHECK: strd r12, sp, [r6, #0]! +0xf0 0xc0 0xe6 0xe1 + +# CHECK: strh r7, [r9, #0]! +0xb0 0x70 0xe9 0xe1 + # CHECK: bne #-24 0xfa 0xff 0xff 0x1a diff --git a/test/MC/Disassembler/ARM/arm-thumb-trustzone.txt b/test/MC/Disassembler/ARM/arm-thumb-trustzone.txt new file mode 100644 index 0000000..d6b7cf1 --- /dev/null +++ b/test/MC/Disassembler/ARM/arm-thumb-trustzone.txt @@ -0,0 +1,17 @@ +# RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -disassemble -mattr=-trustzone < %s | FileCheck %s -check-prefix=NOTZ +# RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -disassemble -mattr=trustzone < %s | FileCheck %s -check-prefix=TZ + + +#------------------------------------------------------------------------------ +# SMC +#------------------------------------------------------------------------------ + +0xff 0xf7 0x00 0x80 +0x0c 0xbf +0xf0 0xf7 0x00 0x80 + +# NOTZ-NOT: smc #15 +# NOTZ-NOT: smceq #0 +# TZ: smc #15 +# TZ: ite eq +# TZ: smceq #0 diff --git a/test/MC/Disassembler/ARM/arm-trustzone.txt b/test/MC/Disassembler/ARM/arm-trustzone.txt new file mode 100644 index 0000000..92d5d6b --- /dev/null +++ b/test/MC/Disassembler/ARM/arm-trustzone.txt @@ -0,0 +1,16 @@ +# RUN: llvm-mc -triple=armv7-apple-darwin -mcpu=cortex-a8 -disassemble -mattr=-trustzone < %s | FileCheck %s -check-prefix=NOTZ +# RUN: llvm-mc -triple=armv7-apple-darwin -mcpu=cortex-a8 -disassemble -mattr=trustzone < %s | FileCheck %s -check-prefix=TZ + + +#------------------------------------------------------------------------------ +# SMC +#------------------------------------------------------------------------------ + +0x7f 0x00 0x60 0xe1 +0x70 0x00 0x60 0x01 + +# NOTZ-NOT: smc #15 +# NOTZ-NOT: smceq #0 +# TZ: smc #15 +# TZ: smceq #0 + diff --git a/test/MC/Disassembler/ARM/basic-arm-instructions.txt b/test/MC/Disassembler/ARM/basic-arm-instructions.txt index 1100ce6..9f63e1e 100644 --- a/test/MC/Disassembler/ARM/basic-arm-instructions.txt +++ b/test/MC/Disassembler/ARM/basic-arm-instructions.txt @@ -707,8 +707,10 @@ # CHECK: mov r3, #7 # CHECK: mov r4, #4080 # CHECK: mov r5, #16711680 +# CHECK: mov sp, #35 # CHECK: movw r6, #65535 # CHECK: movw r9, #65535 +# CHECK: movw sp, #1193 # CHECK: movs r3, #7 # CHECK: moveq r4, #4080 # CHECK: movseq r5, #16711680 @@ -716,8 +718,10 @@ 0x07 0x30 0xa0 0xe3 0xff 0x4e 0xa0 0xe3 0xff 0x58 0xa0 0xe3 +0x23 0xd0 0xa0 0xe3 0xff 0x6f 0x0f 0xe3 0xff 0x9f 0x0f 0xe3 +0xa9 0xd4 0x00 0xe3 0x07 0x30 0xb0 0xe3 0xff 0x4e 0xa0 0x03 0xff 0x58 0xb0 0x03 @@ -740,10 +744,12 @@ #------------------------------------------------------------------------------ # CHECK: movt r3, #7 # CHECK: movt r6, #65535 +# CHECK: movt sp, #3397 # CHECK: movteq r4, #4080 0x07 0x30 0x40 0xe3 0xff 0x6f 0x4f 0xe3 +0x45 0xdd 0x40 0xe3 0xf0 0x4f 0x40 0x03 @@ -1442,15 +1448,6 @@ 0xf2 0x4f 0x38 0xc6 #------------------------------------------------------------------------------ -# SMC -#------------------------------------------------------------------------------ -# CHECK: smc #15 -# CHECK: smceq #0 - -0x7f 0x00 0x60 0xe1 -0x70 0x00 0x60 0x01 - -#------------------------------------------------------------------------------ # SMLABB/SMLABT/SMLATB/SMLATT #------------------------------------------------------------------------------ # CHECK: smlabb r3, r1, r9, r0 @@ -1826,12 +1823,13 @@ # CHECK: strexh r4, r2, [r5 # CHECK: strex r2, r1, [r7 # CHECK: strexd r6, r2, r3, [r8 +# CHECK: strexd sp, r0, r1, [r0] 0x93 0x1f 0xc4 0xe1 0x92 0x4f 0xe5 0xe1 0x91 0x2f 0x87 0xe1 0x92 0x6f 0xa8 0xe1 - +0x90 0xdf 0xa0 0xe1 #------------------------------------------------------------------------------ # SUB diff --git a/test/MC/Disassembler/ARM/invalid-LDR_POST-arm.txt b/test/MC/Disassembler/ARM/invalid-LDR_POST-arm.txt index 0cff28a..ecab5a5 100644 --- a/test/MC/Disassembler/ARM/invalid-LDR_POST-arm.txt +++ b/test/MC/Disassembler/ARM/invalid-LDR_POST-arm.txt @@ -1,5 +1,4 @@ # RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 2>&1 | grep "invalid instruction encoding" -# XFAIL: * # LDR_PRE/POST has encoding Inst{4} = 0. 0xde 0x69 0x18 0x46 diff --git a/test/MC/Disassembler/ARM/invalid-hint-arm.txt b/test/MC/Disassembler/ARM/invalid-hint-arm.txt new file mode 100644 index 0000000..7da96d8 --- /dev/null +++ b/test/MC/Disassembler/ARM/invalid-hint-arm.txt @@ -0,0 +1,13 @@ +# RUN: llvm-mc -triple=armv7-apple-darwin -mcpu=cortex-a8 -disassemble < %s 2>&1 | FileCheck %s + +#------------------------------------------------------------------------------ +# Undefined encoding space for hint instructions +#------------------------------------------------------------------------------ + +0x05 0xf0 0x20 0xe3 +# CHECK: invalid instruction encoding +0x41 0xf0 0x20 0xe3 +# CHECK: invalid instruction encoding +0xfe 0xf0 0x20 0xe3 +# CHECK: invalid instruction encoding + diff --git a/test/MC/Disassembler/ARM/invalid-hint-thumb.txt b/test/MC/Disassembler/ARM/invalid-hint-thumb.txt new file mode 100644 index 0000000..1e41336 --- /dev/null +++ b/test/MC/Disassembler/ARM/invalid-hint-thumb.txt @@ -0,0 +1,8 @@ +# RUN: llvm-mc -triple=thumbv7 -disassemble -show-encoding < %s 2>&1 | FileCheck %s + +#------------------------------------------------------------------------------ +# Undefined encoding space for hint instructions +#------------------------------------------------------------------------------ + +0xaf 0xf3 0x05 0x80 +# CHECK: invalid instruction encoding diff --git a/test/MC/Disassembler/ARM/thumb2.txt b/test/MC/Disassembler/ARM/thumb2.txt index 45dace3..31f75b3 100644 --- a/test/MC/Disassembler/ARM/thumb2.txt +++ b/test/MC/Disassembler/ARM/thumb2.txt @@ -254,9 +254,12 @@ #------------------------------------------------------------------------------ # CHECK: cbnz r7, #6 # CHECK: cbnz r7, #12 +# CHECK: cbz r4, #64 0x1f 0xb9 0x37 0xb9 +0x04 0xb3 + #------------------------------------------------------------------------------ # CDP/CDP2 @@ -554,6 +557,7 @@ # CHECK: ldr.w r8, [r8, r2, lsl #2] # CHECK: ldr.w r7, [sp, r2, lsl #1] # CHECK: ldr.w r7, [sp, r2] +# CHECK: ldr pc, [sp], #12 # CHECK: ldr r2, [r4, #255]! # CHECK: ldr r8, [sp, #4]! # CHECK: ldr lr, [sp, #-4]! @@ -567,6 +571,7 @@ 0x58 0xf8 0x22 0x80 0x5d 0xf8 0x12 0x70 0x5d 0xf8 0x02 0x70 +0x5d 0xf8 0x0c 0xfb 0x54 0xf8 0xff 0x2f 0x5d 0xf8 0x04 0x8f 0x5d 0xf8 0x04 0xed diff --git a/test/MC/Disassembler/Mips/mips-dsp.txt b/test/MC/Disassembler/Mips/mips-dsp.txt new file mode 100644 index 0000000..d10e62c --- /dev/null +++ b/test/MC/Disassembler/Mips/mips-dsp.txt @@ -0,0 +1,13 @@ +# RUN: llvm-mc -triple=mipsel-unknown-linux -mattr=+dsp -disassemble < %s | FileCheck %s + +# CHECK: mfhi $21, $ac3 +0x10 0xa8 0x60 0x00 + +# CHECK: mflo $21, $ac3 +0x12 0xa8 0x60 0x00 + +# CHECK: mthi $21, $ac3 +0x11 0x18 0xa0 0x02 + +# CHECK: mtlo $21, $ac3 +0x13 0x18 0xa0 0x02 diff --git a/test/MC/Disassembler/Mips/mips32.txt b/test/MC/Disassembler/Mips/mips32.txt index 7022486..ef8bf71 100644 --- a/test/MC/Disassembler/Mips/mips32.txt +++ b/test/MC/Disassembler/Mips/mips32.txt @@ -1,5 +1,4 @@ # RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux | FileCheck %s -# CHECK: .section __TEXT,__text,regular,pure_instructions # CHECK: abs.d $f12, $f14 0x46 0x20 0x73 0x05 diff --git a/test/MC/Disassembler/Mips/mips32_le.txt b/test/MC/Disassembler/Mips/mips32_le.txt index 48fa8e2..a0885a4 100644 --- a/test/MC/Disassembler/Mips/mips32_le.txt +++ b/test/MC/Disassembler/Mips/mips32_le.txt @@ -1,5 +1,4 @@ # RUN: llvm-mc --disassemble %s -triple=mipsel-unknown-linux | FileCheck %s -# CHECK: .section __TEXT,__text,regular,pure_instructions # CHECK: abs.d $f12, $f14 0x05 0x73 0x20 0x46 diff --git a/test/MC/Disassembler/Mips/mips32r2.txt b/test/MC/Disassembler/Mips/mips32r2.txt index 3b70db3..991eaa6 100644 --- a/test/MC/Disassembler/Mips/mips32r2.txt +++ b/test/MC/Disassembler/Mips/mips32r2.txt @@ -1,5 +1,4 @@ # RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2 | FileCheck %s -# CHECK: .section __TEXT,__text,regular,pure_instructions # CHECK: abs.d $f12, $f14 0x46 0x20 0x73 0x05 diff --git a/test/MC/Disassembler/Mips/mips32r2_le.txt b/test/MC/Disassembler/Mips/mips32r2_le.txt index ecfde7a..10c2938 100644 --- a/test/MC/Disassembler/Mips/mips32r2_le.txt +++ b/test/MC/Disassembler/Mips/mips32r2_le.txt @@ -1,5 +1,4 @@ # RUN: llvm-mc --disassemble %s -triple=mipsel-unknown-linux -mcpu=mips32r2 | FileCheck %s -# CHECK: .section __TEXT,__text,regular,pure_instructions # CHECK: abs.d $f12, $f14 0x05 0x73 0x20 0x46 diff --git a/test/MC/Disassembler/Mips/mips64.txt b/test/MC/Disassembler/Mips/mips64.txt index 38b1377..b887473 100644 --- a/test/MC/Disassembler/Mips/mips64.txt +++ b/test/MC/Disassembler/Mips/mips64.txt @@ -1,5 +1,4 @@ # RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux | FileCheck %s -# CHECK: .section __TEXT,__text,regular,pure_instructions # CHECK: daddiu $11, $26, 31949 0x67 0x4b 0x7c 0xcd diff --git a/test/MC/Disassembler/Mips/mips64_le.txt b/test/MC/Disassembler/Mips/mips64_le.txt index a7ef0e4..ddc3c2b 100644 --- a/test/MC/Disassembler/Mips/mips64_le.txt +++ b/test/MC/Disassembler/Mips/mips64_le.txt @@ -1,5 +1,4 @@ # RUN: llvm-mc --disassemble %s -triple=mips64el-unknown-linux | FileCheck %s -# CHECK: .section __TEXT,__text,regular,pure_instructions # CHECK: daddiu $11, $26, 31949 0xcd 0x7c 0x4b 0x67 diff --git a/test/MC/Disassembler/Mips/mips64r2.txt b/test/MC/Disassembler/Mips/mips64r2.txt index 0b421fc..cee6f3c 100644 --- a/test/MC/Disassembler/Mips/mips64r2.txt +++ b/test/MC/Disassembler/Mips/mips64r2.txt @@ -1,5 +1,4 @@ # RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mattr +mips64r2 | FileCheck %s -# CHECK: .section __TEXT,__text,regular,pure_instructions # CHECK: daddiu $11, $26, 31949 0x67 0x4b 0x7c 0xcd diff --git a/test/MC/Disassembler/Mips/mips64r2_le.txt b/test/MC/Disassembler/Mips/mips64r2_le.txt index c1d326f..82e4d6a 100644 --- a/test/MC/Disassembler/Mips/mips64r2_le.txt +++ b/test/MC/Disassembler/Mips/mips64r2_le.txt @@ -1,5 +1,4 @@ # RUN: llvm-mc --disassemble %s -triple=mips64el-unknown-linux -mattr +mips64r2 | FileCheck %s -# CHECK: .section __TEXT,__text,regular,pure_instructions # CHECK: daddiu $11, $26, 31949 0xcd 0x7c 0x4b 0x67 diff --git a/test/MC/Disassembler/X86/intel-syntax.txt b/test/MC/Disassembler/X86/intel-syntax.txt index 27694cd..57e602f 100644 --- a/test/MC/Disassembler/X86/intel-syntax.txt +++ b/test/MC/Disassembler/X86/intel-syntax.txt @@ -110,3 +110,12 @@ # CHECK: vpgatherdd XMM10, DWORD PTR [R15 + 2*XMM9], XMM8 0xc4 0x02 0x39 0x90 0x14 0x4f + +# CHECK: xsave64 OPAQUE PTR [RAX] +0x48 0x0f 0xae 0x20 + +# CHECK: xrstor64 OPAQUE PTR [RAX] +0x48 0x0f 0xae 0x28 + +# CHECK: xsaveopt64 OPAQUE PTR [RAX] +0x48 0x0f 0xae 0x30 diff --git a/test/MC/Disassembler/X86/simple-tests.txt b/test/MC/Disassembler/X86/simple-tests.txt index 5ea40eb..9827a18 100644 --- a/test/MC/Disassembler/X86/simple-tests.txt +++ b/test/MC/Disassembler/X86/simple-tests.txt @@ -753,3 +753,18 @@ # CHECK: lock # CHECK-NEXT: xaddq %rcx, %rbx 0xf0 0x48 0x0f 0xc1 0xcb + +# rdar://13493622 lldb doesn't print the x86 rep/repne prefix when disassembling +# CHECK: repne +# CHECK-NEXT: movsd +0xf2 0xa5 +# CHECK: repne +# CHECK-NEXT: movsq +0xf2 0x48 0xa5 +# CHECK: repne +# CHECK-NEXT: movb $0, (%rax) +0xf2 0xc6 0x0 0x0 +# CHECK: rep +# CHECK-NEXT: lock +# CHECK-NEXT: incl (%rax) +0xf3 0xf0 0xff 0x00 diff --git a/test/MC/Disassembler/X86/x86-64.txt b/test/MC/Disassembler/X86/x86-64.txt index 5de1d59..c285af7 100644 --- a/test/MC/Disassembler/X86/x86-64.txt +++ b/test/MC/Disassembler/X86/x86-64.txt @@ -112,3 +112,18 @@ # CHECK: xabort $13 0xc6 0xf8 0x0d + +# CHECK: xsaveq (%rax) +0x48 0x0f 0xae 0x20 + +# CHECK: xrstorq (%rax) +0x48 0x0f 0xae 0x28 + +# CHECK: xsaveoptq (%rax) +0x48 0x0f 0xae 0x30 + +# CHECK: clac +0x0f 0x01 0xca + +# CHECK: stac +0x0f 0x01 0xcb diff --git a/test/MC/Disassembler/XCore/xcore.txt b/test/MC/Disassembler/XCore/xcore.txt index 8ad7588..d509aff 100644 --- a/test/MC/Disassembler/XCore/xcore.txt +++ b/test/MC/Disassembler/XCore/xcore.txt @@ -1,5 +1,4 @@ # RUN: llvm-mc --disassemble %s -triple=xcore-xmos-elf | FileCheck %s -# CHECK: .section __TEXT,__text,regular,pure_instructions # 0r instructions @@ -95,6 +94,9 @@ # CHECK: bla r6 0xe6 0x27 +# CHECK: bru r8 +0xe8 0x2f + # CHECK: syncr res[r7] 0xf7 0x87 @@ -237,8 +239,8 @@ # CHECK: mkmsk r4, 24 0x72 0xa7 -# CHECK: outct res[r3], r0 -0xcc 0x4e +# CHECK: outct res[r3], 0 +0xdc 0x4e # CHECK: sext r8, 16 0xb1 0x37 @@ -383,8 +385,8 @@ # CHECK: ldaw r9, r1[r2] 0x96 0xf8 0xec 0x1f -# CHECK: ldaw r8, r7[r11] -0xcf 0xfd 0xec 0x1f +# CHECK: ldaw r8, r7[-r11] +0xcf 0xfd 0xec 0x27 # CHECK: mul r0, r4, r2 0xc2 0xf8 0xec 0x3f @@ -398,6 +400,9 @@ # CHECK: st16 r5, r3[r8] 0xdc 0xfc 0xec 0x87 +# CHECK: st8 r9, r1[r3] +0x97 0xf8 0xec 0x8f + # CHECK: stw r7, r10[r1] 0xf9 0xf9 0xec 0x07 @@ -453,36 +458,72 @@ # CHECK: ldaw r1, dp[456] 0x07 0xf0 0x48 0x60 +# CHECK: ldaw cp, dp[5] +0x05 0x63 + +# CHECK: ldaw sp, dp[9929] +0x9b 0xf0 0x89 0x63 + # CHECK: ldaw r3, sp[2] 0xc2 0x64 # CHECK: ldaw r8, sp[65535] 0xff 0xf3 0x3f 0x66 +# CHECK: ldaw sp, sp[41] +0xa9 0x67 + +# CHECK: ldaw sp, sp[13121] +0xcd 0xf0 0x81 0x67 + # CHECK: ldc r3, 30 0xde 0x68 # CHECK: ldc r11, 1000 0x0f 0xf0 0xe8 0x6a +# CHECK: ldc sp, 0 +0x80 0x6b + +# CHECK: ldc lr, 81 +0x01 0xf0 0xd1 0x6b + # CHECK: ldw r0, cp[4] 0x04 0x6c # CHECK: ldw r1, cp[32345] 0xf9 0xf1 0x59 0x6c +# CHECK: ldw cp, cp[8] +0x08 0x6f + +# CHECK: ldw sp, cp[10222] +0x9f 0xf0 0xae 0x6f + # CHECK: ldw r10, dp[16] 0x90 0x5a # CHECK: ldw r10, dp[76] 0x01 0xf0 0x8c 0x5a +# CHECK: ldw lr, dp[8] +0xc8 0x5b + +# CHECK: ldw dp, dp[33221] +0x07 0xf2 0x45 0x5b + # CHECK: ldw r8, sp[51] 0x33 0x5e # CHECK: ldw r8, sp[1225] 0x13 0xf0 0x09 0x5e +# CHECK: ldw cp, sp[31] +0x1f 0x5f + +# CHECK: ldw sp, sp[1000] +0x0f 0xf0 0xa8 0x5f + # CHECK: setc res[r5], 36 0x64 0xe9 @@ -495,12 +536,24 @@ # CHECK: stw r9, dp[654] 0x0a 0xf0 0x4e 0x52 +# CHECK: stw lr, dp[23] +0xd7 0x53 + +# CHECK: stw sp, dp[44442] +0xb6 0xf2 0x9a 0x53 + # CHECK: stw r1, sp[32] 0x60 0x54 # CHECK: stw r0, sp[8761] 0x88 0xf0 0x39 0x54 +# CHECK: stw cp, sp[63] +0x3f 0x57 + +# CHECK: stw lr, sp[4391] +0x44 0xf0 0xe7 0x57 + # u6 / lu6 instructions # CHECK: bu -20 @@ -610,8 +663,8 @@ # CHECK: ldw r11, cp[132] 0x84 0xe4 -# CHECK: ldw r11, cp[3444] -0x35 0xf0 0xf4 0x6e +# CHECK: ldw r11, cp[102741] +0x64 0xf0 0x55 0xe5 # l6r instructions diff --git a/test/MC/ELF/abs.s b/test/MC/ELF/abs.s index 48dbe3d..1836f40 100644 --- a/test/MC/ELF/abs.s +++ b/test/MC/ELF/abs.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -t | FileCheck %s // Test that zed will be an ABS symbol @@ -6,11 +6,12 @@ .Lbar: zed = .Lfoo - .Lbar -// CHECK: # Symbol 1 -// CHECK-NEXT: (('st_name', 0x00000001) # 'zed' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0xfff1) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK: Symbol { +// CHECK: Name: zed +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0xFFF1) +// CHECK-NEXT: } diff --git a/test/MC/ELF/alias-reloc.s b/test/MC/ELF/alias-reloc.s index f0db815..c25c259 100644 --- a/test/MC/ELF/alias-reloc.s +++ b/test/MC/ELF/alias-reloc.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -r -t | FileCheck %s // Test that this produces a R_X86_64_PLT32 with bar. @@ -17,36 +17,30 @@ foo2: .set bar2,foo2 .quad bar2 -// CHECK: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000001) -// CHECK-NEXT: ('r_sym', 0x00000001) -// CHECK-NEXT: ('r_type', 0x00000004) -// CHECK-NEXT: ('r_addend', 0xfffffffffffffffc) -// CHECK-NEXT: ), - -// CHECK: # Relocation 1 -// CHECK-NEXT: (('r_offset', 0x0000000000000005) -// CHECK-NEXT: ('r_sym', 0x00000006) -// CHECK-NEXT: ('r_type', 0x00000001) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), - -// CHECK: # Symbol 1 -// CHECK-NEXT: (('st_name', 0x00000005) # 'bar' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), - -// CHECK: # Symbol 6 -// CHECK-NEXT: (('st_name', 0x0000000e) # 'bar2' -// CHECK-NEXT: ('st_bind', 0x2) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0004) -// CHECK-NEXT: ('st_value', 0x0000000000000005) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), +// CHECK: Relocations [ +// CHECK-NEXT: Section ({{[0-9]+}}) zed { +// CHECK-NEXT: 0x1 R_X86_64_PLT32 bar 0xFFFFFFFFFFFFFFFC +// CHECK-NEXT: 0x5 R_X86_64_64 bar2 0x0 +// CHECK-NEXT: } +// CHECK-NEXT: ] + +// CHECK: Symbols [ +// CHECK: Symbol { +// CHECK-NEXT: Name: bar +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text +// CHECK-NEXT: } + +// CHECK: Symbol { +// CHECK: Name: bar2 +// CHECK-NEXT: Value: 0x5 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Weak +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: zed +// CHECK-NEXT: } diff --git a/test/MC/ELF/alias.s b/test/MC/ELF/alias.s index f382628..0575f41 100644 --- a/test/MC/ELF/alias.s +++ b/test/MC/ELF/alias.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -t | FileCheck %s foo: bar = foo @@ -16,70 +16,78 @@ foo4: bar4 = foo4 .long foo2 -// CHECK: # Symbol 1 -// CHECK-NEXT: (('st_name', 0x00000005) # 'bar' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 2 -// CHECK-NEXT: (('st_name', 0x0000001d) # 'bar4' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x2) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 3 -// CHECK-NEXT: (('st_name', 0x00000001) # 'foo' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 4 -// CHECK-NEXT: (('st_name', 0x0000000e) # 'foo3' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 5 -// CHECK-NEXT: (('st_name', 0x00000018) # 'foo4' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x2) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 6 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK: # Symbol 7 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK: # Symbol 8 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK: # Symbol 9 -// CHECK-NEXT: (('st_name', 0x00000013) # 'bar3' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK: # Symbol 10 -// CHECK-NEXT: (('st_name', 0x00000009) # 'bar2' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) + +// CHECK: Symbols [ +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: bar +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: bar4 +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: Function +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: foo +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: foo3 +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: foo4 +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: Function +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: .text (0) +// CHECK: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: .data (0) +// CHECK: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: .bss (0) +// CHECK: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: bar3 +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: bar2 +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: ] diff --git a/test/MC/ELF/align-bss.s b/test/MC/ELF/align-bss.s index a59232b..776eef3 100644 --- a/test/MC/ELF/align-bss.s +++ b/test/MC/ELF/align-bss.s @@ -1,17 +1,22 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s | FileCheck %s // Test that the bss section is correctly aligned .local foo .comm foo,2048,16 -// CHECK: ('sh_name', 0x00000007) # '.bss' -// CHECK-NEXT: ('sh_type', 0x00000008) -// CHECK-NEXT: ('sh_flags', 0x0000000000000003) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000040) -// CHECK-NEXT: ('sh_size', 0x0000000000000800) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000010) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) +// CHECK: Section { +// CHECK: Name: .bss +// CHECK-NEXT: Type: SHT_NOBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: SHF_WRITE +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x40 +// CHECK-NEXT: Size: 2048 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 16 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: } diff --git a/test/MC/ELF/align-nops.s b/test/MC/ELF/align-nops.s index 3bf96e9..5e33868 100644 --- a/test/MC/ELF/align-nops.s +++ b/test/MC/ELF/align-nops.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sd | FileCheck %s // Test that we get optimal nops in text .text @@ -15,26 +15,40 @@ f0: .long 0 .align 8 -// CHECK: (('sh_name', 0x00000001) # '.text' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000006) -// CHECK-NEXT: ('sh_addr', -// CHECK-NEXT: ('sh_offset', -// CHECK-NEXT: ('sh_size', 0x0000000000000010) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', '00000000 0f1f4000 00000000 0f1f4000') +// CHECK: Section { +// CHECK: Name: .text +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: SHF_EXECINSTR +// CHECK-NEXT: ] +// CHECK-NEXT: Address: +// CHECK-NEXT: Offset: +// CHECK-NEXT: Size: 16 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 00000000 0F1F4000 00000000 0F1F4000 +// CHECK-NEXT: ) +// CHECK-NEXT: } -// CHECK: (('sh_name', 0x00000026) # '.data' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000003) -// CHECK-NEXT: ('sh_addr', -// CHECK-NEXT: ('sh_offset', -// CHECK-NEXT: ('sh_size', 0x0000000000000010) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', '00000000 90909090 00000000 00000000') +// CHECK: Section { +// CHECK: Name: .data +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: SHF_WRITE +// CHECK-NEXT: ] +// CHECK-NEXT: Address: +// CHECK-NEXT: Offset: +// CHECK-NEXT: Size: 16 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 00000000 90909090 00000000 00000000 +// CHECK-NEXT: ) +// CHECK-NEXT: } diff --git a/test/MC/ELF/align-size.s b/test/MC/ELF/align-size.s index f628291..84a6e99 100644 --- a/test/MC/ELF/align-size.s +++ b/test/MC/ELF/align-size.s @@ -1,13 +1,18 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s | FileCheck %s // Test that the alignment does contribute to the size of the section. .zero 4 .align 8 -// CHECK: (('sh_name', 0x00000001) # '.text' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000006) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000040) -// CHECK-NEXT: ('sh_size', 0x0000000000000008) +// CHECK: Section { +// CHECK: Name: .text +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: SHF_EXECINSTR +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x40 +// CHECK-NEXT: Size: 8 +// CHECK: } diff --git a/test/MC/ELF/align-text.s b/test/MC/ELF/align-text.s index 2fd3cba..b00af4a 100644 --- a/test/MC/ELF/align-text.s +++ b/test/MC/ELF/align-text.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s | FileCheck %s // Test that the .text directive doesn't cause alignment. @@ -6,14 +6,18 @@ .text .zero 1 -// CHECK: (('sh_name', 0x00000001) # '.text' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000006) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000040) -// CHECK-NEXT: ('sh_size', 0x0000000000000002) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000004) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Name: .text +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: SHF_EXECINSTR +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x40 +// CHECK-NEXT: Size: 2 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 4 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: } diff --git a/test/MC/ELF/align.s b/test/MC/ELF/align.s index 3142ffb..46be3df 100644 --- a/test/MC/ELF/align.s +++ b/test/MC/ELF/align.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s | FileCheck %s // Test that the alignment of rodata doesn't force a alignment of the // previous section (.bss) @@ -7,26 +7,33 @@ .section .rodata,"a",@progbits .align 8 -// CHECK: # Section 3 -// CHECK-NEXT: (('sh_name', 0x00000007) # '.bss' -// CHECK-NEXT: ('sh_type', 0x00000008) -// CHECK-NEXT: ('sh_flags', 0x0000000000000003) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000044) -// CHECK-NEXT: ('sh_size', 0x0000000000000000) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000004) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Section 4 -// CHECK-NEXT: (('sh_name', 0x00000026) # '.rodata' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000002) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000048) -// CHECK-NEXT: ('sh_size', 0x0000000000000000) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) +// CHECK: Section { +// CHECK: Name: .bss +// CHECK-NEXT: Type: SHT_NOBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: SHF_WRITE +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x44 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 4 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: } +// CHECK-NEXT: Section { +// CHECK-NEXT: Index: 4 +// CHECK-NEXT: Name: .rodata +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x48 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: } diff --git a/test/MC/ELF/basic-elf-32.s b/test/MC/ELF/basic-elf-32.s index 2c6a984..3ddb539 100644 --- a/test/MC/ELF/basic-elf-32.s +++ b/test/MC/ELF/basic-elf-32.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple i686-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple i686-pc-linux-gnu %s -o - | llvm-readobj -h -s -r -t | FileCheck %s .text .globl main @@ -30,49 +30,53 @@ main: # @main .section .note.GNU-stack,"",@progbits -// CHECK: ('e_indent[EI_CLASS]', 0x01) -// CHECK: ('e_indent[EI_DATA]', 0x01) -// CHECK: ('e_indent[EI_VERSION]', 0x01) -// CHECK: ('_sections', [ -// CHECK: # Section 0 -// CHECK: (('sh_name', 0x00000000) # '' +// CHECK: ElfHeader { +// CHECK: Class: 32-bit +// CHECK: DataEncoding: LittleEndian +// CHECK: FileVersion: 1 +// CHECK: } +// CHECK: Sections [ +// CHECK: Section { +// CHECK: Index: 0 +// CHECK: Name: (0) -// CHECK: # '.text' +// CHECK: Name: .text -// CHECK: # '.rel.text' +// CHECK: Name: .rel.text -// CHECK: ('_relocations', [ -// CHECK: # Relocation 0 -// CHECK: (('r_offset', 0x00000006) -// CHECK: ('r_type', 0x01) -// CHECK: ), -// CHECK: # Relocation 1 -// CHECK: (('r_offset', 0x0000000b) -// CHECK: ('r_type', 0x02) -// CHECK: ), -// CHECK: # Relocation 2 -// CHECK: (('r_offset', 0x00000012) -// CHECK: ('r_type', 0x01) -// CHECK: ), -// CHECK: # Relocation 3 -// CHECK: (('r_offset', 0x00000017) -// CHECK: ('r_type', 0x02) -// CHECK: ), -// CHECK: ]) +// CHECK: Relocations [ +// CHECK: Section (1) .text { +// CHECK: 0x6 R_386_32 .rodata.str1.1 +// CHECK: 0xB R_386_PC32 puts +// CHECK: 0x12 R_386_32 .rodata.str1.1 +// CHECK: 0x17 R_386_PC32 puts +// CHECK: } +// CHECK: ] -// CHECK: ('st_bind', 0x0) -// CHECK: ('st_type', 0x3) +// CHECK: Symbols [ +// CHECK: Symbol { +// CHECK: Binding: Local +// CHECK: Type: Section +// CHECK: } -// CHECK: ('st_bind', 0x0) -// CHECK: ('st_type', 0x3) +// CHECK: Symbol { +// CHECK: Binding: Local +// CHECK: Type: Section +// CHECK: } -// CHECK: ('st_bind', 0x0) -// CHECK: ('st_type', 0x3) +// CHECK: Symbol { +// CHECK: Binding: Local +// CHECK: Type: Section +// CHECK: } -// CHECK: # 'main' -// CHECK: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x2) +// CHECK: Symbol { +// CHECK: Name: main +// CHECK: Binding: Global +// CHECK: Type: Function +// CHECK: } -// CHECK: # 'puts' -// CHECK: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) +// CHECK: Symbol { +// CHECK: Name: puts +// CHECK: Binding: Global +// CHECK: Type: None +// CHECK: } diff --git a/test/MC/ELF/basic-elf-64.s b/test/MC/ELF/basic-elf-64.s index 38ffaa7..f98623a 100644 --- a/test/MC/ELF/basic-elf-64.s +++ b/test/MC/ELF/basic-elf-64.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -h -s -r -t | FileCheck %s .text .globl main @@ -30,53 +30,51 @@ main: # @main .section .note.GNU-stack,"",@progbits -// CHECK: ('e_indent[EI_CLASS]', 0x02) -// CHECK: ('e_indent[EI_DATA]', 0x01) -// CHECK: ('e_indent[EI_VERSION]', 0x01) -// CHECK: ('_sections', [ -// CHECK: # Section 0 -// CHECK: (('sh_name', 0x00000000) # '' +// CHECK: ElfHeader { +// CHECK: Class: 64-bit +// CHECK: DataEncoding: LittleEndian +// CHECK: FileVersion: 1 +// CHECK: } +// CHECK: Sections [ +// CHECK: Section { +// CHECK: Index: 0 +// CHECK: Name: (0) -// CHECK: # '.text' +// CHECK: Name: .text -// CHECK: # '.rela.text' +// CHECK: Name: .rela.text -// CHECK: ('_relocations', [ -// CHECK: # Relocation 0 -// CHECK: (('r_offset', 0x0000000000000005) -// CHECK: ('r_type', 0x0000000a) -// CHECK: ('r_addend', 0x0000000000000000) -// CHECK: ), -// CHECK: # Relocation 1 -// CHECK: (('r_offset', 0x000000000000000a) -// CHECK: ('r_type', 0x00000002) -// CHECK: ('r_addend', 0xfffffffffffffffc) -// CHECK: ), -// CHECK: # Relocation 2 -// CHECK: (('r_offset', 0x000000000000000f) -// CHECK: ('r_type', 0x0000000a) -// CHECK: ('r_addend', 0x0000000000000006) -// CHECK: ), -// CHECK: # Relocation 3 -// CHECK: (('r_offset', 0x0000000000000014) -// CHECK: ('r_type', 0x00000002) -// CHECK: ('r_addend', 0xfffffffffffffffc) -// CHECK: ), -// CHECK: ]) +// CHECK: Relocations [ +// CHECK: Section (1) .text { +// CHECK: 0x5 R_X86_64_32 .rodata.str1.1 0x0 +// CHECK: 0xA R_X86_64_PC32 puts 0xFFFFFFFFFFFFFFFC +// CHECK: 0xF R_X86_64_32 .rodata.str1.1 0x6 +// CHECK: 0x14 R_X86_64_PC32 puts 0xFFFFFFFFFFFFFFFC +// CHECK: } +// CHECK: ] -// CHECK: ('st_bind', 0x0) -// CHECK: ('st_type', 0x3) +// CHECK: Symbol { +// CHECK: Binding: Local +// CHECK: Type: Section -// CHECK: ('st_bind', 0x0) -// CHECK: ('st_type', 0x3) +// CHECK: Symbol { +// CHECK: Binding: Local +// CHECK: Type: Section +// CHECK: } -// CHECK: ('st_bind', 0x0) -// CHECK: ('st_type', 0x3) +// CHECK: Symbol { +// CHECK: Binding: Local +// CHECK: Type: Section +// CHECK: } -// CHECK: # 'main' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x2) +// CHECK: Symbol { +// CHECK: Name: main +// CHECK: Binding: Global +// CHECK: Type: Function +// CHECK: } -// CHECK: # 'puts' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) +// CHECK: Symbol { +// CHECK: Name: puts +// CHECK: Binding: Global +// CHECK: Type: None +// CHECK: } diff --git a/test/MC/ELF/call-abs.s b/test/MC/ELF/call-abs.s index 795a659..81265a1 100644 --- a/test/MC/ELF/call-abs.s +++ b/test/MC/ELF/call-abs.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple i686-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple i686-pc-linux-gnu %s -o - | llvm-readobj -r | FileCheck %s .text .globl f @@ -15,10 +15,8 @@ f: # @f .section .note.GNU-stack,"",@progbits -// CHECK: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x00000004) -// CHECK-NEXT: ('r_sym', 0x000000) -// CHECK-NEXT: ('r_type', 0x02) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) +// CHECK: Relocations [ +// CHECK: Section ({{[^ ]+}}) {{[^ ]+}} { +// CHECK-NEXT: 0x4 R_386_PC32 - +// CHECK-NEXT: } +// CHECK-NEXT: ] diff --git a/test/MC/ELF/cfi-adjust-cfa-offset.s b/test/MC/ELF/cfi-adjust-cfa-offset.s index f0d9c5f..137b8b6 100644 --- a/test/MC/ELF/cfi-adjust-cfa-offset.s +++ b/test/MC/ELF/cfi-adjust-cfa-offset.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sr -sd | FileCheck %s f: .cfi_startproc @@ -11,36 +11,43 @@ f: ret .cfi_endproc -// CHECK: # Section 4 -// CHECK-NEXT: (('sh_name', 0x00000011) # '.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000002) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000050) -// CHECK-NEXT: ('sh_size', 0x0000000000000038) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 1c000000 1c000000 00000000 0a000000 00440e10 410e1444 0e080000 00000000') -// CHECK-NEXT: ), -// CHECK-NEXT: # Section 5 -// CHECK-NEXT: (('sh_name', 0x0000000c) # '.rela.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000004) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x00000000000003a0) -// CHECK-NEXT: ('sh_size', 0x0000000000000018) -// CHECK-NEXT: ('sh_link', 0x00000007) -// CHECK-NEXT: ('sh_info', 0x00000004) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000018) -// CHECK-NEXT: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000020) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Index: 4 +// CHECK-NEXT: Name: .eh_frame +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x50 +// CHECK-NEXT: Size: 56 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0 +// CHECK-NEXT: ] +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001 +// CHECK-NEXT: 0010: 1B0C0708 90010000 1C000000 1C000000 +// CHECK-NEXT: 0020: 00000000 0A000000 00440E10 410E1444 +// CHECK-NEXT: 0030: 0E080000 00000000 +// CHECK-NEXT: ) +// CHECK-NEXT: } +// CHECK-NEXT: Section { +// CHECK-NEXT: Index: 5 +// CHECK-NEXT: Name: .rela.eh_frame +// CHECK-NEXT: Type: SHT_RELA +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x3A0 +// CHECK-NEXT: Size: 24 +// CHECK-NEXT: Link: 7 +// CHECK-NEXT: Info: 4 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 24 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: ] +// CHECK: } diff --git a/test/MC/ELF/cfi-advance-loc2.s b/test/MC/ELF/cfi-advance-loc2.s index b3c08e0..1cad325 100644 --- a/test/MC/ELF/cfi-advance-loc2.s +++ b/test/MC/ELF/cfi-advance-loc2.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sr -sd | FileCheck %s // test that this produces a correctly encoded cfi_advance_loc2 @@ -10,36 +10,41 @@ f: nop .cfi_endproc -// CHECK: (('sh_name', 0x00000011) # '.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000002) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000148) -// CHECK-NEXT: ('sh_size', 0x0000000000000030) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 01010000 00030001 0e080000') -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Name: .eh_frame +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x148 +// CHECK-NEXT: Size: 48 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0 +// CHECK-NEXT: ] +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001 +// CHECK-NEXT: 0010: 1B0C0708 90010000 14000000 1C000000 +// CHECK-NEXT: 0020: 00000000 01010000 00030001 0E080000 +// CHECK-NEXT: ) +// CHECK-NEXT: } - -// CHECK: (('sh_name', 0x0000000c) # '.rela.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000004) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000490) -// CHECK-NEXT: ('sh_size', 0x0000000000000018) -// CHECK-NEXT: ('sh_link', 0x00000007) -// CHECK-NEXT: ('sh_info', 0x00000004) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000018) -// CHECK-NEXT: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000020) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Name: .rela.eh_frame +// CHECK-NEXT: Type: SHT_RELA +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x490 +// CHECK-NEXT: Size: 24 +// CHECK-NEXT: Link: 7 +// CHECK-NEXT: Info: 4 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 24 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: ] +// CHECK: } diff --git a/test/MC/ELF/cfi-def-cfa-offset.s b/test/MC/ELF/cfi-def-cfa-offset.s index 0ed2be0..f1a54a8 100644 --- a/test/MC/ELF/cfi-def-cfa-offset.s +++ b/test/MC/ELF/cfi-def-cfa-offset.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sr -sd | FileCheck %s f: .cfi_startproc @@ -10,37 +10,43 @@ f: ret .cfi_endproc -// CHECK: # Section 4 -// CHECK-NEXT: (('sh_name', 0x00000011) # '.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000002) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000050) -// CHECK-NEXT: ('sh_size', 0x0000000000000030) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 0a000000 00440e10 450e0800') -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Index: 4 +// CHECK-NEXT: Name: .eh_frame +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x50 +// CHECK-NEXT: Size: 48 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0 +// CHECK-NEXT: ] +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001 +// CHECK-NEXT: 0010: 1B0C0708 90010000 14000000 1C000000 +// CHECK-NEXT: 0020: 00000000 0A000000 00440E10 450E0800 +// CHECK-NEXT: ) +// CHECK-NEXT: } -// CHECK: # Section 5 -// CHECK-NEXT: (('sh_name', 0x0000000c) # '.rela.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000004) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000398) -// CHECK-NEXT: ('sh_size', 0x0000000000000018) -// CHECK-NEXT: ('sh_link', 0x00000007) -// CHECK-NEXT: ('sh_info', 0x00000004) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000018) -// CHECK-NEXT: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000020) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Index: 5 +// CHECK-NEXT: Name: .rela.eh_frame +// CHECK-NEXT: Type: SHT_RELA +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x398 +// CHECK-NEXT: Size: 24 +// CHECK-NEXT: Link: 7 +// CHECK-NEXT: Info: 4 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 24 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: ] +// CHECK: } diff --git a/test/MC/ELF/cfi-def-cfa-register.s b/test/MC/ELF/cfi-def-cfa-register.s index e87b4f6..b1e74ea 100644 --- a/test/MC/ELF/cfi-def-cfa-register.s +++ b/test/MC/ELF/cfi-def-cfa-register.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sr -sd | FileCheck %s f: .cfi_startproc @@ -7,35 +7,41 @@ f: nop .cfi_endproc -// CHECK: (('sh_name', 0x00000011) # '.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000002) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000048) -// CHECK-NEXT: ('sh_size', 0x0000000000000030) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 02000000 00410d06 00000000') -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Name: .eh_frame +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x48 +// CHECK-NEXT: Size: 48 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0 +// CHECK-NEXT: ] +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001 +// CHECK-NEXT: 0010: 1B0C0708 90010000 14000000 1C000000 +// CHECK-NEXT: 0020: 00000000 02000000 00410D06 00000000 +// CHECK-NEXT: ) +// CHECK-NEXT: } -// CHECK: (('sh_name', 0x0000000c) # '.rela.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000004) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000390) -// CHECK-NEXT: ('sh_size', 0x0000000000000018) -// CHECK-NEXT: ('sh_link', 0x00000007) -// CHECK-NEXT: ('sh_info', 0x00000004) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000018) -// CHECK-NEXT: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000020) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Name: .rela.eh_frame +// CHECK-NEXT: Type: SHT_RELA +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x390 +// CHECK-NEXT: Size: 24 +// CHECK-NEXT: Link: 7 +// CHECK-NEXT: Info: 4 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 24 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: ] +// CHECK: } diff --git a/test/MC/ELF/cfi-def-cfa.s b/test/MC/ELF/cfi-def-cfa.s index e25bf5c..abde0de 100644 --- a/test/MC/ELF/cfi-def-cfa.s +++ b/test/MC/ELF/cfi-def-cfa.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sr -sd | FileCheck %s f: .cfi_startproc @@ -7,36 +7,41 @@ f: nop .cfi_endproc -// CHECK: (('sh_name', 0x00000011) # '.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000002) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000048) -// CHECK-NEXT: ('sh_size', 0x0000000000000030) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 02000000 00410c07 08000000') -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Name: .eh_frame +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x48 +// CHECK-NEXT: Size: 48 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0 +// CHECK-NEXT: ] +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001 +// CHECK-NEXT: 0010: 1B0C0708 90010000 14000000 1C000000 +// CHECK-NEXT: 0020: 00000000 02000000 00410C07 08000000 +// CHECK-NEXT: ) +// CHECK-NEXT: } - -// CHECK: (('sh_name', 0x0000000c) # '.rela.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000004) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000390) -// CHECK-NEXT: ('sh_size', 0x0000000000000018) -// CHECK-NEXT: ('sh_link', 0x00000007) -// CHECK-NEXT: ('sh_info', 0x00000004) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000018) -// CHECK-NEXT: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000020) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Name: .rela.eh_frame +// CHECK-NEXT: Type: SHT_RELA +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x390 +// CHECK-NEXT: Size: 24 +// CHECK-NEXT: Link: 7 +// CHECK-NEXT: Info: 4 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 24 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: ] +// CHECK: } diff --git a/test/MC/ELF/cfi-escape.s b/test/MC/ELF/cfi-escape.s index 3a5af00..a910fab 100644 --- a/test/MC/ELF/cfi-escape.s +++ b/test/MC/ELF/cfi-escape.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sr -sd | FileCheck %s f: .cfi_startproc @@ -7,36 +7,42 @@ f: nop .cfi_endproc -// CHECK: # Section 4 -// CHECK-NEXT: (('sh_name', 0x00000011) # '.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000002) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000048) -// CHECK-NEXT: ('sh_size', 0x0000000000000030) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 02000000 00411507 7f000000') -// CHECK-NEXT: ), -// CHECK-NEXT: # Section 5 -// CHECK-NEXT: (('sh_name', 0x0000000c) # '.rela.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000004) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000390) -// CHECK-NEXT: ('sh_size', 0x0000000000000018) -// CHECK-NEXT: ('sh_link', 0x00000007) -// CHECK-NEXT: ('sh_info', 0x00000004) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000018) -// CHECK-NEXT: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000020) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Index: 4 +// CHECK-NEXT: Name: .eh_frame +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x48 +// CHECK-NEXT: Size: 48 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0 +// CHECK-NEXT: ] +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001 +// CHECK-NEXT: 0010: 1B0C0708 90010000 14000000 1C000000 +// CHECK-NEXT: 0020: 00000000 02000000 00411507 7F000000 +// CHECK-NEXT: ) +// CHECK-NEXT: } +// CHECK-NEXT: Section { +// CHECK-NEXT: Index: 5 +// CHECK-NEXT: Name: .rela.eh_frame +// CHECK-NEXT: Type: SHT_RELA +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x390 +// CHECK-NEXT: Size: 24 +// CHECK-NEXT: Link: 7 +// CHECK-NEXT: Info: 4 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 24 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: ] +// CHECK: } diff --git a/test/MC/ELF/cfi-offset.s b/test/MC/ELF/cfi-offset.s index 9acb76c..f7f95fb 100644 --- a/test/MC/ELF/cfi-offset.s +++ b/test/MC/ELF/cfi-offset.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sr -sd | FileCheck %s f: .cfi_startproc @@ -7,36 +7,41 @@ f: nop .cfi_endproc -// CHECK: (('sh_name', 0x00000011) # '.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000002) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000048) -// CHECK-NEXT: ('sh_size', 0x0000000000000030) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 02000000 00418602 00000000') -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Name: .eh_frame +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x48 +// CHECK-NEXT: Size: 48 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0 +// CHECK-NEXT: ] +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001 +// CHECK-NEXT: 0010: 1B0C0708 90010000 14000000 1C000000 +// CHECK-NEXT: 0020: 00000000 02000000 00418602 00000000 +// CHECK-NEXT: ) +// CHECK-NEXT: } - -// CHECK: (('sh_name', 0x0000000c) # '.rela.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000004) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000390) -// CHECK-NEXT: ('sh_size', 0x0000000000000018) -// CHECK-NEXT: ('sh_link', 0x00000007) -// CHECK-NEXT: ('sh_info', 0x00000004) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000018) -// CHECK-NEXT: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000020) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Name: .rela.eh_frame +// CHECK-NEXT: Type: SHT_RELA +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x390 +// CHECK-NEXT: Size: 24 +// CHECK-NEXT: Link: 7 +// CHECK-NEXT: Info: 4 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 24 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: ] +// CHECK: } diff --git a/test/MC/ELF/cfi-register.s b/test/MC/ELF/cfi-register.s index 3772309..f7a07e4 100644 --- a/test/MC/ELF/cfi-register.s +++ b/test/MC/ELF/cfi-register.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sr -sd | FileCheck %s f: .cfi_startproc @@ -7,36 +7,42 @@ f: nop .cfi_endproc -// CHECK: # Section 4 -// CHECK-NEXT: (('sh_name', 0x00000011) # '.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000002) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000048) -// CHECK-NEXT: ('sh_size', 0x0000000000000030) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 02000000 00410906 00000000') -// CHECK-NEXT: ), -// CHECK-NEXT: # Section 5 -// CHECK-NEXT: (('sh_name', 0x0000000c) # '.rela.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000004) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000390) -// CHECK-NEXT: ('sh_size', 0x0000000000000018) -// CHECK-NEXT: ('sh_link', 0x00000007) -// CHECK-NEXT: ('sh_info', 0x00000004) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000018) -// CHECK-NEXT: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000020) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Index: 4 +// CHECK-NEXT: Name: .eh_frame +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x48 +// CHECK-NEXT: Size: 48 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0 +// CHECK-NEXT: ] +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001 +// CHECK-NEXT: 0010: 1B0C0708 90010000 14000000 1C000000 +// CHECK-NEXT: 0020: 00000000 02000000 00410906 00000000 +// CHECK-NEXT: ) +// CHECK-NEXT: } +// CHECK-NEXT: Section { +// CHECK-NEXT: Index: 5 +// CHECK-NEXT: Name: .rela.eh_frame +// CHECK-NEXT: Type: SHT_RELA +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x390 +// CHECK-NEXT: Size: 24 +// CHECK-NEXT: Link: 7 +// CHECK-NEXT: Info: 4 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 24 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: ] +// CHECK: } diff --git a/test/MC/ELF/cfi-rel-offset.s b/test/MC/ELF/cfi-rel-offset.s index 82bbd8d..35a73ef 100644 --- a/test/MC/ELF/cfi-rel-offset.s +++ b/test/MC/ELF/cfi-rel-offset.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sr -sd | FileCheck %s f: .cfi_startproc @@ -14,36 +14,43 @@ f: .cfi_rel_offset 6,0 .cfi_endproc -// CHECK: # Section 4 -// CHECK-NEXT: (('sh_name', 0x00000011) # '.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000002) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000048) -// CHECK-NEXT: ('sh_size', 0x0000000000000040) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 24000000 1c000000 00000000 05000000 00410e08 410d0641 11067f41 0e104186 02000000 00000000') -// CHECK-NEXT: ), -// CHECK-NEXT: # Section 5 -// CHECK-NEXT: (('sh_name', 0x0000000c) # '.rela.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000004) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x00000000000003a0) -// CHECK-NEXT: ('sh_size', 0x0000000000000018) -// CHECK-NEXT: ('sh_link', 0x00000007) -// CHECK-NEXT: ('sh_info', 0x00000004) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000018) -// CHECK-NEXT: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000020) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Index: 4 +// CHECK-NEXT: Name: .eh_frame +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x48 +// CHECK-NEXT: Size: 64 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0 +// CHECK-NEXT: ] +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001 +// CHECK-NEXT: 0010: 1B0C0708 90010000 24000000 1C000000 +// CHECK-NEXT: 0020: 00000000 05000000 00410E08 410D0641 +// CHECK-NEXT: 0030: 11067F41 0E104186 02000000 00000000 +// CHECK-NEXT: ) +// CHECK-NEXT: } +// CHECK-NEXT: Section { +// CHECK-NEXT: Index: 5 +// CHECK-NEXT: Name: .rela.eh_frame +// CHECK-NEXT: Type: SHT_RELA +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x3A0 +// CHECK-NEXT: Size: 24 +// CHECK-NEXT: Link: 7 +// CHECK-NEXT: Info: 4 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 24 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: ] +// CHECK: } diff --git a/test/MC/ELF/cfi-rel-offset2.s b/test/MC/ELF/cfi-rel-offset2.s index 7726adb..5817d1f 100644 --- a/test/MC/ELF/cfi-rel-offset2.s +++ b/test/MC/ELF/cfi-rel-offset2.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sr -sd | FileCheck %s f: .cfi_startproc @@ -6,36 +6,42 @@ f: .cfi_rel_offset 6,16 .cfi_endproc -// CHECK: # Section 4 -// CHECK-NEXT: (('sh_name', 0x00000011) # '.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000002) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000048) -// CHECK-NEXT: ('sh_size', 0x0000000000000030) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 01000000 00411106 7f000000') -// CHECK-NEXT: ), -// CHECK-NEXT: # Section 5 -// CHECK-NEXT: (('sh_name', 0x0000000c) # '.rela.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000004) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000390) -// CHECK-NEXT: ('sh_size', 0x0000000000000018) -// CHECK-NEXT: ('sh_link', 0x00000007) -// CHECK-NEXT: ('sh_info', 0x00000004) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000018) -// CHECK-NEXT: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000020) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Index: 4 +// CHECK-NEXT: Name: .eh_frame +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x48 +// CHECK-NEXT: Size: 48 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0 +// CHECK-NEXT: ] +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001 +// CHECK-NEXT: 0010: 1B0C0708 90010000 14000000 1C000000 +// CHECK-NEXT: 0020: 00000000 01000000 00411106 7F000000 +// CHECK-NEXT: ) +// CHECK-NEXT: } +// CHECK-NEXT: Section { +// CHECK-NEXT: Index: 5 +// CHECK-NEXT: Name: .rela.eh_frame +// CHECK-NEXT: Type: SHT_RELA +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x390 +// CHECK-NEXT: Size: 24 +// CHECK-NEXT: Link: 7 +// CHECK-NEXT: Info: 4 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 24 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: ] +// CHECK: } diff --git a/test/MC/ELF/cfi-remember.s b/test/MC/ELF/cfi-remember.s index 1717662..932a182 100644 --- a/test/MC/ELF/cfi-remember.s +++ b/test/MC/ELF/cfi-remember.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sr -sd | FileCheck %s f: .cfi_startproc @@ -9,37 +9,42 @@ f: nop .cfi_endproc -// CHECK: # Section 4 -// CHECK-NEXT: (('sh_name', 0x00000011) # '.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000002) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000048) -// CHECK-NEXT: ('sh_size', 0x0000000000000030) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 03000000 00410a41 0b000000') -// CHECK-NEXT: ), - -// CHECK: # Section 5 -// CHECK-NEXT: (('sh_name', 0x0000000c) # '.rela.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000004) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000390) -// CHECK-NEXT: ('sh_size', 0x0000000000000018) -// CHECK-NEXT: ('sh_link', 0x00000007) -// CHECK-NEXT: ('sh_info', 0x00000004) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000018) -// CHECK-NEXT: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000020) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Index: 4 +// CHECK-NEXT: Name: .eh_frame +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x48 +// CHECK-NEXT: Size: 48 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0 +// CHECK-NEXT: ] +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001 +// CHECK-NEXT: 0010: 1B0C0708 90010000 14000000 1C000000 +// CHECK-NEXT: 0020: 00000000 03000000 00410A41 0B000000 +// CHECK-NEXT: ) +// CHECK-NEXT: } +// CHECK: Section { +// CHECK: Index: 5 +// CHECK-NEXT: Name: .rela.eh_frame +// CHECK-NEXT: Type: SHT_RELA +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x390 +// CHECK-NEXT: Size: 24 +// CHECK-NEXT: Link: 7 +// CHECK-NEXT: Info: 4 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 24 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: ] +// CHECK: } diff --git a/test/MC/ELF/cfi-restore.s b/test/MC/ELF/cfi-restore.s index 0fc3129..6c25d5b 100644 --- a/test/MC/ELF/cfi-restore.s +++ b/test/MC/ELF/cfi-restore.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sr -sd | FileCheck %s f: .cfi_startproc @@ -7,36 +7,42 @@ f: nop .cfi_endproc -// CHECK: # Section 4 -// CHECK-NEXT: (('sh_name', 0x00000011) # '.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000002) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000048) -// CHECK-NEXT: ('sh_size', 0x0000000000000030) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 02000000 0041c600 00000000') -// CHECK-NEXT: ), -// CHECK-NEXT: # Section 5 -// CHECK-NEXT: (('sh_name', 0x0000000c) # '.rela.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000004) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000390) -// CHECK-NEXT: ('sh_size', 0x0000000000000018) -// CHECK-NEXT: ('sh_link', 0x00000007) -// CHECK-NEXT: ('sh_info', 0x00000004) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000018) -// CHECK-NEXT: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000020) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Index: 4 +// CHECK-NEXT: Name: .eh_frame +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x48 +// CHECK-NEXT: Size: 48 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0 +// CHECK-NEXT: ] +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001 +// CHECK-NEXT: 0010: 1B0C0708 90010000 14000000 1C000000 +// CHECK-NEXT: 0020: 00000000 02000000 0041C600 00000000 +// CHECK-NEXT: ) +// CHECK-NEXT: } +// CHECK-NEXT: Section { +// CHECK-NEXT: Index: 5 +// CHECK-NEXT: Name: .rela.eh_frame +// CHECK-NEXT: Type: SHT_RELA +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x390 +// CHECK-NEXT: Size: 24 +// CHECK-NEXT: Link: 7 +// CHECK-NEXT: Info: 4 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 24 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: ] +// CHECK: } diff --git a/test/MC/ELF/cfi-same-value.s b/test/MC/ELF/cfi-same-value.s index 4c80a0a..075c6b9 100644 --- a/test/MC/ELF/cfi-same-value.s +++ b/test/MC/ELF/cfi-same-value.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sr -sd | FileCheck %s f: .cfi_startproc @@ -7,36 +7,42 @@ f: nop .cfi_endproc -// CHECK: # Section 4 -// CHECK-NEXT: (('sh_name', 0x00000011) # '.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000002) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000048) -// CHECK-NEXT: ('sh_size', 0x0000000000000030) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 02000000 00410806 00000000') -// CHECK-NEXT: ), -// CHECK-NEXT: # Section 5 -// CHECK-NEXT: (('sh_name', 0x0000000c) # '.rela.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000004) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000390) -// CHECK-NEXT: ('sh_size', 0x0000000000000018) -// CHECK-NEXT: ('sh_link', 0x00000007) -// CHECK-NEXT: ('sh_info', 0x00000004) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000018) -// CHECK-NEXT: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000020) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Index: 4 +// CHECK-NEXT: Name: .eh_frame +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x48 +// CHECK-NEXT: Size: 48 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0 +// CHECK-NEXT: ] +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001 +// CHECK-NEXT: 0010: 1B0C0708 90010000 14000000 1C000000 +// CHECK-NEXT: 0020: 00000000 02000000 00410806 00000000 +// CHECK-NEXT: ) +// CHECK-NEXT: } +// CHECK-NEXT: Section { +// CHECK-NEXT: Index: 5 +// CHECK-NEXT: Name: .rela.eh_frame +// CHECK-NEXT: Type: SHT_RELA +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x390 +// CHECK-NEXT: Size: 24 +// CHECK-NEXT: Link: 7 +// CHECK-NEXT: Info: 4 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 24 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: ] +// CHECK: } diff --git a/test/MC/ELF/cfi-sections.s b/test/MC/ELF/cfi-sections.s index b256bbf..15a79e5 100644 --- a/test/MC/ELF/cfi-sections.s +++ b/test/MC/ELF/cfi-sections.s @@ -1,5 +1,5 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=ELF_64 %s -// RUN: llvm-mc -filetype=obj -triple i686-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=ELF_32 %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sd | FileCheck -check-prefix=ELF_64 %s +// RUN: llvm-mc -filetype=obj -triple i686-pc-linux-gnu %s -o - | llvm-readobj -s -sd | FileCheck -check-prefix=ELF_32 %s .cfi_sections .debug_frame @@ -13,26 +13,43 @@ f2: nop .cfi_endproc -// ELF_64: (('sh_name', 0x00000011) # '.debug_frame' -// ELF_64-NEXT: ('sh_type', 0x00000001) -// ELF_64-NEXT: ('sh_flags', 0x0000000000000000) -// ELF_64-NEXT: ('sh_addr', 0x0000000000000000) -// ELF_64-NEXT: ('sh_offset', 0x0000000000000048) -// ELF_64-NEXT: ('sh_size', 0x0000000000000048) -// ELF_64-NEXT: ('sh_link', 0x00000000) -// ELF_64-NEXT: ('sh_info', 0x00000000) -// ELF_64-NEXT: ('sh_addralign', 0x0000000000000008) -// ELF_64-NEXT: ('sh_entsize', 0x0000000000000000) -// ELF_64-NEXT: ('_section_data', '14000000 ffffffff 01000178 100c0708 90010000 00000000 14000000 00000000 00000000 00000000 01000000 00000000 14000000 00000000 00000000 00000000 01000000 00000000') +// ELF_64: Section { +// ELF_64: Name: .debug_frame +// ELF_64-NEXT: Type: SHT_PROGBITS +// ELF_64-NEXT: Flags [ +// ELF_64-NEXT: ] +// ELF_64-NEXT: Address: 0x0 +// ELF_64-NEXT: Offset: 0x48 +// ELF_64-NEXT: Size: 72 +// ELF_64-NEXT: Link: 0 +// ELF_64-NEXT: Info: 0 +// ELF_64-NEXT: AddressAlignment: 8 +// ELF_64-NEXT: EntrySize: 0 +// ELF_64-NEXT: SectionData ( +// ELF_64-NEXT: 0000: 14000000 FFFFFFFF 01000178 100C0708 +// ELF_64-NEXT: 0010: 90010000 00000000 14000000 00000000 +// ELF_64-NEXT: 0020: 00000000 00000000 01000000 00000000 +// ELF_64-NEXT: 0030: 14000000 00000000 00000000 00000000 +// ELF_64-NEXT: 0040: 01000000 00000000 +// ELF_64-NEXT: ) +// ELF_64-NEXT: } -// ELF_32: (('sh_name', 0x00000010) # '.debug_frame' -// ELF_32-NEXT: ('sh_type', 0x00000001) -// ELF_32-NEXT: ('sh_flags', 0x00000000) -// ELF_32-NEXT: ('sh_addr', 0x00000000) -// ELF_32-NEXT: ('sh_offset', 0x00000038) -// ELF_32-NEXT: ('sh_size', 0x00000034) -// ELF_32-NEXT: ('sh_link', 0x00000000) -// ELF_32-NEXT: ('sh_info', 0x00000000) -// ELF_32-NEXT: ('sh_addralign', 0x00000004) -// ELF_32-NEXT: ('sh_entsize', 0x00000000) -// ELF_32-NEXT: ('_section_data', '10000000 ffffffff 0100017c 080c0404 88010000 0c000000 00000000 00000000 01000000 0c000000 00000000 01000000 01000000') +// ELF_32: Section { +// ELF_32: Name: .debug_frame +// ELF_32-NEXT: Type: SHT_PROGBITS +// ELF_32-NEXT: Flags [ +// ELF_32-NEXT: ] +// ELF_32-NEXT: Address: 0x0 +// ELF_32-NEXT: Offset: 0x38 +// ELF_32-NEXT: Size: 52 +// ELF_32-NEXT: Link: 0 +// ELF_32-NEXT: Info: 0 +// ELF_32-NEXT: AddressAlignment: 4 +// ELF_32-NEXT: EntrySize: 0 +// ELF_32-NEXT: SectionData ( +// ELF_32-NEXT: 0000: 10000000 FFFFFFFF 0100017C 080C0404 +// ELF_32-NEXT: 0010: 88010000 0C000000 00000000 00000000 +// ELF_32-NEXT: 0020: 01000000 0C000000 00000000 01000000 +// ELF_32-NEXT: 0030: 01000000 +// ELF_32-NEXT: ) +// ELF_32-NEXT: } diff --git a/test/MC/ELF/cfi-signal-frame.s b/test/MC/ELF/cfi-signal-frame.s index cf6d160..0233119 100644 --- a/test/MC/ELF/cfi-signal-frame.s +++ b/test/MC/ELF/cfi-signal-frame.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sd | FileCheck %s f: .cfi_startproc @@ -9,15 +9,25 @@ g: .cfi_startproc .cfi_endproc -// CHECK: (('sh_name', 0x00000011) # '.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000002) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000040) -// CHECK-NEXT: ('sh_size', 0x0000000000000058) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5253 00017810 011b0c07 08900100 10000000 1c000000 00000000 00000000 00000000 14000000 00000000 017a5200 01781001 1b0c0708 90010000 10000000 1c000000 00000000 00000000 00000000') -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Name: .eh_frame +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x40 +// CHECK-NEXT: Size: 88 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 14000000 00000000 017A5253 00017810 +// CHECK-NEXT: 0010: 011B0C07 08900100 10000000 1C000000 +// CHECK-NEXT: 0020: 00000000 00000000 00000000 14000000 +// CHECK-NEXT: 0030: 00000000 017A5200 01781001 1B0C0708 +// CHECK-NEXT: 0040: 90010000 10000000 1C000000 00000000 +// CHECK-NEXT: 0050: 00000000 00000000 +// CHECK-NEXT: ) +// CHECK-NEXT: } diff --git a/test/MC/ELF/cfi-undefined.s b/test/MC/ELF/cfi-undefined.s index 28049fa..c83b47c 100644 --- a/test/MC/ELF/cfi-undefined.s +++ b/test/MC/ELF/cfi-undefined.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sr -sd | FileCheck %s f: .cfi_startproc @@ -6,36 +6,43 @@ f: .cfi_undefined %rbp nop .cfi_endproc -// CHECK: # Section 4 -// CHECK-NEXT: (('sh_name', 0x00000011) # '.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000002) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000048) -// CHECK-NEXT: ('sh_size', 0x0000000000000030) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 14000000 1c000000 00000000 02000000 00410706 00000000') -// CHECK-NEXT: ), -// CHECK-NEXT: # Section 5 -// CHECK-NEXT: (('sh_name', 0x0000000c) # '.rela.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000004) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000390) -// CHECK-NEXT: ('sh_size', 0x0000000000000018) -// CHECK-NEXT: ('sh_link', 0x00000007) -// CHECK-NEXT: ('sh_info', 0x00000004) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000018) -// CHECK-NEXT: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000020) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) -// CHECK-NEXT: ), + +// CHECK: Section { +// CHECK: Index: 4 +// CHECK-NEXT: Name: .eh_frame +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x48 +// CHECK-NEXT: Size: 48 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0 +// CHECK-NEXT: ] +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001 +// CHECK-NEXT: 0010: 1B0C0708 90010000 14000000 1C000000 +// CHECK-NEXT: 0020: 00000000 02000000 00410706 00000000 +// CHECK-NEXT: ) +// CHECK-NEXT: } +// CHECK-NEXT: Section { +// CHECK-NEXT: Index: 5 +// CHECK-NEXT: Name: .rela.eh_frame +// CHECK-NEXT: Type: SHT_RELA +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x390 +// CHECK-NEXT: Size: 24 +// CHECK-NEXT: Link: 7 +// CHECK-NEXT: Info: 4 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 24 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: ] +// CHECK: } diff --git a/test/MC/ELF/cfi-zero-addr-delta.s b/test/MC/ELF/cfi-zero-addr-delta.s index 9e818e6..4ac0e34 100644 --- a/test/MC/ELF/cfi-zero-addr-delta.s +++ b/test/MC/ELF/cfi-zero-addr-delta.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sr -sd | FileCheck %s // Test that we don't produce a DW_CFA_advance_loc 0 @@ -14,35 +14,41 @@ f: nop .cfi_endproc -// CHECK: (('sh_name', 0x00000011) # '.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000002) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000048) -// CHECK-NEXT: ('sh_size', 0x0000000000000038) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', '14000000 00000000 017a5200 01781001 1b0c0708 90010000 1c000000 1c000000 00000000 04000000 00410e10 410a0e08 410b0000 00000000') -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Name: .eh_frame +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x48 +// CHECK-NEXT: Size: 56 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0 +// CHECK-NEXT: ] +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 14000000 00000000 017A5200 01781001 +// CHECK-NEXT: 0010: 1B0C0708 90010000 1C000000 1C000000 +// CHECK-NEXT: 0020: 00000000 04000000 00410E10 410A0E08 +// CHECK-NEXT: 0030: 410B0000 00000000 +// CHECK-NEXT: ) +// CHECK-NEXT: } -// CHECK: (('sh_name', 0x0000000c) # '.rela.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000004) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000398) -// CHECK-NEXT: ('sh_size', 0x0000000000000018) -// CHECK-NEXT: ('sh_link', 0x00000007) -// CHECK-NEXT: ('sh_info', 0x00000004) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000018) -// CHECK-NEXT: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000020) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Name: .rela.eh_frame +// CHECK-NEXT: Type: SHT_RELA +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x398 +// CHECK-NEXT: Size: 24 +// CHECK-NEXT: Link: 7 +// CHECK-NEXT: Info: 4 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 24 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: ] diff --git a/test/MC/ELF/cfi.s b/test/MC/ELF/cfi.s index 9320894..98f4fa9 100644 --- a/test/MC/ELF/cfi.s +++ b/test/MC/ELF/cfi.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sr -sd | FileCheck %s f1: .cfi_startproc @@ -212,463 +212,220 @@ f36: nop .cfi_endproc -// CHECK: # Section 4 -// CHECK-NEXT: (('sh_name', 0x00000011) # '.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000002) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000068) -// CHECK-NEXT: ('sh_size', 0x00000000000006c8) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', '14000000 00000000 017a4c52 00017810 02031b0c 07089001 14000000 1c000000 00000000 01000000 04000000 00000000 20000000 00000000 017a504c 52000178 100b0000 00000000 00000003 1b0c0708 90010000 14000000 28000000 00000000 01000000 04000000 00000000 14000000 70000000 00000000 01000000 04000000 00000000 20000000 00000000 017a504c 52000178 100b0000 00000000 00000002 1b0c0708 90010000 10000000 28000000 00000000 01000000 02000000 18000000 00000000 017a5052 00017810 04020000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 06030000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a040000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 040a0000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 060b0000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a0c0000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a080000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a100000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 04120000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 06130000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a140000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 041a0000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 061b0000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a1c0000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a180000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a800000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 04820000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 06830000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a840000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 048a0000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 068b0000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a8c0000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a880000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a900000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 04920000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 06930000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a940000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 049a0000 1b0c0708 90010000 10000000 20000000 00000000 01000000 00000000 18000000 00000000 017a5052 00017810 069b0000 00001b0c 07089001 10000000 20000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a9c0000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000 1c000000 00000000 017a5052 00017810 0a980000 00000000 00001b0c 07089001 10000000 24000000 00000000 01000000 00000000') -// CHECK-NEXT: ), - -// CHECK: # Section 5 -// CHECK-NEXT: (('sh_name', 0x0000000c) # '.rela.eh_frame' -// CHECK-NEXT: ('sh_type', 0x00000004) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000e30) -// CHECK-NEXT: ('sh_size', 0x00000000000006c0) -// CHECK-NEXT: ('sh_link', 0x00000007) -// CHECK-NEXT: ('sh_info', 0x00000004) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000018) -// CHECK-NEXT: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000020) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 1 -// CHECK-NEXT: (('r_offset', 0x0000000000000029) -// CHECK-NEXT: ('r_sym', 0x00000028) -// CHECK-NEXT: ('r_type', 0x0000000a) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 2 -// CHECK-NEXT: (('r_offset', 0x0000000000000043) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x00000001) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 3 -// CHECK-NEXT: (('r_offset', 0x000000000000005c) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000001) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 4 -// CHECK-NEXT: (('r_offset', 0x0000000000000065) -// CHECK-NEXT: ('r_sym', 0x00000028) -// CHECK-NEXT: ('r_type', 0x0000000a) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 5 -// CHECK-NEXT: (('r_offset', 0x0000000000000074) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000002) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 6 -// CHECK-NEXT: (('r_offset', 0x000000000000007d) -// CHECK-NEXT: ('r_sym', 0x00000028) -// CHECK-NEXT: ('r_type', 0x0000000a) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 7 -// CHECK-NEXT: (('r_offset', 0x0000000000000097) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x00000001) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 8 -// CHECK-NEXT: (('r_offset', 0x00000000000000b0) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000003) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 9 -// CHECK-NEXT: (('r_offset', 0x00000000000000b9) -// CHECK-NEXT: ('r_sym', 0x00000028) -// CHECK-NEXT: ('r_type', 0x0000000c) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 10 -// CHECK-NEXT: (('r_offset', 0x00000000000000ce) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x0000000c) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 11 -// CHECK-NEXT: (('r_offset', 0x00000000000000e0) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000004) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 12 -// CHECK-NEXT: (('r_offset', 0x00000000000000fe) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x0000000a) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 13 -// CHECK-NEXT: (('r_offset', 0x0000000000000110) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000005) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 14 -// CHECK-NEXT: (('r_offset', 0x000000000000012e) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x00000001) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 15 -// CHECK-NEXT: (('r_offset', 0x0000000000000144) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000006) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 16 -// CHECK-NEXT: (('r_offset', 0x0000000000000162) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x0000000c) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 17 -// CHECK-NEXT: (('r_offset', 0x0000000000000174) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000007) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 18 -// CHECK-NEXT: (('r_offset', 0x0000000000000192) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x0000000a) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 19 -// CHECK-NEXT: (('r_offset', 0x00000000000001a4) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000008) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 20 -// CHECK-NEXT: (('r_offset', 0x00000000000001c2) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x00000001) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 21 -// CHECK-NEXT: (('r_offset', 0x00000000000001d8) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000009) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 22 -// CHECK-NEXT: (('r_offset', 0x00000000000001f6) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x00000001) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 23 -// CHECK-NEXT: (('r_offset', 0x000000000000020c) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x000000000000000a) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 24 -// CHECK-NEXT: (('r_offset', 0x000000000000022a) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x00000018) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 25 -// CHECK-NEXT: (('r_offset', 0x0000000000000240) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x000000000000000b) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 26 -// CHECK-NEXT: (('r_offset', 0x000000000000025e) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x0000000d) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 27 -// CHECK-NEXT: (('r_offset', 0x0000000000000270) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x000000000000000c) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 28 -// CHECK-NEXT: (('r_offset', 0x000000000000028e) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 29 -// CHECK-NEXT: (('r_offset', 0x00000000000002a0) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x000000000000000d) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 30 -// CHECK-NEXT: (('r_offset', 0x00000000000002be) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x00000018) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 31 -// CHECK-NEXT: (('r_offset', 0x00000000000002d4) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x000000000000000e) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 32 -// CHECK-NEXT: (('r_offset', 0x00000000000002f2) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x0000000d) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 33 -// CHECK-NEXT: (('r_offset', 0x0000000000000304) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x000000000000000f) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 34 -// CHECK-NEXT: (('r_offset', 0x0000000000000322) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 35 -// CHECK-NEXT: (('r_offset', 0x0000000000000334) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000010) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 36 -// CHECK-NEXT: (('r_offset', 0x0000000000000352) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x00000018) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 37 -// CHECK-NEXT: (('r_offset', 0x0000000000000368) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000011) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 38 -// CHECK-NEXT: (('r_offset', 0x0000000000000386) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x00000018) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 39 -// CHECK-NEXT: (('r_offset', 0x000000000000039c) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000012) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 40 -// CHECK-NEXT: (('r_offset', 0x00000000000003ba) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x00000001) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 41 -// CHECK-NEXT: (('r_offset', 0x00000000000003d0) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000013) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 42 -// CHECK-NEXT: (('r_offset', 0x00000000000003ee) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x0000000c) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 43 -// CHECK-NEXT: (('r_offset', 0x0000000000000400) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000014) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 44 -// CHECK-NEXT: (('r_offset', 0x000000000000041e) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x0000000a) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 45 -// CHECK-NEXT: (('r_offset', 0x0000000000000430) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000015) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 46 -// CHECK-NEXT: (('r_offset', 0x000000000000044e) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x00000001) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 47 -// CHECK-NEXT: (('r_offset', 0x0000000000000464) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000016) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 48 -// CHECK-NEXT: (('r_offset', 0x0000000000000482) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x0000000c) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 49 -// CHECK-NEXT: (('r_offset', 0x0000000000000494) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000017) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 50 -// CHECK-NEXT: (('r_offset', 0x00000000000004b2) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x0000000a) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 51 -// CHECK-NEXT: (('r_offset', 0x00000000000004c4) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000018) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 52 -// CHECK-NEXT: (('r_offset', 0x00000000000004e2) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x00000001) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 53 -// CHECK-NEXT: (('r_offset', 0x00000000000004f8) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000019) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 54 -// CHECK-NEXT: (('r_offset', 0x0000000000000516) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x00000001) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 55 -// CHECK-NEXT: (('r_offset', 0x000000000000052c) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x000000000000001a) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 56 -// CHECK-NEXT: (('r_offset', 0x000000000000054a) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x00000018) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 57 -// CHECK-NEXT: (('r_offset', 0x0000000000000560) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x000000000000001b) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 58 -// CHECK-NEXT: (('r_offset', 0x000000000000057e) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x0000000d) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 59 -// CHECK-NEXT: (('r_offset', 0x0000000000000590) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x000000000000001c) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 60 -// CHECK-NEXT: (('r_offset', 0x00000000000005ae) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 61 -// CHECK-NEXT: (('r_offset', 0x00000000000005c0) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x000000000000001d) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 62 -// CHECK-NEXT: (('r_offset', 0x00000000000005de) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x00000018) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 63 -// CHECK-NEXT: (('r_offset', 0x00000000000005f4) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x000000000000001e) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 64 -// CHECK-NEXT: (('r_offset', 0x0000000000000612) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x0000000d) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 65 -// CHECK-NEXT: (('r_offset', 0x0000000000000624) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x000000000000001f) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 66 -// CHECK-NEXT: (('r_offset', 0x0000000000000642) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 67 -// CHECK-NEXT: (('r_offset', 0x0000000000000654) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000020) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 68 -// CHECK-NEXT: (('r_offset', 0x0000000000000672) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x00000018) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 69 -// CHECK-NEXT: (('r_offset', 0x0000000000000688) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000021) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 70 -// CHECK-NEXT: (('r_offset', 0x00000000000006a6) -// CHECK-NEXT: ('r_sym', 0x00000029) -// CHECK-NEXT: ('r_type', 0x00000018) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 71 -// CHECK-NEXT: (('r_offset', 0x00000000000006bc) -// CHECK-NEXT: ('r_sym', 0x00000024) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000022) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Index: 4 +// CHECK-NEXT: Name: .eh_frame +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x68 +// CHECK-NEXT: Size: 1736 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: 0x20 R_X86_64_PC32 .text 0x0 +// CHECK-NEXT: 0x29 R_X86_64_32 bar 0x0 +// CHECK-NEXT: 0x43 R_X86_64_64 foo 0x0 +// CHECK-NEXT: 0x5C R_X86_64_PC32 .text 0x1 +// CHECK-NEXT: 0x65 R_X86_64_32 bar 0x0 +// CHECK-NEXT: 0x74 R_X86_64_PC32 .text 0x2 +// CHECK-NEXT: 0x7D R_X86_64_32 bar 0x0 +// CHECK-NEXT: 0x97 R_X86_64_64 foo 0x0 +// CHECK-NEXT: 0xB0 R_X86_64_PC32 .text 0x3 +// CHECK-NEXT: 0xB9 R_X86_64_16 bar 0x0 +// CHECK-NEXT: 0xCE R_X86_64_16 foo 0x0 +// CHECK-NEXT: 0xE0 R_X86_64_PC32 .text 0x4 +// CHECK-NEXT: 0xFE R_X86_64_32 foo 0x0 +// CHECK-NEXT: 0x110 R_X86_64_PC32 .text 0x5 +// CHECK-NEXT: 0x12E R_X86_64_64 foo 0x0 +// CHECK-NEXT: 0x144 R_X86_64_PC32 .text 0x6 +// CHECK-NEXT: 0x162 R_X86_64_16 foo 0x0 +// CHECK-NEXT: 0x174 R_X86_64_PC32 .text 0x7 +// CHECK-NEXT: 0x192 R_X86_64_32 foo 0x0 +// CHECK-NEXT: 0x1A4 R_X86_64_PC32 .text 0x8 +// CHECK-NEXT: 0x1C2 R_X86_64_64 foo 0x0 +// CHECK-NEXT: 0x1D8 R_X86_64_PC32 .text 0x9 +// CHECK-NEXT: 0x1F6 R_X86_64_64 foo 0x0 +// CHECK-NEXT: 0x20C R_X86_64_PC32 .text 0xA +// CHECK-NEXT: 0x22A R_X86_64_PC64 foo 0x0 +// CHECK-NEXT: 0x240 R_X86_64_PC32 .text 0xB +// CHECK-NEXT: 0x25E R_X86_64_PC16 foo 0x0 +// CHECK-NEXT: 0x270 R_X86_64_PC32 .text 0xC +// CHECK-NEXT: 0x28E R_X86_64_PC32 foo 0x0 +// CHECK-NEXT: 0x2A0 R_X86_64_PC32 .text 0xD +// CHECK-NEXT: 0x2BE R_X86_64_PC64 foo 0x0 +// CHECK-NEXT: 0x2D4 R_X86_64_PC32 .text 0xE +// CHECK-NEXT: 0x2F2 R_X86_64_PC16 foo 0x0 +// CHECK-NEXT: 0x304 R_X86_64_PC32 .text 0xF +// CHECK-NEXT: 0x322 R_X86_64_PC32 foo 0x0 +// CHECK-NEXT: 0x334 R_X86_64_PC32 .text 0x10 +// CHECK-NEXT: 0x352 R_X86_64_PC64 foo 0x0 +// CHECK-NEXT: 0x368 R_X86_64_PC32 .text 0x11 +// CHECK-NEXT: 0x386 R_X86_64_PC64 foo 0x0 +// CHECK-NEXT: 0x39C R_X86_64_PC32 .text 0x12 +// CHECK-NEXT: 0x3BA R_X86_64_64 foo 0x0 +// CHECK-NEXT: 0x3D0 R_X86_64_PC32 .text 0x13 +// CHECK-NEXT: 0x3EE R_X86_64_16 foo 0x0 +// CHECK-NEXT: 0x400 R_X86_64_PC32 .text 0x14 +// CHECK-NEXT: 0x41E R_X86_64_32 foo 0x0 +// CHECK-NEXT: 0x430 R_X86_64_PC32 .text 0x15 +// CHECK-NEXT: 0x44E R_X86_64_64 foo 0x0 +// CHECK-NEXT: 0x464 R_X86_64_PC32 .text 0x16 +// CHECK-NEXT: 0x482 R_X86_64_16 foo 0x0 +// CHECK-NEXT: 0x494 R_X86_64_PC32 .text 0x17 +// CHECK-NEXT: 0x4B2 R_X86_64_32 foo 0x0 +// CHECK-NEXT: 0x4C4 R_X86_64_PC32 .text 0x18 +// CHECK-NEXT: 0x4E2 R_X86_64_64 foo 0x0 +// CHECK-NEXT: 0x4F8 R_X86_64_PC32 .text 0x19 +// CHECK-NEXT: 0x516 R_X86_64_64 foo 0x0 +// CHECK-NEXT: 0x52C R_X86_64_PC32 .text 0x1A +// CHECK-NEXT: 0x54A R_X86_64_PC64 foo 0x0 +// CHECK-NEXT: 0x560 R_X86_64_PC32 .text 0x1B +// CHECK-NEXT: 0x57E R_X86_64_PC16 foo 0x0 +// CHECK-NEXT: 0x590 R_X86_64_PC32 .text 0x1C +// CHECK-NEXT: 0x5AE R_X86_64_PC32 foo 0x0 +// CHECK-NEXT: 0x5C0 R_X86_64_PC32 .text 0x1D +// CHECK-NEXT: 0x5DE R_X86_64_PC64 foo 0x0 +// CHECK-NEXT: 0x5F4 R_X86_64_PC32 .text 0x1E +// CHECK-NEXT: 0x612 R_X86_64_PC16 foo 0x0 +// CHECK-NEXT: 0x624 R_X86_64_PC32 .text 0x1F +// CHECK-NEXT: 0x642 R_X86_64_PC32 foo 0x0 +// CHECK-NEXT: 0x654 R_X86_64_PC32 .text 0x20 +// CHECK-NEXT: 0x672 R_X86_64_PC64 foo 0x0 +// CHECK-NEXT: 0x688 R_X86_64_PC32 .text 0x21 +// CHECK-NEXT: 0x6A6 R_X86_64_PC64 foo 0x0 +// CHECK-NEXT: 0x6BC R_X86_64_PC32 .text 0x22 +// CHECK-NEXT: ] +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 14000000 00000000 017A4C52 00017810 +// CHECK-NEXT: 0010: 02031B0C 07089001 14000000 1C000000 +// CHECK-NEXT: 0020: 00000000 01000000 04000000 00000000 +// CHECK-NEXT: 0030: 20000000 00000000 017A504C 52000178 +// CHECK-NEXT: 0040: 100B0000 00000000 00000003 1B0C0708 +// CHECK-NEXT: 0050: 90010000 14000000 28000000 00000000 +// CHECK-NEXT: 0060: 01000000 04000000 00000000 14000000 +// CHECK-NEXT: 0070: 70000000 00000000 01000000 04000000 +// CHECK-NEXT: 0080: 00000000 20000000 00000000 017A504C +// CHECK-NEXT: 0090: 52000178 100B0000 00000000 00000002 +// CHECK-NEXT: 00A0: 1B0C0708 90010000 10000000 28000000 +// CHECK-NEXT: 00B0: 00000000 01000000 02000000 18000000 +// CHECK-NEXT: 00C0: 00000000 017A5052 00017810 04020000 +// CHECK-NEXT: 00D0: 1B0C0708 90010000 10000000 20000000 +// CHECK-NEXT: 00E0: 00000000 01000000 00000000 18000000 +// CHECK-NEXT: 00F0: 00000000 017A5052 00017810 06030000 +// CHECK-NEXT: 0100: 00001B0C 07089001 10000000 20000000 +// CHECK-NEXT: 0110: 00000000 01000000 00000000 1C000000 +// CHECK-NEXT: 0120: 00000000 017A5052 00017810 0A040000 +// CHECK-NEXT: 0130: 00000000 00001B0C 07089001 10000000 +// CHECK-NEXT: 0140: 24000000 00000000 01000000 00000000 +// CHECK-NEXT: 0150: 18000000 00000000 017A5052 00017810 +// CHECK-NEXT: 0160: 040A0000 1B0C0708 90010000 10000000 +// CHECK-NEXT: 0170: 20000000 00000000 01000000 00000000 +// CHECK-NEXT: 0180: 18000000 00000000 017A5052 00017810 +// CHECK-NEXT: 0190: 060B0000 00001B0C 07089001 10000000 +// CHECK-NEXT: 01A0: 20000000 00000000 01000000 00000000 +// CHECK-NEXT: 01B0: 1C000000 00000000 017A5052 00017810 +// CHECK-NEXT: 01C0: 0A0C0000 00000000 00001B0C 07089001 +// CHECK-NEXT: 01D0: 10000000 24000000 00000000 01000000 +// CHECK-NEXT: 01E0: 00000000 1C000000 00000000 017A5052 +// CHECK-NEXT: 01F0: 00017810 0A080000 00000000 00001B0C +// CHECK-NEXT: 0200: 07089001 10000000 24000000 00000000 +// CHECK-NEXT: 0210: 01000000 00000000 1C000000 00000000 +// CHECK-NEXT: 0220: 017A5052 00017810 0A100000 00000000 +// CHECK-NEXT: 0230: 00001B0C 07089001 10000000 24000000 +// CHECK-NEXT: 0240: 00000000 01000000 00000000 18000000 +// CHECK-NEXT: 0250: 00000000 017A5052 00017810 04120000 +// CHECK-NEXT: 0260: 1B0C0708 90010000 10000000 20000000 +// CHECK-NEXT: 0270: 00000000 01000000 00000000 18000000 +// CHECK-NEXT: 0280: 00000000 017A5052 00017810 06130000 +// CHECK-NEXT: 0290: 00001B0C 07089001 10000000 20000000 +// CHECK-NEXT: 02A0: 00000000 01000000 00000000 1C000000 +// CHECK-NEXT: 02B0: 00000000 017A5052 00017810 0A140000 +// CHECK-NEXT: 02C0: 00000000 00001B0C 07089001 10000000 +// CHECK-NEXT: 02D0: 24000000 00000000 01000000 00000000 +// CHECK-NEXT: 02E0: 18000000 00000000 017A5052 00017810 +// CHECK-NEXT: 02F0: 041A0000 1B0C0708 90010000 10000000 +// CHECK-NEXT: 0300: 20000000 00000000 01000000 00000000 +// CHECK-NEXT: 0310: 18000000 00000000 017A5052 00017810 +// CHECK-NEXT: 0320: 061B0000 00001B0C 07089001 10000000 +// CHECK-NEXT: 0330: 20000000 00000000 01000000 00000000 +// CHECK-NEXT: 0340: 1C000000 00000000 017A5052 00017810 +// CHECK-NEXT: 0350: 0A1C0000 00000000 00001B0C 07089001 +// CHECK-NEXT: 0360: 10000000 24000000 00000000 01000000 +// CHECK-NEXT: 0370: 00000000 1C000000 00000000 017A5052 +// CHECK-NEXT: 0380: 00017810 0A180000 00000000 00001B0C +// CHECK-NEXT: 0390: 07089001 10000000 24000000 00000000 +// CHECK-NEXT: 03A0: 01000000 00000000 1C000000 00000000 +// CHECK-NEXT: 03B0: 017A5052 00017810 0A800000 00000000 +// CHECK-NEXT: 03C0: 00001B0C 07089001 10000000 24000000 +// CHECK-NEXT: 03D0: 00000000 01000000 00000000 18000000 +// CHECK-NEXT: 03E0: 00000000 017A5052 00017810 04820000 +// CHECK-NEXT: 03F0: 1B0C0708 90010000 10000000 20000000 +// CHECK-NEXT: 0400: 00000000 01000000 00000000 18000000 +// CHECK-NEXT: 0410: 00000000 017A5052 00017810 06830000 +// CHECK-NEXT: 0420: 00001B0C 07089001 10000000 20000000 +// CHECK-NEXT: 0430: 00000000 01000000 00000000 1C000000 +// CHECK-NEXT: 0440: 00000000 017A5052 00017810 0A840000 +// CHECK-NEXT: 0450: 00000000 00001B0C 07089001 10000000 +// CHECK-NEXT: 0460: 24000000 00000000 01000000 00000000 +// CHECK-NEXT: 0470: 18000000 00000000 017A5052 00017810 +// CHECK-NEXT: 0480: 048A0000 1B0C0708 90010000 10000000 +// CHECK-NEXT: 0490: 20000000 00000000 01000000 00000000 +// CHECK-NEXT: 04A0: 18000000 00000000 017A5052 00017810 +// CHECK-NEXT: 04B0: 068B0000 00001B0C 07089001 10000000 +// CHECK-NEXT: 04C0: 20000000 00000000 01000000 00000000 +// CHECK-NEXT: 04D0: 1C000000 00000000 017A5052 00017810 +// CHECK-NEXT: 04E0: 0A8C0000 00000000 00001B0C 07089001 +// CHECK-NEXT: 04F0: 10000000 24000000 00000000 01000000 +// CHECK-NEXT: 0500: 00000000 1C000000 00000000 017A5052 +// CHECK-NEXT: 0510: 00017810 0A880000 00000000 00001B0C +// CHECK-NEXT: 0520: 07089001 10000000 24000000 00000000 +// CHECK-NEXT: 0530: 01000000 00000000 1C000000 00000000 +// CHECK-NEXT: 0540: 017A5052 00017810 0A900000 00000000 +// CHECK-NEXT: 0550: 00001B0C 07089001 10000000 24000000 +// CHECK-NEXT: 0560: 00000000 01000000 00000000 18000000 +// CHECK-NEXT: 0570: 00000000 017A5052 00017810 04920000 +// CHECK-NEXT: 0580: 1B0C0708 90010000 10000000 20000000 +// CHECK-NEXT: 0590: 00000000 01000000 00000000 18000000 +// CHECK-NEXT: 05A0: 00000000 017A5052 00017810 06930000 +// CHECK-NEXT: 05B0: 00001B0C 07089001 10000000 20000000 +// CHECK-NEXT: 05C0: 00000000 01000000 00000000 1C000000 +// CHECK-NEXT: 05D0: 00000000 017A5052 00017810 0A940000 +// CHECK-NEXT: 05E0: 00000000 00001B0C 07089001 10000000 +// CHECK-NEXT: 05F0: 24000000 00000000 01000000 00000000 +// CHECK-NEXT: 0600: 18000000 00000000 017A5052 00017810 +// CHECK-NEXT: 0610: 049A0000 1B0C0708 90010000 10000000 +// CHECK-NEXT: 0620: 20000000 00000000 01000000 00000000 +// CHECK-NEXT: 0630: 18000000 00000000 017A5052 00017810 +// CHECK-NEXT: 0640: 069B0000 00001B0C 07089001 10000000 +// CHECK-NEXT: 0650: 20000000 00000000 01000000 00000000 +// CHECK-NEXT: 0660: 1C000000 00000000 017A5052 00017810 +// CHECK-NEXT: 0670: 0A9C0000 00000000 00001B0C 07089001 +// CHECK-NEXT: 0680: 10000000 24000000 00000000 01000000 +// CHECK-NEXT: 0690: 00000000 1C000000 00000000 017A5052 +// CHECK-NEXT: 06A0: 00017810 0A980000 00000000 00001B0C +// CHECK-NEXT: 06B0: 07089001 10000000 24000000 00000000 +// CHECK-NEXT: 06C0: 01000000 00000000 +// CHECK-NEXT: ) +// CHECK-NEXT: } + +// CHECK: Section { +// CHECK: Index: 5 +// CHECK-NEXT: Name: .rela.eh_frame +// CHECK-NEXT: Type: SHT_RELA +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0xE30 +// CHECK-NEXT: Size: 1728 +// CHECK-NEXT: Link: 7 +// CHECK-NEXT: Info: 4 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 24 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: ] +// CHECK: } diff --git a/test/MC/ELF/comdat.s b/test/MC/ELF/comdat.s index d7acea6..f9469df 100644 --- a/test/MC/ELF/comdat.s +++ b/test/MC/ELF/comdat.s @@ -1,75 +1,81 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -t | FileCheck %s // Test that we produce the group sections and that they are a the beginning // of the file. -// CHECK: # Section 1 -// CHECK-NEXT: (('sh_name', 0x0000001b) # '.group' -// CHECK-NEXT: ('sh_type', 0x00000011) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000040) -// CHECK-NEXT: ('sh_size', 0x000000000000000c) -// CHECK-NEXT: ('sh_link', 0x0000000d) -// CHECK-NEXT: ('sh_info', 0x00000001) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000004) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000004) -// CHECK-NEXT: ), -// CHECK-NEXT: # Section 2 -// CHECK-NEXT: (('sh_name', 0x0000001b) # '.group' -// CHECK-NEXT: ('sh_type', 0x00000011) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x000000000000004c) -// CHECK-NEXT: ('sh_size', 0x0000000000000008) -// CHECK-NEXT: ('sh_link', 0x0000000d) -// CHECK-NEXT: ('sh_info', 0x00000002) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000004) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000004) -// CHECK-NEXT: ), -// CHECK-NEXT: # Section 3 -// CHECK-NEXT: (('sh_name', 0x0000001b) # '.group' -// CHECK-NEXT: ('sh_type', 0x00000011) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000054) -// CHECK-NEXT: ('sh_size', 0x0000000000000008) -// CHECK-NEXT: ('sh_link', 0x0000000d) -// CHECK-NEXT: ('sh_info', 0x0000000d) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000004) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000004) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Index: 1 +// CHECK-NEXT: Name: .group +// CHECK-NEXT: Type: SHT_GROUP +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x40 +// CHECK-NEXT: Size: 12 +// CHECK-NEXT: Link: 13 +// CHECK-NEXT: Info: 1 +// CHECK-NEXT: AddressAlignment: 4 +// CHECK-NEXT: EntrySize: 4 +// CHECK-NEXT: } +// CHECK-NEXT: Section { +// CHECK-NEXT: Index: 2 +// CHECK-NEXT: Name: .group +// CHECK-NEXT: Type: SHT_GROUP +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x4C +// CHECK-NEXT: Size: 8 +// CHECK-NEXT: Link: 13 +// CHECK-NEXT: Info: 2 +// CHECK-NEXT: AddressAlignment: 4 +// CHECK-NEXT: EntrySize: 4 +// CHECK-NEXT: } +// CHECK-NEXT: Section { +// CHECK-NEXT: Index: 3 +// CHECK-NEXT: Name: .group +// CHECK-NEXT: Type: SHT_GROUP +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x54 +// CHECK-NEXT: Size: 8 +// CHECK-NEXT: Link: 13 +// CHECK-NEXT: Info: 13 +// CHECK-NEXT: AddressAlignment: 4 +// CHECK-NEXT: EntrySize: 4 +// CHECK-NEXT: } // Test that g1 and g2 are local, but g3 is an undefined global. -// CHECK: # Symbol 1 -// CHECK-NEXT: (('st_name', 0x00000001) # 'g1' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0007) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 2 -// CHECK-NEXT: (('st_name', 0x00000004) # 'g2' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0002) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), +// CHECK: Symbol { +// CHECK: Name: g1 (1) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .foo (0x7) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: g2 (4) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .group (0x2) +// CHECK-NEXT: } -// CHECK: # Symbol 13 -// CHECK-NEXT: (('st_name', 0x00000007) # 'g3' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), +// CHECK: Symbol { +// CHECK: Name: g3 (7) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } .section .foo,"axG",@progbits,g1,comdat diff --git a/test/MC/ELF/common.s b/test/MC/ELF/common.s index 046306e..4fc2154 100644 --- a/test/MC/ELF/common.s +++ b/test/MC/ELF/common.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -t | FileCheck %s .text @@ -8,13 +8,15 @@ .local common1 .comm common1,1,1 -// CHECK: ('st_name', 0x00000001) # 'common1' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x1) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000001) +// CHECK: Symbol { +// CHECK: Name: common1 (1) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 1 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: Object +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: +// CHECK-NEXT: } // Same as common1, but with directives in a different order. @@ -22,38 +24,44 @@ .type common2,@object .comm common2,1,1 -// CHECK: ('st_name', 0x00000009) # 'common2' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x1) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', -// CHECK-NEXT: ('st_value', 0x0000000000000001) -// CHECK-NEXT: ('st_size', 0x0000000000000001) +// CHECK: Symbol { +// CHECK: Name: common2 (9) +// CHECK-NEXT: Value: 0x1 +// CHECK-NEXT: Size: 1 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: Object +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: +// CHECK-NEXT: } + .local common6 .comm common6,8,16 -// CHECK: # Symbol 3 -// CHECK-NEXT: (('st_name', 0x00000011) # 'common6' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x1) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0004) -// CHECK-NEXT: ('st_value', 0x0000000000000010) -// CHECK-NEXT: ('st_size', 0x0000000000000008) -// CHECK-NEXT: ), +// CHECK: Symbol { +// CHECK: Name: common6 (17) +// CHECK-NEXT: Value: 0x10 +// CHECK-NEXT: Size: 8 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: Object +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .bss (0x4) +// CHECK-NEXT: } + // Test that without an explicit .local we produce a global. .type common3,@object .comm common3,4,4 -// CHECK: ('st_name', 0x00000019) # 'common3' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x1) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0xfff2) -// CHECK-NEXT: ('st_value', 0x0000000000000004) -// CHECK-NEXT: ('st_size', 0x0000000000000004) +// CHECK: Symbol { +// CHECK: Name: common3 (25) +// CHECK-NEXT: Value: 0x4 +// CHECK-NEXT: Size: 4 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: Object +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0xFFF2) +// CHECK-NEXT: } // Test that without an explicit .local we produce a global, even if the first @@ -67,22 +75,25 @@ foo: .type common4,@object .comm common4,40,16 -// CHECK: ('st_name', 0x00000025) # 'common4' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x1) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0xfff2) -// CHECK-NEXT: ('st_value', 0x0000000000000010) -// CHECK-NEXT: ('st_size', 0x0000000000000028) +// CHECK: Symbol { +// CHECK: Name: common4 (37) +// CHECK-NEXT: Value: 0x10 +// CHECK-NEXT: Size: 40 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: Object +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0xFFF2) +// CHECK-NEXT: } + .comm common5,4,4 -// CHECK: # Symbol 9 -// CHECK-NEXT: (('st_name', 0x0000002d) # 'common5' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x1) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0xfff2) -// CHECK-NEXT: ('st_value', 0x0000000000000004) -// CHECK-NEXT: ('st_size', 0x0000000000000004) -// CHECK-NEXT: ), +// CHECK: Symbol { +// CHECK: Name: common5 (45) +// CHECK-NEXT: Value: 0x4 +// CHECK-NEXT: Size: 4 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: Object +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0xFFF2) +// CHECK-NEXT: } diff --git a/test/MC/ELF/common2.s b/test/MC/ELF/common2.s index b13577d..526ebc2 100644 --- a/test/MC/ELF/common2.s +++ b/test/MC/ELF/common2.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s | FileCheck %s // Test that the common symbols are placed at the end of .bss. In this example // it causes .bss to have size 9 instead of 8. @@ -9,13 +9,16 @@ .zero 1 .align 8 -// CHECK: (('sh_name', 0x00000007) # '.bss' -// CHECK-NEXT: ('sh_type', -// CHECK-NEXT: ('sh_flags' -// CHECK-NEXT: ('sh_addr', -// CHECK-NEXT: ('sh_offset', -// CHECK-NEXT: ('sh_size', 0x0000000000000009) -// CHECK-NEXT: ('sh_link', -// CHECK-NEXT: ('sh_info', -// CHECK-NEXT: ('sh_addralign', -// CHECK-NEXT: ('sh_entsize', +// CHECK: Section { +// CHECK: Name: .bss (7) +// CHECK-NEXT: Type: +// CHECK-NEXT: Flags [ +// CHECK: ] +// CHECK-NEXT: Address: +// CHECK-NEXT: Offset: +// CHECK-NEXT: Size: 9 +// CHECK-NEXT: Link: +// CHECK-NEXT: Info: +// CHECK-NEXT: AddressAlignment: +// CHECK-NEXT: EntrySize: +// CHECK-NEXT: } diff --git a/test/MC/ELF/debug-line.s b/test/MC/ELF/debug-line.s index fed816a..75e050e 100644 --- a/test/MC/ELF/debug-line.s +++ b/test/MC/ELF/debug-line.s @@ -1,18 +1,26 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sd | FileCheck %s // Test that .debug_line is populated. -// CHECK: (('sh_name', 0x00000011) # '.debug_line' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000044) -// CHECK-NEXT: ('sh_size', 0x0000000000000037) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000001) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', '33000000 02001c00 00000101 fb0e0d00 01010101 00000001 00000100 666f6f2e 63000000 00000009 02000000 00000000 00150204 000101') +// CHECK: Section { +// CHECK: Name: .debug_line +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x44 +// CHECK-NEXT: Size: 55 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 1 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 33000000 02001C00 00000101 FB0E0D00 +// CHECK-NEXT: 0010: 01010101 00000001 00000100 666F6F2E +// CHECK-NEXT: 0020: 63000000 00000009 02000000 00000000 +// CHECK-NEXT: 0030: 00150204 000101 +// CHECK-NEXT: ) +// CHECK-NEXT: } .section .debug_line,"",@progbits .text diff --git a/test/MC/ELF/debug-loc.s b/test/MC/ELF/debug-loc.s index 3eb3797..b24fa16 100644 --- a/test/MC/ELF/debug-loc.s +++ b/test/MC/ELF/debug-loc.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s | FileCheck %s // Test that we don't regress on the size of the line info section. We used // to handle negative line diffs incorrectly which manifested as very @@ -7,18 +7,20 @@ // FIXME: This size is the same as gnu as, but we can probably do a bit better. // FIXME2: We need a debug_line dumper so that we can test the actual contents. -// CHECK: # Section 4 -// CHECK-NEXT: (('sh_name', 0x00000011) # '.debug_line' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000044) -// CHECK-NEXT: ('sh_size', 0x000000000000003d) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000001) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Index: 4 +// CHECK-NEXT: Name: .debug_line +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x44 +// CHECK-NEXT: Size: 61 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 1 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: } .section .debug_line,"",@progbits .text diff --git a/test/MC/ELF/diff.s b/test/MC/ELF/diff.s index 4214fc7..5436510 100644 --- a/test/MC/ELF/diff.s +++ b/test/MC/ELF/diff.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -r | FileCheck %s .global zed foo: @@ -8,8 +8,4 @@ bar: zed: mov zed+(bar-foo), %eax -// CHECK: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000005) -// CHECK-NEXT: ('r_sym', 0x00000006) -// CHECK-NEXT: ('r_type', 0x0000000b) -// CHECK-NEXT: ('r_addend', 0x0000000000000001) +// CHECK: 0x5 R_X86_64_32S zed 0x1 diff --git a/test/MC/ELF/empty-dwarf-lines.s b/test/MC/ELF/empty-dwarf-lines.s index 7baedbc..241580b 100644 --- a/test/MC/ELF/empty-dwarf-lines.s +++ b/test/MC/ELF/empty-dwarf-lines.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s | FileCheck %s // Test that the dwarf debug_line section contains no line directives. @@ -7,15 +7,17 @@ c: .asciz "hi\n" -// CHECK: # Section 4 -// CHECK-NEXT: (('sh_name', 0x0000000c) # '.debug_line' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000044) -// CHECK-NEXT: ('sh_size', 0x0000000000000027) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000001) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Index: 4 +// CHECK-NEXT: Name: .debug_line +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x44 +// CHECK-NEXT: Size: 39 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 1 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: } diff --git a/test/MC/ELF/empty.s b/test/MC/ELF/empty.s index b38a621..c421fe8 100644 --- a/test/MC/ELF/empty.s +++ b/test/MC/ELF/empty.s @@ -1,70 +1,89 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s | FileCheck %s // Test that like gnu as we create text, data and bss by default. Also test // that shstrtab, symtab and strtab are listed in that order. -// CHECK: ('sh_name', 0x00000001) # '.text' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000006) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000040) -// CHECK-NEXT: ('sh_size', 0x0000000000000000) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000004) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) - -// CHECK: ('sh_name', 0x00000026) # '.data' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000003) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000040) -// CHECK-NEXT: ('sh_size', 0x0000000000000000) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000004) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) - -// CHECK: ('sh_name', 0x00000007) # '.bss' -// CHECK-NEXT: ('sh_type', 0x00000008) -// CHECK-NEXT: ('sh_flags', 0x0000000000000003) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000040) -// CHECK-NEXT: ('sh_size', 0x0000000000000000) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000004) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) - -// CHECK: ('sh_name', 0x0000000c) # '.shstrtab' -// CHECK-NEXT: ('sh_type', 0x00000003) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000040) -// CHECK-NEXT: ('sh_size', 0x000000000000002c) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000001) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) - -// CHECK: ('sh_name', 0x0000001e) # '.symtab' -// CHECK-NEXT: ('sh_type', 0x00000002) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', -// CHECK-NEXT: ('sh_size', 0x0000000000000060) -// CHECK-NEXT: ('sh_link', 0x00000006) -// CHECK-NEXT: ('sh_info', 0x00000004) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000018) - -// CHECK: ('sh_name', 0x00000016) # '.strtab' -// CHECK-NEXT: ('sh_type', 0x00000003) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', -// CHECK-NEXT: ('sh_size', 0x0000000000000001) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000001) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) +// CHECK: Section { +// CHECK: Name: .text +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: SHF_EXECINSTR +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x40 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 4 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: } +// CHECK: Section { +// CHECK: Name: .data +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: SHF_WRITE +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x40 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 4 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: } +// CHECK: Section { +// CHECK: Name: .bss +// CHECK-NEXT: Type: SHT_NOBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: SHF_WRITE +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x40 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 4 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: } +// CHECK: Section { +// CHECK: Name: .shstrtab +// CHECK-NEXT: Type: SHT_STRTAB +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x40 +// CHECK-NEXT: Size: 44 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 1 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: } +// CHECK: Section { +// CHECK: Name: .symtab +// CHECK-NEXT: Type: SHT_SYMTAB +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: +// CHECK-NEXT: Size: 96 +// CHECK-NEXT: Link: 6 +// CHECK-NEXT: Info: 4 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 24 +// CHECK-NEXT: } +// CHECK: Section { +// CHECK: Name: .strtab +// CHECK-NEXT: Type: SHT_STRTAB +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: +// CHECK-NEXT: Size: 1 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 1 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: } diff --git a/test/MC/ELF/entsize.ll b/test/MC/ELF/entsize.ll index dce6dba..2bf9fa9 100644 --- a/test/MC/ELF/entsize.ll +++ b/test/MC/ELF/entsize.ll @@ -1,4 +1,4 @@ -; RUN: llc -filetype=obj -mtriple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck -check-prefix=64 %s +; RUN: llc -filetype=obj -mtriple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s | FileCheck -check-prefix=64 %s ; Test that constant mergeable strings have sh_entsize set. @@ -20,25 +20,35 @@ declare void @foo(i64* nocapture) nounwind ;;;;; -; 64: (('sh_name', 0x0000004e) # '.rodata.str1.1' -; 64-NEXT: ('sh_type', 0x00000001) -; 64-NEXT: ('sh_flags', 0x0000000000000032) -; 64-NEXT: ('sh_addr', -; 64-NEXT: ('sh_offset', -; 64-NEXT: ('sh_size', 0x000000000000000d) -; 64-NEXT: ('sh_link', -; 64-NEXT: ('sh_info', -; 64-NEXT: ('sh_addralign', 0x0000000000000001) -; 64-NEXT: ('sh_entsize', 0x0000000000000001) - -; 64: (('sh_name', 0x00000041) # '.rodata.cst8' -; 64-NEXT: ('sh_type', 0x00000001) -; 64-NEXT: ('sh_flags', 0x0000000000000012) -; 64-NEXT: ('sh_addr', -; 64-NEXT: ('sh_offset', -; 64-NEXT: ('sh_size', 0x0000000000000010) -; 64-NEXT: ('sh_link', -; 64-NEXT: ('sh_info', -; 64-NEXT: ('sh_addralign', 0x0000000000000008) -; 64-NEXT: ('sh_entsize', 0x0000000000000008) - +; 64: Section { +; 64: Name: .rodata.str1.1 +; 64-NEXT: Type: SHT_PROGBITS +; 64-NEXT: Flags [ +; 64-NEXT: SHF_ALLOC +; 64-NEXT: SHF_MERGE +; 64-NEXT: SHF_STRINGS +; 64-NEXT: ] +; 64-NEXT: Address: +; 64-NEXT: Offset: +; 64-NEXT: Size: 13 +; 64-NEXT: Link: +; 64-NEXT: Info: +; 64-NEXT: AddressAlignment: 1 +; 64-NEXT: EntrySize: 1 +; 64-NEXT: } + +; 64: Section { +; 64: Name: .rodata.cst8 +; 64-NEXT: Type: SHT_PROGBITS +; 64-NEXT: Flags [ +; 64-NEXT: SHF_ALLOC +; 64-NEXT: SHF_MERGE +; 64-NEXT: ] +; 64-NEXT: Address: +; 64-NEXT: Offset: +; 64-NEXT: Size: 16 +; 64-NEXT: Link: +; 64-NEXT: Info: +; 64-NEXT: AddressAlignment: 8 +; 64-NEXT: EntrySize: 8 +; 64-NEXT: } diff --git a/test/MC/ELF/entsize.s b/test/MC/ELF/entsize.s index 4645686..8e084e2 100644 --- a/test/MC/ELF/entsize.s +++ b/test/MC/ELF/entsize.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s | FileCheck %s // Test that mergeable constants have sh_entsize set. @@ -32,38 +32,53 @@ .quad 42 .quad 42 -// CHECK: # Section 4 -// CHECK-NEXT: ('sh_name', 0x00000048) # '.rodata.str1.1' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000032) -// CHECK-NEXT: ('sh_addr', -// CHECK-NEXT: ('sh_offset', -// CHECK-NEXT: ('sh_size', 0x000000000000000d) -// CHECK-NEXT: ('sh_link', -// CHECK-NEXT: ('sh_info', -// CHECK-NEXT: ('sh_addralign', 0x0000000000000001) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000001) - -// CHECK: # Section 5 -// CHECK-NEXT: ('sh_name', 0x00000039) # '.rodata.str2.1' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000032) -// CHECK-NEXT: ('sh_addr', -// CHECK-NEXT: ('sh_offset', -// CHECK-NEXT: ('sh_size', 0x0000000000000010) -// CHECK-NEXT: ('sh_link', -// CHECK-NEXT: ('sh_info', -// CHECK-NEXT: ('sh_addralign', 0x0000000000000001) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000002) - -// CHECK: # Section 6 -// CHECK-NEXT: ('sh_name', 0x0000002c) # '.rodata.cst8 -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000012) -// CHECK-NEXT: ('sh_addr', -// CHECK-NEXT: ('sh_offset', -// CHECK-NEXT: ('sh_size', 0x0000000000000010) -// CHECK-NEXT: ('sh_link', -// CHECK-NEXT: ('sh_info', -// CHECK-NEXT: ('sh_addralign', 0x0000000000000001) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000008) +// CHECK: Section { +// CHECK: Index: 4 +// CHECK-NEXT: Name: .rodata.str1.1 +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: SHF_MERGE +// CHECK-NEXT: SHF_STRINGS +// CHECK-NEXT: ] +// CHECK-NEXT: Address: +// CHECK-NEXT: Offset: +// CHECK-NEXT: Size: 13 +// CHECK-NEXT: Link: +// CHECK-NEXT: Info: +// CHECK-NEXT: AddressAlignment: 1 +// CHECK-NEXT: EntrySize: 1 +// CHECK-NEXT: } +// CHECK: Section { +// CHECK: Index: 5 +// CHECK-NEXT: Name: .rodata.str2.1 +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: SHF_MERGE +// CHECK-NEXT: SHF_STRINGS +// CHECK-NEXT: ] +// CHECK-NEXT: Address: +// CHECK-NEXT: Offset: +// CHECK-NEXT: Size: 16 +// CHECK-NEXT: Link: +// CHECK-NEXT: Info: +// CHECK-NEXT: AddressAlignment: 1 +// CHECK-NEXT: EntrySize: 2 +// CHECK-NEXT: } +// CHECK: Section { +// CHECK: Index: 6 +// CHECK-NEXT: Name: .rodata.cst8 +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: SHF_MERGE +// CHECK-NEXT: ] +// CHECK-NEXT: Address: +// CHECK-NEXT: Offset: +// CHECK-NEXT: Size: 16 +// CHECK-NEXT: Link: +// CHECK-NEXT: Info: +// CHECK-NEXT: AddressAlignment: 1 +// CHECK-NEXT: EntrySize: 8 +// CHECK-NEXT: } diff --git a/test/MC/ELF/file.s b/test/MC/ELF/file.s index 434fb6e..7e287f7 100644 --- a/test/MC/ELF/file.s +++ b/test/MC/ELF/file.s @@ -1,23 +1,25 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -t | FileCheck %s // Test that the STT_FILE symbol precedes the other local symbols. .file "foo" foa: -// CHECK: # Symbol 1 -// CHECK-NEXT: (('st_name', 0x00000001) # 'foo' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x4) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0xfff1) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 2 -// CHECK-NEXT: (('st_name', 0x00000005) # 'foa' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) + +// CHECK: Symbol { +// CHECK: Name: foo (1) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: File +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0xFFF1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: foa (5) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } diff --git a/test/MC/ELF/gen-dwarf.s b/test/MC/ELF/gen-dwarf.s index 85e0242..907bf42 100644 --- a/test/MC/ELF/gen-dwarf.s +++ b/test/MC/ELF/gen-dwarf.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -g -triple i686-pc-linux-gnu %s -filetype=obj -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -g -triple i686-pc-linux-gnu %s -filetype=obj -o - | llvm-readobj -r | FileCheck %s // Test that on ELF: @@ -14,97 +14,13 @@ foo: ret .size foo, .-foo -// Section 4 is .debug_line -// CHECK: # Section 4 -// CHECK-NEXT: # '.debug_line' - - - -// The two relocations, one to symbol 6 and one to 4 -// CHECK: # '.rel.debug_info' -// CHECK-NEXT: ('sh_type', -// CHECK-NEXT: ('sh_flags' -// CHECK-NEXT: ('sh_addr', -// CHECK-NEXT: ('sh_offset', -// CHECK-NEXT: ('sh_size', -// CHECK-NEXT: ('sh_link', -// CHECK-NEXT: ('sh_info', -// CHECK-NEXT: ('sh_addralign', -// CHECK-NEXT: ('sh_entsize', -// CHECK-NEXT: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x00000006) -// CHECK-NEXT: ('r_sym', 0x000006) -// CHECK-NEXT: ('r_type', 0x01) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 1 -// CHECK-NEXT: (('r_offset', 0x0000000c) -// CHECK-NEXT: ('r_sym', 0x000004) -// CHECK-NEXT: ('r_type', 0x01) -// CHECK-NEXT: ), - - -// Section 8 is .debug_abbrev -// CHECK: # Section 8 -// CHECK-NEXT: (('sh_name', 0x00000001) # '.debug_abbrev' - -// Section 9 is .debug_aranges -// CHECK: # Section 9 -// CHECK-NEXT: (('sh_name', 0x0000001e) # '.debug_aranges' - -// Two relocations in .debug_aranges, one to text and one to debug_info. -// CHECK: # '.rel.debug_aranges' -// CHECK: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x00000006) -// CHECK-NEXT: ('r_sym', 0x000005) -// CHECK-NEXT: ('r_type', 0x01) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 1 -// CHECK-NEXT: (('r_offset', 0x00000010) -// CHECK-NEXT: ('r_sym', 0x000001) -// CHECK-NEXT: ('r_type', 0x01) -// CHECK-NEXT: ), - -// Symbol 1 is section 1 (.text) -// CHECK: # Symbol 1 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x3) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ), - -// Symbol 4 is section 4 (.debug_line) -// CHECK: # Symbol 4 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x3) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0004) -// CHECK-NEXT: ), - -// Symbol 5 is section 6 (.debug_info) -// CHECK: # Symbol 5 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x3) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0006) -// CHECK-NEXT: ), - -// Symbol 6 is section 8 (.debug_abbrev) -// CHECK: # Symbol 6 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x3) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0008) -// CHECK-NEXT: ), +// CHECK: Relocations [ +// CHECK: Section ({{[^ ]+}}) .debug_info { +// CHECK-NEXT: 0x6 R_386_32 .debug_abbrev 0x0 +// CHECK-NEXT: 0xC R_386_32 .debug_line 0x0 +// CHECK: } +// CHECK-NEXT: Section ({{[^ ]+}}) .debug_aranges { +// CHECK-NEXT: 0x6 R_386_32 .debug_info 0x0 +// CHECK-NEXT: 0x10 R_386_32 .text 0x0 +// CHECK-NEXT: } +// CHECK-NEXT: ] diff --git a/test/MC/ELF/global-offset.s b/test/MC/ELF/global-offset.s index 81ae5d7..c688673 100644 --- a/test/MC/ELF/global-offset.s +++ b/test/MC/ELF/global-offset.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple i386-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple i386-pc-linux-gnu %s -o - | llvm-readobj -s -sd | FileCheck %s // We test that _GLOBAL_OFFSET_TABLE_ will account for the two bytes at the // start of the addl/leal. @@ -10,14 +10,20 @@ foo: addl _GLOBAL_OFFSET_TABLE_-foo,%ebx -// CHECK: ('sh_name', 0x00000005) # '.text' -// CHECK-NEXT: ('sh_type', -// CHECK-NEXT: ('sh_flags', -// CHECK-NEXT: ('sh_addr', -// CHECK-NEXT: ('sh_offset', -// CHECK-NEXT: ('sh_size', -// CHECK-NEXT: ('sh_link', -// CHECK-NEXT: ('sh_info', -// CHECK-NEXT: ('sh_addralign', -// CHECK-NEXT: ('sh_entsize', -// CHECK-NEXT: ('_section_data', '81c30200 00008d9b 02000000 031d0200 0000') +// CHECK: Section { +// CHECK: Name: .text +// CHECK-NEXT: Type: +// CHECK-NEXT: Flags [ +// CHECK: ] +// CHECK-NEXT: Address: +// CHECK-NEXT: Offset: +// CHECK-NEXT: Size: +// CHECK-NEXT: Link: +// CHECK-NEXT: Info: +// CHECK-NEXT: AddressAlignment: +// CHECK-NEXT: EntrySize: +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 81C30200 00008D9B 02000000 031D0200 +// CHECK-NEXT: 0010: 0000 +// CHECK-NEXT: ) +// CHECK-NEXT: } diff --git a/test/MC/ELF/got.s b/test/MC/ELF/got.s index a849872..60dea6d 100644 --- a/test/MC/ELF/got.s +++ b/test/MC/ELF/got.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -r -t | FileCheck %s // Test that this produces a R_X86_64_GOT32 and that we have an undefined // reference to _GLOBAL_OFFSET_TABLE_. @@ -6,20 +6,15 @@ movl foo@GOT, %eax movl foo@GOTPCREL(%rip), %eax -// CHECK: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', -// CHECK-NEXT: ('r_sym', -// CHECK-NEXT: ('r_type', 0x00000003) -// CHECK-NEXT: ('r_addend', -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 1 -// CHECK-NEXT: (('r_offset', -// CHECK-NEXT: ('r_sym', -// CHECK-NEXT: ('r_type', 0x00000009) -// CHECK-NEXT: ('r_addend', -// CHECK-NEXT: ), -// CHECK-NEXT: ]) +// CHECK: Relocations [ +// CHECK: Section ({{[^ ]+}}) .text { +// CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_GOT32 foo 0x{{[^ ]+}} +// CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_GOTPCREL foo 0x{{[^ ]+}} +// CHECK-NEXT: } +// CHECK-NEXT: ] -// CHECK: (('st_name', 0x00000005) # '_GLOBAL_OFFSET_TABLE_' -// CHECK-NEXT: ('st_bind', 0x1) +// CHECK: Symbol { +// CHECK: Name: _GLOBAL_OFFSET_TABLE_ +// CHECK-NEXT: Value: +// CHECK-NEXT: Size: +// CHECK-NEXT: Binding: Global diff --git a/test/MC/ELF/ident.s b/test/MC/ELF/ident.s index 56af19a..2592205 100644 --- a/test/MC/ELF/ident.s +++ b/test/MC/ELF/ident.s @@ -1,16 +1,23 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sd | FileCheck %s -// CHECK: (('sh_name', 0x00000007) # '.comment' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000030) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000040) -// CHECK-NEXT: ('sh_size', 0x000000000000000d) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000001) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000001) -// CHECK-NEXT: ('_section_data', '00666f6f 00626172 007a6564 00') +// CHECK: Section { +// CHECK: Name: .comment +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_MERGE +// CHECK-NEXT: SHF_STRINGS +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x40 +// CHECK-NEXT: Size: 13 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 1 +// CHECK-NEXT: EntrySize: 1 +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 00666F6F 00626172 007A6564 00 +// CHECK-NEXT: ) +// CHECK-NEXT: } .ident "foo" .ident "bar" diff --git a/test/MC/ELF/lcomm.s b/test/MC/ELF/lcomm.s index ae8d0ba..430b79b 100644 --- a/test/MC/ELF/lcomm.s +++ b/test/MC/ELF/lcomm.s @@ -1,21 +1,23 @@ -// RUN: llvm-mc -triple i386-pc-linux-gnu %s -filetype=obj -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -triple i386-pc-linux-gnu %s -filetype=obj -o - | llvm-readobj -t | FileCheck %s .lcomm A, 5 .lcomm B, 32 << 20 -// CHECK: (('st_name', 0x00000001) # 'A' -// CHECK: ('st_value', 0x00000000) -// CHECK: ('st_size', 0x00000005) -// CHECK: ('st_bind', 0x0) -// CHECK: ('st_type', 0x1) -// CHECK: ('st_other', 0x00) -// CHECK: ('st_shndx', 0x0003) -// CHECK: ), -// CHECK: (('st_name', 0x00000003) # 'B' -// CHECK: ('st_value', 0x00000005) -// CHECK: ('st_size', 0x02000000) -// CHECK: ('st_bind', 0x0) -// CHECK: ('st_type', 0x1) -// CHECK: ('st_other', 0x00) -// CHECK: ('st_shndx', 0x0003) -// CHECK: ), +// CHECK: Symbol { +// CHECK: Name: A (1) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 5 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: Object +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .bss (0x3) +// CHECK-NEXT: } +// CHECK: Symbol { +// CHECK: Name: B (3) +// CHECK-NEXT: Value: 0x5 +// CHECK-NEXT: Size: 33554432 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: Object +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .bss (0x3) +// CHECK-NEXT: } diff --git a/test/MC/ELF/leb128.s b/test/MC/ELF/leb128.s index f6daac8..84c5b54 100644 --- a/test/MC/ELF/leb128.s +++ b/test/MC/ELF/leb128.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sd | FileCheck %s .sleb128 .Lfoo - .Lbar .Lfoo: @@ -6,14 +6,29 @@ .fill 126, 1, 0x90 .Lbar: -// CHECK: (('sh_name', 0x00000001) # '.text' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000006) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000040) -// CHECK-NEXT: ('sh_size', 0x0000000000000081) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000004) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', '817f7f90 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90909090 90') +// CHECK: Section { +// CHECK: Name: .text +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: SHF_EXECINSTR +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x40 +// CHECK-NEXT: Size: 129 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 4 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 817F7F90 90909090 90909090 90909090 +// CHECK-NEXT: 0010: 90909090 90909090 90909090 90909090 +// CHECK-NEXT: 0020: 90909090 90909090 90909090 90909090 +// CHECK-NEXT: 0030: 90909090 90909090 90909090 90909090 +// CHECK-NEXT: 0040: 90909090 90909090 90909090 90909090 +// CHECK-NEXT: 0050: 90909090 90909090 90909090 90909090 +// CHECK-NEXT: 0060: 90909090 90909090 90909090 90909090 +// CHECK-NEXT: 0070: 90909090 90909090 90909090 90909090 +// CHECK-NEXT: 0080: 90 +// CHECK-NEXT: ) +// CHECK-NEXT: } diff --git a/test/MC/ELF/local-reloc.s b/test/MC/ELF/local-reloc.s index b32a9cc..4241ba5 100644 --- a/test/MC/ELF/local-reloc.s +++ b/test/MC/ELF/local-reloc.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -r -t | FileCheck %s // Test that relocations with local symbols are represented as relocations // with the section. They should be equivalent, but gas behaves like this. @@ -6,26 +6,8 @@ movl foo, %r14d foo: -// Section number 1 is .text -// CHECK: # Section 1 -// CHECK-next: (('sh_name', 0x00000001) # '.text' - -// Relocation refers to symbol number 2 -// CHECK: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', -// CHECK-NEXT: ('r_addend', -// CHECK-NEXT: ), -// CHECK-NEXT: ]) - -// Symbol number 2 is section number 1 -// CHECK: # Symbol 2 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x3) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECKT: Relocations [ +// CHECK: Section (1) .text { +// CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_32S .text 0x{{[^ ]+}} +// CHECK-NEXT: } +// CHECK-NEXT: ] diff --git a/test/MC/ELF/many-sections-2.s b/test/MC/ELF/many-sections-2.s index f5a1a0e..789ebf3 100644 --- a/test/MC/ELF/many-sections-2.s +++ b/test/MC/ELF/many-sections-2.s @@ -1,5 +1,5 @@ // RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o %t -// RUN: llvm-readobj %t | FileCheck %s +// RUN: llvm-readobj -s %t | FileCheck %s // CHECK: symtab_shndx diff --git a/test/MC/ELF/merge.s b/test/MC/ELF/merge.s index 11a80ad..d34635a 100644 --- a/test/MC/ELF/merge.s +++ b/test/MC/ELF/merge.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -r | FileCheck %s // Test that PIC relocations with local symbols in a mergeable section are done // with a reference to the symbol. Not sure if this is a linker limitation, @@ -22,76 +22,13 @@ zed: .section bar,"ax",@progbits foo: -// Relocation 0 refers to symbol 1 -// CHECK: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', -// CHECK-NEXT: ('r_sym', 0x00000001) -// CHECK-NEXT: ('r_type', 0x00000002 -// CHECK-NEXT: ('r_addend', -// CHECK-NEXT: ), - -// Relocation 1 refers to symbol 6 -// CHECK-NEXT: # Relocation 1 -// CHECK-NEXT: (('r_offset', -// CHECK-NEXT: ('r_sym', 0x00000006) -// CHECK-NEXT: ('r_type', 0x0000000a) -// CHECK-NEXT: ('r_addend', -// CHECK-NEXT: ), - -// Relocation 2 refers to symbol 1 -// CHECK-NEXT: # Relocation 2 -// CHECK-NEXT: (('r_offset', -// CHECK-NEXT: ('r_sym', 0x00000001) -// CHECK-NEXT: ('r_type', 0x0000000a -// CHECK-NEXT: ('r_addend', -// CHECK-NEXT: ), - -// Relocation 3 refers to symbol 2 -// CHECK-NEXT: # Relocation 3 -// CHECK-NEXT: (('r_offset', -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x00000004 -// CHECK-NEXT: ('r_addend', -// CHECK-NEXT: ), - -// Relocation 4 refers to symbol 2 -// CHECK-NEXT: # Relocation 4 -// CHECK-NEXT: (('r_offset', -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x00000009 -// CHECK-NEXT: ('r_addend', -// CHECK-NEXT: ), - -// Relocation 5 refers to symbol 8 -// CHECK-NEXT: # Relocation 5 -// CHECK-NEXT: (('r_offset', 0x0000000000000023) -// CHECK-NEXT: ('r_sym', 0x00000008) -// CHECK-NEXT: ('r_type', 0x0000000b) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) - -// Section 5 is "sec1" -// CHECK: # Section 5 -// CHECK-NEXT: (('sh_name', 0x00000035) # '.sec1' - -// Symbol number 1 is .Lfoo -// CHECK: # Symbol 1 -// CHECK-NEXT: (('st_name', 0x00000001) # '.Lfoo' - -// Symbol number 2 is foo -// CHECK: # Symbol 2 -// CHECK-NEXT: (('st_name', 0x00000007) # 'foo' - -// Symbol number 6 is section 5 -// CHECK: # Symbol 6 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x3) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0005) - -// Symbol number 8 is zed -// CHECK: # Symbol 8 -// CHECK-NEXT: (('st_name', 0x0000000b) # 'zed' +// CHECK: Relocations [ +// CHECK-NEXT: Section (1) .text { +// CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_PC32 .Lfoo 0x{{[^ ]+}} +// CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_32 .sec1 0x{{[^ ]+}} +// CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_32 .Lfoo 0x{{[^ ]+}} +// CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_PLT32 foo 0x{{[^ ]+}} +// CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_GOTPCREL foo 0x{{[^ ]+}} +// CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_32S zed 0x{{[^ ]+}} +// CHECK-NEXT: } +// CHECK-NEXT: ] diff --git a/test/MC/ELF/n_bytes.s b/test/MC/ELF/n_bytes.s index de66322..e658de0 100644 --- a/test/MC/ELF/n_bytes.s +++ b/test/MC/ELF/n_bytes.s @@ -1,20 +1,30 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sd | FileCheck %s .2byte 42, 1, 2, 3 .4byte 42, 1, 2, 3 .8byte 42, 1, 2, 3 .int 42, 1, 2, 3 -// CHECK: # Section 1 -// CHECK-NEXT: (('sh_name', 0x00000001) # '.text' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000006) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000040) -// CHECK-NEXT: ('sh_size', 0x0000000000000048) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000004) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', '2a000100 02000300 2a000000 01000000 02000000 03000000 2a000000 00000000 01000000 00000000 02000000 00000000 03000000 00000000 2a000000 01000000 02000000 03000000') -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Index: 1 +// CHECK-NEXT: Name: .text +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: SHF_EXECINSTR +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x40 +// CHECK-NEXT: Size: 72 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 4 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 2A000100 02000300 2A000000 01000000 +// CHECK-NEXT: 0010: 02000000 03000000 2A000000 00000000 +// CHECK-NEXT: 0020: 01000000 00000000 02000000 00000000 +// CHECK-NEXT: 0030: 03000000 00000000 2A000000 01000000 +// CHECK-NEXT: 0040: 02000000 03000000 +// CHECK-NEXT: ) +// CHECK-NEXT: } diff --git a/test/MC/ELF/noexec.s b/test/MC/ELF/noexec.s index d8b7b32..33cb8ae 100644 --- a/test/MC/ELF/noexec.s +++ b/test/MC/ELF/noexec.s @@ -1,24 +1,26 @@ -// RUN: llvm-mc -mc-no-exec-stack -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -mc-no-exec-stack -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -t | FileCheck %s -// CHECK: # Section 4 -// CHECK-NEXT: (('sh_name', 0x0000000c) # '.note.GNU-stack' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000040) -// CHECK-NEXT: ('sh_size', 0x0000000000000000) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000001) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Index: 4 +// CHECK-NEXT: Name: .note.GNU-stack +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x40 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 1 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: } -// CHECK: # Symbol 4 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x3) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0004) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), +// CHECK: Symbol { +// CHECK: Name: .note.GNU-stack (0) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: Section +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .note.GNU-stack (0x4) +// CHECK-NEXT: } diff --git a/test/MC/ELF/norelocation.s b/test/MC/ELF/norelocation.s index c639479..1370382 100644 --- a/test/MC/ELF/norelocation.s +++ b/test/MC/ELF/norelocation.s @@ -1,18 +1,26 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sd -sr | FileCheck %s call bar bar: -// CHECK: ('sh_name', 0x00000001) # '.text' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000006) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000040) -// CHECK-NEXT: ('sh_size', 0x0000000000000005) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000004) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', 'e8000000 00') -// CHECK-NOT: .rela.text +// CHECK: Section { +// CHECK: Name: .text +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ (0x6) +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: SHF_EXECINSTR +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x40 +// CHECK-NEXT: Size: 5 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 4 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: ] +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: E8000000 00 +// CHECK-NEXT: ) +// CHECK-NEXT: } // CHECK: shstrtab diff --git a/test/MC/ELF/org.s b/test/MC/ELF/org.s index 3afc364..d878fa1 100644 --- a/test/MC/ELF/org.s +++ b/test/MC/ELF/org.s @@ -1,13 +1,15 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s | FileCheck %s .zero 4 foo: .zero 4 .org foo+16 -// CHECK: (('sh_name', 0x00000001) # '.text' -// CHECK-NEXT: ('sh_type', -// CHECK-NEXT: ('sh_flags', -// CHECK-NEXT: ('sh_addr', -// CHECK-NEXT: ('sh_offset' -// CHECK-NEXT: ('sh_size', 0x0000000000000014) +// CHECK: Section { +// CHECK: Name: .text +// CHECK-NEXT: Type: +// CHECK-NEXT: Flags [ +// CHECK: ] +// CHECK-NEXT: Address: +// CHECK-NEXT: Offset: +// CHECK-NEXT: Size: 20 diff --git a/test/MC/ELF/pic-diff.s b/test/MC/ELF/pic-diff.s index 2c68f6c..cffa0dd 100644 --- a/test/MC/ELF/pic-diff.s +++ b/test/MC/ELF/pic-diff.s @@ -1,23 +1,20 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -r -t | FileCheck %s -// CHECK: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x000000000000000c) -// CHECK-NEXT: ('r_sym', 0x00000005) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000008) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) +// CHECK: Relocations [ +// CHECK-NEXT: Section ({{[^ ]+}}) {{[^ ]+}} { +// CHECK-NEXT: 0xC R_X86_64_PC32 baz 0x8 +// CHECK-NEXT: } +// CHECK-NEXT: ] -// CHECK: # Symbol 5 -// CHECK-NEXT: (('st_name', 0x00000005) # 'baz' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), +// CHECK: Symbol { +// CHECK: Name: baz (5) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } .zero 4 .data diff --git a/test/MC/ELF/plt.s b/test/MC/ELF/plt.s index 7d78e23..604a4bf 100644 --- a/test/MC/ELF/plt.s +++ b/test/MC/ELF/plt.s @@ -1,14 +1,11 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -r | FileCheck %s // Test that this produces a R_X86_64_PLT32. jmp foo@PLT -// CHECK: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', -// CHECK-NEXT: ('r_sym', -// CHECK-NEXT: ('r_type', 0x00000004) -// CHECK-NEXT: ('r_addend', -// CHECK-NEXT: ), -// CHECK-NEXT: ]) +// CHECK: Relocations [ +// CHECK-NEXT: Section ({{[^ ]+}}) {{[^ ]+}} { +// CHECK-NEXT: 0x{{[^ ]+}} R_X86_64_PLT32 {{[^ ]+}} 0x{{[^ ]+}} +// CHECK-NEXT: } +// CHECK-NEXT: ] diff --git a/test/MC/ELF/pr9292.s b/test/MC/ELF/pr9292.s index 05f377f..a6e78dc 100644 --- a/test/MC/ELF/pr9292.s +++ b/test/MC/ELF/pr9292.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -t | FileCheck %s // Test that both foo and bar are undefined. @@ -7,20 +7,21 @@ mov %eax,bar -// CHECK: (('st_name', 0x00000005) # 'bar' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 5 -// CHECK-NEXT: (('st_name', 0x00000001) # 'foo' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), +// CHECK: Symbol { +// CHECK: Name: bar (5) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: foo (1) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } diff --git a/test/MC/ELF/relax-arith.s b/test/MC/ELF/relax-arith.s index 3236b41..b814556 100644 --- a/test/MC/ELF/relax-arith.s +++ b/test/MC/ELF/relax-arith.s @@ -1,11 +1,16 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sd | FileCheck %s // Test that we correctly relax these instructions into versions that use // 16 or 32 bit immediate values. bar: -// CHECK: 'imul' -// CHECK: ('_section_data', '6669db00 0066691c 25000000 00000069 db000000 00691c25 00000000 00000000 4869db00 00000048 691c2500 00000000 000000') +// CHECK: Name: imul +// CHECK: SectionData ( +// CHECK-NEXT: 0000: 6669DB00 0066691C 25000000 00000069 +// CHECK-NEXT: 0010: DB000000 00691C25 00000000 00000000 +// CHECK-NEXT: 0020: 4869DB00 00000048 691C2500 00000000 +// CHECK-NEXT: 0030: 000000 +// CHECK-NEXT: ) .section imul imul $foo, %bx, %bx imul $foo, bar, %bx @@ -14,8 +19,14 @@ bar: imul $foo, %rbx, %rbx imul $foo, bar, %rbx -// CHECK: and' -// CHECK:('_section_data', '6681e300 00668124 25000000 00000081 e3000000 00812425 00000000 00000000 4881e300 00000048 81242500 00000000 000000') + +// CHECK: Name: and +// CHECK: SectionData ( +// CHECK-NEXT: 0000: 6681E300 00668124 25000000 00000081 +// CHECK-NEXT: 0010: E3000000 00812425 00000000 00000000 +// CHECK-NEXT: 0020: 4881E300 00000048 81242500 00000000 +// CHECK-NEXT: 0030: 000000 +// CHECK-NEXT: ) .section and and $foo, %bx andw $foo, bar @@ -24,8 +35,13 @@ bar: and $foo, %rbx andq $foo, bar -// CHECK: 'or' -// CHECK: ('_section_data', '6681cb00 0066810c 25000000 00000081 cb000000 00810c25 00000000 00000000 4881cb00 00000048 810c2500 00000000 000000') +// CHECK: Name: or +// CHECK: SectionData ( +// CHECK-NEXT: 0000: 6681CB00 0066810C 25000000 00000081 +// CHECK-NEXT: 0010: CB000000 00810C25 00000000 00000000 +// CHECK-NEXT: 0020: 4881CB00 00000048 810C2500 00000000 +// CHECK-NEXT: 0030: 000000 +// CHECK-NEXT: ) .section or or $foo, %bx orw $foo, bar @@ -34,8 +50,13 @@ bar: or $foo, %rbx orq $foo, bar -// CHECK: 'xor' -// CHECK: ('_section_data', '6681f300 00668134 25000000 00000081 f3000000 00813425 00000000 00000000 4881f300 00000048 81342500 00000000 000000') +// CHECK: Name: xor +// CHECK: SectionData ( +// CHECK-NEXT: 0000: 6681F300 00668134 25000000 00000081 +// CHECK-NEXT: 0010: F3000000 00813425 00000000 00000000 +// CHECK-NEXT: 0020: 4881F300 00000048 81342500 00000000 +// CHECK-NEXT: 0030: 000000 +// CHECK-NEXT: ) .section xor xor $foo, %bx xorw $foo, bar @@ -44,8 +65,13 @@ bar: xor $foo, %rbx xorq $foo, bar -// CHECK: 'add' -// CHECK: ('_section_data', '6681c300 00668104 25000000 00000081 c3000000 00810425 00000000 00000000 4881c300 00000048 81042500 00000000 000000') +// CHECK: Name: add +// CHECK: SectionData ( +// CHECK-NEXT: 0000: 6681C300 00668104 25000000 00000081 +// CHECK-NEXT: 0010: C3000000 00810425 00000000 00000000 +// CHECK-NEXT: 0020: 4881C300 00000048 81042500 00000000 +// CHECK-NEXT: 0030: 000000 +// CHECK-NEXT: ) .section add add $foo, %bx addw $foo, bar @@ -54,8 +80,13 @@ bar: add $foo, %rbx addq $foo, bar -// CHECK: 'sub' -// CHECK: ('_section_data', '6681eb00 0066812c 25000000 00000081 eb000000 00812c25 00000000 00000000 4881eb00 00000048 812c2500 00000000 000000') +// CHECK: Name: sub +// CHECK: SectionData ( +// CHECK-NEXT: 000: 6681EB00 0066812C 25000000 00000081 +// CHECK-NEXT: 010: EB000000 00812C25 00000000 00000000 +// CHECK-NEXT: 020: 4881EB00 00000048 812C2500 00000000 +// CHECK-NEXT: 030: 000000 +// CHECK-NEXT: ) .section sub sub $foo, %bx subw $foo, bar @@ -64,8 +95,13 @@ bar: sub $foo, %rbx subq $foo, bar -// CHECK: 'cmp' -// CHECK: ('_section_data', '6681fb00 0066813c 25000000 00000081 fb000000 00813c25 00000000 00000000 4881fb00 00000048 813c2500 00000000 000000') +// CHECK: Name: cmp +// CHECK: SectionData ( +// CHECK-NEXT: 0000: 6681FB00 0066813C 25000000 00000081 +// CHECK-NEXT: 0010: FB000000 00813C25 00000000 00000000 +// CHECK-NEXT: 0020: 4881FB00 00000048 813C2500 00000000 +// CHECK-NEXT: 0030: 000000 +// CHECK-NEXT: ) .section cmp cmp $foo, %bx cmpw $foo, bar diff --git a/test/MC/ELF/relax.s b/test/MC/ELF/relax.s index 0b5d24f..49ee8e2 100644 --- a/test/MC/ELF/relax.s +++ b/test/MC/ELF/relax.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sd -t | FileCheck %s // Test that we do not relax these. @@ -11,17 +11,23 @@ foo: jmp foo jmp zed -// CHECK: ('sh_name', 0x00000001) # '.text' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000006) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000040) -// CHECK-NEXT: ('sh_size', 0x0000000000000006) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000004) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ('_section_data', 'ebfeebfc ebfa') - -// CHECK: # Symbol 6 -// CHECK-NEXT: (('st_name', 0x00000005) # 'foo' +// CHECK: Section { +// CHECK: Name: .text +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: SHF_EXECINSTR +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x40 +// CHECK-NEXT: Size: 6 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 4 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: EBFEEBFC EBFA +// CHECK-NEXT: ) +// CHECK-NEXT: } +// CHECK: Symbol { +// CHECK: Name: foo (5) diff --git a/test/MC/ELF/relocation-386.s b/test/MC/ELF/relocation-386.s index 85da2eb..24d0172 100644 --- a/test/MC/ELF/relocation-386.s +++ b/test/MC/ELF/relocation-386.s @@ -1,205 +1,86 @@ -// RUN: llvm-mc -filetype=obj -triple i386-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple i386-pc-linux-gnu %s -o - | llvm-readobj -r -t | FileCheck %s // Test that we produce the correct relocation types and that the relocations // correctly point to the section or the symbol. -// CHECK: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x00000002) -// CHECK-NEXT: ('r_sym', 0x000001) -// CHECK-NEXT: ('r_type', 0x09) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 1 -// CHECK-NEXT: (('r_offset', -// CHECK-NEXT: ('r_sym', -// CHECK-NEXT: ('r_type', 0x04) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 2 -// CHECK-NEXT: (('r_offset', -// CHECK-NEXT: ('r_sym', -// CHECK-NEXT: ('r_type', 0x0a) -// CHECK-NEXT: ), - +// CHECK: Relocations [ +// CHECK-NEXT: Section (1) .text { +// CHECK-NEXT: 0x2 R_386_GOTOFF .Lfoo 0x0 +// CHECK-NEXT: 0x{{[^ ]+}} R_386_PLT32 bar2 0x0 +// CHECK-NEXT: 0x{{[^ ]+}} R_386_GOTPC _GLOBAL_OFFSET_TABLE_ 0x0 // Relocation 3 (bar3@GOTOFF) is done with symbol 7 (bss) -// CHECK-NEXT: # Relocation 3 -// CHECK-NEXT: (('r_offset', -// CHECK-NEXT: ('r_sym', 0x000007 -// CHECK-NEXT: ('r_type', -// CHECK-NEXT: ), - +// CHECK-NEXT: 0x{{[^ ]+}} R_386_GOTOFF .bss 0x0 // Relocation 4 (bar2@GOT) is of type R_386_GOT32 -// CHECK-NEXT: # Relocation 4 -// CHECK-NEXT: (('r_offset', -// CHECK-NEXT: ('r_sym', -// CHECK-NEXT: ('r_type', 0x03 -// CHECK-NEXT: ), +// CHECK-NEXT: 0x{{[^ ]+}} R_386_GOT32 bar2j 0x0 // Relocation 5 (foo@TLSGD) is of type R_386_TLS_GD -// CHECK-NEXT: # Relocation 5 -// CHECK-NEXT: (('r_offset', 0x00000020) -// CHECK-NEXT: ('r_sym', 0x00000d) -// CHECK-NEXT: ('r_type', 0x12) -// CHECK-NEXT: ), - +// CHECK-NEXT: 0x20 R_386_TLS_GD foo 0x0 // Relocation 6 ($foo@TPOFF) is of type R_386_TLS_LE_32 -// CHECK-NEXT: # Relocation 6 -// CHECK-NEXT: (('r_offset', 0x00000025) -// CHECK-NEXT: ('r_sym', 0x00000d) -// CHECK-NEXT: ('r_type', 0x22) -// CHECK-NEXT: ), - +// CHECK-NEXT: 0x25 R_386_TLS_LE_32 foo 0x0 // Relocation 7 (foo@INDNTPOFF) is of type R_386_TLS_IE -// CHECK-NEXT: # Relocation 7 -// CHECK-NEXT: (('r_offset', 0x0000002b) -// CHECK-NEXT: ('r_sym', 0x00000d) -// CHECK-NEXT: ('r_type', 0x0f) -// CHECK-NEXT: ), - +// CHECK-NEXT: 0x2B R_386_TLS_IE foo 0x0 // Relocation 8 (foo@NTPOFF) is of type R_386_TLS_LE -// CHECK-NEXT: # Relocation 8 -// CHECK-NEXT: (('r_offset', 0x00000031) -// CHECK-NEXT: ('r_sym', 0x00000d) -// CHECK-NEXT: ('r_type', 0x11) -// CHECK-NEXT: ), - +// CHECK-NEXT: 0x31 R_386_TLS_LE foo 0x0 // Relocation 9 (foo@GOTNTPOFF) is of type R_386_TLS_GOTIE -// CHECK-NEXT: # Relocation 9 -// CHECK-NEXT: (('r_offset', 0x00000037) -// CHECK-NEXT: ('r_sym', 0x00000d) -// CHECK-NEXT: ('r_type', 0x10) -// CHECK-NEXT: ), - +// CHECK-NEXT: 0x37 R_386_TLS_GOTIE foo 0x0 // Relocation 10 (foo@TLSLDM) is of type R_386_TLS_LDM -// CHECK-NEXT: # Relocation 10 -// CHECK-NEXT: (('r_offset', 0x0000003d) -// CHECK-NEXT: ('r_sym', 0x00000d) -// CHECK-NEXT: ('r_type', 0x13) -// CHECK-NEXT: ), - +// CHECK-NEXT: 0x3D R_386_TLS_LDM foo 0x0 // Relocation 11 (foo@DTPOFF) is of type R_386_TLS_LDO_32 -// CHECK-NEXT: # Relocation 11 -// CHECK-NEXT: (('r_offset', 0x00000043) -// CHECK-NEXT: ('r_sym', 0x00000d) -// CHECK-NEXT: ('r_type', 0x20) -// CHECK-NEXT: ), +// CHECK-NEXT: 0x43 R_386_TLS_LDO_32 foo 0x0 // Relocation 12 (calll 4096) is of type R_386_PC32 -// CHECK-NEXT: # Relocation 12 -// CHECK-NEXT: (('r_offset', 0x00000048) -// CHECK-NEXT: ('r_sym', 0x000000) -// CHECK-NEXT: ('r_type', 0x02) -// CHECK-NEXT: ), +// CHECK-NEXT: 0x48 R_386_PC32 - 0x0 // Relocation 13 (zed@GOT) is of type R_386_GOT32 and uses the symbol -// CHECK-NEXT: # Relocation 13 -// CHECK-NEXT: (('r_offset', 0x0000004e) -// CHECK-NEXT: ('r_sym', 0x000004) -// CHECK-NEXT: ('r_type', 0x03) -// CHECK-NEXT: ), +// CHECK-NEXT: 0x4E R_386_GOT32 zed 0x0 // Relocation 14 (zed@GOTOFF) is of type R_386_GOTOFF and uses the symbol -// CHECK-NEXT: # Relocation 14 -// CHECK-NEXT: (('r_offset', 0x00000054) -// CHECK-NEXT: ('r_sym', 0x000004) -// CHECK-NEXT: ('r_type', 0x09) -// CHECK-NEXT: ), +// CHECK-NEXT: 0x54 R_386_GOTOFF zed 0x0 // Relocation 15 (zed@INDNTPOFF) is of type R_386_TLS_IE and uses the symbol -// CHECK-NEXT: # Relocation 15 -// CHECK-NEXT: (('r_offset', 0x0000005a) -// CHECK-NEXT: ('r_sym', 0x000004) -// CHECK-NEXT: ('r_type', 0x0f) -// CHECK-NEXT: ), +// CHECK-NEXT: 0x5A R_386_TLS_IE zed 0x0 // Relocation 16 (zed@NTPOFF) is of type R_386_TLS_LE and uses the symbol -// CHECK-NEXT: # Relocation 16 -// CHECK-NEXT: (('r_offset', 0x00000060) -// CHECK-NEXT: ('r_sym', 0x000004) -// CHECK-NEXT: ('r_type', 0x11) -// CHECK-NEXT: ), +// CHECK-NEXT: 0x60 R_386_TLS_LE zed 0x0 // Relocation 17 (zed@GOTNTPOFF) is of type R_386_TLS_GOTIE and uses the symbol -// CHECK-NEXT: # Relocation 17 -// CHECK-NEXT: (('r_offset', 0x00000066) -// CHECK-NEXT: ('r_sym', 0x000004) -// CHECK-NEXT: ('r_type', 0x10) -// CHECK-NEXT: ), +// CHECK-NEXT: 0x66 R_386_TLS_GOTIE zed 0x0 // Relocation 18 (zed@PLT) is of type R_386_PLT32 and uses the symbol -// CHECK-NEXT: # Relocation 18 -// CHECK-NEXT: (('r_offset', 0x0000006b) -// CHECK-NEXT: ('r_sym', 0x000004) -// CHECK-NEXT: ('r_type', 0x04) -// CHECK-NEXT: ), +// CHECK-NEXT: 0x6B R_386_PLT32 zed 0x0 // Relocation 19 (zed@TLSGD) is of type R_386_TLS_GD and uses the symbol -// CHECK-NEXT: # Relocation 19 -// CHECK-NEXT: (('r_offset', 0x00000071) -// CHECK-NEXT: ('r_sym', 0x000004) -// CHECK-NEXT: ('r_type', 0x12) -// CHECK-NEXT: ), +// CHECK-NEXT: 0x71 R_386_TLS_GD zed 0x0 // Relocation 20 (zed@TLSLDM) is of type R_386_TLS_LDM and uses the symbol -// CHECK-NEXT: # Relocation 20 -// CHECK-NEXT: (('r_offset', 0x00000077) -// CHECK-NEXT: ('r_sym', 0x000004) -// CHECK-NEXT: ('r_type', 0x13) -// CHECK-NEXT: ), +// CHECK-NEXT: 0x77 R_386_TLS_LDM zed 0x0 // Relocation 21 (zed@TPOFF) is of type R_386_TLS_LE_32 and uses the symbol -// CHECK-NEXT:# Relocation 21 -// CHECK-NEXT: (('r_offset', 0x0000007d) -// CHECK-NEXT: ('r_sym', 0x000004) -// CHECK-NEXT: ('r_type', 0x22) -// CHECK-NEXT: ), +// CHECK-NEXT: 0x7D R_386_TLS_LE_32 zed 0x0 // Relocation 22 (zed@DTPOFF) is of type R_386_TLS_LDO_32 and uses the symbol -// CHECK-NEXT: Relocation 22 -// CHECK-NEXT: (('r_offset', 0x00000083) -// CHECK-NEXT: ('r_sym', 0x000004) -// CHECK-NEXT: ('r_type', 0x20) -// CHECK-NEXT: ), +// CHECK-NEXT: 0x83 R_386_TLS_LDO_32 zed 0x0 // Relocation 23 ($bar) is of type R_386_32 and uses the section -// CHECK-NEXT: Relocation 23 -// CHECK-NEXT: (('r_offset', -// CHECK-NEXT: ('r_sym', -// CHECK-NEXT: ('r_type', 0x01) -// CHECK-NEXT: ), +// CHECK-NEXT: 0x{{[^ ]+}} R_386_32 .text 0x0 // Relocation 24 (foo@GOTTPOFF(%edx)) is of type R_386_TLS_IE_32 and uses the // symbol -// CHECK-NEXT: Relocation 24 -// CHECK-NEXT: (('r_offset', 0x0000008e) -// CHECK-NEXT: ('r_sym', 0x00000d) -// CHECK-NEXT: ('r_type', 0x21) -// CHECK-NEXT: ), +// CHECK-NEXT: 0x8E R_386_TLS_IE_32 foo 0x0 // Relocation 25 (_GLOBAL_OFFSET_TABLE_-bar2) is of type R_386_GOTPC. -// CHECK-NEXT: Relocation 25 -// CHECK-NEXT: (('r_offset', 0x00000094) -// CHECK-NEXT: ('r_sym', 0x00000b) -// CHECK-NEXT: ('r_type', 0x0a) -// CHECK-NEXT: ), +// CHECK-NEXT: 0x94 R_386_GOTPC _GLOBAL_OFFSET_TABLE_ 0x0 // Relocation 26 (und_symbol-bar2) is of type R_386_PC32 -// CHECK-NEXT: Relocation 26 -// CHECK-NEXT: (('r_offset', 0x0000009a) -// CHECK-NEXT: ('r_sym', 0x00000e) -// CHECK-NEXT: ('r_type', 0x02) -// CHECK-NEXT: ), - -// Section 4 is bss -// CHECK: # Section 4 -// CHECK-NEXT: (('sh_name', 0x0000000b) # '.bss' - -// CHECK: # Symbol 1 -// CHECK-NEXT: (('st_name', 0x00000005) # '.Lfoo' +// CHECK-NEXT: 0x9A R_386_PC32 und_symbol 0x0 +// CHECK-NEXT: } +// CHECK-NEXT: ] // Symbol 4 is zed -// CHECK: # Symbol 4 -// CHECK-NEXT: (('st_name', 0x00000035) # 'zed' -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x6) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0005) - +// CHECK: Symbol { +// CHECK: Name: zed (53) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: zedsec (0x5) +// CHECK-NEXT: } // Symbol 7 is section 4 -// CHECK: # Symbol 7 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x3) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0004) - +// CHECK: Symbol { +// CHECK: Name: .bss (0) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: Section +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .bss (0x4) +// CHECK-NEXT: } .text bar: diff --git a/test/MC/ELF/relocation-pc.s b/test/MC/ELF/relocation-pc.s index b6279c3..551f5ff 100644 --- a/test/MC/ELF/relocation-pc.s +++ b/test/MC/ELF/relocation-pc.s @@ -1,33 +1,32 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sr | FileCheck %s // Test that we produce the correct relocation. loope 0 # R_X86_64_PC8 jmp -256 # R_X86_64_PC32 -// CHECK: # Section 2 -// CHECK-NEXT: (('sh_name', 0x00000001) # '.rela.text' -// CHECK-NEXT: ('sh_type', 0x00000004) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x00000000000002e8) -// CHECK-NEXT: ('sh_size', 0x0000000000000030) -// CHECK-NEXT: ('sh_link', 0x00000006) -// CHECK-NEXT: ('sh_info', 0x00000001) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000008) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000018) -// CHECK-NEXT: ('_relocations', [ -// CHECK-NEXT: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000001) -// CHECK-NEXT: ('r_sym', 0x00000000) -// CHECK-NEXT: ('r_type', 0x0000000f) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 1 -// CHECK-NEXT: (('r_offset', 0x0000000000000003) -// CHECK-NEXT: ('r_sym', 0x00000000) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Index: 1 +// CHECK-NEXT: Name: .text +// CHECK: Relocations [ +// CHECK-NEXT: 0x1 R_X86_64_PC8 - 0x0 +// CHECK-NEXT: 0x3 R_X86_64_PC32 - 0x0 +// CHECK-NEXT: ] +// CHECK-NEXT: } + +// CHECK: Section { +// CHECK: Index: 2 +// CHECK-NEXT: Name: .rela.text +// CHECK-NEXT: Type: SHT_RELA +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x2E8 +// CHECK-NEXT: Size: 48 +// CHECK-NEXT: Link: 6 +// CHECK-NEXT: Info: 1 +// CHECK-NEXT: AddressAlignment: 8 +// CHECK-NEXT: EntrySize: 24 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: ] +// CHECK-NEXT: } diff --git a/test/MC/ELF/relocation.s b/test/MC/ELF/relocation.s index 5db213b..19bcc18 100644 --- a/test/MC/ELF/relocation.s +++ b/test/MC/ELF/relocation.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sr -t | FileCheck %s // Test that we produce the correct relocation. @@ -20,102 +20,33 @@ bar: addq $bar,%rax # R_X86_64_32S -// CHECK: # Section 1 -// CHECK: (('sh_name', 0x00000006) # '.text' - -// CHECK: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000001) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x0000000a) -// CHECK-NEXT: ('r_addend', - -// CHECK: # Relocation 1 -// CHECK-NEXT: (('r_offset', 0x0000000000000008) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x0000000b) -// CHECK-NEXT: ('r_addend', - -// CHECK: # Relocation 2 -// CHECK-NEXT: (('r_offset', 0x0000000000000013) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x0000000b) -// CHECK-NEXT: ('r_addend', - -// CHECK: # Relocation 3 -// CHECK-NEXT: (('r_offset', 0x000000000000001a) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x0000000b) -// CHECK-NEXT: ('r_addend', - -// CHECK: # Relocation 4 -// CHECK-NEXT: (('r_offset', 0x0000000000000022) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x0000000b) -// CHECK-NEXT: ('r_addend', - -// CHECK: # Relocation 5 -// CHECK-NEXT: (('r_offset', 0x0000000000000026) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x0000000a) -// CHECK-NEXT: ('r_addend', - -// CHECK: # Relocation 6 -// CHECK-NEXT: (('r_offset', 0x000000000000002d) -// CHECK-NEXT: ('r_sym', 0x00000006) -// CHECK-NEXT: ('r_type', 0x00000016) -// CHECK-NEXT: ('r_addend', 0xfffffffffffffffc) - -// CHECK: # Relocation 7 -// CHECK-NEXT: (('r_offset', 0x0000000000000034) -// CHECK-NEXT: ('r_sym', 0x00000006) -// CHECK-NEXT: ('r_type', 0x00000013) -// CHECK-NEXT: ('r_addend', 0xfffffffffffffffc) - -// CHECK: # Relocation 8 -// CHECK-NEXT: (('r_offset', 0x000000000000003b) -// CHECK-NEXT: ('r_sym', 0x00000006) -// CHECK-NEXT: ('r_type', 0x00000017) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) - -// CHECK: # Relocation 9 -// CHECK-NEXT: (('r_offset', 0x0000000000000042) -// CHECK-NEXT: ('r_sym', 0x00000006) -// CHECK-NEXT: ('r_type', 0x00000014) -// CHECK-NEXT: ('r_addend', 0xfffffffffffffffc) - -// CHECK: # Relocation 10 -// CHECK-NEXT: (('r_offset', 0x0000000000000049) -// CHECK-NEXT: ('r_sym', 0x00000006) -// CHECK-NEXT: ('r_type', 0x00000015) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) - -// CHECK: # Relocation 11 -// CHECK-NEXT: (('r_offset', 0x000000000000004e) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x0000000b) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) - -// CHECK: # Relocation 12 -// CHECK-NEXT: (('r_offset', 0x0000000000000055) -// CHECK-NEXT: ('r_sym', 0x00000006) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0xfffffffffffffffc) - -// CHECK: # Relocation 13 -// CHECK-NEXT: (('r_offset', 0x000000000000005c) -// CHECK-NEXT: ('r_sym', 0x00000006) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0x000000000000005c) - -// CHECK: # Relocation 14 -// CHECK-NEXT: (('r_offset', 0x0000000000000063) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x0000000b) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) - -// CHECK: # Symbol 2 -// CHECK: (('st_name', 0x00000000) # '' -// CHECK: ('st_bind', 0x0) -// CHECK: ('st_type', 0x3) -// CHECK: ('st_other', 0x00) -// CHECK: ('st_shndx', 0x0001) +// CHECK: Section { +// CHECK: Name: .text +// CHECK: Relocations [ +// CHECK-NEXT: 0x1 R_X86_64_32 .text +// CHECK-NEXT: 0x8 R_X86_64_32S .text +// CHECK-NEXT: 0x13 R_X86_64_32S .text +// CHECK-NEXT: 0x1A R_X86_64_32S .text +// CHECK-NEXT: 0x22 R_X86_64_32S .text +// CHECK-NEXT: 0x26 R_X86_64_32 .text +// CHECK-NEXT: 0x2D R_X86_64_GOTTPOFF foo 0xFFFFFFFFFFFFFFFC +// CHECK-NEXT: 0x34 R_X86_64_TLSGD foo 0xFFFFFFFFFFFFFFFC +// CHECK-NEXT: 0x3B R_X86_64_TPOFF32 foo 0x0 +// CHECK-NEXT: 0x42 R_X86_64_TLSLD foo 0xFFFFFFFFFFFFFFFC +// CHECK-NEXT: 0x49 R_X86_64_DTPOFF32 foo 0x0 +// CHECK-NEXT: 0x4E R_X86_64_32S .text 0x0 +// CHECK-NEXT: 0x55 R_X86_64_PC32 foo 0xFFFFFFFFFFFFFFFC +// CHECK-NEXT: 0x5C R_X86_64_PC32 foo 0x5C +// CHECK-NEXT: 0x63 R_X86_64_32S .text 0x0 +// CHECK-NEXT: ] +// CHECK-NEXT: } + +// CHECK: Symbol { +// CHECK: Name: .text (0) +// CHECK-NEXT: Value: +// CHECK-NEXT: Size: +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: Section +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } diff --git a/test/MC/ELF/rename.s b/test/MC/ELF/rename.s index 241aa05..c50910b 100644 --- a/test/MC/ELF/rename.s +++ b/test/MC/ELF/rename.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sr -t | FileCheck %s // When doing a rename, all the checks for where the relocation should go // should be performed with the original symbol. Only if we decide to relocate @@ -16,31 +16,33 @@ defined3: .global defined1 // Section 1 is .text -// CHECK: # Section 1 -// CHECK-NEXT: (('sh_name', 0x00000006) # '.text' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000006) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000040) -// CHECK-NEXT: ('sh_size', 0x0000000000000004) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000004) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) - -// The relocation uses symbol 2 -// CHECK: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000000) -// CHECK-NEXT: ('r_sym', 0x00000002) -// CHECK-NEXT: ('r_type', 0x0000000a) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) +// CHECK: Section { +// CHECK: Index: 1 +// CHECK-NEXT: Name: .text +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: SHF_EXECINSTR +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x40 +// CHECK-NEXT: Size: 4 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 4 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: Relocations [ +// CHECK-NEXT: 0x0 R_X86_64_32 .text 0x0 +// CHECK-NEXT: ] +// CHECK-NEXT: } // Symbol 2 is section 1 -// CHECK: # Symbol 2 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x3) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) +// CHECK: Symbol { +// CHECK: Name: .text (0) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: Section +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } diff --git a/test/MC/ELF/section.s b/test/MC/ELF/section.s index c71e1a7..a679403 100644 --- a/test/MC/ELF/section.s +++ b/test/MC/ELF/section.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s | FileCheck %s // Test that these names are accepted. @@ -7,10 +7,10 @@ .section .note.GNU-,"",@progbits .section -.note.GNU,"",@progbits -// CHECK: ('sh_name', 0x00000038) # '.note.GNU-stack' -// CHECK: ('sh_name', 0x0000008f) # '.note.GNU-stack2' -// CHECK: ('sh_name', 0x000000a0) # '.note.GNU-' -// CHECK: ('sh_name', 0x00000084) # '-.note.GNU' +// CHECK: Name: .note.GNU-stack (56) +// CHECK: Name: .note.GNU-stack2 (143) +// CHECK: Name: .note.GNU- (160) +// CHECK: Name: -.note.GNU (132) // Test that the defaults are used @@ -19,66 +19,81 @@ .section .rodata .section zed, "" -// CHECK: (('sh_name', 0x00000012) # '.init' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000006) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000050) -// CHECK-NEXT: ('sh_size', 0x0000000000000000) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000001) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Section 11 -// CHECK-NEXT: (('sh_name', 0x00000048) # '.fini' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000006) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000050) -// CHECK-NEXT: ('sh_size', 0x0000000000000000) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000001) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Section 12 -// CHECK-NEXT: (('sh_name', 0x00000076) # '.rodata' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000002) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000050) -// CHECK-NEXT: ('sh_size', 0x0000000000000000) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000001) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Section 13 -// CHECK-NEXT: (('sh_name', 0x00000058) # 'zed' -// CHECK-NEXT: ('sh_type', 0x00000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000050) -// CHECK-NEXT: ('sh_size', 0x0000000000000000) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000001) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Name: .init +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: SHF_EXECINSTR +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x50 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 1 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: } +// CHECK-NEXT: Section { +// CHECK-NEXT: Index: 11 +// CHECK-NEXT: Name: .fini +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: SHF_EXECINSTR +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x50 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 1 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: } +// CHECK-NEXT: Section { +// CHECK-NEXT: Index: 12 +// CHECK-NEXT: Name: .rodata +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x50 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 1 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: } +// CHECK-NEXT: Section { +// CHECK-NEXT: Index: 13 +// CHECK-NEXT: Name: zed +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x50 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 1 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: } .section .note.test,"",@note -// CHECK: (('sh_name', 0x00000007) # '.note.test' -// CHECK-NEXT: ('sh_type', 0x00000007) -// CHECK-NEXT: ('sh_flags', 0x0000000000000000) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000050) -// CHECK-NEXT: ('sh_size', 0x0000000000000000) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000001) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Name: .note.test +// CHECK-NEXT: Type: SHT_NOTE +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x50 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 1 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: } // Test that we can parse these foo: @@ -90,21 +105,26 @@ bar: .section .eh_frame,"a",@unwind -// CHECK: (('sh_name', 0x0000004e) # '.eh_frame' -// CHECK-NEXT: ('sh_type', 0x70000001) -// CHECK-NEXT: ('sh_flags', 0x0000000000000002) -// CHECK-NEXT: ('sh_addr', 0x0000000000000000) -// CHECK-NEXT: ('sh_offset', 0x0000000000000050) -// CHECK-NEXT: ('sh_size', 0x0000000000000000) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x0000000000000001) -// CHECK-NEXT: ('sh_entsize', 0x0000000000000000) -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Name: .eh_frame +// CHECK-NEXT: Type: SHT_X86_64_UNWIND +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x50 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 1 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: } // Test that we handle the strings like gas .section bar-"foo" .section "foo" -// CHECK: ('sh_name', 0x000000ab) # 'bar-"foo"' -// CHECK: ('sh_name', 0x00000034) # 'foo' +// CHECK: Section { +// CHECK: Name: bar-"foo" (171) +// CHECK: Section { +// CHECK: Name: foo (52) diff --git a/test/MC/ELF/set.s b/test/MC/ELF/set.s index 2258b19..f6965a5 100644 --- a/test/MC/ELF/set.s +++ b/test/MC/ELF/set.s @@ -1,17 +1,18 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -t | FileCheck %s // Test that we emit the correct value. .set kernbase,0xffffffff80000000 -// CHECK: (('st_name', 0x00000001) # 'kernbase' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0xfff1) -// CHECK-NEXT: ('st_value', 0xffffffff80000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), +// CHECK: Symbol { +// CHECK: Name: kernbase (1) +// CHECK-NEXT: Value: 0xFFFFFFFF80000000 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0xFFF1) +// CHECK-NEXT: } // Test that we accept .set of a symbol after it has been used in a statement. @@ -24,11 +25,12 @@ .set foo2,bar2 // Test that there is an undefined reference to bar -// CHECK: (('st_name', 0x0000000a) # 'bar' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), +// CHECK: Symbol { +// CHECK: Name: bar (10) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } diff --git a/test/MC/ELF/sleb.s b/test/MC/ELF/sleb.s index 00e5b4b..5cba582 100644 --- a/test/MC/ELF/sleb.s +++ b/test/MC/ELF/sleb.s @@ -1,5 +1,5 @@ -// RUN: llvm-mc -filetype=obj -triple i686-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=ELF_32 %s -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=ELF_64 %s +// RUN: llvm-mc -filetype=obj -triple i686-pc-linux-gnu %s -o - | llvm-readobj -s -sd | FileCheck -check-prefix=ELF_32 %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sd | FileCheck -check-prefix=ELF_64 %s // RUN: llvm-mc -filetype=obj -triple i386-apple-darwin9 %s -o - | macho-dump --dump-section-data | FileCheck -check-prefix=MACHO_32 %s // RUN: llvm-mc -filetype=obj -triple x86_64-apple-darwin9 %s -o - | macho-dump --dump-section-data | FileCheck -check-prefix=MACHO_64 %s @@ -19,10 +19,14 @@ foo: .sleb128 8193 -// ELF_32: ('sh_name', 0x00000001) # '.text' -// ELF_32: ('_section_data', '00017f3f 40c000bf 7fff3f80 4081c000') -// ELF_64: ('sh_name', 0x00000001) # '.text' -// ELF_64: ('_section_data', '00017f3f 40c000bf 7fff3f80 4081c000') +// ELF_32: Name: .text +// ELF_32: SectionData ( +// ELF_32: 0000: 00017F3F 40C000BF 7FFF3F80 4081C000 +// ELF_32: ) +// ELF_64: Name: .text +// ELF_64: SectionData ( +// ELF_64: 0000: 00017F3F 40C000BF 7FFF3F80 4081C000 +// ELF_64: ) // MACHO_32: ('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') // MACHO_32: ('_section_data', '00017f3f 40c000bf 7fff3f80 4081c000') // MACHO_64: ('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') diff --git a/test/MC/ELF/subsection.s b/test/MC/ELF/subsection.s new file mode 100644 index 0000000..d437cac --- /dev/null +++ b/test/MC/ELF/subsection.s @@ -0,0 +1,37 @@ +// RUN: llvm-mc -filetype=obj %s -o - -triple x86_64-pc-linux | llvm-objdump -s - | FileCheck %s + +// CHECK: Contents of section .text: +// CHECK-NEXT: 0000 03042502 00000003 04250100 0000ebf7 +.text 1 +add 1, %eax +jmp label +.subsection +add 2, %eax +label: + +// CHECK-NOT: Contents of section .rela.text: + +// CHECK: Contents of section .data: +// CHECK-NEXT: 0000 01030402 74657374 +.data +l0: +.byte 1 +.subsection 1+1 +l1: +.byte 2 +l2: +.subsection l2-l1 +.byte l1-l0 +.subsection 3 +.ascii "test" +.previous +.byte 4 + +// CHECK: Contents of section test: +// CHECK-NEXT: 0000 010302 +.section test +.byte 1 +.pushsection test, 1 +.byte 2 +.popsection +.byte 3 diff --git a/test/MC/ELF/symref.s b/test/MC/ELF/symref.s index 2dfa058..9a71a81 100644 --- a/test/MC/ELF/symref.s +++ b/test/MC/ELF/symref.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -r -t | FileCheck %s defined1: defined2: @@ -21,145 +21,122 @@ defined3: .symver global1, g1@@zed global1: +// CHECK: Relocations [ +// CHECK-NEXT: Section (1) .text { +// CHECK-NEXT: 0x0 R_X86_64_32 .text 0x0 +// CHECK-NEXT: 0x4 R_X86_64_32 bar2@zed 0x0 +// CHECK-NEXT: 0x8 R_X86_64_32 .text 0x0 +// CHECK-NEXT: 0xC R_X86_64_32 .text 0x0 +// CHECK-NEXT: 0x10 R_X86_64_32 bar6@zed 0x0 +// CHECK-NEXT: } +// CHECK-NEXT: ] -// CHECK: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000000) -// CHECK-NEXT: ('r_sym', 0x00000006) -// CHECK-NEXT: ('r_type', 0x0000000a) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 1 -// CHECK-NEXT: (('r_offset', 0x0000000000000004) -// CHECK-NEXT: ('r_sym', 0x0000000b) -// CHECK-NEXT: ('r_type', 0x0000000a) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 2 -// CHECK-NEXT: (('r_offset', 0x0000000000000008) -// CHECK-NEXT: ('r_sym', 0x00000006) -// CHECK-NEXT: ('r_type', 0x0000000a) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 3 -// CHECK-NEXT: (('r_offset', 0x000000000000000c) -// CHECK-NEXT: ('r_sym', 0x00000006) -// CHECK-NEXT: ('r_type', 0x0000000a) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 4 -// CHECK-NEXT: (('r_offset', 0x0000000000000010) -// CHECK-NEXT: ('r_sym', 0x0000000c) -// CHECK-NEXT: ('r_type', 0x0000000a) -// CHECK-NEXT: ('r_addend', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT:]) - -// CHECK: # Symbol 1 -// CHECK-NEXT: (('st_name', 0x00000013) # 'bar1@zed' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 2 -// CHECK-NEXT: (('st_name', 0x00000025) # 'bar3@@zed' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 3 -// CHECK-NEXT: (('st_name', 0x0000002f) # 'bar5@@zed' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 4 -// CHECK-NEXT: (('st_name', 0x00000001) # 'defined1' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 5 -// CHECK-NEXT: (('st_name', 0x0000000a) # 'defined2' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 6 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x3) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 7 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x3) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0003) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 8 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x3) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0004) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 9 -// CHECK-NEXT: (('st_name', 0x0000004a) # 'g1@@zed' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000014) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 10 -// CHECK-NEXT: (('st_name', 0x00000042) # 'global1' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000014) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 11 -// CHECK-NEXT: (('st_name', 0x0000001c) # 'bar2@zed' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 12 -// CHECK-NEXT: (('st_name', 0x00000039) # 'bar6@zed' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT:]) +// CHECK: Symbol { +// CHECK: Name: bar1@zed (19) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: bar3@@zed (37) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: bar5@@zed (47) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: defined1 (1) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: defined2 (10) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: .text (0) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: Section +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: .data (0) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: Section +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .data (0x3) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: .bss (0) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: Section +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .bss (0x4) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: g1@@zed (74) +// CHECK-NEXT: Value: 0x14 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: global1 (66) +// CHECK-NEXT: Value: 0x14 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: bar2@zed (28) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: bar6@zed (57) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: ] diff --git a/test/MC/ELF/tls-i386.s b/test/MC/ELF/tls-i386.s index 922d4c6..267046e 100644 --- a/test/MC/ELF/tls-i386.s +++ b/test/MC/ELF/tls-i386.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple i386-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple i386-pc-linux-gnu %s -o - | llvm-readobj -t | FileCheck %s // Test that all symbols are of type STT_TLS. @@ -17,129 +17,129 @@ .long fooD@DTPOFF .long fooE@INDNTPOFF -// CHECK: (('st_name', 0x00000001) # 'foo1' -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x6) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 6 -// CHECK-NEXT: (('st_name', 0x00000006) # 'foo2' -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x6) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 7 -// CHECK-NEXT: (('st_name', 0x0000000b) # 'foo3' -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x6) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 8 -// CHECK-NEXT: (('st_name', 0x00000010) # 'foo4' -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x6) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 9 -// CHECK-NEXT: (('st_name', 0x00000015) # 'foo5' -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x6) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 10 -// CHECK-NEXT: (('st_name', 0x0000001a) # 'foo6' -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x6) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 11 -// CHECK-NEXT: (('st_name', 0x0000001f) # 'foo7' -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x6) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 12 -// CHECK-NEXT: (('st_name', 0x00000024) # 'foo8' -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x6) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 13 -// CHECK-NEXT: (('st_name', 0x00000029) # 'foo9' -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x6) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 14 -// CHECK-NEXT: (('st_name', 0x0000002e) # 'fooA' -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x6) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 15 -// CHECK-NEXT: (('st_name', 0x00000033) # 'fooB' -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x6) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 16 -// CHECK-NEXT: (('st_name', 0x00000038) # 'fooC' -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x6) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 17 -// CHECK-NEXT: (('st_name', 0x0000003d) # 'fooD' -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x6) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 18 -// CHECK-NEXT: (('st_name', 0x00000042) # 'fooE' -// CHECK-NEXT: ('st_value', 0x00000000) -// CHECK-NEXT: ('st_size', 0x00000000) -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x6) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ), - +// CHECK: Symbol { +// CHECK: Name: foo1 (1) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: foo2 (6) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: foo3 (11) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: foo4 (16) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: foo5 (21) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: foo6 (26) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: foo7 (31) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: foo8 (36) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: foo9 (41) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: fooA (46) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: fooB (51) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: fooC (56) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: fooD (61) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: fooE (66) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } diff --git a/test/MC/ELF/tls.s b/test/MC/ELF/tls.s index fe2bb4e..c71e396 100644 --- a/test/MC/ELF/tls.s +++ b/test/MC/ELF/tls.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -t | FileCheck %s // Test that all symbols are of type STT_TLS. @@ -12,66 +12,67 @@ foobar: .long 43 -// CHECK: (('st_name', 0x0000001f) # 'foobar' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x6) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0005) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), +// CHECK: Symbol { +// CHECK: Name: foobar (31) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .zed (0x5) +// CHECK-NEXT: } -// CHECK: # Symbol 7 -// CHECK-NEXT: (('st_name', 0x00000001) # 'foo1' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x6) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 8 -// CHECK-NEXT: (('st_name', 0x00000006) # 'foo2' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x6) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 9 -// CHECK-NEXT: (('st_name', 0x0000000b) # 'foo3' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x6) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 10 -// CHECK-NEXT: (('st_name', 0x00000010) # 'foo4' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x6) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 11 -// CHECK-NEXT: (('st_name', 0x00000015) # 'foo5' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x6) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 12 -// CHECK-NEXT: (('st_name', 0x0000001a) # 'foo6' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x6) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), +// CHECK: Symbol { +// CHECK: Name: foo1 (1) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: foo2 (6) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: foo3 (11) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: foo4 (16) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: foo5 (21) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: foo6 (26) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } diff --git a/test/MC/ELF/type.s b/test/MC/ELF/type.s index ec53e4f..a5b9812 100644 --- a/test/MC/ELF/type.s +++ b/test/MC/ELF/type.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -t | FileCheck %s // Test that both % and @ are accepted. .global foo @@ -12,35 +12,76 @@ bar: // Test that gnu_unique_object is accepted. .type zed,@gnu_unique_object +obj: + .global obj + .type obj,@object + .type obj,@notype + +func: + .global func + .type func,@function + .type func,@object + ifunc: .global ifunc .type ifunc,@gnu_indirect_function -// CHECK: # Symbol 4 -// CHECK-NEXT: (('st_name', 0x00000005) # 'bar' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x1) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 5 -// CHECK-NEXT: (('st_name', 0x00000001) # 'foo' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x2) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 6 -// CHECK-NEXT: (('st_name', 0x00000009) # 'ifunc' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0xa) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), +tls: + .global tls + .type tls,@tls_object + .type tls,@gnu_indirect_function +// CHECK: Symbol { +// CHECK: Name: bar +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: Object +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: foo +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: Function +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: func +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: Function +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: ifunc +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: GNU_IFunc +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: obj +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: Object +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: tls +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: TLS +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } diff --git a/test/MC/ELF/uleb.s b/test/MC/ELF/uleb.s index 1e4734b..d755cc2 100644 --- a/test/MC/ELF/uleb.s +++ b/test/MC/ELF/uleb.s @@ -1,5 +1,5 @@ -// RUN: llvm-mc -filetype=obj -triple i686-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=ELF_32 %s -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=ELF_64 %s +// RUN: llvm-mc -filetype=obj -triple i686-pc-linux-gnu %s -o - | llvm-readobj -s -sd | FileCheck -check-prefix=ELF_32 %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sd | FileCheck -check-prefix=ELF_64 %s // RUN: llvm-mc -filetype=obj -triple i386-apple-darwin9 %s -o - | macho-dump --dump-section-data | FileCheck -check-prefix=MACHO_32 %s // RUN: llvm-mc -filetype=obj -triple x86_64-apple-darwin9 %s -o - | macho-dump --dump-section-data | FileCheck -check-prefix=MACHO_64 %s @@ -12,10 +12,14 @@ foo: .uleb128 16383 .uleb128 16384 -// ELF_32: ('sh_name', 0x00000001) # '.text' -// ELF_32: ('_section_data', '00017f80 01ff7f80 8001') -// ELF_64: ('sh_name', 0x00000001) # '.text' -// ELF_64: ('_section_data', '00017f80 01ff7f80 8001') +// ELF_32: Name: .text +// ELF_32: SectionData ( +// ELF_32: 0000: 00017F80 01FF7F80 8001 +// ELF_32: ) +// ELF_64: Name: .text +// ELF_64: SectionData ( +// ELF_64: 0000: 00017F80 01FF7F80 8001 +// ELF_64: ) // MACHO_32: ('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') // MACHO_32: ('_section_data', '00017f80 01ff7f80 8001') // MACHO_64: ('section_name', '__text\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00') diff --git a/test/MC/ELF/undef.s b/test/MC/ELF/undef.s index e377c63..0d89fb1 100644 --- a/test/MC/ELF/undef.s +++ b/test/MC/ELF/undef.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -t | FileCheck %s // Test which symbols should be in the symbol table @@ -19,28 +19,21 @@ .text movsd .Lsym8(%rip), %xmm1 -// CHECK: ('_symbols', [ -// CHECK-NEXT: # Symbol 0 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK: # Symbol 1 -// CHECK-NEXT: (('st_name', 0x0000000d) # '.Lsym8' -// CHECK: # Symbol 2 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK: # Symbol 3 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK: # Symbol 4 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK: # Symbol 5 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK: # Symbol 6 -// CHECK-NEXT: (('st_name', 0x00000001) # '.Lsym1' -// CHECK: # Symbol 7 -// CHECK-NEXT: (('st_name', 0x00000008) # 'sym6' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x1) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) +// CHECK: Symbols [ + +// CHECK: Symbol { +// CHECK: Name: .Lsym8 + +// CHECK: Symbol { +// CHECK: Name: .Lsym1 + +// CHECK: Symbol { +// CHECK: Name: sym6 +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: Object +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: ] diff --git a/test/MC/ELF/undef2.s b/test/MC/ELF/undef2.s index 6f971c5..6aa66c0 100644 --- a/test/MC/ELF/undef2.s +++ b/test/MC/ELF/undef2.s @@ -1,10 +1,18 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -t | FileCheck %s // Test that this produces an undefined reference to .Lfoo je .Lfoo -// CHECK: ('_symbols', [ -// CHECK: (('st_name', 0x00000001) # '.Lfoo' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK: (('sh_name', 0x0000001b) # '.strtab' +// CHECK: Section { +// CHECK: Name: .strtab + +// CHECK: Symbol { +// CHECK: Name: .Lfoo +// CHECK-NEXT: Value: +// CHECK-NEXT: Size: +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: +// CHECK-NEXT: Other: +// CHECK-NEXT: Section: +// CHECK-NEXT: } diff --git a/test/MC/ELF/version.s b/test/MC/ELF/version.s index 31e952a..0bc9c8b 100644 --- a/test/MC/ELF/version.s +++ b/test/MC/ELF/version.s @@ -1,17 +1,23 @@ -// RUN: llvm-mc -filetype=obj -triple i386-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple i386-pc-linux-gnu %s -o - | llvm-readobj -s -sd | FileCheck %s .version "1234" .version "123" -// CHECK: (('sh_name', 0x0000000c) # '.note' -// CHECK-NEXT: ('sh_type', 0x00000007) -// CHECK-NEXT: ('sh_flags', 0x00000000) -// CHECK-NEXT: ('sh_addr', 0x00000000) -// CHECK-NEXT: ('sh_offset', 0x00000034) -// CHECK-NEXT: ('sh_size', 0x00000024) -// CHECK-NEXT: ('sh_link', 0x00000000) -// CHECK-NEXT: ('sh_info', 0x00000000) -// CHECK-NEXT: ('sh_addralign', 0x00000004) -// CHECK-NEXT: ('sh_entsize', 0x00000000) -// CHECK-NEXT: ('_section_data', '05000000 00000000 01000000 31323334 00000000 04000000 00000000 01000000 31323300') -// CHECK-NEXT: ), +// CHECK: Section { +// CHECK: Name: .note +// CHECK-NEXT: Type: SHT_NOTE +// CHECK-NEXT: Flags [ +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x34 +// CHECK-NEXT: Size: 36 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 4 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 05000000 00000000 01000000 31323334 +// CHECK-NEXT: 0010: 00000000 04000000 00000000 01000000 +// CHECK-NEXT: 0020: 31323300 +// CHECK-NEXT: ) +// CHECK-NEXT: } diff --git a/test/MC/ELF/weak-relocation.s b/test/MC/ELF/weak-relocation.s index 88e841e..0f5bba2 100644 --- a/test/MC/ELF/weak-relocation.s +++ b/test/MC/ELF/weak-relocation.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -r | FileCheck %s // Test that weak symbols always produce relocations @@ -7,9 +7,8 @@ foo: bar: call foo -//CHECK: # Relocation 0 -//CHECK-NEXT: (('r_offset', 0x0000000000000001) -//CHECK-NEXT: ('r_sym', 0x00000005) -//CHECK-NEXT: ('r_type', 0x00000002) -//CHECK-NEXT: ('r_addend', 0xfffffffffffffffc) -//CHECK-NEXT: ), +// CHECK: Relocations [ +// CHECK-NEXT: Section ({{[0-9]+}}) .text { +// CHECK-NEXT: 0x1 R_X86_64_PC32 foo 0xFFFFFFFFFFFFFFFC +// CHECK-NEXT: } +// CHECK-NEXT: ] diff --git a/test/MC/ELF/weak.s b/test/MC/ELF/weak.s index 07a8391..2ed3eb7 100644 --- a/test/MC/ELF/weak.s +++ b/test/MC/ELF/weak.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -t | FileCheck %s // Test that this produces a weak undefined symbol. @@ -9,22 +9,22 @@ .weak bar bar: -//CHECK: # Symbol 4 -//CHECK-NEXT: (('st_name', 0x00000005) # 'bar' -//CHECK-NEXT: ('st_bind', 0x2) -//CHECK-NEXT: ('st_type', 0x0) -//CHECK-NEXT: ('st_other', 0x00) -//CHECK-NEXT: ('st_shndx', 0x0001) -//CHECK-NEXT: ('st_value', 0x0000000000000004) -//CHECK-NEXT: ('st_size', 0x0000000000000000) -//CHECK-NEXT: ), -//CHECK-NEXT: # Symbol 5 -//CHECK: (('st_name', 0x00000001) # 'foo' -//CHECK-NEXT: ('st_bind', 0x2) -//CHECK-NEXT: ('st_type', 0x0) -//CHECK-NEXT: ('st_other', 0x00) -//CHECK-NEXT: ('st_shndx', 0x0000) -//CHECK-NEXT: ('st_value', 0x0000000000000000) -//CHECK-NEXT: ('st_size', 0x0000000000000000) -//CHECK-NEXT: ), -//CHECK-NEXT: ]) +// CHECK: Symbol { +// CHECK: Name: bar +// CHECK-NEXT: Value: 0x4 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Weak +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text +// CHECK-NEXT: } +// CHECK: Symbol { +// CHECK: Name: foo +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Weak +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: ] diff --git a/test/MC/ELF/weakref-plt.s b/test/MC/ELF/weakref-plt.s index 2e50093..d6486dc 100644 --- a/test/MC/ELF/weakref-plt.s +++ b/test/MC/ELF/weakref-plt.s @@ -1,8 +1,14 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -t | FileCheck %s .weakref bar,foo call bar@PLT -// CHECK: # Symbol 5 -// CHECK-NEXT: (('st_name', 0x00000001) # 'foo' -// CHECK-NEXT: ('st_bind', 0x2) +// CHECK: Symbol { +// CHECK: Name: foo +// CHECK-NEXT: Value: +// CHECK-NEXT: Size: +// CHECK-NEXT: Binding: Weak +// CHECK-NEXT: Type: +// CHECK-NEXT: Other: +// CHECK-NEXT: Section: +// CHECK-NEXT: } diff --git a/test/MC/ELF/weakref-reloc.s b/test/MC/ELF/weakref-reloc.s index 4bbf264..48bda87 100644 --- a/test/MC/ELF/weakref-reloc.s +++ b/test/MC/ELF/weakref-reloc.s @@ -1,49 +1,44 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -r -t | FileCheck %s // Test that the relocations point to the correct symbols. We used to get the // symbol index wrong for weakrefs when creating _GLOBAL_OFFSET_TABLE_. - .weakref bar,foo + .weakref bar,foo call zed@PLT - call bar + call bar -// CHECK: # Relocation 0 -// CHECK-NEXT: (('r_offset', 0x0000000000000001) -// CHECK-NEXT: ('r_sym', 0x00000006) -// CHECK-NEXT: ('r_type', 0x00000004) -// CHECK-NEXT: ('r_addend', 0xfffffffffffffffc) -// CHECK-NEXT: ), -// CHECK-NEXT: # Relocation 1 -// CHECK-NEXT: (('r_offset', 0x0000000000000006) -// CHECK-NEXT: ('r_sym', 0x00000005) -// CHECK-NEXT: ('r_type', 0x00000002) -// CHECK-NEXT: ('r_addend', 0xfffffffffffffffc) -// CHECK-NEXT: ), +// CHECK: Relocations [ +// CHECK-NEXT: Section ({{[0-9]+}}) {{[^ ]+}} { +// CHECK-NEXT: 0x1 R_X86_64_PLT32 zed 0xFFFFFFFFFFFFFFFC +// CHECK-NEXT: 0x6 R_X86_64_PC32 foo 0xFFFFFFFFFFFFFFFC +// CHECK-NEXT: } +// CHECK-NEXT: ] -// CHECK: # Symbol 4 -// CHECK-NEXT: (('st_name', 0x00000009) # '_GLOBAL_OFFSET_TABLE_' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 5 -// CHECK-NEXT: (('st_name', 0x00000001) # 'foo' -// CHECK-NEXT: ('st_bind', 0x2) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 6 -// CHECK-NEXT: (('st_name', 0x00000005) # 'zed' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), +// CHECK: Symbols [ +// CHECK: Symbol { +// CHECK: Name: _GLOBAL_OFFSET_TABLE_ (9) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: foo (1) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Weak +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: zed (5) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } diff --git a/test/MC/ELF/weakref.s b/test/MC/ELF/weakref.s index e12d2c7..8717364 100644 --- a/test/MC/ELF/weakref.s +++ b/test/MC/ELF/weakref.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -t | FileCheck %s // This is a long test that checks that the aliases created by weakref are // never in the symbol table and that the only case it causes a symbol to @@ -69,166 +69,158 @@ bar15: .long bar15 .long foo15 -// CHECK: # Symbol 0 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 1 -// CHECK-NEXT: (('st_name', 0x00000015) # 'bar6' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000018) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 2 -// CHECK-NEXT: (('st_name', 0x0000001a) # 'bar7' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000018) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 3 -// CHECK-NEXT: (('st_name', 0x0000001f) # 'bar8' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x000000000000001c) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 4 -// CHECK-NEXT: (('st_name', 0x00000024) # 'bar9' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000020) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 5 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x3) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 6 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x3) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0003) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 7 -// CHECK-NEXT: (('st_name', 0x00000000) # '' -// CHECK-NEXT: ('st_bind', 0x0) -// CHECK-NEXT: ('st_type', 0x3) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0004) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 8 -// CHECK-NEXT: (('st_name', 0x00000029) # 'bar10' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000028) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 9 -// CHECK-NEXT: (('st_name', 0x0000002f) # 'bar11' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000030) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 10 -// CHECK-NEXT: (('st_name', 0x00000035) # 'bar12' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000030) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 11 -// CHECK-NEXT: (('st_name', 0x0000003b) # 'bar13' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000034) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 12 -// CHECK-NEXT: (('st_name', 0x00000041) # 'bar14' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000038) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 13 -// CHECK-NEXT: (('st_name', 0x00000047) # 'bar15' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0001) -// CHECK-NEXT: ('st_value', 0x0000000000000040) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 14 -// CHECK-NEXT: (('st_name', 0x00000001) # 'bar2' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 15 -// CHECK-NEXT: (('st_name', 0x00000006) # 'bar3' -// CHECK-NEXT: ('st_bind', 0x2) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 16 -// CHECK-NEXT: (('st_name', 0x0000000b) # 'bar4' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: # Symbol 17 -// CHECK-NEXT: (('st_name', 0x00000010) # 'bar5' -// CHECK-NEXT: ('st_bind', 0x1) -// CHECK-NEXT: ('st_type', 0x0) -// CHECK-NEXT: ('st_other', 0x00) -// CHECK-NEXT: ('st_shndx', 0x0000) -// CHECK-NEXT: ('st_value', 0x0000000000000000) -// CHECK-NEXT: ('st_size', 0x0000000000000000) -// CHECK-NEXT: ), -// CHECK-NEXT: ]) +// CHECK: Symbols [ +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: bar6 (21) +// CHECK-NEXT: Value: 0x18 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: bar7 (26) +// CHECK-NEXT: Value: 0x18 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: bar8 (31) +// CHECK-NEXT: Value: 0x1C +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: bar9 (36) +// CHECK-NEXT: Value: 0x20 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: .text (0) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: Section +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: .data (0) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: Section +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .data (0x3) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: .bss (0) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Local +// CHECK-NEXT: Type: Section +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .bss (0x4) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: bar10 (41) +// CHECK-NEXT: Value: 0x28 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: bar11 (47) +// CHECK-NEXT: Value: 0x30 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: bar12 (53) +// CHECK-NEXT: Value: 0x30 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: bar13 (59) +// CHECK-NEXT: Value: 0x34 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: bar14 (65) +// CHECK-NEXT: Value: 0x38 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: bar15 (71) +// CHECK-NEXT: Value: 0x40 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: .text (0x1) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: bar2 (1) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: bar3 (6) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Weak +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: bar4 (11) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: Symbol { +// CHECK-NEXT: Name: bar5 (16) +// CHECK-NEXT: Value: 0x0 +// CHECK-NEXT: Size: 0 +// CHECK-NEXT: Binding: Global +// CHECK-NEXT: Type: None +// CHECK-NEXT: Other: 0 +// CHECK-NEXT: Section: (0x0) +// CHECK-NEXT: } +// CHECK-NEXT: ] diff --git a/test/MC/ELF/x86_64-reloc-sizetest.s b/test/MC/ELF/x86_64-reloc-sizetest.s index acca2f5..bd67ee0 100644 --- a/test/MC/ELF/x86_64-reloc-sizetest.s +++ b/test/MC/ELF/x86_64-reloc-sizetest.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple x86_64-linux-gnu -filetype=obj %s | elf-dump | FileCheck %s +// RUN: llvm-mc -triple x86_64-linux-gnu -filetype=obj %s | llvm-readobj -r | FileCheck %s // Tests that relocation value fits in the provided size // Original bug http://llvm.org/bugs/show_bug.cgi?id=10568 @@ -6,8 +6,8 @@ L: movq $(L + 2147483648),%rax -// CHECK: Relocation 0 -// CHECK-NEXT: ('r_offset', 0x0000000000000003) -// CHECK-NEXT: ('r_sym' -// CHECK-NEXT: ('r_type', 0x0000000b) -// CHECK-NEXT: ('r_addend', 0x0000000080000000 +// CHECK: Relocations [ +// CHECK-NEXT: Section ({{[0-9]+}}) .text { +// CHECK-NEXT: 0x3 R_X86_64_32S {{[^ ]+}} 0x80000000 +// CHECK-NEXT: } +// CHECK-NEXT: ] diff --git a/test/MC/ELF/zero.s b/test/MC/ELF/zero.s index 46ffe17..be92eb8 100644 --- a/test/MC/ELF/zero.s +++ b/test/MC/ELF/zero.s @@ -1,16 +1,23 @@ -// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | elf-dump --dump-section-data | FileCheck %s +// RUN: llvm-mc -filetype=obj -triple x86_64-pc-linux-gnu %s -o - | llvm-readobj -s -sd | FileCheck %s .zero 4 .zero 1,42 -// CHECK: ('sh_name', 0x00000001) # '.text' -// CHECK: ('sh_type', 0x00000001) -// CHECK: ('sh_flags', 0x0000000000000006) -// CHECK: ('sh_addr', 0x0000000000000000) -// CHECK: ('sh_offset', 0x0000000000000040) -// CHECK: ('sh_size', 0x0000000000000005) -// CHECK: ('sh_link', 0x00000000) -// CHECK: ('sh_info', 0x00000000) -// CHECK: ('sh_addralign', 0x0000000000000004) -// CHECK: ('sh_entsize', 0x0000000000000000) -// CHECK: ('_section_data', '00000000 2a') +// CHECK: Section { +// CHECK: Name: .text +// CHECK-NEXT: Type: SHT_PROGBITS +// CHECK-NEXT: Flags [ +// CHECK-NEXT: SHF_ALLOC +// CHECK-NEXT: SHF_EXECINSTR +// CHECK-NEXT: ] +// CHECK-NEXT: Address: 0x0 +// CHECK-NEXT: Offset: 0x40 +// CHECK-NEXT: Size: 5 +// CHECK-NEXT: Link: 0 +// CHECK-NEXT: Info: 0 +// CHECK-NEXT: AddressAlignment: 4 +// CHECK-NEXT: EntrySize: 0 +// CHECK-NEXT: SectionData ( +// CHECK-NEXT: 0000: 00000000 2A +// CHECK-NEXT: ) +// CHECK-NEXT: } diff --git a/test/MC/Mips/ef_frame.ll b/test/MC/Mips/ef_frame.ll deleted file mode 100644 index 91c8b43..0000000 --- a/test/MC/Mips/ef_frame.ll +++ /dev/null @@ -1,52 +0,0 @@ -; This tests .eh_frame CIE descriptor for the. -; Data alignment factor - -; RUN: llc -filetype=obj -mcpu=mips64r2 -mattr=n64 -march=mips64el %s -o - \ -; RUN: | llvm-objdump -s - | FileCheck %s - -; N64 -; CHECK: Contents of section .eh_frame: -; CHECK-NEXT: 0000 1c000000 00000000 017a504c 52000178 .........zPLR..x -; CHECK-NEXT: 0010 1f0b0000 00000000 00000000 000c1d00 ................ -; CHECK-NEXT: 0020 2c000000 24000000 00000000 00000000 ,...$........... -; CHECK-NEXT: 0030 7c000000 00000000 08000000 00000000 |............... -; CHECK-NEXT: 0040 00440e10 489f019c 02000000 00000000 .D..H........... - -; ModuleID = 'simple_throw.cpp' - -@_ZTIi = external constant i8* -@str = private unnamed_addr constant [7 x i8] c"All ok\00" - -define i32 @main() { -entry: - %exception.i = tail call i8* @__cxa_allocate_exception(i64 4) nounwind - %0 = bitcast i8* %exception.i to i32* - store i32 5, i32* %0, align 4 - invoke void @__cxa_throw(i8* %exception.i, i8* bitcast (i8** @_ZTIi to i8*), i8* null) noreturn - to label %.noexc unwind label %return - -.noexc: ; preds = %entry - unreachable - -return: ; preds = %entry - %1 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) - catch i8* null - %2 = extractvalue { i8*, i32 } %1, 0 - %3 = tail call i8* @__cxa_begin_catch(i8* %2) nounwind - %puts = tail call i32 @puts(i8* getelementptr inbounds ([7 x i8]* @str, i64 0, i64 0)) - tail call void @__cxa_end_catch() - ret i32 0 -} - -declare i32 @__gxx_personality_v0(...) - -declare i8* @__cxa_begin_catch(i8*) - -declare void @__cxa_end_catch() - -declare i8* @__cxa_allocate_exception(i64) - -declare void @__cxa_throw(i8*, i8*, i8*) - -declare i32 @puts(i8* nocapture) nounwind - diff --git a/test/MC/Mips/eh-frame.s b/test/MC/Mips/eh-frame.s new file mode 100644 index 0000000..93ff0b8 --- /dev/null +++ b/test/MC/Mips/eh-frame.s @@ -0,0 +1,167 @@ +// Test the bits of .eh_frame on mips that are already implemented correctly. + +// FIXME: This test would be a lot cleaner if llvm-objdump had the +// --dwarf=frames option. + +// RUN: llvm-mc -filetype=obj %s -o %t.o -arch=mips +// RUN: llvm-objdump -r -s %t.o | FileCheck --check-prefix=MIPS32 %s + +// RUN: llvm-mc -filetype=obj %s -o %t.o -arch=mipsel +// RUN: llvm-objdump -r -s %t.o | FileCheck --check-prefix=MIPS32EL %s + +// RUN: llvm-mc -filetype=obj %s -o %t.o -arch=mips64 +// RUN: llvm-objdump -r -s %t.o | FileCheck --check-prefix=MIPS64 %s + +// RUN: llvm-mc -filetype=obj %s -o %t.o -arch=mips64el +// RUN: llvm-objdump -r -s %t.o | FileCheck --check-prefix=MIPS64EL %s + +func: + .cfi_startproc + .cfi_endproc + +// MIPS32: RELOCATION RECORDS FOR [.eh_frame]: +// MIPS32-NEXT: R_MIPS_32 +// MIPS32: Contents of section .eh_frame: +// MIPS32-NEXT: 0000 + +// Length +// MIPS32: 00000010 + +// CIE ID +// MIPS32: 00000000 + +// Version +// MIPS32: 01 + +// Augmentation String +// MIPS32: 7a5200 + +// Code Alignment Factor +// MIPS32: 01 + +// Data Alignment Factor (-4) +// MIPS32: 7c + +// Return Address Register +// MIPS32: 1f + +// Augmentation Size +// MIPS32: 01 + +// MIPS32: .........zR..|.. +// MIPS32-NEXT: 0010 + +// Augmentation (fde pointer encoding: DW_EH_PE_sdata4) +// MIPS32: 0b +// FIXME: The instructions are different from the ones produces by gas. + +// MIPS32EL: RELOCATION RECORDS FOR [.eh_frame]: +// MIPS32EL-NEXT: R_MIPS_32 +// MIPS32EL: Contents of section .eh_frame: +// MIPS32EL-NEXT: 0000 + +// Length +// MIPS32EL: 10000000 + +// CIE ID +// MIPS32EL: 00000000 + +// Version +// MIPS32EL: 01 + +// Augmentation String +// MIPS32EL: 7a5200 + +// Code Alignment Factor +// MIPS32EL: 01 + +// Data Alignment Factor (-4) +// MIPS32EL: 7c + +// Return Address Register +// MIPS32EL: 1f + +// Augmentation Size +// MIPS32EL: 01 + +// MIPS32EL: .........zR..|.. +// MIPS32EL-NEXT: 0010 + +// Augmentation (fde pointer encoding: DW_EH_PE_sdata4) +// MIPS32EL: 0b +// FIXME: The instructions are different from the ones produces by gas. + +// MIPS64: RELOCATION RECORDS FOR [.eh_frame]: +// MIPS64-NEXT: R_MIPS_64 +// MIPS64: Contents of section .eh_frame: +// MIPS64-NEXT: 0000 + +// Length +// MIPS64: 00000010 + +// CIE ID +// MIPS64: 00000000 + +// Version +// MIPS64: 01 + +// Augmentation String +// MIPS64: 7a5200 + +// Code Alignment Factor +// MIPS64: 01 + +// Data Alignment Factor (-8). GAS uses -4. Should be ok as long as all +// offsets we need are a multiple of 8. +// MIPS64: 78 + +// Return Address Register +// MIPS64: 1f + +// Augmentation Size +// MIPS64: 01 + +// MIPS64: .........zR..x.. +// MIPS64-NEXT: 0010 + +// Augmentation (fde pointer encoding: DW_EH_PE_sdata8) +// MIPS64: 0c +// FIXME: The instructions are different from the ones produces by gas. + + +// MIPS64EL: RELOCATION RECORDS FOR [.eh_frame]: +// MIPS64EL-NEXT: R_MIPS_64 +// MIPS64EL: Contents of section .eh_frame: +// MIPS64EL-NEXT: 0000 + +// Length +// MIPS64EL: 10000000 + +// CIE ID +// MIPS64EL: 00000000 + +// Version +// MIPS64EL: 01 + +// Augmentation String +// MIPS64EL: 7a5200 + +// Code Alignment Factor +// MIPS64EL: 01 + +// Data Alignment Factor (-8). GAS uses -4. Should be ok as long as all +// offsets we need are a multiple of 8. +// MIPS64EL: 78 + +// Return Address Register +// MIPS64EL: 1f + +// Augmentation Size +// MIPS64EL: 01 + +// MIPS64EL: .........zR..x.. +// MIPS64EL-NEXT: 0010 + +// Augmentation (fde pointer encoding: DW_EH_PE_sdata8) +// MIPS64EL: 0c +// FIXME: The instructions are different from the ones produces by gas. diff --git a/test/MC/Mips/elf-N64.ll b/test/MC/Mips/elf-N64.ll index ae6de78..a1ea34a 100644 --- a/test/MC/Mips/elf-N64.ll +++ b/test/MC/Mips/elf-N64.ll @@ -1,4 +1,4 @@ -; RUN: llc -filetype=obj -march=mips64el -mcpu=mips64 -disable-mips-delay-filler %s -o - | elf-dump --dump-section-data | FileCheck %s +; RUN: llc -filetype=obj -march=mips64el -mcpu=mips64 -disable-mips-delay-filler %s -o - | llvm-readobj -r | FileCheck %s ; Check for N64 relocation production. ; @@ -12,25 +12,12 @@ define i32 @main() nounwind { entry: ; Check that the appropriate relocations were created. -; R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16 -; CHECK: ('r_type3', 0x05) -; CHECK-NEXT: ('r_type2', 0x18) -; CHECK-NEXT: ('r_type', 0x07) - -; R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16 -; CHECK: ('r_type3', 0x06) -; CHECK-NEXT: ('r_type2', 0x18) -; CHECK-NEXT: ('r_type', 0x07) - -; R_MIPS_GOT_OFST/R_MIPS_NONE/R_MIPS_NONE -; CHECK: ('r_type3', 0x00) -; CHECK-NEXT: ('r_type2', 0x00) -; CHECK-NEXT: ('r_type', 0x14) - -; R_MIPS_GOT_OFST/R_MIPS_NONE/R_MIPS_NONE -; CHECK: ('r_type3', 0x00) -; CHECK-NEXT: ('r_type2', 0x00) -; CHECK-NEXT: ('r_type', 0x15) +; CHECK: Relocations [ +; CHECK: 0x{{[0-9,A-F]+}} R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16 +; CHECK: 0x{{[0-9,A-F]+}} R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16 +; CHECK: 0x{{[0-9,A-F]+}} R_MIPS_GOT_PAGE/R_MIPS_NONE/R_MIPS_NONE +; CHECK: 0x{{[0-9,A-F]+}} R_MIPS_GOT_OFST/R_MIPS_NONE/R_MIPS_NONE +; CHECK: ] %puts = tail call i32 @puts(i8* getelementptr inbounds ([12 x i8]* @str, i64 0, i64 0)) ret i32 0 diff --git a/test/MC/Mips/elf-bigendian.ll b/test/MC/Mips/elf-bigendian.ll index 7111deb..a92fe33 100644 --- a/test/MC/Mips/elf-bigendian.ll +++ b/test/MC/Mips/elf-bigendian.ll @@ -1,24 +1,37 @@ -; DISABLE: llc -filetype=obj -mtriple mips-unknown-linux %s -o - | elf-dump --dump-section-data | FileCheck %s +; DISABLE: llc -filetype=obj -mtriple mips-unknown-linux %s -o - | llvm-readobj -h -s -sd | FileCheck %s ; RUN: false ; XFAIL: * ; Check that this is big endian. -; CHECK: ('e_indent[EI_DATA]', 0x02) +; CHECK: ElfHeader { +; CHECK: Ident { +; CHECK: DataEncoding: BigEndian +; CHECK: } +; CHECK: } ; Make sure that a section table (text) entry is correct. -; CHECK: (('sh_name', 0x{{[0]*}}5) # '.text' -; CHECK-NEXT: ('sh_type', 0x{{[0]*}}1) -; CHECK-NEXT: ('sh_flags', 0x{{[0]*}}6) -; CHECK-NEXT: ('sh_addr', 0x{{[0-9,a-f]+}}) -; CHECK-NEXT: ('sh_offset', 0x{{[0-9,a-f]+}}) -; CHECK-NEXT: ('sh_size', 0x{{[0-9,a-f]+}}) -; CHECK-NEXT: ('sh_link', 0x{{[0]+}}) -; CHECK-NEXT: ('sh_info', 0x{{[0]+}}) -; CHECK-NEXT: ('sh_addralign', 0x{{[0]*}}4) -; CHECK-NEXT: ('sh_entsize', 0x{{[0]+}}) +; CHECK: Sections [ +; CHECK: Section { +; CHECK: Index: +; CHECK: Name: .text +; CHECK-NEXT: Type: SHT_PROGBITS +; CHECK-NEXT: Flags [ (0x6) +; CHECK-NEXT: SHF_ALLOC +; CHECK-NEXT: SHF_EXECINSTR +; CHECK-NEXT: ] +; CHECK-NEXT: Address: 0x{{[0-9,A-F]+}} +; CHECK-NEXT: Offset: 0x{{[0-9,A-F]+}} +; CHECK-NEXT: Size: {{[0-9]+}} +; CHECK-NEXT: Link: 0 +; CHECK-NEXT: Info: 0 +; CHECK-NEXT: AddressAlignment: 4 +; CHECK-NEXT: EntrySize: 0 ; See that at least first 3 instructions are correct: GP prologue -; CHECK-NEXT: ('_section_data', '3c1c0000 279c0000 0399e021 {{[0-9,a-f, ]*}}') +; CHECK-NEXT: SectionData ( +; CHECK-NEXT: 0000: 3C1C0000 279C0000 0399E021 {{[0-9,A-F, ]*}} +; CHECK: ) +; CHECK: } ; ModuleID = '../br1.c' target datalayout = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32" diff --git a/test/MC/Mips/elf-gprel-32-64.ll b/test/MC/Mips/elf-gprel-32-64.ll index b946822..47003fa 100644 --- a/test/MC/Mips/elf-gprel-32-64.ll +++ b/test/MC/Mips/elf-gprel-32-64.ll @@ -1,5 +1,5 @@ ; RUN: llc -filetype=obj -march=mips64el -mcpu=mips64 %s -o - \ -; RUN: | elf-dump --dump-section-data \ +; RUN: | llvm-readobj -r \ ; RUN: | FileCheck %s define i32 @test(i32 %c) nounwind { @@ -30,8 +30,11 @@ return: ; Check that the appropriate relocations were created. ; R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE -; CHECK: (('sh_name', 0x{{[a-z0-9]+}}) # '.rela.rodata' -; CHECK: ('r_type3', 0x00) -; CHECK-NEXT: ('r_type2', 0x12) -; CHECK-NEXT: ('r_type', 0x0c) - +; CHECK: Relocations [ +; CHECK: Section ({{[a-z0-9]+}}) .rodata { +; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE +; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE +; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE +; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_MIPS_GPREL32/R_MIPS_64/R_MIPS_NONE +; CHECK-NEXT: } +; CHECK-NEXT: ] diff --git a/test/MC/Mips/elf-reginfo.ll b/test/MC/Mips/elf-reginfo.ll index 1d7a188..a255af9 100644 --- a/test/MC/Mips/elf-reginfo.ll +++ b/test/MC/Mips/elf-reginfo.ll @@ -1,7 +1,7 @@ ; RUN: llc -filetype=obj -march=mips64el -mcpu=mips64 %s -o - \ - ; RUN: | elf-dump --dump-section-data | FileCheck --check-prefix=CHECK_64 %s + ; RUN: | llvm-readobj -s | FileCheck --check-prefix=CHECK_64 %s ; RUN: llc -filetype=obj -march=mipsel -mcpu=mips32 %s -o - \ - ; RUN: | elf-dump --dump-section-data | FileCheck --check-prefix=CHECK_32 %s + ; RUN: | llvm-readobj -s | FileCheck --check-prefix=CHECK_32 %s ; Check for register information sections. ; @@ -13,14 +13,18 @@ entry: ; Check that the appropriate relocations were created. ; check for .MIPS.options -; CHECK_64: (('sh_name', 0x{{[0-9|a-f]+}}) # '.MIPS.options' -; CHECK_64-NEXT: ('sh_type', 0x7000000d) -; CHECK_64-NEXT: ('sh_flags', 0x0000000008000002) +; CHECK_64: Sections [ +; CHECK_64: Section { +; CHECK_64: Name: .MIPS.options +; CHECK_64-NEXT: Type: SHT_MIPS_OPTIONS +; CHECK_64-NEXT: Flags [ (0x8000002) ; check for .reginfo -; CHECK_32: (('sh_name', 0x{{[0-9|a-f]+}}) # '.reginfo' -; CHECK_32-NEXT: ('sh_type', 0x70000006) -; CHECK_32-NEXT: ('sh_flags', 0x00000002) +; CHECK_32: Sections [ +; CHECK_32: Section { +; CHECK_32: Name: .reginfo +; CHECK_32-NEXT: Type: SHT_MIPS_REGINFO +; CHECK_32-NEXT: Flags [ (0x2) %puts = tail call i32 @puts(i8* getelementptr inbounds ([12 x i8]* @str, i64 0, i64 0)) @@ -28,4 +32,3 @@ entry: } declare i32 @puts(i8* nocapture) nounwind - diff --git a/test/MC/Mips/elf-relsym.ll b/test/MC/Mips/elf-relsym.ll index 0f74437..6da9262 100644 --- a/test/MC/Mips/elf-relsym.ll +++ b/test/MC/Mips/elf-relsym.ll @@ -1,11 +1,21 @@ -; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux %s -o - | elf-dump --dump-section-data | FileCheck %s +; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux %s -o - | llvm-readobj -t | FileCheck %s ; Check that the appropriate symbols were created. -; CHECK: (('st_name', 0x{{[0-9|a-f]+}}) # '$.str' -; CHECK: (('st_name', 0x{{[0-9|a-f]+}}) # '$.str1' -; CHECK: (('st_name', 0x{{[0-9|a-f]+}}) # '$CPI0_0' -; CHECK: (('st_name', 0x{{[0-9|a-f]+}}) # '$CPI0_1' +; CHECK: Symbols [ +; CHECK: Symbol { +; CHECK: Name: $.str +; CHECK: } +; CHECK: Symbol { +; CHECK: Name: $.str1 +; CHECK: } +; CHECK: Symbol { +; CHECK: Name: $CPI0_0 +; CHECK: } +; CHECK: Symbol { +; CHECK: Name: $CPI0_1 +; CHECK: } +; CHECK: ] @.str = private unnamed_addr constant [6 x i8] c"abcde\00", align 1 @gc1 = external global i8* diff --git a/test/MC/Mips/elf-tls.ll b/test/MC/Mips/elf-tls.ll index b4183b8..9f604e0 100644 --- a/test/MC/Mips/elf-tls.ll +++ b/test/MC/Mips/elf-tls.ll @@ -1,10 +1,14 @@ -; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux %s -o - | elf-dump --dump-section-data | FileCheck %s +; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux %s -o - | llvm-readobj -r | FileCheck %s ; Check that the appropriate relocations were created. -; CHECK: ('r_type', 0x2b) -; CHECK: ('r_type', 0x2c) -; CHECK: ('r_type', 0x2d) +; CHECK: Relocations [ +; CHECK: Section (1) .text { +; CHECK: R_MIPS_TLS_LDM +; CHECK: R_MIPS_TLS_DTPREL_HI16 +; CHECK: R_MIPS_TLS_DTPREL_LO16 +; CHECK: } +; CHECK: ] @t1 = thread_local global i32 0, align 4 diff --git a/test/MC/Mips/elf_basic.s b/test/MC/Mips/elf_basic.s index ffc3b11..6c1e769 100644 --- a/test/MC/Mips/elf_basic.s +++ b/test/MC/Mips/elf_basic.s @@ -1,35 +1,41 @@ // 32 bit big endian -// RUN: llvm-mc -filetype=obj -triple mips-unknown-linux %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE32 %s +// RUN: llvm-mc -filetype=obj -triple mips-unknown-linux %s -o - | llvm-readobj -h | FileCheck -check-prefix=CHECK-BE32 %s // 32 bit little endian -// RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-LE32 %s +// RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux %s -o - | llvm-readobj -h | FileCheck -check-prefix=CHECK-LE32 %s // 64 bit big endian -// RUN: llvm-mc -filetype=obj -arch=mips64 -triple mips64-unknown-linux %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE64 %s +// RUN: llvm-mc -filetype=obj -arch=mips64 -triple mips64-unknown-linux %s -o - | llvm-readobj -h | FileCheck -check-prefix=CHECK-BE64 %s // 64 bit little endian -// RUN: llvm-mc -filetype=obj -arch=mips64el -triple mips64el-unknown-linux %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-LE64 %s +// RUN: llvm-mc -filetype=obj -arch=mips64el -triple mips64el-unknown-linux %s -o - | llvm-readobj -h | FileCheck -check-prefix=CHECK-LE64 %s // Check that we produce 32 bit with each endian. -// This is 32 bit. -// CHECK-BE32: ('e_indent[EI_CLASS]', 0x01) -// This is big endian. -// CHECK-BE32: ('e_indent[EI_DATA]', 0x02) +// CHECK-BE32: ElfHeader { +// CHECK-BE32: Ident { +// CHECK-BE32: Class: 32-bit +// CHECK-BE32: DataEncoding: BigEndian +// CHECK-BE32: } +// CHECK-BE32: } -// This is 32 bit. -// CHECK-LE32: ('e_indent[EI_CLASS]', 0x01) -// This is little endian. -// CHECK-LE32: ('e_indent[EI_DATA]', 0x01) +// CHECK-LE32: ElfHeader { +// CHECK-LE32: Ident { +// CHECK-LE32: Class: 32-bit +// CHECK-LE32: DataEncoding: LittleEndian +// CHECK-LE32: } +// CHECK-LE32: } // Check that we produce 64 bit with each endian. -// This is 64 bit. -// CHECK-BE64: ('e_indent[EI_CLASS]', 0x02) -// This is big endian. -// CHECK-BE64: ('e_indent[EI_DATA]', 0x02) +// CHECK-BE64: ElfHeader { +// CHECK-BE64: Ident { +// CHECK-BE64: Class: 64-bit +// CHECK-BE64: DataEncoding: BigEndian +// CHECK-BE64: } +// CHECK-BE64: } -// This is 64 bit. -// CHECK-LE64: ('e_indent[EI_CLASS]', 0x02) -// This is little endian. -// CHECK-LE64: ('e_indent[EI_DATA]', 0x01) - -// Check that we are setting EI_OSABI to ELFOSABI_LINUX. -// CHECK-LE64: ('e_indent[EI_OSABI]', 0x03) +// CHECK-LE64: ElfHeader { +// CHECK-LE64: Ident { +// CHECK-LE64: Class: 64-bit +// CHECK-LE64: DataEncoding: LittleEndian +// CHECK-LE64: OS/ABI: GNU/Linux +// CHECK-LE64: } +// CHECK-LE64: } diff --git a/test/MC/Mips/elf_eflags.ll b/test/MC/Mips/elf_eflags.ll index 315cb81..6d16a42 100644 --- a/test/MC/Mips/elf_eflags.ll +++ b/test/MC/Mips/elf_eflags.ll @@ -13,52 +13,52 @@ ; EF_MIPS_ARCH_32R2 (0x70000000) ; EF_MIPS_ARCH_64R2 (0x80000000) -; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32 -relocation-model=static %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE32 %s -; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32 %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE32_PIC %s -; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32r2 -relocation-model=static %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE32R2 %s -; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32r2 %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE32R2_PIC %s -; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips -relocation-model=static %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE32R2-MICROMIPS %s -; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE32R2-MICROMIPS_PIC %s +; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32 -relocation-model=static %s -o - | llvm-readobj -h | FileCheck -check-prefix=CHECK-BE32 %s +; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32 %s -o - | llvm-readobj -h | FileCheck -check-prefix=CHECK-BE32_PIC %s +; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32r2 -relocation-model=static %s -o - | llvm-readobj -h | FileCheck -check-prefix=CHECK-BE32R2 %s +; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32r2 %s -o - | llvm-readobj -h | FileCheck -check-prefix=CHECK-BE32R2_PIC %s +; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips -relocation-model=static %s -o - | llvm-readobj -h | FileCheck -check-prefix=CHECK-BE32R2-MICROMIPS %s +; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips %s -o - | llvm-readobj -h | FileCheck -check-prefix=CHECK-BE32R2-MICROMIPS_PIC %s -; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips64 -relocation-model=static %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE64 %s -; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips64 %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE64_PIC %s -; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips64r2 -relocation-model=static %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE64R2 %s -; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips64r2 %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE64R2_PIC %s +; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips64 -relocation-model=static %s -o - | llvm-readobj -h | FileCheck -check-prefix=CHECK-BE64 %s +; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips64 %s -o - | llvm-readobj -h | FileCheck -check-prefix=CHECK-BE64_PIC %s +; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips64r2 -relocation-model=static %s -o - | llvm-readobj -h | FileCheck -check-prefix=CHECK-BE64R2 %s +; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips64r2 %s -o - | llvm-readobj -h | FileCheck -check-prefix=CHECK-BE64R2_PIC %s -; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+mips16 -relocation-model=pic %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-LE32R2-MIPS16 %s +; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+mips16 -relocation-model=pic %s -o - | llvm-readobj -h | FileCheck -check-prefix=CHECK-LE32R2-MIPS16 %s ; 32(R1) bit with NO_REORDER and static -; CHECK-BE32: ('e_flags', 0x50001001) +; CHECK-BE32: Flags [ (0x50001001) ; ; 32(R1) bit with NO_REORDER and PIC -; CHECK-BE32_PIC: ('e_flags', 0x50001003) +; CHECK-BE32_PIC: Flags [ (0x50001003) ; ; 32R2 bit with NO_REORDER and static -; CHECK-BE32R2: ('e_flags', 0x70001001) +; CHECK-BE32R2: Flags [ (0x70001001) ; ; 32R2 bit with NO_REORDER and PIC -; CHECK-BE32R2_PIC: ('e_flags', 0x70001003) +; CHECK-BE32R2_PIC: Flags [ (0x70001003) ; ; 32R2 bit MICROMIPS with NO_REORDER and static -; CHECK-BE32R2-MICROMIPS: ('e_flags', 0x72001001) +; CHECK-BE32R2-MICROMIPS: Flags [ (0x72001001) ; ; 32R2 bit MICROMIPS with NO_REORDER and PIC -;CHECK-BE32R2-MICROMIPS_PIC: ('e_flags', 0x72001003) +;CHECK-BE32R2-MICROMIPS_PIC: Flags [ (0x72001003) ; ; 64(R1) bit with NO_REORDER and static -; CHECK-BE64: ('e_flags', 0x60000001) +; CHECK-BE64: Flags [ (0x60000001) ; ; 64(R1) bit with NO_REORDER and PIC -; CHECK-BE64_PIC: ('e_flags', 0x60000003) +; CHECK-BE64_PIC: Flags [ (0x60000003) ; ; 64R2 bit with NO_REORDER and static -; CHECK-BE64R2: ('e_flags', 0x80000001) +; CHECK-BE64R2: Flags [ (0x80000001) ; ; 64R2 bit with NO_REORDER and PIC -; CHECK-BE64R2_PIC: ('e_flags', 0x80000003) +; CHECK-BE64R2_PIC: Flags [ (0x80000003) ; ; 32R2 bit MIPS16 with PIC -; CHECK-LE32R2-MIPS16: ('e_flags', 0x74001002) +; CHECK-LE32R2-MIPS16: Flags [ (0x74001002) define i32 @main() nounwind { entry: diff --git a/test/MC/Mips/elf_st_other.ll b/test/MC/Mips/elf_st_other.ll index f188ce7..bc56c00 100644 --- a/test/MC/Mips/elf_st_other.ll +++ b/test/MC/Mips/elf_st_other.ll @@ -1,13 +1,12 @@ ; This tests value of ELF st_other field for function symbol table entries. ; For microMIPS value should be equal to STO_MIPS_MICROMIPS. -; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips %s -o - | elf-dump --dump-section-data | FileCheck %s +; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mcpu=mips32r2 -mattr=+micromips %s -o - | llvm-readobj -t | FileCheck %s define i32 @main() nounwind { entry: ret i32 0 } -; CHECK: 'main' -; CHECK: ('st_other', 0x80) - +; CHECK: Name: main +; CHECK: Other: 128 diff --git a/test/MC/Mips/expr1.s b/test/MC/Mips/expr1.s new file mode 100644 index 0000000..67664c1 --- /dev/null +++ b/test/MC/Mips/expr1.s @@ -0,0 +1,26 @@ +# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s +# Check that the assembler can handle the expressions as operands. +# CHECK: .text +# CHECK: .globl foo +# CHECK: foo: +# CHECK: lw $4, %lo(foo)($4) # encoding: [A,A,0x84,0x8c] +# CHECK: # fixup A - offset: 0, value: foo@ABS_LO, kind: fixup_Mips_LO16 +# CHECK: lw $4, 56($4) # encoding: [0x38,0x00,0x84,0x8c] +# CHECK: lw $4, %lo(foo+8)($4) # encoding: [0x08'A',A,0x84,0x8c] +# CHECK: # fixup A - offset: 0, value: foo@ABS_LO, kind: fixup_Mips_LO16 +# CHECK: lw $4, %lo(foo+8)($4) # encoding: [0x08'A',A,0x84,0x8c] +# CHECK: # fixup A - offset: 0, value: foo@ABS_LO, kind: fixup_Mips_LO16 +# CHECK: lw $4, %lo(foo+8)($4) # encoding: [0x08'A',A,0x84,0x8c] +# CHECK: # fixup A - offset: 0, value: foo@ABS_LO, kind: fixup_Mips_LO16 +# CHECK: .space 64 + + .globl foo + .ent foo +foo: + lw $4,%lo(foo)($4) + lw $4,((10 + 4) * 4)($4) + lw $4,%lo (2 * 4) + foo($4) + lw $4,%lo((2 * 4) + foo)($4) + lw $4,(((%lo ((2 * 4) + foo))))($4) + .space 64 + .end foo diff --git a/test/MC/Mips/higher_highest.ll b/test/MC/Mips/higher_highest.ll index 0c66522..6c3d71f 100644 --- a/test/MC/Mips/higher_highest.ll +++ b/test/MC/Mips/higher_highest.ll @@ -1,14 +1,16 @@ -; DISABLE: llc -march=mips64el -mcpu=mips64 -mattr=n64 -force-mips-long-branch -filetype=obj < %s -o - | elf-dump --dump-section-data | FileCheck %s +; DISABLE: llc -march=mips64el -mcpu=mips64 -mattr=n64 -force-mips-long-branch -filetype=obj < %s -o - | llvm-readobj -r | FileCheck %s ; RUN: false ; XFAIL: * ; Disabled because currently we don't have a way to generate these relocations. ; ; Check that the R_MIPS_HIGHER and R_MIPS_HIGHEST relocations were created. -; CHECK: ('r_type', 0x1d) -; CHECK: ('r_type', 0x1d) -; CHECK: ('r_type', 0x1c) -; CHECK: ('r_type', 0x1c) +; CHECK: Relocations [ +; CHECK: 0x{{[0-9,A-F]+}} R_MIPS_HIGHEST +; CHECK: 0x{{[0-9,A-F]+}} R_MIPS_HIGHEST +; CHECK: 0x{{[0-9,A-F]+}} R_MIPS_HIGHER +; CHECK: 0x{{[0-9,A-F]+}} R_MIPS_HIGHER +; CHECK: ] @g0 = external global i32 diff --git a/test/MC/Mips/micromips-alu-instructions.s b/test/MC/Mips/micromips-alu-instructions.s new file mode 100644 index 0000000..c541e1a --- /dev/null +++ b/test/MC/Mips/micromips-alu-instructions.s @@ -0,0 +1,64 @@ +# RUN: llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips | FileCheck %s +# Check that the assembler can handle the documented syntax +# for arithmetic and logical instructions. +#------------------------------------------------------------------------------ +# Arithmetic and Logical Instructions +#------------------------------------------------------------------------------ +# CHECK: add $9, $6, $7 # encoding: [0x10,0x49,0xe6,0x00] +# CHECK: addi $9, $6, 17767 # encoding: [0x67,0x45,0x26,0x11] +# CHECK: addiu $9, $6, -15001 # encoding: [0x67,0xc5,0x26,0x31] +# CHECK: addi $9, $6, 17767 # encoding: [0x67,0x45,0x26,0x11] +# CHECK: addiu $9, $6, -15001 # encoding: [0x67,0xc5,0x26,0x31] +# CHECK: addu $9, $6, $7 # encoding: [0x50,0x49,0xe6,0x00] +# CHECK: sub $9, $6, $7 # encoding: [0x90,0x49,0xe6,0x00] +# CHECK: subu $4, $3, $5 # encoding: [0xd0,0x21,0xa3,0x00] +# CHECK: neg $6, $7 # encoding: [0x90,0x31,0xe0,0x00] +# CHECK: negu $6, $7 # encoding: [0xd0,0x31,0xe0,0x00] +# CHECK: move $7, $8 # encoding: [0x50,0x39,0x08,0x00] +# CHECK: slt $3, $3, $5 # encoding: [0x50,0x1b,0xa3,0x00] +# CHECK: slti $3, $3, 103 # encoding: [0x67,0x00,0x63,0x90] +# CHECK: slti $3, $3, 103 # encoding: [0x67,0x00,0x63,0x90] +# CHECK: sltiu $3, $3, 103 # encoding: [0x67,0x00,0x63,0xb0] +# CHECK: sltu $3, $3, $5 # encoding: [0x90,0x1b,0xa3,0x00] +# CHECK: and $9, $6, $7 # encoding: [0x50,0x4a,0xe6,0x00] +# CHECK: andi $9, $6, 17767 # encoding: [0x67,0x45,0x26,0xd1] +# CHECK: andi $9, $6, 17767 # encoding: [0x67,0x45,0x26,0xd1] +# CHECK: or $3, $4, $5 # encoding: [0x90,0x1a,0xa4,0x00] +# CHECK: ori $9, $6, 17767 # encoding: [0x67,0x45,0x26,0x51] +# CHECK: xor $3, $3, $5 # encoding: [0x10,0x1b,0xa3,0x00] +# CHECK: xori $9, $6, 17767 # encoding: [0x67,0x45,0x26,0x71] +# CHECK: xori $9, $6, 17767 # encoding: [0x67,0x45,0x26,0x71] +# CHECK: nor $9, $6, $7 # encoding: [0xd0,0x4a,0xe6,0x00] +# CHECK: not $7, $8 # encoding: [0xd0,0x3a,0x08,0x00] +# CHECK: mul $9, $6, $7 # encoding: [0x10,0x4a,0xe6,0x00] +# CHECK: mult $9, $7 # encoding: [0x3c,0x8b,0xe9,0x00] +# CHECK: multu $9, $7 # encoding: [0x3c,0x9b,0xe9,0x00] + add $9, $6, $7 + add $9, $6, 17767 + addu $9, $6, -15001 + addi $9, $6, 17767 + addiu $9, $6,-15001 + addu $9, $6, $7 + sub $9, $6, $7 + subu $4, $3, $5 + neg $6, $7 + negu $6, $7 + move $7, $8 + slt $3, $3, $5 + slt $3, $3, 103 + slti $3, $3, 103 + sltiu $3, $3, 103 + sltu $3, $3, $5 + and $9, $6, $7 + and $9, $6, 17767 + andi $9, $6, 17767 + or $3, $4, $5 + ori $9, $6, 17767 + xor $3, $3, $5 + xor $9, $6, 17767 + xori $9, $6, 17767 + nor $9, $6, $7 + nor $7, $8, $zero + mul $9, $6, $7 + mult $9, $7 + multu $9, $7 diff --git a/test/MC/Mips/micromips-loadstore-instructions.s b/test/MC/Mips/micromips-loadstore-instructions.s new file mode 100644 index 0000000..623e2ac --- /dev/null +++ b/test/MC/Mips/micromips-loadstore-instructions.s @@ -0,0 +1,22 @@ +# RUN: llvm-mc %s -triple=mipsel -show-encoding -mattr=micromips | FileCheck %s +# Check that the assembler can handle the documented syntax +# for load and store instructions. +#------------------------------------------------------------------------------ +# Load and Store Instructions +#------------------------------------------------------------------------------ +# CHECK: lb $5, 8($4) # encoding: [0x08,0x00,0xa4,0x1c] +# CHECK: lbu $6, 8($4) # encoding: [0x08,0x00,0xc4,0x14] +# CHECK: lh $2, 8($4) # encoding: [0x08,0x00,0x44,0x3c] +# CHECK: lhu $4, 8($2) # encoding: [0x08,0x00,0x82,0x34] +# CHECK: lw $6, 4($5) # encoding: [0x04,0x00,0xc5,0xfc] +# CHECK: sb $5, 8($4) # encoding: [0x08,0x00,0xa4,0x18] +# CHECK: sh $2, 8($4) # encoding: [0x08,0x00,0x44,0x38] +# CHECK: sw $5, 4($6) # encoding: [0x04,0x00,0xa6,0xf8] + lb $5, 8($4) + lbu $6, 8($4) + lh $2, 8($4) + lhu $4, 8($2) + lw $6, 4($5) + sb $5, 8($4) + sh $2, 8($4) + sw $5, 4($6) diff --git a/test/MC/Mips/micromips-shift-instructions.s b/test/MC/Mips/micromips-shift-instructions.s new file mode 100644 index 0000000..3b5060f --- /dev/null +++ b/test/MC/Mips/micromips-shift-instructions.s @@ -0,0 +1,22 @@ +# RUN: llvm-mc %s -triple=mipsel -show-encoding -mcpu=mips32r2 -mattr=micromips | FileCheck %s +# Check that the assembler can handle the documented syntax +# for shift instructions. +#------------------------------------------------------------------------------ +# Shift Instructions +#------------------------------------------------------------------------------ +# CHECK: sll $4, $3, 7 # encoding: [0x00,0x38,0x83,0x00] +# CHECK: sllv $2, $3, $5 # encoding: [0x10,0x10,0x65,0x00] +# CHECK: sra $4, $3, 7 # encoding: [0x80,0x38,0x83,0x00] +# CHECK: srav $2, $3, $5 # encoding: [0x90,0x10,0x65,0x00] +# CHECK: srl $4, $3, 7 # encoding: [0x40,0x38,0x83,0x00] +# CHECK: srlv $2, $3, $5 # encoding: [0x50,0x10,0x65,0x00] +# CHECK: rotr $9, $6, 7 # encoding: [0xc0,0x38,0x26,0x01] +# CHECK: rotrv $9, $6, $7 # encoding: [0xd0,0x48,0xc7,0x00] + sll $4, $3, 7 + sllv $2, $3, $5 + sra $4, $3, 7 + srav $2, $3, $5 + srl $4, $3, 7 + srlv $2, $3, $5 + rotr $9, $6, 7 + rotrv $9, $6, $7 diff --git a/test/MC/Mips/mips-alu-instructions.s b/test/MC/Mips/mips-alu-instructions.s index 816138e..586e88b 100644 --- a/test/MC/Mips/mips-alu-instructions.s +++ b/test/MC/Mips/mips-alu-instructions.s @@ -1,7 +1,6 @@ # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s # Check that the assembler can handle the documented syntax # for arithmetic and logical instructions. -# CHECK: .section __TEXT,__text,regular,pure_instructions #------------------------------------------------------------------------------ # Logical instructions #------------------------------------------------------------------------------ @@ -13,6 +12,7 @@ # CHECK: ins $19, $9, 6, 7 # encoding: [0x84,0x61,0x33,0x7d] # CHECK: nor $9, $6, $7 # encoding: [0x27,0x48,0xc7,0x00] # CHECK: or $3, $3, $5 # encoding: [0x25,0x18,0x65,0x00] +# CHECK: ori $4, $5, 17767 # encoding: [0x67,0x45,0xa4,0x34] # CHECK: ori $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x34] # CHECK: rotr $9, $6, 7 # encoding: [0xc2,0x49,0x26,0x00] # CHECK: rotrv $9, $6, $7 # encoding: [0x46,0x48,0xe6,0x00] @@ -40,6 +40,7 @@ ins $19, $9, 6,7 nor $9, $6, $7 or $3, $3, $5 + or $4, $5, 17767 ori $9, $6, 17767 rotr $9, $6, 7 rotrv $9, $6, $7 diff --git a/test/MC/Mips/mips-expansions.s b/test/MC/Mips/mips-expansions.s index cfc15e8..1622965 100644 --- a/test/MC/Mips/mips-expansions.s +++ b/test/MC/Mips/mips-expansions.s @@ -1,7 +1,6 @@ # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s # Check that the assembler can handle the documented syntax # for macro instructions -# CHECK: .section __TEXT,__text,regular,pure_instructions #------------------------------------------------------------------------------ # Load immediate instructions #------------------------------------------------------------------------------ @@ -16,6 +15,22 @@ # CHECK: lui $7, 1 # encoding: [0x01,0x00,0x07,0x3c] # CHECK: ori $7, $7, 2 # encoding: [0x02,0x00,0xe7,0x34] # CHECK: addu $7, $7, $8 # encoding: [0x21,0x38,0xe8,0x00] +# CHECK: lui $10, %hi(symbol) # encoding: [A,A,0x0a,0x3c] +# CHECK: # fixup A - offset: 0, value: symbol@ABS_HI, kind: fixup_Mips_HI16 +# CHECK: addu $10, $10, $4 # encoding: [0x21,0x50,0x44,0x01] +# CHECK: lw $10, %lo(symbol)($10) # encoding: [A,A,0x4a,0x8d] +# CHECK: # fixup A - offset: 0, value: symbol@ABS_LO, kind: fixup_Mips_LO16 +# CHECK: lui $1, %hi(symbol) # encoding: [A,A,0x01,0x3c] +# CHECK: # fixup A - offset: 0, value: symbol@ABS_HI, kind: fixup_Mips_HI16 +# CHECK: addu $1, $1, $9 # encoding: [0x21,0x08,0x29,0x00] +# CHECK: sw $10, %lo(symbol)($1) # encoding: [A,A,0x2a,0xac] +# CHECK: # fixup A - offset: 0, value: symbol@ABS_LO, kind: fixup_Mips_LO16 +# CHECK: lui $10, 10 # encoding: [0x0a,0x00,0x0a,0x3c] +# CHECK: addu $10, $10, $4 # encoding: [0x21,0x50,0x44,0x01] +# CHECK: lw $10, 123($10) # encoding: [0x7b,0x00,0x4a,0x8d] +# CHECK: lui $1, 2 # encoding: [0x02,0x00,0x01,0x3c] +# CHECK: addu $1, $1, $9 # encoding: [0x21,0x08,0x29,0x00] +# CHECK: sw $10, 57920($1) # encoding: [0x40,0xe2,0x2a,0xac] li $5,123 li $6,-2345 @@ -25,3 +40,9 @@ la $7,65538 la $a0, 20($a1) la $7,65538($8) + + lw $t2, symbol($a0) + sw $t2, symbol($t1) + + lw $t2, 655483($a0) + sw $t2, 123456($t1) diff --git a/test/MC/Mips/mips-fpu-instructions.s b/test/MC/Mips/mips-fpu-instructions.s index a126c6f..e515872 100644 --- a/test/MC/Mips/mips-fpu-instructions.s +++ b/test/MC/Mips/mips-fpu-instructions.s @@ -1,7 +1,6 @@ # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s # Check that the assembler can handle the documented syntax # for FPU instructions. -# CHECK: .section __TEXT,__text,regular,pure_instructions #------------------------------------------------------------------------------ # FP aritmetic instructions #------------------------------------------------------------------------------ @@ -157,6 +156,8 @@ # CHECK: mtc0 $9, $8, 3 # encoding: [0x03,0x40,0x89,0x40] # CHECK: mfc2 $5, $7, 4 # encoding: [0x04,0x38,0x05,0x48] # CHECK: mtc2 $9, $4, 5 # encoding: [0x05,0x20,0x89,0x48] +# CHECK: movf $2, $1, $fcc0 # encoding: [0x01,0x10,0x20,0x00] +# CHECK: movt $2, $1, $fcc0 # encoding: [0x01,0x10,0x21,0x00] cfc1 $a2,$0 mfc1 $a2,$f7 @@ -176,3 +177,5 @@ mtc0 $9, $8, 3 mfc2 $5, $7, 4 mtc2 $9, $4, 5 + movf $2, $1, $fcc0 + movt $2, $1, $fcc0 diff --git a/test/MC/Mips/mips-jump-instructions.s b/test/MC/Mips/mips-jump-instructions.s index bc2d720..597f687 100644 --- a/test/MC/Mips/mips-jump-instructions.s +++ b/test/MC/Mips/mips-jump-instructions.s @@ -1,30 +1,57 @@ -# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s +# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | \ +# RUN: FileCheck -check-prefix=CHECK32 %s +# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips64r2 | \ +# RUN: FileCheck -check-prefix=CHECK64 %s + # Check that the assembler can handle the documented syntax # for jumps and branches. -# CHECK: .section __TEXT,__text,regular,pure_instructions #------------------------------------------------------------------------------ # Branch instructions #------------------------------------------------------------------------------ -# CHECK: b 1332 # encoding: [0x34,0x05,0x00,0x10] -# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] -# CHECK: bc1f 1332 # encoding: [0x34,0x05,0x00,0x45] -# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] -# CHECK: bc1t 1332 # encoding: [0x34,0x05,0x01,0x45] -# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] -# CHECK: beq $9, $6, 1332 # encoding: [0x34,0x05,0x26,0x11] -# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] -# CHECK: bgez $6, 1332 # encoding: [0x34,0x05,0xc1,0x04] -# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] -# CHECK: bgezal $6, 1332 # encoding: [0x34,0x05,0xd1,0x04] -# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] -# CHECK: bgtz $6, 1332 # encoding: [0x34,0x05,0xc0,0x1c] -# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] -# CHECK: blez $6, 1332 # encoding: [0x34,0x05,0xc0,0x18] -# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] -# CHECK: bne $9, $6, 1332 # encoding: [0x34,0x05,0x26,0x15] -# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] -# CHECK: bal 1332 # encoding: [0x34,0x05,0x11,0x04] -# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK32: b 1332 # encoding: [0x4d,0x01,0x00,0x10] +# CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK32: bc1f 1332 # encoding: [0x4d,0x01,0x00,0x45] +# CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK32: bc1t 1332 # encoding: [0x4d,0x01,0x01,0x45] +# CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK32: beq $9, $6, 1332 # encoding: [0x4d,0x01,0x26,0x11] +# CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK32: bgez $6, 1332 # encoding: [0x4d,0x01,0xc1,0x04] +# CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK32: bgezal $6, 1332 # encoding: [0x4d,0x01,0xd1,0x04] +# CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK32: bgtz $6, 1332 # encoding: [0x4d,0x01,0xc0,0x1c] +# CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK32: blez $6, 1332 # encoding: [0x4d,0x01,0xc0,0x18] +# CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK32: bne $9, $6, 1332 # encoding: [0x4d,0x01,0x26,0x15] +# CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK32: bal 1332 # encoding: [0x4d,0x01,0x11,0x04] +# CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] + +# CHECK64: b 1332 # encoding: [0x4d,0x01,0x00,0x10] +# CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK64: bc1f 1332 # encoding: [0x4d,0x01,0x00,0x45] +# CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK64: bc1t 1332 # encoding: [0x4d,0x01,0x01,0x45] +# CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK64: beq $9, $6, 1332 # encoding: [0x4d,0x01,0x26,0x11] +# CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK64: bgez $6, 1332 # encoding: [0x4d,0x01,0xc1,0x04] +# CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK64: bgezal $6, 1332 # encoding: [0x4d,0x01,0xd1,0x04] +# CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK64: bgtz $6, 1332 # encoding: [0x4d,0x01,0xc0,0x1c] +# CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK64: blez $6, 1332 # encoding: [0x4d,0x01,0xc0,0x18] +# CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK64: bne $9, $6, 1332 # encoding: [0x4d,0x01,0x26,0x15] +# CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK64: bal 1332 # encoding: [0x4d,0x01,0x11,0x04] +# CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] + +.set noreorder + b 1332 nop bc1f 1332 @@ -50,19 +77,43 @@ end_of_code: #------------------------------------------------------------------------------ # Jump instructions #------------------------------------------------------------------------------ -# CHECK: j 1328 # encoding: [0x30,0x05,0x00,0x08] -# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] -# CHECK: jal 1328 # encoding: [0x30,0x05,0x00,0x0c] -# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] -# CHECK: jalr $6 # encoding: [0x09,0xf8,0xc0,0x00] -# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] -# CHECK: jalr $25 # encoding: [0x09,0xf8,0x20,0x03] -# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] -# CHECK: jalr $10, $11 # encoding: [0x09,0x50,0x60,0x01] -# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] -# CHECK: jr $7 # encoding: [0x08,0x00,0xe0,0x00] -# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] -# CHECK: jr $7 # encoding: [0x08,0x00,0xe0,0x00] +# CHECK32: j 1328 # encoding: [0x4c,0x01,0x00,0x08] +# CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK32: jal 1328 # encoding: [0x4c,0x01,0x00,0x0c] +# CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK32: jalr $6 # encoding: [0x09,0xf8,0xc0,0x00] +# CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK32: jalr $25 # encoding: [0x09,0xf8,0x20,0x03] +# CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK32: jalr $10, $11 # encoding: [0x09,0x50,0x60,0x01] +# CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK32: jr $7 # encoding: [0x08,0x00,0xe0,0x00] +# CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK32: jr $7 # encoding: [0x08,0x00,0xe0,0x00] +# CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK32: jalr $25 # encoding: [0x09,0xf8,0x20,0x03] +# CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK32: jalr $4, $25 # encoding: [0x09,0x20,0x20,0x03] +# CHECK32: nop # encoding: [0x00,0x00,0x00,0x00] + +# CHECK64: j 1328 # encoding: [0x4c,0x01,0x00,0x08] +# CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK64: jal 1328 # encoding: [0x4c,0x01,0x00,0x0c] +# CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK64: jalr $6 # encoding: [0x09,0xf8,0xc0,0x00] +# CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK64: jalr $25 # encoding: [0x09,0xf8,0x20,0x03] +# CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK64: jalr $10, $11 # encoding: [0x09,0x50,0x60,0x01] +# CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK64: jr $7 # encoding: [0x08,0x00,0xe0,0x00] +# CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK64: jr $7 # encoding: [0x08,0x00,0xe0,0x00] +# CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK64: jalr $25 # encoding: [0x09,0xf8,0x20,0x03] +# CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK64: jalr $4, $25 # encoding: [0x09,0x20,0x20,0x03] +# CHECK64: nop # encoding: [0x00,0x00,0x00,0x00] j 1328 @@ -78,3 +129,8 @@ end_of_code: jr $7 nop j $7 + nop + jal $25 + nop + jal $4,$25 + nop diff --git a/test/MC/Mips/mips-memory-instructions.s b/test/MC/Mips/mips-memory-instructions.s index b5f1267..c8b0559 100644 --- a/test/MC/Mips/mips-memory-instructions.s +++ b/test/MC/Mips/mips-memory-instructions.s @@ -1,7 +1,6 @@ # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s # Check that the assembler can handle the documented syntax # for loads and stores. -# CHECK: .section __TEXT,__text,regular,pure_instructions #------------------------------------------------------------------------------ # Memory store instructions #------------------------------------------------------------------------------ diff --git a/test/MC/Mips/mips-relocations.s b/test/MC/Mips/mips-relocations.s index ff71c75..6f095d1 100644 --- a/test/MC/Mips/mips-relocations.s +++ b/test/MC/Mips/mips-relocations.s @@ -1,7 +1,6 @@ # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 | FileCheck %s # Check that the assembler can handle the documented syntax # for relocations. -# CHECK: .section __TEXT,__text,regular,pure_instructions # CHECK: lui $2, %hi(_gp_disp) # encoding: [A,A,0x02,0x3c] # CHECK: # fixup A - offset: 0, value: _gp_disp@ABS_HI, kind: fixup_Mips_HI16 # CHECK: addiu $2, $2, %lo(_gp_disp) # encoding: [A,A,0x42,0x24] diff --git a/test/MC/Mips/mips64-alu-instructions.s b/test/MC/Mips/mips64-alu-instructions.s index 1b4ebdf..db6c972 100644 --- a/test/MC/Mips/mips64-alu-instructions.s +++ b/test/MC/Mips/mips64-alu-instructions.s @@ -1,7 +1,6 @@ # RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips64r2 | FileCheck %s # Check that the assembler can handle the documented syntax # for arithmetic and logical instructions. -# CHECK: .section __TEXT,__text,regular,pure_instructions #------------------------------------------------------------------------------ # Logical instructions #------------------------------------------------------------------------------ @@ -13,6 +12,7 @@ # CHECK: ins $19, $9, 6, 7 # encoding: [0x84,0x61,0x33,0x7d] # CHECK: nor $9, $6, $7 # encoding: [0x27,0x48,0xc7,0x00] # CHECK: or $3, $3, $5 # encoding: [0x25,0x18,0x65,0x00] +# CHECK: ori $4, $5, 17767 # encoding: [0x67,0x45,0xa4,0x34] # CHECK: ori $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x34] # CHECK: rotr $9, $6, 7 # encoding: [0xc2,0x49,0x26,0x00] # CHECK: rotrv $9, $6, $7 # encoding: [0x46,0x48,0xe6,0x00] @@ -40,6 +40,7 @@ ins $19, $9, 6,7 nor $9, $6, $7 or $3, $3, $5 + or $4, $5, 17767 ori $9, $6, 17767 rotr $9, $6, 7 rotrv $9, $6, $7 diff --git a/test/MC/Mips/mips_directives.s b/test/MC/Mips/mips_directives.s index 65d584d..45247cd 100644 --- a/test/MC/Mips/mips_directives.s +++ b/test/MC/Mips/mips_directives.s @@ -1,11 +1,20 @@ # RUN: llvm-mc -show-encoding -triple mips-unknown-unknown %s | FileCheck %s # +# CHECK: .text +# CHECK: $BB0_2: $BB0_2: .ent directives_test .frame $sp,0,$ra .mask 0x00000000,0 .fmask 0x00000000,0 +# CHECK: b 1332 # encoding: [0x10,0x00,0x01,0x4d] +# CHECK: j 1328 # encoding: [0x08,0x00,0x01,0x4c] +# CHECK: jal 1328 # encoding: [0x0c,0x00,0x01,0x4c] + .set noreorder + b 1332 + j 1328 + jal 1328 .set nomacro .set noat $JTI0_0: @@ -15,5 +24,20 @@ $JTI0_0: # CHECK-NEXT: .4byte 2013265916 .set at=$12 .set macro +# CHECK: b 1332 # encoding: [0x10,0x00,0x01,0x4d] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK: j 1328 # encoding: [0x08,0x00,0x01,0x4c] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] +# CHECK: jal 1328 # encoding: [0x0c,0x00,0x01,0x4c] +# CHECK: nop # encoding: [0x00,0x00,0x00,0x00] .set reorder + b 1332 + j 1328 + jal 1328 .set at=$a0 + .set STORE_MASK,$t7 + .set FPU_MASK,$f7 +#CHECK: abs.s $f6, $f7 # encoding: [0x46,0x00,0x39,0x85] +#CHECK: and $3, $15, $15 # encoding: [0x01,0xef,0x18,0x24] + abs.s $f6,FPU_MASK + and $3,$t7,STORE_MASK diff --git a/test/MC/Mips/nabi-regs.s b/test/MC/Mips/nabi-regs.s index 9371208..050fb81 100644 --- a/test/MC/Mips/nabi-regs.s +++ b/test/MC/Mips/nabi-regs.s @@ -8,7 +8,6 @@ # RUN: -mcpu=mips64r2 -arch=mips64 | \ # RUN: FileCheck %s -# CHECK: .section __TEXT,__text,regular,pure_instructions .text foo: diff --git a/test/MC/Mips/r-mips-got-disp.ll b/test/MC/Mips/r-mips-got-disp.ll index 73396ac..7e78a46 100644 --- a/test/MC/Mips/r-mips-got-disp.ll +++ b/test/MC/Mips/r-mips-got-disp.ll @@ -1,8 +1,9 @@ -; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 < %s -o - | elf-dump --dump-section-data | FileCheck %s +; RUN: llc -march=mips64el -filetype=obj -mcpu=mips64r2 < %s -o - | llvm-readobj -r | FileCheck %s ; Check that the R_MIPS_GOT_DISP relocations were created. -; CHECK: ('r_type', 0x13) +; CHECK: Relocations [ +; CHECK: 0x{{[0-9,A-F]+}} R_MIPS_GOT_DISP @shl = global i64 1, align 8 @.str = private unnamed_addr constant [8 x i8] c"0x%llx\0A\00", align 1 diff --git a/test/MC/Mips/set-at-directive.s b/test/MC/Mips/set-at-directive.s index 98a3a35..828175a 100644 --- a/test/MC/Mips/set-at-directive.s +++ b/test/MC/Mips/set-at-directive.s @@ -3,7 +3,6 @@ # Check that the assembler can handle the documented syntax # for ".set at" and set the correct value. -# CHECK: .section __TEXT,__text,regular,pure_instructions .text foo: # CHECK: jr $1 # encoding: [0x08,0x00,0x20,0x00] diff --git a/test/MC/Mips/sym-offset.ll b/test/MC/Mips/sym-offset.ll index 5162c91..c7450f7 100644 --- a/test/MC/Mips/sym-offset.ll +++ b/test/MC/Mips/sym-offset.ll @@ -1,4 +1,4 @@ -; DISABLED: llc -filetype=obj -mtriple mipsel-unknown-linux %s -o - | elf-dump --dump-section-data | FileCheck %s +; DISABLED: llc -filetype=obj -mtriple mipsel-unknown-linux %s -o - | llvm-readobj -s -sd | FileCheck %s ; RUN: false ; XFAIL: * @@ -13,7 +13,9 @@ entry: ; 8841000e lwl at,14(v0) ; 9841000b lwr at,11(v0) -; CHECK: ('_section_data', '00001c3c 00009c27 21e09903 0000828f 0e004188 0b004198 +; CHECK: SectionData ( +; CHECK: 0000: 00001C3C 00009C27 21E09903 0000828F +; CHECK-NEXT: 0010: 0E004188 0B004198 %call = tail call i32 @memcmp(i8* getelementptr inbounds ([11 x i8]* @string1, i32 0, i32 0), i8* getelementptr inbounds ([10 x i8]* @string2, i32 0, i32 0), i32 4) nounwind readonly %cmp = icmp eq i32 %call, 0 diff --git a/test/MC/Mips/xgot.ll b/test/MC/Mips/xgot.ll index bfe9b9a..e2a500f 100644 --- a/test/MC/Mips/xgot.ll +++ b/test/MC/Mips/xgot.ll @@ -1,4 +1,4 @@ -; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mxgot %s -o - | elf-dump --dump-section-data | FileCheck %s +; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux -mxgot %s -o - | llvm-readobj -r | FileCheck %s @.str = private unnamed_addr constant [16 x i8] c"ext_1=%d, i=%d\0A\00", align 1 @ext_1 = external global i32 @@ -9,29 +9,16 @@ entry: ; Check that the appropriate relocations were created. ; For the xgot case we want to see R_MIPS_[GOT|CALL]_[HI|LO]16. -; R_MIPS_HI16 -; CHECK: ('r_type', 0x05) - -; R_MIPS_LO16 -; CHECK: ('r_type', 0x06) - -; R_MIPS_GOT_HI16 -; CHECK: ('r_type', 0x16) - -; R_MIPS_GOT_LO16 -; CHECK: ('r_type', 0x17) - -; R_MIPS_GOT -; CHECK: ('r_type', 0x09) - -; R_MIPS_LO16 -; CHECK: ('r_type', 0x06) - -; R_MIPS_CALL_HI16 -; CHECK: ('r_type', 0x1e) - -; R_MIPS_CALL_LO16 -; CHECK: ('r_type', 0x1f) +; CHECK: Relocations [ +; CHECK: 0x{{[0-9,A-F]+}} R_MIPS_HI16 +; CHECK: 0x{{[0-9,A-F]+}} R_MIPS_LO16 +; CHECK: 0x{{[0-9,A-F]+}} R_MIPS_GOT_HI16 +; CHECK: 0x{{[0-9,A-F]+}} R_MIPS_GOT_LO16 +; CHECK: 0x{{[0-9,A-F]+}} R_MIPS_GOT +; CHECK: 0x{{[0-9,A-F]+}} R_MIPS_LO16 +; CHECK: 0x{{[0-9,A-F]+}} R_MIPS_CALL_HI16 +; CHECK: 0x{{[0-9,A-F]+}} R_MIPS_CALL_LO16 +; CHECK: ] %0 = load i32* @ext_1, align 4 %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([16 x i8]* @.str, i32 0, i32 0), i32 %0) nounwind diff --git a/test/MC/PowerPC/ppc64-initial-cfa.ll b/test/MC/PowerPC/ppc64-initial-cfa.ll index 16236c9..23a7738 100644 --- a/test/MC/PowerPC/ppc64-initial-cfa.ll +++ b/test/MC/PowerPC/ppc64-initial-cfa.ll @@ -1,7 +1,7 @@ ; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -filetype=obj -relocation-model=static %s -o - | \ -; RUN: elf-dump --dump-section-data | FileCheck %s -check-prefix=STATIC +; RUN: llvm-readobj -s -sr -sd | FileCheck %s -check-prefix=STATIC ; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -filetype=obj -relocation-model=pic %s -o - | \ -; RUN: elf-dump --dump-section-data | FileCheck %s -check-prefix=PIC +; RUN: llvm-readobj -s -sr -sd | FileCheck %s -check-prefix=PIC ; FIXME: this file should be in .s form, change when asm parser is available. @@ -10,69 +10,75 @@ entry: ret void } -; STATIC: ('sh_name', 0x{{.*}}) # '.eh_frame' -; STATIC-NEXT: ('sh_type', 0x00000001) -; STATIC-NEXT: ('sh_flags', 0x0000000000000002) -; STATIC-NEXT: ('sh_addr', 0x{{.*}}) -; STATIC-NEXT: ('sh_offset', 0x{{.*}}) -; STATIC-NEXT: ('sh_size', 0x0000000000000028) -; STATIC-NEXT: ('sh_link', 0x00000000) -; STATIC-NEXT: ('sh_info', 0x00000000) -; STATIC-NEXT: ('sh_addralign', 0x0000000000000008) -; STATIC-NEXT: ('sh_entsize', 0x0000000000000000) -; STATIC-NEXT: ('_section_data', '00000010 00000000 017a5200 01784101 1b0c0100 00000010 00000018 00000000 00000010 00000000') +; STATIC: Section { +; STATIC: Name: .eh_frame +; STATIC-NEXT: Type: SHT_PROGBITS +; STATIC-NEXT: Flags [ (0x2) +; STATIC-NEXT: SHF_ALLOC +; STATIC-NEXT: ] +; STATIC-NEXT: Address: +; STATIC-NEXT: Offset: +; STATIC-NEXT: Size: 40 +; STATIC-NEXT: Link: 0 +; STATIC-NEXT: Info: 0 +; STATIC-NEXT: AddressAlignment: 8 +; STATIC-NEXT: EntrySize: +; STATIC-NEXT: Relocations [ +; STATIC-NEXT: 0x1C R_PPC64_REL32 .text 0x0 +; STATIC-NEXT: ] +; STATIC-NEXT: SectionData ( +; STATIC-NEXT: 0000: 00000010 00000000 017A5200 01784101 +; STATIC-NEXT: 0010: 1B0C0100 00000010 00000018 00000000 +; STATIC-NEXT: 0020: 00000010 00000000 +; STATIC-NEXT: ) +; STATIC-NEXT: } -; STATIC: ('sh_name', 0x{{.*}}) # '.rela.eh_frame' -; STATIC-NEXT: ('sh_type', 0x00000004) -; STATIC-NEXT: ('sh_flags', 0x0000000000000000) -; STATIC-NEXT: ('sh_addr', 0x{{.*}}) -; STATIC-NEXT: ('sh_offset', 0x{{.*}}) -; STATIC-NEXT: ('sh_size', 0x0000000000000018) -; STATIC-NEXT: ('sh_link', 0x{{.*}}) -; STATIC-NEXT: ('sh_info', 0x{{.*}}) -; STATIC-NEXT: ('sh_addralign', 0x0000000000000008) -; STATIC-NEXT: ('sh_entsize', 0x0000000000000018) -; STATIC-NEXT: ('_relocations', [ +; STATIC: Section { +; STATIC: Name: .rela.eh_frame +; STATIC-NEXT: Type: SHT_RELA +; STATIC-NEXT: Flags [ (0x0) +; STATIC-NEXT: ] +; STATIC-NEXT: Address: +; STATIC-NEXT: Offset: +; STATIC-NEXT: Size: 24 +; STATIC-NEXT: Link: +; STATIC-NEXT: Info: +; STATIC-NEXT: AddressAlignment: 8 +; STATIC-NEXT: EntrySize: 24 -; Static build should create R_PPC64_REL32 relocations -; STATIC-NEXT: # Relocation 0 -; STATIC-NEXT: (('r_offset', 0x000000000000001c) -; STATIC-NEXT: ('r_sym', 0x{{.*}}) -; STATIC-NEXT: ('r_type', 0x0000001a) -; STATIC-NEXT: ('r_addend', 0x0000000000000000) -; STATIC-NEXT: ), -; STATIC-NEXT: ]) +; PIC: Section { +; PIC: Name: .eh_frame +; PIC-NEXT: Type: SHT_PROGBITS +; PIC-NEXT: Flags [ (0x2) +; PIC-NEXT: SHF_ALLOC +; PIC-NEXT: ] +; PIC-NEXT: Address: +; PIC-NEXT: Offset: +; PIC-NEXT: Size: 40 +; PIC-NEXT: Link: 0 +; PIC-NEXT: Info: 0 +; PIC-NEXT: AddressAlignment: 8 +; PIC-NEXT: EntrySize: 0 +; PIC-NEXT: Relocations [ +; PIC-NEXT: 0x1C R_PPC64_REL32 .text 0x0 +; PIC-NEXT: ] +; PIC-NEXT: SectionData ( +; PIC-NEXT: 0000: 00000010 00000000 017A5200 01784101 +; PIC-NEXT: 0010: 1B0C0100 00000010 00000018 00000000 +; PIC-NEXT: 0020: 00000010 00000000 +; PIC-NEXT: ) +; PIC-NEXT: } -; PIC: ('sh_name', 0x{{.*}}) # '.eh_frame' -; PIC-NEXT: ('sh_type', 0x00000001) -; PIC-NEXT: ('sh_flags', 0x0000000000000002) -; PIC-NEXT: ('sh_addr', 0x{{.*}}) -; PIC-NEXT: ('sh_offset', 0x{{.*}}) -; PIC-NEXT: ('sh_size', 0x0000000000000028) -; PIC-NEXT: ('sh_link', 0x00000000) -; PIC-NEXT: ('sh_info', 0x00000000) -; PIC-NEXT: ('sh_addralign', 0x0000000000000008) -; PIC-NEXT: ('sh_entsize', 0x0000000000000000) -; PIC-NEXT: ('_section_data', '00000010 00000000 017a5200 01784101 1b0c0100 00000010 00000018 00000000 00000010 00000000') - -; PIC: ('sh_name', 0x{{.*}}) # '.rela.eh_frame' -; PIC-NEXT: ('sh_type', 0x00000004) -; PIC-NEXT: ('sh_flags', 0x0000000000000000) -; PIC-NEXT: ('sh_addr', 0x{{.*}}) -; PIC-NEXT: ('sh_offset', 0x{{.*}}) -; PIC-NEXT: ('sh_size', 0x0000000000000018) -; PIC-NEXT: ('sh_link', 0x{{.*}}) -; PIC-NEXT: ('sh_info', 0x{{.*}}) -; PIC-NEXT: ('sh_addralign', 0x0000000000000008) -; PIC-NEXT: ('sh_entsize', 0x0000000000000018) -; PIC-NEXT: ('_relocations', [ - -; PIC build should create R_PPC64_REL32 relocations -; PIC-NEXT: # Relocation 0 -; PIC-NEXT: (('r_offset', 0x000000000000001c) -; PIC-NEXT: ('r_sym', 0x{{.*}}) -; PIC-NEXT: ('r_type', 0x0000001a) -; PIC-NEXT: ('r_addend', 0x0000000000000000) -; PIC-NEXT: ), -; PIC-NEXT: ]) +; PIC: Section { +; PIC: Name: .rela.eh_frame +; PIC-NEXT: Type: SHT_RELA +; PIC-NEXT: Flags [ (0x0) +; PIC-NEXT: ] +; PIC-NEXT: Address: +; PIC-NEXT: Offset: +; PIC-NEXT: Size: 24 +; PIC-NEXT: Link: +; PIC-NEXT: Info: +; PIC-NEXT: AddressAlignment: 8 +; PIC-NEXT: EntrySize: 24 diff --git a/test/MC/PowerPC/ppc64-relocs-01.ll b/test/MC/PowerPC/ppc64-relocs-01.ll index 4919e91..ac8d303 100644 --- a/test/MC/PowerPC/ppc64-relocs-01.ll +++ b/test/MC/PowerPC/ppc64-relocs-01.ll @@ -1,6 +1,6 @@ ;; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -O3 -code-model=small \ ;; RUN: -filetype=obj %s -o - | \ -;; RUN: elf-dump --dump-section-data | FileCheck %s +;; RUN: llvm-readobj -r | FileCheck %s ;; FIXME: this file need to be in .s form, change when asm parse is done. @@ -22,45 +22,28 @@ entry: ret double %add } +;; CHECK: Relocations [ + ;; The relocations in .rela.text are the 'number64' load using a ;; R_PPC64_TOC16_DS against the .toc and the 'sin' external function ;; address using a R_PPC64_REL24 -;; CHECK: '.rela.text' -;; CHECK: Relocation 0 -;; CHECK-NEXT: 'r_offset', -;; CHECK-NEXT: 'r_sym', 0x00000006 -;; CHECK-NEXT: 'r_type', 0x0000003f -;; CHECK: Relocation 1 -;; CHECK-NEXT: 'r_offset', -;; CHECK-NEXT: 'r_sym', 0x0000000a -;; CHECK-NEXT: 'r_type', 0x0000000a +;; CHECK: Section ({{[0-9]+}}) .text { +;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC16_DS .toc +;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_REL24 sin +;; CHECK-NEXT: } ;; The .opd entry for the 'access_int64' function creates 2 relocations: ;; 1. A R_PPC64_ADDR64 against the .text segment plus addend (the function ; address itself); ;; 2. And a R_PPC64_TOC against no symbol (the linker will replace for the ;; module's TOC base). -;; CHECK: '.rela.opd' -;; CHECK: Relocation 0 -;; CHECK-NEXT: 'r_offset', -;; CHECK-NEXT: 'r_sym', 0x00000002 -;; CHECK-NEXT: 'r_type', 0x00000026 -;; CHECK: Relocation 1 -;; CHECK-NEXT: 'r_offset', -;; CHECK-NEXT: 'r_sym', 0x00000000 -;; CHECK-NEXT: 'r_type', 0x00000033 +;; CHECK: Section ({{[0-9]+}}) .opd { +;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_ADDR64 .text 0x0 +;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TOC - 0x0 ;; Finally the TOC creates the relocation for the 'number64'. -;; CHECK: '.rela.toc' -;; CHECK: Relocation 0 -;; CHECK-NEXT: 'r_offset', -;; CHECK-NEXT: 'r_sym', 0x00000008 -;; CHECK-NEXT: 'r_type', 0x00000026 +;; CHECK: Section ({{[0-9]+}}) .toc { +;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_ADDR64 number64 0x0 +;; CHECK-NEXT: } -;; Check if the relocation references are for correct symbols. -;; CHECK: Symbol 7 -;; CHECK-NEXT: 'access_int64' -;; CHECK: Symbol 8 -;; CHECK-NEXT: 'number64' -;; CHECK: Symbol 10 -;; CHECK-NEXT: 'sin' +;; CHECK-NEXT: ] diff --git a/test/MC/PowerPC/ppc64-tls-relocs-01.ll b/test/MC/PowerPC/ppc64-tls-relocs-01.ll index 5e37311..4e901e8 100644 --- a/test/MC/PowerPC/ppc64-tls-relocs-01.ll +++ b/test/MC/PowerPC/ppc64-tls-relocs-01.ll @@ -1,5 +1,5 @@ ;; RUN: llc -mtriple=powerpc64-unknown-linux-gnu -filetype=obj %s -o - | \ -;; RUN: elf-dump --dump-section-data | FileCheck %s +;; RUN: llvm-readobj -r | FileCheck %s ;; FIXME: this file should be in .s form, change when asm parser is available. @@ -12,17 +12,8 @@ entry: ;; Check for a pair of R_PPC64_TPREL16_HA / R_PPC64_TPREL16_LO relocs ;; against the thread-local symbol 't'. -;; CHECK: '.rela.text' -;; CHECK: Relocation 0 -;; CHECK-NEXT: 'r_offset', -;; CHECK-NEXT: 'r_sym', 0x00000008 -;; CHECK-NEXT: 'r_type', 0x00000048 -;; CHECK: Relocation 1 -;; CHECK-NEXT: 'r_offset', -;; CHECK-NEXT: 'r_sym', 0x00000008 -;; CHECK-NEXT: 'r_type', 0x00000046 - -;; Check that we got the correct symbol. -;; CHECK: Symbol 8 -;; CHECK-NEXT: 't' - +;; CHECK: Relocations [ +;; CHECK: Section ({{[0-9]+}}) .text { +;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TPREL16_HA t +;; CHECK-NEXT: 0x{{[0-9,A-F]+}} R_PPC64_TPREL16_LO t +;; CHECK-NEXT: } diff --git a/test/MC/ELF/fde-reloc.s b/test/MC/X86/fde-reloc.s index 63ac976..63ac976 100644 --- a/test/MC/ELF/fde-reloc.s +++ b/test/MC/X86/fde-reloc.s diff --git a/test/MC/X86/intel-syntax.s b/test/MC/X86/intel-syntax.s index 8bfa58a..b2f337d 100644 --- a/test/MC/X86/intel-syntax.s +++ b/test/MC/X86/intel-syntax.s @@ -247,4 +247,79 @@ _main: mov [16][eax][ebx*4], ecx // CHECK: movl %ecx, -16(%eax,%ebx,4) mov [eax][ebx*4 - 16], ecx - ret + +// CHECK: prefetchnta 12800(%esi) + prefetchnta [esi + (200*64)] +// CHECK: prefetchnta 32(%esi) + prefetchnta [esi + (64/2)] +// CHECK: prefetchnta 128(%esi) + prefetchnta [esi + (64/2*4)] +// CHECK: prefetchnta 8(%esi) + prefetchnta [esi + (64/(2*4))] +// CHECK: prefetchnta 48(%esi) + prefetchnta [esi + (64/(2*4)+40)] + +// CHECK: movl %ecx, -16(%eax,%ebx,4) + mov [eax][ebx*4 - 2*8], ecx +// CHECK: movl %ecx, -16(%eax,%ebx,4) + mov [eax][4*ebx - 2*8], ecx +// CHECK: movl %ecx, -16(%eax,%ebx,4) + mov [eax + 4*ebx - 2*8], ecx +// CHECK: movl %ecx, -16(%eax,%ebx,4) + mov [12 + eax + (4*ebx) - 2*14], ecx +// CHECK: movl %ecx, -16(%eax,%ebx,4) + mov [eax][ebx*4 - 2*2*2*2], ecx +// CHECK: movl %ecx, -16(%eax,%ebx,4) + mov [eax][ebx*4 - (2*8)], ecx +// CHECK: movl %ecx, -16(%eax,%ebx,4) + mov [eax][ebx*4 - 2 * 8 + 4 - 4], ecx +// CHECK: movl %ecx, -16(%eax,%ebx,4) + mov [eax + ebx*4 - 2 * 8 + 4 - 4], ecx +// CHECK: movl %ecx, -16(%eax,%ebx,4) + mov [eax + ebx*4 - 2 * ((8 + 4) - 4)], ecx +// CHECK: movl %ecx, -16(%eax,%ebx,4) + mov [-2 * ((8 + 4) - 4) + eax + ebx*4], ecx +// CHECK: movl %ecx, -16(%eax,%ebx,4) + mov [((-2) * ((8 + 4) - 4)) + eax + ebx*4], ecx +// CHECK: movl %ecx, -16(%eax,%ebx,4) + mov [eax + ((-2) * ((8 + 4) - 4)) + ebx*4], ecx +// CHECK: movl %ecx, 96(%eax,%ebx,4) + mov [eax + ((-2) * ((8 + 4) * -4)) + ebx*4], ecx +// CHECK: movl %ecx, -8(%eax,%ebx,4) + mov [eax][-8][ebx*4], ecx +// CHECK: movl %ecx, -2(%eax,%ebx,4) + mov [eax][16/-8][ebx*4], ecx +// CHECK: movl %ecx, -2(%eax,%ebx,4) + mov [eax][(16)/-8][ebx*4], ecx + +// CHECK: setb %al + setc al +// CHECK: sete %al + setz al +// CHECK: setbe %al + setna al +// CHECK: setae %al + setnb al +// CHECK: setae %al + setnc al +// CHECK: setle %al + setng al +// CHECK: setge %al + setnl al +// CHECK: setne %al + setnz al +// CHECK: setp %al + setpe al +// CHECK: setnp %al + setpo al +// CHECK: setb %al + setnae al +// CHECK: seta %al + setnbe al +// CHECK: setl %al + setnge al +// CHECK: setg %al + setnle al +// CHECK: jne _foo + jnz _foo + ret diff --git a/test/MC/X86/x86-32-ms-inline-asm.s b/test/MC/X86/x86-32-ms-inline-asm.s index 5524c70..d912915 100644 --- a/test/MC/X86/x86-32-ms-inline-asm.s +++ b/test/MC/X86/x86-32-ms-inline-asm.s @@ -57,6 +57,26 @@ _t21: ## @t21 // CHECK: movl 4(%esi,%eax,2), %eax // CHECK: # encoding: [0x8b,0x44,0x46,0x04] + mov eax, 4[esi + 2*eax + 4] +// CHECK: movl 8(%esi,%eax,2), %eax +// CHECK: # encoding: [0x8b,0x44,0x46,0x08] + mov eax, 4[esi][2*eax + 4] +// CHECK: movl 8(%esi,%eax,2), %eax +// CHECK: # encoding: [0x8b,0x44,0x46,0x08] + mov eax, 4[esi + 2*eax][4] +// CHECK: movl 8(%esi,%eax,2), %eax +// CHECK: # encoding: [0x8b,0x44,0x46,0x08] + mov eax, 4[esi][2*eax][4] +// CHECK: movl 8(%esi,%eax,2), %eax +// CHECK: # encoding: [0x8b,0x44,0x46,0x08] + mov eax, 4[esi][2*eax][4][8] +// CHECK: movl 16(%esi,%eax,2), %eax +// CHECK: # encoding: [0x8b,0x44,0x46,0x10] + + prefetchnta 64[eax] +// CHECK: prefetchnta 64(%eax) +// CHECK: # encoding: [0x0f,0x18,0x40,0x40] + pusha // CHECK: pushal // CHECK: # encoding: [0x60] diff --git a/test/MC/X86/x86-64.s b/test/MC/X86/x86-64.s index c5f1d15..521a077 100644 --- a/test/MC/X86/x86-64.s +++ b/test/MC/X86/x86-64.s @@ -1228,3 +1228,11 @@ sysexitl // CHECK: sysexitq // CHECK: encoding: [0x48,0x0f,0x35] sysexitq + +// CHECK: clac +// CHECK: encoding: [0x0f,0x01,0xca] +clac + +// CHECK: stac +// CHECK: encoding: [0x0f,0x01,0xcb] +stac diff --git a/test/MC/X86/x86_64-rand-encoding.s b/test/MC/X86/x86_64-rand-encoding.s new file mode 100644 index 0000000..3a8cb81 --- /dev/null +++ b/test/MC/X86/x86_64-rand-encoding.s @@ -0,0 +1,49 @@ +// RUN: llvm-mc -triple x86_64-unknown-unknown --show-encoding %s | FileCheck %s + +// CHECK: rdrandw %ax +// CHECK: encoding: [0x66,0x0f,0xc7,0xf0] + rdrand %ax + +// CHECK: rdrandl %eax +// CHECK: encoding: [0x0f,0xc7,0xf0] + rdrand %eax + +// CHECK: rdrandq %rax +// CHECK: encoding: [0x48,0x0f,0xc7,0xf0] + rdrand %rax + +// CHECK: rdrandw %r11w +// CHECK: encoding: [0x66,0x41,0x0f,0xc7,0xf3] + rdrand %r11w + +// CHECK: rdrandl %r11d +// CHECK: encoding: [0x41,0x0f,0xc7,0xf3] + rdrand %r11d + +// CHECK: rdrandq %r11 +// CHECK: encoding: [0x49,0x0f,0xc7,0xf3] + rdrand %r11 + +// CHECK: rdseedw %ax +// CHECK: encoding: [0x66,0x0f,0xc7,0xf8] + rdseed %ax + +// CHECK: rdseedl %eax +// CHECK: encoding: [0x0f,0xc7,0xf8] + rdseed %eax + +// CHECK: rdseedq %rax +// CHECK: encoding: [0x48,0x0f,0xc7,0xf8] + rdseed %rax + +// CHECK: rdseedw %r11w +// CHECK: encoding: [0x66,0x41,0x0f,0xc7,0xfb] + rdseed %r11w + +// CHECK: rdseedl %r11d +// CHECK: encoding: [0x41,0x0f,0xc7,0xfb] + rdseed %r11d + +// CHECK: rdseedq %r11 +// CHECK: encoding: [0x49,0x0f,0xc7,0xfb] + rdseed %r11 diff --git a/test/MC/X86/x86_64-rtm-encoding.s b/test/MC/X86/x86_64-rtm-encoding.s index 44d6bac..d9975d6 100644 --- a/test/MC/X86/x86_64-rtm-encoding.s +++ b/test/MC/X86/x86_64-rtm-encoding.s @@ -8,6 +8,10 @@ // CHECK: encoding: [0x0f,0x01,0xd5] xend +// CHECK: xtest +// CHECK: encoding: [0x0f,0x01,0xd6] + xtest + // CHECK: xabort // CHECK: encoding: [0xc6,0xf8,0x0d] xabort $13 diff --git a/test/Makefile b/test/Makefile index bd6b672..2213319 100644 --- a/test/Makefile +++ b/test/Makefile @@ -60,6 +60,11 @@ endif ifeq ($(shell test -f $(PROJ_OBJ_DIR)/../tools/clang/tools/extra/Makefile && echo OK), OK) LIT_ALL_TESTSUITES += $(PROJ_OBJ_DIR)/../tools/clang/tools/extra/test + +# Force creation of Clang Tools' lit.site.cfg. +clang-tools-site-cfg: FORCE + $(MAKE) -C $(PROJ_OBJ_DIR)/../tools/clang/tools/extra/test lit.site.cfg +extra-site-cfgs:: clang-tools-site-cfg endif endif endif @@ -95,13 +100,6 @@ check-local-all:: lit.site.cfg Unit/lit.site.cfg extra-site-cfgs clean:: $(RM) -rf `find $(LLVM_OBJ_ROOT)/test -name Output -type d -print` -# dsymutil is used on the Darwin to manipulate DWARF debugging information. -ifeq ($(TARGET_OS),Darwin) -DSYMUTIL=dsymutil -else -DSYMUTIL=true -endif - ifneq ($(OCAMLOPT),) CC_FOR_OCAMLOPT := $(shell $(OCAMLOPT) -config | grep native_c_compiler | sed -e 's/native_c_compiler: //') CXX_FOR_OCAMLOPT := $(subst gcc,g++,$(CC_FOR_OCAMLOPT)) @@ -143,6 +141,7 @@ lit.site.cfg: FORCE @$(ECHOPATH) s=@LLVM_BINDINGS@=$(BINDINGS_TO_BUILD)=g >> lit.tmp @$(ECHOPATH) s=@HOST_OS@=$(HOST_OS)=g >> lit.tmp @$(ECHOPATH) s=@HOST_ARCH@=$(HOST_ARCH)=g >> lit.tmp + @$(ECHOPATH) s=@HAVE_LIBZ@=$(HAVE_LIBZ)=g >> lit.tmp @sed -f lit.tmp $(PROJ_SRC_DIR)/lit.site.cfg.in > $@ @-rm -f lit.tmp diff --git a/test/Makefile.tests b/test/Makefile.tests index aeb5871..c60c90c 100644 --- a/test/Makefile.tests +++ b/test/Makefile.tests @@ -38,7 +38,7 @@ LCCFLAGS += -O2 -Wall LCXXFLAGS += -O2 -Wall LLCFLAGS = TESTRUNR = @echo Running test: $<; \ - PATH="$(LLVMTOOLCURRENT):$(LLVM_SRC_ROOT)/test/Scripts:$(PATH)" \ + PATH="$(LLVMTOOLCURRENT):$(PATH)" \ $(LLVM_SRC_ROOT)/test/TestRunner.sh LLCLIBS := $(LLCLIBS) -lm diff --git a/test/Object/ARM/lit.local.cfg b/test/Object/ARM/lit.local.cfg new file mode 100644 index 0000000..5fc35d8 --- /dev/null +++ b/test/Object/ARM/lit.local.cfg @@ -0,0 +1,3 @@ +targets = set(config.root.targets_to_build.split()) +if not 'ARM' in targets: + config.unsupported = True diff --git a/test/Object/ARM/objdump-thumb.test b/test/Object/ARM/objdump-thumb.test new file mode 100644 index 0000000..9c92a27 --- /dev/null +++ b/test/Object/ARM/objdump-thumb.test @@ -0,0 +1,4 @@ +RUN: llvm-objdump -d -macho -triple=thumbv7-apple-ios \ +RUN: %p/../Inputs/macho-text.thumb | FileCheck %s + +CHECK: 0: 00 bf nop diff --git a/test/Object/ARM/symbol-addr.ll b/test/Object/ARM/symbol-addr.ll new file mode 100644 index 0000000..6bcbde9 --- /dev/null +++ b/test/Object/ARM/symbol-addr.ll @@ -0,0 +1,12 @@ +; RUN: llc %s -mtriple=arm-unknown-unknown -filetype=obj -o - \ +; RUN: | llvm-objdump -t - | FileCheck %s +; RUN: llc %s -mtriple=thumb-unknown-unknown -filetype=obj -o - \ +; RUN: | llvm-objdump -t - | FileCheck %s + +; Check that the symbol address does not include the ARM/Thumb instruction +; indicator bit. +; CHECK: 00000000 g F .text {{[0-9]+}} test + +define i32 @test() { + ret i32 1 +} diff --git a/test/Object/Inputs/COFF/i386.yaml b/test/Object/Inputs/COFF/i386.yaml index ca90222..7c34806 100644 --- a/test/Object/Inputs/COFF/i386.yaml +++ b/test/Object/Inputs/COFF/i386.yaml @@ -1,5 +1,6 @@ header: !Header Machine: IMAGE_FILE_MACHINE_I386 # (0x14c) + Characteristics: [ IMAGE_FILE_DEBUG_STRIPPED ] sections: - !Section @@ -37,7 +38,7 @@ symbols: ComplexType: IMAGE_SYM_DTYPE_NULL # (0) StorageClass: IMAGE_SYM_CLASS_STATIC # (3) NumberOfAuxSymbols: 1 - AuxillaryData: !hex "240000000300000000000000010000000000" # |$.................| + AuxiliaryData: !hex "240000000300000000000000010000000000" # |$.................| - !Symbol Name: .data @@ -47,7 +48,7 @@ symbols: ComplexType: IMAGE_SYM_DTYPE_NULL # (0) StorageClass: IMAGE_SYM_CLASS_STATIC # (3) NumberOfAuxSymbols: 1 - AuxillaryData: !hex "0D0000000000000000000000020000000000" # |..................| + AuxiliaryData: !hex "0D0000000000000000000000020000000000" # |..................| - !Symbol Name: _main diff --git a/test/Object/Inputs/COFF/x86-64.yaml b/test/Object/Inputs/COFF/x86-64.yaml index 0b1265f..837663b 100644 --- a/test/Object/Inputs/COFF/x86-64.yaml +++ b/test/Object/Inputs/COFF/x86-64.yaml @@ -37,7 +37,7 @@ symbols: ComplexType: IMAGE_SYM_DTYPE_NULL # (0) StorageClass: IMAGE_SYM_CLASS_STATIC # (3) NumberOfAuxSymbols: 1 - AuxillaryData: !hex "260000000300000000000000010000000000" # |&.................| + AuxiliaryData: !hex "260000000300000000000000010000000000" # |&.................| - !Symbol Name: .data @@ -47,7 +47,7 @@ symbols: ComplexType: IMAGE_SYM_DTYPE_NULL # (0) StorageClass: IMAGE_SYM_CLASS_STATIC # (3) NumberOfAuxSymbols: 1 - AuxillaryData: !hex "0D0000000000000000000000020000000000" # |..................| + AuxiliaryData: !hex "0D0000000000000000000000020000000000" # |..................| - !Symbol Name: main diff --git a/test/Object/Inputs/hello-world.elf-x86-64 b/test/Object/Inputs/hello-world.elf-x86-64 Binary files differnew file mode 100755 index 0000000..16092b89 --- /dev/null +++ b/test/Object/Inputs/hello-world.elf-x86-64 diff --git a/test/Object/Inputs/macho-text.thumb b/test/Object/Inputs/macho-text.thumb Binary files differnew file mode 100644 index 0000000..b29428a --- /dev/null +++ b/test/Object/Inputs/macho-text.thumb diff --git a/test/Object/Inputs/trivial-object-test.elf-mips64el b/test/Object/Inputs/trivial-object-test.elf-mips64el Binary files differnew file mode 100644 index 0000000..5ad9ba3 --- /dev/null +++ b/test/Object/Inputs/trivial-object-test.elf-mips64el diff --git a/test/Object/Mips/feature.test b/test/Object/Mips/feature.test index e8da609..3403014 100644 --- a/test/Object/Mips/feature.test +++ b/test/Object/Mips/feature.test @@ -2,10 +2,12 @@ RUN: llvm-objdump -disassemble -triple mips64el -mattr +mips64r2 %p/../Inputs/de RUN: | FileCheck %s CHECK: Disassembly of section .text: -CHECK: .text: +CHECK: dext: CHECK: 0: 08 00 e0 03 jr $ra CHECK: 4: 43 49 82 7c dext $2, $4, 5, 10 +CHECK: dextu: CHECK: 8: 08 00 e0 03 jr $ra CHECK: c: 83 28 82 7c dext $2, $4, 2, 6 +CHECK: dextm: CHECK: 10: 08 00 e0 03 jr $ra CHECK: 14: 43 09 82 7c dext $2, $4, 5, 2 diff --git a/test/Object/lit.local.cfg b/test/Object/lit.local.cfg index df9b335..b2439b2 100644 --- a/test/Object/lit.local.cfg +++ b/test/Object/lit.local.cfg @@ -1 +1 @@ -config.suffixes = ['.test'] +config.suffixes = ['.test', '.ll'] diff --git a/test/Object/nm-trivial-object.test b/test/Object/nm-trivial-object.test index 8fd1c04..5c3cc31 100644 --- a/test/Object/nm-trivial-object.test +++ b/test/Object/nm-trivial-object.test @@ -1,7 +1,7 @@ RUN: yaml2obj %p/Inputs/COFF/i386.yaml | llvm-nm \ RUN: | FileCheck %s -check-prefix COFF RUN: yaml2obj %p/Inputs/COFF/x86-64.yaml | llvm-nm \ -RUN | FileCheck %s -check-prefix COFF +RUN: | FileCheck %s -check-prefix COFF RUN: llvm-nm %p/Inputs/trivial-object-test.elf-i386 \ RUN: | FileCheck %s -check-prefix ELF RUN: llvm-nm %p/Inputs/trivial-object-test.elf-x86-64 \ diff --git a/test/Object/obj2yaml.test b/test/Object/obj2yaml.test new file mode 100644 index 0000000..0d96fd2 --- /dev/null +++ b/test/Object/obj2yaml.test @@ -0,0 +1,170 @@ +RUN: obj2yaml %p/Inputs/trivial-object-test.coff-i386 | FileCheck %s --check-prefix COFF-I386 +RUN: obj2yaml %p/Inputs/trivial-object-test.coff-x86-64 | FileCheck %s --check-prefix COFF-X86-64 + + +COFF-I386: header: !Header +COFF-I386-NEXT: Machine: IMAGE_FILE_MACHINE_I386 # (0x14c) + +COFF-I386: sections: +COFF-I386-NEXT: - !Section +COFF-I386-NEXT: Name: .text +COFF-I386-NEXT: Characteristics: [IMAGE_SCN_CNT_CODE, IMAGE_SCN_ALIGN_16BYTES, IMAGE_SCN_MEM_EXECUTE, IMAGE_SCN_MEM_READ, ] # 0x60500020 +COFF-I386-NEXT: SectionData: !hex "83EC0CC744240800000000C7042400000000E800000000E8000000008B44240883C40CC3" # |....D$.......$...............D$.....| + +COFF-I386: Relocations: +COFF-I386-NEXT: - !Relocation +COFF-I386-NEXT: VirtualAddress: 0xe +COFF-I386-NEXT: SymbolTableIndex: 5 +COFF-I386-NEXT: Type: IMAGE_REL_I386_DIR32 + +COFF-I386: - !Relocation +COFF-I386-NEXT: VirtualAddress: 0x13 +COFF-I386-NEXT: SymbolTableIndex: 6 +COFF-I386-NEXT: Type: IMAGE_REL_I386_REL32 + +COFF-I386: - !Relocation +COFF-I386-NEXT: VirtualAddress: 0x18 +COFF-I386-NEXT: SymbolTableIndex: 7 +COFF-I386-NEXT: Type: IMAGE_REL_I386_REL32 + +COFF-I386: - !Section +COFF-I386-NEXT: Name: .data +COFF-I386-NEXT: Characteristics: [IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_ALIGN_1BYTES, IMAGE_SCN_MEM_READ, IMAGE_SCN_MEM_WRITE, ] # 0xc0100040 +COFF-I386-NEXT: SectionData: !hex "48656C6C6F20576F726C642100" # |Hello World!.| + +COFF-I386: symbols: +COFF-I386-NEXT: - !Symbol +COFF-I386-NEXT: Name: .text +COFF-I386-NEXT: Value: 0 +COFF-I386-NEXT: SectionNumber: 1 +COFF-I386-NEXT: SimpleType: IMAGE_SYM_TYPE_NULL # (0) +COFF-I386-NEXT: ComplexType: IMAGE_SYM_DTYPE_NULL # (0) +COFF-I386-NEXT: StorageClass: IMAGE_SYM_CLASS_STATIC # (3) +COFF-I386-NEXT: NumberOfAuxSymbols: 1 +COFF-I386-NEXT: AuxillaryData: !hex "240000000300000000000000010000000000" # |$.................| + +COFF-I386: - !Symbol +COFF-I386-NEXT: Name: .data +COFF-I386-NEXT: Value: 0 +COFF-I386-NEXT: SectionNumber: 2 +COFF-I386-NEXT: SimpleType: IMAGE_SYM_TYPE_NULL # (0) +COFF-I386-NEXT: ComplexType: IMAGE_SYM_DTYPE_NULL # (0) +COFF-I386-NEXT: StorageClass: IMAGE_SYM_CLASS_STATIC # (3) +COFF-I386-NEXT: NumberOfAuxSymbols: 1 +COFF-I386-NEXT: AuxillaryData: !hex "0D0000000000000000000000020000000000" # |..................| + +COFF-I386: - !Symbol +COFF-I386-NEXT: Name: _main +COFF-I386-NEXT: Value: 0 +COFF-I386-NEXT: SectionNumber: 1 +COFF-I386-NEXT: SimpleType: IMAGE_SYM_TYPE_NULL # (0) +COFF-I386-NEXT: ComplexType: IMAGE_SYM_DTYPE_FUNCTION # (2) +COFF-I386-NEXT: StorageClass: IMAGE_SYM_CLASS_EXTERNAL # (2) + +COFF-I386: - !Symbol +COFF-I386-NEXT: Name: L_.str +COFF-I386-NEXT: Value: 0 +COFF-I386-NEXT: SectionNumber: 2 +COFF-I386-NEXT: SimpleType: IMAGE_SYM_TYPE_NULL # (0) +COFF-I386-NEXT: ComplexType: IMAGE_SYM_DTYPE_NULL # (0) +COFF-I386-NEXT: StorageClass: IMAGE_SYM_CLASS_STATIC # (3) + +COFF-I386: - !Symbol +COFF-I386-NEXT: Name: _puts +COFF-I386-NEXT: Value: 0 +COFF-I386-NEXT: SectionNumber: 0 +COFF-I386-NEXT: SimpleType: IMAGE_SYM_TYPE_NULL # (0) +COFF-I386-NEXT: ComplexType: IMAGE_SYM_DTYPE_NULL # (0) +COFF-I386-NEXT: StorageClass: IMAGE_SYM_CLASS_EXTERNAL # (2) + +COFF-I386: - !Symbol +COFF-I386-NEXT: Name: _SomeOtherFunction +COFF-I386-NEXT: Value: 0 +COFF-I386-NEXT: SectionNumber: 0 +COFF-I386-NEXT: SimpleType: IMAGE_SYM_TYPE_NULL # (0) +COFF-I386-NEXT: ComplexType: IMAGE_SYM_DTYPE_NULL # (0) +COFF-I386-NEXT: StorageClass: IMAGE_SYM_CLASS_EXTERNAL # (2) + + +COFF-X86-64: header: !Header +COFF-X86-64-NEXT: Machine: IMAGE_FILE_MACHINE_AMD64 # (0x8664) + +COFF-X86-64: sections: +COFF-X86-64-NEXT: - !Section +COFF-X86-64-NEXT: Name: .text +COFF-X86-64-NEXT: Characteristics: [IMAGE_SCN_CNT_CODE, IMAGE_SCN_ALIGN_16BYTES, IMAGE_SCN_MEM_EXECUTE, IMAGE_SCN_MEM_READ, ] # 0x60500020 +COFF-X86-64-NEXT: SectionData: !hex "4883EC28C744242400000000488D0D00000000E800000000E8000000008B4424244883C428C3" # |H..(.D$$....H.................D$$H..(.| + +COFF-X86-64: Relocations: +COFF-X86-64-NEXT: - !Relocation +COFF-X86-64-NEXT: VirtualAddress: 0xf +COFF-X86-64-NEXT: SymbolTableIndex: 5 +COFF-X86-64-NEXT: Type: IMAGE_REL_AMD64_REL32 + +COFF-X86-64: - !Relocation +COFF-X86-64-NEXT: VirtualAddress: 0x14 +COFF-X86-64-NEXT: SymbolTableIndex: 6 +COFF-X86-64-NEXT: Type: IMAGE_REL_AMD64_REL32 + +COFF-X86-64: - !Relocation +COFF-X86-64-NEXT: VirtualAddress: 0x19 +COFF-X86-64-NEXT: SymbolTableIndex: 7 +COFF-X86-64-NEXT: Type: IMAGE_REL_AMD64_REL32 + +COFF-X86-64: - !Section +COFF-X86-64-NEXT: Name: .data +COFF-X86-64-NEXT: Characteristics: [IMAGE_SCN_CNT_INITIALIZED_DATA, IMAGE_SCN_ALIGN_1BYTES, IMAGE_SCN_MEM_READ, IMAGE_SCN_MEM_WRITE, ] # 0xc0100040 +COFF-X86-64-NEXT: SectionData: !hex "48656C6C6F20576F726C642100" # |Hello World!.| + +COFF-X86-64: symbols: +COFF-X86-64-NEXT: - !Symbol +COFF-X86-64-NEXT: Name: .text +COFF-X86-64-NEXT: Value: 0 +COFF-X86-64-NEXT: SectionNumber: 1 +COFF-X86-64-NEXT: SimpleType: IMAGE_SYM_TYPE_NULL # (0) +COFF-X86-64-NEXT: ComplexType: IMAGE_SYM_DTYPE_NULL # (0) +COFF-X86-64-NEXT: StorageClass: IMAGE_SYM_CLASS_STATIC # (3) +COFF-X86-64-NEXT: NumberOfAuxSymbols: 1 +COFF-X86-64-NEXT: AuxillaryData: !hex "260000000300000000000000010000000000" # |&.................| + +COFF-X86-64: - !Symbol +COFF-X86-64-NEXT: Name: .data +COFF-X86-64-NEXT: Value: 0 +COFF-X86-64-NEXT: SectionNumber: 2 +COFF-X86-64-NEXT: SimpleType: IMAGE_SYM_TYPE_NULL # (0) +COFF-X86-64-NEXT: ComplexType: IMAGE_SYM_DTYPE_NULL # (0) +COFF-X86-64-NEXT: StorageClass: IMAGE_SYM_CLASS_STATIC # (3) +COFF-X86-64-NEXT: NumberOfAuxSymbols: 1 +COFF-X86-64-NEXT: AuxillaryData: !hex "0D0000000000000000000000020000000000" # |..................| + +COFF-X86-64: - !Symbol +COFF-X86-64-NEXT: Name: main +COFF-X86-64-NEXT: Value: 0 +COFF-X86-64-NEXT: SectionNumber: 1 +COFF-X86-64-NEXT: SimpleType: IMAGE_SYM_TYPE_NULL # (0) +COFF-X86-64-NEXT: ComplexType: IMAGE_SYM_DTYPE_NULL # (0) +COFF-X86-64-NEXT: StorageClass: IMAGE_SYM_CLASS_EXTERNAL # (2) + +COFF-X86-64: - !Symbol +COFF-X86-64-NEXT: Name: L.str +COFF-X86-64-NEXT: Value: 0 +COFF-X86-64-NEXT: SectionNumber: 2 +COFF-X86-64-NEXT: SimpleType: IMAGE_SYM_TYPE_NULL # (0) +COFF-X86-64-NEXT: ComplexType: IMAGE_SYM_DTYPE_NULL # (0) +COFF-X86-64-NEXT: StorageClass: IMAGE_SYM_CLASS_STATIC # (3) + +COFF-X86-64: - !Symbol +COFF-X86-64-NEXT: Name: puts +COFF-X86-64-NEXT: Value: 0 +COFF-X86-64-NEXT: SectionNumber: 0 +COFF-X86-64-NEXT: SimpleType: IMAGE_SYM_TYPE_NULL # (0) +COFF-X86-64-NEXT: ComplexType: IMAGE_SYM_DTYPE_NULL # (0) +COFF-X86-64-NEXT: StorageClass: IMAGE_SYM_CLASS_EXTERNAL # (2) + +COFF-X86-64: - !Symbol +COFF-X86-64-NEXT: Name: SomeOtherFunction +COFF-X86-64-NEXT: Value: 0 +COFF-X86-64-NEXT: SectionNumber: 0 +COFF-X86-64-NEXT: SimpleType: IMAGE_SYM_TYPE_NULL # (0) +COFF-X86-64-NEXT: ComplexType: IMAGE_SYM_DTYPE_NULL # (0) +COFF-X86-64-NEXT: StorageClass: IMAGE_SYM_CLASS_EXTERNAL # (2) diff --git a/test/Object/objdump-relocations.test b/test/Object/objdump-relocations.test index 6d35a26..95c4c4d 100644 --- a/test/Object/objdump-relocations.test +++ b/test/Object/objdump-relocations.test @@ -8,6 +8,8 @@ RUN: llvm-objdump -r %p/Inputs/trivial-object-test.elf-x86-64 \ RUN: | FileCheck %s -check-prefix ELF-x86-64 RUN: llvm-objdump -r %p/Inputs/trivial-object-test.elf-hexagon \ RUN: | FileCheck %s -check-prefix ELF-hexagon +RUN: llvm-objdump -r %p/Inputs/trivial-object-test.elf-mips64el \ +RUN: | FileCheck %s -check-prefix ELF-MIPS64EL RUN: llvm-objdump -r %p/Inputs/relocations.elf-x86-64 \ RUN: | FileCheck %s -check-prefix ELF-complex-x86-64 @@ -40,6 +42,11 @@ ELF-hexagon: R_HEX_LO16 puts ELF-hexagon: R_HEX_B15_PCREL testf ELF-hexagon: R_HEX_B22_PCREL puts +// Note: this file was produced with gas to make sure we don't end up in a +// situation where LLVM produces and accepts a broken file. +ELF-MIPS64EL: .data +ELF-MIPS64EL: R_MIPS_64 + ELF-complex-x86-64: .text ELF-complex-x86-64-NEXT: R_X86_64_8 .data-4 ELF-complex-x86-64-NEXT: R_X86_64_16 .data-4 diff --git a/test/Object/objdump-section-content.test b/test/Object/objdump-section-content.test index f9c4f43..e0199b3 100644 --- a/test/Object/objdump-section-content.test +++ b/test/Object/objdump-section-content.test @@ -1,6 +1,8 @@ RUN: yaml2obj %p/Inputs/COFF/i386.yaml | llvm-objdump -s - | FileCheck %s -check-prefix COFF-i386 RUN: llvm-objdump -s %p/Inputs/trivial-object-test.elf-i386 \ RUN: | FileCheck %s -check-prefix ELF-i386 +RUN: llvm-objdump -s %p/Inputs/shared-object-test.elf-i386 \ +RUN: | FileCheck %s -check-prefix BSS COFF-i386: file format COFF-i386: Contents of section .text: @@ -17,3 +19,6 @@ ELF-i386: 0010 0000e8fc ffffffe8 fcffffff 8b442408 .............D$. ELF-i386: 0020 83c40cc3 .... ELF-i386: Contents of section .rodata.str1.1: ELF-i386: 0024 48656c6c 6f20576f 726c6421 00 Hello World!. + +BSS: Contents of section .bss: +BSS-NEXT: <skipping contents of bss section at [12c8, 12cc)> diff --git a/test/Object/readobj-elf-versioning.test b/test/Object/readobj-elf-versioning.test index 0906f34..1f09ef3 100644 --- a/test/Object/readobj-elf-versioning.test +++ b/test/Object/readobj-elf-versioning.test @@ -1,15 +1,46 @@ -RUN: llvm-readobj %p/Inputs/elf-versioning-test.i386 \ +RUN: llvm-readobj -dt %p/Inputs/elf-versioning-test.i386 \ RUN: | FileCheck %s -check-prefix ELF -RUN: llvm-readobj %p/Inputs/elf-versioning-test.i386 \ +RUN: llvm-readobj -dt %p/Inputs/elf-versioning-test.i386 \ RUN: | FileCheck %s -check-prefix ELF32 -RUN: llvm-readobj %p/Inputs/elf-versioning-test.x86_64 \ +RUN: llvm-readobj -dt %p/Inputs/elf-versioning-test.x86_64 \ RUN: | FileCheck %s -check-prefix ELF -RUN: llvm-readobj %p/Inputs/elf-versioning-test.x86_64 \ +RUN: llvm-readobj -dt %p/Inputs/elf-versioning-test.x86_64 \ RUN: | FileCheck %s -check-prefix ELF64 -ELF: foo@@VER2 FUNC {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} global -ELF: foo@VER1 FUNC {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} global -ELF: unversioned_define FUNC {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} global +ELF: DynamicSymbols [ +ELF: Symbol { +ELF: Name: foo@@VER2 +ELF: Binding: Global +ELF: Type: Function +ELF: Section: .text +ELF: } +ELF: Symbol { +ELF: Name: foo@VER1 +ELF: Binding: Global +ELF: Type: Function +ELF: Section: .text +ELF: } +ELF: Symbol { +ELF: Name: unversioned_define +ELF: Binding: Global +ELF: Type: Function +ELF: Section: .text +ELF: } +ELF: ] -ELF32: puts@GLIBC_2.0 FUNC {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} undef,global -ELF64: puts@GLIBC_2.2.5 FUNC {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} undef,global +ELF32: DynamicSymbols [ +ELF32: Symbol { +ELF32: Name: puts@GLIBC_2.0 +ELF32: Binding: Global +ELF32: Type: Function +ELF32: Section: (0x0) +ELF32: } +ELF32: ] +ELF64: DynamicSymbols [ +ELF64: Symbol { +ELF64: Name: puts@GLIBC_2.2.5 +ELF64: Binding: Global +ELF64: Type: Function +ELF64: Section: (0x0) +ELF64: } +ELF64: ] diff --git a/test/Object/readobj-shared-object.test b/test/Object/readobj-shared-object.test index 2c0b54d..72dbd32 100644 --- a/test/Object/readobj-shared-object.test +++ b/test/Object/readobj-shared-object.test @@ -1,92 +1,319 @@ -RUN: llvm-readobj %p/Inputs/shared-object-test.elf-i386 \ +RUN: llvm-readobj -s -t -dt -dynamic-table -needed-libs \ +RUN: %p/Inputs/shared-object-test.elf-i386 \ RUN: | FileCheck %s -check-prefix ELF -RUN: llvm-readobj %p/Inputs/shared-object-test.elf-i386 \ +RUN: llvm-readobj -s -t -dt -dynamic-table -needed-libs \ +RUN: %p/Inputs/shared-object-test.elf-i386 \ RUN: | FileCheck %s -check-prefix ELF32 -RUN: llvm-readobj %p/Inputs/shared-object-test.elf-x86-64 \ +RUN: llvm-readobj -s -t -dt -dynamic-table -needed-libs \ +RUN: %p/Inputs/shared-object-test.elf-x86-64 \ RUN: | FileCheck %s -check-prefix ELF -RUN: llvm-readobj %p/Inputs/shared-object-test.elf-x86-64 \ +RUN: llvm-readobj -s -t -dt -dynamic-table -needed-libs \ +RUN: %p/Inputs/shared-object-test.elf-x86-64 \ RUN: | FileCheck %s -check-prefix ELF64 -ELF64:File Format : ELF64-x86-64 -ELF64:Arch : x86_64 -ELF64:Address Size: 64 bits -ELF64:Load Name : libfoo.so +ELF64: Format: ELF64-x86-64 +ELF64: Arch: x86_64 +ELF64: AddressSize: 64bit +ELF64: LoadName: libfoo.so -ELF32:File Format : ELF32-i386 -ELF32:Arch : i386 -ELF32:Address Size: 32 bits -ELF32:Load Name : libfoo.so +ELF32: Format: ELF32-i386 +ELF32: Arch: i386 +ELF32: AddressSize: 32bit +ELF32: LoadName: libfoo.so -ELF:Symbols: -ELF: Name Type Address Size FileOffset Flags -ELF: .dynsym DBG {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} formatspecific -ELF: .dynstr DBG {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} formatspecific -ELF: .text DBG {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} formatspecific -ELF: .eh_frame DBG {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} formatspecific -ELF: .tdata DBG {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} formatspecific -ELF: .dynamic DBG {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} formatspecific -ELF: .got.plt DBG {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} formatspecific -ELF: .data DBG {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} formatspecific -ELF: .bss DBG {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} formatspecific -ELF: shared.ll FILE {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} absolute,formatspecific -ELF: local_func FUNC {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} -ELF: _GLOBAL_OFFSET_TABLE_ DATA {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} absolute -ELF: _DYNAMIC DATA {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} absolute -ELF: common_sym DATA {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} global -ELF: tls_sym DATA {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} global,threadlocal -ELF: defined_sym DATA {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} global -ELF: __bss_start ? {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} global,absolute -ELF: _end ? {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} global,absolute -ELF: global_func FUNC {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} global -ELF: _edata ? {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} global,absolute -ELF: Total: 21 +ELF: Sections [ +ELF: Section { +ELF: Name: (0) +ELF: Type: SHT_NULL +ELF: Flags [ (0x0) +ELF: ] +ELF: } +ELF: Section { +ELF: Name: .hash +ELF: Type: SHT_HASH +ELF: Flags [ (0x2) +ELF: SHF_ALLOC +ELF: ] +ELF: } +ELF: Section { +ELF: Name: .dynsym +ELF: Type: SHT_DYNSYM +ELF: Flags [ (0x2) +ELF: SHF_ALLOC +ELF: ] +ELF: } +ELF: Section { +ELF: Name: .dynstr +ELF: Type: SHT_STRTAB +ELF: Flags [ (0x2) +ELF: SHF_ALLOC +ELF: ] +ELF: } +ELF: Section { +ELF: Name: .text +ELF: Type: SHT_PROGBITS +ELF: Flags [ (0x6) +ELF: SHF_ALLOC +ELF: SHF_EXECINSTR +ELF: ] +ELF: } +ELF: Section { +ELF: Name: .eh_frame +ELF: Type: SHT_PROGBITS +ELF: Flags [ (0x2) +ELF: SHF_ALLOC +ELF: ] +ELF: } +ELF: Section { +ELF: Name: .tdata +ELF: Type: SHT_PROGBITS +ELF: Flags [ (0x403) +ELF: SHF_ALLOC +ELF: SHF_TLS +ELF: SHF_WRITE +ELF: ] +ELF: } +ELF: Section { +ELF: Name: .dynamic +ELF: Type: SHT_DYNAMIC +ELF: Flags [ (0x3) +ELF: SHF_ALLOC +ELF: SHF_WRITE +ELF: ] +ELF: } +ELF: Section { +ELF: Name: .got.plt +ELF: Type: SHT_PROGBITS +ELF: Flags [ (0x3) +ELF: SHF_ALLOC +ELF: SHF_WRITE +ELF: ] +ELF: } +ELF: Section { +ELF: Name: .data +ELF: Type: SHT_PROGBITS +ELF: Flags [ (0x3) +ELF: SHF_ALLOC +ELF: SHF_WRITE +ELF: ] +ELF: } +ELF: Section { +ELF: Name: .bss +ELF: Type: SHT_NOBITS +ELF: Flags [ (0x3) +ELF: SHF_ALLOC +ELF: SHF_WRITE +ELF: ] +ELF: } +ELF: Section { +ELF: Name: .shstrtab +ELF: Type: SHT_STRTAB +ELF: Flags [ (0x0) +ELF: ] +ELF: } +ELF: Section { +ELF: Name: .symtab +ELF: Type: SHT_SYMTAB +ELF: Flags [ (0x0) +ELF: ] +ELF: } +ELF: Section { +ELF: Name: .strtab +ELF: Type: SHT_STRTAB +ELF: Flags [ (0x0) +ELF: ] +ELF: } +ELF: ] -ELF:Dynamic Symbols: -ELF: Name Type Address Size FileOffset Flags -ELF: common_sym DATA {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} global -ELF: tls_sym DATA {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} global,threadlocal -ELF: defined_sym DATA {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} global -ELF: __bss_start ? {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} global,absolute -ELF: _end ? {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} global,absolute -ELF: global_func FUNC {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} global -ELF: _edata ? {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} global,absolute -ELF: Total: {{[0-9a-f]+}} +ELF: Symbols [ +ELF: Symbol { +ELF: Name: .hash +ELF: Binding: Local +ELF: Type: Section +ELF: Section: .hash +ELF: } +ELF: Symbol { +ELF: Name: .dynsym +ELF: Binding: Local +ELF: Type: Section +ELF: Section: .dynsym +ELF: } +ELF: Symbol { +ELF: Name: .dynstr +ELF: Binding: Local +ELF: Type: Section +ELF: Section: .dynstr +ELF: } +ELF: Symbol { +ELF: Name: .text +ELF: Binding: Local +ELF: Type: Section +ELF: Section: .text +ELF: } +ELF: Symbol { +ELF: Name: .eh_frame +ELF: Binding: Local +ELF: Type: Section +ELF: Section: .eh_frame +ELF: } +ELF: Symbol { +ELF: Name: .tdata +ELF: Binding: Local +ELF: Type: Section +ELF: Section: .tdata +ELF: } +ELF: Symbol { +ELF: Name: .dynamic +ELF: Binding: Local +ELF: Type: Section +ELF: Section: .dynamic +ELF: } +ELF: Symbol { +ELF: Name: .got.plt +ELF: Binding: Local +ELF: Type: Section +ELF: Section: .got.plt +ELF: } +ELF: Symbol { +ELF: Name: .data +ELF: Binding: Local +ELF: Type: Section +ELF: Section: .data +ELF: } +ELF: Symbol { +ELF: Name: .bss +ELF: Binding: Local +ELF: Type: Section +ELF: Section: .bss +ELF: } +ELF: Symbol { +ELF: Name: shared.ll +ELF: Binding: Local +ELF: Type: File +ELF: Section: (0xFFF1) +ELF: } +ELF: Symbol { +ELF: Name: local_func +ELF: Binding: Local +ELF: Type: Function +ELF: Section: .text +ELF: } +ELF: Symbol { +ELF: Name: _GLOBAL_OFFSET_TABLE_ +ELF: Binding: Local +ELF: Type: Object +ELF: Section: (0xFFF1) +ELF: } +ELF: Symbol { +ELF: Name: _DYNAMIC +ELF: Binding: Local +ELF: Type: Object +ELF: Section: (0xFFF1) +ELF: } +ELF: Symbol { +ELF: Name: common_sym +ELF: Binding: Global +ELF: Type: Object +ELF: Section: .bss +ELF: } +ELF: Symbol { +ELF: Name: tls_sym +ELF: Binding: Global +ELF: Type: TLS +ELF: Section: .tdata +ELF: } +ELF: Symbol { +ELF: Name: defined_sym +ELF: Binding: Global +ELF: Type: Object +ELF: Section: .data +ELF: } +ELF: Symbol { +ELF: Name: __bss_start +ELF: Binding: Global +ELF: Type: None +ELF: Section: (0xFFF1) +ELF: } +ELF: Symbol { +ELF: Name: _end +ELF: Binding: Global +ELF: Type: None +ELF: Section: (0xFFF1) +ELF: } +ELF: Symbol { +ELF: Name: global_func +ELF: Binding: Global +ELF: Type: Function +ELF: Section: .text +ELF: } +ELF: Symbol { +ELF: Name: _edata +ELF: Binding: Global +ELF: Type: None +ELF: Section: (0xFFF1) +ELF: } +ELF: ] -ELF:Sections: -ELF: Name Address Size Align Flags -ELF: {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} rodata -ELF: .hash {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} required,rodata -ELF: .dynsym {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} required,rodata -ELF: .dynstr {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} required,rodata -ELF: .text {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} text,{{(data,)?}}required -ELF: .eh_frame {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} data,required,rodata -ELF: .tdata {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} data,required -ELF: .dynamic {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} required -ELF: .got.plt {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} data,required -ELF: .data {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} data,required -ELF: .bss {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} bss,required,virtual,zeroinit -ELF: .shstrtab {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} rodata -ELF: .symtab {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} rodata -ELF: .strtab {{[0-9a-f]+}} {{[0-9a-f]+}} {{[0-9a-f]+}} rodata -ELF: Total: 14 - -ELF:Dynamic section contains 9 entries -ELF: Tag Type Name/Value -ELF: 00000001 (NEEDED) Shared library: [libc.so.6] -ELF: 00000001 (NEEDED) Shared library: [libm.so.6] -ELF: 0000000e (SONAME) Library soname: [libfoo.so] -ELF: 00000004 (HASH) {{[0-9a-f]+}} -ELF: 00000005 (STRTAB) {{[0-9a-f]+}} -ELF: 00000006 (SYMTAB) {{[0-9a-f]+}} -ELF: 0000000a (STRSZ) {{[0-9]+}} (bytes) -ELF: 0000000b (SYMENT) {{[0-9]+}} (bytes) -ELF: 00000000 (NULL) 0x0 -ELF: Total: 9 - -ELF:Libraries needed: -ELF: libc.so.6 -ELF: libm.so.6 -ELF: Total: 2 +ELF: DynamicSymbols [ +ELF: Symbol { +ELF: Name: common_sym +ELF: Binding: Global +ELF: Type: Object +ELF: Section: .bss +ELF: } +ELF: Symbol { +ELF: Name: tls_sym +ELF: Binding: Global +ELF: Type: TLS +ELF: Section: .tdata +ELF: } +ELF: Symbol { +ELF: Name: defined_sym +ELF: Binding: Global +ELF: Type: Object +ELF: Section: .data +ELF: } +ELF: Symbol { +ELF: Name: __bss_start +ELF: Binding: Global +ELF: Type: None +ELF: Section: (0xFFF1) +ELF: } +ELF: Symbol { +ELF: Name: _end +ELF: Binding: Global +ELF: Type: None +ELF: Section: (0xFFF1) +ELF: } +ELF: Symbol { +ELF: Name: global_func +ELF: Binding: Global +ELF: Type: Function +ELF: Section: .text +ELF: } +ELF: Symbol { +ELF: Name: _edata +ELF: Binding: Global +ELF: Type: None +ELF: Section: (0xFFF1) +ELF: } +ELF: ] +ELF: DynamicSection [ (9 entries) +ELF: Tag Type Name/Value +ELF: 00000001 NEEDED SharedLibrary (libc.so.6) +ELF: 00000001 NEEDED SharedLibrary (libm.so.6) +ELF: 0000000E SONAME LibrarySoname (libfoo.so) +ELF: 00000004 HASH {{[0-9a-f]+}} +ELF: 00000005 STRTAB {{[0-9a-f]+}} +ELF: 00000006 SYMTAB {{[0-9a-f]+}} +ELF: 0000000A STRSZ {{[0-9]+}} (bytes) +ELF: 0000000B SYMENT {{[0-9]+}} (bytes) +ELF: 00000000 NULL 0x0 +ELF: ] +ELF: NeededLibraries [ +ELF-NEXT: libc.so.6 +ELF-NEXT: libm.so.6 +ELF-NEXT: ] diff --git a/test/Object/relocation-executable.test b/test/Object/relocation-executable.test new file mode 100644 index 0000000..98f5b4e --- /dev/null +++ b/test/Object/relocation-executable.test @@ -0,0 +1,18 @@ +RUN: llvm-readobj -r -expand-relocs %p/Inputs/hello-world.elf-x86-64 \ +RUN: | FileCheck %s + +// CHECK: Relocations [ +// CHECK: Section (11) .plt { +// CHECK-NEXT: Relocation { +// CHECK-NEXT: Offset: 0x4018F8 +// CHECK-NEXT: Type: R_X86_64_JUMP_SLOT (7) +// CHECK-NEXT: Symbol: __libc_start_main +// CHECK-NEXT: Info: 0x0 +// CHECK-NEXT: } +// CHECK-NEXT: Relocation { +// CHECK-NEXT: Offset: 0x401900 +// CHECK-NEXT: Type: R_X86_64_JUMP_SLOT (7) +// CHECK-NEXT: Symbol: puts +// CHECK-NEXT: Info: 0x0 +// CHECK-NEXT: } +// CHECK-NEXT: } diff --git a/test/Object/yaml2obj-readobj.test b/test/Object/yaml2obj-readobj.test new file mode 100644 index 0000000..3031f5e --- /dev/null +++ b/test/Object/yaml2obj-readobj.test @@ -0,0 +1,25 @@ +RUN: yaml2obj %p/Inputs/COFF/i386.yaml | llvm-readobj -file-headers -relocations -expand-relocs - | FileCheck %s --check-prefix COFF-I386 + +// COFF-I386: Characteristics [ (0x200) +// COFF-I386-NEXT: IMAGE_FILE_DEBUG_STRIPPED (0x200) +// COFF-I386-NEXT: ] + +// COFF-I386: Relocations [ +// COFF-I386-NEXT: Section (1) .text { +// COFF-I386-NEXT: Relocation { +// COFF-I386-NEXT: Offset: 0xE +// COFF-I386-NEXT: Type: IMAGE_REL_I386_DIR32 (6) +// COFF-I386-NEXT: Symbol: L_.str +// COFF-I386-NEXT: } +// COFF-I386-NEXT: Relocation { +// COFF-I386-NEXT: Offset: 0x13 +// COFF-I386-NEXT: Type: IMAGE_REL_I386_REL32 (20) +// COFF-I386-NEXT: Symbol: _puts +// COFF-I386-NEXT: } +// COFF-I386-NEXT: Relocation { +// COFF-I386-NEXT: Offset: 0x18 +// COFF-I386-NEXT: Type: IMAGE_REL_I386_REL32 (20) +// COFF-I386-NEXT: Symbol: _SomeOtherFunction +// COFF-I386-NEXT: } +// COFF-I386-NEXT: } +// COFF-I386-NEXT: ] diff --git a/test/Other/attribute-comment.ll b/test/Other/attribute-comment.ll new file mode 100644 index 0000000..7354e7f --- /dev/null +++ b/test/Other/attribute-comment.ll @@ -0,0 +1,9 @@ +; RUN: opt -S < %s | FileCheck %s -strict-whitespace + +; CHECK: {{^}}; Function Attrs: nounwind readnone ssp uwtable{{$}} +; CHECK-NEXT: define void @test1() #0 +define void @test1() #0 { + ret void +} + +attributes #0 = { nounwind ssp "less-precise-fpmad"="false" uwtable "no-frame-pointer-elim"="true" readnone "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } diff --git a/test/Scripts/README.txt b/test/Scripts/README.txt deleted file mode 100644 index b0b1105..0000000 --- a/test/Scripts/README.txt +++ /dev/null @@ -1,2 +0,0 @@ -This directory contains scripts which are used by the TestRunner style -tests, which allows them to be simpler and more direct. diff --git a/test/Scripts/coff-dump.py b/test/Scripts/coff-dump.py deleted file mode 100755 index 36ec539..0000000 --- a/test/Scripts/coff-dump.py +++ /dev/null @@ -1,590 +0,0 @@ -#!/usr/bin/env python -#===-- coff-dump.py - COFF object file dump utility-------------------------===# -# -# The LLVM Compiler Infrastructure -# -# This file is distributed under the University of Illinois Open Source -# License. See LICENSE.TXT for details. -# -#===------------------------------------------------------------------------===# - -# -# COFF File Definition -# - -def string_table_entry (offset): - return ('ptr', '+ + PointerToSymbolTable * NumberOfSymbols 18 %s' % offset, ('scalar', 'cstr', '%s')) - -def secname(value): - if value[0] == '/': - return string_table_entry(value[1:].rstrip('\0')) - else: - return '%s' - -def symname(value): - parts = struct.unpack("<2L", value) - if parts[0] == 0: - return string_table_entry(parts[1]) - else: - return '%s' - -file = ('struct', [ - ('MachineType', ('enum', '<H', '0x%X', { - 0x0: 'IMAGE_FILE_MACHINE_UNKNOWN', - 0x1d3: 'IMAGE_FILE_MACHINE_AM33', - 0x8664: 'IMAGE_FILE_MACHINE_AMD64', - 0x1c0: 'IMAGE_FILE_MACHINE_ARM', - 0xebc: 'IMAGE_FILE_MACHINE_EBC', - 0x14c: 'IMAGE_FILE_MACHINE_I386', - 0x200: 'IMAGE_FILE_MACHINE_IA64', - 0x904: 'IMAGE_FILE_MACHINE_M32R', - 0x266: 'IMAGE_FILE_MACHINE_MIPS16', - 0x366: 'IMAGE_FILE_MACHINE_MIPSFPU', - 0x466: 'IMAGE_FILE_MACHINE_MIPSFPU16', - 0x1f0: 'IMAGE_FILE_MACHINE_POWERPC', - 0x1f1: 'IMAGE_FILE_MACHINE_POWERPCFP', - 0x166: 'IMAGE_FILE_MACHINE_R4000', - 0x1a2: 'IMAGE_FILE_MACHINE_SH3', - 0x1a3: 'IMAGE_FILE_MACHINE_SH3DSP', - 0x1a6: 'IMAGE_FILE_MACHINE_SH4', - 0x1a8: 'IMAGE_FILE_MACHINE_SH5', - 0x1c2: 'IMAGE_FILE_MACHINE_THUMB', - 0x169: 'IMAGE_FILE_MACHINE_WCEMIPSV2', - })), - ('NumberOfSections', ('scalar', '<H', '%d')), - ('TimeDateStamp', ('scalar', '<L', '%d')), - ('PointerToSymbolTable', ('scalar', '<L', '0x%0X')), - ('NumberOfSymbols', ('scalar', '<L', '%d')), - ('SizeOfOptionalHeader', ('scalar', '<H', '%d')), - ('Characteristics', ('flags', '<H', '0x%x', [ - (0x0001, 'IMAGE_FILE_RELOCS_STRIPPED', ), - (0x0002, 'IMAGE_FILE_EXECUTABLE_IMAGE', ), - (0x0004, 'IMAGE_FILE_LINE_NUMS_STRIPPED', ), - (0x0008, 'IMAGE_FILE_LOCAL_SYMS_STRIPPED', ), - (0x0010, 'IMAGE_FILE_AGGRESSIVE_WS_TRIM', ), - (0x0020, 'IMAGE_FILE_LARGE_ADDRESS_AWARE', ), - (0x0080, 'IMAGE_FILE_BYTES_REVERSED_LO', ), - (0x0100, 'IMAGE_FILE_32BIT_MACHINE', ), - (0x0200, 'IMAGE_FILE_DEBUG_STRIPPED', ), - (0x0400, 'IMAGE_FILE_REMOVABLE_RUN_FROM_SWAP', ), - (0x0800, 'IMAGE_FILE_NET_RUN_FROM_SWAP', ), - (0x1000, 'IMAGE_FILE_SYSTEM', ), - (0x2000, 'IMAGE_FILE_DLL', ), - (0x4000, 'IMAGE_FILE_UP_SYSTEM_ONLY', ), - (0x8000, 'IMAGE_FILE_BYTES_REVERSED_HI', ), - ])), - ('Sections', ('array', '1', 'NumberOfSections', ('struct', [ - ('Name', ('scalar', '<8s', secname)), - ('VirtualSize', ('scalar', '<L', '%d' )), - ('VirtualAddress', ('scalar', '<L', '%d' )), - ('SizeOfRawData', ('scalar', '<L', '%d' )), - ('PointerToRawData', ('scalar', '<L', '0x%X' )), - ('PointerToRelocations', ('scalar', '<L', '0x%X' )), - ('PointerToLineNumbers', ('scalar', '<L', '0x%X' )), - ('NumberOfRelocations', ('scalar', '<H', '%d' )), - ('NumberOfLineNumbers', ('scalar', '<H', '%d' )), - ('Charateristics', ('flags', '<L', '0x%X', [ - (0x00000008, 'IMAGE_SCN_TYPE_NO_PAD'), - (0x00000020, 'IMAGE_SCN_CNT_CODE'), - (0x00000040, 'IMAGE_SCN_CNT_INITIALIZED_DATA'), - (0x00000080, 'IMAGE_SCN_CNT_UNINITIALIZED_DATA'), - (0x00000100, 'IMAGE_SCN_LNK_OTHER'), - (0x00000200, 'IMAGE_SCN_LNK_INFO'), - (0x00000800, 'IMAGE_SCN_LNK_REMOVE'), - (0x00001000, 'IMAGE_SCN_LNK_COMDAT'), - (0x00008000, 'IMAGE_SCN_GPREL'), - (0x00020000, 'IMAGE_SCN_MEM_PURGEABLE'), - (0x00020000, 'IMAGE_SCN_MEM_16BIT'), - (0x00040000, 'IMAGE_SCN_MEM_LOCKED'), - (0x00080000, 'IMAGE_SCN_MEM_PRELOAD'), - (0x00F00000, 'IMAGE_SCN_ALIGN', { - 0x00100000: 'IMAGE_SCN_ALIGN_1BYTES', - 0x00200000: 'IMAGE_SCN_ALIGN_2BYTES', - 0x00300000: 'IMAGE_SCN_ALIGN_4BYTES', - 0x00400000: 'IMAGE_SCN_ALIGN_8BYTES', - 0x00500000: 'IMAGE_SCN_ALIGN_16BYTES', - 0x00600000: 'IMAGE_SCN_ALIGN_32BYTES', - 0x00700000: 'IMAGE_SCN_ALIGN_64BYTES', - 0x00800000: 'IMAGE_SCN_ALIGN_128BYTES', - 0x00900000: 'IMAGE_SCN_ALIGN_256BYTES', - 0x00A00000: 'IMAGE_SCN_ALIGN_512BYTES', - 0x00B00000: 'IMAGE_SCN_ALIGN_1024BYTES', - 0x00C00000: 'IMAGE_SCN_ALIGN_2048BYTES', - 0x00D00000: 'IMAGE_SCN_ALIGN_4096BYTES', - 0x00E00000: 'IMAGE_SCN_ALIGN_8192BYTES', - }), - (0x01000000, 'IMAGE_SCN_LNK_NRELOC_OVFL'), - (0x02000000, 'IMAGE_SCN_MEM_DISCARDABLE'), - (0x04000000, 'IMAGE_SCN_MEM_NOT_CACHED'), - (0x08000000, 'IMAGE_SCN_MEM_NOT_PAGED'), - (0x10000000, 'IMAGE_SCN_MEM_SHARED'), - (0x20000000, 'IMAGE_SCN_MEM_EXECUTE'), - (0x40000000, 'IMAGE_SCN_MEM_READ'), - (0x80000000, 'IMAGE_SCN_MEM_WRITE'), - ])), - ('SectionData', ('ptr', 'PointerToRawData', ('blob', 'SizeOfRawData'))), - ('Relocations', ('ptr', 'PointerToRelocations', ('array', '0', 'NumberOfRelocations', ('struct', [ - ('VirtualAddress', ('scalar', '<L', '0x%X')), - ('SymbolTableIndex', ('scalar', '<L', '%d' )), - ('Type', ('enum', '<H', '%d', ('MachineType', { - 0x14c: { - 0x0000: 'IMAGE_REL_I386_ABSOLUTE', - 0x0001: 'IMAGE_REL_I386_DIR16', - 0x0002: 'IMAGE_REL_I386_REL16', - 0x0006: 'IMAGE_REL_I386_DIR32', - 0x0007: 'IMAGE_REL_I386_DIR32NB', - 0x0009: 'IMAGE_REL_I386_SEG12', - 0x000A: 'IMAGE_REL_I386_SECTION', - 0x000B: 'IMAGE_REL_I386_SECREL', - 0x000C: 'IMAGE_REL_I386_TOKEN', - 0x000D: 'IMAGE_REL_I386_SECREL7', - 0x0014: 'IMAGE_REL_I386_REL32', - }, - 0x8664: { - 0x0000: 'IMAGE_REL_AMD64_ABSOLUTE', - 0x0001: 'IMAGE_REL_AMD64_ADDR64', - 0x0002: 'IMAGE_REL_AMD64_ADDR32', - 0x0003: 'IMAGE_REL_AMD64_ADDR32NB', - 0x0004: 'IMAGE_REL_AMD64_REL32', - 0x0005: 'IMAGE_REL_AMD64_REL32_1', - 0x0006: 'IMAGE_REL_AMD64_REL32_2', - 0x0007: 'IMAGE_REL_AMD64_REL32_3', - 0x0008: 'IMAGE_REL_AMD64_REL32_4', - 0x0009: 'IMAGE_REL_AMD64_REL32_5', - 0x000A: 'IMAGE_REL_AMD64_SECTION', - 0x000B: 'IMAGE_REL_AMD64_SECREL', - 0x000C: 'IMAGE_REL_AMD64_SECREL7', - 0x000D: 'IMAGE_REL_AMD64_TOKEN', - 0x000E: 'IMAGE_REL_AMD64_SREL32', - 0x000F: 'IMAGE_REL_AMD64_PAIR', - 0x0010: 'IMAGE_REL_AMD64_SSPAN32', - }, - }))), - ('SymbolName', ('ptr', '+ PointerToSymbolTable * SymbolTableIndex 18', ('scalar', '<8s', symname))) - ])))), - ]))), - ('Symbols', ('ptr', 'PointerToSymbolTable', ('byte-array', '18', '* NumberOfSymbols 18', ('struct', [ - ('Name', ('scalar', '<8s', symname)), - ('Value', ('scalar', '<L', '%d' )), - ('SectionNumber', ('scalar', '<H', '%d' )), - ('_Type', ('scalar', '<H', None )), - ('SimpleType', ('enum', '& _Type 15', '%d', { - 0: 'IMAGE_SYM_TYPE_NULL', - 1: 'IMAGE_SYM_TYPE_VOID', - 2: 'IMAGE_SYM_TYPE_CHAR', - 3: 'IMAGE_SYM_TYPE_SHORT', - 4: 'IMAGE_SYM_TYPE_INT', - 5: 'IMAGE_SYM_TYPE_LONG', - 6: 'IMAGE_SYM_TYPE_FLOAT', - 7: 'IMAGE_SYM_TYPE_DOUBLE', - 8: 'IMAGE_SYM_TYPE_STRUCT', - 9: 'IMAGE_SYM_TYPE_UNION', - 10: 'IMAGE_SYM_TYPE_ENUM', - 11: 'IMAGE_SYM_TYPE_MOE', - 12: 'IMAGE_SYM_TYPE_BYTE', - 13: 'IMAGE_SYM_TYPE_WORD', - 14: 'IMAGE_SYM_TYPE_UINT', - 15: 'IMAGE_SYM_TYPE_DWORD', - })), # (Type & 0xF0) >> 4 - ('ComplexType', ('enum', '>> & _Type 240 4', '%d', { - 0: 'IMAGE_SYM_DTYPE_NULL', - 1: 'IMAGE_SYM_DTYPE_POINTER', - 2: 'IMAGE_SYM_DTYPE_FUNCTION', - 3: 'IMAGE_SYM_DTYPE_ARRAY', - })), - ('StorageClass', ('enum', '<B', '%d', { - -1: 'IMAGE_SYM_CLASS_END_OF_FUNCTION', - 0: 'IMAGE_SYM_CLASS_NULL', - 1: 'IMAGE_SYM_CLASS_AUTOMATIC', - 2: 'IMAGE_SYM_CLASS_EXTERNAL', - 3: 'IMAGE_SYM_CLASS_STATIC', - 4: 'IMAGE_SYM_CLASS_REGISTER', - 5: 'IMAGE_SYM_CLASS_EXTERNAL_DEF', - 6: 'IMAGE_SYM_CLASS_LABEL', - 7: 'IMAGE_SYM_CLASS_UNDEFINED_LABEL', - 8: 'IMAGE_SYM_CLASS_MEMBER_OF_STRUCT', - 9: 'IMAGE_SYM_CLASS_ARGUMENT', - 10: 'IMAGE_SYM_CLASS_STRUCT_TAG', - 11: 'IMAGE_SYM_CLASS_MEMBER_OF_UNION', - 12: 'IMAGE_SYM_CLASS_UNION_TAG', - 13: 'IMAGE_SYM_CLASS_TYPE_DEFINITION', - 14: 'IMAGE_SYM_CLASS_UNDEFINED_STATIC', - 15: 'IMAGE_SYM_CLASS_ENUM_TAG', - 16: 'IMAGE_SYM_CLASS_MEMBER_OF_ENUM', - 17: 'IMAGE_SYM_CLASS_REGISTER_PARAM', - 18: 'IMAGE_SYM_CLASS_BIT_FIELD', - 100: 'IMAGE_SYM_CLASS_BLOCK', - 101: 'IMAGE_SYM_CLASS_FUNCTION', - 102: 'IMAGE_SYM_CLASS_END_OF_STRUCT', - 103: 'IMAGE_SYM_CLASS_FILE', - 104: 'IMAGE_SYM_CLASS_SECTION', - 105: 'IMAGE_SYM_CLASS_WEAK_EXTERNAL', - 107: 'IMAGE_SYM_CLASS_CLR_TOKEN', - })), - ('NumberOfAuxSymbols', ('scalar', '<B', '%d' )), - ('AuxillaryData', ('blob', '* NumberOfAuxSymbols 18')), - ])))), -]) - -# -# Definition Interpreter -# - -import sys, types, struct, re - -Input = None -Stack = [] -Fields = {} - -Indent = 0 -NewLine = True - -def indent(): - global Indent - Indent += 1 - -def dedent(): - global Indent - Indent -= 1 - -def write(input): - global NewLine - output = "" - - for char in input: - - if NewLine: - output += Indent * ' ' - NewLine = False - - output += char - - if char == '\n': - NewLine = True - - sys.stdout.write(output) - -def read(format): - return struct.unpack(format, Input.read(struct.calcsize(format))) - -def read_cstr(): - output = "" - while True: - char = Input.read(1) - if len(char) == 0: - raise RuntimeError ("EOF while reading cstr") - if char == '\0': - break - output += char - return output - -def push_pos(seek_to = None): - Stack [0:0] = [Input.tell()] - if seek_to: - Input.seek(seek_to) - -def pop_pos(): - assert(len(Stack) > 0) - Input.seek(Stack[0]) - del Stack[0] - -def print_binary_data(size): - value = "" - while size > 0: - if size >= 16: - data = Input.read(16) - size -= 16 - else: - data = Input.read(size) - size = 0 - value += data - bytes = "" - text = "" - for index in xrange(16): - if index < len(data): - if index == 8: - bytes += "- " - ch = ord(data[index]) - bytes += "%02X " % ch - if ch >= 0x20 and ch <= 0x7F: - text += data[index] - else: - text += "." - else: - if index == 8: - bytes += " " - bytes += " " - - write("%s|%s|\n" % (bytes, text)) - return value - -idlit = re.compile("[a-zA-Z_][a-zA-Z0-9_-]*") -numlit = re.compile("[0-9]+") - -def read_value(expr): - - input = iter(expr.split()) - - def eval(): - - token = input.next() - - if expr == 'cstr': - return read_cstr() - if expr == 'true': - return True - if expr == 'false': - return False - - if token == '+': - return eval() + eval() - if token == '-': - return eval() - eval() - if token == '*': - return eval() * eval() - if token == '/': - return eval() / eval() - if token == '&': - return eval() & eval() - if token == '|': - return eval() | eval() - if token == '>>': - return eval() >> eval() - if token == '<<': - return eval() << eval() - - if len(token) > 1 and token[0] in ('=', '@', '<', '!', '>'): - val = read(expr) - assert(len(val) == 1) - return val[0] - - if idlit.match(token): - return Fields[token] - if numlit.match(token): - return int(token) - - raise RuntimeError("unexpected token %s" % repr(token)) - - value = eval() - - try: - input.next() - except StopIteration: - return value - raise RuntimeError("unexpected input at end of expression") - -def write_value(format,value): - format_type = type(format) - if format_type is types.StringType: - write(format % value) - elif format_type is types.FunctionType: - write_value(format(value), value) - elif format_type is types.TupleType: - Fields['this'] = value - handle_element(format) - elif format_type is types.NoneType: - pass - else: - raise RuntimeError("unexpected type: %s" % repr(format_type)) - -def handle_scalar(entry): - iformat = entry[1] - oformat = entry[2] - - value = read_value(iformat) - - write_value(oformat, value) - - return value - -def handle_enum(entry): - iformat = entry[1] - oformat = entry[2] - definitions = entry[3] - - value = read_value(iformat) - - if type(definitions) is types.TupleType: - selector = read_value(definitions[0]) - definitions = definitions[1][selector] - - if value in definitions: - description = definitions[value] - else: - description = "unknown" - - write("%s (" % description) - write_value(oformat, value) - write(")") - - return value - -def handle_flags(entry): - iformat = entry[1] - oformat = entry[2] - definitions = entry[3] - - value = read_value(iformat) - - write_value(oformat, value) - - indent() - for entry in definitions: - mask = entry[0] - name = entry[1] - if len (entry) == 3: - map = entry[2] - selection = value & mask - if selection in map: - write("\n%s" % map[selection]) - else: - write("\n%s <%d>" % (name, selection)) - elif len(entry) == 2: - if value & mask != 0: - write("\n%s" % name) - dedent() - - return value - -def handle_struct(entry): - global Fields - members = entry[1] - - newFields = {} - - write("{\n"); - indent() - - for member in members: - name = member[0] - type = member[1] - - if name[0] != "_": - write("%s = " % name.ljust(24)) - - value = handle_element(type) - - if name[0] != "_": - write("\n") - - Fields[name] = value - newFields[name] = value - - dedent() - write("}") - - return newFields - -def handle_array(entry): - start_index = entry[1] - length = entry[2] - element = entry[3] - - newItems = [] - - write("[\n") - indent() - - start_index = read_value(start_index) - value = read_value(length) - - for index in xrange(value): - write("%d = " % (index + start_index)) - value = handle_element(element) - write("\n") - newItems.append(value) - - dedent() - write("]") - - return newItems - -def handle_byte_array(entry): - ent_size = entry[1] - length = entry[2] - element = entry[3] - - newItems = [] - - write("[\n") - indent() - - item_size = read_value(ent_size) - value = read_value(length) - end_of_array = Input.tell() + value - - prev_loc = Input.tell() - index = 0 - while Input.tell() < end_of_array: - write("%d = " % index) - value = handle_element(element) - write("\n") - newItems.append(value) - index += (Input.tell() - prev_loc) / item_size - prev_loc = Input.tell() - - dedent() - write("]") - - return newItems - -def handle_ptr(entry): - offset = entry[1] - element = entry[2] - - value = None - offset = read_value(offset) - - if offset != 0: - - push_pos(offset) - - value = handle_element(element) - - pop_pos() - - else: - write("None") - - return value - -def handle_blob(entry): - length = entry[1] - - write("\n") - indent() - - value = print_binary_data(read_value(length)) - - dedent() - - return value - -def handle_element(entry): - handlers = { - 'struct': handle_struct, - 'scalar': handle_scalar, - 'enum': handle_enum, - 'flags': handle_flags, - 'ptr': handle_ptr, - 'blob': handle_blob, - 'array': handle_array, - 'byte-array': handle_byte_array, - } - - if not entry[0] in handlers: - raise RuntimeError ("unexpected type '%s'" % str (entry[0])) - - return handlers[entry[0]](entry) - -if len(sys.argv) <= 1 or sys.argv[1] == '-': - import StringIO - Input = StringIO.StringIO(sys.stdin.read()) -else: - Input = open (sys.argv[1], "rb") - -try: - handle_element(file) -finally: - Input.close() - Input = None diff --git a/test/Scripts/coff-dump.py.bat b/test/Scripts/coff-dump.py.bat deleted file mode 100755 index 56428e1..0000000 --- a/test/Scripts/coff-dump.py.bat +++ /dev/null @@ -1,7 +0,0 @@ -@echo off - -@rem We need to set -u to treat stdin as binary. Python 3 has support for doing -@rem this in code, but I haven't found a way to do this in 2.6 yet. - -%PYTHON_EXECUTABLE% -u %LLVM_SRC_ROOT%\test\Scripts\coff-dump.py %1 %2 %3 %4 %5 %6 %7 %8 %9 - diff --git a/test/Scripts/common_dump.py b/test/Scripts/common_dump.py deleted file mode 100644 index fd58993..0000000 --- a/test/Scripts/common_dump.py +++ /dev/null @@ -1,48 +0,0 @@ -def dataToHex(d): - """ Convert the raw data in 'd' to an hex string with a space every 4 bytes. - """ - bytes = [] - for i,c in enumerate(d): - byte = ord(c) - hex_byte = hex(byte)[2:] - if byte <= 0xf: - hex_byte = '0' + hex_byte - if i % 4 == 3: - hex_byte += ' ' - bytes.append(hex_byte) - return ''.join(bytes).strip() - -def dataToHexUnified(d): - """ Convert the raw data in 'd' to an hex string with a space every 4 bytes. - Each 4byte number is prefixed with 0x for easy sed/rx - Fixme: convert all MC tests to use this routine instead of the above - """ - bytes = [] - for i,c in enumerate(d): - byte = ord(c) - hex_byte = hex(byte)[2:] - if byte <= 0xf: - hex_byte = '0' + hex_byte - if i % 4 == 0: - hex_byte = '0x' + hex_byte - if i % 4 == 3: - hex_byte += ' ' - bytes.append(hex_byte) - return ''.join(bytes).strip() - - -def HexDump(valPair): - """ - 1. do not print 'L' - 2. Handle negatives and large numbers by mod (2^numBits) - 3. print fixed length, prepend with zeros. - Length is exactly 2+(numBits/4) - 4. Do print 0x Why? - so that they can be easily distinguished using sed/rx - """ - val, numBits = valPair - assert 0 <= val < (1 << numBits) - - val = val & (( 1 << numBits) - 1) - newFmt = "0x%0" + "%d" % (numBits / 4) + "x" - return newFmt % val diff --git a/test/Scripts/elf-dump b/test/Scripts/elf-dump deleted file mode 100755 index 61342d8..0000000 --- a/test/Scripts/elf-dump +++ /dev/null @@ -1,285 +0,0 @@ -#!/usr/bin/env python - -import struct -import sys -import StringIO - -import common_dump - -class Reader: - def __init__(self, path): - if path == "-": - # Snarf all the data so we can seek. - self.file = StringIO.StringIO(sys.stdin.read()) - else: - self.file = open(path, "rb") - self.isLSB = None - self.is64Bit = None - self.isN64 = False - - def seek(self, pos): - self.file.seek(pos) - - def read(self, N): - data = self.file.read(N) - if len(data) != N: - raise ValueError, "Out of data!" - return data - - def read8(self): - return (ord(self.read(1)), 8) - - def read16(self): - return (struct.unpack('><'[self.isLSB] + 'H', self.read(2))[0], 16) - - def read32(self): - return (struct.unpack('><'[self.isLSB] + 'I', self.read(4))[0], 32) - - def read64(self): - return (struct.unpack('><'[self.isLSB] + 'Q', self.read(8))[0], 64) - - def readWord(self): - if self.is64Bit: - return self.read64() - else: - return self.read32() - -class StringTable: - def __init__(self, strings): - self.string_table = strings - - def __getitem__(self, index): - end = self.string_table.index('\x00', index) - return self.string_table[index:end] - -class ProgramHeader: - def __init__(self, f): - self.p_type = f.read32() - if f.is64Bit: - self.p_flags = f.read32() - self.p_offset = f.readWord() - self.p_vaddr = f.readWord() - self.p_paddr = f.readWord() - self.p_filesz = f.readWord() - self.p_memsz = f.readWord() - if not f.is64Bit: - self.p_flags = f.read32() - self.p_align = f.readWord() - - def dump(self): - print " (('p_type', %s)" % common_dump.HexDump(self.p_type) - print " ('p_flags', %s)" % common_dump.HexDump(self.p_flags) - print " ('p_offset', %s)" % common_dump.HexDump(self.p_offset) - print " ('p_vaddr', %s)" % common_dump.HexDump(self.p_vaddr) - print " ('p_paddr', %s)" % common_dump.HexDump(self.p_paddr) - print " ('p_filesz', %s)" % common_dump.HexDump(self.p_filesz) - print " ('p_memsz', %s)" % common_dump.HexDump(self.p_memsz) - print " ('p_align', %s)" % common_dump.HexDump(self.p_align) - print " )," - -class Section: - def __init__(self, f): - self.sh_name = f.read32() - self.sh_type = f.read32() - self.sh_flags = f.readWord() - self.sh_addr = f.readWord() - self.sh_offset = f.readWord() - self.sh_size = f.readWord() - self.sh_link = f.read32() - self.sh_info = f.read32() - self.sh_addralign = f.readWord() - self.sh_entsize = f.readWord() - - def dump(self, shstrtab, f, strtab, dumpdata): - print " (('sh_name', %s)" % common_dump.HexDump(self.sh_name), "# %r" % shstrtab[self.sh_name[0]] - print " ('sh_type', %s)" % common_dump.HexDump(self.sh_type) - print " ('sh_flags', %s)" % common_dump.HexDump(self.sh_flags) - print " ('sh_addr', %s)" % common_dump.HexDump(self.sh_addr) - print " ('sh_offset', %s)" % common_dump.HexDump(self.sh_offset) - print " ('sh_size', %s)" % common_dump.HexDump(self.sh_size) - print " ('sh_link', %s)" % common_dump.HexDump(self.sh_link) - print " ('sh_info', %s)" % common_dump.HexDump(self.sh_info) - print " ('sh_addralign', %s)" % common_dump.HexDump(self.sh_addralign) - print " ('sh_entsize', %s)" % common_dump.HexDump(self.sh_entsize) - if self.sh_type[0] == 2: # SHT_SYMTAB - print " ('_symbols', [" - dumpSymtab(f, self, strtab) - print " ])" - elif self.sh_type[0] == 4 or self.sh_type[0] == 9: # SHT_RELA / SHT_REL - print " ('_relocations', [" - dumpRel(f, self, self.sh_type[0] == 4) - print " ])" - elif dumpdata: - f.seek(self.sh_offset[0]) - if self.sh_type != 8: # != SHT_NOBITS - data = f.read(self.sh_size[0]) - print " ('_section_data', '%s')" % common_dump.dataToHex(data) - else: - print " ('_section_data', '')" - print " )," - -def dumpSymtab(f, section, strtab): - entries = section.sh_size[0] // section.sh_entsize[0] - - for index in range(entries): - f.seek(section.sh_offset[0] + index * section.sh_entsize[0]) - print " # Symbol %s" % index - name = f.read32() - print " (('st_name', %s)" % common_dump.HexDump(name), "# %r" % strtab[name[0]] - if not f.is64Bit: - print " ('st_value', %s)" % common_dump.HexDump(f.read32()) - print " ('st_size', %s)" % common_dump.HexDump(f.read32()) - st_info = f.read8()[0] - st_bind = (st_info >> 4, 4) - st_type = (st_info & 0xf, 4) - print " ('st_bind', %s)" % common_dump.HexDump(st_bind) - print " ('st_type', %s)" % common_dump.HexDump(st_type) - print " ('st_other', %s)" % common_dump.HexDump(f.read8()) - print " ('st_shndx', %s)" % common_dump.HexDump(f.read16()) - if f.is64Bit: - print " ('st_value', %s)" % common_dump.HexDump(f.read64()) - print " ('st_size', %s)" % common_dump.HexDump(f.read64()) - print " )," - -def dumpRel(f, section, dumprela = False): - entries = section.sh_size[0] // section.sh_entsize[0] - - for index in range(entries): - f.seek(section.sh_offset[0] + index * section.sh_entsize[0]) - print " # Relocation %s" % index - print " (('r_offset', %s)" % common_dump.HexDump(f.readWord()) - - if f.isN64: - r_sym = f.read32() - r_ssym = f.read8() - r_type3 = f.read8() - r_type2 = f.read8() - r_type = f.read8() - print " ('r_sym', %s)" % common_dump.HexDump(r_sym) - print " ('r_ssym', %s)" % common_dump.HexDump(r_ssym) - print " ('r_type3', %s)" % common_dump.HexDump(r_type3) - print " ('r_type2', %s)" % common_dump.HexDump(r_type2) - print " ('r_type', %s)" % common_dump.HexDump(r_type) - else: - r_info = f.readWord()[0] - if f.is64Bit: - r_sym = (r_info >> 32, 32) - r_type = (r_info & 0xffffffff, 32) - else: - r_sym = (r_info >> 8, 24) - r_type = (r_info & 0xff, 8) - print " ('r_sym', %s)" % common_dump.HexDump(r_sym) - print " ('r_type', %s)" % common_dump.HexDump(r_type) - if dumprela: - print " ('r_addend', %s)" % common_dump.HexDump(f.readWord()) - print " )," - -def dumpELF(path, opts): - f = Reader(path) - - magic = f.read(4) - assert magic == '\x7FELF' - - fileclass = f.read8() - if fileclass[0] == 1: # ELFCLASS32 - f.is64Bit = False - elif fileclass[0] == 2: # ELFCLASS64 - f.is64Bit = True - else: - raise ValueError, "Unknown file class %s" % common_dump.HexDump(fileclass) - print "('e_indent[EI_CLASS]', %s)" % common_dump.HexDump(fileclass) - - byteordering = f.read8() - if byteordering[0] == 1: # ELFDATA2LSB - f.isLSB = True - elif byteordering[0] == 2: # ELFDATA2MSB - f.isLSB = False - else: - raise ValueError, "Unknown byte ordering %s" % common_dump.HexDump(byteordering) - print "('e_indent[EI_DATA]', %s)" % common_dump.HexDump(byteordering) - - print "('e_indent[EI_VERSION]', %s)" % common_dump.HexDump(f.read8()) - print "('e_indent[EI_OSABI]', %s)" % common_dump.HexDump(f.read8()) - print "('e_indent[EI_ABIVERSION]', %s)" % common_dump.HexDump(f.read8()) - - f.seek(16) # Seek to end of e_ident. - - print "('e_type', %s)" % common_dump.HexDump(f.read16()) - - # Does any other architecture use N64? - e_machine = f.read16() - if e_machine[0] == 0x0008 and f.is64Bit: # EM_MIPS && 64 bit - f.isN64 = True - - print "('e_machine', %s)" % common_dump.HexDump(e_machine) - print "('e_version', %s)" % common_dump.HexDump(f.read32()) - print "('e_entry', %s)" % common_dump.HexDump(f.readWord()) - e_phoff = f.readWord() - print "('e_phoff', %s)" % common_dump.HexDump(e_phoff) - e_shoff = f.readWord() - print "('e_shoff', %s)" % common_dump.HexDump(e_shoff) - print "('e_flags', %s)" % common_dump.HexDump(f.read32()) - print "('e_ehsize', %s)" % common_dump.HexDump(f.read16()) - e_phentsize = f.read16() - print "('e_phentsize', %s)" % common_dump.HexDump(e_phentsize) - e_phnum = f.read16() - print "('e_phnum', %s)" % common_dump.HexDump(e_phnum) - e_shentsize = f.read16() - print "('e_shentsize', %s)" % common_dump.HexDump(e_shentsize) - e_shnum = f.read16() - print "('e_shnum', %s)" % common_dump.HexDump(e_shnum) - e_shstrndx = f.read16() - print "('e_shstrndx', %s)" % common_dump.HexDump(e_shstrndx) - - - # Read all section headers - sections = [] - for index in range(e_shnum[0]): - f.seek(e_shoff[0] + index * e_shentsize[0]) - s = Section(f) - sections.append(s) - - # Read .shstrtab so we can resolve section names - f.seek(sections[e_shstrndx[0]].sh_offset[0]) - shstrtab = StringTable(f.read(sections[e_shstrndx[0]].sh_size[0])) - - # Get the symbol string table - strtab = None - for section in sections: - if shstrtab[section.sh_name[0]] == ".strtab": - f.seek(section.sh_offset[0]) - strtab = StringTable(f.read(section.sh_size[0])) - break - - print "('_sections', [" - for index in range(e_shnum[0]): - print " # Section %s" % index - sections[index].dump(shstrtab, f, strtab, opts.dumpSectionData) - print "])" - - # Read all program headers - headers = [] - for index in range(e_phnum[0]): - f.seek(e_phoff[0] + index * e_phentsize[0]) - h = ProgramHeader(f) - headers.append(h) - - print "('_ProgramHeaders', [" - for index in range(e_phnum[0]): - print " # Program Header %s" % index - headers[index].dump() - print "])" - -if __name__ == "__main__": - from optparse import OptionParser, OptionGroup - parser = OptionParser("usage: %prog [options] {files}") - parser.add_option("", "--dump-section-data", dest="dumpSectionData", - help="Dump the contents of sections", - action="store_true", default=False) - (opts, args) = parser.parse_args() - - if not args: - args.append('-') - - for arg in args: - dumpELF(arg, opts) diff --git a/test/Scripts/elf-dump.bat b/test/Scripts/elf-dump.bat deleted file mode 100755 index 9c70808..0000000 --- a/test/Scripts/elf-dump.bat +++ /dev/null @@ -1,7 +0,0 @@ -@echo off - -@rem We need to set -u to treat stdin as binary. Python 3 has support for doing -@rem this in code, but I haven't found a way to do this in 2.6 yet. - -%PYTHON_EXECUTABLE% -u %LLVM_SRC_ROOT%\test\Scripts\elf-dump %1 %2 %3 %4 %5 %6 %7 %8 %9 - diff --git a/test/Scripts/ignore b/test/Scripts/ignore deleted file mode 100755 index 865ae4d..0000000 --- a/test/Scripts/ignore +++ /dev/null @@ -1,10 +0,0 @@ -#!/bin/sh -# -# Program: ignore -# -# Synopsis: Ignore the result code of the command and always return 0 -# -# Syntax: ignore command <arguments> - -"$@" || exit 0 && exit 0 -exit 0 diff --git a/test/Scripts/macho-dumpx b/test/Scripts/macho-dumpx deleted file mode 100755 index 71e06d8..0000000 --- a/test/Scripts/macho-dumpx +++ /dev/null @@ -1,294 +0,0 @@ -#!/usr/bin/env python - -import struct -import sys -import StringIO - -import common_dump - -class Reader: - def __init__(self, path): - if path == '-': - # Snarf all the data so we can seek. - self.file = StringIO.StringIO(sys.stdin.read()) - else: - self.file = open(path,'rb') - self.isLSB = None - self.is64Bit = None - - self.string_table = None - - def tell(self): - return self.file.tell() - - def seek(self, pos): - self.file.seek(pos) - - def read(self, N): - data = self.file.read(N) - if len(data) != N: - raise ValueError,"Out of data!" - return data - - def read8(self): - return ord(self.read(1)) - - def read16(self): - return struct.unpack('><'[self.isLSB] + 'H', self.read(2))[0] - - def read32(self): - # Force to 32-bit, if possible; otherwise these might be long ints on a - # big-endian platform. FIXME: Why??? - Value = struct.unpack('><'[self.isLSB] + 'I', self.read(4))[0] - return int(Value) - - def read64(self): - Value = struct.unpack('><'[self.isLSB] + 'Q', self.read(8))[0] - if Value == int(Value): - Value = int(Value) - return Value - - def registerStringTable(self, strings): - if self.string_table is not None: - raise ValueError,"%s: warning: multiple string tables" % sys.argv[0] - - self.string_table = strings - - def getString(self, index): - if self.string_table is None: - raise ValueError,"%s: warning: no string table registered" % sys.argv[0] - - end = self.string_table.index('\x00', index) - return self.string_table[index:end] - -def dumpmacho(path, opts): - f = Reader(path) - - magic = f.read(4) - if magic == '\xFE\xED\xFA\xCE': - f.isLSB, f.is64Bit = False, False - elif magic == '\xCE\xFA\xED\xFE': - f.isLSB, f.is64Bit = True, False - elif magic == '\xFE\xED\xFA\xCF': - f.isLSB, f.is64Bit = False, True - elif magic == '\xCF\xFA\xED\xFE': - f.isLSB, f.is64Bit = True, True - else: - raise ValueError,"Not a Mach-O object file: %r (bad magic)" % path - - print "('cputype', %r)" % f.read32() - print "('cpusubtype', %r)" % f.read32() - filetype = f.read32() - print "('filetype', %r)" % filetype - - numLoadCommands = f.read32() - print "('num_load_commands', %r)" % numLoadCommands - - loadCommandsSize = f.read32() - print "('load_commands_size', %r)" % loadCommandsSize - - print "('flag', %r)" % f.read32() - - if f.is64Bit: - print "('reserved', %r)" % f.read32() - - start = f.tell() - - print "('load_commands', [" - for i in range(numLoadCommands): - dumpLoadCommand(f, i, opts) - print "])" - - if f.tell() - start != loadCommandsSize: - raise ValueError,"%s: warning: invalid load commands size: %r" % ( - sys.argv[0], loadCommandsSize) - -def dumpLoadCommand(f, i, opts): - start = f.tell() - - print " # Load Command %r" % i - cmd = f.read32() - print " (('command', %r)" % cmd - cmdSize = f.read32() - print " ('size', %r)" % cmdSize - - if cmd == 1: - dumpSegmentLoadCommand(f, opts, False) - elif cmd == 2: - dumpSymtabCommand(f, opts) - elif cmd == 11: - dumpDysymtabCommand(f, opts) - elif cmd == 25: - dumpSegmentLoadCommand(f, opts, True) - elif cmd == 27: - import uuid - print " ('uuid', %s)" % uuid.UUID(bytes=f.read(16)) - else: - print >>sys.stderr,"%s: warning: unknown load command: %r" % ( - sys.argv[0], cmd) - f.read(cmdSize - 8) - print " )," - - if f.tell() - start != cmdSize: - raise ValueError,"%s: warning: invalid load command size: %r" % ( - sys.argv[0], cmdSize) - -def dumpSegmentLoadCommand(f, opts, is64Bit): - print " ('segment_name', %r)" % f.read(16) - if is64Bit: - print " ('vm_addr', %r)" % f.read64() - print " ('vm_size', %r)" % f.read64() - print " ('file_offset', %r)" % f.read64() - print " ('file_size', %r)" % f.read64() - else: - print " ('vm_addr', %r)" % f.read32() - print " ('vm_size', %r)" % f.read32() - print " ('file_offset', %r)" % f.read32() - print " ('file_size', %r)" % f.read32() - print " ('maxprot', %r)" % f.read32() - print " ('initprot', %r)" % f.read32() - numSections = f.read32() - print " ('num_sections', %r)" % numSections - print " ('flags', %r)" % f.read32() - - print " ('sections', [" - for i in range(numSections): - dumpSection(f, i, opts, is64Bit) - print " ])" - -def dumpSymtabCommand(f, opts): - symoff = f.read32() - print " ('symoff', %r)" % symoff - nsyms = f.read32() - print " ('nsyms', %r)" % nsyms - stroff = f.read32() - print " ('stroff', %r)" % stroff - strsize = f.read32() - print " ('strsize', %r)" % strsize - - prev_pos = f.tell() - - f.seek(stroff) - string_data = f.read(strsize) - print " ('_string_data', %r)" % string_data - - f.registerStringTable(string_data) - - f.seek(symoff) - print " ('_symbols', [" - for i in range(nsyms): - dumpNlist32(f, i, opts) - print " ])" - - f.seek(prev_pos) - -def dumpNlist32(f, i, opts): - print " # Symbol %r" % i - n_strx = f.read32() - print " (('n_strx', %r)" % n_strx - n_type = f.read8() - print " ('n_type', %#x)" % n_type - n_sect = f.read8() - print " ('n_sect', %r)" % n_sect - n_desc = f.read16() - print " ('n_desc', %r)" % n_desc - if f.is64Bit: - n_value = f.read64() - print " ('n_value', %r)" % n_value - else: - n_value = f.read32() - print " ('n_value', %r)" % n_value - print " ('_string', %r)" % f.getString(n_strx) - print " )," - -def dumpDysymtabCommand(f, opts): - print " ('ilocalsym', %r)" % f.read32() - print " ('nlocalsym', %r)" % f.read32() - print " ('iextdefsym', %r)" % f.read32() - print " ('nextdefsym', %r)" % f.read32() - print " ('iundefsym', %r)" % f.read32() - print " ('nundefsym', %r)" % f.read32() - print " ('tocoff', %r)" % f.read32() - print " ('ntoc', %r)" % f.read32() - print " ('modtaboff', %r)" % f.read32() - print " ('nmodtab', %r)" % f.read32() - print " ('extrefsymoff', %r)" % f.read32() - print " ('nextrefsyms', %r)" % f.read32() - indirectsymoff = f.read32() - print " ('indirectsymoff', %r)" % indirectsymoff - nindirectsyms = f.read32() - print " ('nindirectsyms', %r)" % nindirectsyms - print " ('extreloff', %r)" % f.read32() - print " ('nextrel', %r)" % f.read32() - print " ('locreloff', %r)" % f.read32() - print " ('nlocrel', %r)" % f.read32() - - prev_pos = f.tell() - - f.seek(indirectsymoff) - print " ('_indirect_symbols', [" - for i in range(nindirectsyms): - print " # Indirect Symbol %r" % i - print " (('symbol_index', %#x),)," % f.read32() - print " ])" - - f.seek(prev_pos) - -def dumpSection(f, i, opts, is64Bit): - print " # Section %r" % i - print " (('section_name', %r)" % f.read(16) - print " ('segment_name', %r)" % f.read(16) - if is64Bit: - print " ('address', %r)" % f.read64() - size = f.read64() - print " ('size', %r)" % size - else: - print " ('address', %r)" % f.read32() - size = f.read32() - print " ('size', %r)" % size - offset = f.read32() - print " ('offset', %r)" % offset - print " ('alignment', %r)" % f.read32() - reloc_offset = f.read32() - print " ('reloc_offset', %r)" % reloc_offset - num_reloc = f.read32() - print " ('num_reloc', %r)" % num_reloc - print " ('flags', %#x)" % f.read32() - print " ('reserved1', %r)" % f.read32() - print " ('reserved2', %r)" % f.read32() - if is64Bit: - print " ('reserved3', %r)" % f.read32() - print " )," - - prev_pos = f.tell() - - f.seek(reloc_offset) - print " ('_relocations', [" - for i in range(num_reloc): - print " # Relocation %r" % i - print " (('word-0', %#x)," % f.read32() - print " ('word-1', %#x))," % f.read32() - print " ])" - - if opts.dumpSectionData: - f.seek(offset) - print " ('_section_data', '%s')" % common_dump.dataToHex(f.read(size)) - - f.seek(prev_pos) - -def main(): - from optparse import OptionParser, OptionGroup - parser = OptionParser("usage: %prog [options] {files}") - parser.add_option("", "--dump-section-data", dest="dumpSectionData", - help="Dump the contents of sections", - action="store_true", default=False) - (opts, args) = parser.parse_args() - - if not args: - args.append('-') - - for arg in args: - dumpmacho(arg, opts) - -if __name__ == '__main__': - main() diff --git a/test/Scripts/macho-dumpx.bat b/test/Scripts/macho-dumpx.bat deleted file mode 100644 index 81484f6..0000000 --- a/test/Scripts/macho-dumpx.bat +++ /dev/null @@ -1,7 +0,0 @@ -@echo off - -@rem We need to set -u to treat stdin as binary. Python 3 has support for doing -@rem this in code, but I haven't found a way to do this in 2.6 yet. - -%PYTHON_EXECUTABLE% -u %LLVM_SRC_ROOT%\test\Scripts\macho-dump %1 %2 %3 %4 %5 %6 %7 %8 %9 - diff --git a/test/TableGen/Dag.td b/test/TableGen/Dag.td index 40399a4..14d616b 100644 --- a/test/TableGen/Dag.td +++ b/test/TableGen/Dag.td @@ -70,3 +70,15 @@ def VAL4 : bar<foo2, somedef2>; // CHECK-NEXT: dag Dag3 = (somedef2 2); // CHECK-NEXT: NAME = ? // CHECK-NEXT: } + +def VAL5 : bar<foo2, somedef2> { + // Named operands. + let Dag1 = (somedef1 1:$name1); + + // Name, no node. + let Dag2 = (somedef2 $name2, $name3); +} + +// CHECK: def VAL5 { +// CHECK-NEXT: dag Dag1 = (somedef1 1:$name1); +// CHECK-NEXT: dag Dag2 = (somedef2 ?:$name2, ?:$name3); diff --git a/test/Transforms/ArgumentPromotion/crash.ll b/test/Transforms/ArgumentPromotion/crash.ll index f70d8de..5e1a037 100644 --- a/test/Transforms/ArgumentPromotion/crash.ll +++ b/test/Transforms/ArgumentPromotion/crash.ll @@ -1,7 +1,5 @@ -; rdar://7879828 ; RUN: opt -inline -argpromotion < %s -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" -target triple = "x86_64-apple-darwin10.0.0" +; rdar://7879828 define void @foo() { invoke void @foo2() @@ -11,6 +9,8 @@ if.end432: unreachable for.end520: + %exn = landingpad {i8*, i32} personality i32 (...)* @__gxx_personality_v0 + cleanup unreachable } @@ -57,3 +57,5 @@ init: %4 = call i32 @"clay_assign(Chain, Chain)"(%0* %3, %0* %1) ret i32 0 } + +declare i32 @__gxx_personality_v0(...) diff --git a/test/Transforms/BBVectorize/X86/loop1.ll b/test/Transforms/BBVectorize/X86/loop1.ll index 493f23b..bbf565d 100644 --- a/test/Transforms/BBVectorize/X86/loop1.ll +++ b/test/Transforms/BBVectorize/X86/loop1.ll @@ -34,7 +34,15 @@ for.body: ; preds = %for.body, %entry %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, 10 br i1 %exitcond, label %for.end, label %for.body -; CHECK-NOT: <2 x double> +; CHECK: insertelement +; CHECK-NEXT: insertelement +; CHECK-NEXT: fadd <2 x double> +; CHECK-NEXT: insertelement +; CHECK-NEXT: insertelement +; CHECK-NEXT: fadd <2 x double> +; CHECK-NEXT: insertelement +; CHECK-NEXT: fmul <2 x double> + ; CHECK-UNRL: %mul = fmul <2 x double> %2, %2 ; CHECK-UNRL: %mul3 = fmul <2 x double> %2, %3 ; CHECK-UNRL: %add = fadd <2 x double> %mul, %mul3 diff --git a/test/Transforms/BBVectorize/X86/simple.ll b/test/Transforms/BBVectorize/X86/simple.ll index 0113e38..8abfa5f 100644 --- a/test/Transforms/BBVectorize/X86/simple.ll +++ b/test/Transforms/BBVectorize/X86/simple.ll @@ -12,7 +12,11 @@ define double @test1(double %A1, double %A2, double %B1, double %B2) { %R = fmul double %Z1, %Z2 ret double %R ; CHECK: @test1 -; CHECK-NOT: fmul <2 x double> +; CHECK: fsub <2 x double> +; CHECK: fmul <2 x double> +; CHECK: fadd <2 x double> +; CHECK: extract +; CHECK: extract ; CHECK: ret double %R } @@ -63,7 +67,12 @@ define double @test2(double %A1, double %A2, double %B1, double %B2) { %R = fmul double %Z1, %Z2 ret double %R ; CHECK: @test2 -; CHECK-NOT: fmul <2 x double> +; CHECK: insertelement +; CHECK: insertelement +; CHECK: insertelement +; CHECK: insertelement +; CHECK: fsub <2 x double> +; CHECK: fmul <2 x double> ; CHECK: ret double %R } @@ -80,7 +89,15 @@ define double @test4(double %A1, double %A2, double %B1, double %B2) { %R = fmul double %Z1, %Z2 ret double %R ; CHECK: @test4 -; CHECK-NOT: fmul <2 x double> +; CHECK: insertelement +; CHECK: insertelement +; CHECK: insertelement +; CHECK: insertelement +; CHECK: fsub <2 x double> +; CHECK: fmul <2 x double> +; CHECK: insertelement +; CHECK: insertelement +; CHECK: fadd <2 x double> ; CHECK: ret double %R } diff --git a/test/Transforms/DeadArgElim/dbginfo.ll b/test/Transforms/DeadArgElim/dbginfo.ll index 351925b..d53c19c 100644 --- a/test/Transforms/DeadArgElim/dbginfo.ll +++ b/test/Transforms/DeadArgElim/dbginfo.ll @@ -36,17 +36,17 @@ entry: !llvm.dbg.cu = !{!0} -!0 = metadata !{i32 786449, i32 0, i32 4, metadata !6, metadata !"clang version 3.2 (trunk 165305)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] [/home/samsonov/tmp/clang-di/test.cc] [DW_LANG_C_plus_plus] +!0 = metadata !{i32 786449, i32 4, metadata !6, metadata !"clang version 3.2 (trunk 165305)", i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1, metadata !1, metadata !""} ; [ DW_TAG_compile_unit ] [/home/samsonov/tmp/clang-di/test.cc] [DW_LANG_C_plus_plus] !1 = metadata !{i32 0} !3 = metadata !{metadata !5, metadata !8, metadata !9} -!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"run", metadata !"run", metadata !"", metadata !6, i32 8, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void ()* @_Z3runv, null, null, metadata !1, i32 8} ; [ DW_TAG_subprogram ] [line 8] [def] [run] +!5 = metadata !{i32 786478, metadata !6, metadata !"run", metadata !"run", metadata !"", metadata !6, i32 8, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void ()* @_Z3runv, null, null, metadata !1, i32 8} ; [ DW_TAG_subprogram ] [line 8] [def] [run] !6 = metadata !{i32 786473, metadata !20} ; [ DW_TAG_file_type ] !7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !1, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] -!8 = metadata !{i32 786478, i32 0, metadata !6, metadata !"dead_vararg", metadata !"dead_vararg", metadata !"", metadata !6, i32 5, metadata !7, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (...)* @_ZN12_GLOBAL__N_111dead_varargEz, null, null, metadata !1, i32 5} ; [ DW_TAG_subprogram ] [line 5] [local] [def] [dead_vararg] +!8 = metadata !{i32 786478, metadata !6, metadata !"dead_vararg", metadata !"dead_vararg", metadata !"", metadata !6, i32 5, metadata !7, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (...)* @_ZN12_GLOBAL__N_111dead_varargEz, null, null, metadata !1, i32 5} ; [ DW_TAG_subprogram ] [line 5] [local] [def] [dead_vararg] ; CHECK: metadata !"dead_vararg"{{.*}}void ()* @_ZN12_GLOBAL__N_111dead_varargEz -!9 = metadata !{i32 786478, i32 0, metadata !6, metadata !"dead_arg", metadata !"dead_arg", metadata !"", metadata !6, i32 4, metadata !7, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (i8*)* @_ZN12_GLOBAL__N_18dead_argEPv, null, null, metadata !1, i32 4} ; [ DW_TAG_subprogram ] [line 4] [local] [def] [dead_arg] +!9 = metadata !{i32 786478, metadata !6, metadata !"dead_arg", metadata !"dead_arg", metadata !"", metadata !6, i32 4, metadata !7, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, void (i8*)* @_ZN12_GLOBAL__N_18dead_argEPv, null, null, metadata !1, i32 4} ; [ DW_TAG_subprogram ] [line 4] [local] [def] [dead_arg] ; CHECK: metadata !"dead_arg"{{.*}}void ()* @_ZN12_GLOBAL__N_18dead_argEPv diff --git a/test/Transforms/DeadStoreElimination/2011-09-06-EndOfFunction.ll b/test/Transforms/DeadStoreElimination/2011-09-06-EndOfFunction.ll index c5cc101..d114e51 100644 --- a/test/Transforms/DeadStoreElimination/2011-09-06-EndOfFunction.ll +++ b/test/Transforms/DeadStoreElimination/2011-09-06-EndOfFunction.ll @@ -11,17 +11,13 @@ _ZNSt8auto_ptrIiED1Ev.exit: %temp.lvalue = alloca %"class.std::auto_ptr", align 8 call void @_Z3barv(%"class.std::auto_ptr"* sret %temp.lvalue) %_M_ptr.i.i = getelementptr inbounds %"class.std::auto_ptr"* %temp.lvalue, i64 0, i32 0 - %tmp.i.i = load i32** %_M_ptr.i.i, align 8, !tbaa !0 + %tmp.i.i = load i32** %_M_ptr.i.i, align 8 ; CHECK-NOT: store i32* null - store i32* null, i32** %_M_ptr.i.i, align 8, !tbaa !0 + store i32* null, i32** %_M_ptr.i.i, align 8 %_M_ptr.i.i4 = getelementptr inbounds %"class.std::auto_ptr"* %agg.result, i64 0, i32 0 - store i32* %tmp.i.i, i32** %_M_ptr.i.i4, align 8, !tbaa !0 + store i32* %tmp.i.i, i32** %_M_ptr.i.i4, align 8 ; CHECK: ret void ret void } declare void @_Z3barv(%"class.std::auto_ptr"* sret) - -!0 = metadata !{metadata !"any pointer", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/Transforms/SimplifyLibCalls/2009-01-04-Annotate.ll b/test/Transforms/FunctionAttrs/2009-01-04-Annotate.ll index 16791e2..d414b73 100644 --- a/test/Transforms/SimplifyLibCalls/2009-01-04-Annotate.ll +++ b/test/Transforms/FunctionAttrs/2009-01-04-Annotate.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -simplify-libcalls -S | FileCheck %s +; RUN: opt < %s -functionattrs -S | FileCheck %s ; CHECK: declare noalias i8* @fopen(i8* nocapture, i8* nocapture) #0 declare i8* @fopen(i8*, i8*) diff --git a/test/Transforms/FunctionAttrs/annotate-1.ll b/test/Transforms/FunctionAttrs/annotate-1.ll new file mode 100644 index 0000000..ae77380 --- /dev/null +++ b/test/Transforms/FunctionAttrs/annotate-1.ll @@ -0,0 +1,18 @@ +; RUN: opt < %s -functionattrs -S | FileCheck %s + +declare i8* @fopen(i8*, i8*) +; CHECK: declare noalias i8* @fopen(i8* nocapture, i8* nocapture) [[G0:#[0-9]]] + +declare i8 @strlen(i8*) +; CHECK: declare i8 @strlen(i8* nocapture) [[G1:#[0-9]]] + +declare i32* @realloc(i32*, i32) +; CHECK: declare noalias i32* @realloc(i32* nocapture, i32) [[G0]] + +; Test deliberately wrong declaration + +declare i32 @strcpy(...) +; CHECK: declare i32 @strcpy(...) + +; CHECK: attributes [[G0]] = { nounwind } +; CHECK: attributes [[G1]] = { nounwind readonly } diff --git a/test/Transforms/GCOVProfiling/linkagename.ll b/test/Transforms/GCOVProfiling/linkagename.ll new file mode 100644 index 0000000..7ce4d86 --- /dev/null +++ b/test/Transforms/GCOVProfiling/linkagename.ll @@ -0,0 +1,27 @@ +; RUN: echo '!9 = metadata !{metadata !"%T/linkagename.ll", metadata !0}' > %t1 +; RUN: cat %s %t1 > %t2 +; RUN: opt -insert-gcov-profiling -disable-output < %t2 +; RUN: grep _Z3foov %T/linkagename.gcno +; RUN: rm %T/linkagename.gcno + +; REQUIRES: shell + +define void @_Z3foov() { +entry: + ret void, !dbg !8 +} + +!llvm.dbg.cu = !{!0} +!llvm.gcov = !{!9} + +!0 = metadata !{i32 786449, i32 4, metadata !1, metadata !"clang version 3.3 (trunk 177323)", i1 false, metadata !"", i32 0, metadata !3, metadata !3, metadata !4, metadata !3, metadata !3, metadata !""} ; [ DW_TAG_compile_unit ] [/home/nlewycky/hello.cc] [DW_LANG_C_plus_plus] +!1 = metadata !{i32 786473, metadata !2} ; [ DW_TAG_file_type ] [/home/nlewycky/hello.cc] +!2 = metadata !{metadata !"hello.cc", metadata !"/home/nlewycky"} +!3 = metadata !{i32 0} +!4 = metadata !{metadata !5} +!5 = metadata !{i32 786478, metadata !1, metadata !1, metadata !"foo", metadata !"foo", metadata !"_Z3foov", i32 1, metadata !6, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, void ()* @_Z3foov, null, null, metadata !3, i32 1} ; [ DW_TAG_subprogram ] [line 1] [def] [foo] +!6 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !7, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] [line 0, size 0, align 0, offset 0] [from ] +!7 = metadata !{null} +!8 = metadata !{i32 1, i32 0, metadata !5, null} + + diff --git a/test/Transforms/GCOVProfiling/version.ll b/test/Transforms/GCOVProfiling/version.ll index efd633a..d6d0f33 100644 --- a/test/Transforms/GCOVProfiling/version.ll +++ b/test/Transforms/GCOVProfiling/version.ll @@ -1,17 +1,19 @@ -; RUN: echo '!9 = metadata !{metadata !"%s", metadata !0}' > %t1 +; RUN: echo '!9 = metadata !{metadata !"%T/version.ll", metadata !0}' > %t1 ; RUN: cat %s %t1 > %t2 ; RUN: opt -insert-gcov-profiling -disable-output < %t2 -; RUN: head -c12 %S/version.gcno | grep '^oncg\*204MVLL$' -; RUN: rm %S/version.gcno +; RUN: head -c12 %T/version.gcno | grep '^oncg\*204MVLL$' +; RUN: rm %T/version.gcno ; RUN: not opt -insert-gcov-profiling -default-gcov-version=asdfasdf -disable-output < %t2 ; RUN: opt -insert-gcov-profiling -default-gcov-version=407* -disable-output < %t2 -; RUN: head -c12 %S/version.gcno | grep '^oncg\*704MVLL$' -; RUN: rm %S/version.gcno +; RUN: head -c12 %T/version.gcno | grep '^oncg\*704MVLL$' +; RUN: rm %T/version.gcno define void @test() { ret void, !dbg !8 } +; REQUIRES: shell + !llvm.gcov = !{!9} !llvm.dbg.cu = !{!0} diff --git a/test/Transforms/GlobalDCE/complex-constantexpr.ll b/test/Transforms/GlobalDCE/complex-constantexpr.ll new file mode 100644 index 0000000..4bf1aee --- /dev/null +++ b/test/Transforms/GlobalDCE/complex-constantexpr.ll @@ -0,0 +1,97 @@ +; RUN: opt -O2 -disable-output < %s +; PR15714 + +%struct.ham = type { i32 } + +@global5 = common global i32 0, align 4 +@global6 = common global i32 0, align 4 +@global7 = common global i32 0, align 4 +@global = common global i32 0, align 4 +@global8 = common global %struct.ham zeroinitializer, align 4 +@global9 = common global i32 0, align 4 +@global10 = common global i32 0, align 4 +@global11 = common global i32 0, align 4 + +define void @zot12() { +bb: + store i32 0, i32* @global5, align 4 + store i32 0, i32* @global6, align 4 + br label %bb2 + +bb1: ; preds = %bb11 + %tmp = load i32* @global5, align 4 + br label %bb2 + +bb2: ; preds = %bb1, %bb + %tmp3 = phi i32 [ %tmp, %bb1 ], [ 0, %bb ] + %tmp4 = xor i32 %tmp3, zext (i1 icmp ne (i64 ptrtoint (i32* @global5 to i64), i64 1) to i32) + store i32 %tmp4, i32* @global5, align 4 + %tmp5 = icmp eq i32 %tmp3, zext (i1 icmp ne (i64 ptrtoint (i32* @global5 to i64), i64 1) to i32) + br i1 %tmp5, label %bb8, label %bb6 + +bb6: ; preds = %bb2 + %tmp7 = tail call i32 @quux13() + br label %bb8 + +bb8: ; preds = %bb6, %bb2 + %tmp9 = load i32* @global7, align 4 + %tmp10 = icmp eq i32 %tmp9, 0 + br i1 %tmp10, label %bb11, label %bb15 + +bb11: ; preds = %bb8 + %tmp12 = load i32* @global6, align 4 + %tmp13 = add nsw i32 %tmp12, 1 + store i32 %tmp13, i32* @global6, align 4 + %tmp14 = icmp slt i32 %tmp13, 42 + br i1 %tmp14, label %bb1, label %bb15 + +bb15: ; preds = %bb11, %bb8 + ret void +} + +define i32 @quux13() { +bb: + store i32 1, i32* @global5, align 4 + ret i32 1 +} + +define void @wombat() { +bb: + tail call void @zot12() + ret void +} + +define void @wombat14() { +bb: + tail call void @blam() + ret void +} + +define void @blam() { +bb: + store i32 ptrtoint (i32* @global to i32), i32* getelementptr inbounds (%struct.ham* @global8, i64 0, i32 0), align 4 + store i32 0, i32* @global9, align 4 + %tmp = load i32* getelementptr inbounds (%struct.ham* @global8, i64 0, i32 0), align 4 + br label %bb1 + +bb1: ; preds = %bb1, %bb + %tmp2 = phi i32 [ 0, %bb ], [ %tmp11, %bb1 ] + %tmp3 = phi i32 [ %tmp, %bb ], [ %tmp10, %bb1 ] + %tmp4 = icmp sgt i32 %tmp3, 0 + %tmp5 = zext i1 %tmp4 to i32 + %tmp6 = urem i32 %tmp5, 5 + %tmp7 = mul i32 %tmp3, -80 + %tmp8 = or i32 %tmp7, %tmp6 + %tmp9 = icmp eq i32 %tmp8, 0 + %tmp10 = zext i1 %tmp9 to i32 + %tmp11 = add nsw i32 %tmp2, 1 + %tmp12 = icmp eq i32 %tmp11, 20 + br i1 %tmp12, label %bb13, label %bb1 + +bb13: ; preds = %bb1 + store i32 %tmp10, i32* getelementptr inbounds (%struct.ham* @global8, i64 0, i32 0), align 4 + store i32 0, i32* @global10, align 4 + store i32 %tmp6, i32* @global11, align 4 + store i32 20, i32* @global9, align 4 + ret void +} diff --git a/test/Transforms/GlobalDCE/indirectbr.ll b/test/Transforms/GlobalDCE/indirectbr.ll new file mode 100644 index 0000000..90f1ae4 --- /dev/null +++ b/test/Transforms/GlobalDCE/indirectbr.ll @@ -0,0 +1,18 @@ +; RUN: opt -S -globaldce < %s | FileCheck %s + +@L = internal unnamed_addr constant [3 x i8*] [i8* blockaddress(@test1, %L1), i8* blockaddress(@test1, %L2), i8* null], align 16 + +; CHECK: @L = internal unnamed_addr constant + +define void @test1(i32 %idx) { +entry: + br label %L1 + +L1: + %arrayidx = getelementptr inbounds [3 x i8*]* @L, i32 0, i32 %idx + %l = load i8** %arrayidx + indirectbr i8* %l, [label %L1, label %L2] + +L2: + ret void +} diff --git a/test/Transforms/GlobalOpt/crash-2.ll b/test/Transforms/GlobalOpt/crash-2.ll new file mode 100644 index 0000000..684f6ce --- /dev/null +++ b/test/Transforms/GlobalOpt/crash-2.ll @@ -0,0 +1,19 @@ +; RUN: llvm-as < %s | opt -globalopt -disable-output +; NOTE: This needs to run through 'llvm-as' first to reproduce the error! +; PR15440 + +%union.U5.0.6.12 = type { i32 } +%struct.S0.1.7.13 = type { i8, i8, i8, i8, i16, [2 x i8] } +%struct.S1.2.8.14 = type { i32, i16, i8, i8 } + +@.str = external unnamed_addr constant [2 x i8], align 1 +@g_25 = external global i8, align 1 +@g_71 = internal global %struct.S0.1.7.13 { i8 1, i8 -93, i8 58, i8 -1, i16 -5, [2 x i8] undef }, align 4 +@g_114 = external global i8, align 1 +@g_30 = external global { i32, i8, i32, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8 }, align 4 +@g_271 = internal global [7 x [6 x [5 x i8*]]] [[6 x [5 x i8*]] [[5 x i8*] [i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_25, i8* null], [5 x i8*] [i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_114, i8* @g_114, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0)], [5 x i8*] [i8* null, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_25, i8* null, i8* null], [5 x i8*] [i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_25, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0)], [5 x i8*] [i8* @g_25, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* null, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0)], [5 x i8*] [i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* @g_25, i8* @g_114, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0)]], [6 x [5 x i8*]] [[5 x i8*] [i8* @g_25, i8* null, i8* @g_25, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0)], [5 x i8*] [i8* @g_25, i8* @g_114, i8* @g_25, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_114], [5 x i8*] [i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* @g_25, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_25], [5 x i8*] [i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_114, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0)], [5 x i8*] [i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_25, i8* @g_25, i8* @g_25, i8* @g_25], [5 x i8*] [i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_25, i8* @g_25, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0)]], [6 x [5 x i8*]] [[5 x i8*] [i8* null, i8* @g_25, i8* @g_25, i8* @g_25, i8* null], [5 x i8*] [i8* @g_25, i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* @g_25, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1)], [5 x i8*] [i8* null, i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* null, i8* @g_25], [5 x i8*] [i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_114, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1)], [5 x i8*] [i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* null, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_25, i8* null], [5 x i8*] [i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* @g_25, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0)]], [6 x [5 x i8*]] [[5 x i8*] [i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_25, i8* null, i8* @g_25], [5 x i8*] [i8* @g_25, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0)], [5 x i8*] [i8* @g_25, i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_25, i8* @g_25], [5 x i8*] [i8* @g_114, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_114], [5 x i8*] [i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* @g_25, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0)], [5 x i8*] [i8* @g_114, i8* @g_25, i8* @g_25, i8* @g_114, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0)]], [6 x [5 x i8*]] [[5 x i8*] [i8* @g_25, i8* null, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_25, i8* @g_25], [5 x i8*] [i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_25, i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1)], [5 x i8*] [i8* @g_25, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* @g_25, i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1)], [5 x i8*] [i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* @g_114], [5 x i8*] [i8* @g_25, i8* null, i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* null], [5 x i8*] [i8* @g_114, i8* @g_25, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_114, i8* @g_25]], [6 x [5 x i8*]] [[5 x i8*] [i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* null, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* null, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0)], [5 x i8*] [i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_25, i8* @g_25, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0)], [5 x i8*] [i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1)], [5 x i8*] [i8* @g_114, i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0)], [5 x i8*] [i8* @g_25, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_25, i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0)], [5 x i8*] [i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_25, i8* @g_25, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_25]], [6 x [5 x i8*]] [[5 x i8*] [i8* @g_25, i8* @g_25, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* null], [5 x i8*] [i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_114, i8* @g_25, i8* @g_25, i8* @g_114], [5 x i8*] [i8* null, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_25, i8* null, i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1)], [5 x i8*] [i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* @g_114, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* @g_114, i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1)], [5 x i8*] [i8* @g_25, i8* @g_25, i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* @g_25], [5 x i8*] [i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* @g_25, i8* @g_25, i8* getelementptr (i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), i64 1), i8* @g_25]]], align 4 + +define i32 @func() { + %tmp = load i8* getelementptr inbounds (%struct.S0.1.7.13* @g_71, i32 0, i32 0), align 1 + ret i32 0 +} diff --git a/test/Transforms/IndVarSimplify/dont-recompute.ll b/test/Transforms/IndVarSimplify/dont-recompute.ll new file mode 100644 index 0000000..d37b0e2 --- /dev/null +++ b/test/Transforms/IndVarSimplify/dont-recompute.ll @@ -0,0 +1,69 @@ +; RUN: opt < %s -indvars -S | FileCheck %s + +; This tests that the IV is not recomputed outside of the loop when it is known +; to be computed by the loop and used in the loop any way. In the example below +; although a's value can be computed outside of the loop, there is no benefit +; in doing so as it has to be computed by the loop anyway. +; +; extern void func(unsigned val); +; +; void test(unsigned m) +; { +; unsigned a = 0; +; +; for (int i=0; i<186; i++) { +; a += m; +; func(a); +; } +; +; func(a); +; } + +declare void @func(i32) + +; CHECK: @test +define void @test(i32 %m) nounwind uwtable { +entry: + br label %for.body + +for.body: ; preds = %for.body, %entry + %i.06 = phi i32 [ 0, %entry ], [ %inc, %for.body ] + %a.05 = phi i32 [ 0, %entry ], [ %add, %for.body ] + %add = add i32 %a.05, %m +; CHECK: tail call void @func(i32 %add) + tail call void @func(i32 %add) + %inc = add nsw i32 %i.06, 1 + %exitcond = icmp eq i32 %inc, 186 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body +; CHECK: for.end: +; CHECK-NOT: mul i32 %m, 186 +; CHECK:%add.lcssa = phi i32 [ %add, %for.body ] +; CHECK-NEXT: tail call void @func(i32 %add.lcssa) + tail call void @func(i32 %add) + ret void +} + +; CHECK: @test2 +define i32 @test2(i32 %m) nounwind uwtable { +entry: + br label %for.body + +for.body: ; preds = %for.body, %entry + %i.06 = phi i32 [ 0, %entry ], [ %inc, %for.body ] + %a.05 = phi i32 [ 0, %entry ], [ %add, %for.body ] + %add = add i32 %a.05, %m +; CHECK: tail call void @func(i32 %add) + tail call void @func(i32 %add) + %inc = add nsw i32 %i.06, 1 + %exitcond = icmp eq i32 %inc, 186 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body +; CHECK: for.end: +; CHECK-NOT: mul i32 %m, 186 +; CHECK:%add.lcssa = phi i32 [ %add, %for.body ] +; CHECK-NEXT: ret i32 %add.lcssa + ret i32 %add +} diff --git a/test/Transforms/Inline/2003-09-22-PHINodeInlineFail.ll b/test/Transforms/Inline/2003-09-22-PHINodeInlineFail.ll index 5ced3b8..b8ca560 100644 --- a/test/Transforms/Inline/2003-09-22-PHINodeInlineFail.ll +++ b/test/Transforms/Inline/2003-09-22-PHINodeInlineFail.ll @@ -3,10 +3,15 @@ define i32 @main() { entry: invoke void @__main( ) - to label %LongJmpBlkPre unwind label %LongJmpBlkPre + to label %LongJmpBlkPost unwind label %LongJmpBlkPre -LongJmpBlkPre: ; preds = %entry, %entry +LongJmpBlkPost: + ret i32 0 + +LongJmpBlkPre: %i.3 = phi i32 [ 0, %entry ], [ 0, %entry ] ; <i32> [#uses=0] + %exn = landingpad {i8*, i32} personality i32 (...)* @__gxx_personality_v0 + cleanup ret i32 0 } @@ -14,3 +19,4 @@ define void @__main() { ret void } +declare i32 @__gxx_personality_v0(...) diff --git a/test/Transforms/Inline/2003-09-22-PHINodesInNormalInvokeDest.ll b/test/Transforms/Inline/2003-09-22-PHINodesInNormalInvokeDest.ll index 1bd5529..43bdd30 100644 --- a/test/Transforms/Inline/2003-09-22-PHINodesInNormalInvokeDest.ll +++ b/test/Transforms/Inline/2003-09-22-PHINodesInNormalInvokeDest.ll @@ -13,6 +13,8 @@ LJDecisionBB: ; preds = %else br label %else RethrowExcept: ; preds = %entry + %exn = landingpad {i8*, i32} personality i32 (...)* @__gxx_personality_v0 + cleanup ret i32 0 } @@ -20,4 +22,4 @@ define void @__main() { ret void } - +declare i32 @__gxx_personality_v0(...) diff --git a/test/Transforms/Inline/inline_invoke.ll b/test/Transforms/Inline/inline_invoke.ll index c53bb5a..c394138 100644 --- a/test/Transforms/Inline/inline_invoke.ll +++ b/test/Transforms/Inline/inline_invoke.ll @@ -96,6 +96,7 @@ eh.resume: ; CHECK: landingpad { i8*, i32 } personality i32 (...)* @__gxx_personality_v0 ; CHECK-NEXT: cleanup ; CHECK-NEXT: catch i8* bitcast (i8** @_ZTIi to i8*) +; CHECK-NEXT: catch i8* bitcast (i8** @_ZTIi to i8*) ; CHECK-NEXT: invoke void @_ZN1AD1Ev(%struct.A* [[A]]) ; CHECK-NEXT: to label %[[LBL:[^\s]+]] unwind ; CHECK: [[LBL]]: @@ -166,6 +167,7 @@ eh.resume: ; CHECK-NEXT: [[LPADVAL1:%.*]] = landingpad { i8*, i32 } personality i32 (...)* @__gxx_personality_v0 ; CHECK-NEXT: cleanup ; CHECK-NEXT: catch i8* bitcast (i8** @_ZTIi to i8*) +; CHECK-NEXT: catch i8* bitcast (i8** @_ZTIi to i8*) ; CHECK-NEXT: invoke void @_ZN1AD1Ev(%struct.A* [[A1]]) ; CHECK-NEXT: to label %[[RESUME1:[^\s]+]] unwind ; CHECK: [[RESUME1]]: @@ -185,6 +187,7 @@ eh.resume: ; CHECK-NEXT: [[LPADVAL2:%.*]] = landingpad { i8*, i32 } personality i32 (...)* @__gxx_personality_v0 ; CHECK-NEXT: cleanup ; CHECK-NEXT: catch i8* bitcast (i8** @_ZTIi to i8*) +; CHECK-NEXT: catch i8* bitcast (i8** @_ZTIi to i8*) ; CHECK-NEXT: invoke void @_ZN1AD1Ev(%struct.A* [[A2]]) ; CHECK-NEXT: to label %[[RESUME2:[^\s]+]] unwind ; CHECK: [[RESUME2]]: @@ -272,6 +275,7 @@ lpad.cont: ; CHECK: landingpad { i8*, i32 } personality i32 (...)* @__gxx_personality_v0 ; CHECK-NEXT: cleanup ; CHECK-NEXT: catch i8* bitcast (i8** @_ZTIi to i8*) +; CHECK-NEXT: catch i8* bitcast (i8** @_ZTIi to i8*) ; CHECK-NEXT: invoke void @_ZN1AD1Ev( ; CHECK-NEXT: to label %[[L:[^\s]+]] unwind ; CHECK: [[L]]: @@ -318,6 +322,7 @@ terminate: ; CHECK: landingpad { i8*, i32 } personality i32 (...)* @__gxx_personality_v0 ; CHECK-NEXT: cleanup ; CHECK-NEXT: catch i8* bitcast (i8** @_ZTIi to i8*) +; CHECK-NEXT: catch i8* bitcast (i8** @_ZTIi to i8*) ; CHECK-NEXT: invoke void @_ZN1AD1Ev( ; CHECK-NEXT: to label %[[L:[^\s]+]] unwind ; CHECK: [[L]]: diff --git a/test/Transforms/InstCombine/2009-02-11-NotInitialized.ll b/test/Transforms/InstCombine/2009-02-11-NotInitialized.ll new file mode 100644 index 0000000..b66495d --- /dev/null +++ b/test/Transforms/InstCombine/2009-02-11-NotInitialized.ll @@ -0,0 +1,14 @@ +; RUN: opt < %s -inline -instcombine -functionattrs | llvm-dis +; +; Check that nocapture attributes are added when run after an SCC pass. +; PR3520 + +define i32 @use(i8* %x) nounwind readonly { +; CHECK: @use(i8* nocapture %x) + %1 = tail call i64 @strlen(i8* %x) nounwind readonly + %2 = trunc i64 %1 to i32 + ret i32 %2 +} + +declare i64 @strlen(i8*) nounwind readonly +; CHECK: declare i64 @strlen(i8* nocapture) nounwind readonly diff --git a/test/Transforms/InstCombine/2012-05-27-Negative-Shift-Crash.ll b/test/Transforms/InstCombine/2012-05-27-Negative-Shift-Crash.ll index 2ec0a32..ba83fe9 100644 --- a/test/Transforms/InstCombine/2012-05-27-Negative-Shift-Crash.ll +++ b/test/Transforms/InstCombine/2012-05-27-Negative-Shift-Crash.ll @@ -20,10 +20,10 @@ entry: define void @fn4() nounwind uwtable ssp { entry: - %0 = load i32* @d, align 4, !tbaa !0 + %0 = load i32* @d, align 4 %cmp = icmp eq i32 %0, 0 %conv = zext i1 %cmp to i32 - store i32 %conv, i32* @c, align 4, !tbaa !0 + store i32 %conv, i32* @c, align 4 tail call void @fn3(i32 %conv) nounwind ret void } @@ -31,15 +31,15 @@ entry: define void @fn3(i32 %p1) nounwind uwtable ssp { entry: %and = and i32 %p1, 8 - store i32 %and, i32* @e, align 4, !tbaa !0 + store i32 %and, i32* @e, align 4 %sub = add nsw i32 %and, -1 - store i32 %sub, i32* @f, align 4, !tbaa !0 - %0 = load i32* @a, align 4, !tbaa !0 + store i32 %sub, i32* @f, align 4 + %0 = load i32* @a, align 4 %tobool = icmp eq i32 %0, 0 br i1 %tobool, label %if.else, label %if.then if.then: ; preds = %entry - %1 = load i32* @b, align 4, !tbaa !0 + %1 = load i32* @b, align 4 %.lobit = lshr i32 %1, 31 %2 = trunc i32 %.lobit to i8 %.not = xor i8 %2, 1 @@ -55,7 +55,3 @@ if.end: ; preds = %if.else, %if.then store i32 %storemerge, i32* @b, align 4 ret void } - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/Transforms/InstCombine/and-fcmp.ll b/test/Transforms/InstCombine/and-fcmp.ll index 40c44c0..a398307 100644 --- a/test/Transforms/InstCombine/and-fcmp.ll +++ b/test/Transforms/InstCombine/and-fcmp.ll @@ -77,3 +77,24 @@ define zeroext i8 @t7(float %x, float %y) nounwind { ; CHECK: fcmp uno ; CHECK-NOT: fcmp ult } + +; PR15737 +define i1 @t8(float %a, double %b) { + %cmp = fcmp ord float %a, 0.000000e+00 + %cmp1 = fcmp ord double %b, 0.000000e+00 + %and = and i1 %cmp, %cmp1 + ret i1 %and +; CHECK: t8 +; CHECK: fcmp ord +; CHECK: fcmp ord +} + +define <2 x i1> @t9(<2 x float> %a, <2 x double> %b) { + %cmp = fcmp ord <2 x float> %a, zeroinitializer + %cmp1 = fcmp ord <2 x double> %b, zeroinitializer + %and = and <2 x i1> %cmp, %cmp1 + ret <2 x i1> %and +; CHECK: t9 +; CHECK: fcmp ord +; CHECK: fcmp ord +} diff --git a/test/Transforms/InstCombine/apint-shift-simplify.ll b/test/Transforms/InstCombine/apint-shift-simplify.ll index 818ae66..14e895a 100644 --- a/test/Transforms/InstCombine/apint-shift-simplify.ll +++ b/test/Transforms/InstCombine/apint-shift-simplify.ll @@ -1,11 +1,14 @@ -; RUN: opt < %s -instcombine -S | \ -; RUN: egrep "shl|lshr|ashr" | count 3 +; RUN: opt < %s -instcombine -S | FileCheck %s define i41 @test0(i41 %A, i41 %B, i41 %C) { %X = shl i41 %A, %C %Y = shl i41 %B, %C %Z = and i41 %X, %Y ret i41 %Z +; CHECK: @test0 +; CHECK-NEXT: and i41 %A, %B +; CHECK-NEXT: shl i41 +; CHECK-NEXT: ret } define i57 @test1(i57 %A, i57 %B, i57 %C) { @@ -13,6 +16,10 @@ define i57 @test1(i57 %A, i57 %B, i57 %C) { %Y = lshr i57 %B, %C %Z = or i57 %X, %Y ret i57 %Z +; CHECK: @test1 +; CHECK-NEXT: or i57 %A, %B +; CHECK-NEXT: lshr i57 +; CHECK-NEXT: ret } define i49 @test2(i49 %A, i49 %B, i49 %C) { @@ -20,4 +27,8 @@ define i49 @test2(i49 %A, i49 %B, i49 %C) { %Y = ashr i49 %B, %C %Z = xor i49 %X, %Y ret i49 %Z +; CHECK: @test2 +; CHECK-NEXT: xor i49 %A, %B +; CHECK-NEXT: ashr i49 +; CHECK-NEXT: ret } diff --git a/test/Transforms/InstCombine/bitcast-bigendian.ll b/test/Transforms/InstCombine/bitcast-bigendian.ll new file mode 100644 index 0000000..4ded581 --- /dev/null +++ b/test/Transforms/InstCombine/bitcast-bigendian.ll @@ -0,0 +1,50 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s + +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +; These tests are extracted from bitcast.ll. +; Verify that they also work correctly on big-endian targets. + +define float @test2(<2 x float> %A, <2 x i32> %B) { + %tmp28 = bitcast <2 x float> %A to i64 ; <i64> [#uses=2] + %tmp23 = trunc i64 %tmp28 to i32 ; <i32> [#uses=1] + %tmp24 = bitcast i32 %tmp23 to float ; <float> [#uses=1] + + %tmp = bitcast <2 x i32> %B to i64 + %tmp2 = trunc i64 %tmp to i32 ; <i32> [#uses=1] + %tmp4 = bitcast i32 %tmp2 to float ; <float> [#uses=1] + + %add = fadd float %tmp24, %tmp4 + ret float %add + +; CHECK: @test2 +; CHECK-NEXT: %tmp24 = extractelement <2 x float> %A, i32 1 +; CHECK-NEXT: bitcast <2 x i32> %B to <2 x float> +; CHECK-NEXT: %tmp4 = extractelement <2 x float> {{.*}}, i32 1 +; CHECK-NEXT: %add = fadd float %tmp24, %tmp4 +; CHECK-NEXT: ret float %add +} + +define float @test3(<2 x float> %A, <2 x i64> %B) { + %tmp28 = bitcast <2 x float> %A to i64 + %tmp29 = lshr i64 %tmp28, 32 + %tmp23 = trunc i64 %tmp29 to i32 + %tmp24 = bitcast i32 %tmp23 to float + + %tmp = bitcast <2 x i64> %B to i128 + %tmp1 = lshr i128 %tmp, 64 + %tmp2 = trunc i128 %tmp1 to i32 + %tmp4 = bitcast i32 %tmp2 to float + + %add = fadd float %tmp24, %tmp4 + ret float %add + +; CHECK: @test3 +; CHECK-NEXT: %tmp24 = extractelement <2 x float> %A, i32 0 +; CHECK-NEXT: bitcast <2 x i64> %B to <4 x float> +; CHECK-NEXT: %tmp4 = extractelement <4 x float> {{.*}}, i32 1 +; CHECK-NEXT: %add = fadd float %tmp24, %tmp4 +; CHECK-NEXT: ret float %add +} + diff --git a/test/Transforms/InstCombine/debuginfo.ll b/test/Transforms/InstCombine/debuginfo.ll index e7fe71d..a9e3de3 100644 --- a/test/Transforms/InstCombine/debuginfo.ll +++ b/test/Transforms/InstCombine/debuginfo.ll @@ -11,18 +11,18 @@ entry: %__dest.addr = alloca i8*, align 8 %__val.addr = alloca i32, align 4 %__len.addr = alloca i64, align 8 - store i8* %__dest, i8** %__dest.addr, align 8, !tbaa !1 + store i8* %__dest, i8** %__dest.addr, align 8 ; CHECK-NOT: call void @llvm.dbg.declare ; CHECK: call void @llvm.dbg.value call void @llvm.dbg.declare(metadata !{i8** %__dest.addr}, metadata !0), !dbg !16 - store i32 %__val, i32* %__val.addr, align 4, !tbaa !17 + store i32 %__val, i32* %__val.addr, align 4 call void @llvm.dbg.declare(metadata !{i32* %__val.addr}, metadata !7), !dbg !18 - store i64 %__len, i64* %__len.addr, align 8, !tbaa !19 + store i64 %__len, i64* %__len.addr, align 8 call void @llvm.dbg.declare(metadata !{i64* %__len.addr}, metadata !9), !dbg !20 - %tmp = load i8** %__dest.addr, align 8, !dbg !21, !tbaa !13 - %tmp1 = load i32* %__val.addr, align 4, !dbg !21, !tbaa !17 - %tmp2 = load i64* %__len.addr, align 8, !dbg !21, !tbaa !19 - %tmp3 = load i8** %__dest.addr, align 8, !dbg !21, !tbaa !13 + %tmp = load i8** %__dest.addr, align 8, !dbg !21 + %tmp1 = load i32* %__val.addr, align 4, !dbg !21 + %tmp2 = load i64* %__len.addr, align 8, !dbg !21 + %tmp3 = load i8** %__dest.addr, align 8, !dbg !21 %0 = call i64 @llvm.objectsize.i64(i8* %tmp3, i1 false), !dbg !21 %call = call i8* @foo(i8* %tmp, i32 %tmp1, i64 %tmp2, i64 %0), !dbg !21 ret i8* %call, !dbg !21 @@ -31,7 +31,7 @@ entry: !llvm.dbg.cu = !{!3} !0 = metadata !{i32 786689, metadata !1, metadata !"__dest", metadata !2, i32 16777294, metadata !6, i32 0, null} ; [ DW_TAG_arg_variable ] -!1 = metadata !{i32 786478, i32 0, metadata !2, metadata !"foobar", metadata !"foobar", metadata !"", metadata !2, i32 79, metadata !4, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i8* (i8*, i32, i64)* @foobar, null, null, metadata !25, i32 79} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 786478, metadata !2, metadata !"foobar", metadata !"foobar", metadata !"", metadata !2, i32 79, metadata !4, i1 true, i1 true, i32 0, i32 0, i32 0, i32 256, i1 true, i8* (i8*, i32, i64)* @foobar, null, null, metadata !25, i32 79} ; [ DW_TAG_subprogram ] !2 = metadata !{i32 786473, metadata !27} ; [ DW_TAG_file_type ] !3 = metadata !{i32 786449, i32 0, i32 12, metadata !26, metadata !"clang version 3.0 (trunk 127710)", i1 true, metadata !"", i32 0, null, null, metadata !24, null, null} ; [ DW_TAG_compile_unit ] !4 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !5, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] @@ -43,13 +43,8 @@ entry: !10 = metadata !{i32 589846, metadata !3, metadata !"size_t", metadata !2, i32 80, i64 0, i64 0, i64 0, i32 0, metadata !11} ; [ DW_TAG_typedef ] !11 = metadata !{i32 589846, metadata !3, metadata !"__darwin_size_t", metadata !2, i32 90, i64 0, i64 0, i64 0, i32 0, metadata !12} ; [ DW_TAG_typedef ] !12 = metadata !{i32 786468, metadata !3, metadata !"long unsigned int", null, i32 0, i64 64, i64 64, i64 0, i32 0, i32 7} ; [ DW_TAG_base_type ] -!13 = metadata !{metadata !"any pointer", metadata !14} -!14 = metadata !{metadata !"omnipotent char", metadata !15} -!15 = metadata !{metadata !"Simple C/C++ TBAA", null} !16 = metadata !{i32 78, i32 28, metadata !1, null} -!17 = metadata !{metadata !"int", metadata !14} !18 = metadata !{i32 78, i32 40, metadata !1, null} -!19 = metadata !{metadata !"long", metadata !14} !20 = metadata !{i32 78, i32 54, metadata !1, null} !21 = metadata !{i32 80, i32 3, metadata !22, null} !22 = metadata !{i32 786443, metadata !23, i32 80, i32 3, metadata !2, i32 7} ; [ DW_TAG_lexical_block ] diff --git a/test/Transforms/InstCombine/fast-math.ll b/test/Transforms/InstCombine/fast-math.ll index 47f1ec4..edcbcc7 100644 --- a/test/Transforms/InstCombine/fast-math.ll +++ b/test/Transforms/InstCombine/fast-math.ll @@ -130,6 +130,16 @@ define double @fail2(double %f1, double %f2) { ; CHECK: ret } +; c1 * x - x => (c1 - 1.0) * x +define float @fold13(float %x) { + %mul = fmul fast float %x, 7.000000e+00 + %sub = fsub fast float %mul, %x + ret float %sub +; CHECK: fold13 +; CHECK: fmul fast float %x, 6.000000e+00 +; CHECK: ret +} + ; ========================================================================= ; ; Testing-cases about fmul begin diff --git a/test/Transforms/InstCombine/fprintf-1.ll b/test/Transforms/InstCombine/fprintf-1.ll index 39d86b4..e1dc191 100644 --- a/test/Transforms/InstCombine/fprintf-1.ll +++ b/test/Transforms/InstCombine/fprintf-1.ll @@ -78,3 +78,12 @@ define void @test_no_simplify2(%FILE* %fp, double %d) { ret void ; CHECK-NEXT: ret void } + +define i32 @test_no_simplify3(%FILE* %fp) { +; CHECK: @test_no_simplify3 + %fmt = getelementptr [13 x i8]* @hello_world, i32 0, i32 0 + %1 = call i32 (%FILE*, i8*, ...)* @fprintf(%FILE* %fp, i8* %fmt) +; CHECK-NEXT: call i32 (%FILE*, i8*, ...)* @fprintf(%FILE* %fp, i8* getelementptr inbounds ([13 x i8]* @hello_world, i32 0, i32 0)) + ret i32 %1 +; CHECK-NEXT: ret i32 %1 +} diff --git a/test/Transforms/InstCombine/icmp.ll b/test/Transforms/InstCombine/icmp.ll index 331eb3f..c912a57 100644 --- a/test/Transforms/InstCombine/icmp.ll +++ b/test/Transforms/InstCombine/icmp.ll @@ -744,3 +744,235 @@ define i1 @icmp_shl24(i32 %x) { %cmp = icmp slt i32 %shl, 603979776 ret i1 %cmp } + +; If the (shl x, C) preserved the sign and this is a sign test, +; compare the LHS operand instead +; CHECK: @icmp_shl_nsw_sgt +; CHECK-NEXT: icmp sgt i32 %x, 0 +define i1 @icmp_shl_nsw_sgt(i32 %x) { + %shl = shl nsw i32 %x, 21 + %cmp = icmp sgt i32 %shl, 0 + ret i1 %cmp +} + +; CHECK: @icmp_shl_nsw_sge0 +; CHECK-NEXT: icmp sgt i32 %x, -1 +define i1 @icmp_shl_nsw_sge0(i32 %x) { + %shl = shl nsw i32 %x, 21 + %cmp = icmp sge i32 %shl, 0 + ret i1 %cmp +} + +; CHECK: @icmp_shl_nsw_sge1 +; CHECK-NEXT: icmp sgt i32 %x, 0 +define i1 @icmp_shl_nsw_sge1(i32 %x) { + %shl = shl nsw i32 %x, 21 + %cmp = icmp sge i32 %shl, 1 + ret i1 %cmp +} + +; Checks for icmp (eq|ne) (shl x, C), 0 +; CHECK: @icmp_shl_nsw_eq +; CHECK-NEXT: icmp eq i32 %x, 0 +define i1 @icmp_shl_nsw_eq(i32 %x) { + %mul = shl nsw i32 %x, 5 + %cmp = icmp eq i32 %mul, 0 + ret i1 %cmp +} + +; CHECK: @icmp_shl_eq +; CHECK-NOT: icmp eq i32 %mul, 0 +define i1 @icmp_shl_eq(i32 %x) { + %mul = shl i32 %x, 5 + %cmp = icmp eq i32 %mul, 0 + ret i1 %cmp +} + +; CHECK: @icmp_shl_nsw_ne +; CHECK-NEXT: icmp ne i32 %x, 0 +define i1 @icmp_shl_nsw_ne(i32 %x) { + %mul = shl nsw i32 %x, 7 + %cmp = icmp ne i32 %mul, 0 + ret i1 %cmp +} + +; CHECK: @icmp_shl_ne +; CHECK-NOT: icmp ne i32 %x, 0 +define i1 @icmp_shl_ne(i32 %x) { + %mul = shl i32 %x, 7 + %cmp = icmp ne i32 %mul, 0 + ret i1 %cmp +} + +; If the (mul x, C) preserved the sign and this is sign test, +; compare the LHS operand instead +; CHECK: @icmp_mul_nsw +; CHECK-NEXT: icmp sgt i32 %x, 0 +define i1 @icmp_mul_nsw(i32 %x) { + %mul = mul nsw i32 %x, 12 + %cmp = icmp sgt i32 %mul, 0 + ret i1 %cmp +} + +; CHECK: @icmp_mul_nsw1 +; CHECK-NEXT: icmp slt i32 %x, 0 +define i1 @icmp_mul_nsw1(i32 %x) { + %mul = mul nsw i32 %x, 12 + %cmp = icmp sle i32 %mul, -1 + ret i1 %cmp +} + +; CHECK: @icmp_mul_nsw_neg +; CHECK-NEXT: icmp slt i32 %x, 1 +define i1 @icmp_mul_nsw_neg(i32 %x) { + %mul = mul nsw i32 %x, -12 + %cmp = icmp sge i32 %mul, 0 + ret i1 %cmp +} + +; CHECK: @icmp_mul_nsw_neg1 +; CHECK-NEXT: icmp slt i32 %x, 0 +define i1 @icmp_mul_nsw_neg1(i32 %x) { + %mul = mul nsw i32 %x, -12 + %cmp = icmp sge i32 %mul, 1 + ret i1 %cmp +} + +; CHECK: @icmp_mul_nsw_0 +; CHECK-NOT: icmp sgt i32 %x, 0 +define i1 @icmp_mul_nsw_0(i32 %x) { + %mul = mul nsw i32 %x, 0 + %cmp = icmp sgt i32 %mul, 0 + ret i1 %cmp +} + +; CHECK: @icmp_mul +; CHECK-NEXT: %mul = mul i32 %x, -12 +define i1 @icmp_mul(i32 %x) { + %mul = mul i32 %x, -12 + %cmp = icmp sge i32 %mul, 0 + ret i1 %cmp +} + +; Checks for icmp (eq|ne) (mul x, C), 0 +; CHECK: @icmp_mul_neq0 +; CHECK-NEXT: icmp ne i32 %x, 0 +define i1 @icmp_mul_neq0(i32 %x) { + %mul = mul nsw i32 %x, -12 + %cmp = icmp ne i32 %mul, 0 + ret i1 %cmp +} + +; CHECK: @icmp_mul_eq0 +; CHECK-NEXT: icmp eq i32 %x, 0 +define i1 @icmp_mul_eq0(i32 %x) { + %mul = mul nsw i32 %x, 12 + %cmp = icmp eq i32 %mul, 0 + ret i1 %cmp +} + +; CHECK: @icmp_mul0_eq0 +; CHECK-NEXT: ret i1 true +define i1 @icmp_mul0_eq0(i32 %x) { + %mul = mul i32 %x, 0 + %cmp = icmp eq i32 %mul, 0 + ret i1 %cmp +} + +; CHECK: @icmp_mul0_ne0 +; CHECK-NEXT: ret i1 false +define i1 @icmp_mul0_ne0(i32 %x) { + %mul = mul i32 %x, 0 + %cmp = icmp ne i32 %mul, 0 + ret i1 %cmp +} + +; CHECK: @icmp_sub1_sge +; CHECK-NEXT: icmp sgt i32 %x, %y +define i1 @icmp_sub1_sge(i32 %x, i32 %y) { + %sub = add nsw i32 %x, -1 + %cmp = icmp sge i32 %sub, %y + ret i1 %cmp +} + +; CHECK: @icmp_add1_sgt +; CHECK-NEXT: icmp sge i32 %x, %y +define i1 @icmp_add1_sgt(i32 %x, i32 %y) { + %add = add nsw i32 %x, 1 + %cmp = icmp sgt i32 %add, %y + ret i1 %cmp +} + +; CHECK: @icmp_sub1_slt +; CHECK-NEXT: icmp sle i32 %x, %y +define i1 @icmp_sub1_slt(i32 %x, i32 %y) { + %sub = add nsw i32 %x, -1 + %cmp = icmp slt i32 %sub, %y + ret i1 %cmp +} + +; CHECK: @icmp_add1_sle +; CHECK-NEXT: icmp slt i32 %x, %y +define i1 @icmp_add1_sle(i32 %x, i32 %y) { + %add = add nsw i32 %x, 1 + %cmp = icmp sle i32 %add, %y + ret i1 %cmp +} + +; CHECK: @icmp_add20_sge_add57 +; CHECK-NEXT: [[ADD:%[a-z0-9]+]] = add nsw i32 %y, 37 +; CHECK-NEXT: icmp sle i32 [[ADD]], %x +define i1 @icmp_add20_sge_add57(i32 %x, i32 %y) { + %1 = add nsw i32 %x, 20 + %2 = add nsw i32 %y, 57 + %cmp = icmp sge i32 %1, %2 + ret i1 %cmp +} + +; CHECK: @icmp_sub57_sge_sub20 +; CHECK-NEXT: [[SUB:%[a-z0-9]+]] = add nsw i32 %x, -37 +; CHECK-NEXT: icmp sge i32 [[SUB]], %y +define i1 @icmp_sub57_sge_sub20(i32 %x, i32 %y) { + %1 = add nsw i32 %x, -57 + %2 = add nsw i32 %y, -20 + %cmp = icmp sge i32 %1, %2 + ret i1 %cmp +} + +; CHECK: @icmp_and_shl_neg_ne_0 +; CHECK-NEXT: [[SHL:%[a-z0-9]+]] = shl i32 1, %B +; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[SHL]], %A +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp eq i32 [[AND]], 0 +; CHECK-NEXT: ret i1 [[CMP]] +define i1 @icmp_and_shl_neg_ne_0(i32 %A, i32 %B) { + %neg = xor i32 %A, -1 + %shl = shl i32 1, %B + %and = and i32 %shl, %neg + %cmp = icmp ne i32 %and, 0 + ret i1 %cmp +} + +; CHECK: @icmp_and_shl_neg_eq_0 +; CHECK-NEXT: [[SHL:%[a-z0-9]+]] = shl i32 1, %B +; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[SHL]], %A +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ne i32 [[AND]], 0 +; CHECK-NEXT: ret i1 [[CMP]] +define i1 @icmp_and_shl_neg_eq_0(i32 %A, i32 %B) { + %neg = xor i32 %A, -1 + %shl = shl i32 1, %B + %and = and i32 %shl, %neg + %cmp = icmp eq i32 %and, 0 + ret i1 %cmp +} + +; CHECK: @icmp_add_and_shr_ne_0 +; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %X, 240 +; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp ne i32 [[AND]], 224 +; CHECK-NEXT: ret i1 [[CMP]] +define i1 @icmp_add_and_shr_ne_0(i32 %X) { + %shr = lshr i32 %X, 4 + %and = and i32 %shr, 15 + %add = add i32 %and, -14 + %tobool = icmp ne i32 %add, 0 + ret i1 %tobool +} diff --git a/test/Transforms/InstCombine/load-cmp.ll b/test/Transforms/InstCombine/load-cmp.ll index 5cafb77..869215c 100644 --- a/test/Transforms/InstCombine/load-cmp.ll +++ b/test/Transforms/InstCombine/load-cmp.ll @@ -47,6 +47,18 @@ define i1 @test4(i32 %X) { ; CHECK-NEXT: ret i1 %R } +define i1 @test4_i16(i16 %X) { + %P = getelementptr inbounds [10 x i16]* @G16, i32 0, i16 %X + %Q = load i16* %P + %R = icmp sle i16 %Q, 73 + ret i1 %R +; CHECK: @test4_i16 +; CHECK-NEXT: lshr i16 933, %X +; CHECK-NEXT: and i16 {{.*}}, 1 +; CHECK-NEXT: %R = icmp ne i16 {{.*}}, 0 +; CHECK-NEXT: ret i1 %R +} + define i1 @test5(i32 %X) { %P = getelementptr inbounds [10 x i16]* @G16, i32 0, i32 %X %Q = load i16* %P @@ -88,8 +100,8 @@ define i1 @test8(i32 %X) { %S = icmp eq i16 %R, 0 ret i1 %S ; CHECK: @test8 -; CHECK-NEXT: add i32 %X, -8 -; CHECK-NEXT: icmp ult i32 {{.*}}, 2 +; CHECK-NEXT: and i32 %X, -2 +; CHECK-NEXT: icmp eq i32 {{.*}}, 8 ; CHECK-NEXT: ret i1 } diff --git a/test/Transforms/InstCombine/objsize.ll b/test/Transforms/InstCombine/objsize.ll index 0ead9d1..122c650 100644 --- a/test/Transforms/InstCombine/objsize.ll +++ b/test/Transforms/InstCombine/objsize.ll @@ -257,114 +257,6 @@ return: ret i32 7 } -declare noalias i8* @valloc(i32) nounwind - -; CHECK: @test14 -; CHECK: ret i32 6 -define i32 @test14(i32 %a) nounwind { - switch i32 %a, label %sw.default [ - i32 1, label %sw.bb - i32 2, label %sw.bb1 - ] - -sw.bb: - %call = tail call noalias i8* @malloc(i32 6) nounwind - br label %sw.epilog - -sw.bb1: - %call2 = tail call noalias i8* @calloc(i32 3, i32 2) nounwind - br label %sw.epilog - -sw.default: - %call3 = tail call noalias i8* @valloc(i32 6) nounwind - br label %sw.epilog - -sw.epilog: - %b.0 = phi i8* [ %call3, %sw.default ], [ %call2, %sw.bb1 ], [ %call, %sw.bb ] - %1 = tail call i32 @llvm.objectsize.i32(i8* %b.0, i1 false) - ret i32 %1 -} - -; CHECK: @test15 -; CHECK: llvm.objectsize -define i32 @test15(i32 %a) nounwind { - switch i32 %a, label %sw.default [ - i32 1, label %sw.bb - i32 2, label %sw.bb1 - ] - -sw.bb: - %call = tail call noalias i8* @malloc(i32 3) nounwind - br label %sw.epilog - -sw.bb1: - %call2 = tail call noalias i8* @calloc(i32 2, i32 1) nounwind - br label %sw.epilog - -sw.default: - %call3 = tail call noalias i8* @valloc(i32 3) nounwind - br label %sw.epilog - -sw.epilog: - %b.0 = phi i8* [ %call3, %sw.default ], [ %call2, %sw.bb1 ], [ %call, %sw.bb ] - %1 = tail call i32 @llvm.objectsize.i32(i8* %b.0, i1 false) - ret i32 %1 -} - -; CHECK: @test16 -; CHECK: llvm.objectsize -define i32 @test16(i8* %a, i32 %n) nounwind { - %b = alloca [5 x i8], align 1 - %c = alloca [5 x i8], align 1 - switch i32 %n, label %sw.default [ - i32 1, label %sw.bb - i32 2, label %sw.bb1 - ] - -sw.bb: - %bp = bitcast [5 x i8]* %b to i8* - br label %sw.epilog - -sw.bb1: - %cp = bitcast [5 x i8]* %c to i8* - br label %sw.epilog - -sw.default: - br label %sw.epilog - -sw.epilog: - %phi = phi i8* [ %a, %sw.default ], [ %cp, %sw.bb1 ], [ %bp, %sw.bb ] - %sz = call i32 @llvm.objectsize.i32(i8* %phi, i1 false) - ret i32 %sz -} - -; CHECK: @test17 -; CHECK: ret i32 5 -define i32 @test17(i32 %n) nounwind { - %b = alloca [5 x i8], align 1 - %c = alloca [5 x i8], align 1 - %bp = bitcast [5 x i8]* %b to i8* - switch i32 %n, label %sw.default [ - i32 1, label %sw.bb - i32 2, label %sw.bb1 - ] - -sw.bb: - br label %sw.epilog - -sw.bb1: - %cp = bitcast [5 x i8]* %c to i8* - br label %sw.epilog - -sw.default: - br label %sw.epilog - -sw.epilog: - %phi = phi i8* [ %bp, %sw.default ], [ %cp, %sw.bb1 ], [ %bp, %sw.bb ] - %sz = call i32 @llvm.objectsize.i32(i8* %phi, i1 false) - ret i32 %sz -} - @globalalias = alias internal [60 x i8]* @a ; CHECK: @test18 diff --git a/test/Transforms/InstCombine/or.ll b/test/Transforms/InstCombine/or.ll index bde2a54..7226bd9 100644 --- a/test/Transforms/InstCombine/or.ll +++ b/test/Transforms/InstCombine/or.ll @@ -178,12 +178,12 @@ define i1 @test18(i32 %A) { define i1 @test19(i32 %A) { %B = icmp eq i32 %A, 50 %C = icmp eq i32 %A, 51 - ;; (A-50) < 2 + ;; (A&-2) == 50 %D = or i1 %B, %C ret i1 %D ; CHECK: @test19 -; CHECK: add i32 -; CHECK: icmp ult +; CHECK: and i32 +; CHECK: icmp eq ; CHECK: ret i1 } diff --git a/test/Transforms/InstCombine/select.ll b/test/Transforms/InstCombine/select.ll index cc3aacd..c72a6f7 100644 --- a/test/Transforms/InstCombine/select.ll +++ b/test/Transforms/InstCombine/select.ll @@ -863,3 +863,125 @@ while.body: ; CHECK: @test64 ; CHECK-NOT: select } + +; CHECK: @select_icmp_eq_and_1_0_or_2 +; CHECK-NEXT: [[SHL:%[a-z0-9]+]] = shl i32 %x, 1 +; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[SHL]], 2 +; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[AND]], %y +; CHECK-NEXT: ret i32 [[OR]] +define i32 @select_icmp_eq_and_1_0_or_2(i32 %x, i32 %y) { + %and = and i32 %x, 1 + %cmp = icmp eq i32 %and, 0 + %or = or i32 %y, 2 + %select = select i1 %cmp, i32 %y, i32 %or + ret i32 %select +} + +; CHECK: @select_icmp_eq_and_32_0_or_8 +; CHECK-NEXT: [[LSHR:%[a-z0-9]+]] = lshr i32 %x, 2 +; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[LSHR]], 8 +; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[AND]], %y +; CHECK-NEXT: ret i32 [[OR]] +define i32 @select_icmp_eq_and_32_0_or_8(i32 %x, i32 %y) { + %and = and i32 %x, 32 + %cmp = icmp eq i32 %and, 0 + %or = or i32 %y, 8 + %select = select i1 %cmp, i32 %y, i32 %or + ret i32 %select +} + +; CHECK: @select_icmp_ne_0_and_4096_or_4096 +; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, 4096 +; CHECK-NEXT: [[XOR:%[a-z0-9]+]] = xor i32 [[AND]], 4096 +; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[XOR]], %y +; CHECK-NEXT: ret i32 [[OR]] +define i32 @select_icmp_ne_0_and_4096_or_4096(i32 %x, i32 %y) { + %and = and i32 %x, 4096 + %cmp = icmp ne i32 0, %and + %or = or i32 %y, 4096 + %select = select i1 %cmp, i32 %y, i32 %or + ret i32 %select +} + +; CHECK: @select_icmp_eq_and_4096_0_or_4096 +; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 %x, 4096 +; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[AND]], %y +; CHECK-NEXT: ret i32 [[OR]] +define i32 @select_icmp_eq_and_4096_0_or_4096(i32 %x, i32 %y) { + %and = and i32 %x, 4096 + %cmp = icmp eq i32 %and, 0 + %or = or i32 %y, 4096 + %select = select i1 %cmp, i32 %y, i32 %or + ret i32 %select +} + +; CHECK: @select_icmp_eq_0_and_1_or_1 +; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i64 %x, 1 +; CHECK-NEXT: [[ZEXT:%[a-z0-9]+]] = trunc i64 [[AND]] to i32 +; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[XOR]], %y +; CHECK-NEXT: ret i32 [[OR]] +define i32 @select_icmp_eq_0_and_1_or_1(i64 %x, i32 %y) { + %and = and i64 %x, 1 + %cmp = icmp eq i64 %and, 0 + %or = or i32 %y, 1 + %select = select i1 %cmp, i32 %y, i32 %or + ret i32 %select +} + +; CHECK: @select_icmp_ne_0_and_4096_or_32 +; CHECK-NEXT: [[LSHR:%[a-z0-9]+]] = lshr i32 %x, 7 +; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[LSHR]], 32 +; CHECK-NEXT: [[XOR:%[a-z0-9]+]] = xor i32 [[AND]], 32 +; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[XOR]], %y +; CHECK-NEXT: ret i32 [[OR]] +define i32 @select_icmp_ne_0_and_4096_or_32(i32 %x, i32 %y) { + %and = and i32 %x, 4096 + %cmp = icmp ne i32 0, %and + %or = or i32 %y, 32 + %select = select i1 %cmp, i32 %y, i32 %or + ret i32 %select +} + +; CHECK: @select_icmp_ne_0_and_32_or_4096 +; CHECK-NEXT: [[SHL:%[a-z0-9]+]] = shl i32 %x, 7 +; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[SHL]], 4096 +; CHECK-NEXT: [[XOR:%[a-z0-9]+]] = xor i32 [[AND]], 4096 +; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[XOR]], %y +; CHECK-NEXT: ret i32 [[OR]] +define i32 @select_icmp_ne_0_and_32_or_4096(i32 %x, i32 %y) { + %and = and i32 %x, 32 + %cmp = icmp ne i32 0, %and + %or = or i32 %y, 4096 + %select = select i1 %cmp, i32 %y, i32 %or + ret i32 %select +} + +; CHECK: @select_icmp_ne_0_and_1073741824_or_8 +; CHECK-NEXT: [[LSHR:%[a-z0-9]+]] = lshr i32 %x, 27 +; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i32 [[LSHR]], 8 +; CHECK-NEXT: [[TRUNC:%[a-z0-9]+]] = trunc i32 [[AND]] to i8 +; CHECK-NEXT: [[XOR:%[a-z0-9]+]] = xor i8 [[TRUNC]], 8 +; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i8 [[XOR]], %y +; CHECK-NEXT: ret i8 [[OR]] +define i8 @select_icmp_ne_0_and_1073741824_or_8(i32 %x, i8 %y) { + %and = and i32 %x, 1073741824 + %cmp = icmp ne i32 0, %and + %or = or i8 %y, 8 + %select = select i1 %cmp, i8 %y, i8 %or + ret i8 %select +} + +; CHECK: @select_icmp_ne_0_and_8_or_1073741824 +; CHECK-NEXT: [[AND:%[a-z0-9]+]] = and i8 %x, 8 +; CHECK-NEXT: [[ZEXT:%[a-z0-9]+]] = zext i8 [[AND]] to i32 +; CHECK-NEXT: [[SHL:%[a-z0-9]+]] = shl nuw nsw i32 [[ZEXT]], 27 +; CHECK-NEXT: [[XOR:%[a-z0-9]+]] = xor i32 [[SHL]], 1073741824 +; CHECK-NEXT: [[OR:%[a-z0-9]+]] = or i32 [[XOR]], %y +; CHECK-NEXT: ret i32 [[OR]] +define i32 @select_icmp_ne_0_and_8_or_1073741824(i8 %x, i32 %y) { + %and = and i8 %x, 8 + %cmp = icmp ne i8 0, %and + %or = or i32 %y, 1073741824 + %select = select i1 %cmp, i32 %y, i32 %or + ret i32 %select +} diff --git a/test/Transforms/InstCombine/strto-1.ll b/test/Transforms/InstCombine/strto-1.ll index 16c0c67..7139972 100644 --- a/test/Transforms/InstCombine/strto-1.ll +++ b/test/Transforms/InstCombine/strto-1.ll @@ -1,29 +1,29 @@ ; Test that the strto* library call simplifiers works correctly. ; -; RUN: opt < %s -instcombine -S | FileCheck %s +; RUN: opt < %s -instcombine -functionattrs -S | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" declare i64 @strtol(i8* %s, i8** %endptr, i32 %base) -; CHECK: declare i64 @strtol(i8*, i8**, i32) +; CHECK: declare i64 @strtol(i8*, i8** nocapture, i32) declare double @strtod(i8* %s, i8** %endptr, i32 %base) -; CHECK: declare double @strtod(i8*, i8**, i32) +; CHECK: declare double @strtod(i8*, i8** nocapture, i32) declare float @strtof(i8* %s, i8** %endptr, i32 %base) -; CHECK: declare float @strtof(i8*, i8**, i32) +; CHECK: declare float @strtof(i8*, i8** nocapture, i32) declare i64 @strtoul(i8* %s, i8** %endptr, i32 %base) -; CHECK: declare i64 @strtoul(i8*, i8**, i32) +; CHECK: declare i64 @strtoul(i8*, i8** nocapture, i32) declare i64 @strtoll(i8* %s, i8** %endptr, i32 %base) -; CHECK: declare i64 @strtoll(i8*, i8**, i32) +; CHECK: declare i64 @strtoll(i8*, i8** nocapture, i32) declare double @strtold(i8* %s, i8** %endptr) -; CHECK: declare double @strtold(i8*, i8**) +; CHECK: declare double @strtold(i8*, i8** nocapture) declare i64 @strtoull(i8* %s, i8** %endptr, i32 %base) -; CHECK: declare i64 @strtoull(i8*, i8**, i32) +; CHECK: declare i64 @strtoull(i8*, i8** nocapture, i32) define void @test_simplify1(i8* %x, i8** %endptr) { ; CHECK: @test_simplify1 diff --git a/test/Transforms/InstCombine/vec_extract_2elts.ll b/test/Transforms/InstCombine/vec_extract_2elts.ll new file mode 100644 index 0000000..5972340 --- /dev/null +++ b/test/Transforms/InstCombine/vec_extract_2elts.ll @@ -0,0 +1,12 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s + +define void @test(<4 x i32> %v, i64 *%r1, i64 *%r2) { +;CHECK: %1 = extractelement <4 x i32> %v, i32 0 +;CHECK: %2 = zext i32 %1 to i64 + %1 = zext <4 x i32> %v to <4 x i64> + %2 = extractelement <4 x i64> %1, i32 0 + store i64 %2, i64 *%r1 + store i64 %2, i64 *%r2 + ret void +} + diff --git a/test/Transforms/InstCombine/vec_extract_var_elt.ll b/test/Transforms/InstCombine/vec_extract_var_elt.ll new file mode 100644 index 0000000..3c98287 --- /dev/null +++ b/test/Transforms/InstCombine/vec_extract_var_elt.ll @@ -0,0 +1,18 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s + +define void @test (float %b, <8 x float> * %p) { +; CHECK: extractelement +; CHECK: fptosi + %1 = load <8 x float> * %p + %2 = bitcast <8 x float> %1 to <8 x i32> + %3 = bitcast <8 x i32> %2 to <8 x float> + %a = fptosi <8 x float> %3 to <8 x i32> + %4 = fptosi float %b to i32 + %5 = add i32 %4, -2 + %6 = extractelement <8 x i32> %a, i32 %5 + %7 = insertelement <8 x i32> undef, i32 %6, i32 7 + %8 = sitofp <8 x i32> %7 to <8 x float> + store <8 x float> %8, <8 x float>* %p + ret void +} + diff --git a/test/Transforms/InstCombine/vec_phi_extract.ll b/test/Transforms/InstCombine/vec_phi_extract.ll new file mode 100644 index 0000000..2f10fc2 --- /dev/null +++ b/test/Transforms/InstCombine/vec_phi_extract.ll @@ -0,0 +1,27 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s + +define void @f(i64 %val, i32 %limit, i32 *%ptr) { +;CHECK: %0 = trunc i64 +;CHECK: %1 = phi i32 +entry: + %tempvector = insertelement <16 x i64> undef, i64 %val, i32 0 + %vector = shufflevector <16 x i64> %tempvector, <16 x i64> undef, <16 x i32> zeroinitializer + %0 = add <16 x i64> %vector, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13, i64 14, i64 15> + %1 = trunc <16 x i64> %0 to <16 x i32> + br label %loop + +loop: + %2 = phi <16 x i32> [ %1, %entry ], [ %inc, %loop ] + %elt = extractelement <16 x i32> %2, i32 0 + %end = icmp ult i32 %elt, %limit + %3 = add i32 10, %elt + %4 = sext i32 %elt to i64 + %5 = getelementptr i32* %ptr, i64 %4 + store i32 %3, i32* %5 + %inc = add <16 x i32> %2, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16> + br i1 %end, label %loop, label %ret + +ret: + ret void +} + diff --git a/test/Transforms/InstCombine/vec_shuffle.ll b/test/Transforms/InstCombine/vec_shuffle.ll index 14f5321..37d4d56 100644 --- a/test/Transforms/InstCombine/vec_shuffle.ll +++ b/test/Transforms/InstCombine/vec_shuffle.ll @@ -196,3 +196,30 @@ define <4 x i16> @test13e(<4 x i16> %lhs, <4 x i16> %rhs) { <4 x i16> %lhs, <4 x i16> %rhs ret <4 x i16> %A } + +; Check that sequences of insert/extract element are +; collapsed into shuffle instruction with correct shuffle indexes. + +define <4 x float> @test14a(<4 x float> %LHS, <4 x float> %RHS) { +; CHECK: @test14a +; CHECK-NEXT: shufflevector <4 x float> %LHS, <4 x float> %RHS, <4 x i32> <i32 4, i32 0, i32 6, i32 6> +; CHECK-NEXT: ret <4 x float> %tmp4 + %tmp1 = extractelement <4 x float> %LHS, i32 0 + %tmp2 = insertelement <4 x float> %RHS, float %tmp1, i32 1 + %tmp3 = extractelement <4 x float> %RHS, i32 2 + %tmp4 = insertelement <4 x float> %tmp2, float %tmp3, i32 3 + ret <4 x float> %tmp4 +} + +define <4 x float> @test14b(<4 x float> %LHS, <4 x float> %RHS) { +; CHECK: @test14b +; CHECK-NEXT: shufflevector <4 x float> %LHS, <4 x float> %RHS, <4 x i32> <i32 4, i32 3, i32 6, i32 6> +; CHECK-NEXT: ret <4 x float> %tmp5 + %tmp0 = extractelement <4 x float> %LHS, i32 3 + %tmp1 = insertelement <4 x float> %RHS, float %tmp0, i32 0 + %tmp2 = extractelement <4 x float> %tmp1, i32 0 + %tmp3 = insertelement <4 x float> %RHS, float %tmp2, i32 1 + %tmp4 = extractelement <4 x float> %RHS, i32 2 + %tmp5 = insertelement <4 x float> %tmp3, float %tmp4, i32 3 + ret <4 x float> %tmp5 +} diff --git a/test/Transforms/InstCombine/vector-type.ll b/test/Transforms/InstCombine/vector-type.ll new file mode 100644 index 0000000..59a4bdd --- /dev/null +++ b/test/Transforms/InstCombine/vector-type.ll @@ -0,0 +1,15 @@ +; The code in InstCombiner::FoldSelectOpOp was calling +; Type::getVectorNumElements without checking first if the type was a vector. + +; RUN: opt < %s -instcombine -S + +define i32 @vselect1(i32 %a.coerce, i32 %b.coerce, i32 %c.coerce) { +entry: + %0 = bitcast i32 %a.coerce to <2 x i16> + %1 = bitcast i32 %b.coerce to <2 x i16> + %2 = bitcast i32 %c.coerce to <2 x i16> + %cmp = icmp sge <2 x i16> %2, zeroinitializer + %or = select <2 x i1> %cmp, <2 x i16> %0, <2 x i16> %1 + %3 = bitcast <2 x i16> %or to i32 + ret i32 %3 +} diff --git a/test/Transforms/InstSimplify/2013-04-19-ConstantFoldingCrash.ll b/test/Transforms/InstSimplify/2013-04-19-ConstantFoldingCrash.ll new file mode 100644 index 0000000..1647517 --- /dev/null +++ b/test/Transforms/InstSimplify/2013-04-19-ConstantFoldingCrash.ll @@ -0,0 +1,9 @@ +; RUN: opt < %s -instsimplify + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" + +; PR15791 +define <2 x i64> @test1() { + %a = and <2 x i64> undef, bitcast (<4 x i32> <i32 undef, i32 undef, i32 undef, i32 2147483647> to <2 x i64>) + ret <2 x i64> %a +} diff --git a/test/Transforms/InstSimplify/floating-point-arithmetic.ll b/test/Transforms/InstSimplify/floating-point-arithmetic.ll index f9c364c..91ce263 100644 --- a/test/Transforms/InstSimplify/floating-point-arithmetic.ll +++ b/test/Transforms/InstSimplify/floating-point-arithmetic.ll @@ -14,7 +14,7 @@ define float @fsub_0_0_x(float %a) { ; CHECK: @fsub_x_0 define float @fsub_x_0(float %a) { %ret = fsub float %a, 0.0 -; CHECK ret float %a +; CHECK: ret float %a ret float %ret } @@ -22,7 +22,7 @@ define float @fsub_x_0(float %a) { ; CHECK: @fadd_x_n0 define float @fadd_x_n0(float %a) { %ret = fadd float %a, -0.0 -; CHECK ret float %a +; CHECK: ret float %a ret float %ret } diff --git a/test/Transforms/JumpThreading/2011-04-14-InfLoop.ll b/test/Transforms/JumpThreading/2011-04-14-InfLoop.ll index e80bae5..86a1321 100644 --- a/test/Transforms/JumpThreading/2011-04-14-InfLoop.ll +++ b/test/Transforms/JumpThreading/2011-04-14-InfLoop.ll @@ -15,7 +15,7 @@ for.cond1177: br i1 %cmp1179, label %for.cond1177, label %land.rhs1320 land.rhs1320: - %tmp1324 = load volatile i64* getelementptr inbounds (%0* @g_338, i64 0, i32 2), align 1, !tbaa !0 + %tmp1324 = load volatile i64* getelementptr inbounds (%0* @g_338, i64 0, i32 2), align 1 br label %if.end.i if.end.i: @@ -25,7 +25,3 @@ if.end.i: return: ret void } - -!0 = metadata !{metadata !"long long", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/Transforms/LoopStrengthReduce/2012-07-13-ExpandUDiv.ll b/test/Transforms/LoopStrengthReduce/2012-07-13-ExpandUDiv.ll index a122208..8bac639 100644 --- a/test/Transforms/LoopStrengthReduce/2012-07-13-ExpandUDiv.ll +++ b/test/Transforms/LoopStrengthReduce/2012-07-13-ExpandUDiv.ll @@ -18,11 +18,11 @@ define i32 @main() nounwind uwtable ssp { entry: %l_2 = alloca [1 x i32], align 4 %arrayidx = getelementptr inbounds [1 x i32]* %l_2, i64 0, i64 0 - store i32 0, i32* %arrayidx, align 4, !tbaa !0 - %tmp = load i32* @g_3, align 4, !tbaa !0 + store i32 0, i32* %arrayidx, align 4 + %tmp = load i32* @g_3, align 4 %idxprom = sext i32 %tmp to i64 %arrayidx1 = getelementptr inbounds [1 x i32]* %l_2, i64 0, i64 %idxprom - %tmp1 = load i32* %arrayidx1, align 4, !tbaa !0 + %tmp1 = load i32* %arrayidx1, align 4 %conv.i.i = and i32 %tmp1, 65535 %tobool.i.i.i = icmp ne i32 %tmp, 0 br label %codeRepl @@ -48,7 +48,7 @@ for.cond.i.i.us: ; preds = %for.inc.i.i.us, %co for.inc.i.i.us: ; preds = %for.body.i.i.us %add.i.i.us = add nsw i32 %tmp2, 1 - store i32 %add.i.i.us, i32* @g_752, align 4, !tbaa !0 + store i32 %add.i.i.us, i32* @g_752, align 4 br label %for.cond.i.i.us for.body.i.i.us: ; preds = %codeRepl5.us @@ -78,13 +78,9 @@ for.body.i.i: ; preds = %codeRepl5 for.inc.i.i: ; preds = %for.body.i.i %add.i.i = add nsw i32 %tmp3, 1 - store i32 %add.i.i, i32* @g_752, align 4, !tbaa !0 + store i32 %add.i.i, i32* @g_752, align 4 br label %for.cond.i.i func_4.exit: ; No predecessors! ret i32 0 } - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll b/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll index b5124ea..5d728b5 100644 --- a/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll +++ b/test/Transforms/LoopStrengthReduce/ARM/2012-06-15-lsr-noaddrmode.ll @@ -50,7 +50,7 @@ declare %s* @getstruct() nounwind ; CHECK: ldr{{.*}}lsl #2 define i32 @main() nounwind ssp { entry: - %v0 = load i32* @ncol, align 4, !tbaa !0 + %v0 = load i32* @ncol, align 4 %v1 = tail call i32* @getptr() nounwind %cmp10.i = icmp eq i32 %v0, 0 br label %while.cond.outer @@ -64,12 +64,12 @@ while.cond: br label %while.body while.body: - %v3 = load i32* @ncol, align 4, !tbaa !0 + %v3 = load i32* @ncol, align 4 br label %end_of_chain end_of_chain: %state.i = getelementptr inbounds %s* %call18, i32 0, i32 0 - %v4 = load i32** %state.i, align 4, !tbaa !3 + %v4 = load i32** %state.i, align 4 br label %while.cond.i.i while.cond.i.i: @@ -80,9 +80,9 @@ while.cond.i.i: land.rhs.i.i: %arrayidx.i.i = getelementptr inbounds i32* %v4, i32 %dec.i.i - %v5 = load i32* %arrayidx.i.i, align 4, !tbaa !0 + %v5 = load i32* %arrayidx.i.i, align 4 %arrayidx1.i.i = getelementptr inbounds i32* %v1, i32 %dec.i.i - %v6 = load i32* %arrayidx1.i.i, align 4, !tbaa !0 + %v6 = load i32* %arrayidx1.i.i, align 4 %cmp.i.i = icmp eq i32 %v5, %v6 br i1 %cmp.i.i, label %while.cond.i.i, label %equal_data.exit.i @@ -95,8 +95,3 @@ where.exit: while.end.i: ret i32 %v3 } - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} -!3 = metadata !{metadata !"any pointer", metadata !1} diff --git a/test/Transforms/LoopUnswitch/2011-09-26-EHCrash.ll b/test/Transforms/LoopUnswitch/2011-09-26-EHCrash.ll index 0e3103d..e8feef3 100644 --- a/test/Transforms/LoopUnswitch/2011-09-26-EHCrash.ll +++ b/test/Transforms/LoopUnswitch/2011-09-26-EHCrash.ll @@ -24,7 +24,7 @@ if.then: ; preds = %for.body %idxprom = sext i32 %inc1 to i64 %array_ = getelementptr inbounds %class.MyContainer.1.3.19.29* %this, i32 0, i32 0 %arrayidx = getelementptr inbounds [6 x %class.MyMemVarClass.0.2.18.28*]* %array_, i32 0, i64 %idxprom - %tmp4 = load %class.MyMemVarClass.0.2.18.28** %arrayidx, align 8, !tbaa !0 + %tmp4 = load %class.MyMemVarClass.0.2.18.28** %arrayidx, align 8 %isnull = icmp eq %class.MyMemVarClass.0.2.18.28* %tmp4, null br i1 %isnull, label %for.inc, label %delete.notnull @@ -61,7 +61,3 @@ declare void @_ZN13MyMemVarClassD1Ev(%class.MyMemVarClass.0.2.18.28*) declare i32 @__gxx_personality_v0(...) declare void @_ZdlPv(i8*) nounwind - -!0 = metadata !{metadata !"any pointer", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/Transforms/LoopUnswitch/2012-04-30-LoopUnswitch-LPad-Crash.ll b/test/Transforms/LoopUnswitch/2012-04-30-LoopUnswitch-LPad-Crash.ll index 261876d..a6c0d83 100644 --- a/test/Transforms/LoopUnswitch/2012-04-30-LoopUnswitch-LPad-Crash.ll +++ b/test/Transforms/LoopUnswitch/2012-04-30-LoopUnswitch-LPad-Crash.ll @@ -45,10 +45,10 @@ for.end: ; preds = %invoke.cont6 define void @_ZN1DptEv(%class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379* %this) uwtable ssp align 2 { entry: %this.addr = alloca %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379*, align 8 - store %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379* %this, %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379** %this.addr, align 8, !tbaa !0 + store %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379* %this, %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379** %this.addr, align 8 %this1 = load %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379** %this.addr %px = getelementptr inbounds %class.D.22.42.66.102.138.158.178.198.238.242.246.250.262.294.302.338.346.379* %this1, i32 0, i32 0 - %0 = load %class.C.23.43.67.103.139.159.179.199.239.243.247.251.263.295.303.339.347.376** %px, align 8, !tbaa !0 + %0 = load %class.C.23.43.67.103.139.159.179.199.239.243.247.251.263.295.303.339.347.376** %px, align 8 %tobool = icmp ne %class.C.23.43.67.103.139.159.179.199.239.243.247.251.263.295.303.339.347.376* %0, null br i1 %tobool, label %cond.end, label %cond.false @@ -95,7 +95,3 @@ entry: } declare void @_Z10__assert13v() noreturn - -!0 = metadata !{metadata !"any pointer", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/Transforms/LoopVectorize/12-12-11-if-conv.ll b/test/Transforms/LoopVectorize/12-12-11-if-conv.ll index 2dd7fe3..bab6300 100644 --- a/test/Transforms/LoopVectorize/12-12-11-if-conv.ll +++ b/test/Transforms/LoopVectorize/12-12-11-if-conv.ll @@ -15,7 +15,7 @@ entry: for.body: ; preds = %entry, %if.end %indvars.iv = phi i64 [ %indvars.iv.next, %if.end ], [ 0, %entry ] %arrayidx = getelementptr inbounds i32* %A, i64 %indvars.iv - %0 = load i32* %arrayidx, align 4, !tbaa !0 + %0 = load i32* %arrayidx, align 4 %tobool = icmp eq i32 %0, 0 br i1 %tobool, label %if.end, label %if.then @@ -29,7 +29,7 @@ if.then: ; preds = %for.body if.end: ; preds = %for.body, %if.then %z.0 = phi i32 [ %add1, %if.then ], [ 9, %for.body ] - store i32 %z.0, i32* %arrayidx, align 4, !tbaa !0 + store i32 %z.0, i32* %arrayidx, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %x @@ -38,7 +38,3 @@ if.end: ; preds = %for.body, %if.then for.end: ; preds = %if.end, %entry ret i32 undef } - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/Transforms/LoopVectorize/2012-10-22-isconsec.ll b/test/Transforms/LoopVectorize/2012-10-22-isconsec.ll index 405582c..ae9f998 100644 --- a/test/Transforms/LoopVectorize/2012-10-22-isconsec.ll +++ b/test/Transforms/LoopVectorize/2012-10-22-isconsec.ll @@ -24,7 +24,7 @@ entry: %3 = shl nsw i64 %indvars.iv, 2 %4 = getelementptr inbounds i8* %1, i64 %3 %5 = bitcast i8* %4 to float* - store float %value, float* %5, align 4, !tbaa !0 + store float %value, float* %5, align 4 %indvars.iv.next = add i64 %indvars.iv, %2 %6 = trunc i64 %indvars.iv.next to i32 %7 = icmp slt i32 %6, %_n @@ -43,7 +43,7 @@ entry: %0 = shl nsw i64 %indvars.iv, 2 %1 = getelementptr inbounds i8* bitcast (float* getelementptr inbounds ([32000 x float]* @b, i64 0, i64 16000) to i8*), i64 %0 %2 = bitcast i8* %1 to float* - store float -1.000000e+00, float* %2, align 4, !tbaa !0 + store float -1.000000e+00, float* %2, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, 16000 @@ -52,6 +52,3 @@ entry: "5": ; preds = %"3" ret i32 0 } - -!0 = metadata !{metadata !"alias set 7: float", metadata !1} -!1 = metadata !{metadata !1} diff --git a/test/Transforms/LoopVectorize/X86/constant-vector-operand.ll b/test/Transforms/LoopVectorize/X86/constant-vector-operand.ll new file mode 100644 index 0000000..f4c07b4 --- /dev/null +++ b/test/Transforms/LoopVectorize/X86/constant-vector-operand.ll @@ -0,0 +1,30 @@ +; RUN: opt -mtriple=x86_64-apple-darwin -mcpu=core2 -loop-vectorize -dce -instcombine -S < %s | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" + +@B = common global [1024 x i32] zeroinitializer, align 16 +@A = common global [1024 x i32] zeroinitializer, align 16 + +; We use to not vectorize this loop because the shift was deemed to expensive. +; Now that we differentiate shift cost base on the operand value kind, we will +; vectorize this loop. +; CHECK: ashr <4 x i32> +define void @f() { +entry: + br label %for.body + +for.body: + %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] + %arrayidx = getelementptr inbounds [1024 x i32]* @B, i64 0, i64 %indvars.iv + %0 = load i32* %arrayidx, align 4 + %shl = ashr i32 %0, 3 + %arrayidx2 = getelementptr inbounds [1024 x i32]* @A, i64 0, i64 %indvars.iv + store i32 %shl, i32* %arrayidx2, align 4 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 1024 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret void +} diff --git a/test/Transforms/LoopVectorize/X86/conversion-cost.ll b/test/Transforms/LoopVectorize/X86/conversion-cost.ll index 23d9233..760d28d 100644 --- a/test/Transforms/LoopVectorize/X86/conversion-cost.ll +++ b/test/Transforms/LoopVectorize/X86/conversion-cost.ll @@ -33,11 +33,10 @@ define i32 @conversion_cost2(i32 %n, i8* nocapture %A, float* nocapture %B) noun .lr.ph: ; preds = %0, %.lr.ph %indvars.iv = phi i64 [ %indvars.iv.next, %.lr.ph ], [ 9, %0 ] - %2 = add nsw i64 %indvars.iv, 3 - %3 = trunc i64 %2 to i32 - %4 = sitofp i32 %3 to float - %5 = getelementptr inbounds float* %B, i64 %indvars.iv - store float %4, float* %5, align 4 + %add = add nsw i64 %indvars.iv, 3 + %tofp = sitofp i64 %add to float + %gep = getelementptr inbounds float* %B, i64 %indvars.iv + store float %tofp, float* %gep, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n diff --git a/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll b/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll new file mode 100644 index 0000000..47a5e7a --- /dev/null +++ b/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll @@ -0,0 +1,56 @@ +; RUN: opt < %s -loop-vectorize -force-vector-unroll=1 -force-vector-width=4 -dce -instcombine -S | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-unknown-linux-gnu" + +;CHECK: @foo +;CHECK-NOT: <4 x i32> +;CHECK: ret void + +; Function Attrs: nounwind uwtable +define void @foo(i32* nocapture %a, i32* nocapture %b, i32 %k, i32 %m) #0 { +entry: + %cmp27 = icmp sgt i32 %m, 0 + br i1 %cmp27, label %for.body3.lr.ph.us, label %for.end15 + +for.end.us: ; preds = %for.body3.us + %arrayidx9.us = getelementptr inbounds i32* %b, i64 %indvars.iv33 + %0 = load i32* %arrayidx9.us, align 4, !llvm.mem.parallel_loop_access !3 + %add10.us = add nsw i32 %0, 3 + store i32 %add10.us, i32* %arrayidx9.us, align 4, !llvm.mem.parallel_loop_access !3 + %indvars.iv.next34 = add i64 %indvars.iv33, 1 + %lftr.wideiv35 = trunc i64 %indvars.iv.next34 to i32 + %exitcond36 = icmp eq i32 %lftr.wideiv35, %m + br i1 %exitcond36, label %for.end15, label %for.body3.lr.ph.us, !llvm.loop.parallel !5 + +for.body3.us: ; preds = %for.body3.us, %for.body3.lr.ph.us + %indvars.iv29 = phi i64 [ 0, %for.body3.lr.ph.us ], [ %indvars.iv.next30, %for.body3.us ] + %1 = trunc i64 %indvars.iv29 to i32 + %add4.us = add i32 %add.us, %1 + %idxprom.us = sext i32 %add4.us to i64 + %arrayidx.us = getelementptr inbounds i32* %a, i64 %idxprom.us + %2 = load i32* %arrayidx.us, align 4, !llvm.mem.parallel_loop_access !3 + %add5.us = add nsw i32 %2, 1 + store i32 %add5.us, i32* %arrayidx7.us, align 4, !llvm.mem.parallel_loop_access !3 + %indvars.iv.next30 = add i64 %indvars.iv29, 1 + %lftr.wideiv31 = trunc i64 %indvars.iv.next30 to i32 + %exitcond32 = icmp eq i32 %lftr.wideiv31, %m + br i1 %exitcond32, label %for.end.us, label %for.body3.us, !llvm.loop.parallel !4 + +for.body3.lr.ph.us: ; preds = %for.end.us, %entry + %indvars.iv33 = phi i64 [ %indvars.iv.next34, %for.end.us ], [ 0, %entry ] + %3 = trunc i64 %indvars.iv33 to i32 + %add.us = add i32 %3, %k + %arrayidx7.us = getelementptr inbounds i32* %a, i64 %indvars.iv33 + br label %for.body3.us + +for.end15: ; preds = %for.end.us, %entry + ret void +} + +attributes #0 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } + +!3 = metadata !{metadata !4, metadata !5} +!4 = metadata !{metadata !4} +!5 = metadata !{metadata !5} + diff --git a/test/Transforms/LoopVectorize/X86/min-trip-count-switch.ll b/test/Transforms/LoopVectorize/X86/min-trip-count-switch.ll index 186fba8..8716cff 100644 --- a/test/Transforms/LoopVectorize/X86/min-trip-count-switch.ll +++ b/test/Transforms/LoopVectorize/X86/min-trip-count-switch.ll @@ -11,9 +11,9 @@ entry: for.body: ; preds = %for.body, %entry %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] %arrayidx = getelementptr inbounds float* %a, i64 %indvars.iv - %0 = load float* %arrayidx, align 4, !tbaa !0 + %0 = load float* %arrayidx, align 4 %add = fadd float %0, 1.000000e+00 - store float %add, float* %arrayidx, align 4, !tbaa !0 + store float %add, float* %arrayidx, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, 8 @@ -22,7 +22,3 @@ for.body: ; preds = %for.body, %entry for.end: ; preds = %for.body ret void } - -!0 = metadata !{metadata !"float", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/Transforms/LoopVectorize/X86/parallel-loops-after-reg2mem.ll b/test/Transforms/LoopVectorize/X86/parallel-loops-after-reg2mem.ll index 452d0df..f904a8e 100644 --- a/test/Transforms/LoopVectorize/X86/parallel-loops-after-reg2mem.ll +++ b/test/Transforms/LoopVectorize/X86/parallel-loops-after-reg2mem.ll @@ -19,19 +19,19 @@ entry: for.body: ; preds = %for.body.for.body_crit_edge, %entry %indvars.iv.reload = load i64* %indvars.iv.reg2mem %arrayidx = getelementptr inbounds i32* %b, i64 %indvars.iv.reload - %0 = load i32* %arrayidx, align 4, !tbaa !0, !llvm.mem.parallel_loop_access !3 + %0 = load i32* %arrayidx, align 4, !llvm.mem.parallel_loop_access !3 %arrayidx2 = getelementptr inbounds i32* %a, i64 %indvars.iv.reload - %1 = load i32* %arrayidx2, align 4, !tbaa !0, !llvm.mem.parallel_loop_access !3 + %1 = load i32* %arrayidx2, align 4, !llvm.mem.parallel_loop_access !3 %idxprom3 = sext i32 %1 to i64 %arrayidx4 = getelementptr inbounds i32* %a, i64 %idxprom3 - store i32 %0, i32* %arrayidx4, align 4, !tbaa !0, !llvm.mem.parallel_loop_access !3 + store i32 %0, i32* %arrayidx4, align 4, !llvm.mem.parallel_loop_access !3 %indvars.iv.next = add i64 %indvars.iv.reload, 1 ; A new store without the parallel metadata here: store i64 %indvars.iv.next, i64* %indvars.iv.next.reg2mem %indvars.iv.next.reload1 = load i64* %indvars.iv.next.reg2mem %arrayidx6 = getelementptr inbounds i32* %b, i64 %indvars.iv.next.reload1 - %2 = load i32* %arrayidx6, align 4, !tbaa !0, !llvm.mem.parallel_loop_access !3 - store i32 %2, i32* %arrayidx2, align 4, !tbaa !0, !llvm.mem.parallel_loop_access !3 + %2 = load i32* %arrayidx6, align 4, !llvm.mem.parallel_loop_access !3 + store i32 %2, i32* %arrayidx2, align 4, !llvm.mem.parallel_loop_access !3 %indvars.iv.next.reload = load i64* %indvars.iv.next.reg2mem %lftr.wideiv = trunc i64 %indvars.iv.next.reload to i32 %exitcond = icmp eq i32 %lftr.wideiv, 512 @@ -46,7 +46,4 @@ for.end: ; preds = %for.body ret void } -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} !3 = metadata !{metadata !3} diff --git a/test/Transforms/LoopVectorize/X86/parallel-loops.ll b/test/Transforms/LoopVectorize/X86/parallel-loops.ll index f648722..3f1a071 100644 --- a/test/Transforms/LoopVectorize/X86/parallel-loops.ll +++ b/test/Transforms/LoopVectorize/X86/parallel-loops.ll @@ -21,16 +21,16 @@ entry: for.body: ; preds = %for.body, %entry %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] %arrayidx = getelementptr inbounds i32* %b, i64 %indvars.iv - %0 = load i32* %arrayidx, align 4, !tbaa !0 + %0 = load i32* %arrayidx, align 4 %arrayidx2 = getelementptr inbounds i32* %a, i64 %indvars.iv - %1 = load i32* %arrayidx2, align 4, !tbaa !0 + %1 = load i32* %arrayidx2, align 4 %idxprom3 = sext i32 %1 to i64 %arrayidx4 = getelementptr inbounds i32* %a, i64 %idxprom3 - store i32 %0, i32* %arrayidx4, align 4, !tbaa !0 + store i32 %0, i32* %arrayidx4, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %arrayidx6 = getelementptr inbounds i32* %b, i64 %indvars.iv.next - %2 = load i32* %arrayidx6, align 4, !tbaa !0 - store i32 %2, i32* %arrayidx2, align 4, !tbaa !0 + %2 = load i32* %arrayidx6, align 4 + store i32 %2, i32* %arrayidx2, align 4 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, 512 br i1 %exitcond, label %for.end, label %for.body @@ -51,18 +51,18 @@ entry: for.body: ; preds = %for.body, %entry %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] %arrayidx = getelementptr inbounds i32* %b, i64 %indvars.iv - %0 = load i32* %arrayidx, align 4, !tbaa !0, !llvm.mem.parallel_loop_access !3 + %0 = load i32* %arrayidx, align 4, !llvm.mem.parallel_loop_access !3 %arrayidx2 = getelementptr inbounds i32* %a, i64 %indvars.iv - %1 = load i32* %arrayidx2, align 4, !tbaa !0, !llvm.mem.parallel_loop_access !3 + %1 = load i32* %arrayidx2, align 4, !llvm.mem.parallel_loop_access !3 %idxprom3 = sext i32 %1 to i64 %arrayidx4 = getelementptr inbounds i32* %a, i64 %idxprom3 ; This store might have originated from inlining a function with a parallel ; loop. Refers to a list with the "original loop reference" (!4) also included. - store i32 %0, i32* %arrayidx4, align 4, !tbaa !0, !llvm.mem.parallel_loop_access !5 + store i32 %0, i32* %arrayidx4, align 4, !llvm.mem.parallel_loop_access !5 %indvars.iv.next = add i64 %indvars.iv, 1 %arrayidx6 = getelementptr inbounds i32* %b, i64 %indvars.iv.next - %2 = load i32* %arrayidx6, align 4, !tbaa !0, !llvm.mem.parallel_loop_access !3 - store i32 %2, i32* %arrayidx2, align 4, !tbaa !0, !llvm.mem.parallel_loop_access !3 + %2 = load i32* %arrayidx6, align 4, !llvm.mem.parallel_loop_access !3 + store i32 %2, i32* %arrayidx2, align 4, !llvm.mem.parallel_loop_access !3 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, 512 br i1 %exitcond, label %for.end, label %for.body, !llvm.loop.parallel !3 @@ -84,18 +84,18 @@ entry: for.body: ; preds = %for.body, %entry %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] %arrayidx = getelementptr inbounds i32* %b, i64 %indvars.iv - %0 = load i32* %arrayidx, align 4, !tbaa !0, !llvm.mem.parallel_loop_access !6 + %0 = load i32* %arrayidx, align 4, !llvm.mem.parallel_loop_access !6 %arrayidx2 = getelementptr inbounds i32* %a, i64 %indvars.iv - %1 = load i32* %arrayidx2, align 4, !tbaa !0, !llvm.mem.parallel_loop_access !6 + %1 = load i32* %arrayidx2, align 4, !llvm.mem.parallel_loop_access !6 %idxprom3 = sext i32 %1 to i64 %arrayidx4 = getelementptr inbounds i32* %a, i64 %idxprom3 ; This refers to the loop marked with !7 which we are not in at the moment. ; It should prevent detecting as a parallel loop. - store i32 %0, i32* %arrayidx4, align 4, !tbaa !0, !llvm.mem.parallel_loop_access !7 + store i32 %0, i32* %arrayidx4, align 4, !llvm.mem.parallel_loop_access !7 %indvars.iv.next = add i64 %indvars.iv, 1 %arrayidx6 = getelementptr inbounds i32* %b, i64 %indvars.iv.next - %2 = load i32* %arrayidx6, align 4, !tbaa !0, !llvm.mem.parallel_loop_access !6 - store i32 %2, i32* %arrayidx2, align 4, !tbaa !0, !llvm.mem.parallel_loop_access !6 + %2 = load i32* %arrayidx6, align 4, !llvm.mem.parallel_loop_access !6 + store i32 %2, i32* %arrayidx2, align 4, !llvm.mem.parallel_loop_access !6 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, 512 br i1 %exitcond, label %for.end, label %for.body, !llvm.loop.parallel !6 @@ -104,9 +104,6 @@ for.end: ; preds = %for.body ret void } -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} !3 = metadata !{metadata !3} !4 = metadata !{metadata !4} !5 = metadata !{metadata !3, metadata !4} diff --git a/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll b/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll new file mode 100644 index 0000000..b66119f --- /dev/null +++ b/test/Transforms/LoopVectorize/X86/x86_fp80-vector-store.ll @@ -0,0 +1,29 @@ +; RUN: opt -O3 -loop-vectorize -force-vector-unroll=1 -force-vector-width=2 -S < %s | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.7.0" + +@x = common global [1024 x x86_fp80] zeroinitializer, align 16 + +;CHECK: @example +;CHECK-NOT: bitcast x86_fp80* {{%[^ ]+}} to <{{[2-9][0-9]*}} x x86_fp80>* +;CHECK: store +;CHECK: ret void + +define void @example() nounwind ssp uwtable { +entry: + br label %for.body + +for.body: ; preds = %for.body, %entry + %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] + %conv = sitofp i32 1 to x86_fp80 + %arrayidx = getelementptr inbounds [1024 x x86_fp80]* @x, i64 0, i64 %indvars.iv + store x86_fp80 %conv, x86_fp80* %arrayidx, align 16 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 1024 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body + ret void +} diff --git a/test/Transforms/LoopVectorize/bsd_regex.ll b/test/Transforms/LoopVectorize/bsd_regex.ll new file mode 100644 index 0000000..a14b92d --- /dev/null +++ b/test/Transforms/LoopVectorize/bsd_regex.ll @@ -0,0 +1,38 @@ +; RUN: opt -S -loop-vectorize -dce -instcombine -force-vector-width=2 -force-vector-unroll=2 < %s | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" + +;PR 15830. + +;CHECK: foo +; When scalarizing stores we need to preserve the original order. +; Make sure that we are extracting in the correct order (0101, and not 0011). +;CHECK: extractelement <2 x i64> {{.*}}, i32 0 +;CHECK: extractelement <2 x i64> {{.*}}, i32 1 +;CHECK: extractelement <2 x i64> {{.*}}, i32 0 +;CHECK: extractelement <2 x i64> {{.*}}, i32 1 +;CHECK: store +;CHECK: store +;CHECK: store +;CHECK: store +;CHECK: ret + +define i32 @foo(i32* nocapture %A) { +entry: + br label %for.body + +for.body: + %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] + %0 = shl nsw i64 %indvars.iv, 2 + %arrayidx = getelementptr inbounds i32* %A, i64 %0 + store i32 4, i32* %arrayidx, align 4 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 10000 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret i32 undef +} + + diff --git a/test/Transforms/LoopVectorize/bzip_reverse_loops.ll b/test/Transforms/LoopVectorize/bzip_reverse_loops.ll index 431e422..2648bbe 100644 --- a/test/Transforms/LoopVectorize/bzip_reverse_loops.ll +++ b/test/Transforms/LoopVectorize/bzip_reverse_loops.ll @@ -17,7 +17,7 @@ do.body: ; preds = %cond.end, %entry %n.addr.0 = phi i32 [ %n, %entry ], [ %dec, %cond.end ] %p.addr.0 = phi i16* [ %p, %entry ], [ %incdec.ptr, %cond.end ] %incdec.ptr = getelementptr inbounds i16* %p.addr.0, i64 -1 - %0 = load i16* %incdec.ptr, align 2, !tbaa !0 + %0 = load i16* %incdec.ptr, align 2 %conv = zext i16 %0 to i32 %cmp = icmp ult i32 %conv, %size br i1 %cmp, label %cond.end, label %cond.true @@ -29,7 +29,7 @@ cond.true: ; preds = %do.body cond.end: ; preds = %do.body, %cond.true %cond = phi i16 [ %phitmp, %cond.true ], [ 0, %do.body ] - store i16 %cond, i16* %incdec.ptr, align 2, !tbaa !0 + store i16 %cond, i16* %incdec.ptr, align 2 %dec = add i32 %n.addr.0, -1 %tobool = icmp eq i32 %dec, 0 br i1 %tobool, label %do.end, label %do.body @@ -52,11 +52,11 @@ do.body: ; preds = %do.body, %entry %n.addr.0 = phi i32 [ %n, %entry ], [ %dec, %do.body ] %p.0 = phi i32* [ %a, %entry ], [ %incdec.ptr, %do.body ] %incdec.ptr = getelementptr inbounds i32* %p.0, i64 -1 - %0 = load i32* %incdec.ptr, align 4, !tbaa !3 + %0 = load i32* %incdec.ptr, align 4 %cmp = icmp slt i32 %0, %wsize %sub = sub nsw i32 %0, %wsize %cond = select i1 %cmp, i32 0, i32 %sub - store i32 %cond, i32* %incdec.ptr, align 4, !tbaa !3 + store i32 %cond, i32* %incdec.ptr, align 4 %dec = add nsw i32 %n.addr.0, -1 %tobool = icmp eq i32 %dec, 0 br i1 %tobool, label %do.end, label %do.body @@ -64,8 +64,3 @@ do.body: ; preds = %do.body, %entry do.end: ; preds = %do.body ret void } - -!0 = metadata !{metadata !"short", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} -!3 = metadata !{metadata !"int", metadata !1} diff --git a/test/Transforms/LoopVectorize/calloc.ll b/test/Transforms/LoopVectorize/calloc.ll index 08c84ef..7e79916 100644 --- a/test/Transforms/LoopVectorize/calloc.ll +++ b/test/Transforms/LoopVectorize/calloc.ll @@ -23,7 +23,7 @@ for.body: ; preds = %for.body, %for.body %i.030 = phi i64 [ 0, %for.body.lr.ph ], [ %inc, %for.body ] %shr = lshr i64 %i.030, 1 %arrayidx = getelementptr inbounds i8* %bytes, i64 %shr - %1 = load i8* %arrayidx, align 1, !tbaa !0 + %1 = load i8* %arrayidx, align 1 %conv = zext i8 %1 to i32 %and = shl i64 %i.030, 2 %neg = and i64 %and, 4 @@ -38,7 +38,7 @@ for.body: ; preds = %for.body, %for.body %add17 = add nsw i32 %cond, %shr11 %conv18 = trunc i32 %add17 to i8 %arrayidx19 = getelementptr inbounds i8* %call, i64 %i.030 - store i8 %conv18, i8* %arrayidx19, align 1, !tbaa !0 + store i8 %conv18, i8* %arrayidx19, align 1 %inc = add i64 %i.030, 1 %exitcond = icmp eq i64 %inc, %0 br i1 %exitcond, label %for.end, label %for.body @@ -48,6 +48,3 @@ for.end: ; preds = %for.body, %entry } declare noalias i8* @calloc(i64, i64) nounwind - -!0 = metadata !{metadata !"omnipotent char", metadata !1} -!1 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/Transforms/LoopVectorize/dbg.value.ll b/test/Transforms/LoopVectorize/dbg.value.ll index a2ea951..127d479 100644 --- a/test/Transforms/LoopVectorize/dbg.value.ll +++ b/test/Transforms/LoopVectorize/dbg.value.ll @@ -18,12 +18,12 @@ for.body: ;CHECK: load <4 x i32> %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] %arrayidx = getelementptr inbounds [1024 x i32]* @B, i64 0, i64 %indvars.iv, !dbg !19 - %0 = load i32* %arrayidx, align 4, !dbg !19, !tbaa !21 + %0 = load i32* %arrayidx, align 4, !dbg !19 %arrayidx2 = getelementptr inbounds [1024 x i32]* @C, i64 0, i64 %indvars.iv, !dbg !19 - %1 = load i32* %arrayidx2, align 4, !dbg !19, !tbaa !21 + %1 = load i32* %arrayidx2, align 4, !dbg !19 %add = add nsw i32 %1, %0, !dbg !19 %arrayidx4 = getelementptr inbounds [1024 x i32]* @A, i64 0, i64 %indvars.iv, !dbg !19 - store i32 %add, i32* %arrayidx4, align 4, !dbg !19, !tbaa !21 + store i32 %add, i32* %arrayidx4, align 4, !dbg !19 %indvars.iv.next = add i64 %indvars.iv, 1, !dbg !18 tail call void @llvm.dbg.value(metadata !{null}, i64 0, metadata !9), !dbg !18 %lftr.wideiv = trunc i64 %indvars.iv.next to i32, !dbg !18 @@ -64,7 +64,4 @@ attributes #1 = { nounwind readnone } !18 = metadata !{i32 6, i32 0, metadata !10, null} !19 = metadata !{i32 7, i32 0, metadata !20, null} !20 = metadata !{i32 786443, metadata !10, i32 6, i32 0, metadata !4, i32 1} -!21 = metadata !{metadata !"int", metadata !22} -!22 = metadata !{metadata !"omnipotent char", metadata !23} -!23 = metadata !{metadata !"Simple C/C++ TBAA"} !24 = metadata !{i32 9, i32 0, metadata !3, null} diff --git a/test/Transforms/LoopVectorize/float-reduction.ll b/test/Transforms/LoopVectorize/float-reduction.ll index 565684c..54ca172 100644 --- a/test/Transforms/LoopVectorize/float-reduction.ll +++ b/test/Transforms/LoopVectorize/float-reduction.ll @@ -13,7 +13,7 @@ for.body: ; preds = %for.body, %entry %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] %sum.04 = phi float [ 0.000000e+00, %entry ], [ %add, %for.body ] %arrayidx = getelementptr inbounds float* %A, i64 %indvars.iv - %0 = load float* %arrayidx, align 4, !tbaa !0 + %0 = load float* %arrayidx, align 4 %add = fadd fast float %sum.04, %0 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 @@ -23,7 +23,3 @@ for.body: ; preds = %for.body, %entry for.end: ; preds = %for.body ret float %add } - -!0 = metadata !{metadata !"float", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/Transforms/LoopVectorize/i8-induction.ll b/test/Transforms/LoopVectorize/i8-induction.ll index 7759b70..2a0e826 100644 --- a/test/Transforms/LoopVectorize/i8-induction.ll +++ b/test/Transforms/LoopVectorize/i8-induction.ll @@ -8,8 +8,8 @@ target triple = "x86_64-apple-macosx10.8.0" define void @f() nounwind uwtable ssp { scalar.ph: - store i8 0, i8* inttoptr (i64 1 to i8*), align 1, !tbaa !0 - %0 = load i8* @a, align 1, !tbaa !0 + store i8 0, i8* inttoptr (i64 1 to i8*), align 1 + %0 = load i8* @a, align 1 br label %for.body for.body: @@ -26,10 +26,6 @@ for.body: br i1 %phitmp14, label %for.body, label %for.end for.end: ; preds = %for.body - store i8 %mul, i8* @b, align 1, !tbaa !0 + store i8 %mul, i8* @b, align 1 ret void } - -!0 = metadata !{metadata !"omnipotent char", metadata !1} -!1 = metadata !{metadata !"Simple C/C++ TBAA"} - diff --git a/test/Transforms/LoopVectorize/intrinsic.ll b/test/Transforms/LoopVectorize/intrinsic.ll index e79d78d..defbb5b 100644 --- a/test/Transforms/LoopVectorize/intrinsic.ll +++ b/test/Transforms/LoopVectorize/intrinsic.ll @@ -14,10 +14,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds float* %y, i64 %indvars.iv - %0 = load float* %arrayidx, align 4, !tbaa !0 + %0 = load float* %arrayidx, align 4 %call = tail call float @llvm.sqrt.f32(float %0) nounwind readnone %arrayidx2 = getelementptr inbounds float* %x, i64 %indvars.iv - store float %call, float* %arrayidx2, align 4, !tbaa !0 + store float %call, float* %arrayidx2, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -40,10 +40,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds double* %y, i64 %indvars.iv - %0 = load double* %arrayidx, align 8, !tbaa !3 + %0 = load double* %arrayidx, align 8 %call = tail call double @llvm.sqrt.f64(double %0) nounwind readnone %arrayidx2 = getelementptr inbounds double* %x, i64 %indvars.iv - store double %call, double* %arrayidx2, align 8, !tbaa !3 + store double %call, double* %arrayidx2, align 8 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -66,10 +66,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds float* %y, i64 %indvars.iv - %0 = load float* %arrayidx, align 4, !tbaa !0 + %0 = load float* %arrayidx, align 4 %call = tail call float @llvm.sin.f32(float %0) nounwind readnone %arrayidx2 = getelementptr inbounds float* %x, i64 %indvars.iv - store float %call, float* %arrayidx2, align 4, !tbaa !0 + store float %call, float* %arrayidx2, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -92,10 +92,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds double* %y, i64 %indvars.iv - %0 = load double* %arrayidx, align 8, !tbaa !3 + %0 = load double* %arrayidx, align 8 %call = tail call double @llvm.sin.f64(double %0) nounwind readnone %arrayidx2 = getelementptr inbounds double* %x, i64 %indvars.iv - store double %call, double* %arrayidx2, align 8, !tbaa !3 + store double %call, double* %arrayidx2, align 8 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -118,10 +118,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds float* %y, i64 %indvars.iv - %0 = load float* %arrayidx, align 4, !tbaa !0 + %0 = load float* %arrayidx, align 4 %call = tail call float @llvm.cos.f32(float %0) nounwind readnone %arrayidx2 = getelementptr inbounds float* %x, i64 %indvars.iv - store float %call, float* %arrayidx2, align 4, !tbaa !0 + store float %call, float* %arrayidx2, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -144,10 +144,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds double* %y, i64 %indvars.iv - %0 = load double* %arrayidx, align 8, !tbaa !3 + %0 = load double* %arrayidx, align 8 %call = tail call double @llvm.cos.f64(double %0) nounwind readnone %arrayidx2 = getelementptr inbounds double* %x, i64 %indvars.iv - store double %call, double* %arrayidx2, align 8, !tbaa !3 + store double %call, double* %arrayidx2, align 8 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -170,10 +170,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds float* %y, i64 %indvars.iv - %0 = load float* %arrayidx, align 4, !tbaa !0 + %0 = load float* %arrayidx, align 4 %call = tail call float @llvm.exp.f32(float %0) nounwind readnone %arrayidx2 = getelementptr inbounds float* %x, i64 %indvars.iv - store float %call, float* %arrayidx2, align 4, !tbaa !0 + store float %call, float* %arrayidx2, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -196,10 +196,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds double* %y, i64 %indvars.iv - %0 = load double* %arrayidx, align 8, !tbaa !3 + %0 = load double* %arrayidx, align 8 %call = tail call double @llvm.exp.f64(double %0) nounwind readnone %arrayidx2 = getelementptr inbounds double* %x, i64 %indvars.iv - store double %call, double* %arrayidx2, align 8, !tbaa !3 + store double %call, double* %arrayidx2, align 8 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -222,10 +222,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds float* %y, i64 %indvars.iv - %0 = load float* %arrayidx, align 4, !tbaa !0 + %0 = load float* %arrayidx, align 4 %call = tail call float @llvm.exp2.f32(float %0) nounwind readnone %arrayidx2 = getelementptr inbounds float* %x, i64 %indvars.iv - store float %call, float* %arrayidx2, align 4, !tbaa !0 + store float %call, float* %arrayidx2, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -248,10 +248,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds double* %y, i64 %indvars.iv - %0 = load double* %arrayidx, align 8, !tbaa !3 + %0 = load double* %arrayidx, align 8 %call = tail call double @llvm.exp2.f64(double %0) nounwind readnone %arrayidx2 = getelementptr inbounds double* %x, i64 %indvars.iv - store double %call, double* %arrayidx2, align 8, !tbaa !3 + store double %call, double* %arrayidx2, align 8 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -274,10 +274,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds float* %y, i64 %indvars.iv - %0 = load float* %arrayidx, align 4, !tbaa !0 + %0 = load float* %arrayidx, align 4 %call = tail call float @llvm.log.f32(float %0) nounwind readnone %arrayidx2 = getelementptr inbounds float* %x, i64 %indvars.iv - store float %call, float* %arrayidx2, align 4, !tbaa !0 + store float %call, float* %arrayidx2, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -300,10 +300,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds double* %y, i64 %indvars.iv - %0 = load double* %arrayidx, align 8, !tbaa !3 + %0 = load double* %arrayidx, align 8 %call = tail call double @llvm.log.f64(double %0) nounwind readnone %arrayidx2 = getelementptr inbounds double* %x, i64 %indvars.iv - store double %call, double* %arrayidx2, align 8, !tbaa !3 + store double %call, double* %arrayidx2, align 8 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -326,10 +326,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds float* %y, i64 %indvars.iv - %0 = load float* %arrayidx, align 4, !tbaa !0 + %0 = load float* %arrayidx, align 4 %call = tail call float @llvm.log10.f32(float %0) nounwind readnone %arrayidx2 = getelementptr inbounds float* %x, i64 %indvars.iv - store float %call, float* %arrayidx2, align 4, !tbaa !0 + store float %call, float* %arrayidx2, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -352,10 +352,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds double* %y, i64 %indvars.iv - %0 = load double* %arrayidx, align 8, !tbaa !3 + %0 = load double* %arrayidx, align 8 %call = tail call double @llvm.log10.f64(double %0) nounwind readnone %arrayidx2 = getelementptr inbounds double* %x, i64 %indvars.iv - store double %call, double* %arrayidx2, align 8, !tbaa !3 + store double %call, double* %arrayidx2, align 8 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -378,10 +378,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds float* %y, i64 %indvars.iv - %0 = load float* %arrayidx, align 4, !tbaa !0 + %0 = load float* %arrayidx, align 4 %call = tail call float @llvm.log2.f32(float %0) nounwind readnone %arrayidx2 = getelementptr inbounds float* %x, i64 %indvars.iv - store float %call, float* %arrayidx2, align 4, !tbaa !0 + store float %call, float* %arrayidx2, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -404,10 +404,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds double* %y, i64 %indvars.iv - %0 = load double* %arrayidx, align 8, !tbaa !3 + %0 = load double* %arrayidx, align 8 %call = tail call double @llvm.log2.f64(double %0) nounwind readnone %arrayidx2 = getelementptr inbounds double* %x, i64 %indvars.iv - store double %call, double* %arrayidx2, align 8, !tbaa !3 + store double %call, double* %arrayidx2, align 8 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -430,10 +430,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds float* %y, i64 %indvars.iv - %0 = load float* %arrayidx, align 4, !tbaa !0 + %0 = load float* %arrayidx, align 4 %call = tail call float @llvm.fabs.f32(float %0) nounwind readnone %arrayidx2 = getelementptr inbounds float* %x, i64 %indvars.iv - store float %call, float* %arrayidx2, align 4, !tbaa !0 + store float %call, float* %arrayidx2, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -453,10 +453,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds double* %y, i64 %indvars.iv - %0 = load double* %arrayidx, align 8, !tbaa !3 + %0 = load double* %arrayidx, align 8 %call = tail call double @llvm.fabs(double %0) nounwind readnone %arrayidx2 = getelementptr inbounds double* %x, i64 %indvars.iv - store double %call, double* %arrayidx2, align 8, !tbaa !3 + store double %call, double* %arrayidx2, align 8 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -479,10 +479,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds float* %y, i64 %indvars.iv - %0 = load float* %arrayidx, align 4, !tbaa !0 + %0 = load float* %arrayidx, align 4 %call = tail call float @llvm.floor.f32(float %0) nounwind readnone %arrayidx2 = getelementptr inbounds float* %x, i64 %indvars.iv - store float %call, float* %arrayidx2, align 4, !tbaa !0 + store float %call, float* %arrayidx2, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -505,10 +505,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds double* %y, i64 %indvars.iv - %0 = load double* %arrayidx, align 8, !tbaa !3 + %0 = load double* %arrayidx, align 8 %call = tail call double @llvm.floor.f64(double %0) nounwind readnone %arrayidx2 = getelementptr inbounds double* %x, i64 %indvars.iv - store double %call, double* %arrayidx2, align 8, !tbaa !3 + store double %call, double* %arrayidx2, align 8 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -531,10 +531,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds float* %y, i64 %indvars.iv - %0 = load float* %arrayidx, align 4, !tbaa !0 + %0 = load float* %arrayidx, align 4 %call = tail call float @llvm.ceil.f32(float %0) nounwind readnone %arrayidx2 = getelementptr inbounds float* %x, i64 %indvars.iv - store float %call, float* %arrayidx2, align 4, !tbaa !0 + store float %call, float* %arrayidx2, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -557,10 +557,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds double* %y, i64 %indvars.iv - %0 = load double* %arrayidx, align 8, !tbaa !3 + %0 = load double* %arrayidx, align 8 %call = tail call double @llvm.ceil.f64(double %0) nounwind readnone %arrayidx2 = getelementptr inbounds double* %x, i64 %indvars.iv - store double %call, double* %arrayidx2, align 8, !tbaa !3 + store double %call, double* %arrayidx2, align 8 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -583,10 +583,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds float* %y, i64 %indvars.iv - %0 = load float* %arrayidx, align 4, !tbaa !0 + %0 = load float* %arrayidx, align 4 %call = tail call float @llvm.trunc.f32(float %0) nounwind readnone %arrayidx2 = getelementptr inbounds float* %x, i64 %indvars.iv - store float %call, float* %arrayidx2, align 4, !tbaa !0 + store float %call, float* %arrayidx2, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -609,10 +609,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds double* %y, i64 %indvars.iv - %0 = load double* %arrayidx, align 8, !tbaa !3 + %0 = load double* %arrayidx, align 8 %call = tail call double @llvm.trunc.f64(double %0) nounwind readnone %arrayidx2 = getelementptr inbounds double* %x, i64 %indvars.iv - store double %call, double* %arrayidx2, align 8, !tbaa !3 + store double %call, double* %arrayidx2, align 8 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -635,10 +635,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds float* %y, i64 %indvars.iv - %0 = load float* %arrayidx, align 4, !tbaa !0 + %0 = load float* %arrayidx, align 4 %call = tail call float @llvm.rint.f32(float %0) nounwind readnone %arrayidx2 = getelementptr inbounds float* %x, i64 %indvars.iv - store float %call, float* %arrayidx2, align 4, !tbaa !0 + store float %call, float* %arrayidx2, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -661,10 +661,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds double* %y, i64 %indvars.iv - %0 = load double* %arrayidx, align 8, !tbaa !3 + %0 = load double* %arrayidx, align 8 %call = tail call double @llvm.rint.f64(double %0) nounwind readnone %arrayidx2 = getelementptr inbounds double* %x, i64 %indvars.iv - store double %call, double* %arrayidx2, align 8, !tbaa !3 + store double %call, double* %arrayidx2, align 8 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -687,10 +687,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds float* %y, i64 %indvars.iv - %0 = load float* %arrayidx, align 4, !tbaa !0 + %0 = load float* %arrayidx, align 4 %call = tail call float @llvm.nearbyint.f32(float %0) nounwind readnone %arrayidx2 = getelementptr inbounds float* %x, i64 %indvars.iv - store float %call, float* %arrayidx2, align 4, !tbaa !0 + store float %call, float* %arrayidx2, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -713,10 +713,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds double* %y, i64 %indvars.iv - %0 = load double* %arrayidx, align 8, !tbaa !3 + %0 = load double* %arrayidx, align 8 %call = tail call double @llvm.nearbyint.f64(double %0) nounwind readnone %arrayidx2 = getelementptr inbounds double* %x, i64 %indvars.iv - store double %call, double* %arrayidx2, align 8, !tbaa !3 + store double %call, double* %arrayidx2, align 8 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -739,14 +739,14 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds float* %y, i64 %indvars.iv - %0 = load float* %arrayidx, align 4, !tbaa !0 + %0 = load float* %arrayidx, align 4 %arrayidx2 = getelementptr inbounds float* %w, i64 %indvars.iv - %1 = load float* %arrayidx2, align 4, !tbaa !0 + %1 = load float* %arrayidx2, align 4 %arrayidx4 = getelementptr inbounds float* %z, i64 %indvars.iv - %2 = load float* %arrayidx4, align 4, !tbaa !0 + %2 = load float* %arrayidx4, align 4 %3 = tail call float @llvm.fma.f32(float %0, float %2, float %1) %arrayidx6 = getelementptr inbounds float* %x, i64 %indvars.iv - store float %3, float* %arrayidx6, align 4, !tbaa !0 + store float %3, float* %arrayidx6, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -769,14 +769,14 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds double* %y, i64 %indvars.iv - %0 = load double* %arrayidx, align 8, !tbaa !3 + %0 = load double* %arrayidx, align 8 %arrayidx2 = getelementptr inbounds double* %w, i64 %indvars.iv - %1 = load double* %arrayidx2, align 8, !tbaa !3 + %1 = load double* %arrayidx2, align 8 %arrayidx4 = getelementptr inbounds double* %z, i64 %indvars.iv - %2 = load double* %arrayidx4, align 8, !tbaa !3 + %2 = load double* %arrayidx4, align 8 %3 = tail call double @llvm.fma.f64(double %0, double %2, double %1) %arrayidx6 = getelementptr inbounds double* %x, i64 %indvars.iv - store double %3, double* %arrayidx6, align 8, !tbaa !3 + store double %3, double* %arrayidx6, align 8 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -799,14 +799,14 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds float* %y, i64 %indvars.iv - %0 = load float* %arrayidx, align 4, !tbaa !0 + %0 = load float* %arrayidx, align 4 %arrayidx2 = getelementptr inbounds float* %w, i64 %indvars.iv - %1 = load float* %arrayidx2, align 4, !tbaa !0 + %1 = load float* %arrayidx2, align 4 %arrayidx4 = getelementptr inbounds float* %z, i64 %indvars.iv - %2 = load float* %arrayidx4, align 4, !tbaa !0 + %2 = load float* %arrayidx4, align 4 %3 = tail call float @llvm.fmuladd.f32(float %0, float %2, float %1) %arrayidx6 = getelementptr inbounds float* %x, i64 %indvars.iv - store float %3, float* %arrayidx6, align 4, !tbaa !0 + store float %3, float* %arrayidx6, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -829,14 +829,14 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds double* %y, i64 %indvars.iv - %0 = load double* %arrayidx, align 8, !tbaa !3 + %0 = load double* %arrayidx, align 8 %arrayidx2 = getelementptr inbounds double* %w, i64 %indvars.iv - %1 = load double* %arrayidx2, align 8, !tbaa !3 + %1 = load double* %arrayidx2, align 8 %arrayidx4 = getelementptr inbounds double* %z, i64 %indvars.iv - %2 = load double* %arrayidx4, align 8, !tbaa !3 + %2 = load double* %arrayidx4, align 8 %3 = tail call double @llvm.fmuladd.f64(double %0, double %2, double %1) %arrayidx6 = getelementptr inbounds double* %x, i64 %indvars.iv - store double %3, double* %arrayidx6, align 8, !tbaa !3 + store double %3, double* %arrayidx6, align 8 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -859,12 +859,12 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds float* %y, i64 %indvars.iv - %0 = load float* %arrayidx, align 4, !tbaa !0 + %0 = load float* %arrayidx, align 4 %arrayidx2 = getelementptr inbounds float* %z, i64 %indvars.iv - %1 = load float* %arrayidx2, align 4, !tbaa !0 + %1 = load float* %arrayidx2, align 4 %call = tail call float @llvm.pow.f32(float %0, float %1) nounwind readnone %arrayidx4 = getelementptr inbounds float* %x, i64 %indvars.iv - store float %call, float* %arrayidx4, align 4, !tbaa !0 + store float %call, float* %arrayidx4, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -887,12 +887,12 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds double* %y, i64 %indvars.iv - %0 = load double* %arrayidx, align 8, !tbaa !3 + %0 = load double* %arrayidx, align 8 %arrayidx2 = getelementptr inbounds double* %z, i64 %indvars.iv - %1 = load double* %arrayidx2, align 8, !tbaa !3 + %1 = load double* %arrayidx2, align 8 %call = tail call double @llvm.pow.f64(double %0, double %1) nounwind readnone %arrayidx4 = getelementptr inbounds double* %x, i64 %indvars.iv - store double %call, double* %arrayidx4, align 8, !tbaa !3 + store double %call, double* %arrayidx4, align 8 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -927,9 +927,3 @@ for.end: ; preds = %for.body declare float @fabsf(float) nounwind readnone declare double @llvm.pow.f64(double, double) nounwind readnone - -!0 = metadata !{metadata !"float", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} -!3 = metadata !{metadata !"double", metadata !1} -!4 = metadata !{metadata !"int", metadata !1} diff --git a/test/Transforms/LoopVectorize/minmax_reduction.ll b/test/Transforms/LoopVectorize/minmax_reduction.ll new file mode 100644 index 0000000..99dd093 --- /dev/null +++ b/test/Transforms/LoopVectorize/minmax_reduction.ll @@ -0,0 +1,402 @@ +; RUN: opt -S -loop-vectorize -dce -instcombine -force-vector-width=2 -force-vector-unroll=1 < %s | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" + +@A = common global [1024 x i32] zeroinitializer, align 16 + +; Signed tests. + +; Turn this into a max reduction. +; CHECK: @max_red +; CHECK: icmp sgt <2 x i32> +; CHECK: select <2 x i1> +; CHECK: middle.block +; CHECK: icmp sgt <2 x i32> +; CHECK: select <2 x i1> + +define i32 @max_red(i32 %max) { +entry: + br label %for.body + +for.body: + %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] + %max.red.08 = phi i32 [ %max, %entry ], [ %max.red.0, %for.body ] + %arrayidx = getelementptr inbounds [1024 x i32]* @A, i64 0, i64 %indvars.iv + %0 = load i32* %arrayidx, align 4 + %cmp3 = icmp sgt i32 %0, %max.red.08 + %max.red.0 = select i1 %cmp3, i32 %0, i32 %max.red.08 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 1024 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret i32 %max.red.0 +} + +; Turn this into a max reduction. The select has its inputs reversed therefore +; this is a max reduction. +; CHECK: @max_red_inverse_select +; CHECK: icmp slt <2 x i32> +; CHECK: select <2 x i1> +; CHECK: middle.block +; CHECK: icmp sgt <2 x i32> +; CHECK: select <2 x i1> + +define i32 @max_red_inverse_select(i32 %max) { +entry: + br label %for.body + +for.body: + %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] + %max.red.08 = phi i32 [ %max, %entry ], [ %max.red.0, %for.body ] + %arrayidx = getelementptr inbounds [1024 x i32]* @A, i64 0, i64 %indvars.iv + %0 = load i32* %arrayidx, align 4 + %cmp3 = icmp slt i32 %max.red.08, %0 + %max.red.0 = select i1 %cmp3, i32 %0, i32 %max.red.08 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 1024 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret i32 %max.red.0 +} + +; Turn this into a min reduction. +; CHECK: @min_red +; CHECK: icmp slt <2 x i32> +; CHECK: select <2 x i1> +; CHECK: middle.block +; CHECK: icmp slt <2 x i32> +; CHECK: select <2 x i1> + +define i32 @min_red(i32 %max) { +entry: + br label %for.body + +for.body: + %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] + %max.red.08 = phi i32 [ %max, %entry ], [ %max.red.0, %for.body ] + %arrayidx = getelementptr inbounds [1024 x i32]* @A, i64 0, i64 %indvars.iv + %0 = load i32* %arrayidx, align 4 + %cmp3 = icmp slt i32 %0, %max.red.08 + %max.red.0 = select i1 %cmp3, i32 %0, i32 %max.red.08 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 1024 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret i32 %max.red.0 +} + +; Turn this into a min reduction. The select has its inputs reversed therefore +; this is a min reduction. +; CHECK: @min_red_inverse_select +; CHECK: icmp sgt <2 x i32> +; CHECK: select <2 x i1> +; CHECK: middle.block +; CHECK: icmp slt <2 x i32> +; CHECK: select <2 x i1> + +define i32 @min_red_inverse_select(i32 %max) { +entry: + br label %for.body + +for.body: + %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] + %max.red.08 = phi i32 [ %max, %entry ], [ %max.red.0, %for.body ] + %arrayidx = getelementptr inbounds [1024 x i32]* @A, i64 0, i64 %indvars.iv + %0 = load i32* %arrayidx, align 4 + %cmp3 = icmp sgt i32 %max.red.08, %0 + %max.red.0 = select i1 %cmp3, i32 %0, i32 %max.red.08 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 1024 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret i32 %max.red.0 +} + +; Unsigned tests. + +; Turn this into a max reduction. +; CHECK: @umax_red +; CHECK: icmp ugt <2 x i32> +; CHECK: select <2 x i1> +; CHECK: middle.block +; CHECK: icmp ugt <2 x i32> +; CHECK: select <2 x i1> + +define i32 @umax_red(i32 %max) { +entry: + br label %for.body + +for.body: + %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] + %max.red.08 = phi i32 [ %max, %entry ], [ %max.red.0, %for.body ] + %arrayidx = getelementptr inbounds [1024 x i32]* @A, i64 0, i64 %indvars.iv + %0 = load i32* %arrayidx, align 4 + %cmp3 = icmp ugt i32 %0, %max.red.08 + %max.red.0 = select i1 %cmp3, i32 %0, i32 %max.red.08 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 1024 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret i32 %max.red.0 +} + +; Turn this into a max reduction. The select has its inputs reversed therefore +; this is a max reduction. +; CHECK: @umax_red_inverse_select +; CHECK: icmp ult <2 x i32> +; CHECK: select <2 x i1> +; CHECK: middle.block +; CHECK: icmp ugt <2 x i32> +; CHECK: select <2 x i1> + +define i32 @umax_red_inverse_select(i32 %max) { +entry: + br label %for.body + +for.body: + %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] + %max.red.08 = phi i32 [ %max, %entry ], [ %max.red.0, %for.body ] + %arrayidx = getelementptr inbounds [1024 x i32]* @A, i64 0, i64 %indvars.iv + %0 = load i32* %arrayidx, align 4 + %cmp3 = icmp ult i32 %max.red.08, %0 + %max.red.0 = select i1 %cmp3, i32 %0, i32 %max.red.08 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 1024 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret i32 %max.red.0 +} + +; Turn this into a min reduction. +; CHECK: @umin_red +; CHECK: icmp ult <2 x i32> +; CHECK: select <2 x i1> +; CHECK: middle.block +; CHECK: icmp ult <2 x i32> +; CHECK: select <2 x i1> + +define i32 @umin_red(i32 %max) { +entry: + br label %for.body + +for.body: + %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] + %max.red.08 = phi i32 [ %max, %entry ], [ %max.red.0, %for.body ] + %arrayidx = getelementptr inbounds [1024 x i32]* @A, i64 0, i64 %indvars.iv + %0 = load i32* %arrayidx, align 4 + %cmp3 = icmp ult i32 %0, %max.red.08 + %max.red.0 = select i1 %cmp3, i32 %0, i32 %max.red.08 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 1024 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret i32 %max.red.0 +} + +; Turn this into a min reduction. The select has its inputs reversed therefore +; this is a min reduction. +; CHECK: @umin_red_inverse_select +; CHECK: icmp ugt <2 x i32> +; CHECK: select <2 x i1> +; CHECK: middle.block +; CHECK: icmp ult <2 x i32> +; CHECK: select <2 x i1> + +define i32 @umin_red_inverse_select(i32 %max) { +entry: + br label %for.body + +for.body: + %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] + %max.red.08 = phi i32 [ %max, %entry ], [ %max.red.0, %for.body ] + %arrayidx = getelementptr inbounds [1024 x i32]* @A, i64 0, i64 %indvars.iv + %0 = load i32* %arrayidx, align 4 + %cmp3 = icmp ugt i32 %max.red.08, %0 + %max.red.0 = select i1 %cmp3, i32 %0, i32 %max.red.08 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 1024 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret i32 %max.red.0 +} + +; SGE -> SLT +; Turn this into a min reduction (select inputs are reversed). +; CHECK: @sge_min_red +; CHECK: icmp sge <2 x i32> +; CHECK: select <2 x i1> +; CHECK: middle.block +; CHECK: icmp slt <2 x i32> +; CHECK: select <2 x i1> + +define i32 @sge_min_red(i32 %max) { +entry: + br label %for.body + +for.body: + %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] + %max.red.08 = phi i32 [ %max, %entry ], [ %max.red.0, %for.body ] + %arrayidx = getelementptr inbounds [1024 x i32]* @A, i64 0, i64 %indvars.iv + %0 = load i32* %arrayidx, align 4 + %cmp3 = icmp sge i32 %0, %max.red.08 + %max.red.0 = select i1 %cmp3, i32 %max.red.08, i32 %0 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 1024 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret i32 %max.red.0 +} + +; SLE -> SGT +; Turn this into a max reduction (select inputs are reversed). +; CHECK: @sle_min_red +; CHECK: icmp sle <2 x i32> +; CHECK: select <2 x i1> +; CHECK: middle.block +; CHECK: icmp sgt <2 x i32> +; CHECK: select <2 x i1> + +define i32 @sle_min_red(i32 %max) { +entry: + br label %for.body + +for.body: + %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] + %max.red.08 = phi i32 [ %max, %entry ], [ %max.red.0, %for.body ] + %arrayidx = getelementptr inbounds [1024 x i32]* @A, i64 0, i64 %indvars.iv + %0 = load i32* %arrayidx, align 4 + %cmp3 = icmp sle i32 %0, %max.red.08 + %max.red.0 = select i1 %cmp3, i32 %max.red.08, i32 %0 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 1024 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret i32 %max.red.0 +} + +; UGE -> ULT +; Turn this into a min reduction (select inputs are reversed). +; CHECK: @uge_min_red +; CHECK: icmp uge <2 x i32> +; CHECK: select <2 x i1> +; CHECK: middle.block +; CHECK: icmp ult <2 x i32> +; CHECK: select <2 x i1> + +define i32 @uge_min_red(i32 %max) { +entry: + br label %for.body + +for.body: + %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] + %max.red.08 = phi i32 [ %max, %entry ], [ %max.red.0, %for.body ] + %arrayidx = getelementptr inbounds [1024 x i32]* @A, i64 0, i64 %indvars.iv + %0 = load i32* %arrayidx, align 4 + %cmp3 = icmp uge i32 %0, %max.red.08 + %max.red.0 = select i1 %cmp3, i32 %max.red.08, i32 %0 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 1024 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret i32 %max.red.0 +} + +; ULE -> UGT +; Turn this into a max reduction (select inputs are reversed). +; CHECK: @ule_min_red +; CHECK: icmp ule <2 x i32> +; CHECK: select <2 x i1> +; CHECK: middle.block +; CHECK: icmp ugt <2 x i32> +; CHECK: select <2 x i1> + +define i32 @ule_min_red(i32 %max) { +entry: + br label %for.body + +for.body: + %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] + %max.red.08 = phi i32 [ %max, %entry ], [ %max.red.0, %for.body ] + %arrayidx = getelementptr inbounds [1024 x i32]* @A, i64 0, i64 %indvars.iv + %0 = load i32* %arrayidx, align 4 + %cmp3 = icmp ule i32 %0, %max.red.08 + %max.red.0 = select i1 %cmp3, i32 %max.red.08, i32 %0 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 1024 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret i32 %max.red.0 +} + +; No reduction. +; CHECK: @no_red_1 +; CHECK-NOT: icmp <2 x i32> +define i32 @no_red_1(i32 %max) { +entry: + br label %for.body + +for.body: + %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] + %max.red.08 = phi i32 [ %max, %entry ], [ %max.red.0, %for.body ] + %arrayidx = getelementptr inbounds [1024 x i32]* @A, i64 0, i64 %indvars.iv + %arrayidx1 = getelementptr inbounds [1024 x i32]* @A, i64 1, i64 %indvars.iv + %0 = load i32* %arrayidx, align 4 + %1 = load i32* %arrayidx1, align 4 + %cmp3 = icmp sgt i32 %0, %1 + %max.red.0 = select i1 %cmp3, i32 %0, i32 %max.red.08 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 1024 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret i32 %max.red.0 +} + +; CHECK: @no_red_2 +; CHECK-NOT: icmp <2 x i32> +define i32 @no_red_2(i32 %max) { +entry: + br label %for.body + +for.body: + %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] + %max.red.08 = phi i32 [ %max, %entry ], [ %max.red.0, %for.body ] + %arrayidx = getelementptr inbounds [1024 x i32]* @A, i64 0, i64 %indvars.iv + %arrayidx1 = getelementptr inbounds [1024 x i32]* @A, i64 1, i64 %indvars.iv + %0 = load i32* %arrayidx, align 4 + %1 = load i32* %arrayidx1, align 4 + %cmp3 = icmp sgt i32 %0, %max.red.08 + %max.red.0 = select i1 %cmp3, i32 %0, i32 %1 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 1024 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret i32 %max.red.0 +} diff --git a/test/Transforms/LoopVectorize/no_idiv_reduction.ll b/test/Transforms/LoopVectorize/no_idiv_reduction.ll new file mode 100644 index 0000000..cdfb3fd --- /dev/null +++ b/test/Transforms/LoopVectorize/no_idiv_reduction.ll @@ -0,0 +1,24 @@ +; RUN: opt -loop-vectorize -force-vector-width=2 -force-vector-unroll=1 -S < %s | FileCheck %s +@a = common global [128 x i32] zeroinitializer, align 16 + +;; Must not vectorize division reduction. Division is lossy. +define i32 @g() { +entry: + br label %for.body + +for.body: + ; CHECK: @g + ; CHECK-NOT: sdiv <2 x i32> + %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] + %r.05 = phi i32 [ 80, %entry ], [ %div, %for.body ] + %arrayidx = getelementptr inbounds [128 x i32]* @a, i64 0, i64 %indvars.iv + %0 = load i32* %arrayidx, align 4 + %div = sdiv i32 %r.05, %0 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 1024 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret i32 %div +} diff --git a/test/Transforms/LoopVectorize/phi-hang.ll b/test/Transforms/LoopVectorize/phi-hang.ll index b80d459..bbce239 100644 --- a/test/Transforms/LoopVectorize/phi-hang.ll +++ b/test/Transforms/LoopVectorize/phi-hang.ll @@ -27,3 +27,21 @@ bb5: ; preds = %bb4, %bb1 bb11: ; preds = %bb5 ret void } + +; PR15748 +define void @test2() { +bb: + br label %bb1 + +bb1: ; preds = %bb1, %bb + %tmp = phi i32 [ 0, %bb ], [ %tmp5, %bb1 ] + %tmp2 = phi i32 [ 0, %bb ], [ 1, %bb1 ] + %tmp3 = phi i32 [ 0, %bb ], [ %tmp4, %bb1 ] + %tmp4 = or i32 %tmp2, %tmp3 + %tmp5 = add nsw i32 %tmp, 1 + %tmp6 = icmp eq i32 %tmp5, 0 + br i1 %tmp6, label %bb7, label %bb1 + +bb7: ; preds = %bb1 + ret void +} diff --git a/test/Transforms/LoopVectorize/runtime-check-readonly.ll b/test/Transforms/LoopVectorize/runtime-check-readonly.ll new file mode 100644 index 0000000..4145d13 --- /dev/null +++ b/test/Transforms/LoopVectorize/runtime-check-readonly.ll @@ -0,0 +1,36 @@ +; RUN: opt < %s -loop-vectorize -force-vector-unroll=1 -force-vector-width=4 -dce -instcombine -S | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.8.0" + +;CHECK: add_ints +;CHECK: br +;CHECK: getelementptr +;CHECK-NEXT: getelementptr +;CHECK-NEXT: icmp uge +;CHECK-NEXT: icmp uge +;CHECK-NEXT: icmp uge +;CHECK-NEXT: icmp uge +;CHECK-NEXT: and +;CHECK: ret +define void @add_ints(i32* nocapture %A, i32* nocapture %B, i32* nocapture %C) { +entry: + br label %for.body + +for.body: + %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] + %arrayidx = getelementptr inbounds i32* %B, i64 %indvars.iv + %0 = load i32* %arrayidx, align 4 + %arrayidx2 = getelementptr inbounds i32* %C, i64 %indvars.iv + %1 = load i32* %arrayidx2, align 4 + %add = add nsw i32 %1, %0 + %arrayidx4 = getelementptr inbounds i32* %A, i64 %indvars.iv + store i32 %add, i32* %arrayidx4, align 4 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 200 + br i1 %exitcond, label %for.end, label %for.body + +for.end: + ret void +} diff --git a/test/Transforms/LoopVectorize/runtime-check.ll b/test/Transforms/LoopVectorize/runtime-check.ll index 86098a6..014c4fc 100644 --- a/test/Transforms/LoopVectorize/runtime-check.ll +++ b/test/Transforms/LoopVectorize/runtime-check.ll @@ -22,10 +22,10 @@ entry: for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %arrayidx = getelementptr inbounds float* %b, i64 %indvars.iv - %0 = load float* %arrayidx, align 4, !tbaa !0 + %0 = load float* %arrayidx, align 4 %mul = fmul float %0, 3.000000e+00 %arrayidx2 = getelementptr inbounds float* %a, i64 %indvars.iv - store float %mul, float* %arrayidx2, align 4, !tbaa !0 + store float %mul, float* %arrayidx2, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 %exitcond = icmp eq i32 %lftr.wideiv, %n @@ -34,7 +34,3 @@ for.body: ; preds = %entry, %for.body for.end: ; preds = %for.body, %entry ret i32 undef } - -!0 = metadata !{metadata !"float", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/Transforms/LoopVectorize/runtime-limit.ll b/test/Transforms/LoopVectorize/runtime-limit.ll new file mode 100644 index 0000000..d783974 --- /dev/null +++ b/test/Transforms/LoopVectorize/runtime-limit.ll @@ -0,0 +1,84 @@ +; RUN: opt < %s -loop-vectorize -force-vector-unroll=1 -force-vector-width=4 -dce -instcombine -S | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.8.0" + +; We are vectorizing with 6 runtime checks. +;CHECK: func1x6 +;CHECK: <4 x i32> +;CHECK: ret +define i32 @func1x6(i32* nocapture %out, i32* nocapture %A, i32* nocapture %B, i32* nocapture %C, i32* nocapture %D, i32* nocapture %E, i32* nocapture %F) { +entry: + br label %for.body + +for.body: ; preds = %for.body, %entry + %i.016 = phi i64 [ 0, %entry ], [ %inc, %for.body ] + %arrayidx = getelementptr inbounds i32* %A, i64 %i.016 + %0 = load i32* %arrayidx, align 4 + %arrayidx1 = getelementptr inbounds i32* %B, i64 %i.016 + %1 = load i32* %arrayidx1, align 4 + %add = add nsw i32 %1, %0 + %arrayidx2 = getelementptr inbounds i32* %C, i64 %i.016 + %2 = load i32* %arrayidx2, align 4 + %add3 = add nsw i32 %add, %2 + %arrayidx4 = getelementptr inbounds i32* %E, i64 %i.016 + %3 = load i32* %arrayidx4, align 4 + %add5 = add nsw i32 %add3, %3 + %arrayidx6 = getelementptr inbounds i32* %F, i64 %i.016 + %4 = load i32* %arrayidx6, align 4 + %add7 = add nsw i32 %add5, %4 + %arrayidx8 = getelementptr inbounds i32* %out, i64 %i.016 + store i32 %add7, i32* %arrayidx8, align 4 + %inc = add i64 %i.016, 1 + %exitcond = icmp eq i64 %inc, 256 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body + ret i32 undef +} + +; We are not vectorizing with 12 runtime checks. +;CHECK: func2x6 +;CHECK-NOT: <4 x i32> +;CHECK: ret +define i32 @func2x6(i32* nocapture %out, i32* nocapture %out2, i32* nocapture %A, i32* nocapture %B, i32* nocapture %C, i32* nocapture %D, i32* nocapture %E, i32* nocapture %F) { +entry: + br label %for.body + +for.body: ; preds = %for.body, %entry + %i.037 = phi i64 [ 0, %entry ], [ %inc, %for.body ] + %arrayidx = getelementptr inbounds i32* %A, i64 %i.037 + %0 = load i32* %arrayidx, align 4 + %arrayidx1 = getelementptr inbounds i32* %B, i64 %i.037 + %1 = load i32* %arrayidx1, align 4 + %add = add nsw i32 %1, %0 + %arrayidx2 = getelementptr inbounds i32* %C, i64 %i.037 + %2 = load i32* %arrayidx2, align 4 + %add3 = add nsw i32 %add, %2 + %arrayidx4 = getelementptr inbounds i32* %E, i64 %i.037 + %3 = load i32* %arrayidx4, align 4 + %add5 = add nsw i32 %add3, %3 + %arrayidx6 = getelementptr inbounds i32* %F, i64 %i.037 + %4 = load i32* %arrayidx6, align 4 + %add7 = add nsw i32 %add5, %4 + %arrayidx8 = getelementptr inbounds i32* %out, i64 %i.037 + store i32 %add7, i32* %arrayidx8, align 4 + %5 = load i32* %arrayidx, align 4 + %6 = load i32* %arrayidx1, align 4 + %add11 = add nsw i32 %6, %5 + %7 = load i32* %arrayidx2, align 4 + %add13 = add nsw i32 %add11, %7 + %8 = load i32* %arrayidx4, align 4 + %add15 = add nsw i32 %add13, %8 + %9 = load i32* %arrayidx6, align 4 + %add17 = add nsw i32 %add15, %9 + %arrayidx18 = getelementptr inbounds i32* %out2, i64 %i.037 + store i32 %add17, i32* %arrayidx18, align 4 + %inc = add i64 %i.037, 1 + %exitcond = icmp eq i64 %inc, 256 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body + ret i32 undef +} + diff --git a/test/Transforms/LoopVectorize/start-non-zero.ll b/test/Transforms/LoopVectorize/start-non-zero.ll index 998001c..e8a089a 100644 --- a/test/Transforms/LoopVectorize/start-non-zero.ll +++ b/test/Transforms/LoopVectorize/start-non-zero.ll @@ -18,9 +18,9 @@ for.body.lr.ph: ; preds = %entry for.body: ; preds = %for.body.lr.ph, %for.body %indvars.iv = phi i64 [ %0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ] %arrayidx = getelementptr inbounds i32* %a, i64 %indvars.iv - %1 = load i32* %arrayidx, align 4, !tbaa !0 + %1 = load i32* %arrayidx, align 4 %mul = mul nuw i32 %1, 333 - store i32 %mul, i32* %arrayidx, align 4, !tbaa !0 + store i32 %mul, i32* %arrayidx, align 4 %indvars.iv.next = add i64 %indvars.iv, 1 %2 = trunc i64 %indvars.iv.next to i32 %cmp = icmp slt i32 %2, %end @@ -29,7 +29,3 @@ for.body: ; preds = %for.body.lr.ph, %fo for.end: ; preds = %for.body, %entry ret i32 4 } - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/Transforms/LoopVectorize/struct_access.ll b/test/Transforms/LoopVectorize/struct_access.ll index de65d0d..573480d 100644 --- a/test/Transforms/LoopVectorize/struct_access.ll +++ b/test/Transforms/LoopVectorize/struct_access.ll @@ -33,7 +33,7 @@ for.body: ; preds = %entry, %for.body %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] %sum.05 = phi i32 [ %add, %for.body ], [ 0, %entry ] %x = getelementptr inbounds %struct.coordinate* %A, i64 %indvars.iv, i32 0 - %0 = load i32* %x, align 4, !tbaa !0 + %0 = load i32* %x, align 4 %add = add nsw i32 %0, %sum.05 %indvars.iv.next = add i64 %indvars.iv, 1 %lftr.wideiv = trunc i64 %indvars.iv.next to i32 @@ -44,7 +44,3 @@ for.end: ; preds = %for.body, %entry %sum.0.lcssa = phi i32 [ 0, %entry ], [ %add, %for.body ] ret i32 %sum.0.lcssa } - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/Transforms/LoopVectorize/vectorize-once.ll b/test/Transforms/LoopVectorize/vectorize-once.ll index ac16948..f289ded 100644 --- a/test/Transforms/LoopVectorize/vectorize-once.ll +++ b/test/Transforms/LoopVectorize/vectorize-once.ll @@ -29,7 +29,7 @@ entry: for.body.i: ; preds = %entry, %for.body.i %__init.addr.05.i = phi i32 [ %add.i, %for.body.i ], [ 0, %entry ] %__first.addr.04.i = phi i32* [ %incdec.ptr.i, %for.body.i ], [ %A, %entry ] - %0 = load i32* %__first.addr.04.i, align 4, !tbaa !0 + %0 = load i32* %__first.addr.04.i, align 4 %add.i = add nsw i32 %0, %__init.addr.05.i %incdec.ptr.i = getelementptr inbounds i32* %__first.addr.04.i, i64 1 %cmp.i = icmp eq i32* %incdec.ptr.i, %add.ptr @@ -55,7 +55,7 @@ entry: for.body.i: ; preds = %entry, %for.body.i %__init.addr.05.i = phi i32 [ %add.i, %for.body.i ], [ 0, %entry ] %__first.addr.04.i = phi i32* [ %incdec.ptr.i, %for.body.i ], [ %A, %entry ] - %0 = load i32* %__first.addr.04.i, align 4, !tbaa !0 + %0 = load i32* %__first.addr.04.i, align 4 %add.i = add nsw i32 %0, %__init.addr.05.i %incdec.ptr.i = getelementptr inbounds i32* %__first.addr.04.i, i64 1 %cmp.i = icmp eq i32* %incdec.ptr.i, %add.ptr @@ -68,8 +68,5 @@ _ZSt10accumulateIPiiET0_T_S2_S1_.exit: ; preds = %for.body.i, %entry attributes #0 = { nounwind readonly ssp uwtable "fp-contract-model"="standard" "no-frame-pointer-elim" "no-frame-pointer-elim-non-leaf" "realign-stack" "relocation-model"="pic" "ssp-buffers-size"="8" } -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} !3 = metadata !{} diff --git a/test/Transforms/Mem2Reg/ConvertDebugInfo.ll b/test/Transforms/Mem2Reg/ConvertDebugInfo.ll index 8abd851..c0eaaa4 100644 --- a/test/Transforms/Mem2Reg/ConvertDebugInfo.ll +++ b/test/Transforms/Mem2Reg/ConvertDebugInfo.ll @@ -35,7 +35,7 @@ declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!3} !0 = metadata !{i32 786689, metadata !1, metadata !"i", metadata !2, i32 2, metadata !7, i32 0, null} ; [ DW_TAG_arg_variable ] -!1 = metadata !{i32 786478, i32 0, metadata !2, metadata !"testfunc", metadata !"testfunc", metadata !"testfunc", metadata !2, i32 2, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, double (i32, double)* @testfunc, null, null, null, i32 2} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 786478, metadata !2, metadata !"testfunc", metadata !"testfunc", metadata !"testfunc", metadata !2, i32 2, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, double (i32, double)* @testfunc, null, null, null, i32 2} ; [ DW_TAG_subprogram ] !2 = metadata !{i32 786473, metadata !12} ; [ DW_TAG_file_type ] !3 = metadata !{i32 786449, i32 0, i32 1, metadata !"testfunc.c", metadata !"/tmp", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] !4 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null} ; [ DW_TAG_subroutine_type ] diff --git a/test/Transforms/Mem2Reg/ConvertDebugInfo2.ll b/test/Transforms/Mem2Reg/ConvertDebugInfo2.ll index f601532..f6119f8 100644 --- a/test/Transforms/Mem2Reg/ConvertDebugInfo2.ll +++ b/test/Transforms/Mem2Reg/ConvertDebugInfo2.ll @@ -31,7 +31,7 @@ return: ; preds = %entry } !0 = metadata !{i32 786689, metadata !1, metadata !"a", metadata !2, i32 8, metadata !6, i32 0, null} ; [ DW_TAG_arg_variable ] -!1 = metadata !{i32 786478, i32 0, metadata !2, metadata !"baz", metadata !"baz", metadata !"baz", metadata !2, i32 8, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, void (i32)* @baz, null, null, null, i32 8} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 786478, metadata !2, metadata !"baz", metadata !"baz", metadata !"baz", metadata !2, i32 8, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, void (i32)* @baz, null, null, null, i32 8} ; [ DW_TAG_subprogram ] !2 = metadata !{i32 786473, metadata !20} ; [ DW_TAG_file_type ] !3 = metadata !{i32 786449, i32 0, i32 1, metadata !"bar.c", metadata !"/tmp/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] !4 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null} ; [ DW_TAG_subroutine_type ] @@ -40,7 +40,7 @@ return: ; preds = %entry !7 = metadata !{i32 8, i32 0, metadata !1, null} !8 = metadata !{i32 9, i32 0, metadata !1, null} !9 = metadata !{i32 786689, metadata !10, metadata !"x", metadata !2, i32 4, metadata !6, i32 0, null} ; [ DW_TAG_arg_variable ] -!10 = metadata !{i32 786478, i32 0, metadata !2, metadata !"bar", metadata !"bar", metadata !"bar", metadata !2, i32 4, metadata !11, i1 true, i1 true, i32 0, i32 0, null, i1 false, i1 false, null, null, null, null, i32 4} ; [ DW_TAG_subprogram ] +!10 = metadata !{i32 786478, metadata !2, metadata !"bar", metadata !"bar", metadata !"bar", metadata !2, i32 4, metadata !11, i1 true, i1 true, i32 0, i32 0, null, i1 false, i1 false, null, null, null, null, i32 4} ; [ DW_TAG_subprogram ] !11 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_subroutine_type ] !12 = metadata !{null, metadata !6, metadata !13, metadata !14} !13 = metadata !{i32 786468, metadata !2, metadata !"long int", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] diff --git a/test/Transforms/MergeFunc/crash.ll b/test/Transforms/MergeFunc/crash.ll new file mode 100644 index 0000000..0897ba2 --- /dev/null +++ b/test/Transforms/MergeFunc/crash.ll @@ -0,0 +1,46 @@ +; RUN: opt -mergefunc -disable-output < %s +; PR15185 +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S128" +target triple = "i386-pc-linux-gnu" + +%.qux.2496 = type { i32, %.qux.2497 } +%.qux.2497 = type { i8, i32 } +%.qux.2585 = type { i32, i32, i8* } + +@g2 = external unnamed_addr constant [9 x i8], align 1 +@g3 = internal hidden unnamed_addr constant [1 x i8*] [i8* bitcast (i8* (%.qux.2585*)* @func35 to i8*)] + +define internal hidden i32 @func1(i32* %ptr, { i32, i32 }* nocapture %method) align 2 { + br label %1 + +; <label>:1 + br label %2 + +; <label>:2 + ret i32 undef +} + +define internal hidden i32 @func10(%.qux.2496* nocapture %this) align 2 { + %1 = getelementptr inbounds %.qux.2496* %this, i32 0, i32 1, i32 1 + %2 = load i32* %1, align 4 + ret i32 %2 +} + +define internal hidden i8* @func29(i32* nocapture %this) align 2 { + ret i8* getelementptr inbounds ([9 x i8]* @g2, i32 0, i32 0) +} + +define internal hidden i32* @func33(%.qux.2585* nocapture %this) align 2 { + ret i32* undef +} + +define internal hidden i32* @func34(%.qux.2585* nocapture %this) align 2 { + %1 = getelementptr inbounds %.qux.2585* %this, i32 0 + ret i32* undef +} + +define internal hidden i8* @func35(%.qux.2585* nocapture %this) align 2 { + %1 = getelementptr inbounds %.qux.2585* %this, i32 0, i32 2 + %2 = load i8** %1, align 4 + ret i8* %2 +} diff --git a/test/Transforms/MergeFunc/inttoptr.ll b/test/Transforms/MergeFunc/inttoptr.ll new file mode 100644 index 0000000..93250fa --- /dev/null +++ b/test/Transforms/MergeFunc/inttoptr.ll @@ -0,0 +1,55 @@ +; RUN: opt -mergefunc -S < %s | FileCheck %s +; PR15185 +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S128" +target triple = "i386-pc-linux-gnu" + +%.qux.2496 = type { i32, %.qux.2497 } +%.qux.2497 = type { i8, i32 } +%.qux.2585 = type { i32, i32, i8* } + +@g2 = external unnamed_addr constant [9 x i8], align 1 +@g3 = internal hidden unnamed_addr constant [1 x i8*] [i8* bitcast (i8* (%.qux.2585*)* @func35 to i8*)] + +define internal hidden i32 @func1(i32* %ptr, { i32, i32 }* nocapture %method) align 2 { +bb: + br label %bb1 + +bb1: ; preds = %bb + br label %bb2 + +bb2: ; preds = %bb1 + ret i32 undef +} + +define internal hidden i32 @func10(%.qux.2496* nocapture %this) align 2 { +bb: + %tmp = getelementptr inbounds %.qux.2496* %this, i32 0, i32 1, i32 1 + %tmp1 = load i32* %tmp, align 4 + ret i32 %tmp1 +} + +define internal hidden i8* @func29(i32* nocapture %this) align 2 { +bb: + ret i8* getelementptr inbounds ([9 x i8]* @g2, i32 0, i32 0) +} + +define internal hidden i32* @func33(%.qux.2585* nocapture %this) align 2 { +bb: + ret i32* undef +} + +define internal hidden i32* @func34(%.qux.2585* nocapture %this) align 2 { +bb: + %tmp = getelementptr inbounds %.qux.2585* %this, i32 0 + ret i32* undef +} + +define internal hidden i8* @func35(%.qux.2585* nocapture %this) align 2 { +bb: +; CHECK: %[[V2:.+]] = bitcast %.qux.2585* %{{.*}} to %.qux.2496* +; CHECK: %[[V3:.+]] = tail call i32 @func10(%.qux.2496* %[[V2]]) +; CHECK: %{{.*}} = inttoptr i32 %[[V3]] to i8* + %tmp = getelementptr inbounds %.qux.2585* %this, i32 0, i32 2 + %tmp1 = load i8** %tmp, align 4 + ret i8* %tmp1 +} diff --git a/test/Transforms/MergeFunc/vector.ll b/test/Transforms/MergeFunc/vector.ll index dba5fa3..56f74e6 100644 --- a/test/Transforms/MergeFunc/vector.ll +++ b/test/Transforms/MergeFunc/vector.ll @@ -22,7 +22,7 @@ target triple = "x86_64-unknown-linux-gnu" define linkonce_odr void @_ZNSt6vectorIlSaIlEED1Ev(%"class.std::vector"* nocapture %this) unnamed_addr align 2 { entry: %tmp2.i.i = bitcast %"class.std::vector"* %this to i64** - %tmp3.i.i = load i64** %tmp2.i.i, align 8, !tbaa !0 + %tmp3.i.i = load i64** %tmp2.i.i, align 8 %tobool.i.i.i = icmp eq i64* %tmp3.i.i, null br i1 %tobool.i.i.i, label %_ZNSt6vectorIlSaIlEED2Ev.exit, label %if.then.i.i.i @@ -40,7 +40,7 @@ declare i32 @__cxa_atexit(void (i8*)*, i8*, i8*) define linkonce_odr void @_ZNSt6vectorIPvSaIS0_EED1Ev(%"class.std::vector"* nocapture %this) unnamed_addr align 2 { entry: %tmp2.i.i = bitcast %"class.std::vector"* %this to i8*** - %tmp3.i.i = load i8*** %tmp2.i.i, align 8, !tbaa !0 + %tmp3.i.i = load i8*** %tmp2.i.i, align 8 %tobool.i.i.i = icmp eq i8** %tmp3.i.i, null br i1 %tobool.i.i.i, label %_ZNSt6vectorIPvSaIS0_EED2Ev.exit, label %if.then.i.i.i @@ -70,8 +70,3 @@ declare void @_ZNSt6vectorIlSaIlEE13_M_insert_auxEN9__gnu_cxx17__normal_iterator declare void @_GLOBAL__I_a() declare %1 @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone - -!0 = metadata !{metadata !"any pointer", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} -!3 = metadata !{metadata !"long", metadata !1} diff --git a/test/Transforms/ObjCARC/apelim.ll b/test/Transforms/ObjCARC/apelim.ll index 4541b3f..14412c6 100644 --- a/test/Transforms/ObjCARC/apelim.ll +++ b/test/Transforms/ObjCARC/apelim.ll @@ -26,7 +26,7 @@ entry: ret void } -; CHECK: define internal void @_GLOBAL__I_x() +; CHECK: define internal void @_GLOBAL__I_x() { ; CHECK-NOT: @objc ; CHECK: } define internal void @_GLOBAL__I_x() { @@ -37,7 +37,7 @@ entry: ret void } -; CHECK: define internal void @_GLOBAL__I_y() +; CHECK: define internal void @_GLOBAL__I_y() { ; CHECK: %0 = call i8* @objc_autoreleasePoolPush() [[NUW:#[0-9]+]] ; CHECK: call void @objc_autoreleasePoolPop(i8* %0) [[NUW]] ; CHECK: } diff --git a/test/Transforms/ObjCARC/arc-annotations.ll b/test/Transforms/ObjCARC/arc-annotations.ll new file mode 100644 index 0000000..c0dea4b --- /dev/null +++ b/test/Transforms/ObjCARC/arc-annotations.ll @@ -0,0 +1,83 @@ +; This file consists of various tests which ensure that the objc-arc-annotations +; are working correctly. In the future, I will use this in other lit tests to +; check the data flow analysis of ARC. + +; REQUIRES: asserts +; RUN: opt -S -objc-arc -enable-objc-arc-annotations < %s | FileCheck %s + +declare i8* @objc_retain(i8*) +declare i8* @objc_retainAutoreleasedReturnValue(i8*) +declare void @objc_release(i8*) +declare i8* @objc_autorelease(i8*) +declare i8* @objc_autoreleaseReturnValue(i8*) +declare void @objc_autoreleasePoolPop(i8*) +declare i8* @objc_autoreleasePoolPush() +declare i8* @objc_retainBlock(i8*) + +declare i8* @objc_retainedObject(i8*) +declare i8* @objc_unretainedObject(i8*) +declare i8* @objc_unretainedPointer(i8*) + +declare void @use_pointer(i8*) +declare void @callee() +declare void @callee_fnptr(void ()*) +declare void @invokee() +declare i8* @returner() + +; Simple retain+release pair deletion, with some intervening control +; flow and harmless instructions. + +; CHECK: define void @test0( +; CHECK: entry: +; CHECK: call void @llvm.arc.annotation.bottomup.bbstart(i8** @x, i8** @S_None) +; CHECK: %0 = tail call i8* @objc_retain(i8* %a) #0, !llvm.arc.annotation.bottomup ![[ANN0:[0-9]+]], !llvm.arc.annotation.topdown ![[ANN1:[0-9]+]] +; CHECK: call void @llvm.arc.annotation.bottomup.bbend(i8** @x, i8** @S_Use) +; CHECK: call void @llvm.arc.annotation.topdown.bbend(i8** @x, i8** @S_Retain) +; CHECK: t: +; CHECK: call void @llvm.arc.annotation.topdown.bbstart(i8** @x, i8** @S_Retain) +; CHECK: call void @llvm.arc.annotation.bottomup.bbstart(i8** @x, i8** @S_Use) +; CHECK: store float 2.000000e+00, float* %b, !llvm.arc.annotation.bottomup ![[ANN2:[0-9]+]] +; CHECK: call void @llvm.arc.annotation.bottomup.bbend(i8** @x, i8** @S_Release) +; CHECK: call void @llvm.arc.annotation.topdown.bbend(i8** @x, i8** @S_Retain) +; CHECK: f: +; CHECK: call void @llvm.arc.annotation.topdown.bbstart(i8** @x, i8** @S_Retain) +; CHECK: call void @llvm.arc.annotation.bottomup.bbstart(i8** @x, i8** @S_Use) +; CHECK: store i32 7, i32* %x, !llvm.arc.annotation.bottomup ![[ANN2]] +; CHECK: call void @llvm.arc.annotation.bottomup.bbend(i8** @x, i8** @S_Release) +; CHECK: call void @llvm.arc.annotation.topdown.bbend(i8** @x, i8** @S_Retain) +; CHECK: return: +; CHECK: call void @llvm.arc.annotation.topdown.bbstart(i8** @x, i8** @S_Retain) +; CHECK: call void @llvm.arc.annotation.bottomup.bbstart(i8** @x, i8** @S_Release) +; CHECK: call void @objc_release(i8* %c) #0, !llvm.arc.annotation.bottomup ![[ANN3:[0-9]+]], !llvm.arc.annotation.topdown ![[ANN4:[0-9]+]] +; CHECK: call void @llvm.arc.annotation.topdown.bbend(i8** @x, i8** @S_None) +; CHECK: } +define void @test0(i32* %x, i1 %p) nounwind { +entry: + %a = bitcast i32* %x to i8* + %0 = call i8* @objc_retain(i8* %a) nounwind + br i1 %p, label %t, label %f + +t: + store i8 3, i8* %a + %b = bitcast i32* %x to float* + store float 2.0, float* %b + br label %return + +f: + store i32 7, i32* %x + br label %return + +return: + %c = bitcast i32* %x to i8* + call void @objc_release(i8* %c) nounwind + ret void +} + +!0 = metadata !{} + +; CHECK: ![[ANN0]] = metadata !{metadata !"(test0,%x)", metadata !"S_Use", metadata !"S_None"} +; CHECK: ![[ANN1]] = metadata !{metadata !"(test0,%x)", metadata !"S_None", metadata !"S_Retain"} +; CHECK: ![[ANN2]] = metadata !{metadata !"(test0,%x)", metadata !"S_Release", metadata !"S_Use"} +; CHECK: ![[ANN3]] = metadata !{metadata !"(test0,%x)", metadata !"S_None", metadata !"S_Release"} +; CHECK: ![[ANN4]] = metadata !{metadata !"(test0,%x)", metadata !"S_Retain", metadata !"S_None"} + diff --git a/test/Transforms/ObjCARC/basic.ll b/test/Transforms/ObjCARC/basic.ll index 4c24ebf..ca12792 100644 --- a/test/Transforms/ObjCARC/basic.ll +++ b/test/Transforms/ObjCARC/basic.ll @@ -20,6 +20,7 @@ declare void @callee() declare void @callee_fnptr(void ()*) declare void @invokee() declare i8* @returner() +declare void @bar(i32 ()*) declare void @llvm.dbg.value(metadata, i64, metadata) @@ -28,10 +29,11 @@ declare i8* @objc_msgSend(i8*, i8*, ...) ; Simple retain+release pair deletion, with some intervening control ; flow and harmless instructions. -; CHECK: define void @test0( -; CHECK-NOT: @objc_ +; CHECK: define void @test0_precise(i32* %x, i1 %p) [[NUW:#[0-9]+]] { +; CHECK: @objc_retain +; CHECK: @objc_release ; CHECK: } -define void @test0(i32* %x, i1 %p) nounwind { +define void @test0_precise(i32* %x, i1 %p) nounwind { entry: %a = bitcast i32* %x to i8* %0 = call i8* @objc_retain(i8* %a) nounwind @@ -53,16 +55,41 @@ return: ret void } +; CHECK: define void @test0_imprecise(i32* %x, i1 %p) [[NUW]] { +; CHECK-NOT: @objc_ +; CHECK: } +define void @test0_imprecise(i32* %x, i1 %p) nounwind { +entry: + %a = bitcast i32* %x to i8* + %0 = call i8* @objc_retain(i8* %a) nounwind + br i1 %p, label %t, label %f + +t: + store i8 3, i8* %a + %b = bitcast i32* %x to float* + store float 2.0, float* %b + br label %return + +f: + store i32 7, i32* %x + br label %return + +return: + %c = bitcast i32* %x to i8* + call void @objc_release(i8* %c) nounwind, !clang.imprecise_release !0 + ret void +} + ; Like test0 but the release isn't always executed when the retain is, ; so the optimization is not safe. ; TODO: Make the objc_release's argument be %0. -; CHECK: define void @test1( +; CHECK: define void @test1_precise(i32* %x, i1 %p, i1 %q) [[NUW]] { ; CHECK: @objc_retain(i8* %a) ; CHECK: @objc_release ; CHECK: } -define void @test1(i32* %x, i1 %p, i1 %q) nounwind { +define void @test1_precise(i32* %x, i1 %p, i1 %q) nounwind { entry: %a = bitcast i32* %x to i8* %0 = call i8* @objc_retain(i8* %a) nounwind @@ -88,9 +115,69 @@ alt_return: ret void } +; CHECK: define void @test1_imprecise(i32* %x, i1 %p, i1 %q) [[NUW]] { +; CHECK: @objc_retain(i8* %a) +; CHECK: @objc_release +; CHECK: } +define void @test1_imprecise(i32* %x, i1 %p, i1 %q) nounwind { +entry: + %a = bitcast i32* %x to i8* + %0 = call i8* @objc_retain(i8* %a) nounwind + br i1 %p, label %t, label %f + +t: + store i8 3, i8* %a + %b = bitcast i32* %x to float* + store float 2.0, float* %b + br label %return + +f: + store i32 7, i32* %x + call void @callee() + br i1 %q, label %return, label %alt_return + +return: + %c = bitcast i32* %x to i8* + call void @objc_release(i8* %c) nounwind, !clang.imprecise_release !0 + ret void + +alt_return: + ret void +} + + ; Don't do partial elimination into two different CFG diamonds. -; CHECK: define void @test1b( +; CHECK: define void @test1b_precise(i8* %x, i1 %p, i1 %q) { +; CHECK: entry: +; CHECK: tail call i8* @objc_retain(i8* %x) [[NUW]] +; CHECK-NOT: @objc_ +; CHECK: if.end5: +; CHECK: tail call void @objc_release(i8* %x) [[NUW]] +; CHECK-NOT: @objc_ +; CHECK: } +define void @test1b_precise(i8* %x, i1 %p, i1 %q) { +entry: + tail call i8* @objc_retain(i8* %x) nounwind + br i1 %p, label %if.then, label %if.end + +if.then: ; preds = %entry + tail call void @callee() + br label %if.end + +if.end: ; preds = %if.then, %entry + br i1 %q, label %if.then3, label %if.end5 + +if.then3: ; preds = %if.end + tail call void @use_pointer(i8* %x) + br label %if.end5 + +if.end5: ; preds = %if.then3, %if.end + tail call void @objc_release(i8* %x) nounwind + ret void +} + +; CHECK: define void @test1b_imprecise( ; CHECK: entry: ; CHECK: tail call i8* @objc_retain(i8* %x) [[NUW:#[0-9]+]] ; CHECK-NOT: @objc_ @@ -98,7 +185,7 @@ alt_return: ; CHECK: tail call void @objc_release(i8* %x) [[NUW]], !clang.imprecise_release !0 ; CHECK-NOT: @objc_ ; CHECK: } -define void @test1b(i8* %x, i1 %p, i1 %q) { +define void @test1b_imprecise(i8* %x, i1 %p, i1 %q) { entry: tail call i8* @objc_retain(i8* %x) nounwind br i1 %p, label %if.then, label %if.end @@ -119,14 +206,15 @@ if.end5: ; preds = %if.then3, %if.end ret void } + ; Like test0 but the pointer is passed to an intervening call, ; so the optimization is not safe. -; CHECK: define void @test2( +; CHECK: define void @test2_precise( ; CHECK: @objc_retain(i8* %a) ; CHECK: @objc_release ; CHECK: } -define void @test2(i32* %x, i1 %p) nounwind { +define void @test2_precise(i32* %x, i1 %p) nounwind { entry: %a = bitcast i32* %x to i8* %0 = call i8* @objc_retain(i8* %a) nounwind @@ -151,16 +239,45 @@ return: ret void } +; CHECK: define void @test2_imprecise( +; CHECK: @objc_retain(i8* %a) +; CHECK: @objc_release +; CHECK: } +define void @test2_imprecise(i32* %x, i1 %p) nounwind { +entry: + %a = bitcast i32* %x to i8* + %0 = call i8* @objc_retain(i8* %a) nounwind + br i1 %p, label %t, label %f + +t: + store i8 3, i8* %a + %b = bitcast i32* %x to float* + store float 2.0, float* %b + br label %return + +f: + store i32 7, i32* %x + call void @use_pointer(i8* %0) + %d = bitcast i32* %x to float* + store float 3.0, float* %d + br label %return + +return: + %c = bitcast i32* %x to i8* + call void @objc_release(i8* %c) nounwind, !clang.imprecise_release !0 + ret void +} + ; Like test0 but the release is in a loop, ; so the optimization is not safe. ; TODO: For now, assume this can't happen. -; CHECK: define void @test3( +; CHECK: define void @test3_precise( ; TODO: @objc_retain(i8* %a) ; TODO: @objc_release ; CHECK: } -define void @test3(i32* %x, i1* %q) nounwind { +define void @test3_precise(i32* %x, i1* %q) nounwind { entry: %a = bitcast i32* %x to i8* %0 = call i8* @objc_retain(i8* %a) nounwind @@ -176,16 +293,37 @@ return: ret void } +; CHECK: define void @test3_imprecise( +; TODO: @objc_retain(i8* %a) +; TODO: @objc_release +; CHECK: } +define void @test3_imprecise(i32* %x, i1* %q) nounwind { +entry: + %a = bitcast i32* %x to i8* + %0 = call i8* @objc_retain(i8* %a) nounwind + br label %loop + +loop: + %c = bitcast i32* %x to i8* + call void @objc_release(i8* %c) nounwind, !clang.imprecise_release !0 + %j = load volatile i1* %q + br i1 %j, label %loop, label %return + +return: + ret void +} + + ; TODO: For now, assume this can't happen. ; Like test0 but the retain is in a loop, ; so the optimization is not safe. -; CHECK: define void @test4( +; CHECK: define void @test4_precise( ; TODO: @objc_retain(i8* %a) ; TODO: @objc_release ; CHECK: } -define void @test4(i32* %x, i1* %q) nounwind { +define void @test4_precise(i32* %x, i1* %q) nounwind { entry: br label %loop @@ -201,14 +339,35 @@ return: ret void } +; CHECK: define void @test4_imprecise( +; TODO: @objc_retain(i8* %a) +; TODO: @objc_release +; CHECK: } +define void @test4_imprecise(i32* %x, i1* %q) nounwind { +entry: + br label %loop + +loop: + %a = bitcast i32* %x to i8* + %0 = call i8* @objc_retain(i8* %a) nounwind + %j = load volatile i1* %q + br i1 %j, label %loop, label %return + +return: + %c = bitcast i32* %x to i8* + call void @objc_release(i8* %c) nounwind, !clang.imprecise_release !0 + ret void +} + + ; Like test0 but the pointer is conditionally passed to an intervening call, ; so the optimization is not safe. -; CHECK: define void @test5( +; CHECK: define void @test5a( ; CHECK: @objc_retain(i8* ; CHECK: @objc_release ; CHECK: } -define void @test5(i32* %x, i1 %q, i8* %y) nounwind { +define void @test5a(i32* %x, i1 %q, i8* %y) nounwind { entry: %a = bitcast i32* %x to i8* %0 = call i8* @objc_retain(i8* %a) nounwind @@ -220,13 +379,98 @@ entry: ret void } +; CHECK: define void @test5b( +; CHECK: @objc_retain(i8* +; CHECK: @objc_release +; CHECK: } +define void @test5b(i32* %x, i1 %q, i8* %y) nounwind { +entry: + %a = bitcast i32* %x to i8* + %0 = call i8* @objc_retain(i8* %a) nounwind + %s = select i1 %q, i8* %y, i8* %0 + call void @use_pointer(i8* %s) + store i32 7, i32* %x + %c = bitcast i32* %x to i8* + call void @objc_release(i8* %c) nounwind, !clang.imprecise_release !0 + ret void +} + + ; retain+release pair deletion, where the release happens on two different ; flow paths. -; CHECK: define void @test6( +; CHECK: define void @test6a( +; CHECK: entry: +; CHECK: tail call i8* @objc_retain( +; CHECK: t: +; CHECK: call void @objc_release( +; CHECK: f: +; CHECK: call void @objc_release( +; CHECK: return: +; CHECK: } +define void @test6a(i32* %x, i1 %p) nounwind { +entry: + %a = bitcast i32* %x to i8* + %0 = call i8* @objc_retain(i8* %a) nounwind + br i1 %p, label %t, label %f + +t: + store i8 3, i8* %a + %b = bitcast i32* %x to float* + store float 2.0, float* %b + %ct = bitcast i32* %x to i8* + call void @objc_release(i8* %ct) nounwind + br label %return + +f: + store i32 7, i32* %x + call void @callee() + %cf = bitcast i32* %x to i8* + call void @objc_release(i8* %cf) nounwind + br label %return + +return: + ret void +} + +; CHECK: define void @test6b( ; CHECK-NOT: @objc_ ; CHECK: } -define void @test6(i32* %x, i1 %p) nounwind { +define void @test6b(i32* %x, i1 %p) nounwind { +entry: + %a = bitcast i32* %x to i8* + %0 = call i8* @objc_retain(i8* %a) nounwind + br i1 %p, label %t, label %f + +t: + store i8 3, i8* %a + %b = bitcast i32* %x to float* + store float 2.0, float* %b + %ct = bitcast i32* %x to i8* + call void @objc_release(i8* %ct) nounwind, !clang.imprecise_release !0 + br label %return + +f: + store i32 7, i32* %x + call void @callee() + %cf = bitcast i32* %x to i8* + call void @objc_release(i8* %cf) nounwind, !clang.imprecise_release !0 + br label %return + +return: + ret void +} + +; CHECK: define void @test6c( +; CHECK: entry: +; CHECK: tail call i8* @objc_retain( +; CHECK: t: +; CHECK: call void @objc_release( +; CHECK: f: +; CHECK: call void @objc_release( +; CHECK: return: +; CHECK: } +define void @test6c(i32* %x, i1 %p) nounwind { entry: %a = bitcast i32* %x to i8* %0 = call i8* @objc_retain(i8* %a) nounwind @@ -244,6 +488,40 @@ f: store i32 7, i32* %x call void @callee() %cf = bitcast i32* %x to i8* + call void @objc_release(i8* %cf) nounwind, !clang.imprecise_release !0 + br label %return + +return: + ret void +} + +; CHECK: define void @test6d( +; CHECK: entry: +; CHECK: tail call i8* @objc_retain( +; CHECK: t: +; CHECK: call void @objc_release( +; CHECK: f: +; CHECK: call void @objc_release( +; CHECK: return: +; CHECK: } +define void @test6d(i32* %x, i1 %p) nounwind { +entry: + %a = bitcast i32* %x to i8* + %0 = call i8* @objc_retain(i8* %a) nounwind + br i1 %p, label %t, label %f + +t: + store i8 3, i8* %a + %b = bitcast i32* %x to float* + store float 2.0, float* %b + %ct = bitcast i32* %x to i8* + call void @objc_release(i8* %ct) nounwind, !clang.imprecise_release !0 + br label %return + +f: + store i32 7, i32* %x + call void @callee() + %cf = bitcast i32* %x to i8* call void @objc_release(i8* %cf) nounwind br label %return @@ -251,11 +529,19 @@ return: ret void } + ; retain+release pair deletion, where the retain happens on two different ; flow paths. -; CHECK: define void @test7( -; CHECK-NOT: @objc_ +; CHECK: define void @test7( +; CHECK: entry: +; CHECK-NOT: objc_ +; CHECK: t: +; CHECK: call i8* @objc_retain +; CHECK: f: +; CHECK: call i8* @objc_retain +; CHECK: return: +; CHECK: call void @objc_release ; CHECK: } define void @test7(i32* %x, i1 %p) nounwind { entry: @@ -281,17 +567,44 @@ return: ret void } +; CHECK: define void @test7b( +; CHECK-NOT: @objc_ +; CHECK: } +define void @test7b(i32* %x, i1 %p) nounwind { +entry: + %a = bitcast i32* %x to i8* + br i1 %p, label %t, label %f + +t: + %0 = call i8* @objc_retain(i8* %a) nounwind + store i8 3, i8* %a + %b = bitcast i32* %x to float* + store float 2.0, float* %b + br label %return + +f: + %1 = call i8* @objc_retain(i8* %a) nounwind + store i32 7, i32* %x + call void @callee() + br label %return + +return: + %c = bitcast i32* %x to i8* + call void @objc_release(i8* %c) nounwind, !clang.imprecise_release !0 + ret void +} + ; Like test7, but there's a retain/retainBlock mismatch. Don't delete! -; CHECK: define void @test7b +; CHECK: define void @test7c ; CHECK: t: -; CHECK: call i8* @objc_retainBlock +; CHECK: call i8* @objc_retainBlock ; CHECK: f: -; CHECK: call i8* @objc_retain +; CHECK: call i8* @objc_retain ; CHECK: return: -; CHECK: call void @objc_release +; CHECK: call void @objc_release ; CHECK: } -define void @test7b(i32* %x, i1 %p) nounwind { +define void @test7c(i32* %x, i1 %p) nounwind { entry: %a = bitcast i32* %x to i8* br i1 %p, label %t, label %f @@ -318,10 +631,106 @@ return: ; retain+release pair deletion, where the retain and release both happen on ; different flow paths. Wild! -; CHECK: define void @test8( +; CHECK: define void @test8a( +; CHECK: entry: +; CHECK: t: +; CHECK: @objc_retain +; CHECK: f: +; CHECK: @objc_retain +; CHECK: mid: +; CHECK: u: +; CHECK: @objc_release +; CHECK: g: +; CHECK: @objc_release +; CHECK: return: +; CHECK: } +define void @test8a(i32* %x, i1 %p, i1 %q) nounwind { +entry: + %a = bitcast i32* %x to i8* + br i1 %p, label %t, label %f + +t: + %0 = call i8* @objc_retain(i8* %a) nounwind + store i8 3, i8* %a + %b = bitcast i32* %x to float* + store float 2.0, float* %b + br label %mid + +f: + %1 = call i8* @objc_retain(i8* %a) nounwind + store i32 7, i32* %x + br label %mid + +mid: + br i1 %q, label %u, label %g + +u: + call void @callee() + %cu = bitcast i32* %x to i8* + call void @objc_release(i8* %cu) nounwind + br label %return + +g: + %cg = bitcast i32* %x to i8* + call void @objc_release(i8* %cg) nounwind + br label %return + +return: + ret void +} + +; CHECK: define void @test8b( ; CHECK-NOT: @objc_ ; CHECK: } -define void @test8(i32* %x, i1 %p, i1 %q) nounwind { +define void @test8b(i32* %x, i1 %p, i1 %q) nounwind { +entry: + %a = bitcast i32* %x to i8* + br i1 %p, label %t, label %f + +t: + %0 = call i8* @objc_retain(i8* %a) nounwind + store i8 3, i8* %a + %b = bitcast i32* %x to float* + store float 2.0, float* %b + br label %mid + +f: + %1 = call i8* @objc_retain(i8* %a) nounwind + store i32 7, i32* %x + br label %mid + +mid: + br i1 %q, label %u, label %g + +u: + call void @callee() + %cu = bitcast i32* %x to i8* + call void @objc_release(i8* %cu) nounwind, !clang.imprecise_release !0 + br label %return + +g: + %cg = bitcast i32* %x to i8* + call void @objc_release(i8* %cg) nounwind, !clang.imprecise_release !0 + br label %return + +return: + ret void +} + +; CHECK: define void @test8c( +; CHECK: entry: +; CHECK: t: +; CHECK: @objc_retain +; CHECK: f: +; CHECK: @objc_retain +; CHECK: mid: +; CHECK: u: +; CHECK: @objc_release +; CHECK: g: +; CHECK: @objc_release +; CHECK: return: +; CHECK: } +define void @test8c(i32* %x, i1 %p, i1 %q) nounwind { entry: %a = bitcast i32* %x to i8* br i1 %p, label %t, label %f @@ -349,6 +758,54 @@ u: g: %cg = bitcast i32* %x to i8* + call void @objc_release(i8* %cg) nounwind, !clang.imprecise_release !0 + br label %return + +return: + ret void +} + +; CHECK: define void @test8d( +; CHECK: entry: +; CHECK: t: +; CHECK: @objc_retain +; CHECK: f: +; CHECK: @objc_retain +; CHECK: mid: +; CHECK: u: +; CHECK: @objc_release +; CHECK: g: +; CHECK: @objc_release +; CHECK: return: +; CHECK: } +define void @test8d(i32* %x, i1 %p, i1 %q) nounwind { +entry: + %a = bitcast i32* %x to i8* + br i1 %p, label %t, label %f + +t: + %0 = call i8* @objc_retain(i8* %a) nounwind + store i8 3, i8* %a + %b = bitcast i32* %x to float* + store float 2.0, float* %b + br label %mid + +f: + %1 = call i8* @objc_retain(i8* %a) nounwind + store i32 7, i32* %x + br label %mid + +mid: + br i1 %q, label %u, label %g + +u: + call void @callee() + %cu = bitcast i32* %x to i8* + call void @objc_release(i8* %cu) nounwind, !clang.imprecise_release !0 + br label %return + +g: + %cg = bitcast i32* %x to i8* call void @objc_release(i8* %cg) nounwind br label %return @@ -428,11 +885,13 @@ entry: ret void } -; Same as test11 but the value is returned. Do an RV optimization. +; Same as test11 but the value is returned. Do not perform an RV optimization +; since if the frontend emitted code for an __autoreleasing variable, we may +; want it to be in the autorelease pool. ; CHECK: define i8* @test11b( ; CHECK: tail call i8* @objc_retain(i8* %x) [[NUW]] -; CHECK: tail call i8* @objc_autoreleaseReturnValue(i8* %0) [[NUW]] +; CHECK: call i8* @objc_autorelease(i8* %0) [[NUW]] ; CHECK: } define i8* @test11b(i8* %x) nounwind { entry: @@ -484,6 +943,7 @@ entry: ; CHECK-NEXT: @use_pointer ; CHECK-NEXT: @use_pointer ; CHECK-NEXT: ret void +; CHECK-NEXT: } define void @test13b(i8* %x, i64 %n) { entry: call i8* @objc_retain(i8* %x) nounwind @@ -525,6 +985,7 @@ entry: ; CHECK-NEXT: @use_pointer ; CHECK-NEXT: @use_pointer ; CHECK-NEXT: ret void +; CHECK-NEXT: } define void @test13d(i8* %x, i64 %n) { entry: call i8* @objc_retain(i8* %x) nounwind @@ -581,7 +1042,9 @@ entry: ; CHECK: define void @test15b ; CHECK-NEXT: entry: +; CHECK-NEXT: @objc_retain ; CHECK-NEXT: @objc_autorelease +; CHECK-NEXT: @objc_release ; CHECK-NEXT: ret void ; CHECK-NEXT: } define void @test15b(i8* %x, i64 %n) { @@ -592,13 +1055,60 @@ entry: ret void } +; CHECK: define void @test15c +; CHECK-NEXT: entry: +; CHECK-NEXT: @objc_autorelease +; CHECK-NEXT: ret void +; CHECK-NEXT: } +define void @test15c(i8* %x, i64 %n) { +entry: + call i8* @objc_retain(i8* %x) nounwind + call i8* @objc_autorelease(i8* %x) nounwind + call void @objc_release(i8* %x) nounwind, !clang.imprecise_release !0 + ret void +} + ; Retain+release pairs in diamonds, all dominated by a retain. -; CHECK: define void @test16( +; CHECK: define void @test16a( +; CHECK: @objc_retain(i8* %x) +; CHECK-NOT: @objc +; CHECK: } +define void @test16a(i1 %a, i1 %b, i8* %x) { +entry: + call i8* @objc_retain(i8* %x) nounwind + br i1 %a, label %red, label %orange + +red: + call i8* @objc_retain(i8* %x) nounwind + br label %yellow + +orange: + call i8* @objc_retain(i8* %x) nounwind + br label %yellow + +yellow: + call void @use_pointer(i8* %x) + call void @use_pointer(i8* %x) + br i1 %b, label %green, label %blue + +green: + call void @objc_release(i8* %x) nounwind + br label %purple + +blue: + call void @objc_release(i8* %x) nounwind + br label %purple + +purple: + ret void +} + +; CHECK: define void @test16b( ; CHECK: @objc_retain(i8* %x) ; CHECK-NOT: @objc ; CHECK: } -define void @test16(i1 %a, i1 %b, i8* %x) { +define void @test16b(i1 %a, i1 %b, i8* %x) { entry: call i8* @objc_retain(i8* %x) nounwind br i1 %a, label %red, label %orange @@ -617,17 +1127,86 @@ yellow: br i1 %b, label %green, label %blue green: + call void @objc_release(i8* %x) nounwind, !clang.imprecise_release !0 + br label %purple + +blue: call void @objc_release(i8* %x) nounwind br label %purple +purple: + ret void +} + +; CHECK: define void @test16c( +; CHECK: @objc_retain(i8* %x) +; CHECK-NOT: @objc +; CHECK: } +define void @test16c(i1 %a, i1 %b, i8* %x) { +entry: + call i8* @objc_retain(i8* %x) nounwind + br i1 %a, label %red, label %orange + +red: + call i8* @objc_retain(i8* %x) nounwind + br label %yellow + +orange: + call i8* @objc_retain(i8* %x) nounwind + br label %yellow + +yellow: + call void @use_pointer(i8* %x) + call void @use_pointer(i8* %x) + br i1 %b, label %green, label %blue + +green: + call void @objc_release(i8* %x) nounwind, !clang.imprecise_release !0 + br label %purple + blue: + call void @objc_release(i8* %x) nounwind, !clang.imprecise_release !0 + br label %purple + +purple: + ret void +} + +; CHECK: define void @test16d( +; CHECK: @objc_retain(i8* %x) +; CHECK-NOT: @objc +; CHECK: } +define void @test16d(i1 %a, i1 %b, i8* %x) { +entry: + call i8* @objc_retain(i8* %x) nounwind + br i1 %a, label %red, label %orange + +red: + call i8* @objc_retain(i8* %x) nounwind + br label %yellow + +orange: + call i8* @objc_retain(i8* %x) nounwind + br label %yellow + +yellow: + call void @use_pointer(i8* %x) + call void @use_pointer(i8* %x) + br i1 %b, label %green, label %blue + +green: call void @objc_release(i8* %x) nounwind br label %purple +blue: + call void @objc_release(i8* %x) nounwind, !clang.imprecise_release !0 + br label %purple + purple: ret void } + ; Retain+release pairs in diamonds, all post-dominated by a release. ; CHECK: define void @test17( @@ -718,6 +1297,7 @@ entry: ; CHECK: define void @test20( ; CHECK: %tmp1 = tail call i8* @objc_retain(i8* %tmp) [[NUW]] ; CHECK-NEXT: invoke +; CHECK: } define void @test20(double* %self) { if.then12: %tmp = bitcast double* %self to i8* @@ -745,6 +1325,7 @@ if.end: ; preds = %invoke.cont23 ; CHECK: define i8* @test21( ; CHECK: call i8* @returner() ; CHECK-NEXT: ret i8* %call +; CHECK-NEXT: } define i8* @test21() { entry: %call = call i8* @returner() @@ -795,10 +1376,10 @@ entry: ret void } -; Don't optimize objc_retainBlock. +; Don't optimize objc_retainBlock, but do strength reduce it. -; CHECK: define void @test23b -; CHECK: @objc_retainBlock +; CHECK: define void @test23b(i8* %p) { +; CHECK: @objc_retain ; CHECK: @objc_release ; CHECK: } define void @test23b(i8* %p) { @@ -1161,12 +1742,16 @@ done: ret void } -; Delete retain,release if there's just a possible dec. +; Delete retain,release if there's just a possible dec and we have imprecise +; releases. -; CHECK: define void @test34( -; CHECK-NOT: @objc_ +; CHECK: define void @test34a( +; CHECK: call i8* @objc_retain +; CHECK: true: +; CHECK: done: +; CHECK: call void @objc_release ; CHECK: } -define void @test34(i8* %p, i1 %x, i8* %y) { +define void @test34a(i8* %p, i1 %x, i8* %y) { entry: %f0 = call i8* @objc_retain(i8* %p) br i1 %x, label %true, label %done @@ -1182,12 +1767,38 @@ done: ret void } -; Delete retain,release if there's just a use. - -; CHECK: define void @test35( +; CHECK: define void @test34b( ; CHECK-NOT: @objc_ ; CHECK: } -define void @test35(i8* %p, i1 %x, i8* %y) { +define void @test34b(i8* %p, i1 %x, i8* %y) { +entry: + %f0 = call i8* @objc_retain(i8* %p) + br i1 %x, label %true, label %done + +true: + call void @callee() + br label %done + +done: + %g = bitcast i8* %p to i8* + %h = getelementptr i8* %g, i64 0 + call void @objc_release(i8* %g), !clang.imprecise_release !0 + ret void +} + + +; Delete retain,release if there's just a use and we do not have a precise +; release. + +; Precise. +; CHECK: define void @test35a( +; CHECK: entry: +; CHECK: call i8* @objc_retain +; CHECK: true: +; CHECK: done: +; CHECK: call void @objc_release +; CHECK: } +define void @test35a(i8* %p, i1 %x, i8* %y) { entry: %f0 = call i8* @objc_retain(i8* %p) br i1 %x, label %true, label %done @@ -1203,16 +1814,36 @@ done: ret void } -; Delete a retain,release if there's no actual use. - -; CHECK: define void @test36( +; Imprecise. +; CHECK: define void @test35b( ; CHECK-NOT: @objc_ +; CHECK: } +define void @test35b(i8* %p, i1 %x, i8* %y) { +entry: + %f0 = call i8* @objc_retain(i8* %p) + br i1 %x, label %true, label %done + +true: + %v = icmp eq i8* %p, %y + br label %done + +done: + %g = bitcast i8* %p to i8* + %h = getelementptr i8* %g, i64 0 + call void @objc_release(i8* %g), !clang.imprecise_release !0 + ret void +} + +; Delete a retain,release if there's no actual use and we have precise release. + +; CHECK: define void @test36a( +; CHECK: @objc_retain ; CHECK: call void @callee() ; CHECK-NOT: @objc_ ; CHECK: call void @callee() -; CHECK-NOT: @objc_ +; CHECK: @objc_release ; CHECK: } -define void @test36(i8* %p) { +define void @test36a(i8* %p) { entry: call i8* @objc_retain(i8* %p) call void @callee() @@ -1223,10 +1854,10 @@ entry: ; Like test36, but with metadata. -; CHECK: define void @test37( +; CHECK: define void @test36b( ; CHECK-NOT: @objc_ ; CHECK: } -define void @test37(i8* %p) { +define void @test36b(i8* %p) { entry: call i8* @objc_retain(i8* %p) call void @callee() @@ -1437,6 +2068,7 @@ define void @test44(i8** %pp) { ; CHECK: call void @objc_release(i8* %q) ; CHECK: call void @use_pointer(i8* %p) ; CHECK: call void @objc_release(i8* %p) +; CHECK: } define void @test45(i8** %pp, i8** %qq) { %p = load i8** %pp %q = load i8** %qq @@ -1453,6 +2085,7 @@ define void @test45(i8** %pp, i8** %qq) { ; CHECK: tail call i8* @objc_retain(i8* %p) [[NUW]] ; CHECK: true: ; CHECK: call i8* @objc_autorelease(i8* %p) [[NUW]] +; CHECK: } define void @test46(i8* %p, i1 %a) { entry: call i8* @objc_retain(i8* %p) @@ -1472,6 +2105,7 @@ false: ; CHECK: define i8* @test47( ; CHECK-NOT: call ; CHECK: ret i8* %p +; CHECK: } define i8* @test47(i8* %p) nounwind { %x = call i8* @objc_retainedObject(i8* %p) ret i8* %x @@ -1482,6 +2116,7 @@ define i8* @test47(i8* %p) nounwind { ; CHECK: define i8* @test48( ; CHECK-NOT: call ; CHECK: ret i8* %p +; CHECK: } define i8* @test48(i8* %p) nounwind { %x = call i8* @objc_unretainedObject(i8* %p) ret i8* %x @@ -1492,32 +2127,51 @@ define i8* @test48(i8* %p) nounwind { ; CHECK: define i8* @test49( ; CHECK-NOT: call ; CHECK: ret i8* %p +; CHECK: } define i8* @test49(i8* %p) nounwind { %x = call i8* @objc_unretainedPointer(i8* %p) ret i8* %x } -; Do delete retain+release with intervening stores of the -; address value. +; Do delete retain+release with intervening stores of the address value if we +; have imprecise release attached to objc_release. -; CHECK: define void @test50( +; CHECK: define void @test50a( +; CHECK-NEXT: call i8* @objc_retain +; CHECK-NEXT: call void @callee +; CHECK-NEXT: store +; CHECK-NEXT: call void @objc_release +; CHECK-NEXT: ret void +; CHECK-NEXT: } +define void @test50a(i8* %p, i8** %pp) { + call i8* @objc_retain(i8* %p) + call void @callee() + store i8* %p, i8** %pp + call void @objc_release(i8* %p) + ret void +} + +; CHECK: define void @test50b( ; CHECK-NOT: @objc_ ; CHECK: } -define void @test50(i8* %p, i8** %pp) { +define void @test50b(i8* %p, i8** %pp) { call i8* @objc_retain(i8* %p) call void @callee() store i8* %p, i8** %pp - call void @objc_release(i8* %p) + call void @objc_release(i8* %p), !clang.imprecise_release !0 ret void } + ; Don't delete retain+release with intervening stores through the ; address value. -; CHECK: define void @test51( +; CHECK: define void @test51a( ; CHECK: call i8* @objc_retain(i8* %p) ; CHECK: call void @objc_release(i8* %p) -define void @test51(i8* %p) { +; CHECK: ret void +; CHECK: } +define void @test51a(i8* %p) { call i8* @objc_retain(i8* %p) call void @callee() store i8 0, i8* %p @@ -1525,15 +2179,30 @@ define void @test51(i8* %p) { ret void } +; CHECK: define void @test51b( +; CHECK: call i8* @objc_retain(i8* %p) +; CHECK: call void @objc_release(i8* %p) +; CHECK: ret void +; CHECK: } +define void @test51b(i8* %p) { + call i8* @objc_retain(i8* %p) + call void @callee() + store i8 0, i8* %p + call void @objc_release(i8* %p), !clang.imprecise_release !0 + ret void +} + ; Don't delete retain+release with intervening use of a pointer of ; unknown provenance. -; CHECK: define void @test52( +; CHECK: define void @test52a( ; CHECK: call i8* @objc_retain ; CHECK: call void @callee() ; CHECK: call void @use_pointer(i8* %z) ; CHECK: call void @objc_release -define void @test52(i8** %zz, i8** %pp) { +; CHECK: ret void +; CHECK: } +define void @test52a(i8** %zz, i8** %pp) { %p = load i8** %pp %1 = call i8* @objc_retain(i8* %p) call void @callee() @@ -1543,6 +2212,23 @@ define void @test52(i8** %zz, i8** %pp) { ret void } +; CHECK: define void @test52b( +; CHECK: call i8* @objc_retain +; CHECK: call void @callee() +; CHECK: call void @use_pointer(i8* %z) +; CHECK: call void @objc_release +; CHECK: ret void +; CHECK: } +define void @test52b(i8** %zz, i8** %pp) { + %p = load i8** %pp + %1 = call i8* @objc_retain(i8* %p) + call void @callee() + %z = load i8** %zz + call void @use_pointer(i8* %z) + call void @objc_release(i8* %p), !clang.imprecise_release !0 + ret void +} + ; Like test52, but the pointer has function type, so it's assumed to ; be not reference counted. ; Oops. That's wrong. Clang sometimes uses function types gratuitously. @@ -1567,6 +2253,7 @@ define void @test53(void ()** %zz, i8** %pp) { ; CHECK: call i8* @returner() ; CHECK-NEXT: call void @objc_release(i8* %t) [[NUW]], !clang.imprecise_release !0 ; CHECK-NEXT: ret void +; CHECK: } define void @test54() { %t = call i8* @returner() call i8* @objc_autorelease(i8* %t) @@ -1695,19 +2382,78 @@ entry: @constptr = external constant i8* @something = external global i8* -; CHECK: define void @test60( -; CHECK-NOT: @objc_ +; We have a precise lifetime retain/release here. We can not remove them since +; @something is not constant. + +; CHECK: define void @test60a( +; CHECK: call i8* @objc_retain +; CHECK: call void @objc_release +; CHECK: } +define void @test60a() { + %t = load i8** @constptr + %s = load i8** @something + call i8* @objc_retain(i8* %s) + call void @callee() + call void @use_pointer(i8* %t) + call void @objc_release(i8* %s) + ret void +} + +; CHECK: define void @test60b( +; CHECK: call i8* @objc_retain +; CHECK-NOT: call i8* @objc_retain +; CHECK-NOT: call i8* @objc_rrelease ; CHECK: } -define void @test60() { +define void @test60b() { %t = load i8** @constptr %s = load i8** @something call i8* @objc_retain(i8* %s) + call i8* @objc_retain(i8* %s) call void @callee() call void @use_pointer(i8* %t) call void @objc_release(i8* %s) ret void } +; CHECK: define void @test60c( +; CHECK-NOT: @objc_ +; CHECK: } +define void @test60c() { + %t = load i8** @constptr + %s = load i8** @something + call i8* @objc_retain(i8* %s) + call void @callee() + call void @use_pointer(i8* %t) + call void @objc_release(i8* %s), !clang.imprecise_release !0 + ret void +} + +; CHECK: define void @test60d( +; CHECK-NOT: @objc_ +; CHECK: } +define void @test60d() { + %t = load i8** @constptr + %s = load i8** @something + call i8* @objc_retain(i8* %t) + call void @callee() + call void @use_pointer(i8* %s) + call void @objc_release(i8* %t) + ret void +} + +; CHECK: define void @test60e( +; CHECK-NOT: @objc_ +; CHECK: } +define void @test60e() { + %t = load i8** @constptr + %s = load i8** @something + call i8* @objc_retain(i8* %t) + call void @callee() + call void @use_pointer(i8* %s) + call void @objc_release(i8* %t), !clang.imprecise_release !0 + ret void +} + ; Constant pointers to objects don't need to be considered related to other ; pointers. @@ -1874,11 +2620,13 @@ return: ; preds = %if.then, %entry ; An objc_retain can serve as a may-use for a different pointer. ; rdar://11931823 -; CHECK: define void @test66( -; CHECK: %tmp7 = tail call i8* @objc_retain(i8* %cond) [[NUW]] +; CHECK: define void @test66a( +; CHECK: tail call i8* @objc_retain(i8* %cond) [[NUW]] +; CHECK: tail call void @objc_release(i8* %call) [[NUW]] +; CHECK: tail call i8* @objc_retain(i8* %tmp8) [[NUW]] ; CHECK: tail call void @objc_release(i8* %cond) [[NUW]] ; CHECK: } -define void @test66(i8* %tmp5, i8* %bar, i1 %tobool, i1 %tobool1, i8* %call) { +define void @test66a(i8* %tmp5, i8* %bar, i1 %tobool, i1 %tobool1, i8* %call) { entry: br i1 %tobool, label %cond.true, label %cond.end @@ -1895,7 +2643,74 @@ cond.end: ; preds = %cond.true, %entry ret void } -declare void @bar(i32 ()*) +; CHECK: define void @test66b( +; CHECK: tail call i8* @objc_retain(i8* %cond) [[NUW]] +; CHECK: tail call void @objc_release(i8* %call) [[NUW]] +; CHECK: tail call i8* @objc_retain(i8* %tmp8) [[NUW]] +; CHECK: tail call void @objc_release(i8* %cond) [[NUW]] +; CHECK: } +define void @test66b(i8* %tmp5, i8* %bar, i1 %tobool, i1 %tobool1, i8* %call) { +entry: + br i1 %tobool, label %cond.true, label %cond.end + +cond.true: + br label %cond.end + +cond.end: ; preds = %cond.true, %entry + %cond = phi i8* [ %tmp5, %cond.true ], [ %call, %entry ] + %tmp7 = tail call i8* @objc_retain(i8* %cond) nounwind + tail call void @objc_release(i8* %call) nounwind, !clang.imprecise_release !0 + %tmp8 = select i1 %tobool1, i8* %cond, i8* %bar + %tmp9 = tail call i8* @objc_retain(i8* %tmp8) nounwind + tail call void @objc_release(i8* %cond) nounwind + ret void +} + +; CHECK: define void @test66c( +; CHECK: tail call i8* @objc_retain(i8* %cond) [[NUW]] +; CHECK: tail call void @objc_release(i8* %call) [[NUW]] +; CHECK: tail call i8* @objc_retain(i8* %tmp8) [[NUW]] +; CHECK: tail call void @objc_release(i8* %cond) [[NUW]] +; CHECK: } +define void @test66c(i8* %tmp5, i8* %bar, i1 %tobool, i1 %tobool1, i8* %call) { +entry: + br i1 %tobool, label %cond.true, label %cond.end + +cond.true: + br label %cond.end + +cond.end: ; preds = %cond.true, %entry + %cond = phi i8* [ %tmp5, %cond.true ], [ %call, %entry ] + %tmp7 = tail call i8* @objc_retain(i8* %cond) nounwind + tail call void @objc_release(i8* %call) nounwind + %tmp8 = select i1 %tobool1, i8* %cond, i8* %bar + %tmp9 = tail call i8* @objc_retain(i8* %tmp8) nounwind, !clang.imprecise_release !0 + tail call void @objc_release(i8* %cond) nounwind + ret void +} + +; CHECK: define void @test66d( +; CHECK: tail call i8* @objc_retain(i8* %cond) [[NUW]] +; CHECK: tail call void @objc_release(i8* %call) [[NUW]] +; CHECK: tail call i8* @objc_retain(i8* %tmp8) [[NUW]] +; CHECK: tail call void @objc_release(i8* %cond) [[NUW]] +; CHECK: } +define void @test66d(i8* %tmp5, i8* %bar, i1 %tobool, i1 %tobool1, i8* %call) { +entry: + br i1 %tobool, label %cond.true, label %cond.end + +cond.true: + br label %cond.end + +cond.end: ; preds = %cond.true, %entry + %cond = phi i8* [ %tmp5, %cond.true ], [ %call, %entry ] + %tmp7 = tail call i8* @objc_retain(i8* %cond) nounwind + tail call void @objc_release(i8* %call) nounwind, !clang.imprecise_release !0 + %tmp8 = select i1 %tobool1, i8* %cond, i8* %bar + %tmp9 = tail call i8* @objc_retain(i8* %tmp8) nounwind + tail call void @objc_release(i8* %cond) nounwind, !clang.imprecise_release !0 + ret void +} ; A few real-world testcases. @@ -1905,7 +2720,7 @@ declare i32 @printf(i8* nocapture, ...) nounwind declare i32 @puts(i8* nocapture) nounwind @str = internal constant [16 x i8] c"-[ Top0 _getX ]\00" -; CHECK: @"\01-[A z]" +; CHECK: define { <2 x float>, <2 x float> } @"\01-[A z]"({}* %self, i8* nocapture %_cmd) [[NUW]] { ; CHECK-NOT: @objc_ ; CHECK: } @@ -1951,7 +2766,7 @@ invoke.cont: ret {<2 x float>, <2 x float>} %tmp35 } -; CHECK: @"\01-[Top0 _getX]" +; CHECK: @"\01-[Top0 _getX]"({}* %self, i8* nocapture %_cmd) [[NUW]] { ; CHECK-NOT: @objc_ ; CHECK: } @@ -1970,12 +2785,13 @@ invoke.cont: ; A simple loop. Eliminate the retain and release inside of it! -; CHECK: define void @loop +; CHECK: define void @loop(i8* %x, i64 %n) { ; CHECK: for.body: ; CHECK-NOT: @objc_ ; CHECK: @objc_msgSend ; CHECK-NOT: @objc_ ; CHECK: for.end: +; CHECK: } define void @loop(i8* %x, i64 %n) { entry: %0 = tail call i8* @objc_retain(i8* %x) nounwind @@ -1999,7 +2815,7 @@ for.end: ; preds = %for.body, %entry ; ObjCARCOpt can delete the retain,release on self. -; CHECK: define void @TextEditTest +; CHECK: define void @TextEditTest(%2* %self, %3* %pboard) { ; CHECK-NOT: call i8* @objc_retain(i8* %tmp7) ; CHECK: } diff --git a/test/Transforms/ObjCARC/cfg-hazards.ll b/test/Transforms/ObjCARC/cfg-hazards.ll index 899298b..0156d5b 100644 --- a/test/Transforms/ObjCARC/cfg-hazards.ll +++ b/test/Transforms/ObjCARC/cfg-hazards.ll @@ -8,6 +8,7 @@ declare void @use_pointer(i8*) declare i8* @objc_retain(i8*) declare void @objc_release(i8*) declare void @callee() +declare void @block_callee(void ()*) ; CHECK: define void @test0( ; CHECK: call i8* @objc_retain( @@ -394,6 +395,41 @@ exit: ret void } +; Do not improperly pair retains in a for loop with releases outside of a for +; loop when the proper pairing is disguised by a separate provenance represented +; by an alloca. +; rdar://12969722 + +; CHECK: define void @test13(i8* %a) [[NUW]] { +; CHECK: entry: +; CHECK: tail call i8* @objc_retain(i8* %a) [[NUW]] +; CHECK: loop: +; CHECK: tail call i8* @objc_retain(i8* %a) [[NUW]] +; CHECK: call void @block_callee +; CHECK: call void @objc_release(i8* %reloaded_a) [[NUW]] +; CHECK: exit: +; CHECK: call void @objc_release(i8* %a) [[NUW]] +; CHECK: } +define void @test13(i8* %a) nounwind { +entry: + %block = alloca i8* + %a1 = tail call i8* @objc_retain(i8* %a) nounwind + br label %loop + +loop: + %a2 = tail call i8* @objc_retain(i8* %a) nounwind + store i8* %a, i8** %block, align 8 + %casted_block = bitcast i8** %block to void ()* + call void @block_callee(void ()* %casted_block) + %reloaded_a = load i8** %block, align 8 + call void @objc_release(i8* %reloaded_a) nounwind, !clang.imprecise_release !0 + br i1 undef, label %loop, label %exit + +exit: + call void @objc_release(i8* %a) nounwind, !clang.imprecise_release !0 + ret void +} + ; CHECK: attributes [[NUW]] = { nounwind } !0 = metadata !{} diff --git a/test/Transforms/ObjCARC/contract-marker.ll b/test/Transforms/ObjCARC/contract-marker.ll index 01fd1e7..55a1b28 100644 --- a/test/Transforms/ObjCARC/contract-marker.ll +++ b/test/Transforms/ObjCARC/contract-marker.ll @@ -1,9 +1,11 @@ ; RUN: opt -S -objc-arc-contract < %s | FileCheck %s +; CHECK: define void @foo() { ; CHECK: %call = tail call i32* @qux() ; CHECK-NEXT: %tcall = bitcast i32* %call to i8* ; CHECK-NEXT: call void asm sideeffect "mov\09r7, r7\09\09@ marker for objc_retainAutoreleaseReturnValue", ""() ; CHECK-NEXT: %0 = tail call i8* @objc_retainAutoreleasedReturnValue(i8* %tcall) [[NUW:#[0-9]+]] +; CHECK: } define void @foo() { entry: diff --git a/test/Transforms/ObjCARC/contract-storestrong.ll b/test/Transforms/ObjCARC/contract-storestrong.ll index 6999237..023604e 100644 --- a/test/Transforms/ObjCARC/contract-storestrong.ll +++ b/test/Transforms/ObjCARC/contract-storestrong.ll @@ -12,6 +12,7 @@ declare void @use_pointer(i8*) ; CHECK: entry: ; CHECK-NEXT: tail call void @objc_storeStrong(i8** @x, i8* %p) [[NUW:#[0-9]+]] ; CHECK-NEXT: ret void +; CHECK-NEXT: } define void @test0(i8* %p) { entry: %0 = tail call i8* @objc_retain(i8* %p) nounwind @@ -107,6 +108,7 @@ entry: ; CHECK: define i1 @test5(i8* %newValue, i8* %foo) { ; CHECK: %t = icmp eq i8* %x1, %foo ; CHECK: tail call void @objc_storeStrong(i8** @x, i8* %newValue) [[NUW]] +; CHECK: } define i1 @test5(i8* %newValue, i8* %foo) { entry: %x0 = tail call i8* @objc_retain(i8* %newValue) nounwind @@ -122,6 +124,7 @@ entry: ; CHECK: define i1 @test6(i8* %newValue, i8* %foo) { ; CHECK: %t = icmp eq i8* %x1, %foo ; CHECK: tail call void @objc_storeStrong(i8** @x, i8* %newValue) [[NUW]] +; CHECK: } define i1 @test6(i8* %newValue, i8* %foo) { entry: %x0 = tail call i8* @objc_retain(i8* %newValue) nounwind diff --git a/test/Transforms/ObjCARC/contract-testcases.ll b/test/Transforms/ObjCARC/contract-testcases.ll index 85b03be..fc023f8 100644 --- a/test/Transforms/ObjCARC/contract-testcases.ll +++ b/test/Transforms/ObjCARC/contract-testcases.ll @@ -50,6 +50,7 @@ bb6: ; preds = %bb5, %bb4, %bb4, %b ; CHECK: br i1 undef, label %bb7, label %bb7 ; CHECK: bb7: ; CHECK: %tmp8 = phi %0* [ %0, %bb ], [ %0, %bb ] +; CHECK: } define void @test1() { bb: %tmp = tail call %0* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to %0* ()*)() @@ -70,6 +71,7 @@ bb7: ; preds = %bb6, %bb6, %bb5 ; CHECK: invoke.cont: ; preds = %entry ; CHECK-NEXT: call void asm sideeffect "mov\09r7, r7\09\09@ marker for objc_retainAutoreleaseReturnValue", ""() ; CHECK-NEXT: %tmp = tail call i8* @objc_retainAutoreleasedReturnValue(i8* %call) [[NUW:#[0-9]+]] +; CHECK: } define void @_Z6doTestP8NSString() { entry: %call = invoke i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* ()*)() diff --git a/test/Transforms/ObjCARC/contract.ll b/test/Transforms/ObjCARC/contract.ll index b6fba59..3544f88 100644 --- a/test/Transforms/ObjCARC/contract.ll +++ b/test/Transforms/ObjCARC/contract.ll @@ -10,6 +10,7 @@ declare i8* @objc_retainAutoreleasedReturnValue(i8*) declare void @use_pointer(i8*) declare i8* @returner() +declare void @callee() ; CHECK: define void @test0 ; CHECK: call void @use_pointer(i8* %0) @@ -137,6 +138,7 @@ define i8* @test6() { ; CHECK: call void @use_pointer(i8* %1) ; CHECK: tail call i8* @objc_autoreleaseReturnValue(i8* %1) ; CHECK: ret i8* %2 +; CHECK-NEXT: } define i8* @test7(i8* %p) { %1 = tail call i8* @objc_retain(i8* %p) call void @use_pointer(i8* %p) @@ -162,4 +164,69 @@ return: ; preds = %if.then, %entry ret i8* %retval } +; Kill calls to @clang.arc.use(...) +; CHECK: define void @test9( +; CHECK-NOT: clang.arc.use +; CHECK: } +define void @test9(i8* %a, i8* %b) { + call void (...)* @clang.arc.use(i8* %a, i8* %b) nounwind + ret void +} + + +; Turn objc_retain into objc_retainAutoreleasedReturnValue if its operand +; is a return value. + +; CHECK: define void @test10() +; CHECK: tail call i8* @objc_retainAutoreleasedReturnValue(i8* %p) +define void @test10() { + %p = call i8* @returner() + tail call i8* @objc_retain(i8* %p) nounwind + ret void +} + +; Convert objc_retain to objc_retainAutoreleasedReturnValue if its +; argument is a return value. + +; CHECK: define void @test11( +; CHECK-NEXT: %y = call i8* @returner() +; CHECK-NEXT: tail call i8* @objc_retainAutoreleasedReturnValue(i8* %y) [[NUW]] +; CHECK-NEXT: ret void +define void @test11() { + %y = call i8* @returner() + tail call i8* @objc_retain(i8* %y) nounwind + ret void +} + +; Don't convert objc_retain to objc_retainAutoreleasedReturnValue if its +; argument is not a return value. + +; CHECK: define void @test12( +; CHECK-NEXT: tail call i8* @objc_retain(i8* %y) [[NUW]] +; CHECK-NEXT: ret void +; CHECK-NEXT: } +define void @test12(i8* %y) { + tail call i8* @objc_retain(i8* %y) nounwind + ret void +} + +; Don't Convert objc_retain to objc_retainAutoreleasedReturnValue if it +; isn't next to the call providing its return value. + +; CHECK: define void @test13( +; CHECK-NEXT: %y = call i8* @returner() +; CHECK-NEXT: call void @callee() +; CHECK-NEXT: tail call i8* @objc_retain(i8* %y) [[NUW]] +; CHECK-NEXT: ret void +; CHECK-NEXT: } +define void @test13() { + %y = call i8* @returner() + call void @callee() + tail call i8* @objc_retain(i8* %y) nounwind + ret void +} + + +declare void @clang.arc.use(...) nounwind + ; CHECK: attributes [[NUW]] = { nounwind } diff --git a/test/Transforms/ObjCARC/expand.ll b/test/Transforms/ObjCARC/expand.ll index 5388673..fe47ee5 100644 --- a/test/Transforms/ObjCARC/expand.ll +++ b/test/Transforms/ObjCARC/expand.ll @@ -4,25 +4,91 @@ target datalayout = "e-p:64:64:64" declare i8* @objc_retain(i8*) declare i8* @objc_autorelease(i8*) +declare i8* @objc_retainAutoreleasedReturnValue(i8*) +declare i8* @objc_autoreleaseReturnValue(i8*) +declare i8* @objc_retainAutorelease(i8*) +declare i8* @objc_retainAutoreleaseReturnValue(i8*) +declare i8* @objc_retainBlock(i8*) declare void @use_pointer(i8*) -; CHECK: define void @test0 +; CHECK: define void @test_retain(i8* %x) [[NUW:#[0-9]+]] { +; CHECK: call i8* @objc_retain(i8* %x) ; CHECK: call void @use_pointer(i8* %x) ; CHECK: } -define void @test0(i8* %x) nounwind { +define void @test_retain(i8* %x) nounwind { entry: %0 = call i8* @objc_retain(i8* %x) nounwind call void @use_pointer(i8* %0) ret void } -; CHECK: define void @test1 +; CHECK: define void @test_retainAutoreleasedReturnValue(i8* %x) [[NUW]] { +; CHECK: call i8* @objc_retainAutoreleasedReturnValue(i8* %x) ; CHECK: call void @use_pointer(i8* %x) ; CHECK: } -define void @test1(i8* %x) nounwind { +define void @test_retainAutoreleasedReturnValue(i8* %x) nounwind { +entry: + %0 = call i8* @objc_retainAutoreleasedReturnValue(i8* %x) nounwind + call void @use_pointer(i8* %0) + ret void +} + +; CHECK: define void @test_retainAutorelease(i8* %x) [[NUW]] { +; CHECK: call i8* @objc_retainAutorelease(i8* %x) +; CHECK: call void @use_pointer(i8* %x) +; CHECK: } +define void @test_retainAutorelease(i8* %x) nounwind { +entry: + %0 = call i8* @objc_retainAutorelease(i8* %x) nounwind + call void @use_pointer(i8* %0) + ret void +} + +; CHECK: define void @test_retainAutoreleaseReturnValue(i8* %x) [[NUW]] { +; CHECK: call i8* @objc_retainAutoreleaseReturnValue(i8* %x) +; CHECK: call void @use_pointer(i8* %x) +; CHECK: } +define void @test_retainAutoreleaseReturnValue(i8* %x) nounwind { +entry: + %0 = call i8* @objc_retainAutoreleaseReturnValue(i8* %x) nounwind + call void @use_pointer(i8* %0) + ret void +} + +; CHECK: define void @test_autorelease(i8* %x) [[NUW]] { +; CHECK: call i8* @objc_autorelease(i8* %x) +; CHECK: call void @use_pointer(i8* %x) +; CHECK: } +define void @test_autorelease(i8* %x) nounwind { entry: %0 = call i8* @objc_autorelease(i8* %x) nounwind - call void @use_pointer(i8* %x) + call void @use_pointer(i8* %0) + ret void +} + +; CHECK: define void @test_autoreleaseReturnValue(i8* %x) [[NUW]] { +; CHECK: call i8* @objc_autoreleaseReturnValue(i8* %x) +; CHECK: call void @use_pointer(i8* %x) +; CHECK: } +define void @test_autoreleaseReturnValue(i8* %x) nounwind { +entry: + %0 = call i8* @objc_autoreleaseReturnValue(i8* %x) nounwind + call void @use_pointer(i8* %0) + ret void +} + +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +; RetainBlock is not strictly forwarding. Do not touch it. ; +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + +; CHECK: define void @test_retainBlock(i8* %x) [[NUW]] { +; CHECK: call i8* @objc_retainBlock(i8* %x) +; CHECK: call void @use_pointer(i8* %0) +; CHECK: } +define void @test_retainBlock(i8* %x) nounwind { +entry: + %0 = call i8* @objc_retainBlock(i8* %x) nounwind + call void @use_pointer(i8* %0) ret void } diff --git a/test/Transforms/ObjCARC/gvn.ll b/test/Transforms/ObjCARC/gvn.ll index 3648866..a828b54 100644 --- a/test/Transforms/ObjCARC/gvn.ll +++ b/test/Transforms/ObjCARC/gvn.ll @@ -7,11 +7,12 @@ declare i8* @objc_retain(i8*) ; GVN should be able to eliminate this redundant load, with ARC-specific ; alias analysis. -; CHECK: @foo +; CHECK: define i8* @foo(i32 %n) ; CHECK-NEXT: entry: ; CHECK-NEXT: %s = load i8** @x ; CHECK-NOT: load ; CHECK: ret i8* %s +; CHECK-NEXT: } define i8* @foo(i32 %n) nounwind { entry: %s = load i8** @x diff --git a/test/Transforms/ObjCARC/intrinsic-use-isolated.ll b/test/Transforms/ObjCARC/intrinsic-use-isolated.ll new file mode 100644 index 0000000..4215b5c --- /dev/null +++ b/test/Transforms/ObjCARC/intrinsic-use-isolated.ll @@ -0,0 +1,16 @@ +; RUN: opt -objc-arc-contract -S < %s | FileCheck %s + +; This file makes sure that clang.arc.used is removed even if no other ARC +; interesting calls are in the module. + +declare void @clang.arc.use(...) nounwind + +; Kill calls to @clang.arc.use(...) +; CHECK: define void @test0( +; CHECK-NOT: clang.arc.use +; CHECK: } +define void @test0(i8* %a, i8* %b) { + call void (...)* @clang.arc.use(i8* %a, i8* %b) nounwind + ret void +} + diff --git a/test/Transforms/ObjCARC/intrinsic-use.ll b/test/Transforms/ObjCARC/intrinsic-use.ll new file mode 100644 index 0000000..60370c1 --- /dev/null +++ b/test/Transforms/ObjCARC/intrinsic-use.ll @@ -0,0 +1,116 @@ +; RUN: opt -basicaa -objc-arc -S < %s | FileCheck %s + +target datalayout = "e-p:64:64:64" + +declare i8* @objc_retain(i8*) +declare i8* @objc_retainAutorelease(i8*) +declare void @objc_release(i8*) +declare i8* @objc_autorelease(i8*) + +declare void @clang.arc.use(...) + +declare void @test0_helper(i8*, i8**) + +; Ensure that we honor clang.arc.use as a use and don't miscompile +; the reduced test case from <rdar://13195034>. +; +; FIXME: the fact that we re-order retains w.r.t. @clang.arc.use could +; be problematic if we get run twice, e.g. under LTO. +; +; CHECK: define void @test0( +; CHECK: @objc_retain(i8* %x) +; CHECK-NEXT: store i8* %y, i8** %temp0 +; CHECK-NEXT: @objc_retain(i8* %y) +; CHECK-NEXT: call void @test0_helper +; CHECK-NEXT: [[VAL1:%.*]] = load i8** %temp0 +; CHECK-NEXT: call void (...)* @clang.arc.use(i8* %y) +; CHECK-NEXT: @objc_retain(i8* [[VAL1]]) +; CHECK-NEXT: @objc_release(i8* %y) +; CHECK-NEXT: store i8* [[VAL1]], i8** %temp1 +; CHECK-NEXT: call void @test0_helper +; CHECK-NEXT: [[VAL2:%.*]] = load i8** %temp1 +; CHECK-NEXT: call void (...)* @clang.arc.use(i8* [[VAL1]]) +; CHECK-NEXT: @objc_retain(i8* [[VAL2]]) +; CHECK-NEXT: @objc_release(i8* [[VAL1]]) +; CHECK-NEXT: @objc_autorelease(i8* %x) +; CHECK-NEXT: store i8* %x, i8** %out +; CHECK-NEXT: @objc_retain(i8* %x) +; CHECK-NEXT: @objc_release(i8* [[VAL2]]) +; CHECK-NEXT: @objc_release(i8* %x) +; CHECK-NEXT: ret void +; CHECK-NEXT: } +define void @test0(i8** %out, i8* %x, i8* %y) { +entry: + %temp0 = alloca i8*, align 8 + %temp1 = alloca i8*, align 8 + %0 = call i8* @objc_retain(i8* %x) nounwind + %1 = call i8* @objc_retain(i8* %y) nounwind + store i8* %y, i8** %temp0 + call void @test0_helper(i8* %x, i8** %temp0) + %val1 = load i8** %temp0 + %2 = call i8* @objc_retain(i8* %val1) nounwind + call void (...)* @clang.arc.use(i8* %y) nounwind + call void @objc_release(i8* %y) nounwind + store i8* %val1, i8** %temp1 + call void @test0_helper(i8* %x, i8** %temp1) + %val2 = load i8** %temp1 + %3 = call i8* @objc_retain(i8* %val2) nounwind + call void (...)* @clang.arc.use(i8* %val1) nounwind + call void @objc_release(i8* %val1) nounwind + %4 = call i8* @objc_retain(i8* %x) nounwind + %5 = call i8* @objc_autorelease(i8* %x) nounwind + store i8* %x, i8** %out + call void @objc_release(i8* %val2) nounwind + call void @objc_release(i8* %x) nounwind + ret void +} + +; CHECK: define void @test0a( +; CHECK: @objc_retain(i8* %x) +; CHECK-NEXT: store i8* %y, i8** %temp0 +; CHECK-NEXT: @objc_retain(i8* %y) +; CHECK-NEXT: call void @test0_helper +; CHECK-NEXT: [[VAL1:%.*]] = load i8** %temp0 +; CHECK-NEXT: call void (...)* @clang.arc.use(i8* %y) +; CHECK-NEXT: @objc_retain(i8* [[VAL1]]) +; CHECK-NEXT: @objc_release(i8* %y) +; CHECK-NEXT: store i8* [[VAL1]], i8** %temp1 +; CHECK-NEXT: call void @test0_helper +; CHECK-NEXT: [[VAL2:%.*]] = load i8** %temp1 +; CHECK-NEXT: call void (...)* @clang.arc.use(i8* [[VAL1]]) +; CHECK-NEXT: @objc_retain(i8* [[VAL2]]) +; CHECK-NEXT: @objc_release(i8* [[VAL1]]) +; CHECK-NEXT: @objc_autorelease(i8* %x) +; CHECK-NEXT: @objc_release(i8* [[VAL2]]) +; CHECK-NEXT: store i8* %x, i8** %out +; CHECK-NEXT: ret void +; CHECK-NEXT: } +define void @test0a(i8** %out, i8* %x, i8* %y) { +entry: + %temp0 = alloca i8*, align 8 + %temp1 = alloca i8*, align 8 + %0 = call i8* @objc_retain(i8* %x) nounwind + %1 = call i8* @objc_retain(i8* %y) nounwind + store i8* %y, i8** %temp0 + call void @test0_helper(i8* %x, i8** %temp0) + %val1 = load i8** %temp0 + %2 = call i8* @objc_retain(i8* %val1) nounwind + call void (...)* @clang.arc.use(i8* %y) nounwind + call void @objc_release(i8* %y) nounwind, !clang.imprecise_release !0 + store i8* %val1, i8** %temp1 + call void @test0_helper(i8* %x, i8** %temp1) + %val2 = load i8** %temp1 + %3 = call i8* @objc_retain(i8* %val2) nounwind + call void (...)* @clang.arc.use(i8* %val1) nounwind + call void @objc_release(i8* %val1) nounwind, !clang.imprecise_release !0 + %4 = call i8* @objc_retain(i8* %x) nounwind + %5 = call i8* @objc_autorelease(i8* %x) nounwind + store i8* %x, i8** %out + call void @objc_release(i8* %val2) nounwind, !clang.imprecise_release !0 + call void @objc_release(i8* %x) nounwind, !clang.imprecise_release !0 + ret void +} + + +!0 = metadata !{} + diff --git a/test/Transforms/ObjCARC/invoke.ll b/test/Transforms/ObjCARC/invoke.ll index f528b4a..9510f2e 100644 --- a/test/Transforms/ObjCARC/invoke.ll +++ b/test/Transforms/ObjCARC/invoke.ll @@ -17,6 +17,7 @@ declare i8* @returner() ; CHECK: lpad: ; CHECK: call void @objc_release(i8* %zipFile) [[NUW]], !clang.imprecise_release !0 ; CHECK: ret void +; CHECK-NEXT: } define void @test0(i8* %zipFile) { entry: call i8* @objc_retain(i8* %zipFile) nounwind @@ -48,6 +49,7 @@ lpad: ; preds = %entry ; CHECK: br label %done ; CHECK: done: ; CHECK-NEXT: ret void +; CHECK-NEXT: } define void @test1(i8* %zipFile) { entry: call i8* @objc_retain(i8* %zipFile) nounwind @@ -110,6 +112,7 @@ finally.rethrow: ; preds = %invoke.cont, %entry ; CHECK: if.end: ; CHECK-NEXT: call void @objc_release(i8* %p) [[NUW]] ; CHECK-NEXT: ret void +; CHECK-NEXT: } define void @test3(i8* %p, i1 %b) { entry: %0 = call i8* @objc_retain(i8* %p) @@ -145,6 +148,7 @@ if.end: ; CHECK: if.end: ; CHECK-NEXT: call void @objc_release(i8* %p) [[NUW]] ; CHECK-NEXT: ret void +; CHECK-NEXT: } define void @test4(i8* %p, i1 %b) { entry: %0 = call i8* @objc_retain(i8* %p) diff --git a/test/Transforms/ObjCARC/move-and-merge-autorelease.ll b/test/Transforms/ObjCARC/move-and-merge-autorelease.ll index 8462c70..e5d2f07 100644 --- a/test/Transforms/ObjCARC/move-and-merge-autorelease.ll +++ b/test/Transforms/ObjCARC/move-and-merge-autorelease.ll @@ -1,4 +1,4 @@ -; RUN: opt -S -objc-arc < %s | FileCheck %s +; RUN: opt -S -objc-arc -objc-arc-contract < %s | FileCheck %s ; The optimizer should be able to move the autorelease past two phi nodes ; and fold it with the release in bb65. diff --git a/test/Transforms/ObjCARC/no-objc-arc-exceptions.ll b/test/Transforms/ObjCARC/no-objc-arc-exceptions.ll index 9728f6e..58b5bbe 100644 --- a/test/Transforms/ObjCARC/no-objc-arc-exceptions.ll +++ b/test/Transforms/ObjCARC/no-objc-arc-exceptions.ll @@ -59,11 +59,12 @@ lpad: ; preds = %entry resume { i8*, i32 } %t8 } -; There is no !clang.arc.no_objc_arc_exceptions -; metadata here, so the optimizer shouldn't eliminate anything. +; There is no !clang.arc.no_objc_arc_exceptions metadata here, so the optimizer +; shouldn't eliminate anything, but *CAN* strength reduce the objc_retainBlock +; to an objc_retain. ; CHECK: define void @test0_no_metadata( -; CHECK: call i8* @objc_retainBlock( +; CHECK: call i8* @objc_retain( ; CHECK: invoke ; CHECK: call void @objc_release( ; CHECK: } diff --git a/test/Transforms/ObjCARC/retain-block-escape-analysis.ll b/test/Transforms/ObjCARC/retain-block-escape-analysis.ll index 2c1ddce..8df05ad 100644 --- a/test/Transforms/ObjCARC/retain-block-escape-analysis.ll +++ b/test/Transforms/ObjCARC/retain-block-escape-analysis.ll @@ -23,6 +23,23 @@ define void @bitcasttest(i8* %storage, void (...)* %block) { ; CHECK: define void @bitcasttest entry: %t1 = bitcast void (...)* %block to i8* +; CHECK: tail call i8* @objc_retain + %t2 = tail call i8* @objc_retain(i8* %t1) +; CHECK: tail call i8* @objc_retainBlock + %t3 = tail call i8* @objc_retainBlock(i8* %t1), !clang.arc.copy_on_escape !0 + %t4 = bitcast i8* %storage to void (...)** + %t5 = bitcast i8* %t3 to void (...)* + store void (...)* %t5, void (...)** %t4, align 8 +; CHECK: call void @objc_release + call void @objc_release(i8* %t1) + ret void +; CHECK: } +} + +define void @bitcasttest_a(i8* %storage, void (...)* %block) { +; CHECK: define void @bitcasttest_a +entry: + %t1 = bitcast void (...)* %block to i8* ; CHECK-NOT: tail call i8* @objc_retain %t2 = tail call i8* @objc_retain(i8* %t1) ; CHECK: tail call i8* @objc_retainBlock @@ -31,14 +48,34 @@ entry: %t5 = bitcast i8* %t3 to void (...)* store void (...)* %t5, void (...)** %t4, align 8 ; CHECK-NOT: call void @objc_release - call void @objc_release(i8* %t1) + call void @objc_release(i8* %t1), !clang.imprecise_release !0 ret void +; CHECK: } } define void @geptest(void (...)** %storage_array, void (...)* %block) { ; CHECK: define void @geptest entry: %t1 = bitcast void (...)* %block to i8* +; CHECK: tail call i8* @objc_retain + %t2 = tail call i8* @objc_retain(i8* %t1) +; CHECK: tail call i8* @objc_retainBlock + %t3 = tail call i8* @objc_retainBlock(i8* %t1), !clang.arc.copy_on_escape !0 + %t4 = bitcast i8* %t3 to void (...)* + + %storage = getelementptr inbounds void (...)** %storage_array, i64 0 + + store void (...)* %t4, void (...)** %storage, align 8 +; CHECK: call void @objc_release + call void @objc_release(i8* %t1) + ret void +; CHECK: } +} + +define void @geptest_a(void (...)** %storage_array, void (...)* %block) { +; CHECK: define void @geptest_a +entry: + %t1 = bitcast void (...)* %block to i8* ; CHECK-NOT: tail call i8* @objc_retain %t2 = tail call i8* @objc_retain(i8* %t1) ; CHECK: tail call i8* @objc_retainBlock @@ -49,8 +86,9 @@ entry: store void (...)* %t4, void (...)** %storage, align 8 ; CHECK-NOT: call void @objc_release - call void @objc_release(i8* %t1) + call void @objc_release(i8* %t1), !clang.imprecise_release !0 ret void +; CHECK: } } define void @selecttest(void (...)** %store1, void (...)** %store2, @@ -58,6 +96,24 @@ define void @selecttest(void (...)** %store1, void (...)** %store2, ; CHECK: define void @selecttest entry: %t1 = bitcast void (...)* %block to i8* +; CHECK: tail call i8* @objc_retain + %t2 = tail call i8* @objc_retain(i8* %t1) +; CHECK: tail call i8* @objc_retainBlock + %t3 = tail call i8* @objc_retainBlock(i8* %t1), !clang.arc.copy_on_escape !0 + %t4 = bitcast i8* %t3 to void (...)* + %store = select i1 undef, void (...)** %store1, void (...)** %store2 + store void (...)* %t4, void (...)** %store, align 8 +; CHECK: call void @objc_release + call void @objc_release(i8* %t1) + ret void +; CHECK: } +} + +define void @selecttest_a(void (...)** %store1, void (...)** %store2, + void (...)* %block) { +; CHECK: define void @selecttest_a +entry: + %t1 = bitcast void (...)* %block to i8* ; CHECK-NOT: tail call i8* @objc_retain %t2 = tail call i8* @objc_retain(i8* %t1) ; CHECK: tail call i8* @objc_retainBlock @@ -66,8 +122,9 @@ entry: %store = select i1 undef, void (...)** %store1, void (...)** %store2 store void (...)* %t4, void (...)** %store, align 8 ; CHECK-NOT: call void @objc_release - call void @objc_release(i8* %t1) + call void @objc_release(i8* %t1), !clang.imprecise_release !0 ret void +; CHECK: } } define void @phinodetest(void (...)** %storage1, @@ -76,6 +133,36 @@ define void @phinodetest(void (...)** %storage1, ; CHECK: define void @phinodetest entry: %t1 = bitcast void (...)* %block to i8* +; CHECK: tail call i8* @objc_retain + %t2 = tail call i8* @objc_retain(i8* %t1) +; CHECK: tail call i8* @objc_retainBlock + %t3 = tail call i8* @objc_retainBlock(i8* %t1), !clang.arc.copy_on_escape !0 + %t4 = bitcast i8* %t3 to void (...)* + br i1 undef, label %store1_set, label %store2_set +; CHECK: store1_set: + +store1_set: + br label %end + +store2_set: + br label %end + +end: +; CHECK: end: + %storage = phi void (...)** [ %storage1, %store1_set ], [ %storage2, %store2_set] + store void (...)* %t4, void (...)** %storage, align 8 +; CHECK: call void @objc_release + call void @objc_release(i8* %t1) + ret void +; CHECK: } +} + +define void @phinodetest_a(void (...)** %storage1, + void (...)** %storage2, + void (...)* %block) { +; CHECK: define void @phinodetest_a +entry: + %t1 = bitcast void (...)* %block to i8* ; CHECK-NOT: tail call i8* @objc_retain %t2 = tail call i8* @objc_retain(i8* %t1) ; CHECK: tail call i8* @objc_retainBlock @@ -93,10 +180,11 @@ end: %storage = phi void (...)** [ %storage1, %store1_set ], [ %storage2, %store2_set] store void (...)* %t4, void (...)** %storage, align 8 ; CHECK-NOT: call void @objc_release - call void @objc_release(i8* %t1) + call void @objc_release(i8* %t1), !clang.imprecise_release !0 ret void } + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; This test makes sure that we do not hang clang when visiting a use ; ; cycle caused by phi nodes during objc-arc analysis. *NOTE* This ; diff --git a/test/Transforms/ObjCARC/retain-block.ll b/test/Transforms/ObjCARC/retain-block.ll index ee57049..1bb3f02 100644 --- a/test/Transforms/ObjCARC/retain-block.ll +++ b/test/Transforms/ObjCARC/retain-block.ll @@ -98,7 +98,7 @@ entry: ; CHECK-NEXT: tail call i8* @objc_retainBlock(i8* %tmp) [[NUW]] ; CHECK-NEXT: @use_pointer(i8* %tmp2) ; CHECK-NEXT: @use_pointer(i8* %tmp2) -; CHECK-NEXT: tail call void @objc_release(i8* %tmp) [[NUW]], !clang.imprecise_release !0 +; CHECK-NEXT: tail call void @objc_release(i8* %tmp2) [[NUW]], !clang.imprecise_release !0 ; CHECK-NOT: @objc ; CHECK: } define void @test1_no_metadata(i8* %tmp) { @@ -122,7 +122,7 @@ entry: ; CHECK-NEXT: store i8* %tmp2, i8** %z ; CHECK-NEXT: @use_pointer(i8* %tmp2) ; CHECK-NEXT: @use_pointer(i8* %tmp2) -; CHECK-NEXT: tail call void @objc_release(i8* %tmp) [[NUW]], !clang.imprecise_release !0 +; CHECK-NEXT: tail call void @objc_release(i8* %tmp2) [[NUW]], !clang.imprecise_release !0 ; CHECK-NOT: @objc ; CHECK: } define void @test1_escape(i8* %tmp, i8** %z) { diff --git a/test/Transforms/ObjCARC/retain-not-declared.ll b/test/Transforms/ObjCARC/retain-not-declared.ll index e834179..165829f 100644 --- a/test/Transforms/ObjCARC/retain-not-declared.ll +++ b/test/Transforms/ObjCARC/retain-not-declared.ll @@ -21,8 +21,8 @@ define i8* @test0(i8* %p) { entry: %call = tail call i8* @objc_unretainedObject(i8* %p) %0 = tail call i8* @objc_retainAutoreleasedReturnValue(i8* %call) nounwind - %1 = tail call i8* @objc_autoreleaseReturnValue(i8* %0) nounwind - ret i8* %1 + %1 = tail call i8* @objc_autoreleaseReturnValue(i8* %call) nounwind + ret i8* %call } ; Properly create the @objc_retain declaration when it doesn't already exist. diff --git a/test/Transforms/ObjCARC/rv.ll b/test/Transforms/ObjCARC/rv.ll index a2fef96..e857c9f 100644 --- a/test/Transforms/ObjCARC/rv.ll +++ b/test/Transforms/ObjCARC/rv.ll @@ -121,7 +121,7 @@ define i8* @test7() { %p = call i8* @returner() call i8* @objc_retainAutoreleasedReturnValue(i8* %p) %t = call i8* @objc_autoreleaseReturnValue(i8* %p) - call void @use_pointer(i8* %t) + call void @use_pointer(i8* %p) ret i8* %t } @@ -133,18 +133,7 @@ define i8* @test7b() { call void @use_pointer(i8* %p) call i8* @objc_retainAutoreleasedReturnValue(i8* %p) %t = call i8* @objc_autoreleaseReturnValue(i8* %p) - ret i8* %t -} - -; Turn objc_retain into objc_retainAutoreleasedReturnValue if its operand -; is a return value. - -; CHECK: define void @test8() -; CHECK: tail call i8* @objc_retainAutoreleasedReturnValue(i8* %p) -define void @test8() { - %p = call i8* @returner() - call i8* @objc_retain(i8* %p) - ret void + ret i8* %p } ; Don't apply the RV optimization to autorelease if there's no retain. @@ -156,11 +145,11 @@ define i8* @test9(i8* %p) { ret i8* %p } -; Apply the RV optimization. +; Do not apply the RV optimization. ; CHECK: define i8* @test10(i8* %p) ; CHECK: tail call i8* @objc_retain(i8* %p) [[NUW]] -; CHECK: tail call i8* @objc_autoreleaseReturnValue(i8* %p) [[NUW]] +; CHECK: call i8* @objc_autorelease(i8* %p) [[NUW]] ; CHECK-NEXT: ret i8* %p define i8* @test10(i8* %p) { %1 = call i8* @objc_retain(i8* %p) @@ -235,45 +224,6 @@ define void @test15() { ret void } -; Convert objc_retain to objc_retainAutoreleasedReturnValue if its -; argument is a return value. - -; CHECK: define void @test16( -; CHECK-NEXT: %y = call i8* @returner() -; CHECK-NEXT: tail call i8* @objc_retainAutoreleasedReturnValue(i8* %y) [[NUW]] -; CHECK-NEXT: ret void -define void @test16() { - %y = call i8* @returner() - call i8* @objc_retain(i8* %y) - ret void -} - -; Don't convert objc_retain to objc_retainAutoreleasedReturnValue if its -; argument is not a return value. - -; CHECK: define void @test17( -; CHECK-NEXT: tail call i8* @objc_retain(i8* %y) [[NUW]] -; CHECK-NEXT: ret void -define void @test17(i8* %y) { - call i8* @objc_retain(i8* %y) - ret void -} - -; Don't Convert objc_retain to objc_retainAutoreleasedReturnValue if it -; isn't next to the call providing its return value. - -; CHECK: define void @test18( -; CHECK-NEXT: %y = call i8* @returner() -; CHECK-NEXT: call void @callee() -; CHECK-NEXT: tail call i8* @objc_retain(i8* %y) [[NUW]] -; CHECK-NEXT: ret void -define void @test18() { - %y = call i8* @returner() - call void @callee() - call i8* @objc_retain(i8* %y) - ret void -} - ; Delete autoreleaseRV+retainRV pairs. ; CHECK: define i8* @test19(i8* %p) { diff --git a/test/Transforms/ObjCARC/tail-call-invariant-enforcement.ll b/test/Transforms/ObjCARC/tail-call-invariant-enforcement.ll index 74ac97c..1ec61c8 100644 --- a/test/Transforms/ObjCARC/tail-call-invariant-enforcement.ll +++ b/test/Transforms/ObjCARC/tail-call-invariant-enforcement.ll @@ -1,84 +1,89 @@ ; RUN: opt -objc-arc -S < %s | FileCheck %s -declare i8* @objc_release(i8* %x) +declare void @objc_release(i8* %x) declare i8* @objc_retain(i8* %x) declare i8* @objc_autorelease(i8* %x) declare i8* @objc_autoreleaseReturnValue(i8* %x) declare i8* @objc_retainAutoreleasedReturnValue(i8* %x) +declare i8* @tmp(i8*) ; Never tail call objc_autorelease. -define i8* @test0(i8* %x) { + +; CHECK: define i8* @test0(i8* %x) [[NUW:#[0-9]+]] { +; CHECK: %tmp0 = call i8* @objc_autorelease(i8* %x) [[NUW]] +; CHECK: %tmp1 = call i8* @objc_autorelease(i8* %x) [[NUW]] +; CHECK: } +define i8* @test0(i8* %x) nounwind { entry: - ; CHECK: %tmp0 = call i8* @objc_autorelease(i8* %x) %tmp0 = call i8* @objc_autorelease(i8* %x) - ; CHECK: %tmp1 = call i8* @objc_autorelease(i8* %x) %tmp1 = tail call i8* @objc_autorelease(i8* %x) ret i8* %x } ; Always tail call autoreleaseReturnValue. -define i8* @test1(i8* %x) { + +; CHECK: define i8* @test1(i8* %x) [[NUW]] { +; CHECK: %tmp0 = tail call i8* @objc_autoreleaseReturnValue(i8* %x) [[NUW]] +; CHECK: %tmp1 = tail call i8* @objc_autoreleaseReturnValue(i8* %x) [[NUW]] +; CHECK: } +define i8* @test1(i8* %x) nounwind { entry: - ; CHECK: %tmp0 = tail call i8* @objc_autoreleaseReturnValue(i8* %x) %tmp0 = call i8* @objc_autoreleaseReturnValue(i8* %x) - ; CHECK: %tmp1 = tail call i8* @objc_autoreleaseReturnValue(i8* %x) %tmp1 = tail call i8* @objc_autoreleaseReturnValue(i8* %x) ret i8* %x } ; Always tail call objc_retain. -define i8* @test2(i8* %x) { + +; CHECK: define i8* @test2(i8* %x) [[NUW]] { +; CHECK: %tmp0 = tail call i8* @objc_retain(i8* %x) [[NUW]] +; CHECK: %tmp1 = tail call i8* @objc_retain(i8* %x) [[NUW]] +; CHECK: } +define i8* @test2(i8* %x) nounwind { entry: - ; CHECK: %tmp0 = tail call i8* @objc_retain(i8* %x) %tmp0 = call i8* @objc_retain(i8* %x) - ; CHECK: %tmp1 = tail call i8* @objc_retain(i8* %x) %tmp1 = tail call i8* @objc_retain(i8* %x) ret i8* %x } -define i8* @tmp(i8* %x) { - ret i8* %x -} - ; Always tail call objc_retainAutoreleasedReturnValue. -define i8* @test3(i8* %x) { +; CHECK: define i8* @test3(i8* %x) [[NUW]] { +; CHECK: %tmp0 = tail call i8* @objc_retainAutoreleasedReturnValue(i8* %y) [[NUW]] +; CHECK: %tmp1 = tail call i8* @objc_retainAutoreleasedReturnValue(i8* %z) [[NUW]] +; CHECK: } +define i8* @test3(i8* %x) nounwind { entry: %y = call i8* @tmp(i8* %x) - ; CHECK: %tmp0 = tail call i8* @objc_retainAutoreleasedReturnValue(i8* %y) %tmp0 = call i8* @objc_retainAutoreleasedReturnValue(i8* %y) %z = call i8* @tmp(i8* %x) - ; CHECK: %tmp1 = tail call i8* @objc_retainAutoreleasedReturnValue(i8* %z) %tmp1 = tail call i8* @objc_retainAutoreleasedReturnValue(i8* %z) ret i8* %x } ; By itself, we should never change whether or not objc_release is tail called. -define i8* @test4(i8* %x) { + +; CHECK: define void @test4(i8* %x) [[NUW]] { +; CHECK: call void @objc_release(i8* %x) [[NUW]] +; CHECK: tail call void @objc_release(i8* %x) [[NUW]] +; CHECK: } +define void @test4(i8* %x) nounwind { entry: - ; CHECK: %tmp0 = call i8* @objc_release(i8* %x) - %tmp0 = call i8* @objc_release(i8* %x) - ; CHECK: %tmp1 = tail call i8* @objc_release(i8* %x) - %tmp1 = tail call i8* @objc_release(i8* %x) - ret i8* %x + call void @objc_release(i8* %x) + tail call void @objc_release(i8* %x) + ret void } ; If we convert a tail called @objc_autoreleaseReturnValue to an ; @objc_autorelease, ensure that the tail call is removed. -define i8* @test5(i8* %x) { +; CHECK: define i8* @test5(i8* %x) [[NUW]] { +; CHECK: %tmp0 = call i8* @objc_autorelease(i8* %x) [[NUW]] +; CHECK: } +define i8* @test5(i8* %x) nounwind { entry: - ; CHECK: %tmp0 = call i8* @objc_autorelease(i8* %x) %tmp0 = tail call i8* @objc_autoreleaseReturnValue(i8* %x) ret i8* %tmp0 } -; If we convert a called @objc_autorelease to an @objc_autoreleaseReturnValue, -; ensure that the tail call is added. -define i8* @test6(i8* %x) { -entry: - ; CHECK: %tmp0 = tail call i8* @objc_retain(i8* %x) - %tmp0 = tail call i8* @objc_retain(i8* %x) - ; CHECK: %tmp1 = tail call i8* @objc_autoreleaseReturnValue(i8* %x) - %tmp1 = call i8* @objc_autorelease(i8* %x) - ret i8* %x -} +; CHECK: attributes [[NUW]] = { nounwind } + diff --git a/test/Transforms/Reassociate/pr12245.ll b/test/Transforms/Reassociate/pr12245.ll index 84098bd..e9b5355 100644 --- a/test/Transforms/Reassociate/pr12245.ll +++ b/test/Transforms/Reassociate/pr12245.ll @@ -6,36 +6,36 @@ define i32 @fn2() nounwind uwtable ssp { entry: - %0 = load i32* @a, align 4, !tbaa !0 + %0 = load i32* @a, align 4 %dec = add nsw i32 %0, -1 - store i32 %dec, i32* @a, align 4, !tbaa !0 - %1 = load i32* @d, align 4, !tbaa !0 + store i32 %dec, i32* @a, align 4 + %1 = load i32* @d, align 4 %sub = sub nsw i32 %dec, %1 - store i32 %sub, i32* @d, align 4, !tbaa !0 - %2 = load i32* @a, align 4, !tbaa !0 + store i32 %sub, i32* @d, align 4 + %2 = load i32* @a, align 4 %dec1 = add nsw i32 %2, -1 - store i32 %dec1, i32* @a, align 4, !tbaa !0 - %3 = load i32* @d, align 4, !tbaa !0 + store i32 %dec1, i32* @a, align 4 + %3 = load i32* @d, align 4 %sub2 = sub nsw i32 %dec1, %3 - store i32 %sub2, i32* @d, align 4, !tbaa !0 - %4 = load i32* @a, align 4, !tbaa !0 + store i32 %sub2, i32* @d, align 4 + %4 = load i32* @a, align 4 %dec3 = add nsw i32 %4, -1 - store i32 %dec3, i32* @a, align 4, !tbaa !0 - %5 = load i32* @d, align 4, !tbaa !0 + store i32 %dec3, i32* @a, align 4 + %5 = load i32* @d, align 4 %sub4 = sub nsw i32 %dec3, %5 - store i32 %sub4, i32* @d, align 4, !tbaa !0 - %6 = load i32* @a, align 4, !tbaa !0 + store i32 %sub4, i32* @d, align 4 + %6 = load i32* @a, align 4 %dec5 = add nsw i32 %6, -1 - store i32 %dec5, i32* @a, align 4, !tbaa !0 - %7 = load i32* @d, align 4, !tbaa !0 + store i32 %dec5, i32* @a, align 4 + %7 = load i32* @d, align 4 %sub6 = sub nsw i32 %dec5, %7 - store i32 %sub6, i32* @d, align 4, !tbaa !0 - %8 = load i32* @a, align 4, !tbaa !0 + store i32 %sub6, i32* @d, align 4 + %8 = load i32* @a, align 4 %dec7 = add nsw i32 %8, -1 - store i32 %dec7, i32* @a, align 4, !tbaa !0 - %9 = load i32* @d, align 4, !tbaa !0 + store i32 %dec7, i32* @a, align 4 + %9 = load i32* @d, align 4 %sub8 = sub nsw i32 %dec7, %9 - store i32 %sub8, i32* @d, align 4, !tbaa !0 + store i32 %sub8, i32* @d, align 4 ret i32 0 } @@ -44,7 +44,3 @@ entry: %call = call i32 @fn2() ret i32 %call } - -!0 = metadata !{metadata !"int", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA"} diff --git a/test/Transforms/Reassociate/xor_reassoc.ll b/test/Transforms/Reassociate/xor_reassoc.ll new file mode 100644 index 0000000..b9353c7 --- /dev/null +++ b/test/Transforms/Reassociate/xor_reassoc.ll @@ -0,0 +1,193 @@ +;RUN: opt -S -reassociate < %s | FileCheck %s + +; ========================================================================== +; +; Xor reassociation general cases +; +; ========================================================================== + +; (x | c1) ^ (x | c2) => (x & c3) ^ c3, where c3 = c1^c2 +; +define i32 @xor1(i32 %x) { + %or = or i32 %x, 123 + %or1 = or i32 %x, 456 + %xor = xor i32 %or, %or1 + ret i32 %xor + +;CHECK: @xor1 +;CHECK: %and.ra = and i32 %x, 435 +;CHECK: %xor = xor i32 %and.ra, 435 +} + +; Test rule : (x & c1) ^ (x & c2) = (x & (c1^c2)) +; Real testing case : (x & 123) ^ y ^ (x & 345) => (x & 435) ^ y +define i32 @xor2(i32 %x, i32 %y) { + %and = and i32 %x, 123 + %xor = xor i32 %and, %y + %and1 = and i32 %x, 456 + %xor2 = xor i32 %xor, %and1 + ret i32 %xor2 + +;CHECK: @xor2 +;CHECK: %and.ra = and i32 %x, 435 +;CHECK: %xor2 = xor i32 %and.ra, %y +} + +; Test rule: (x | c1) ^ (x & c2) = (x & c3) ^ c1, where c3 = ~c1 ^ c2 +; c3 = ~c1 ^ c2 +define i32 @xor3(i32 %x, i32 %y) { + %or = or i32 %x, 123 + %xor = xor i32 %or, %y + %and = and i32 %x, 456 + %xor1 = xor i32 %xor, %and + ret i32 %xor1 + +;CHECK: @xor3 +;CHECK: %and.ra = and i32 %x, -436 +;CHECK: %xor = xor i32 %y, 123 +;CHECK: %xor1 = xor i32 %xor, %and.ra +} + +; Test rule: (x | c1) ^ c2 = (x & ~c1) ^ (c1 ^ c2) +define i32 @xor4(i32 %x, i32 %y) { + %and = and i32 %x, -124 + %xor = xor i32 %y, 435 + %xor1 = xor i32 %xor, %and + ret i32 %xor1 +; CHECK: @xor4 +; CHECK: %and = and i32 %x, -124 +; CHECK: %xor = xor i32 %y, 435 +; CHECK: %xor1 = xor i32 %xor, %and +} + +; ========================================================================== +; +; Xor reassociation special cases +; +; ========================================================================== + +; Special case1: +; (x | c1) ^ (x & ~c1) = c1 +define i32 @xor_special1(i32 %x, i32 %y) { + %or = or i32 %x, 123 + %xor = xor i32 %or, %y + %and = and i32 %x, -124 + %xor1 = xor i32 %xor, %and + ret i32 %xor1 +; CHECK: @xor_special1 +; CHECK: %xor1 = xor i32 %y, 123 +; CHECK: ret i32 %xor1 +} + +; Special case1: +; (x | c1) ^ (x & c1) = x ^ c1 +define i32 @xor_special2(i32 %x, i32 %y) { + %or = or i32 %x, 123 + %xor = xor i32 %or, %y + %and = and i32 %x, 123 + %xor1 = xor i32 %xor, %and + ret i32 %xor1 +; CHECK: @xor_special2 +; CHECK: %xor = xor i32 %y, 123 +; CHECK: %xor1 = xor i32 %xor, %x +; CHECK: ret i32 %xor1 +} + +; (x | c1) ^ (x | c1) => 0 +define i32 @xor_special3(i32 %x) { + %or = or i32 %x, 123 + %or1 = or i32 %x, 123 + %xor = xor i32 %or, %or1 + ret i32 %xor +;CHECK: @xor_special3 +;CHECK: ret i32 0 +} + +; (x & c1) ^ (x & c1) => 0 +define i32 @xor_special4(i32 %x) { + %or = and i32 %x, 123 + %or1 = and i32 123, %x + %xor = xor i32 %or, %or1 + ret i32 %xor +;CHECK: @xor_special4 +;CHECK: ret i32 0 +} + +; ========================================================================== +; +; Xor reassociation curtail code size +; +; ========================================================================== + +; (x | c1) ^ (x | c2) => (x & c3) ^ c3 +; is enabled if one of operands has multiple uses +; +define i32 @xor_ra_size1(i32 %x) { + %or = or i32 %x, 123 + %or1 = or i32 %x, 456 + %xor = xor i32 %or, %or1 + + %add = add i32 %xor, %or + ret i32 %add +;CHECK: @xor_ra_size1 +;CHECK: %xor = xor i32 %and.ra, 435 +} + +; (x | c1) ^ (x | c2) => (x & c3) ^ c3 +; is disenabled if bothf operands has multiple uses. +; +define i32 @xor_ra_size2(i32 %x) { + %or = or i32 %x, 123 + %or1 = or i32 %x, 456 + %xor = xor i32 %or, %or1 + + %add = add i32 %xor, %or + %add2 = add i32 %add, %or1 + ret i32 %add2 + +;CHECK: @xor_ra_size2 +;CHECK: %or1 = or i32 %x, 456 +;CHECK: %xor = xor i32 %or, %or1 +} + + +; ========================================================================== +; +; Xor reassociation bugs +; +; ========================================================================== + +@xor_bug1_data = external global <{}>, align 4 +define void @xor_bug1() { + %1 = ptrtoint i32* undef to i64 + %2 = xor i64 %1, ptrtoint (<{}>* @xor_bug1_data to i64) + %3 = and i64 undef, %2 + ret void +} + +; The bug was that when the compiler optimize "(x | c1)" ^ "(x & c2)", it may +; swap the two xor-subexpressions if they are not in canoninical order; however, +; when optimizer swaps two sub-expressions, if forgot to swap the cached value +; of c1 and c2 accordingly, hence cause the problem. +; +define i32 @xor_bug2(i32, i32, i32, i32) { + %5 = mul i32 %0, 123 + %6 = add i32 %2, 24 + %7 = add i32 %1, 8 + %8 = and i32 %1, 3456789 + %9 = or i32 %8, 4567890 + %10 = and i32 %1, 543210987 + %11 = or i32 %1, 891034567 + %12 = and i32 %2, 255 + %13 = xor i32 %9, %10 + %14 = xor i32 %11, %13 + %15 = xor i32 %5, %14 + %16 = and i32 %3, 255 + %17 = xor i32 %16, 42 + %18 = add i32 %6, %7 + %19 = add i32 %18, %12 + %20 = add i32 %19, %15 + ret i32 %20 +;CHECK: @xor_bug2 +;CHECK: xor i32 %5, 891034567 +} diff --git a/test/Transforms/SLPVectorizer/X86/barriercall.ll b/test/Transforms/SLPVectorizer/X86/barriercall.ll new file mode 100644 index 0000000..04eb8f9 --- /dev/null +++ b/test/Transforms/SLPVectorizer/X86/barriercall.ll @@ -0,0 +1,32 @@ +; RUN: opt < %s -basicaa -slp-vectorizer -dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.8.0" + +;CHECK: @foo +;CHECK: store <4 x i32> +;CHECK: ret +define i32 @foo(i32* nocapture %A, i32 %n) { +entry: + %call = tail call i32 (...)* @bar() #2 + %mul = mul nsw i32 %n, 5 + %add = add nsw i32 %mul, 9 + store i32 %add, i32* %A, align 4 + %mul1 = mul nsw i32 %n, 9 + %add2 = add nsw i32 %mul1, 9 + %arrayidx3 = getelementptr inbounds i32* %A, i64 1 + store i32 %add2, i32* %arrayidx3, align 4 + %mul4 = shl i32 %n, 3 + %add5 = add nsw i32 %mul4, 9 + %arrayidx6 = getelementptr inbounds i32* %A, i64 2 + store i32 %add5, i32* %arrayidx6, align 4 + %mul7 = mul nsw i32 %n, 10 + %add8 = add nsw i32 %mul7, 9 + %arrayidx9 = getelementptr inbounds i32* %A, i64 3 + store i32 %add8, i32* %arrayidx9, align 4 + ret i32 undef +} + + ; We can still vectorize the stores below. + +declare i32 @bar(...) diff --git a/test/Transforms/SLPVectorizer/X86/cast.ll b/test/Transforms/SLPVectorizer/X86/cast.ll new file mode 100644 index 0000000..344dbbc --- /dev/null +++ b/test/Transforms/SLPVectorizer/X86/cast.ll @@ -0,0 +1,38 @@ +; RUN: opt < %s -basicaa -slp-vectorizer -dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.9.0" + +; int foo(int * restrict A, char * restrict B) { +; A[0] = B[0]; +; A[1] = B[1]; +; A[2] = B[2]; +; A[3] = B[3]; +; } +;CHECK: @foo +;CHECK: load <4 x i8> +;CHECK: sext +;CHECK: store <4 x i32> +define i32 @foo(i32* noalias nocapture %A, i8* noalias nocapture %B) { +entry: + %0 = load i8* %B, align 1 + %conv = sext i8 %0 to i32 + store i32 %conv, i32* %A, align 4 + %arrayidx2 = getelementptr inbounds i8* %B, i64 1 + %1 = load i8* %arrayidx2, align 1 + %conv3 = sext i8 %1 to i32 + %arrayidx4 = getelementptr inbounds i32* %A, i64 1 + store i32 %conv3, i32* %arrayidx4, align 4 + %arrayidx5 = getelementptr inbounds i8* %B, i64 2 + %2 = load i8* %arrayidx5, align 1 + %conv6 = sext i8 %2 to i32 + %arrayidx7 = getelementptr inbounds i32* %A, i64 2 + store i32 %conv6, i32* %arrayidx7, align 4 + %arrayidx8 = getelementptr inbounds i8* %B, i64 3 + %3 = load i8* %arrayidx8, align 1 + %conv9 = sext i8 %3 to i32 + %arrayidx10 = getelementptr inbounds i32* %A, i64 3 + store i32 %conv9, i32* %arrayidx10, align 4 + ret i32 undef +} + diff --git a/test/Transforms/SLPVectorizer/X86/compare-reduce.ll b/test/Transforms/SLPVectorizer/X86/compare-reduce.ll new file mode 100644 index 0000000..05f8e61 --- /dev/null +++ b/test/Transforms/SLPVectorizer/X86/compare-reduce.ll @@ -0,0 +1,53 @@ +; RUN: opt < %s -basicaa -slp-vectorizer -dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.7.0" + +@.str = private unnamed_addr constant [6 x i8] c"bingo\00", align 1 + +;CHECK: @reduce_compare +;CHECK: load <2 x double> +;CHECK: fmul <2 x double> +;CHECK: fmul <2 x double> +;CHECK: fadd <2 x double> +;CHECK: extractelement +;CHECK: extractelement +;CHECK: ret +define void @reduce_compare(double* nocapture %A, i32 %n) { +entry: + %conv = sitofp i32 %n to double + br label %for.body + +for.body: ; preds = %for.inc, %entry + %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.inc ] + %0 = shl nsw i64 %indvars.iv, 1 + %arrayidx = getelementptr inbounds double* %A, i64 %0 + %1 = load double* %arrayidx, align 8 + %mul1 = fmul double %conv, %1 + %mul2 = fmul double %mul1, 7.000000e+00 + %add = fadd double %mul2, 5.000000e+00 + %2 = or i64 %0, 1 + %arrayidx6 = getelementptr inbounds double* %A, i64 %2 + %3 = load double* %arrayidx6, align 8 + %mul8 = fmul double %conv, %3 + %mul9 = fmul double %mul8, 4.000000e+00 + %add10 = fadd double %mul9, 9.000000e+00 + %cmp11 = fcmp ogt double %add, %add10 + br i1 %cmp11, label %if.then, label %for.inc + +if.then: ; preds = %for.body + %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([6 x i8]* @.str, i64 0, i64 0)) + br label %for.inc + +for.inc: ; preds = %for.body, %if.then + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 100 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.inc + ret void +} + +declare i32 @printf(i8* nocapture, ...) + diff --git a/test/Transforms/SLPVectorizer/X86/diamond.ll b/test/Transforms/SLPVectorizer/X86/diamond.ll new file mode 100644 index 0000000..8e85cb6 --- /dev/null +++ b/test/Transforms/SLPVectorizer/X86/diamond.ll @@ -0,0 +1,78 @@ +; RUN: opt < %s -basicaa -slp-vectorizer -dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.8.0" + +; int foo(int * restrict B, int * restrict A, int n, int m) { +; B[0] = n * A[0] + m * A[0]; +; B[1] = n * A[1] + m * A[1]; +; B[2] = n * A[2] + m * A[2]; +; B[3] = n * A[3] + m * A[3]; +; return 0; +; } + +; CHECK: @foo +; CHECK: load <4 x i32> +; CHECK: mul <4 x i32> +; CHECK: store <4 x i32> +; CHECK: ret +define i32 @foo(i32* noalias nocapture %B, i32* noalias nocapture %A, i32 %n, i32 %m) #0 { +entry: + %0 = load i32* %A, align 4 + %mul238 = add i32 %m, %n + %add = mul i32 %0, %mul238 + store i32 %add, i32* %B, align 4 + %arrayidx4 = getelementptr inbounds i32* %A, i64 1 + %1 = load i32* %arrayidx4, align 4 + %add8 = mul i32 %1, %mul238 + %arrayidx9 = getelementptr inbounds i32* %B, i64 1 + store i32 %add8, i32* %arrayidx9, align 4 + %arrayidx10 = getelementptr inbounds i32* %A, i64 2 + %2 = load i32* %arrayidx10, align 4 + %add14 = mul i32 %2, %mul238 + %arrayidx15 = getelementptr inbounds i32* %B, i64 2 + store i32 %add14, i32* %arrayidx15, align 4 + %arrayidx16 = getelementptr inbounds i32* %A, i64 3 + %3 = load i32* %arrayidx16, align 4 + %add20 = mul i32 %3, %mul238 + %arrayidx21 = getelementptr inbounds i32* %B, i64 3 + store i32 %add20, i32* %arrayidx21, align 4 + ret i32 0 +} + + +; int foo_fail(int * restrict B, int * restrict A, int n, int m) { +; B[0] = n * A[0] + m * A[0]; +; B[1] = n * A[1] + m * A[1]; +; B[2] = n * A[2] + m * A[2]; +; B[3] = n * A[3] + m * A[3]; +; return A[0]; +; } + +; CHECK: @foo_fail +; CHECK-NOT: load <4 x i32> +; CHECK: ret +define i32 @foo_fail(i32* noalias nocapture %B, i32* noalias nocapture %A, i32 %n, i32 %m) { +entry: + %0 = load i32* %A, align 4 + %mul238 = add i32 %m, %n + %add = mul i32 %0, %mul238 + store i32 %add, i32* %B, align 4 + %arrayidx4 = getelementptr inbounds i32* %A, i64 1 + %1 = load i32* %arrayidx4, align 4 + %add8 = mul i32 %1, %mul238 + %arrayidx9 = getelementptr inbounds i32* %B, i64 1 + store i32 %add8, i32* %arrayidx9, align 4 + %arrayidx10 = getelementptr inbounds i32* %A, i64 2 + %2 = load i32* %arrayidx10, align 4 + %add14 = mul i32 %2, %mul238 + %arrayidx15 = getelementptr inbounds i32* %B, i64 2 + store i32 %add14, i32* %arrayidx15, align 4 + %arrayidx16 = getelementptr inbounds i32* %A, i64 3 + %3 = load i32* %arrayidx16, align 4 + %add20 = mul i32 %3, %mul238 + %arrayidx21 = getelementptr inbounds i32* %B, i64 3 + store i32 %add20, i32* %arrayidx21, align 4 + ret i32 %0 ;<--------- This value has multiple users and can't be vectorized. +} + diff --git a/test/Transforms/SLPVectorizer/X86/flag.ll b/test/Transforms/SLPVectorizer/X86/flag.ll new file mode 100644 index 0000000..3ca5407 --- /dev/null +++ b/test/Transforms/SLPVectorizer/X86/flag.ll @@ -0,0 +1,51 @@ +; RUN: opt < %s -basicaa -slp-vectorizer -slp-threshold=1000 -dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.8.0" + +; Check that the command line flag works. +;CHECK:rollable +;CHECK-NOT:load <4 x i32> +;CHECK: ret + +define i32 @rollable(i32* noalias nocapture %in, i32* noalias nocapture %out, i64 %n) { + %1 = icmp eq i64 %n, 0 + br i1 %1, label %._crit_edge, label %.lr.ph + +.lr.ph: ; preds = %0, %.lr.ph + %i.019 = phi i64 [ %26, %.lr.ph ], [ 0, %0 ] + %2 = shl i64 %i.019, 2 + %3 = getelementptr inbounds i32* %in, i64 %2 + %4 = load i32* %3, align 4 + %5 = or i64 %2, 1 + %6 = getelementptr inbounds i32* %in, i64 %5 + %7 = load i32* %6, align 4 + %8 = or i64 %2, 2 + %9 = getelementptr inbounds i32* %in, i64 %8 + %10 = load i32* %9, align 4 + %11 = or i64 %2, 3 + %12 = getelementptr inbounds i32* %in, i64 %11 + %13 = load i32* %12, align 4 + %14 = mul i32 %4, 7 + %15 = add i32 %14, 7 + %16 = mul i32 %7, 7 + %17 = add i32 %16, 14 + %18 = mul i32 %10, 7 + %19 = add i32 %18, 21 + %20 = mul i32 %13, 7 + %21 = add i32 %20, 28 + %22 = getelementptr inbounds i32* %out, i64 %2 + store i32 %15, i32* %22, align 4 + %23 = getelementptr inbounds i32* %out, i64 %5 + store i32 %17, i32* %23, align 4 + %24 = getelementptr inbounds i32* %out, i64 %8 + store i32 %19, i32* %24, align 4 + %25 = getelementptr inbounds i32* %out, i64 %11 + store i32 %21, i32* %25, align 4 + %26 = add i64 %i.019, 1 + %exitcond = icmp eq i64 %26, %n + br i1 %exitcond, label %._crit_edge, label %.lr.ph + +._crit_edge: ; preds = %.lr.ph, %0 + ret i32 undef +} diff --git a/test/Transforms/SLPVectorizer/X86/hoist.ll b/test/Transforms/SLPVectorizer/X86/hoist.ll new file mode 100644 index 0000000..5074cea --- /dev/null +++ b/test/Transforms/SLPVectorizer/X86/hoist.ll @@ -0,0 +1,59 @@ +; RUN: opt < %s -basicaa -slp-vectorizer -dce -S -mtriple=i386-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32-S128" +target triple = "i386-apple-macosx10.9.0" + +;int foo(int *A, int n, int k) { +; for (int i=0; i < 10000; i+=4) { +; A[i] += n; +; A[i+1] += k; +; A[i+2] += n; +; A[i+3] += k; +; } +;} + +; preheader: +;CHECK: entry +;CHECK-NEXT: insertelement +;CHECK-NEXT: insertelement +;CHECK-NEXT: insertelement +;CHECK-NEXT: insertelement +; loop body: +;CHECK: phi +;CHECK: load <4 x i32> +;CHECK: add <4 x i32> +;CHECK: store <4 x i32> +;CHECK: ret +define i32 @foo(i32* nocapture %A, i32 %n, i32 %k) { +entry: + br label %for.body + +for.body: ; preds = %entry, %for.body + %i.024 = phi i32 [ 0, %entry ], [ %add10, %for.body ] + %arrayidx = getelementptr inbounds i32* %A, i32 %i.024 + %0 = load i32* %arrayidx, align 4 + %add = add nsw i32 %0, %n + store i32 %add, i32* %arrayidx, align 4 + %add121 = or i32 %i.024, 1 + %arrayidx2 = getelementptr inbounds i32* %A, i32 %add121 + %1 = load i32* %arrayidx2, align 4 + %add3 = add nsw i32 %1, %k + store i32 %add3, i32* %arrayidx2, align 4 + %add422 = or i32 %i.024, 2 + %arrayidx5 = getelementptr inbounds i32* %A, i32 %add422 + %2 = load i32* %arrayidx5, align 4 + %add6 = add nsw i32 %2, %n + store i32 %add6, i32* %arrayidx5, align 4 + %add723 = or i32 %i.024, 3 + %arrayidx8 = getelementptr inbounds i32* %A, i32 %add723 + %3 = load i32* %arrayidx8, align 4 + %add9 = add nsw i32 %3, %k + store i32 %add9, i32* %arrayidx8, align 4 + %add10 = add nsw i32 %i.024, 4 + %cmp = icmp slt i32 %add10, 10000 + br i1 %cmp, label %for.body, label %for.end + +for.end: ; preds = %for.body + ret i32 undef +} + diff --git a/test/Transforms/SLPVectorizer/X86/lit.local.cfg b/test/Transforms/SLPVectorizer/X86/lit.local.cfg new file mode 100644 index 0000000..a8ad0f1 --- /dev/null +++ b/test/Transforms/SLPVectorizer/X86/lit.local.cfg @@ -0,0 +1,6 @@ +config.suffixes = ['.ll', '.c', '.cpp'] + +targets = set(config.root.targets_to_build.split()) +if not 'X86' in targets: + config.unsupported = True + diff --git a/test/Transforms/SLPVectorizer/X86/loopinvariant.ll b/test/Transforms/SLPVectorizer/X86/loopinvariant.ll new file mode 100644 index 0000000..4a37fce --- /dev/null +++ b/test/Transforms/SLPVectorizer/X86/loopinvariant.ll @@ -0,0 +1,69 @@ +; RUN: opt < %s -basicaa -slp-vectorizer -dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.8.0" + +;CHECK: @foo +;CHECK: load <4 x i32> +;CHECK: add <4 x i32> +;CHECK: store <4 x i32> +;CHECK: load <4 x i32> +;CHECK: add <4 x i32> +;CHECK: store <4 x i32> +;CHECK: ret +define i32 @foo(i32* nocapture %A, i32 %n) #0 { +entry: + %cmp62 = icmp sgt i32 %n, 0 + br i1 %cmp62, label %for.body, label %for.end + +for.body: ; preds = %entry, %for.body + %indvars.iv = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] + %arrayidx = getelementptr inbounds i32* %A, i64 %indvars.iv + %0 = load i32* %arrayidx, align 4 + %add1 = add nsw i32 %0, %n + store i32 %add1, i32* %arrayidx, align 4 + %1 = or i64 %indvars.iv, 1 + %arrayidx4 = getelementptr inbounds i32* %A, i64 %1 + %2 = load i32* %arrayidx4, align 4 + %add5 = add nsw i32 %2, %n + store i32 %add5, i32* %arrayidx4, align 4 + %3 = or i64 %indvars.iv, 2 + %arrayidx8 = getelementptr inbounds i32* %A, i64 %3 + %4 = load i32* %arrayidx8, align 4 + %add9 = add nsw i32 %4, %n + store i32 %add9, i32* %arrayidx8, align 4 + %5 = or i64 %indvars.iv, 3 + %arrayidx12 = getelementptr inbounds i32* %A, i64 %5 + %6 = load i32* %arrayidx12, align 4 + %add13 = add nsw i32 %6, %n + store i32 %add13, i32* %arrayidx12, align 4 + %7 = or i64 %indvars.iv, 4 + %arrayidx16 = getelementptr inbounds i32* %A, i64 %7 + %8 = load i32* %arrayidx16, align 4 + %add17 = add nsw i32 %8, %n + store i32 %add17, i32* %arrayidx16, align 4 + %9 = or i64 %indvars.iv, 5 + %arrayidx20 = getelementptr inbounds i32* %A, i64 %9 + %10 = load i32* %arrayidx20, align 4 + %add21 = add nsw i32 %10, %n + store i32 %add21, i32* %arrayidx20, align 4 + %11 = or i64 %indvars.iv, 6 + %arrayidx24 = getelementptr inbounds i32* %A, i64 %11 + %12 = load i32* %arrayidx24, align 4 + %add25 = add nsw i32 %12, %n + store i32 %add25, i32* %arrayidx24, align 4 + %13 = or i64 %indvars.iv, 7 + %arrayidx28 = getelementptr inbounds i32* %A, i64 %13 + %14 = load i32* %arrayidx28, align 4 + %add29 = add nsw i32 %14, %n + store i32 %add29, i32* %arrayidx28, align 4 + %indvars.iv.next = add i64 %indvars.iv, 8 + %15 = trunc i64 %indvars.iv.next to i32 + %cmp = icmp slt i32 %15, %n + br i1 %cmp, label %for.body, label %for.end + +for.end: ; preds = %for.body, %entry + ret i32 undef +} + +attributes #0 = { nounwind ssp uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf"="true" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } diff --git a/test/Transforms/SLPVectorizer/X86/multi_user.ll b/test/Transforms/SLPVectorizer/X86/multi_user.ll new file mode 100644 index 0000000..aaa6063 --- /dev/null +++ b/test/Transforms/SLPVectorizer/X86/multi_user.ll @@ -0,0 +1,47 @@ +; RUN: opt < %s -basicaa -slp-vectorizer -dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.7.0" + +;int foo (int *A, int n) { +; A[0] += n * 5 + 7; +; A[1] += n * 5 + 8; +; A[2] += n * 5 + 9; +; A[3] += n * 5 + 10; +; A[4] += n * 5 + 11; +;} + +;CHECK: @foo +;CHECK: insertelement <4 x i32> +;CHECK: load <4 x i32> +;CHECK: add <4 x i32> +;CHECK: store <4 x i32> +;CHECK: ret +define i32 @foo(i32* nocapture %A, i32 %n) { + %1 = mul nsw i32 %n, 5 + %2 = add nsw i32 %1, 7 + %3 = load i32* %A, align 4 + %4 = add nsw i32 %2, %3 + store i32 %4, i32* %A, align 4 + %5 = add nsw i32 %1, 8 + %6 = getelementptr inbounds i32* %A, i64 1 + %7 = load i32* %6, align 4 + %8 = add nsw i32 %5, %7 + store i32 %8, i32* %6, align 4 + %9 = add nsw i32 %1, 9 + %10 = getelementptr inbounds i32* %A, i64 2 + %11 = load i32* %10, align 4 + %12 = add nsw i32 %9, %11 + store i32 %12, i32* %10, align 4 + %13 = add nsw i32 %1, 10 + %14 = getelementptr inbounds i32* %A, i64 3 + %15 = load i32* %14, align 4 + %16 = add nsw i32 %13, %15 + store i32 %16, i32* %14, align 4 + %17 = add nsw i32 %1, 11 + %18 = getelementptr inbounds i32* %A, i64 4 + %19 = load i32* %18, align 4 + %20 = add nsw i32 %17, %19 + store i32 %20, i32* %18, align 4 + ret i32 undef +} diff --git a/test/Transforms/SLPVectorizer/X86/reduction.ll b/test/Transforms/SLPVectorizer/X86/reduction.ll new file mode 100644 index 0000000..70b7c3a --- /dev/null +++ b/test/Transforms/SLPVectorizer/X86/reduction.ll @@ -0,0 +1,47 @@ +; RUN: opt < %s -basicaa -slp-vectorizer -dce -S -mtriple=i386-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32-S128" +target triple = "i386-apple-macosx10.8.0" + +; int foo(double *A, int n, int m) { +; double sum = 0, v1 = 2, v0 = 3; +; for (int i=0; i < n; ++i) +; sum += 7*A[i*2] + 7*A[i*2+1]; +; return sum; +; } + +;CHECK: reduce +;CHECK: load <2 x double> +;CHECK: fmul <2 x double> +;CHECK: ret +define i32 @reduce(double* nocapture %A, i32 %n, i32 %m) { +entry: + %cmp13 = icmp sgt i32 %n, 0 + br i1 %cmp13, label %for.body, label %for.end + +for.body: ; preds = %entry, %for.body + %i.015 = phi i32 [ %inc, %for.body ], [ 0, %entry ] + %sum.014 = phi double [ %add6, %for.body ], [ 0.000000e+00, %entry ] + %mul = shl nsw i32 %i.015, 1 + %arrayidx = getelementptr inbounds double* %A, i32 %mul + %0 = load double* %arrayidx, align 4 + %mul1 = fmul double %0, 7.000000e+00 + %add12 = or i32 %mul, 1 + %arrayidx3 = getelementptr inbounds double* %A, i32 %add12 + %1 = load double* %arrayidx3, align 4 + %mul4 = fmul double %1, 7.000000e+00 + %add5 = fadd double %mul1, %mul4 + %add6 = fadd double %sum.014, %add5 + %inc = add nsw i32 %i.015, 1 + %exitcond = icmp eq i32 %inc, %n + br i1 %exitcond, label %for.cond.for.end_crit_edge, label %for.body + +for.cond.for.end_crit_edge: ; preds = %for.body + %phitmp = fptosi double %add6 to i32 + br label %for.end + +for.end: ; preds = %for.cond.for.end_crit_edge, %entry + %sum.0.lcssa = phi i32 [ %phitmp, %for.cond.for.end_crit_edge ], [ 0, %entry ] + ret i32 %sum.0.lcssa +} + diff --git a/test/Transforms/SLPVectorizer/X86/reduction2.ll b/test/Transforms/SLPVectorizer/X86/reduction2.ll new file mode 100644 index 0000000..7aa7d7e --- /dev/null +++ b/test/Transforms/SLPVectorizer/X86/reduction2.ll @@ -0,0 +1,32 @@ +; RUN: opt < %s -basicaa -slp-vectorizer -dce -S -mtriple=i386-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s + +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32-S128" +target triple = "i386-apple-macosx10.8.0" + +;CHECK: @foo +;CHECK: load <2 x double> +;CHECK: ret +define double @foo(double* nocapture %D) { + br label %1 + +; <label>:1 ; preds = %1, %0 + %i.02 = phi i32 [ 0, %0 ], [ %10, %1 ] + %sum.01 = phi double [ 0.000000e+00, %0 ], [ %9, %1 ] + %2 = shl nsw i32 %i.02, 1 + %3 = getelementptr inbounds double* %D, i32 %2 + %4 = load double* %3, align 4 + %A4 = fmul double %4, %4 + %5 = or i32 %2, 1 + %6 = getelementptr inbounds double* %D, i32 %5 + %7 = load double* %6, align 4 + %A7 = fmul double %7, %7 + %8 = fadd double %A4, %A7 + %9 = fadd double %sum.01, %8 + %10 = add nsw i32 %i.02, 1 + %exitcond = icmp eq i32 %10, 100 + br i1 %exitcond, label %11, label %1 + +; <label>:11 ; preds = %1 + ret double %9 +} + diff --git a/test/Transforms/SLPVectorizer/X86/saxpy.ll b/test/Transforms/SLPVectorizer/X86/saxpy.ll new file mode 100644 index 0000000..b520913 --- /dev/null +++ b/test/Transforms/SLPVectorizer/X86/saxpy.ll @@ -0,0 +1,45 @@ +; RUN: opt < %s -basicaa -slp-vectorizer -dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.8.0" + +; SLP vectorization example from http://cs.stanford.edu/people/eschkufz/research/asplos291-schkufza.pdf +;CHECK: SAXPY +;CHECK: mul <4 x i32> +;CHECK: ret + +define void @SAXPY(i32* noalias nocapture %x, i32* noalias nocapture %y, i32 %a, i64 %i) { + %1 = getelementptr inbounds i32* %x, i64 %i + %2 = load i32* %1, align 4 + %3 = mul nsw i32 %2, %a + %4 = getelementptr inbounds i32* %y, i64 %i + %5 = load i32* %4, align 4 + %6 = add nsw i32 %3, %5 + store i32 %6, i32* %1, align 4 + %7 = add i64 %i, 1 + %8 = getelementptr inbounds i32* %x, i64 %7 + %9 = load i32* %8, align 4 + %10 = mul nsw i32 %9, %a + %11 = getelementptr inbounds i32* %y, i64 %7 + %12 = load i32* %11, align 4 + %13 = add nsw i32 %10, %12 + store i32 %13, i32* %8, align 4 + %14 = add i64 %i, 2 + %15 = getelementptr inbounds i32* %x, i64 %14 + %16 = load i32* %15, align 4 + %17 = mul nsw i32 %16, %a + %18 = getelementptr inbounds i32* %y, i64 %14 + %19 = load i32* %18, align 4 + %20 = add nsw i32 %17, %19 + store i32 %20, i32* %15, align 4 + %21 = add i64 %i, 3 + %22 = getelementptr inbounds i32* %x, i64 %21 + %23 = load i32* %22, align 4 + %24 = mul nsw i32 %23, %a + %25 = getelementptr inbounds i32* %y, i64 %21 + %26 = load i32* %25, align 4 + %27 = add nsw i32 %24, %26 + store i32 %27, i32* %22, align 4 + ret void +} + diff --git a/test/Transforms/SLPVectorizer/X86/simple-loop.ll b/test/Transforms/SLPVectorizer/X86/simple-loop.ll new file mode 100644 index 0000000..0111b94 --- /dev/null +++ b/test/Transforms/SLPVectorizer/X86/simple-loop.ll @@ -0,0 +1,100 @@ +; RUN: opt < %s -basicaa -slp-vectorizer -dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.8.0" + +;CHECK:rollable +define i32 @rollable(i32* noalias nocapture %in, i32* noalias nocapture %out, i64 %n) { + %1 = icmp eq i64 %n, 0 + br i1 %1, label %._crit_edge, label %.lr.ph + +.lr.ph: ; preds = %0, %.lr.ph + %i.019 = phi i64 [ %26, %.lr.ph ], [ 0, %0 ] + %2 = shl i64 %i.019, 2 + %3 = getelementptr inbounds i32* %in, i64 %2 +;CHECK:load <4 x i32> + %4 = load i32* %3, align 4 + %5 = or i64 %2, 1 + %6 = getelementptr inbounds i32* %in, i64 %5 + %7 = load i32* %6, align 4 + %8 = or i64 %2, 2 + %9 = getelementptr inbounds i32* %in, i64 %8 + %10 = load i32* %9, align 4 + %11 = or i64 %2, 3 + %12 = getelementptr inbounds i32* %in, i64 %11 + %13 = load i32* %12, align 4 +;CHECK:mul <4 x i32> + %14 = mul i32 %4, 7 +;CHECK:add <4 x i32> + %15 = add i32 %14, 7 + %16 = mul i32 %7, 7 + %17 = add i32 %16, 14 + %18 = mul i32 %10, 7 + %19 = add i32 %18, 21 + %20 = mul i32 %13, 7 + %21 = add i32 %20, 28 + %22 = getelementptr inbounds i32* %out, i64 %2 +;CHECK:store <4 x i32> + store i32 %15, i32* %22, align 4 + %23 = getelementptr inbounds i32* %out, i64 %5 + store i32 %17, i32* %23, align 4 + %24 = getelementptr inbounds i32* %out, i64 %8 + store i32 %19, i32* %24, align 4 + %25 = getelementptr inbounds i32* %out, i64 %11 + store i32 %21, i32* %25, align 4 + %26 = add i64 %i.019, 1 + %exitcond = icmp eq i64 %26, %n + br i1 %exitcond, label %._crit_edge, label %.lr.ph + +._crit_edge: ; preds = %.lr.ph, %0 +;CHECK: ret + ret i32 undef +} + +;CHECK:unrollable +;CHECK-NOT: <4 x i32> +;CHECK: ret +define i32 @unrollable(i32* %in, i32* %out, i64 %n) nounwind ssp uwtable { + %1 = icmp eq i64 %n, 0 + br i1 %1, label %._crit_edge, label %.lr.ph + +.lr.ph: ; preds = %0, %.lr.ph + %i.019 = phi i64 [ %26, %.lr.ph ], [ 0, %0 ] + %2 = shl i64 %i.019, 2 + %3 = getelementptr inbounds i32* %in, i64 %2 + %4 = load i32* %3, align 4 + %5 = or i64 %2, 1 + %6 = getelementptr inbounds i32* %in, i64 %5 + %7 = load i32* %6, align 4 + %8 = or i64 %2, 2 + %9 = getelementptr inbounds i32* %in, i64 %8 + %10 = load i32* %9, align 4 + %11 = or i64 %2, 3 + %12 = getelementptr inbounds i32* %in, i64 %11 + %13 = load i32* %12, align 4 + %14 = mul i32 %4, 7 + %15 = add i32 %14, 7 + %16 = mul i32 %7, 7 + %17 = add i32 %16, 14 + %18 = mul i32 %10, 7 + %19 = add i32 %18, 21 + %20 = mul i32 %13, 7 + %21 = add i32 %20, 28 + %22 = getelementptr inbounds i32* %out, i64 %2 + store i32 %15, i32* %22, align 4 + %23 = getelementptr inbounds i32* %out, i64 %5 + store i32 %17, i32* %23, align 4 + %barrier = call i32 @goo(i32 0) ; <---------------- memory barrier. + %24 = getelementptr inbounds i32* %out, i64 %8 + store i32 %19, i32* %24, align 4 + %25 = getelementptr inbounds i32* %out, i64 %11 + store i32 %21, i32* %25, align 4 + %26 = add i64 %i.019, 1 + %exitcond = icmp eq i64 %26, %n + br i1 %exitcond, label %._crit_edge, label %.lr.ph + +._crit_edge: ; preds = %.lr.ph, %0 + ret i32 undef +} + +declare i32 @goo(i32) diff --git a/test/Transforms/SLPVectorizer/X86/simplebb.ll b/test/Transforms/SLPVectorizer/X86/simplebb.ll new file mode 100644 index 0000000..cd0b99e --- /dev/null +++ b/test/Transforms/SLPVectorizer/X86/simplebb.ll @@ -0,0 +1,25 @@ +; RUN: opt < %s -basicaa -slp-vectorizer -dce -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.8.0" + +; Simple 3-pair chain with loads and stores +; CHECK: test1 +; CHECK: store <2 x double> +; CHECK: ret +define void @test1(double* %a, double* %b, double* %c) { +entry: + %i0 = load double* %a, align 8 + %i1 = load double* %b, align 8 + %mul = fmul double %i0, %i1 + %arrayidx3 = getelementptr inbounds double* %a, i64 1 + %i3 = load double* %arrayidx3, align 8 + %arrayidx4 = getelementptr inbounds double* %b, i64 1 + %i4 = load double* %arrayidx4, align 8 + %mul5 = fmul double %i3, %i4 + store double %mul, double* %c, align 8 + %arrayidx5 = getelementptr inbounds double* %c, i64 1 + store double %mul5, double* %arrayidx5, align 8 + ret void +} + diff --git a/test/Transforms/SLPVectorizer/X86/vector.ll b/test/Transforms/SLPVectorizer/X86/vector.ll new file mode 100644 index 0000000..02a1897 --- /dev/null +++ b/test/Transforms/SLPVectorizer/X86/vector.ll @@ -0,0 +1,14 @@ +; RUN: opt < %s -slp-vectorizer -S -mtriple=x86_64-apple-macosx10.8.0 -mcpu=corei7-avx | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.8.0" + +; Make sure that we are not crashing or changing the code. +;CHECK: test +;CHECK: icmp +;CHECK: ret +define void @test(<4 x i32> %in, <4 x i32> %in2) { + %k = icmp eq <4 x i32> %in, %in2 + ret void +} + diff --git a/test/Transforms/SLPVectorizer/lit.local.cfg b/test/Transforms/SLPVectorizer/lit.local.cfg new file mode 100644 index 0000000..19eebc0 --- /dev/null +++ b/test/Transforms/SLPVectorizer/lit.local.cfg @@ -0,0 +1 @@ +config.suffixes = ['.ll', '.c', '.cpp'] diff --git a/test/Transforms/SROA/basictest.ll b/test/Transforms/SROA/basictest.ll index 30dd217..8340322 100644 --- a/test/Transforms/SROA/basictest.ll +++ b/test/Transforms/SROA/basictest.ll @@ -1243,3 +1243,77 @@ entry: %v = load i32* %a ret i32 %v } + +define void @PR15674(i8* %data, i8* %src, i32 %size) { +; Arrange (via control flow) to have unmerged stores of a particular width to +; an alloca where we incrementally store from the end of the array toward the +; beginning of the array. Ensure that the final integer store, despite being +; convertable to the integer type that we end up promoting this alloca toward, +; doesn't get widened to a full alloca store. +; CHECK: @PR15674 + +entry: + %tmp = alloca [4 x i8], align 1 +; CHECK: alloca i32 + + switch i32 %size, label %end [ + i32 4, label %bb4 + i32 3, label %bb3 + i32 2, label %bb2 + i32 1, label %bb1 + ] + +bb4: + %src.gep3 = getelementptr inbounds i8* %src, i32 3 + %src.3 = load i8* %src.gep3 + %tmp.gep3 = getelementptr inbounds [4 x i8]* %tmp, i32 0, i32 3 + store i8 %src.3, i8* %tmp.gep3 +; CHECK: store i8 + + br label %bb3 + +bb3: + %src.gep2 = getelementptr inbounds i8* %src, i32 2 + %src.2 = load i8* %src.gep2 + %tmp.gep2 = getelementptr inbounds [4 x i8]* %tmp, i32 0, i32 2 + store i8 %src.2, i8* %tmp.gep2 +; CHECK: store i8 + + br label %bb2 + +bb2: + %src.gep1 = getelementptr inbounds i8* %src, i32 1 + %src.1 = load i8* %src.gep1 + %tmp.gep1 = getelementptr inbounds [4 x i8]* %tmp, i32 0, i32 1 + store i8 %src.1, i8* %tmp.gep1 +; CHECK: store i8 + + br label %bb1 + +bb1: + %src.gep0 = getelementptr inbounds i8* %src, i32 0 + %src.0 = load i8* %src.gep0 + %tmp.gep0 = getelementptr inbounds [4 x i8]* %tmp, i32 0, i32 0 + store i8 %src.0, i8* %tmp.gep0 +; CHECK: store i8 + + br label %end + +end: + %tmp.raw = bitcast [4 x i8]* %tmp to i8* + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %data, i8* %tmp.raw, i32 %size, i32 1, i1 false) + ret void +; CHECK: ret void +} + +define void @PR15805(i1 %a, i1 %b) { +; CHECK: @PR15805 +; CHECK: select i1 undef, i64* %c, i64* %c +; CHECK: ret void + + %c = alloca i64, align 8 + %p.0.c = select i1 undef, i64* %c, i64* %c + %cond.in = select i1 undef, i64* %p.0.c, i64* %c + %cond = load i64* %cond.in, align 8 + ret void +} diff --git a/test/Transforms/SROA/vector-promotion.ll b/test/Transforms/SROA/vector-promotion.ll index 02f6d04..3336515 100644 --- a/test/Transforms/SROA/vector-promotion.ll +++ b/test/Transforms/SROA/vector-promotion.ll @@ -224,26 +224,26 @@ entry: %a.cast0 = bitcast i32* %a.gep0 to <2 x i32>* store <2 x i32> <i32 0, i32 0>, <2 x i32>* %a.cast0 ; CHECK-NOT: store -; CHECK: %[[insert1:.*]] = shufflevector <4 x i32> <i32 0, i32 0, i32 undef, i32 undef>, <4 x i32> undef, <4 x i32> <i32 0, i32 1, {{.*}}> +; CHECK: select <4 x i1> <i1 true, i1 true, i1 false, i1 false> %a.gep1 = getelementptr <4 x i32>* %a, i32 0, i32 1 %a.cast1 = bitcast i32* %a.gep1 to <2 x i32>* store <2 x i32> <i32 1, i32 1>, <2 x i32>* %a.cast1 -; CHECK-NEXT: %[[insert2:.*]] = shufflevector <4 x i32> <i32 undef, i32 1, i32 1, i32 undef>, <4 x i32> %[[insert1]], <4 x i32> <i32 4, i32 1, i32 2, {{.*}}> +; CHECK-NEXT: select <4 x i1> <i1 false, i1 true, i1 true, i1 false> %a.gep2 = getelementptr <4 x i32>* %a, i32 0, i32 2 %a.cast2 = bitcast i32* %a.gep2 to <2 x i32>* store <2 x i32> <i32 2, i32 2>, <2 x i32>* %a.cast2 -; CHECK-NEXT: %[[insert3:.*]] = shufflevector <4 x i32> <i32 undef, i32 undef, i32 2, i32 2>, <4 x i32> %[[insert2]], <4 x i32> <i32 4, i32 5, i32 2, i32 3> +; CHECK-NEXT: select <4 x i1> <i1 false, i1 false, i1 true, i1 true> %a.gep3 = getelementptr <4 x i32>* %a, i32 0, i32 3 store i32 3, i32* %a.gep3 -; CHECK-NEXT: %[[insert4:.*]] = insertelement <4 x i32> %[[insert3]], i32 3, i32 3 +; CHECK-NEXT: insertelement <4 x i32> %ret = load <4 x i32>* %a ret <4 x i32> %ret -; CHECK-NEXT: ret <4 x i32> %[[insert4]] +; CHECK-NEXT: ret <4 x i32> } define <4 x i32> @test_subvec_load() { @@ -291,27 +291,27 @@ entry: %a.cast0 = bitcast float* %a.gep0 to i8* call void @llvm.memset.p0i8.i32(i8* %a.cast0, i8 0, i32 8, i32 0, i1 false) ; CHECK-NOT: store -; CHECK: %[[insert1:.*]] = shufflevector <4 x float> <float 0.000000e+00, float 0.000000e+00, float undef, float undef>, <4 x float> undef, <4 x i32> <i32 0, i32 1, {{.*}}> +; CHECK: select <4 x i1> <i1 true, i1 true, i1 false, i1 false> %a.gep1 = getelementptr <4 x float>* %a, i32 0, i32 1 %a.cast1 = bitcast float* %a.gep1 to i8* call void @llvm.memset.p0i8.i32(i8* %a.cast1, i8 1, i32 8, i32 0, i1 false) -; CHECK-NEXT: %[[insert2:.*]] = shufflevector <4 x float> <float undef, float 0x3820202020000000, float 0x3820202020000000, float undef>, <4 x float> %[[insert1]], <4 x i32> <i32 4, i32 1, i32 2, {{.*}}> +; CHECK-NEXT: select <4 x i1> <i1 false, i1 true, i1 true, i1 false> %a.gep2 = getelementptr <4 x float>* %a, i32 0, i32 2 %a.cast2 = bitcast float* %a.gep2 to i8* call void @llvm.memset.p0i8.i32(i8* %a.cast2, i8 3, i32 8, i32 0, i1 false) -; CHECK-NEXT: %[[insert3:.*]] = shufflevector <4 x float> <float undef, float undef, float 0x3860606060000000, float 0x3860606060000000>, <4 x float> %[[insert2]], <4 x i32> <i32 4, i32 5, i32 2, i32 3> +; CHECK-NEXT: select <4 x i1> <i1 false, i1 false, i1 true, i1 true> %a.gep3 = getelementptr <4 x float>* %a, i32 0, i32 3 %a.cast3 = bitcast float* %a.gep3 to i8* call void @llvm.memset.p0i8.i32(i8* %a.cast3, i8 7, i32 4, i32 0, i1 false) -; CHECK-NEXT: %[[insert4:.*]] = insertelement <4 x float> %[[insert3]], float 0x38E0E0E0E0000000, i32 3 +; CHECK-NEXT: insertelement <4 x float> %ret = load <4 x float>* %a ret <4 x float> %ret -; CHECK-NEXT: ret <4 x float> %[[insert4]] +; CHECK-NEXT: ret <4 x float> } define <4 x float> @test_subvec_memcpy(i8* %x, i8* %y, i8* %z, i8* %f, i8* %out) { @@ -326,7 +326,7 @@ entry: ; CHECK: %[[xptr:.*]] = bitcast i8* %x to <2 x float>* ; CHECK-NEXT: %[[x:.*]] = load <2 x float>* %[[xptr]] ; CHECK-NEXT: %[[expand_x:.*]] = shufflevector <2 x float> %[[x]], <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> -; CHECK-NEXT: %[[insert_x:.*]] = shufflevector <4 x float> %[[expand_x]], <4 x float> undef, <4 x i32> <i32 0, i32 1, {{.*}}> +; CHECK-NEXT: select <4 x i1> <i1 true, i1 true, i1 false, i1 false> %a.gep1 = getelementptr <4 x float>* %a, i32 0, i32 1 %a.cast1 = bitcast float* %a.gep1 to i8* @@ -334,7 +334,7 @@ entry: ; CHECK-NEXT: %[[yptr:.*]] = bitcast i8* %y to <2 x float>* ; CHECK-NEXT: %[[y:.*]] = load <2 x float>* %[[yptr]] ; CHECK-NEXT: %[[expand_y:.*]] = shufflevector <2 x float> %[[y]], <2 x float> undef, <4 x i32> <i32 undef, i32 0, i32 1, i32 undef> -; CHECK-NEXT: %[[insert_y:.*]] = shufflevector <4 x float> %[[expand_y]], <4 x float> %[[insert_x]], <4 x i32> <i32 4, i32 1, i32 2, {{.*}}> +; CHECK-NEXT: select <4 x i1> <i1 false, i1 true, i1 true, i1 false> %a.gep2 = getelementptr <4 x float>* %a, i32 0, i32 2 %a.cast2 = bitcast float* %a.gep2 to i8* @@ -342,14 +342,14 @@ entry: ; CHECK-NEXT: %[[zptr:.*]] = bitcast i8* %z to <2 x float>* ; CHECK-NEXT: %[[z:.*]] = load <2 x float>* %[[zptr]] ; CHECK-NEXT: %[[expand_z:.*]] = shufflevector <2 x float> %[[z]], <2 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 1> -; CHECK-NEXT: %[[insert_z:.*]] = shufflevector <4 x float> %[[expand_z]], <4 x float> %[[insert_y]], <4 x i32> <i32 4, i32 5, i32 2, i32 3> +; CHECK-NEXT: select <4 x i1> <i1 false, i1 false, i1 true, i1 true> %a.gep3 = getelementptr <4 x float>* %a, i32 0, i32 3 %a.cast3 = bitcast float* %a.gep3 to i8* call void @llvm.memcpy.p0i8.p0i8.i32(i8* %a.cast3, i8* %f, i32 4, i32 0, i1 false) ; CHECK-NEXT: %[[fptr:.*]] = bitcast i8* %f to float* ; CHECK-NEXT: %[[f:.*]] = load float* %[[fptr]] -; CHECK-NEXT: %[[insert_f:.*]] = insertelement <4 x float> %[[insert_z]], float %[[f]], i32 3 +; CHECK-NEXT: %[[insert_f:.*]] = insertelement <4 x float> call void @llvm.memcpy.p0i8.p0i8.i32(i8* %out, i8* %a.cast2, i32 8, i32 0, i1 false) ; CHECK-NEXT: %[[outptr:.*]] = bitcast i8* %out to <2 x float>* diff --git a/test/Transforms/ScalarRepl/debuginfo-preserved.ll b/test/Transforms/ScalarRepl/debuginfo-preserved.ll index d1dd01d..7d3bcea 100644 --- a/test/Transforms/ScalarRepl/debuginfo-preserved.ll +++ b/test/Transforms/ScalarRepl/debuginfo-preserved.ll @@ -42,7 +42,7 @@ declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!0} !0 = metadata !{i32 786449, i32 0, i32 12, metadata !2, metadata !"clang version 3.0 (trunk 131941)", i1 false, metadata !"", i32 0, null, null, metadata !17, null, null} ; [ DW_TAG_compile_unit ] -!1 = metadata !{i32 786478, i32 0, metadata !2, metadata !"f", metadata !"f", metadata !"", metadata !2, i32 1, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, i32 (i32, i32)* @f, null, null, null, i32 1} ; [ DW_TAG_subprogram ] +!1 = metadata !{i32 786478, metadata !2, metadata !"f", metadata !"f", metadata !"", metadata !2, i32 1, metadata !3, i1 false, i1 true, i32 0, i32 0, i32 0, i32 256, i1 false, i32 (i32, i32)* @f, null, null, null, i32 1} ; [ DW_TAG_subprogram ] !2 = metadata !{i32 786473, metadata !18} ; [ DW_TAG_file_type ] !3 = metadata !{i32 786453, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] !4 = metadata !{metadata !5} diff --git a/test/Transforms/ScalarRepl/dynamic-vector-gep.ll b/test/Transforms/ScalarRepl/dynamic-vector-gep.ll deleted file mode 100644 index 565cd76..0000000 --- a/test/Transforms/ScalarRepl/dynamic-vector-gep.ll +++ /dev/null @@ -1,167 +0,0 @@ -; RUN: opt < %s -scalarrepl -S | FileCheck %s - -target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64" -target triple = "x86_64-apple-darwin10.0.0" - -; CHECK: @test1 -; CHECK: %[[alloc:[\.a-z0-9]*]] = alloca <4 x float> -; CHECK: store <4 x float> zeroinitializer, <4 x float>* %[[alloc]] -; CHECK: memset -; CHECK: extractelement <4 x float> zeroinitializer, i32 %idx2 - -; Split the array but don't replace the memset with an insert -; element as its not a constant offset. -; The load, however, can be replaced with an extract element. -define float @test1(i32 %idx1, i32 %idx2) { -entry: - %0 = alloca [4 x <4 x float>] - store [4 x <4 x float>] zeroinitializer, [4 x <4 x float>]* %0 - %ptr1 = getelementptr [4 x <4 x float>]* %0, i32 0, i32 0, i32 %idx1 - %cast = bitcast float* %ptr1 to i8* - call void @llvm.memset.p0i8.i32(i8* %cast, i8 0, i32 4, i32 4, i1 false) - %ptr2 = getelementptr [4 x <4 x float>]* %0, i32 0, i32 1, i32 %idx2 - %ret = load float* %ptr2 - ret float %ret -} - -; CHECK: @test2 -; CHECK: %[[ins:[\.a-z0-9]*]] = insertelement <4 x float> zeroinitializer, float 1.000000e+00, i32 %idx1 -; CHECK: extractelement <4 x float> %[[ins]], i32 %idx2 - -; Do SROA on the array when it has dynamic vector reads and writes. -define float @test2(i32 %idx1, i32 %idx2) { -entry: - %0 = alloca [4 x <4 x float>] - store [4 x <4 x float>] zeroinitializer, [4 x <4 x float>]* %0 - %ptr1 = getelementptr [4 x <4 x float>]* %0, i32 0, i32 0, i32 %idx1 - store float 1.0, float* %ptr1 - %ptr2 = getelementptr [4 x <4 x float>]* %0, i32 0, i32 0, i32 %idx2 - %ret = load float* %ptr2 - ret float %ret -} - -; CHECK: test3 -; CHECK: %0 = alloca [4 x <4 x float>] -; CHECK-NOT: alloca - -; Don't do SROA on a dynamically indexed vector when it spans -; more than one array element of the alloca array it is within. -define float @test3(i32 %idx1, i32 %idx2) { -entry: - %0 = alloca [4 x <4 x float>] - store [4 x <4 x float>] zeroinitializer, [4 x <4 x float>]* %0 - %bigvec = bitcast [4 x <4 x float>]* %0 to <16 x float>* - %ptr1 = getelementptr <16 x float>* %bigvec, i32 0, i32 %idx1 - store float 1.0, float* %ptr1 - %ptr2 = getelementptr <16 x float>* %bigvec, i32 0, i32 %idx2 - %ret = load float* %ptr2 - ret float %ret -} - -; CHECK: test4 -; CHECK: insertelement <16 x float> zeroinitializer, float 1.000000e+00, i32 %idx1 -; CHECK: extractelement <16 x float> %0, i32 %idx2 - -; Don't do SROA on a dynamically indexed vector when it spans -; more than one array element of the alloca array it is within. -; However, unlike test3, the store is on the vector type -; so SROA will convert the large alloca into the large vector -; type and do all accesses with insert/extract element -define float @test4(i32 %idx1, i32 %idx2) { -entry: - %0 = alloca [4 x <4 x float>] - %bigvec = bitcast [4 x <4 x float>]* %0 to <16 x float>* - store <16 x float> zeroinitializer, <16 x float>* %bigvec - %ptr1 = getelementptr <16 x float>* %bigvec, i32 0, i32 %idx1 - store float 1.0, float* %ptr1 - %ptr2 = getelementptr <16 x float>* %bigvec, i32 0, i32 %idx2 - %ret = load float* %ptr2 - ret float %ret -} - -; CHECK: @test5 -; CHECK: %0 = alloca [4 x <4 x float>] -; CHECK-NOT: alloca - -; Don't do SROA as the is a second dynamically indexed array -; which may span multiple elements of the alloca. -define float @test5(i32 %idx1, i32 %idx2) { -entry: - %0 = alloca [4 x <4 x float>] - store [4 x <4 x float>] zeroinitializer, [4 x <4 x float>]* %0 - %ptr1 = getelementptr [4 x <4 x float>]* %0, i32 0, i32 0, i32 %idx1 - %ptr2 = bitcast float* %ptr1 to [1 x <2 x float>]* - %ptr3 = getelementptr [1 x <2 x float>]* %ptr2, i32 0, i32 0, i32 %idx1 - store float 1.0, float* %ptr1 - %ptr4 = getelementptr [4 x <4 x float>]* %0, i32 0, i32 0, i32 %idx2 - %ret = load float* %ptr4 - ret float %ret -} - -; CHECK: test6 -; CHECK: insertelement <4 x float> zeroinitializer, float 1.000000e+00, i32 %idx1 -; CHECK: extractelement <4 x float> zeroinitializer, i32 %idx2 - -%vector.pair = type { %vector.anon, %vector.anon } -%vector.anon = type { %vector } -%vector = type { <4 x float> } - -; Dynamic GEPs on vectors were crashing when the vector was inside a struct -; as the new GEP for the new alloca might not include all the indices from -; the original GEP, just the indices it needs to get to the correct offset of -; some type, not necessarily the dynamic vector. -; This test makes sure we don't have this crash. -define float @test6(i32 %idx1, i32 %idx2) { -entry: - %0 = alloca %vector.pair - store %vector.pair zeroinitializer, %vector.pair* %0 - %ptr1 = getelementptr %vector.pair* %0, i32 0, i32 0, i32 0, i32 0, i32 %idx1 - store float 1.0, float* %ptr1 - %ptr2 = getelementptr %vector.pair* %0, i32 0, i32 1, i32 0, i32 0, i32 %idx2 - %ret = load float* %ptr2 - ret float %ret -} - -; CHECK: test7 -; CHECK: insertelement <4 x float> zeroinitializer, float 1.000000e+00, i32 %idx1 -; CHECK: extractelement <4 x float> zeroinitializer, i32 %idx2 - -%array.pair = type { [2 x %array.anon], %array.anon } -%array.anon = type { [2 x %vector] } - -; This is the same as test6 and tests the same crash, but on arrays. -define float @test7(i32 %idx1, i32 %idx2) { -entry: - %0 = alloca %array.pair - store %array.pair zeroinitializer, %array.pair* %0 - %ptr1 = getelementptr %array.pair* %0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 %idx1 - store float 1.0, float* %ptr1 - %ptr2 = getelementptr %array.pair* %0, i32 0, i32 1, i32 0, i32 0, i32 0, i32 %idx2 - %ret = load float* %ptr2 - ret float %ret -} - -; CHECK: test8 -; CHECK: %[[offset1:[\.a-z0-9]*]] = add i32 %idx1, 1 -; CHECK: %[[ins:[\.a-z0-9]*]] = insertelement <4 x float> zeroinitializer, float 1.000000e+00, i32 %[[offset1]] -; CHECK: %[[offset2:[\.a-z0-9]*]] = add i32 %idx2, 2 -; CHECK: extractelement <4 x float> %[[ins]], i32 %[[offset2]] - -; Do SROA on the vector when it has dynamic vector reads and writes -; from a non-zero offset. -define float @test8(i32 %idx1, i32 %idx2) { -entry: - %0 = alloca <4 x float> - store <4 x float> zeroinitializer, <4 x float>* %0 - %ptr1 = getelementptr <4 x float>* %0, i32 0, i32 1 - %ptr2 = bitcast float* %ptr1 to <3 x float>* - %ptr3 = getelementptr <3 x float>* %ptr2, i32 0, i32 %idx1 - store float 1.0, float* %ptr3 - %ptr4 = getelementptr <4 x float>* %0, i32 0, i32 2 - %ptr5 = bitcast float* %ptr4 to <2 x float>* - %ptr6 = getelementptr <2 x float>* %ptr5, i32 0, i32 %idx2 - %ret = load float* %ptr6 - ret float %ret -} - -declare void @llvm.memset.p0i8.i32(i8*, i8, i32, i32, i1) diff --git a/test/Transforms/SimplifyCFG/2003-08-17-BranchFold.ll b/test/Transforms/SimplifyCFG/2003-08-17-BranchFold.ll index fc89b16..f6b068f 100644 --- a/test/Transforms/SimplifyCFG/2003-08-17-BranchFold.ll +++ b/test/Transforms/SimplifyCFG/2003-08-17-BranchFold.ll @@ -1,11 +1,11 @@ ; This test checks to make sure that 'br X, Dest, Dest' is folded into ; 'br Dest' -; RUN: opt < %s -simplifycfg -S | \ -; RUN: not grep "br i1 %c2" +; RUN: opt < %s -simplifycfg -S | FileCheck %s declare void @noop() +; CHECK-NOT: br i1 %c2 define i32 @test(i1 %c1, i1 %c2) { call void @noop( ) br i1 %c1, label %A, label %Y diff --git a/test/Transforms/SimplifyCFG/2003-08-17-BranchFoldOrdering.ll b/test/Transforms/SimplifyCFG/2003-08-17-BranchFoldOrdering.ll index c1b032f..7804908 100644 --- a/test/Transforms/SimplifyCFG/2003-08-17-BranchFoldOrdering.ll +++ b/test/Transforms/SimplifyCFG/2003-08-17-BranchFoldOrdering.ll @@ -3,8 +3,9 @@ ; due to the fact that the SimplifyCFG function does not use ; the ConstantFoldTerminator function. -; RUN: opt < %s -simplifycfg -S | \ -; RUN: not grep "br i1 %c2" +; RUN: opt < %s -simplifycfg -S | FileCheck %s + +; CHECK-NOT: br i1 %c2 declare void @noop() diff --git a/test/Transforms/SimplifyCFG/2003-08-17-FoldSwitch-dbg.ll b/test/Transforms/SimplifyCFG/2003-08-17-FoldSwitch-dbg.ll index af59ba0..fbfb100 100644 --- a/test/Transforms/SimplifyCFG/2003-08-17-FoldSwitch-dbg.ll +++ b/test/Transforms/SimplifyCFG/2003-08-17-FoldSwitch-dbg.ll @@ -1,7 +1,6 @@ -; RUN: opt < %s -simplifycfg -S | \ -; RUN: not grep switch - +; RUN: opt < %s -simplifycfg -S | FileCheck %s +; CHECK-NOT: switch %llvm.dbg.anchor.type = type { i32, i32 } %llvm.dbg.compile_unit.type = type { i32, { }*, i32, i8*, i8*, i8*, i1, i1, i8* } diff --git a/test/Transforms/SimplifyCFG/2003-08-17-FoldSwitch.ll b/test/Transforms/SimplifyCFG/2003-08-17-FoldSwitch.ll index 93f851c..8066596 100644 --- a/test/Transforms/SimplifyCFG/2003-08-17-FoldSwitch.ll +++ b/test/Transforms/SimplifyCFG/2003-08-17-FoldSwitch.ll @@ -1,5 +1,6 @@ -; RUN: opt < %s -simplifycfg -S | \ -; RUN: not grep switch +; RUN: opt < %s -simplifycfg -S | FileCheck %s + +; CHECK-NOT: switch ; Test normal folding define i32 @test1() { diff --git a/test/Transforms/SimplifyCFG/2005-12-03-IncorrectPHIFold.ll b/test/Transforms/SimplifyCFG/2005-12-03-IncorrectPHIFold.ll index 760aa13..907261b 100644 --- a/test/Transforms/SimplifyCFG/2005-12-03-IncorrectPHIFold.ll +++ b/test/Transforms/SimplifyCFG/2005-12-03-IncorrectPHIFold.ll @@ -1,9 +1,7 @@ ; Make sure this doesn't turn into an infinite loop -; RUN: opt < %s -simplifycfg -constprop -simplifycfg |\ -; RUN: llvm-dis | grep bb86 -; END. - +; RUN: opt < %s -simplifycfg -constprop -simplifycfg | llvm-dis | FileCheck %s + %struct.anon = type { i32, i32, i32, i32, [1024 x i8] } @_zero_ = external global %struct.anon* ; <%struct.anon**> [#uses=2] @_one_ = external global %struct.anon* ; <%struct.anon**> [#uses=4] @@ -112,6 +110,7 @@ cond_true83: ; preds = %bb80 %tmp71 = call i32 @_do_compare( %struct.anon* null, %struct.anon* null, i32 0, i32 1 ) ; <i32> [#uses=1] %tmp76 = icmp eq i32 %tmp71, 0 ; <i1> [#uses=1] br i1 %tmp76, label %bb80.outer, label %bb80 +; CHECK: bb86 bb86: ; preds = %bb80 call void @free_num( %struct.anon** %num ) %tmp88 = load %struct.anon** %guess ; <%struct.anon*> [#uses=1] diff --git a/test/Transforms/SimplifyCFG/2006-10-19-UncondDiv.ll b/test/Transforms/SimplifyCFG/2006-10-19-UncondDiv.ll index 009d1c8..8f21b9b 100644 --- a/test/Transforms/SimplifyCFG/2006-10-19-UncondDiv.ll +++ b/test/Transforms/SimplifyCFG/2006-10-19-UncondDiv.ll @@ -1,6 +1,7 @@ ; PR957 -; RUN: opt < %s -simplifycfg -S | \ -; RUN: not grep select +; RUN: opt < %s -simplifycfg -S | FileCheck %s + +; CHECK-NOT: select @G = extern_weak global i32 diff --git a/test/Transforms/SimplifyCFG/2007-11-22-InvokeNoUnwind.ll b/test/Transforms/SimplifyCFG/2007-11-22-InvokeNoUnwind.ll index a20c46e..a90e072 100644 --- a/test/Transforms/SimplifyCFG/2007-11-22-InvokeNoUnwind.ll +++ b/test/Transforms/SimplifyCFG/2007-11-22-InvokeNoUnwind.ll @@ -1,4 +1,6 @@ -; RUN: opt < %s -simplifycfg -S | not grep invoke +; RUN: opt < %s -simplifycfg -S | FileCheck %s + +; CHECK-NOT: invoke declare i32 @func(i8*) nounwind diff --git a/test/Transforms/SimplifyCFG/2008-01-02-hoist-fp-add.ll b/test/Transforms/SimplifyCFG/2008-01-02-hoist-fp-add.ll index 14baeea..cf29b71 100644 --- a/test/Transforms/SimplifyCFG/2008-01-02-hoist-fp-add.ll +++ b/test/Transforms/SimplifyCFG/2008-01-02-hoist-fp-add.ll @@ -1,5 +1,5 @@ ; The phi should not be eliminated in this case, because the fp op could trap. -; RUN: opt < %s -simplifycfg -S | grep "= phi double" +; RUN: opt < %s -simplifycfg -S | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin8" @@ -19,6 +19,7 @@ cond_true: ; preds = %entry br label %cond_next cond_next: ; preds = %cond_true, %entry +; CHECK: = phi double %F.0 = phi double [ %tmp, %entry ], [ %tmp7, %cond_true ] ; <double> [#uses=1] store double %F.0, double* @G, align 8 ret void diff --git a/test/Transforms/SimplifyCFG/speculate-store.ll b/test/Transforms/SimplifyCFG/speculate-store.ll new file mode 100644 index 0000000..8d7fe79 --- /dev/null +++ b/test/Transforms/SimplifyCFG/speculate-store.ll @@ -0,0 +1,108 @@ +; RUN: opt -simplifycfg -S < %s | FileCheck %s + +define void @ifconvertstore(i32 %m, i32* %A, i32* %B, i32 %C, i32 %D) { +entry: + %arrayidx = getelementptr inbounds i32* %B, i64 0 + %0 = load i32* %arrayidx, align 4 + %add = add nsw i32 %0, %C + %arrayidx2 = getelementptr inbounds i32* %A, i64 0 + +; First store to the location. + store i32 %add, i32* %arrayidx2, align 4 + %arrayidx4 = getelementptr inbounds i32* %B, i64 1 + %1 = load i32* %arrayidx4, align 4 + %add5 = add nsw i32 %1, %D + %cmp6 = icmp sgt i32 %add5, %C + br i1 %cmp6, label %if.then, label %ret.end + +; Make sure we speculate stores like the following one. It is cheap compared to +; a mispredicated branch. +; CHECK: @ifconvertstore +; CHECK: %add5.add = select i1 %cmp6, i32 %add5, i32 %add +; CHECK: store i32 %add5.add, i32* %arrayidx2, align 4 +if.then: + store i32 %add5, i32* %arrayidx2, align 4 + br label %ret.end + +ret.end: + ret void +} + +define void @noifconvertstore1(i32 %m, i32* %A, i32* %B, i32 %C, i32 %D) { +entry: + %arrayidx = getelementptr inbounds i32* %B, i64 0 + %0 = load i32* %arrayidx, align 4 + %add = add nsw i32 %0, %C + %arrayidx2 = getelementptr inbounds i32* %A, i64 0 + +; Store to a different location. + store i32 %add, i32* %arrayidx, align 4 + %arrayidx4 = getelementptr inbounds i32* %B, i64 1 + %1 = load i32* %arrayidx4, align 4 + %add5 = add nsw i32 %1, %D + %cmp6 = icmp sgt i32 %add5, %C + br i1 %cmp6, label %if.then, label %ret.end + +; CHECK: @noifconvertstore1 +; CHECK-NOT: select +if.then: + store i32 %add5, i32* %arrayidx2, align 4 + br label %ret.end + +ret.end: + ret void +} + +declare void @unknown_fun() + +define void @noifconvertstore2(i32 %m, i32* %A, i32* %B, i32 %C, i32 %D) { +entry: + %arrayidx = getelementptr inbounds i32* %B, i64 0 + %0 = load i32* %arrayidx, align 4 + %add = add nsw i32 %0, %C + %arrayidx2 = getelementptr inbounds i32* %A, i64 0 + +; First store to the location. + store i32 %add, i32* %arrayidx2, align 4 + call void @unknown_fun() + %arrayidx4 = getelementptr inbounds i32* %B, i64 1 + %1 = load i32* %arrayidx4, align 4 + %add5 = add nsw i32 %1, %D + %cmp6 = icmp sgt i32 %add5, %C + br i1 %cmp6, label %if.then, label %ret.end + +; CHECK: @noifconvertstore2 +; CHECK-NOT: select +if.then: + store i32 %add5, i32* %arrayidx2, align 4 + br label %ret.end + +ret.end: + ret void +} + +define void @noifconvertstore_volatile(i32 %m, i32* %A, i32* %B, i32 %C, i32 %D) { +entry: + %arrayidx = getelementptr inbounds i32* %B, i64 0 + %0 = load i32* %arrayidx, align 4 + %add = add nsw i32 %0, %C + %arrayidx2 = getelementptr inbounds i32* %A, i64 0 + +; First store to the location. + store i32 %add, i32* %arrayidx2, align 4 + %arrayidx4 = getelementptr inbounds i32* %B, i64 1 + %1 = load i32* %arrayidx4, align 4 + %add5 = add nsw i32 %1, %D + %cmp6 = icmp sgt i32 %add5, %C + br i1 %cmp6, label %if.then, label %ret.end + +; Make sure we don't speculate volatile stores. +; CHECK: @noifconvertstore_volatile +; CHECK-NOT: select +if.then: + store volatile i32 %add5, i32* %arrayidx2, align 4 + br label %ret.end + +ret.end: + ret void +} diff --git a/test/Transforms/SimplifyCFG/switch-to-icmp.ll b/test/Transforms/SimplifyCFG/switch-to-icmp.ll index 414f847..e9a6db4 100644 --- a/test/Transforms/SimplifyCFG/switch-to-icmp.ll +++ b/test/Transforms/SimplifyCFG/switch-to-icmp.ll @@ -37,3 +37,21 @@ lor.end: ; CHECK: @test2 ; CHECK: %switch = icmp ult i32 %x, 2 } + +define i32 @test3(i1 %flag) { +entry: + switch i1 %flag, label %bad [ + i1 true, label %good + i1 false, label %good + ] + +good: + ret i32 0 + +bad: + ret i32 1 + +; CHECK: @test3 +; CHECK: entry: +; CHECK-NEXT: ret i32 0 +} diff --git a/test/Transforms/SimplifyLibCalls/2009-02-11-NotInitialized.ll b/test/Transforms/SimplifyLibCalls/2009-02-11-NotInitialized.ll deleted file mode 100644 index ac89199..0000000 --- a/test/Transforms/SimplifyLibCalls/2009-02-11-NotInitialized.ll +++ /dev/null @@ -1,13 +0,0 @@ -; RUN: opt < %s -inline -simplify-libcalls -functionattrs | \ -; RUN: llvm-dis | grep nocapture | count 2 -; Check that nocapture attributes are added when run after an SCC pass. -; PR3520 - -define i32 @use(i8* %x) nounwind readonly { -entry: - %0 = tail call i64 @strlen(i8* %x) nounwind readonly ; <i64> [#uses=1] - %1 = trunc i64 %0 to i32 ; <i32> [#uses=1] - ret i32 %1 -} - -declare i64 @strlen(i8*) nounwind readonly diff --git a/test/Unit/lit.cfg b/test/Unit/lit.cfg index 8dc7853..15cf626 100644 --- a/test/Unit/lit.cfg +++ b/test/Unit/lit.cfg @@ -28,6 +28,11 @@ if 'TMP' in os.environ: if 'TEMP' in os.environ: config.environment['TEMP'] = os.environ['TEMP'] +# Propagate path to symbolizer for ASan/MSan. +for symbolizer in ['ASAN_SYMBOLIZER_PATH', 'MSAN_SYMBOLIZER_PATH']: + if symbolizer in os.environ: + config.environment[symbolizer] = os.environ[symbolizer] + ### # Check that the object root is known. @@ -81,10 +86,3 @@ if config.enable_shared: shlibpath = os.pathsep + shlibpath shlibpath = config.shlibdir + shlibpath config.environment[config.shlibpath_var] = shlibpath - -# Setup paths to llvm-symbolizer for Sanitizer tools. -llvm_tools_dir = getattr(config, 'llvm_tools_dir', None) -if llvm_tools_dir: - llvm_symbolizer_path = os.path.join(llvm_tools_dir, 'llvm-symbolizer') - config.environment['ASAN_SYMBOLIZER_PATH'] = llvm_symbolizer_path - config.environment['MSAN_SYMBOLIZER_PATH'] = llvm_symbolizer_path diff --git a/test/Verifier/2002-04-13-RetTypes.ll b/test/Verifier/2002-04-13-RetTypes.ll index af46839..9385ebe 100644 --- a/test/Verifier/2002-04-13-RetTypes.ll +++ b/test/Verifier/2002-04-13-RetTypes.ll @@ -1,7 +1,8 @@ -; RUN: not llvm-as < %s 2>&1 | grep "value doesn't match function result type 'i32'" +; RUN: not llvm-as < %s 2>&1 | FileCheck %s ; Verify the operand type of the ret instructions in a function match the -; delcared return type of the function they live in. +; declared return type of the function they live in. +; CHECK: value doesn't match function result type 'i32' ; define i32 @testfunc() { diff --git a/test/Verifier/2002-11-05-GetelementptrPointers.ll b/test/Verifier/2002-11-05-GetelementptrPointers.ll index 108ae5f..66b233e 100644 --- a/test/Verifier/2002-11-05-GetelementptrPointers.ll +++ b/test/Verifier/2002-11-05-GetelementptrPointers.ll @@ -1,4 +1,5 @@ -; RUN: not llvm-as < %s 2>&1 | grep "invalid getelementptr indices" +; RUN: not llvm-as < %s 2>&1 | FileCheck %s +; CHECK: invalid getelementptr indices ; This testcase is invalid because we are indexing into a pointer that is ; contained WITHIN a structure. diff --git a/test/Verifier/2006-07-11-StoreStruct.ll b/test/Verifier/2006-07-11-StoreStruct.ll index 65b229d..70aea87 100644 --- a/test/Verifier/2006-07-11-StoreStruct.ll +++ b/test/Verifier/2006-07-11-StoreStruct.ll @@ -1,4 +1,6 @@ -; RUN: llvm-as < %s 2>&1 | not grep "Instruction operands must be first-class" +; RUN: llvm-as < %s 2>&1 | FileCheck %s + +; CHECK-NOT: Instruction operands must be first-class ; This previously was for PR826, but structs are now first-class so ; the following is now valid. diff --git a/test/Verifier/2006-10-15-AddrLabel.ll b/test/Verifier/2006-10-15-AddrLabel.ll index c8fedb5..decbf5b 100644 --- a/test/Verifier/2006-10-15-AddrLabel.ll +++ b/test/Verifier/2006-10-15-AddrLabel.ll @@ -1,5 +1,6 @@ ; RUN: not llvm-as < %s > /dev/null 2> %t -; RUN: grep "basic block pointers are invalid" %t +; RUN: FileCheck %s --input-file=%t +; CHECK: basic block pointers are invalid define i32 @main() { %foo = call i8* %llvm.stacksave() diff --git a/test/Verifier/2006-12-12-IntrinsicDefine.ll b/test/Verifier/2006-12-12-IntrinsicDefine.ll index 6e7468c..8cc3d24 100644 --- a/test/Verifier/2006-12-12-IntrinsicDefine.ll +++ b/test/Verifier/2006-12-12-IntrinsicDefine.ll @@ -1,4 +1,5 @@ -; RUN: not llvm-as < %s 2>&1 | grep "llvm intrinsics cannot be defined" +; RUN: not llvm-as < %s 2>&1 | FileCheck %s +; CHECK: llvm intrinsics cannot be defined ; PR1047 define void @llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1) { diff --git a/test/Verifier/2008-03-01-AllocaSized.ll b/test/Verifier/2008-03-01-AllocaSized.ll index 51258be..fc12a96 100644 --- a/test/Verifier/2008-03-01-AllocaSized.ll +++ b/test/Verifier/2008-03-01-AllocaSized.ll @@ -1,4 +1,5 @@ -; RUN: not llvm-as %s -o /dev/null 2>&1 | grep "Cannot allocate unsized type" +; RUN: not llvm-as %s -o /dev/null 2>&1 | FileCheck %s +; CHECK: Cannot allocate unsized type ; PR2113 define void @test() { diff --git a/test/Verifier/2008-08-22-MemCpyAlignment.ll b/test/Verifier/2008-08-22-MemCpyAlignment.ll index c6d5afd..3f7cb52 100644 --- a/test/Verifier/2008-08-22-MemCpyAlignment.ll +++ b/test/Verifier/2008-08-22-MemCpyAlignment.ll @@ -1,4 +1,5 @@ -; RUN: not llvm-as %s -o /dev/null 2>&1 | grep "alignment argument of memory intrinsics must be a constant int" +; RUN: not llvm-as %s -o /dev/null 2>&1 | FileCheck %s +; CHECK: alignment argument of memory intrinsics must be a constant int ; PR2318 define void @x(i8* %a, i8* %src, i64 %len, i32 %align) nounwind { diff --git a/test/Verifier/2008-11-15-RetVoid.ll b/test/Verifier/2008-11-15-RetVoid.ll index 42503fa..62f6da1 100644 --- a/test/Verifier/2008-11-15-RetVoid.ll +++ b/test/Verifier/2008-11-15-RetVoid.ll @@ -1,4 +1,5 @@ -; RUN: not llvm-as < %s 2>&1 | grep "value doesn't match function result type 'void'" +; RUN: not llvm-as < %s 2>&1 | FileCheck %s +; CHECK: value doesn't match function result type 'void' define void @foo() { ret i32 0 diff --git a/test/Verifier/2010-08-07-PointerIntrinsic.ll b/test/Verifier/2010-08-07-PointerIntrinsic.ll index 3136c61..a668d04 100644 --- a/test/Verifier/2010-08-07-PointerIntrinsic.ll +++ b/test/Verifier/2010-08-07-PointerIntrinsic.ll @@ -1,5 +1,6 @@ ; RUN: not llvm-as < %s 2> %t -; RUN: grep "Broken module" %t +; RUN: FileCheck %s --input-file=%t +; CHECK: Broken module ; PR7316 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:32" diff --git a/test/Verifier/AmbiguousPhi.ll b/test/Verifier/AmbiguousPhi.ll index f31bc10..cb05a72 100644 --- a/test/Verifier/AmbiguousPhi.ll +++ b/test/Verifier/AmbiguousPhi.ll @@ -1,6 +1,5 @@ -; RUN: not llvm-as < %s 2>&1 | grep "multiple entries for the same basic block" - - +; RUN: not llvm-as < %s 2>&1 | FileCheck %s +; CHECK: multiple entries for the same basic block define i32 @test(i32 %i, i32 %j, i1 %c) { br i1 %c, label %A, label %A diff --git a/test/Verifier/PhiGrouping.ll b/test/Verifier/PhiGrouping.ll index 7b42fd2..291f084 100644 --- a/test/Verifier/PhiGrouping.ll +++ b/test/Verifier/PhiGrouping.ll @@ -1,6 +1,5 @@ -; RUN: not llvm-as < %s 2>&1 | grep "PHI nodes not grouped at top" - - +; RUN: not llvm-as < %s 2>&1 | FileCheck %s +; CHECK: PHI nodes not grouped at top define i32 @test(i32 %i, i32 %j, i1 %c) { br i1 %c, label %A, label %B diff --git a/test/Verifier/SelfReferential.ll b/test/Verifier/SelfReferential.ll index c24c0eb..7f0166a 100644 --- a/test/Verifier/SelfReferential.ll +++ b/test/Verifier/SelfReferential.ll @@ -1,4 +1,5 @@ -; RUN: not llvm-as %s -o /dev/null 2>&1 | grep "Only PHI nodes may reference their own value" +; RUN: not llvm-as %s -o /dev/null 2>&1 | FileCheck %s +; CHECK: Only PHI nodes may reference their own value ; Test that self referential instructions are not allowed diff --git a/test/Verifier/aliasing-chain.ll b/test/Verifier/aliasing-chain.ll index a52e796..ae0b77f 100644 --- a/test/Verifier/aliasing-chain.ll +++ b/test/Verifier/aliasing-chain.ll @@ -1,5 +1,5 @@ -; RUN: not llvm-as %s -o /dev/null 2>&1 | grep "Aliasing chain should end with function or global variable" - +; RUN: not llvm-as %s -o /dev/null 2>&1 | FileCheck %s +; CHECK: Aliasing chain should end with function or global variable ; Test that alising chain does not create a cycle @b1 = alias i32* @c1 diff --git a/test/Verifier/llvm.compiler_used-invalid-type.ll b/test/Verifier/llvm.compiler_used-invalid-type.ll new file mode 100644 index 0000000..0913027 --- /dev/null +++ b/test/Verifier/llvm.compiler_used-invalid-type.ll @@ -0,0 +1,6 @@ +; RUN: not llvm-as < %s -o /dev/null 2>&1 | FileCheck %s + +@llvm.compiler_used = appending global [1 x i32] [i32 0], section "llvm.metadata" + +; CHECK: wrong type for intrinsic global variable +; CHECK-NEXT: [1 x i32]* @llvm.compiler_used diff --git a/test/Verifier/llvm.used-invalid-init.ll b/test/Verifier/llvm.used-invalid-init.ll new file mode 100644 index 0000000..b0887c9 --- /dev/null +++ b/test/Verifier/llvm.used-invalid-init.ll @@ -0,0 +1,6 @@ +; RUN: not llvm-as < %s -o /dev/null 2>&1 | FileCheck %s + +@llvm.used = appending global [1 x i8*] zeroinitializer, section "llvm.metadata" + +; CHECK: wrong initalizer for intrinsic global variable +; CHECK-NEXT: [1 x i8*] zeroinitializer diff --git a/test/Verifier/llvm.used-invalid-init2.ll b/test/Verifier/llvm.used-invalid-init2.ll new file mode 100644 index 0000000..ee8a970 --- /dev/null +++ b/test/Verifier/llvm.used-invalid-init2.ll @@ -0,0 +1,7 @@ +; RUN: not llvm-as < %s -o /dev/null 2>&1 | FileCheck %s + +@a = global i8 42 +@llvm.used = appending global [2 x i8*] [i8* @a, i8* null], section "llvm.metadata" + +; CHECK: invalid llvm.used member +; CHECK-NEXT: i8* null diff --git a/test/Verifier/llvm.used-invalid-type.ll b/test/Verifier/llvm.used-invalid-type.ll new file mode 100644 index 0000000..2de5c86 --- /dev/null +++ b/test/Verifier/llvm.used-invalid-type.ll @@ -0,0 +1,6 @@ +; RUN: not llvm-as < %s -o /dev/null 2>&1 | FileCheck %s + +@llvm.used = appending global [1 x i32] [i32 0], section "llvm.metadata" + +; CHECK: wrong type for intrinsic global variable +; CHECK-NEXT: [1 x i32]* @llvm.used diff --git a/test/Verifier/llvm.used-invalid-type2.ll b/test/Verifier/llvm.used-invalid-type2.ll new file mode 100644 index 0000000..bff3f2d --- /dev/null +++ b/test/Verifier/llvm.used-invalid-type2.ll @@ -0,0 +1,5 @@ +; RUN: not llvm-as < %s -o /dev/null 2>&1 | FileCheck %s +@llvm.used = appending global i32 0, section "llvm.metadata" + +; CHECK: Only global arrays can have appending linkage! +; CHEKC-NEXT: i32* @llvm.used diff --git a/test/Verifier/llvm.used-ptr-type.ll b/test/Verifier/llvm.used-ptr-type.ll new file mode 100644 index 0000000..adfb169 --- /dev/null +++ b/test/Verifier/llvm.used-ptr-type.ll @@ -0,0 +1,4 @@ +; RUN: llvm-as < %s -o /dev/null + +@a = global i32 42 +@llvm.used = appending global [1 x i32*] [i32* @a], section "llvm.metadata" diff --git a/test/lit.cfg b/test/lit.cfg index 8ee2078..b423c6e 100644 --- a/test/lit.cfg +++ b/test/lit.cfg @@ -22,9 +22,18 @@ if sys.platform in ['win32']: config.environment['PATH'])) config.environment['PATH'] = path +# Choose between lit's internal shell pipeline runner and a real shell. If +# LIT_USE_INTERNAL_SHELL is in the environment, we use that as an override. +use_lit_shell = os.environ.get("LIT_USE_INTERNAL_SHELL") +if use_lit_shell: + # 0 is external, "" is default, and everything else is internal. + execute_external = (use_lit_shell == "0") +else: + # Otherwise we default to internal on Windows and external elsewhere, as + # bash on Windows is usually very slow. + execute_external = (not sys.platform in ['win32']) + # testFormat: The test format to use to interpret tests. -execute_external = (not sys.platform in ['win32'] - or lit.getBashPath() not in [None, ""]) config.test_format = lit.formats.ShTest(execute_external) # To ignore test output on stderr so it doesn't trigger failures uncomment this: @@ -47,26 +56,13 @@ llvm_obj_root = getattr(config, 'llvm_obj_root', None) if llvm_obj_root is not None: config.test_exec_root = os.path.join(llvm_obj_root, 'test') -# Tweak the PATH to include the scripts dir, the tools dir, and the llvm-gcc bin -# dir (if available). +# Tweak the PATH to include the tools dir. if llvm_obj_root is not None: - llvm_src_root = getattr(config, 'llvm_src_root', None) - if not llvm_src_root: - lit.fatal('No LLVM source root set!') - path = os.path.pathsep.join((os.path.join(llvm_src_root, 'test', - 'Scripts'), - config.environment['PATH'])) - config.environment['PATH'] = path - llvm_tools_dir = getattr(config, 'llvm_tools_dir', None) if not llvm_tools_dir: lit.fatal('No LLVM tools dir set!') path = os.path.pathsep.join((llvm_tools_dir, config.environment['PATH'])) config.environment['PATH'] = path - # Setup paths to llvm-symbolizer for Sanitizer tools. - llvm_symbolizer_path = os.path.join(llvm_tools_dir, 'llvm-symbolizer') - config.environment['ASAN_SYMBOLIZER_PATH'] = llvm_symbolizer_path - config.environment['MSAN_SYMBOLIZER_PATH'] = llvm_symbolizer_path # Propagate 'HOME' through the environment. if 'HOME' in os.environ: @@ -94,6 +90,11 @@ config.environment['LLVM_SRC_ROOT'] = getattr(config, 'llvm_src_root', '') config.environment['PYTHON_EXECUTABLE'] = getattr(config, 'python_executable', '') +# Propagate path to symbolizer for ASan/MSan. +for symbolizer in ['ASAN_SYMBOLIZER_PATH', 'MSAN_SYMBOLIZER_PATH']: + if symbolizer in os.environ: + config.environment[symbolizer] = os.environ[symbolizer] + ### import os @@ -239,7 +240,7 @@ for pattern in [r"\bbugpoint\b(?!-)", r"(?<!/|-)\bclang\b(?!-)", ### Features # Shell execution -if sys.platform not in ['win32'] or lit.getBashPath() != '': +if execute_external: config.available_features.add('shell') # Loadable module @@ -256,6 +257,20 @@ if loadable_module: if config.lto_is_enabled == "1" and platform.system() == "Darwin": config.available_features.add('lto_on_osx') +# Sanitizers. +if config.llvm_use_sanitizer == "Address": + config.available_features.add("asan") +if (config.llvm_use_sanitizer == "Memory" or + config.llvm_use_sanitizer == "MemoryWithOrigins"): + config.available_features.add("msan") + +# Direct object generation +if not 'hexagon' in config.target_triple: + config.available_features.add("object-emission") + +if config.have_zlib == "1": + config.available_features.add("zlib") + # llc knows whether he is compiled with -DNDEBUG. import subprocess try: diff --git a/test/lit.site.cfg.in b/test/lit.site.cfg.in index bfd901a..3a680b2 100644 --- a/test/lit.site.cfg.in +++ b/test/lit.site.cfg.in @@ -18,6 +18,8 @@ config.llvm_bindings = "@LLVM_BINDINGS@" config.host_os = "@HOST_OS@" config.host_arch = "@HOST_ARCH@" config.llvm_use_intel_jitevents = "@LLVM_USE_INTEL_JITEVENTS@" +config.llvm_use_sanitizer = "@LLVM_USE_SANITIZER@" +config.have_zlib = "@HAVE_LIBZ@" # Support substitution of the tools_dir with user parameters. This is # used when we can't determine the tool dir at configuration time. diff --git a/test/tools/llvm-readobj/Inputs/relocs.obj.coff-i386 b/test/tools/llvm-readobj/Inputs/relocs.obj.coff-i386 Binary files differnew file mode 100644 index 0000000..15e43ef --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/relocs.obj.coff-i386 diff --git a/test/tools/llvm-readobj/Inputs/relocs.obj.coff-x86_64 b/test/tools/llvm-readobj/Inputs/relocs.obj.coff-x86_64 Binary files differnew file mode 100644 index 0000000..cd63173 --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/relocs.obj.coff-x86_64 diff --git a/test/tools/llvm-readobj/Inputs/relocs.obj.elf-aarch64 b/test/tools/llvm-readobj/Inputs/relocs.obj.elf-aarch64 Binary files differnew file mode 100644 index 0000000..d39e60c --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/relocs.obj.elf-aarch64 diff --git a/test/tools/llvm-readobj/Inputs/relocs.obj.elf-arm b/test/tools/llvm-readobj/Inputs/relocs.obj.elf-arm Binary files differnew file mode 100644 index 0000000..908507d --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/relocs.obj.elf-arm diff --git a/test/tools/llvm-readobj/Inputs/relocs.obj.elf-i386 b/test/tools/llvm-readobj/Inputs/relocs.obj.elf-i386 Binary files differnew file mode 100644 index 0000000..7860df6 --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/relocs.obj.elf-i386 diff --git a/test/tools/llvm-readobj/Inputs/relocs.obj.elf-mips b/test/tools/llvm-readobj/Inputs/relocs.obj.elf-mips Binary files differnew file mode 100644 index 0000000..e387942 --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/relocs.obj.elf-mips diff --git a/test/tools/llvm-readobj/Inputs/relocs.obj.elf-mips64el b/test/tools/llvm-readobj/Inputs/relocs.obj.elf-mips64el Binary files differnew file mode 100644 index 0000000..a977964 --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/relocs.obj.elf-mips64el diff --git a/test/tools/llvm-readobj/Inputs/relocs.obj.elf-ppc64 b/test/tools/llvm-readobj/Inputs/relocs.obj.elf-ppc64 Binary files differnew file mode 100644 index 0000000..c46e4c0 --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/relocs.obj.elf-ppc64 diff --git a/test/tools/llvm-readobj/Inputs/relocs.obj.elf-x86_64 b/test/tools/llvm-readobj/Inputs/relocs.obj.elf-x86_64 Binary files differnew file mode 100644 index 0000000..3ca9d8c6 --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/relocs.obj.elf-x86_64 diff --git a/test/tools/llvm-readobj/Inputs/relocs.obj.macho-arm b/test/tools/llvm-readobj/Inputs/relocs.obj.macho-arm Binary files differnew file mode 100644 index 0000000..992ae17 --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/relocs.obj.macho-arm diff --git a/test/tools/llvm-readobj/Inputs/relocs.obj.macho-i386 b/test/tools/llvm-readobj/Inputs/relocs.obj.macho-i386 Binary files differnew file mode 100644 index 0000000..5305fe8 --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/relocs.obj.macho-i386 diff --git a/test/tools/llvm-readobj/Inputs/relocs.obj.macho-x86_64 b/test/tools/llvm-readobj/Inputs/relocs.obj.macho-x86_64 Binary files differnew file mode 100644 index 0000000..42b80dd --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/relocs.obj.macho-x86_64 diff --git a/test/tools/llvm-readobj/Inputs/relocs.py b/test/tools/llvm-readobj/Inputs/relocs.py new file mode 100644 index 0000000..232d080 --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/relocs.py @@ -0,0 +1,1086 @@ +#!/usr/bin/env python + +# Generates ELF, COFF and MachO object files for different architectures +# containing all relocations: +# +# ELF: i386, x86_64, ppc64, aarch64, arm, mips, mips64el +# COFF: i386, x86_64 +# MachO: i386, x86_64, arm +# (see end of file for triples) +# +# To simplify generation, object files are generated with just the proper +# number of relocations through repeated instructions. Afterwards, the +# relocations in the object file are patched to their proper value. + +import operator +import shutil +import StringIO +import struct +import subprocess +import sys + +class EnumType(type): + def __init__(self, name, bases = (), attributes = {}): + super(EnumType, self).__init__(name, bases, attributes) + + type.__setattr__(self, '_map', {}) + type.__setattr__(self, '_nameMap', {}) + + for symbol in attributes: + if symbol.startswith('__') or symbol.endswith('__'): + continue + + value = attributes[symbol] + + # MyEnum.symbol == value + type.__setattr__(self, symbol, value) + self._nameMap[symbol] = value + + # The first symbol with the given value is authoritative. + if not (value in self._map): + # MyEnum[value] == symbol + self._map[value] = symbol + + # Not supported (Enums are immutable). + def __setattr__(self, name, value): + raise NotSupportedException, self.__setattr__ + + # Not supported (Enums are immutable). + def __delattr__(self, name): + raise NotSupportedException, self.__delattr__ + + # Gets the enum symbol for the specified value. + def __getitem__(self, value): + symbol = self._map.get(value) + if symbol is None: + raise KeyError, value + return symbol + + # Gets the enum symbol for the specified value or none. + def lookup(self, value): + symbol = self._map.get(value) + return symbol + + # Not supported (Enums are immutable). + def __setitem__(self, value, symbol): + raise NotSupportedException, self.__setitem__ + + # Not supported (Enums are immutable). + def __delitem__(self, value): + raise NotSupportedException, self.__delitem__ + + def entries(self): + # sort by (value, name) + def makeKey(item): + return (item[1], item[0]) + e = [] + for pair in sorted(self._nameMap.iteritems(), key=makeKey): + e.append(pair) + return e + + def __iter__(self): + for e in self.entries(): + yield e + +Enum = EnumType('Enum', (), {}) + +class BinaryReader: + def __init__(self, path): + self.file = open(path, "r+b", 0) + self.isLSB = None + self.is64Bit = None + self.isN64 = False + + def tell(self): + return self.file.tell() + + def seek(self, pos): + self.file.seek(pos) + + def read(self, N): + data = self.file.read(N) + if len(data) != N: + raise ValueError, "Out of data!" + return data + + def int8(self): + return ord(self.read(1)) + + def uint8(self): + return ord(self.read(1)) + + def int16(self): + return struct.unpack('><'[self.isLSB] + 'h', self.read(2))[0] + + def uint16(self): + return struct.unpack('><'[self.isLSB] + 'H', self.read(2))[0] + + def int32(self): + return struct.unpack('><'[self.isLSB] + 'i', self.read(4))[0] + + def uint32(self): + return struct.unpack('><'[self.isLSB] + 'I', self.read(4))[0] + + def int64(self): + return struct.unpack('><'[self.isLSB] + 'q', self.read(8))[0] + + def uint64(self): + return struct.unpack('><'[self.isLSB] + 'Q', self.read(8))[0] + + def writeUInt8(self, value): + self.file.write(struct.pack('><'[self.isLSB] + 'B', value)) + + def writeUInt16(self, value): + self.file.write(struct.pack('><'[self.isLSB] + 'H', value)) + + def writeUInt32(self, value): + self.file.write(struct.pack('><'[self.isLSB] + 'I', value)) + + def writeUInt64(self, value): + self.file.write(struct.pack('><'[self.isLSB] + 'Q', value)) + + def word(self): + if self.is64Bit: + return self.uint64() + else: + return self.uint32() + + def writeWord(self, value): + if self.is64Bit: + self.writeUInt64(value) + else: + self.writeUInt32(value) + +class StringTable: + def __init__(self, strings): + self.string_table = strings + + def __getitem__(self, index): + end = self.string_table.index('\x00', index) + return self.string_table[index:end] + +class ElfSection: + def __init__(self, f): + self.sh_name = f.uint32() + self.sh_type = f.uint32() + self.sh_flags = f.word() + self.sh_addr = f.word() + self.sh_offset = f.word() + self.sh_size = f.word() + self.sh_link = f.uint32() + self.sh_info = f.uint32() + self.sh_addralign = f.word() + self.sh_entsize = f.word() + + def patch(self, f, relocs): + if self.sh_type == 4 or self.sh_type == 9: # SHT_RELA / SHT_REL + self.patchRelocs(f, relocs) + + def patchRelocs(self, f, relocs): + entries = self.sh_size // self.sh_entsize + + for index in range(entries): + f.seek(self.sh_offset + index * self.sh_entsize) + r_offset = f.word() + + if index < len(relocs): + ri = index + else: + ri = 0 + + if f.isN64: + r_sym = f.uint32() + r_ssym = f.uint8() + f.seek(f.tell()) + f.writeUInt8(relocs[ri][1]) + f.writeUInt8(relocs[ri][1]) + f.writeUInt8(relocs[ri][1]) + else: + pos = f.tell() + r_info = f.word() + + r_type = relocs[ri][1] + if f.is64Bit: + r_info = (r_info & 0xFFFFFFFF00000000) | (r_type & 0xFFFFFFFF) + else: + r_info = (r_info & 0xFF00) | (r_type & 0xFF) + + print(" %s" % relocs[ri][0]) + f.seek(pos) + f.writeWord(r_info) + + +class CoffSection: + def __init__(self, f): + self.raw_name = f.read(8) + self.virtual_size = f.uint32() + self.virtual_address = f.uint32() + self.raw_data_size = f.uint32() + self.pointer_to_raw_data = f.uint32() + self.pointer_to_relocations = f.uint32() + self.pointer_to_line_numbers = f.uint32() + self.relocation_count = f.uint16() + self.line_number_count = f.uint16() + self.characteristics = f.uint32() + + +def compileAsm(filename, triple, src): + cmd = ["llvm-mc", "-triple=" + triple, "-filetype=obj", "-o", filename] + print(" Running: " + " ".join(cmd)) + p = subprocess.Popen(cmd, stdin=subprocess.PIPE) + p.communicate(input=src) + p.wait() + +def compileIR(filename, triple, src): + cmd = ["llc", "-mtriple=" + triple, "-filetype=obj", "-o", filename] + print(" Running: " + " ".join(cmd)) + p = subprocess.Popen(cmd, stdin=subprocess.PIPE) + p.communicate(input=src) + p.wait() + + +def craftElf(filename, triple, relocs, dummyReloc): + print("Crafting " + filename + " for " + triple) + if type(dummyReloc) is tuple: + preSrc, dummyReloc, relocsPerDummy = dummyReloc + src = preSrc + "\n" + for i in range((len(relocs) + relocsPerDummy - 1) / relocsPerDummy): + src += dummyReloc.format(i) + "\n" + compileIR(filename, triple, src) + else: + src = (dummyReloc + "\n") * len(relocs) + compileAsm(filename, triple, src) + + print(" Patching relocations...") + patchElf(filename, relocs) + +def patchElf(path, relocs): + f = BinaryReader(path) + + magic = f.read(4) + assert magic == '\x7FELF' + + fileclass = f.uint8() + if fileclass == 1: + f.is64Bit = False + elif fileclass == 2: + f.is64Bit = True + else: + raise ValueError, "Unknown file class %x" % fileclass + + byteordering = f.uint8() + if byteordering == 1: + f.isLSB = True + elif byteordering == 2: + f.isLSB = False + else: + raise ValueError, "Unknown byte ordering %x" % byteordering + + f.seek(18) + e_machine = f.uint16() + if e_machine == 0x0008 and f.is64Bit: # EM_MIPS && 64 bit + f.isN64 = True + + e_version = f.uint32() + e_entry = f.word() + e_phoff = f.word() + e_shoff = f.word() + e_flags = f.uint32() + e_ehsize = f.uint16() + e_phentsize = f.uint16() + e_phnum = f.uint16() + e_shentsize = f.uint16() + e_shnum = f.uint16() + e_shstrndx = f.uint16() + + sections = [] + for index in range(e_shnum): + f.seek(e_shoff + index * e_shentsize) + s = ElfSection(f) + sections.append(s) + + f.seek(sections[e_shstrndx].sh_offset) + shstrtab = StringTable(f.read(sections[e_shstrndx].sh_size)) + + strtab = None + for section in sections: + if shstrtab[section.sh_name] == ".strtab": + f.seek(section.sh_offset) + strtab = StringTable(f.read(section.sh_size)) + break + + for index in range(e_shnum): + sections[index].patch(f, relocs) + + +def craftCoff(filename, triple, relocs, dummyReloc): + print("Crafting " + filename + " for " + triple) + src = (dummyReloc + "\n") * len(relocs) + compileAsm(filename, triple, src) + + print(" Patching relocations...") + patchCoff(filename, relocs) + +def patchCoff(path, relocs): + f = BinaryReader(path) + f.isLSB = True + + machine_type = f.uint16() + section_count = f.uint16() + f.seek(20) + sections = [CoffSection(f) for idx in range(section_count)] + + section = sections[0] + f.seek(section.pointer_to_relocations) + for i in range(section.relocation_count): + virtual_addr = f.uint32() + symtab_idx = f.uint32() + print(" %s" % relocs[i][0]) + f.writeUInt16(relocs[i][1]) + + +def craftMacho(filename, triple, relocs, dummyReloc): + print("Crafting " + filename + " for " + triple) + + if type(dummyReloc) is tuple: + srcType, preSrc, dummyReloc, relocsPerDummy = dummyReloc + src = preSrc + "\n" + for i in range((len(relocs) + relocsPerDummy - 1) / relocsPerDummy): + src += dummyReloc.format(i) + "\n" + if srcType == "asm": + compileAsm(filename, triple, src) + elif srcType == "ir": + compileIR(filename, triple, src) + else: + src = (dummyReloc + "\n") * len(relocs) + compileAsm(filename, triple, src) + + print(" Patching relocations...") + patchMacho(filename, relocs) + +def patchMacho(filename, relocs): + f = BinaryReader(filename) + + magic = f.read(4) + if magic == '\xFE\xED\xFA\xCE': + f.isLSB, f.is64Bit = False, False + elif magic == '\xCE\xFA\xED\xFE': + f.isLSB, f.is64Bit = True, False + elif magic == '\xFE\xED\xFA\xCF': + f.isLSB, f.is64Bit = False, True + elif magic == '\xCF\xFA\xED\xFE': + f.isLSB, f.is64Bit = True, True + else: + raise ValueError,"Not a Mach-O object file: %r (bad magic)" % path + + cputype = f.uint32() + cpusubtype = f.uint32() + filetype = f.uint32() + numLoadCommands = f.uint32() + loadCommandsSize = f.uint32() + flag = f.uint32() + if f.is64Bit: + reserved = f.uint32() + + start = f.tell() + + for i in range(numLoadCommands): + patchMachoLoadCommand(f, relocs) + + if f.tell() - start != loadCommandsSize: + raise ValueError,"%s: warning: invalid load commands size: %r" % ( + sys.argv[0], loadCommandsSize) + +def patchMachoLoadCommand(f, relocs): + start = f.tell() + cmd = f.uint32() + cmdSize = f.uint32() + + if cmd == 1: + patchMachoSegmentLoadCommand(f, relocs) + elif cmd == 25: + patchMachoSegmentLoadCommand(f, relocs) + else: + f.read(cmdSize - 8) + + if f.tell() - start != cmdSize: + raise ValueError,"%s: warning: invalid load command size: %r" % ( + sys.argv[0], cmdSize) + +def patchMachoSegmentLoadCommand(f, relocs): + segment_name = f.read(16) + vm_addr = f.word() + vm_size = f.word() + file_offset = f.word() + file_size = f.word() + maxprot = f.uint32() + initprot = f.uint32() + numSections = f.uint32() + flags = f.uint32() + for i in range(numSections): + patchMachoSection(f, relocs) + +def patchMachoSection(f, relocs): + section_name = f.read(16) + segment_name = f.read(16) + address = f.word() + size = f.word() + offset = f.uint32() + alignment = f.uint32() + relocOffset = f.uint32() + numReloc = f.uint32() + flags = f.uint32() + reserved1 = f.uint32() + reserved2 = f.uint32() + if f.is64Bit: + reserved3 = f.uint32() + + prev_pos = f.tell() + + f.seek(relocOffset) + for i in range(numReloc): + ri = i < len(relocs) and i or 0 + print(" %s" % relocs[ri][0]) + word1 = f.uint32() + pos = f.tell() + value = f.uint32() + f.seek(pos) + value = (value & 0x0FFFFFFF) | ((relocs[ri][1] & 0xF) << 28) + f.writeUInt32(value) + f.seek(prev_pos) + + +class Relocs_Elf_X86_64(Enum): + R_X86_64_NONE = 0 + R_X86_64_64 = 1 + R_X86_64_PC32 = 2 + R_X86_64_GOT32 = 3 + R_X86_64_PLT32 = 4 + R_X86_64_COPY = 5 + R_X86_64_GLOB_DAT = 6 + R_X86_64_JUMP_SLOT = 7 + R_X86_64_RELATIVE = 8 + R_X86_64_GOTPCREL = 9 + R_X86_64_32 = 10 + R_X86_64_32S = 11 + R_X86_64_16 = 12 + R_X86_64_PC16 = 13 + R_X86_64_8 = 14 + R_X86_64_PC8 = 15 + R_X86_64_DTPMOD64 = 16 + R_X86_64_DTPOFF64 = 17 + R_X86_64_TPOFF64 = 18 + R_X86_64_TLSGD = 19 + R_X86_64_TLSLD = 20 + R_X86_64_DTPOFF32 = 21 + R_X86_64_GOTTPOFF = 22 + R_X86_64_TPOFF32 = 23 + R_X86_64_PC64 = 24 + R_X86_64_GOTOFF64 = 25 + R_X86_64_GOTPC32 = 26 + R_X86_64_GOT64 = 27 + R_X86_64_GOTPCREL64 = 28 + R_X86_64_GOTPC64 = 29 + R_X86_64_GOTPLT64 = 30 + R_X86_64_PLTOFF64 = 31 + R_X86_64_SIZE32 = 32 + R_X86_64_SIZE64 = 33 + R_X86_64_GOTPC32_TLSDESC = 34 + R_X86_64_TLSDESC_CALL = 35 + R_X86_64_TLSDESC = 36 + R_X86_64_IRELATIVE = 37 + +class Relocs_Elf_i386(Enum): + R_386_NONE = 0 + R_386_32 = 1 + R_386_PC32 = 2 + R_386_GOT32 = 3 + R_386_PLT32 = 4 + R_386_COPY = 5 + R_386_GLOB_DAT = 6 + R_386_JUMP_SLOT = 7 + R_386_RELATIVE = 8 + R_386_GOTOFF = 9 + R_386_GOTPC = 10 + R_386_32PLT = 11 + R_386_TLS_TPOFF = 14 + R_386_TLS_IE = 15 + R_386_TLS_GOTIE = 16 + R_386_TLS_LE = 17 + R_386_TLS_GD = 18 + R_386_TLS_LDM = 19 + R_386_16 = 20 + R_386_PC16 = 21 + R_386_8 = 22 + R_386_PC8 = 23 + R_386_TLS_GD_32 = 24 + R_386_TLS_GD_PUSH = 25 + R_386_TLS_GD_CALL = 26 + R_386_TLS_GD_POP = 27 + R_386_TLS_LDM_32 = 28 + R_386_TLS_LDM_PUSH = 29 + R_386_TLS_LDM_CALL = 30 + R_386_TLS_LDM_POP = 31 + R_386_TLS_LDO_32 = 32 + R_386_TLS_IE_32 = 33 + R_386_TLS_LE_32 = 34 + R_386_TLS_DTPMOD32 = 35 + R_386_TLS_DTPOFF32 = 36 + R_386_TLS_TPOFF32 = 37 + R_386_TLS_GOTDESC = 39 + R_386_TLS_DESC_CALL = 40 + R_386_TLS_DESC = 41 + R_386_IRELATIVE = 42 + R_386_NUM = 43 + +class Relocs_Elf_MBlaze(Enum): + R_MICROBLAZE_NONE = 0 + R_MICROBLAZE_32 = 1 + R_MICROBLAZE_32_PCREL = 2 + R_MICROBLAZE_64_PCREL = 3 + R_MICROBLAZE_32_PCREL_LO = 4 + R_MICROBLAZE_64 = 5 + R_MICROBLAZE_32_LO = 6 + R_MICROBLAZE_SRO32 = 7 + R_MICROBLAZE_SRW32 = 8 + R_MICROBLAZE_64_NONE = 9 + R_MICROBLAZE_32_SYM_OP_SYM = 10 + R_MICROBLAZE_GNU_VTINHERIT = 11 + R_MICROBLAZE_GNU_VTENTRY = 12 + R_MICROBLAZE_GOTPC_64 = 13 + R_MICROBLAZE_GOT_64 = 14 + R_MICROBLAZE_PLT_64 = 15 + R_MICROBLAZE_REL = 16 + R_MICROBLAZE_JUMP_SLOT = 17 + R_MICROBLAZE_GLOB_DAT = 18 + R_MICROBLAZE_GOTOFF_64 = 19 + R_MICROBLAZE_GOTOFF_32 = 20 + R_MICROBLAZE_COPY = 21 + +class Relocs_Elf_PPC32(Enum): + R_PPC_NONE = 0 + R_PPC_ADDR32 = 1 + R_PPC_ADDR24 = 2 + R_PPC_ADDR16 = 3 + R_PPC_ADDR16_LO = 4 + R_PPC_ADDR16_HI = 5 + R_PPC_ADDR16_HA = 6 + R_PPC_ADDR14 = 7 + R_PPC_ADDR14_BRTAKEN = 8 + R_PPC_ADDR14_BRNTAKEN = 9 + R_PPC_REL24 = 10 + R_PPC_REL14 = 11 + R_PPC_REL14_BRTAKEN = 12 + R_PPC_REL14_BRNTAKEN = 13 + R_PPC_REL32 = 26 + R_PPC_TPREL16_LO = 70 + R_PPC_TPREL16_HA = 72 + +class Relocs_Elf_PPC64(Enum): + R_PPC64_NONE = 0 + R_PPC64_ADDR32 = 1 + R_PPC64_ADDR16_LO = 4 + R_PPC64_ADDR16_HI = 5 + R_PPC64_ADDR14 = 7 + R_PPC64_REL24 = 10 + R_PPC64_REL32 = 26 + R_PPC64_ADDR64 = 38 + R_PPC64_ADDR16_HIGHER = 39 + R_PPC64_ADDR16_HIGHEST = 41 + R_PPC64_REL64 = 44 + R_PPC64_TOC16 = 47 + R_PPC64_TOC16_LO = 48 + R_PPC64_TOC16_HA = 50 + R_PPC64_TOC = 51 + R_PPC64_ADDR16_DS = 56 + R_PPC64_ADDR16_LO_DS = 57 + R_PPC64_TOC16_DS = 63 + R_PPC64_TOC16_LO_DS = 64 + R_PPC64_TLS = 67 + R_PPC64_TPREL16_LO = 70 + R_PPC64_TPREL16_HA = 72 + R_PPC64_DTPREL16_LO = 75 + R_PPC64_DTPREL16_HA = 77 + R_PPC64_GOT_TLSGD16_LO = 80 + R_PPC64_GOT_TLSGD16_HA = 82 + R_PPC64_GOT_TLSLD16_LO = 84 + R_PPC64_GOT_TLSLD16_HA = 86 + R_PPC64_GOT_TPREL16_LO_DS = 88 + R_PPC64_GOT_TPREL16_HA = 90 + R_PPC64_TLSGD = 107 + R_PPC64_TLSLD = 108 + +class Relocs_Elf_AArch64(Enum): + R_AARCH64_NONE = 0x100 + R_AARCH64_ABS64 = 0x101 + R_AARCH64_ABS32 = 0x102 + R_AARCH64_ABS16 = 0x103 + R_AARCH64_PREL64 = 0x104 + R_AARCH64_PREL32 = 0x105 + R_AARCH64_PREL16 = 0x106 + R_AARCH64_MOVW_UABS_G0 = 0x107 + R_AARCH64_MOVW_UABS_G0_NC = 0x108 + R_AARCH64_MOVW_UABS_G1 = 0x109 + R_AARCH64_MOVW_UABS_G1_NC = 0x10a + R_AARCH64_MOVW_UABS_G2 = 0x10b + R_AARCH64_MOVW_UABS_G2_NC = 0x10c + R_AARCH64_MOVW_UABS_G3 = 0x10d + R_AARCH64_MOVW_SABS_G0 = 0x10e + R_AARCH64_MOVW_SABS_G1 = 0x10f + R_AARCH64_MOVW_SABS_G2 = 0x110 + R_AARCH64_LD_PREL_LO19 = 0x111 + R_AARCH64_ADR_PREL_LO21 = 0x112 + R_AARCH64_ADR_PREL_PG_HI21 = 0x113 + R_AARCH64_ADD_ABS_LO12_NC = 0x115 + R_AARCH64_LDST8_ABS_LO12_NC = 0x116 + R_AARCH64_TSTBR14 = 0x117 + R_AARCH64_CONDBR19 = 0x118 + R_AARCH64_JUMP26 = 0x11a + R_AARCH64_CALL26 = 0x11b + R_AARCH64_LDST16_ABS_LO12_NC = 0x11c + R_AARCH64_LDST32_ABS_LO12_NC = 0x11d + R_AARCH64_LDST64_ABS_LO12_NC = 0x11e + R_AARCH64_LDST128_ABS_LO12_NC = 0x12b + R_AARCH64_ADR_GOT_PAGE = 0x137 + R_AARCH64_LD64_GOT_LO12_NC = 0x138 + R_AARCH64_TLSLD_MOVW_DTPREL_G2 = 0x20b + R_AARCH64_TLSLD_MOVW_DTPREL_G1 = 0x20c + R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC = 0x20d + R_AARCH64_TLSLD_MOVW_DTPREL_G0 = 0x20e + R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC = 0x20f + R_AARCH64_TLSLD_ADD_DTPREL_HI12 = 0x210 + R_AARCH64_TLSLD_ADD_DTPREL_LO12 = 0x211 + R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC = 0x212 + R_AARCH64_TLSLD_LDST8_DTPREL_LO12 = 0x213 + R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC = 0x214 + R_AARCH64_TLSLD_LDST16_DTPREL_LO12 = 0x215 + R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC = 0x216 + R_AARCH64_TLSLD_LDST32_DTPREL_LO12 = 0x217 + R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC = 0x218 + R_AARCH64_TLSLD_LDST64_DTPREL_LO12 = 0x219 + R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC = 0x21a + R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 = 0x21b + R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC = 0x21c + R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 = 0x21d + R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC = 0x21e + R_AARCH64_TLSIE_LD_GOTTPREL_PREL19 = 0x21f + R_AARCH64_TLSLE_MOVW_TPREL_G2 = 0x220 + R_AARCH64_TLSLE_MOVW_TPREL_G1 = 0x221 + R_AARCH64_TLSLE_MOVW_TPREL_G1_NC = 0x222 + R_AARCH64_TLSLE_MOVW_TPREL_G0 = 0x223 + R_AARCH64_TLSLE_MOVW_TPREL_G0_NC = 0x224 + R_AARCH64_TLSLE_ADD_TPREL_HI12 = 0x225 + R_AARCH64_TLSLE_ADD_TPREL_LO12 = 0x226 + R_AARCH64_TLSLE_ADD_TPREL_LO12_NC = 0x227 + R_AARCH64_TLSLE_LDST8_TPREL_LO12 = 0x228 + R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC = 0x229 + R_AARCH64_TLSLE_LDST16_TPREL_LO12 = 0x22a + R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC = 0x22b + R_AARCH64_TLSLE_LDST32_TPREL_LO12 = 0x22c + R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC = 0x22d + R_AARCH64_TLSLE_LDST64_TPREL_LO12 = 0x22e + R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC = 0x22f + R_AARCH64_TLSDESC_ADR_PAGE = 0x232 + R_AARCH64_TLSDESC_LD64_LO12_NC = 0x233 + R_AARCH64_TLSDESC_ADD_LO12_NC = 0x234 + R_AARCH64_TLSDESC_CALL = 0x239 + +class Relocs_Elf_ARM(Enum): + R_ARM_NONE = 0x00 + R_ARM_PC24 = 0x01 + R_ARM_ABS32 = 0x02 + R_ARM_REL32 = 0x03 + R_ARM_LDR_PC_G0 = 0x04 + R_ARM_ABS16 = 0x05 + R_ARM_ABS12 = 0x06 + R_ARM_THM_ABS5 = 0x07 + R_ARM_ABS8 = 0x08 + R_ARM_SBREL32 = 0x09 + R_ARM_THM_CALL = 0x0a + R_ARM_THM_PC8 = 0x0b + R_ARM_BREL_ADJ = 0x0c + R_ARM_TLS_DESC = 0x0d + R_ARM_THM_SWI8 = 0x0e + R_ARM_XPC25 = 0x0f + R_ARM_THM_XPC22 = 0x10 + R_ARM_TLS_DTPMOD32 = 0x11 + R_ARM_TLS_DTPOFF32 = 0x12 + R_ARM_TLS_TPOFF32 = 0x13 + R_ARM_COPY = 0x14 + R_ARM_GLOB_DAT = 0x15 + R_ARM_JUMP_SLOT = 0x16 + R_ARM_RELATIVE = 0x17 + R_ARM_GOTOFF32 = 0x18 + R_ARM_BASE_PREL = 0x19 + R_ARM_GOT_BREL = 0x1a + R_ARM_PLT32 = 0x1b + R_ARM_CALL = 0x1c + R_ARM_JUMP24 = 0x1d + R_ARM_THM_JUMP24 = 0x1e + R_ARM_BASE_ABS = 0x1f + R_ARM_ALU_PCREL_7_0 = 0x20 + R_ARM_ALU_PCREL_15_8 = 0x21 + R_ARM_ALU_PCREL_23_15 = 0x22 + R_ARM_LDR_SBREL_11_0_NC = 0x23 + R_ARM_ALU_SBREL_19_12_NC = 0x24 + R_ARM_ALU_SBREL_27_20_CK = 0x25 + R_ARM_TARGET1 = 0x26 + R_ARM_SBREL31 = 0x27 + R_ARM_V4BX = 0x28 + R_ARM_TARGET2 = 0x29 + R_ARM_PREL31 = 0x2a + R_ARM_MOVW_ABS_NC = 0x2b + R_ARM_MOVT_ABS = 0x2c + R_ARM_MOVW_PREL_NC = 0x2d + R_ARM_MOVT_PREL = 0x2e + R_ARM_THM_MOVW_ABS_NC = 0x2f + R_ARM_THM_MOVT_ABS = 0x30 + R_ARM_THM_MOVW_PREL_NC = 0x31 + R_ARM_THM_MOVT_PREL = 0x32 + R_ARM_THM_JUMP19 = 0x33 + R_ARM_THM_JUMP6 = 0x34 + R_ARM_THM_ALU_PREL_11_0 = 0x35 + R_ARM_THM_PC12 = 0x36 + R_ARM_ABS32_NOI = 0x37 + R_ARM_REL32_NOI = 0x38 + R_ARM_ALU_PC_G0_NC = 0x39 + R_ARM_ALU_PC_G0 = 0x3a + R_ARM_ALU_PC_G1_NC = 0x3b + R_ARM_ALU_PC_G1 = 0x3c + R_ARM_ALU_PC_G2 = 0x3d + R_ARM_LDR_PC_G1 = 0x3e + R_ARM_LDR_PC_G2 = 0x3f + R_ARM_LDRS_PC_G0 = 0x40 + R_ARM_LDRS_PC_G1 = 0x41 + R_ARM_LDRS_PC_G2 = 0x42 + R_ARM_LDC_PC_G0 = 0x43 + R_ARM_LDC_PC_G1 = 0x44 + R_ARM_LDC_PC_G2 = 0x45 + R_ARM_ALU_SB_G0_NC = 0x46 + R_ARM_ALU_SB_G0 = 0x47 + R_ARM_ALU_SB_G1_NC = 0x48 + R_ARM_ALU_SB_G1 = 0x49 + R_ARM_ALU_SB_G2 = 0x4a + R_ARM_LDR_SB_G0 = 0x4b + R_ARM_LDR_SB_G1 = 0x4c + R_ARM_LDR_SB_G2 = 0x4d + R_ARM_LDRS_SB_G0 = 0x4e + R_ARM_LDRS_SB_G1 = 0x4f + R_ARM_LDRS_SB_G2 = 0x50 + R_ARM_LDC_SB_G0 = 0x51 + R_ARM_LDC_SB_G1 = 0x52 + R_ARM_LDC_SB_G2 = 0x53 + R_ARM_MOVW_BREL_NC = 0x54 + R_ARM_MOVT_BREL = 0x55 + R_ARM_MOVW_BREL = 0x56 + R_ARM_THM_MOVW_BREL_NC = 0x57 + R_ARM_THM_MOVT_BREL = 0x58 + R_ARM_THM_MOVW_BREL = 0x59 + R_ARM_TLS_GOTDESC = 0x5a + R_ARM_TLS_CALL = 0x5b + R_ARM_TLS_DESCSEQ = 0x5c + R_ARM_THM_TLS_CALL = 0x5d + R_ARM_PLT32_ABS = 0x5e + R_ARM_GOT_ABS = 0x5f + R_ARM_GOT_PREL = 0x60 + R_ARM_GOT_BREL12 = 0x61 + R_ARM_GOTOFF12 = 0x62 + R_ARM_GOTRELAX = 0x63 + R_ARM_GNU_VTENTRY = 0x64 + R_ARM_GNU_VTINHERIT = 0x65 + R_ARM_THM_JUMP11 = 0x66 + R_ARM_THM_JUMP8 = 0x67 + R_ARM_TLS_GD32 = 0x68 + R_ARM_TLS_LDM32 = 0x69 + R_ARM_TLS_LDO32 = 0x6a + R_ARM_TLS_IE32 = 0x6b + R_ARM_TLS_LE32 = 0x6c + R_ARM_TLS_LDO12 = 0x6d + R_ARM_TLS_LE12 = 0x6e + R_ARM_TLS_IE12GP = 0x6f + R_ARM_PRIVATE_0 = 0x70 + R_ARM_PRIVATE_1 = 0x71 + R_ARM_PRIVATE_2 = 0x72 + R_ARM_PRIVATE_3 = 0x73 + R_ARM_PRIVATE_4 = 0x74 + R_ARM_PRIVATE_5 = 0x75 + R_ARM_PRIVATE_6 = 0x76 + R_ARM_PRIVATE_7 = 0x77 + R_ARM_PRIVATE_8 = 0x78 + R_ARM_PRIVATE_9 = 0x79 + R_ARM_PRIVATE_10 = 0x7a + R_ARM_PRIVATE_11 = 0x7b + R_ARM_PRIVATE_12 = 0x7c + R_ARM_PRIVATE_13 = 0x7d + R_ARM_PRIVATE_14 = 0x7e + R_ARM_PRIVATE_15 = 0x7f + R_ARM_ME_TOO = 0x80 + R_ARM_THM_TLS_DESCSEQ16 = 0x81 + R_ARM_THM_TLS_DESCSEQ32 = 0x82 + +class Relocs_Elf_Mips(Enum): + R_MIPS_NONE = 0 + R_MIPS_16 = 1 + R_MIPS_32 = 2 + R_MIPS_REL32 = 3 + R_MIPS_26 = 4 + R_MIPS_HI16 = 5 + R_MIPS_LO16 = 6 + R_MIPS_GPREL16 = 7 + R_MIPS_LITERAL = 8 + R_MIPS_GOT16 = 9 + R_MIPS_PC16 = 10 + R_MIPS_CALL16 = 11 + R_MIPS_GPREL32 = 12 + R_MIPS_SHIFT5 = 16 + R_MIPS_SHIFT6 = 17 + R_MIPS_64 = 18 + R_MIPS_GOT_DISP = 19 + R_MIPS_GOT_PAGE = 20 + R_MIPS_GOT_OFST = 21 + R_MIPS_GOT_HI16 = 22 + R_MIPS_GOT_LO16 = 23 + R_MIPS_SUB = 24 + R_MIPS_INSERT_A = 25 + R_MIPS_INSERT_B = 26 + R_MIPS_DELETE = 27 + R_MIPS_HIGHER = 28 + R_MIPS_HIGHEST = 29 + R_MIPS_CALL_HI16 = 30 + R_MIPS_CALL_LO16 = 31 + R_MIPS_SCN_DISP = 32 + R_MIPS_REL16 = 33 + R_MIPS_ADD_IMMEDIATE = 34 + R_MIPS_PJUMP = 35 + R_MIPS_RELGOT = 36 + R_MIPS_JALR = 37 + R_MIPS_TLS_DTPMOD32 = 38 + R_MIPS_TLS_DTPREL32 = 39 + R_MIPS_TLS_DTPMOD64 = 40 + R_MIPS_TLS_DTPREL64 = 41 + R_MIPS_TLS_GD = 42 + R_MIPS_TLS_LDM = 43 + R_MIPS_TLS_DTPREL_HI16 = 44 + R_MIPS_TLS_DTPREL_LO16 = 45 + R_MIPS_TLS_GOTTPREL = 46 + R_MIPS_TLS_TPREL32 = 47 + R_MIPS_TLS_TPREL64 = 48 + R_MIPS_TLS_TPREL_HI16 = 49 + R_MIPS_TLS_TPREL_LO16 = 50 + R_MIPS_GLOB_DAT = 51 + R_MIPS_COPY = 126 + R_MIPS_JUMP_SLOT = 127 + R_MIPS_NUM = 218 + +class Relocs_Elf_Hexagon(Enum): + R_HEX_NONE = 0 + R_HEX_B22_PCREL = 1 + R_HEX_B15_PCREL = 2 + R_HEX_B7_PCREL = 3 + R_HEX_LO16 = 4 + R_HEX_HI16 = 5 + R_HEX_32 = 6 + R_HEX_16 = 7 + R_HEX_8 = 8 + R_HEX_GPREL16_0 = 9 + R_HEX_GPREL16_1 = 10 + R_HEX_GPREL16_2 = 11 + R_HEX_GPREL16_3 = 12 + R_HEX_HL16 = 13 + R_HEX_B13_PCREL = 14 + R_HEX_B9_PCREL = 15 + R_HEX_B32_PCREL_X = 16 + R_HEX_32_6_X = 17 + R_HEX_B22_PCREL_X = 18 + R_HEX_B15_PCREL_X = 19 + R_HEX_B13_PCREL_X = 20 + R_HEX_B9_PCREL_X = 21 + R_HEX_B7_PCREL_X = 22 + R_HEX_16_X = 23 + R_HEX_12_X = 24 + R_HEX_11_X = 25 + R_HEX_10_X = 26 + R_HEX_9_X = 27 + R_HEX_8_X = 28 + R_HEX_7_X = 29 + R_HEX_6_X = 30 + R_HEX_32_PCREL = 31 + R_HEX_COPY = 32 + R_HEX_GLOB_DAT = 33 + R_HEX_JMP_SLOT = 34 + R_HEX_RELATIVE = 35 + R_HEX_PLT_B22_PCREL = 36 + R_HEX_GOTREL_LO16 = 37 + R_HEX_GOTREL_HI16 = 38 + R_HEX_GOTREL_32 = 39 + R_HEX_GOT_LO16 = 40 + R_HEX_GOT_HI16 = 41 + R_HEX_GOT_32 = 42 + R_HEX_GOT_16 = 43 + R_HEX_DTPMOD_32 = 44 + R_HEX_DTPREL_LO16 = 45 + R_HEX_DTPREL_HI16 = 46 + R_HEX_DTPREL_32 = 47 + R_HEX_DTPREL_16 = 48 + R_HEX_GD_PLT_B22_PCREL = 49 + R_HEX_GD_GOT_LO16 = 50 + R_HEX_GD_GOT_HI16 = 51 + R_HEX_GD_GOT_32 = 52 + R_HEX_GD_GOT_16 = 53 + R_HEX_IE_LO16 = 54 + R_HEX_IE_HI16 = 55 + R_HEX_IE_32 = 56 + R_HEX_IE_GOT_LO16 = 57 + R_HEX_IE_GOT_HI16 = 58 + R_HEX_IE_GOT_32 = 59 + R_HEX_IE_GOT_16 = 60 + R_HEX_TPREL_LO16 = 61 + R_HEX_TPREL_HI16 = 62 + R_HEX_TPREL_32 = 63 + R_HEX_TPREL_16 = 64 + R_HEX_6_PCREL_X = 65 + R_HEX_GOTREL_32_6_X = 66 + R_HEX_GOTREL_16_X = 67 + R_HEX_GOTREL_11_X = 68 + R_HEX_GOT_32_6_X = 69 + R_HEX_GOT_16_X = 70 + R_HEX_GOT_11_X = 71 + R_HEX_DTPREL_32_6_X = 72 + R_HEX_DTPREL_16_X = 73 + R_HEX_DTPREL_11_X = 74 + R_HEX_GD_GOT_32_6_X = 75 + R_HEX_GD_GOT_16_X = 76 + R_HEX_GD_GOT_11_X = 77 + R_HEX_IE_32_6_X = 78 + R_HEX_IE_16_X = 79 + R_HEX_IE_GOT_32_6_X = 80 + R_HEX_IE_GOT_16_X = 81 + R_HEX_IE_GOT_11_X = 82 + R_HEX_TPREL_32_6_X = 83 + R_HEX_TPREL_16_X = 84 + R_HEX_TPREL_11_X = 85 + + +class Relocs_Coff_i386(Enum): + IMAGE_REL_I386_ABSOLUTE = 0x0000 + IMAGE_REL_I386_DIR16 = 0x0001 + IMAGE_REL_I386_REL16 = 0x0002 + IMAGE_REL_I386_DIR32 = 0x0006 + IMAGE_REL_I386_DIR32NB = 0x0007 + IMAGE_REL_I386_SEG12 = 0x0009 + IMAGE_REL_I386_SECTION = 0x000A + IMAGE_REL_I386_SECREL = 0x000B + IMAGE_REL_I386_TOKEN = 0x000C + IMAGE_REL_I386_SECREL7 = 0x000D + IMAGE_REL_I386_REL32 = 0x0014 + +class Relocs_Coff_X86_64(Enum): + IMAGE_REL_AMD64_ABSOLUTE = 0x0000 + IMAGE_REL_AMD64_ADDR64 = 0x0001 + IMAGE_REL_AMD64_ADDR32 = 0x0002 + IMAGE_REL_AMD64_ADDR32NB = 0x0003 + IMAGE_REL_AMD64_REL32 = 0x0004 + IMAGE_REL_AMD64_REL32_1 = 0x0005 + IMAGE_REL_AMD64_REL32_2 = 0x0006 + IMAGE_REL_AMD64_REL32_3 = 0x0007 + IMAGE_REL_AMD64_REL32_4 = 0x0008 + IMAGE_REL_AMD64_REL32_5 = 0x0009 + IMAGE_REL_AMD64_SECTION = 0x000A + IMAGE_REL_AMD64_SECREL = 0x000B + IMAGE_REL_AMD64_SECREL7 = 0x000C + IMAGE_REL_AMD64_TOKEN = 0x000D + IMAGE_REL_AMD64_SREL32 = 0x000E + IMAGE_REL_AMD64_PAIR = 0x000F + IMAGE_REL_AMD64_SSPAN32 = 0x0010 + +class Relocs_Coff_ARM(Enum): + IMAGE_REL_ARM_ABSOLUTE = 0x0000 + IMAGE_REL_ARM_ADDR32 = 0x0001 + IMAGE_REL_ARM_ADDR32NB = 0x0002 + IMAGE_REL_ARM_BRANCH24 = 0x0003 + IMAGE_REL_ARM_BRANCH11 = 0x0004 + IMAGE_REL_ARM_TOKEN = 0x0005 + IMAGE_REL_ARM_BLX24 = 0x0008 + IMAGE_REL_ARM_BLX11 = 0x0009 + IMAGE_REL_ARM_SECTION = 0x000E + IMAGE_REL_ARM_SECREL = 0x000F + IMAGE_REL_ARM_MOV32A = 0x0010 + IMAGE_REL_ARM_MOV32T = 0x0011 + IMAGE_REL_ARM_BRANCH20T = 0x0012 + IMAGE_REL_ARM_BRANCH24T = 0x0014 + IMAGE_REL_ARM_BLX23T = 0x0015 + + +class Relocs_Macho_i386(Enum): + RIT_Vanilla = 0 + RIT_Pair = 1 + RIT_Difference = 2 + RIT_Generic_PreboundLazyPointer = 3 + RIT_Generic_LocalDifference = 4 + RIT_Generic_TLV = 5 + +class Relocs_Macho_X86_64(Enum): + RIT_X86_64_Unsigned = 0 + RIT_X86_64_Signed = 1 + RIT_X86_64_Branch = 2 + RIT_X86_64_GOTLoad = 3 + RIT_X86_64_GOT = 4 + RIT_X86_64_Subtractor = 5 + RIT_X86_64_Signed1 = 6 + RIT_X86_64_Signed2 = 7 + RIT_X86_64_Signed4 = 8 + RIT_X86_64_TLV = 9 + +class Relocs_Macho_ARM(Enum): + RIT_Vanilla = 0 + RIT_Pair = 1 + RIT_Difference = 2 + RIT_ARM_LocalDifference = 3 + RIT_ARM_PreboundLazyPointer = 4 + RIT_ARM_Branch24Bit = 5 + RIT_ARM_ThumbBranch22Bit = 6 + RIT_ARM_ThumbBranch32Bit = 7 + RIT_ARM_Half = 8 + RIT_ARM_HalfDifference = 9 + +class Relocs_Macho_PPC(Enum): + PPC_RELOC_VANILLA = 0 + PPC_RELOC_PAIR = 1 + PPC_RELOC_BR14 = 2 + PPC_RELOC_BR24 = 3 + PPC_RELOC_HI16 = 4 + PPC_RELOC_LO16 = 5 + PPC_RELOC_HA16 = 6 + PPC_RELOC_LO14 = 7 + PPC_RELOC_SECTDIFF = 8 + PPC_RELOC_PB_LA_PTR = 9 + PPC_RELOC_HI16_SECTDIFF = 10 + PPC_RELOC_LO16_SECTDIFF = 11 + PPC_RELOC_HA16_SECTDIFF = 12 + PPC_RELOC_JBSR = 13 + PPC_RELOC_LO14_SECTDIFF = 14 + PPC_RELOC_LOCAL_SECTDIFF = 15 + + +craftElf("relocs.obj.elf-x86_64", "x86_64-pc-linux-gnu", Relocs_Elf_X86_64.entries(), "leaq sym@GOTTPOFF(%rip), %rax") +craftElf("relocs.obj.elf-i386", "i386-pc-linux-gnu", Relocs_Elf_i386.entries(), "mov sym@GOTOFF(%ebx), %eax") +#craftElf("relocs-elf-ppc32", "powerpc-unknown-linux-gnu", Relocs_Elf_PPC32.entries(), ...) +craftElf("relocs.obj.elf-ppc64", "powerpc64-unknown-linux-gnu", Relocs_Elf_PPC64.entries(), + ("@t = thread_local global i32 0, align 4", "define i32* @f{0}() nounwind {{ ret i32* @t }}", 2)) +craftElf("relocs.obj.elf-aarch64", "aarch64", Relocs_Elf_AArch64.entries(), "movz x0, #:abs_g0:sym") +craftElf("relocs.obj.elf-arm", "arm-unknown-unknown", Relocs_Elf_ARM.entries(), "b sym") +craftElf("relocs.obj.elf-mips", "mips-unknown-linux", Relocs_Elf_Mips.entries(), "lui $2, %hi(sym)") +craftElf("relocs.obj.elf-mips64el", "mips64el-unknown-linux", Relocs_Elf_Mips.entries(), "lui $2, %hi(sym)") +#craftElf("relocs.obj.elf-mblaze", "mblaze-unknown-unknown", Relocs_Elf_MBlaze.entries(), ...) +#craftElf("relocs.obj.elf-hexagon", "hexagon-unknown-unknown", Relocs_Elf_Hexagon.entries(), ...) + +craftCoff("relocs.obj.coff-i386", "i386-pc-win32", Relocs_Coff_i386.entries(), "mov foo@imgrel(%ebx, %ecx, 4), %eax") +craftCoff("relocs.obj.coff-x86_64", "x86_64-pc-win32", Relocs_Coff_X86_64.entries(), "mov foo@imgrel(%ebx, %ecx, 4), %eax") +#craftCoff("relocs.obj.coff-arm", "arm-pc-win32", Relocs_Coff_ARM.entries(), "...") + +craftMacho("relocs.obj.macho-i386", "i386-apple-darwin9", Relocs_Macho_i386.entries(), + ("asm", ".subsections_via_symbols; .text; a: ; b:", "call a", 1)) +craftMacho("relocs.obj.macho-x86_64", "x86_64-apple-darwin9", Relocs_Macho_X86_64.entries(), + ("asm", ".subsections_via_symbols; .text; a: ; b:", "call a", 1)) +craftMacho("relocs.obj.macho-arm", "armv7-apple-darwin10", Relocs_Macho_ARM.entries(), "bl sym") +#craftMacho("relocs.obj.macho-ppc", "powerpc-apple-darwin10", Relocs_Macho_PPC.entries(), ...) diff --git a/test/tools/llvm-readobj/Inputs/trivial.ll b/test/tools/llvm-readobj/Inputs/trivial.ll new file mode 100644 index 0000000..2cd7ec8 --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/trivial.ll @@ -0,0 +1,19 @@ +; llc -mtriple=i386-pc-win32 trivial.ll -filetype=obj -o trivial-object-test.coff-i386 +; llc -mtriple=x86_64-pc-win32 trivial.ll -filetype=obj -o trivial-object-test.coff-x86-64 +; llc -mtriple=i386-linux-gnu trivial.ll -filetype=obj -o trivial-object-test.elf-i386 -relocation-model=pic +; llc -mtriple=x86_64-linux-gnu trivial.ll -filetype=obj -o trivial-object-test.elf-x86-64 -relocation-model=pic +; llc -mtriple=i386-apple-darwin10 trivial.ll -filetype=obj -o trivial-object-test.macho-i386 -relocation-model=pic +; llc -mtriple=x86_64-apple-darwin10 trivial.ll -filetype=obj -o trivial-object-test.macho-x86-64 -relocation-model=pic + +@.str = private unnamed_addr constant [13 x i8] c"Hello World\0A\00", align 1 + +define i32 @main() nounwind { +entry: + %call = tail call i32 @puts(i8* getelementptr inbounds ([13 x i8]* @.str, i32 0, i32 0)) nounwind + tail call void bitcast (void (...)* @SomeOtherFunction to void ()*)() nounwind + ret i32 0 +} + +declare i32 @puts(i8* nocapture) nounwind + +declare void @SomeOtherFunction(...) diff --git a/test/tools/llvm-readobj/Inputs/trivial.obj.coff-i386 b/test/tools/llvm-readobj/Inputs/trivial.obj.coff-i386 Binary files differnew file mode 100644 index 0000000..282e569 --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/trivial.obj.coff-i386 diff --git a/test/tools/llvm-readobj/Inputs/trivial.obj.coff-x86-64 b/test/tools/llvm-readobj/Inputs/trivial.obj.coff-x86-64 Binary files differnew file mode 100644 index 0000000..8a7060e --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/trivial.obj.coff-x86-64 diff --git a/test/tools/llvm-readobj/Inputs/trivial.obj.elf-i386 b/test/tools/llvm-readobj/Inputs/trivial.obj.elf-i386 Binary files differnew file mode 100644 index 0000000..f85e40d --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/trivial.obj.elf-i386 diff --git a/test/tools/llvm-readobj/Inputs/trivial.obj.elf-x86-64 b/test/tools/llvm-readobj/Inputs/trivial.obj.elf-x86-64 Binary files differnew file mode 100644 index 0000000..95285c1 --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/trivial.obj.elf-x86-64 diff --git a/test/tools/llvm-readobj/Inputs/trivial.obj.macho-arm b/test/tools/llvm-readobj/Inputs/trivial.obj.macho-arm Binary files differnew file mode 100644 index 0000000..117df9e --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/trivial.obj.macho-arm diff --git a/test/tools/llvm-readobj/Inputs/trivial.obj.macho-i386 b/test/tools/llvm-readobj/Inputs/trivial.obj.macho-i386 Binary files differnew file mode 100644 index 0000000..5048171 --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/trivial.obj.macho-i386 diff --git a/test/tools/llvm-readobj/Inputs/trivial.obj.macho-ppc b/test/tools/llvm-readobj/Inputs/trivial.obj.macho-ppc Binary files differnew file mode 100644 index 0000000..dd2e956 --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/trivial.obj.macho-ppc diff --git a/test/tools/llvm-readobj/Inputs/trivial.obj.macho-ppc64 b/test/tools/llvm-readobj/Inputs/trivial.obj.macho-ppc64 Binary files differnew file mode 100644 index 0000000..20ec8ef --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/trivial.obj.macho-ppc64 diff --git a/test/tools/llvm-readobj/Inputs/trivial.obj.macho-x86-64 b/test/tools/llvm-readobj/Inputs/trivial.obj.macho-x86-64 Binary files differnew file mode 100644 index 0000000..bcdfc8a --- /dev/null +++ b/test/tools/llvm-readobj/Inputs/trivial.obj.macho-x86-64 diff --git a/test/tools/llvm-readobj/file-headers.test b/test/tools/llvm-readobj/file-headers.test new file mode 100644 index 0000000..226eb93 --- /dev/null +++ b/test/tools/llvm-readobj/file-headers.test @@ -0,0 +1,100 @@ +RUN: llvm-readobj -h %p/Inputs/trivial.obj.coff-i386 \ +RUN: | FileCheck %s -check-prefix COFF32 +RUN: llvm-readobj -h %p/Inputs/trivial.obj.coff-x86-64 \ +RUN: | FileCheck %s -check-prefix COFF64 +RUN: llvm-readobj -h %p/Inputs/trivial.obj.elf-i386 \ +RUN: | FileCheck %s -check-prefix ELF32 +RUN: llvm-readobj -h %p/Inputs/trivial.obj.elf-x86-64 \ +RUN: | FileCheck %s -check-prefix ELF64 + +COFF32: File: {{(.*[/\\])?}}trivial.obj.coff-i386 +COFF32-NEXT: Format: COFF-i386 +COFF32-NEXT: Arch: i386 +COFF32-NEXT: AddressSize: 32bit +COFF32-NEXT: ImageFileHeader { +COFF32-NEXT: Machine: IMAGE_FILE_MACHINE_I386 (0x14C) +COFF32-NEXT: SectionCount: 2 +COFF32-NEXT: TimeDateStamp: 2013-03-20 17:56:46 (0x5149F85E) +COFF32-NEXT: PointerToSymbolTable: 0xA5 +COFF32-NEXT: SymbolCount: 7 +COFF32-NEXT: OptionalHeaderSize: 0 +COFF32-NEXT: Characteristics [ (0x0) +COFF32-NEXT: ] +COFF32-NEXT: } + +COFF64: File: {{(.*[/\\])?}}trivial.obj.coff-x86-64 +COFF64-NEXT: Format: COFF-x86-64 +COFF64-NEXT: Arch: x86_64 +COFF64-NEXT: AddressSize: 64bit +COFF64-NEXT: ImageFileHeader { +COFF64-NEXT: Machine: IMAGE_FILE_MACHINE_AMD64 (0x8664) +COFF64-NEXT: SectionCount: 2 +COFF64-NEXT: TimeDateStamp: 2013-03-20 17:56:46 (0x5149F85E) +COFF64-NEXT: PointerToSymbolTable: 0xAB +COFF64-NEXT: SymbolCount: 7 +COFF64-NEXT: OptionalHeaderSize: 0 +COFF64-NEXT: Characteristics [ (0x0) +COFF64-NEXT: ] +COFF64-NEXT: } + +ELF32: File: {{(.*[/\\])?}}trivial.obj.elf-i386 +ELF32-NEXT: Format: ELF32-i386 +ELF32-NEXT: Arch: i386 +ELF32-NEXT: AddressSize: 32bit +ELF32-NEXT: LoadName: +ELF32-NEXT: ElfHeader { +ELF32-NEXT: Ident { +ELF32-NEXT: Magic: (7F 45 4C 46) +ELF32-NEXT: Class: 32-bit (0x1) +ELF32-NEXT: DataEncoding: LittleEndian (0x1) +ELF32-NEXT: FileVersion: 1 +ELF32-NEXT: OS/ABI: GNU/Linux (0x3) +ELF32-NEXT: ABIVersion: 0 +ELF32-NEXT: Unused: (00 00 00 00 00 00 00) +ELF32-NEXT: } +ELF32-NEXT: Type: Relocatable (0x1) +ELF32-NEXT: Machine: EM_386 (0x3) +ELF32-NEXT: Version: 1 +ELF32-NEXT: Entry: 0x0 +ELF32-NEXT: ProgramHeaderOffset: 0x0 +ELF32-NEXT: SectionHeaderOffset: 0xC8 +ELF32-NEXT: Flags [ (0x0) +ELF32-NEXT: ] +ELF32-NEXT: HeaderSize: 52 +ELF32-NEXT: ProgramHeaderEntrySize: 0 +ELF32-NEXT: ProgramHeaderCount: 0 +ELF32-NEXT: SectionHeaderEntrySize: 40 +ELF32-NEXT: SectionHeaderCount: 10 +ELF32-NEXT: StringTableSectionIndex: 7 +ELF32-NEXT: } + +ELF64: File: {{(.*[/\\])?}}trivial.obj.elf-x86-64 +ELF64-NEXT: Format: ELF64-x86-64 +ELF64-NEXT: Arch: x86_64 +ELF64-NEXT: AddressSize: 64bit +ELF64-NEXT: LoadName: +ELF64-NEXT: ElfHeader { +ELF64-NEXT: Ident { +ELF64-NEXT: Magic: (7F 45 4C 46) +ELF64-NEXT: Class: 64-bit (0x2) +ELF64-NEXT: DataEncoding: LittleEndian (0x1) +ELF64-NEXT: FileVersion: 1 +ELF64-NEXT: OS/ABI: GNU/Linux (0x3) +ELF64-NEXT: ABIVersion: 0 +ELF64-NEXT: Unused: (00 00 00 00 00 00 00) +ELF64-NEXT: } +ELF64-NEXT: Type: Relocatable (0x1) +ELF64-NEXT: Machine: EM_X86_64 (0x3E) +ELF64-NEXT: Version: 1 +ELF64-NEXT: Entry: 0x0 +ELF64-NEXT: ProgramHeaderOffset: 0x0 +ELF64-NEXT: SectionHeaderOffset: 0xB8 +ELF64-NEXT: Flags [ (0x0) +ELF64-NEXT: ] +ELF64-NEXT: HeaderSize: 64 +ELF64-NEXT: ProgramHeaderEntrySize: 0 +ELF64-NEXT: ProgramHeaderCount: 0 +ELF64-NEXT: SectionHeaderEntrySize: 64 +ELF64-NEXT: SectionHeaderCount: 10 +ELF64-NEXT: StringTableSectionIndex: 7 +ELF64-NEXT: } diff --git a/test/tools/llvm-readobj/lit.local.cfg b/test/tools/llvm-readobj/lit.local.cfg new file mode 100644 index 0000000..df9b335 --- /dev/null +++ b/test/tools/llvm-readobj/lit.local.cfg @@ -0,0 +1 @@ +config.suffixes = ['.test'] diff --git a/test/tools/llvm-readobj/program-headers.test b/test/tools/llvm-readobj/program-headers.test new file mode 100644 index 0000000..2a574bb --- /dev/null +++ b/test/tools/llvm-readobj/program-headers.test @@ -0,0 +1,74 @@ +RUN: llvm-readobj -program-headers %p/../../Object/Inputs/program-headers.elf-i386 \ +RUN: | FileCheck %s -check-prefix ELF-I386 +RUN: llvm-readobj -program-headers %p/../../Object/Inputs/program-headers.elf-x86-64 \ +RUN: | FileCheck %s -check-prefix ELF-X86-64 + +ELF-I386: ProgramHeaders [ +ELF-I386-NEXT: ProgramHeader { +ELF-I386-NEXT: Type: PT_LOAD (0x1) +ELF-I386-NEXT: Offset: 0x0 +ELF-I386-NEXT: VirtualAddress: 0x8048000 +ELF-I386-NEXT: PhysicalAddress: 0x8048000 +ELF-I386-NEXT: FileSize: 308 +ELF-I386-NEXT: MemSize: 308 +ELF-I386-NEXT: Flags [ (0x5) +ELF-I386-NEXT: PF_R (0x4) +ELF-I386-NEXT: PF_X (0x1) +ELF-I386-NEXT: ] +ELF-I386-NEXT: Alignment: 4096 +ELF-I386-NEXT: } +ELF-I386-NEXT: ProgramHeader { +ELF-I386-NEXT: Type: PT_GNU_STACK (0x6474E551) +ELF-I386-NEXT: Offset: 0x0 +ELF-I386-NEXT: VirtualAddress: 0x0 +ELF-I386-NEXT: PhysicalAddress: 0x0 +ELF-I386-NEXT: FileSize: 0 +ELF-I386-NEXT: MemSize: 0 +ELF-I386-NEXT: Flags [ (0x6) +ELF-I386-NEXT: PF_R (0x4) +ELF-I386-NEXT: PF_W (0x2) +ELF-I386-NEXT: ] +ELF-I386-NEXT: Alignment: 4 +ELF-I386-NEXT: } +ELF-I386-NEXT: ] + +ELF-X86-64: ProgramHeaders [ +ELF-X86-64-NEXT: ProgramHeader { +ELF-X86-64-NEXT: Type: PT_LOAD (0x1) +ELF-X86-64-NEXT: Offset: 0x0 +ELF-X86-64-NEXT: VirtualAddress: 0x400000 +ELF-X86-64-NEXT: PhysicalAddress: 0x400000 +ELF-X86-64-NEXT: FileSize: 312 +ELF-X86-64-NEXT: MemSize: 312 +ELF-X86-64-NEXT: Flags [ (0x5) +ELF-X86-64-NEXT: PF_R (0x4) +ELF-X86-64-NEXT: PF_X (0x1) +ELF-X86-64-NEXT: ] +ELF-X86-64-NEXT: Alignment: 2097152 +ELF-X86-64-NEXT: } +ELF-X86-64-NEXT: ProgramHeader { +ELF-X86-64-NEXT: Type: PT_GNU_EH_FRAME (0x6474E550) +ELF-X86-64-NEXT: Offset: 0xF4 +ELF-X86-64-NEXT: VirtualAddress: 0x4000F4 +ELF-X86-64-NEXT: PhysicalAddress: 0x4000F4 +ELF-X86-64-NEXT: FileSize: 20 +ELF-X86-64-NEXT: MemSize: 20 +ELF-X86-64-NEXT: Flags [ (0x4) +ELF-X86-64-NEXT: PF_R (0x4) +ELF-X86-64-NEXT: ] +ELF-X86-64-NEXT: Alignment: 4 +ELF-X86-64-NEXT: } +ELF-X86-64-NEXT: ProgramHeader { +ELF-X86-64-NEXT: Type: PT_GNU_STACK (0x6474E551) +ELF-X86-64-NEXT: Offset: 0x0 +ELF-X86-64-NEXT: VirtualAddress: 0x0 +ELF-X86-64-NEXT: PhysicalAddress: 0x0 +ELF-X86-64-NEXT: FileSize: 0 +ELF-X86-64-NEXT: MemSize: 0 +ELF-X86-64-NEXT: Flags [ (0x6) +ELF-X86-64-NEXT: PF_R (0x4) +ELF-X86-64-NEXT: PF_W (0x2) +ELF-X86-64-NEXT: ] +ELF-X86-64-NEXT: Alignment: 8 +ELF-X86-64-NEXT: } +ELF-X86-64-NEXT: ] diff --git a/test/tools/llvm-readobj/reloc-types.test b/test/tools/llvm-readobj/reloc-types.test new file mode 100644 index 0000000..08603bc --- /dev/null +++ b/test/tools/llvm-readobj/reloc-types.test @@ -0,0 +1,663 @@ +// Test that libObject and subsequently llvm-readobj shows proper relocation type +// names and values. + +// Todo: ELF-PPC, ELF-HEXAGON + +RUN: llvm-readobj -r -expand-relocs %p/Inputs/relocs.obj.elf-i386 | FileCheck %s -check-prefix ELF-32 +RUN: llvm-readobj -r -expand-relocs %p/Inputs/relocs.obj.elf-x86_64 | FileCheck %s -check-prefix ELF-64 +RUN: llvm-readobj -r -expand-relocs %p/Inputs/relocs.obj.elf-aarch64 | FileCheck %s -check-prefix ELF-AARCH64 +RUN: llvm-readobj -r -expand-relocs %p/Inputs/relocs.obj.elf-arm | FileCheck %s -check-prefix ELF-ARM +RUN: llvm-readobj -r -expand-relocs %p/Inputs/relocs.obj.elf-mips | FileCheck %s -check-prefix ELF-MIPS +RUN: llvm-readobj -r -expand-relocs %p/Inputs/relocs.obj.elf-mips64el | FileCheck %s -check-prefix ELF-MIPS64EL +RUN: llvm-readobj -r -expand-relocs %p/Inputs/relocs.obj.elf-ppc64 | FileCheck %s -check-prefix ELF-PPC64 +RUN: llvm-readobj -r -expand-relocs %p/Inputs/relocs.obj.coff-i386 | FileCheck %s -check-prefix COFF-32 +RUN: llvm-readobj -r -expand-relocs %p/Inputs/relocs.obj.coff-x86_64 | FileCheck %s -check-prefix COFF-64 +RUN: llvm-readobj -r -expand-relocs %p/Inputs/relocs.obj.macho-arm | FileCheck %s -check-prefix MACHO-ARM +RUN: llvm-readobj -r -expand-relocs %p/Inputs/relocs.obj.macho-i386 | FileCheck %s -check-prefix MACHO-32 +RUN: llvm-readobj -r -expand-relocs %p/Inputs/relocs.obj.macho-x86_64 | FileCheck %s -check-prefix MACHO-64 + + +ELF-32: Type: R_386_NONE (0) +ELF-32: Type: R_386_32 (1) +ELF-32: Type: R_386_PC32 (2) +ELF-32: Type: R_386_GOT32 (3) +ELF-32: Type: R_386_PLT32 (4) +ELF-32: Type: R_386_COPY (5) +ELF-32: Type: R_386_GLOB_DAT (6) +ELF-32: Type: R_386_JUMP_SLOT (7) +ELF-32: Type: R_386_RELATIVE (8) +ELF-32: Type: R_386_GOTOFF (9) +ELF-32: Type: R_386_GOTPC (10) +ELF-32: Type: R_386_32PLT (11) +ELF-32: Type: R_386_TLS_TPOFF (14) +ELF-32: Type: R_386_TLS_IE (15) +ELF-32: Type: R_386_TLS_GOTIE (16) +ELF-32: Type: R_386_TLS_LE (17) +ELF-32: Type: R_386_TLS_GD (18) +ELF-32: Type: R_386_TLS_LDM (19) +ELF-32: Type: R_386_16 (20) +ELF-32: Type: R_386_PC16 (21) +ELF-32: Type: R_386_8 (22) +ELF-32: Type: R_386_PC8 (23) +ELF-32: Type: R_386_TLS_GD_32 (24) +ELF-32: Type: R_386_TLS_GD_PUSH (25) +ELF-32: Type: R_386_TLS_GD_CALL (26) +ELF-32: Type: R_386_TLS_GD_POP (27) +ELF-32: Type: R_386_TLS_LDM_32 (28) +ELF-32: Type: R_386_TLS_LDM_PUSH (29) +ELF-32: Type: R_386_TLS_LDM_CALL (30) +ELF-32: Type: R_386_TLS_LDM_POP (31) +ELF-32: Type: R_386_TLS_LDO_32 (32) +ELF-32: Type: R_386_TLS_IE_32 (33) +ELF-32: Type: R_386_TLS_LE_32 (34) +ELF-32: Type: R_386_TLS_DTPMOD32 (35) +ELF-32: Type: R_386_TLS_DTPOFF32 (36) +ELF-32: Type: R_386_TLS_TPOFF32 (37) +ELF-32: Type: R_386_TLS_GOTDESC (39) +ELF-32: Type: R_386_TLS_DESC_CALL (40) +ELF-32: Type: R_386_TLS_DESC (41) +ELF-32: Type: R_386_IRELATIVE (42) +_LF-32: Type: R_386_NUM (43) + +ELF-64: Type: R_X86_64_NONE (0) +ELF-64: Type: R_X86_64_64 (1) +ELF-64: Type: R_X86_64_PC32 (2) +ELF-64: Type: R_X86_64_GOT32 (3) +ELF-64: Type: R_X86_64_PLT32 (4) +ELF-64: Type: R_X86_64_COPY (5) +ELF-64: Type: R_X86_64_GLOB_DAT (6) +ELF-64: Type: R_X86_64_JUMP_SLOT (7) +ELF-64: Type: R_X86_64_RELATIVE (8) +ELF-64: Type: R_X86_64_GOTPCREL (9) +ELF-64: Type: R_X86_64_32 (10) +ELF-64: Type: R_X86_64_32S (11) +ELF-64: Type: R_X86_64_16 (12) +ELF-64: Type: R_X86_64_PC16 (13) +ELF-64: Type: R_X86_64_8 (14) +ELF-64: Type: R_X86_64_PC8 (15) +ELF-64: Type: R_X86_64_DTPMOD64 (16) +ELF-64: Type: R_X86_64_DTPOFF64 (17) +ELF-64: Type: R_X86_64_TPOFF64 (18) +ELF-64: Type: R_X86_64_TLSGD (19) +ELF-64: Type: R_X86_64_TLSLD (20) +ELF-64: Type: R_X86_64_DTPOFF32 (21) +ELF-64: Type: R_X86_64_GOTTPOFF (22) +ELF-64: Type: R_X86_64_TPOFF32 (23) +ELF-64: Type: R_X86_64_PC64 (24) +ELF-64: Type: R_X86_64_GOTOFF64 (25) +ELF-64: Type: R_X86_64_GOTPC32 (26) +ELF-64: Type: R_X86_64_GOT64 (27) +ELF-64: Type: R_X86_64_GOTPCREL64 (28) +ELF-64: Type: R_X86_64_GOTPC64 (29) +ELF-64: Type: R_X86_64_GOTPLT64 (30) +ELF-64: Type: R_X86_64_PLTOFF64 (31) +ELF-64: Type: R_X86_64_SIZE32 (32) +ELF-64: Type: R_X86_64_SIZE64 (33) +ELF-64: Type: R_X86_64_GOTPC32_TLSDESC (34) +ELF-64: Type: R_X86_64_TLSDESC_CALL (35) +ELF-64: Type: R_X86_64_TLSDESC (36) +ELF-64: Type: R_X86_64_IRELATIVE (37) + +ELF-PPC: Type: R_PPC_NONE (0) +ELF-PPC: Type: R_PPC_ADDR32 (1) +ELF-PPC: Type: R_PPC_ADDR24 (2) +ELF-PPC: Type: R_PPC_ADDR16 (3) +ELF-PPC: Type: R_PPC_ADDR16_LO (4) +ELF-PPC: Type: R_PPC_ADDR16_HI (5) +ELF-PPC: Type: R_PPC_ADDR16_HA (6) +ELF-PPC: Type: R_PPC_ADDR14 (7) +ELF-PPC: Type: R_PPC_ADDR14_BRTAKEN (8) +ELF-PPC: Type: R_PPC_ADDR14_BRNTAKEN (9) +ELF-PPC: Type: R_PPC_REL24 (10) +ELF-PPC: Type: R_PPC_REL14 (11) +ELF-PPC: Type: R_PPC_REL14_BRTAKEN (12) +ELF-PPC: Type: R_PPC_REL14_BRNTAKEN (13) +ELF-PPC: Type: R_PPC_REL32 (26) +ELF-PPC: Type: R_PPC_TPREL16_LO (70) +ELF-PPC: Type: R_PPC_TPREL16_HA (72) + +ELF-PPC64: Type: R_PPC64_NONE (0) +ELF-PPC64: Type: R_PPC64_ADDR32 (1) +ELF-PPC64: Type: R_PPC64_ADDR16_LO (4) +ELF-PPC64: Type: R_PPC64_ADDR16_HI (5) +ELF-PPC64: Type: R_PPC64_ADDR14 (7) +ELF-PPC64: Type: R_PPC64_REL24 (10) +ELF-PPC64: Type: R_PPC64_REL32 (26) +ELF-PPC64: Type: R_PPC64_ADDR64 (38) +ELF-PPC64: Type: R_PPC64_ADDR16_HIGHER (39) +ELF-PPC64: Type: R_PPC64_ADDR16_HIGHEST (41) +ELF-PPC64: Type: R_PPC64_REL64 (44) +ELF-PPC64: Type: R_PPC64_TOC16 (47) +ELF-PPC64: Type: R_PPC64_TOC16_LO (48) +ELF-PPC64: Type: R_PPC64_TOC16_HA (50) +ELF-PPC64: Type: R_PPC64_TOC (51) +ELF-PPC64: Type: R_PPC64_ADDR16_DS (56) +ELF-PPC64: Type: R_PPC64_ADDR16_LO_DS (57) +ELF-PPC64: Type: R_PPC64_TOC16_DS (63) +ELF-PPC64: Type: R_PPC64_TOC16_LO_DS (64) +ELF-PPC64: Type: R_PPC64_TLS (67) +ELF-PPC64: Type: R_PPC64_TPREL16_LO (70) +ELF-PPC64: Type: R_PPC64_TPREL16_HA (72) +ELF-PPC64: Type: R_PPC64_DTPREL16_LO (75) +ELF-PPC64: Type: R_PPC64_DTPREL16_HA (77) +ELF-PPC64: Type: R_PPC64_GOT_TLSGD16_LO (80) +ELF-PPC64: Type: R_PPC64_GOT_TLSGD16_HA (82) +ELF-PPC64: Type: R_PPC64_GOT_TLSLD16_LO (84) +ELF-PPC64: Type: R_PPC64_GOT_TLSLD16_HA (86) +ELF-PPC64: Type: R_PPC64_GOT_TPREL16_LO_DS (88) +ELF-PPC64: Type: R_PPC64_GOT_TPREL16_HA (90) +ELF-PPC64: Type: R_PPC64_TLSGD (107) +ELF-PPC64: Type: R_PPC64_TLSLD (108) + +ELF-AARCH64: Type: R_AARCH64_NONE (256) +ELF-AARCH64: Type: R_AARCH64_ABS64 (257) +ELF-AARCH64: Type: R_AARCH64_ABS32 (258) +ELF-AARCH64: Type: R_AARCH64_ABS16 (259) +ELF-AARCH64: Type: R_AARCH64_PREL64 (260) +ELF-AARCH64: Type: R_AARCH64_PREL32 (261) +ELF-AARCH64: Type: R_AARCH64_PREL16 (262) +ELF-AARCH64: Type: R_AARCH64_MOVW_UABS_G0 (263) +ELF-AARCH64: Type: R_AARCH64_MOVW_UABS_G0_NC (264) +ELF-AARCH64: Type: R_AARCH64_MOVW_UABS_G1 (265) +ELF-AARCH64: Type: R_AARCH64_MOVW_UABS_G1_NC (266) +ELF-AARCH64: Type: R_AARCH64_MOVW_UABS_G2 (267) +ELF-AARCH64: Type: R_AARCH64_MOVW_UABS_G2_NC (268) +ELF-AARCH64: Type: R_AARCH64_MOVW_UABS_G3 (269) +ELF-AARCH64: Type: R_AARCH64_MOVW_SABS_G0 (270) +ELF-AARCH64: Type: R_AARCH64_MOVW_SABS_G1 (271) +ELF-AARCH64: Type: R_AARCH64_MOVW_SABS_G2 (272) +ELF-AARCH64: Type: R_AARCH64_LD_PREL_LO19 (273) +ELF-AARCH64: Type: R_AARCH64_ADR_PREL_LO21 (274) +ELF-AARCH64: Type: R_AARCH64_ADR_PREL_PG_HI21 (275) +ELF-AARCH64: Type: R_AARCH64_ADD_ABS_LO12_NC (277) +ELF-AARCH64: Type: R_AARCH64_LDST8_ABS_LO12_NC (278) +ELF-AARCH64: Type: R_AARCH64_TSTBR14 (279) +ELF-AARCH64: Type: R_AARCH64_CONDBR19 (280) +ELF-AARCH64: Type: R_AARCH64_JUMP26 (282) +ELF-AARCH64: Type: R_AARCH64_CALL26 (283) +ELF-AARCH64: Type: R_AARCH64_LDST16_ABS_LO12_NC (284) +ELF-AARCH64: Type: R_AARCH64_LDST32_ABS_LO12_NC (285) +ELF-AARCH64: Type: R_AARCH64_LDST64_ABS_LO12_NC (286) +ELF-AARCH64: Type: R_AARCH64_LDST128_ABS_LO12_NC (299) +ELF-AARCH64: Type: R_AARCH64_ADR_GOT_PAGE (311) +ELF-AARCH64: Type: R_AARCH64_LD64_GOT_LO12_NC (312) +ELF-AARCH64: Type: R_AARCH64_TLSLD_MOVW_DTPREL_G2 (523) +ELF-AARCH64: Type: R_AARCH64_TLSLD_MOVW_DTPREL_G1 (524) +ELF-AARCH64: Type: R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC (525) +ELF-AARCH64: Type: R_AARCH64_TLSLD_MOVW_DTPREL_G0 (526) +ELF-AARCH64: Type: R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC (527) +ELF-AARCH64: Type: R_AARCH64_TLSLD_ADD_DTPREL_HI12 (528) +ELF-AARCH64: Type: R_AARCH64_TLSLD_ADD_DTPREL_LO12 (529) +ELF-AARCH64: Type: R_AARCH64_TLSLD_ADD_DTPREL_LO12_NC (530) +ELF-AARCH64: Type: R_AARCH64_TLSLD_LDST8_DTPREL_LO12 (531) +ELF-AARCH64: Type: R_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC (532) +ELF-AARCH64: Type: R_AARCH64_TLSLD_LDST16_DTPREL_LO12 (533) +ELF-AARCH64: Type: R_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC (534) +ELF-AARCH64: Type: R_AARCH64_TLSLD_LDST32_DTPREL_LO12 (535) +ELF-AARCH64: Type: R_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC (536) +ELF-AARCH64: Type: R_AARCH64_TLSLD_LDST64_DTPREL_LO12 (537) +ELF-AARCH64: Type: R_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC (538) +ELF-AARCH64: Type: R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 (539) +ELF-AARCH64: Type: R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC (540) +ELF-AARCH64: Type: R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 (541) +ELF-AARCH64: Type: R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC (542) +ELF-AARCH64: Type: R_AARCH64_TLSIE_LD_GOTTPREL_PREL19 (543) +ELF-AARCH64: Type: R_AARCH64_TLSLE_MOVW_TPREL_G2 (544) +ELF-AARCH64: Type: R_AARCH64_TLSLE_MOVW_TPREL_G1 (545) +ELF-AARCH64: Type: R_AARCH64_TLSLE_MOVW_TPREL_G1_NC (546) +ELF-AARCH64: Type: R_AARCH64_TLSLE_MOVW_TPREL_G0 (547) +ELF-AARCH64: Type: R_AARCH64_TLSLE_MOVW_TPREL_G0_NC (548) +ELF-AARCH64: Type: R_AARCH64_TLSLE_ADD_TPREL_HI12 (549) +ELF-AARCH64: Type: R_AARCH64_TLSLE_ADD_TPREL_LO12 (550) +ELF-AARCH64: Type: R_AARCH64_TLSLE_ADD_TPREL_LO12_NC (551) +ELF-AARCH64: Type: R_AARCH64_TLSLE_LDST8_TPREL_LO12 (552) +ELF-AARCH64: Type: R_AARCH64_TLSLE_LDST8_TPREL_LO12_NC (553) +ELF-AARCH64: Type: R_AARCH64_TLSLE_LDST16_TPREL_LO12 (554) +ELF-AARCH64: Type: R_AARCH64_TLSLE_LDST16_TPREL_LO12_NC (555) +ELF-AARCH64: Type: R_AARCH64_TLSLE_LDST32_TPREL_LO12 (556) +ELF-AARCH64: Type: R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC (557) +ELF-AARCH64: Type: R_AARCH64_TLSLE_LDST64_TPREL_LO12 (558) +ELF-AARCH64: Type: R_AARCH64_TLSLE_LDST64_TPREL_LO12_NC (559) +ELF-AARCH64: Type: R_AARCH64_TLSDESC_ADR_PAGE (562) +ELF-AARCH64: Type: R_AARCH64_TLSDESC_LD64_LO12_NC (563) +ELF-AARCH64: Type: R_AARCH64_TLSDESC_ADD_LO12_NC (564) +ELF-AARCH64: Type: R_AARCH64_TLSDESC_CALL (569) + +ELF-ARM: Type: R_ARM_NONE (0) +ELF-ARM: Type: R_ARM_PC24 (1) +ELF-ARM: Type: R_ARM_ABS32 (2) +ELF-ARM: Type: R_ARM_REL32 (3) +ELF-ARM: Type: R_ARM_LDR_PC_G0 (4) +ELF-ARM: Type: R_ARM_ABS16 (5) +ELF-ARM: Type: R_ARM_ABS12 (6) +ELF-ARM: Type: R_ARM_THM_ABS5 (7) +ELF-ARM: Type: R_ARM_ABS8 (8) +ELF-ARM: Type: R_ARM_SBREL32 (9) +ELF-ARM: Type: R_ARM_THM_CALL (10) +ELF-ARM: Type: R_ARM_THM_PC8 (11) +ELF-ARM: Type: R_ARM_BREL_ADJ (12) +ELF-ARM: Type: R_ARM_TLS_DESC (13) +ELF-ARM: Type: R_ARM_THM_SWI8 (14) +ELF-ARM: Type: R_ARM_XPC25 (15) +ELF-ARM: Type: R_ARM_THM_XPC22 (16) +ELF-ARM: Type: R_ARM_TLS_DTPMOD32 (17) +ELF-ARM: Type: R_ARM_TLS_DTPOFF32 (18) +ELF-ARM: Type: R_ARM_TLS_TPOFF32 (19) +ELF-ARM: Type: R_ARM_COPY (20) +ELF-ARM: Type: R_ARM_GLOB_DAT (21) +ELF-ARM: Type: R_ARM_JUMP_SLOT (22) +ELF-ARM: Type: R_ARM_RELATIVE (23) +ELF-ARM: Type: R_ARM_GOTOFF32 (24) +ELF-ARM: Type: R_ARM_BASE_PREL (25) +ELF-ARM: Type: R_ARM_GOT_BREL (26) +ELF-ARM: Type: R_ARM_PLT32 (27) +ELF-ARM: Type: R_ARM_CALL (28) +ELF-ARM: Type: R_ARM_JUMP24 (29) +ELF-ARM: Type: R_ARM_THM_JUMP24 (30) +ELF-ARM: Type: R_ARM_BASE_ABS (31) +ELF-ARM: Type: R_ARM_ALU_PCREL_7_0 (32) +ELF-ARM: Type: R_ARM_ALU_PCREL_15_8 (33) +ELF-ARM: Type: R_ARM_ALU_PCREL_23_15 (34) +ELF-ARM: Type: R_ARM_LDR_SBREL_11_0_NC (35) +ELF-ARM: Type: R_ARM_ALU_SBREL_19_12_NC (36) +ELF-ARM: Type: R_ARM_ALU_SBREL_27_20_CK (37) +ELF-ARM: Type: R_ARM_TARGET1 (38) +ELF-ARM: Type: R_ARM_SBREL31 (39) +ELF-ARM: Type: R_ARM_V4BX (40) +ELF-ARM: Type: R_ARM_TARGET2 (41) +ELF-ARM: Type: R_ARM_PREL31 (42) +ELF-ARM: Type: R_ARM_MOVW_ABS_NC (43) +ELF-ARM: Type: R_ARM_MOVT_ABS (44) +ELF-ARM: Type: R_ARM_MOVW_PREL_NC (45) +ELF-ARM: Type: R_ARM_MOVT_PREL (46) +ELF-ARM: Type: R_ARM_THM_MOVW_ABS_NC (47) +ELF-ARM: Type: R_ARM_THM_MOVT_ABS (48) +ELF-ARM: Type: R_ARM_THM_MOVW_PREL_NC (49) +ELF-ARM: Type: R_ARM_THM_MOVT_PREL (50) +ELF-ARM: Type: R_ARM_THM_JUMP19 (51) +ELF-ARM: Type: R_ARM_THM_JUMP6 (52) +ELF-ARM: Type: R_ARM_THM_ALU_PREL_11_0 (53) +ELF-ARM: Type: R_ARM_THM_PC12 (54) +ELF-ARM: Type: R_ARM_ABS32_NOI (55) +ELF-ARM: Type: R_ARM_REL32_NOI (56) +ELF-ARM: Type: R_ARM_ALU_PC_G0_NC (57) +ELF-ARM: Type: R_ARM_ALU_PC_G0 (58) +ELF-ARM: Type: R_ARM_ALU_PC_G1_NC (59) +ELF-ARM: Type: R_ARM_ALU_PC_G1 (60) +ELF-ARM: Type: R_ARM_ALU_PC_G2 (61) +ELF-ARM: Type: R_ARM_LDR_PC_G1 (62) +ELF-ARM: Type: R_ARM_LDR_PC_G2 (63) +ELF-ARM: Type: R_ARM_LDRS_PC_G0 (64) +ELF-ARM: Type: R_ARM_LDRS_PC_G1 (65) +ELF-ARM: Type: R_ARM_LDRS_PC_G2 (66) +ELF-ARM: Type: R_ARM_LDC_PC_G0 (67) +ELF-ARM: Type: R_ARM_LDC_PC_G1 (68) +ELF-ARM: Type: R_ARM_LDC_PC_G2 (69) +ELF-ARM: Type: R_ARM_ALU_SB_G0_NC (70) +ELF-ARM: Type: R_ARM_ALU_SB_G0 (71) +ELF-ARM: Type: R_ARM_ALU_SB_G1_NC (72) +ELF-ARM: Type: R_ARM_ALU_SB_G1 (73) +ELF-ARM: Type: R_ARM_ALU_SB_G2 (74) +ELF-ARM: Type: R_ARM_LDR_SB_G0 (75) +ELF-ARM: Type: R_ARM_LDR_SB_G1 (76) +ELF-ARM: Type: R_ARM_LDR_SB_G2 (77) +ELF-ARM: Type: R_ARM_LDRS_SB_G0 (78) +ELF-ARM: Type: R_ARM_LDRS_SB_G1 (79) +ELF-ARM: Type: R_ARM_LDRS_SB_G2 (80) +ELF-ARM: Type: R_ARM_LDC_SB_G0 (81) +ELF-ARM: Type: R_ARM_LDC_SB_G1 (82) +ELF-ARM: Type: R_ARM_LDC_SB_G2 (83) +ELF-ARM: Type: R_ARM_MOVW_BREL_NC (84) +ELF-ARM: Type: R_ARM_MOVT_BREL (85) +ELF-ARM: Type: R_ARM_MOVW_BREL (86) +ELF-ARM: Type: R_ARM_THM_MOVW_BREL_NC (87) +ELF-ARM: Type: R_ARM_THM_MOVT_BREL (88) +ELF-ARM: Type: R_ARM_THM_MOVW_BREL (89) +ELF-ARM: Type: R_ARM_TLS_GOTDESC (90) +ELF-ARM: Type: R_ARM_TLS_CALL (91) +ELF-ARM: Type: R_ARM_TLS_DESCSEQ (92) +ELF-ARM: Type: R_ARM_THM_TLS_CALL (93) +ELF-ARM: Type: R_ARM_PLT32_ABS (94) +ELF-ARM: Type: R_ARM_GOT_ABS (95) +ELF-ARM: Type: R_ARM_GOT_PREL (96) +ELF-ARM: Type: R_ARM_GOT_BREL12 (97) +ELF-ARM: Type: R_ARM_GOTOFF12 (98) +ELF-ARM: Type: R_ARM_GOTRELAX (99) +ELF-ARM: Type: R_ARM_GNU_VTENTRY (100) +ELF-ARM: Type: R_ARM_GNU_VTINHERIT (101) +ELF-ARM: Type: R_ARM_THM_JUMP11 (102) +ELF-ARM: Type: R_ARM_THM_JUMP8 (103) +ELF-ARM: Type: R_ARM_TLS_GD32 (104) +ELF-ARM: Type: R_ARM_TLS_LDM32 (105) +ELF-ARM: Type: R_ARM_TLS_LDO32 (106) +ELF-ARM: Type: R_ARM_TLS_IE32 (107) +ELF-ARM: Type: R_ARM_TLS_LE32 (108) +ELF-ARM: Type: R_ARM_TLS_LDO12 (109) +ELF-ARM: Type: R_ARM_TLS_LE12 (110) +ELF-ARM: Type: R_ARM_TLS_IE12GP (111) +ELF-ARM: Type: R_ARM_PRIVATE_0 (112) +ELF-ARM: Type: R_ARM_PRIVATE_1 (113) +ELF-ARM: Type: R_ARM_PRIVATE_2 (114) +ELF-ARM: Type: R_ARM_PRIVATE_3 (115) +ELF-ARM: Type: R_ARM_PRIVATE_4 (116) +ELF-ARM: Type: R_ARM_PRIVATE_5 (117) +ELF-ARM: Type: R_ARM_PRIVATE_6 (118) +ELF-ARM: Type: R_ARM_PRIVATE_7 (119) +ELF-ARM: Type: R_ARM_PRIVATE_8 (120) +ELF-ARM: Type: R_ARM_PRIVATE_9 (121) +ELF-ARM: Type: R_ARM_PRIVATE_10 (122) +ELF-ARM: Type: R_ARM_PRIVATE_11 (123) +ELF-ARM: Type: R_ARM_PRIVATE_12 (124) +ELF-ARM: Type: R_ARM_PRIVATE_13 (125) +ELF-ARM: Type: R_ARM_PRIVATE_14 (126) +ELF-ARM: Type: R_ARM_PRIVATE_15 (127) +ELF-ARM: Type: R_ARM_ME_TOO (128) +ELF-ARM: Type: R_ARM_THM_TLS_DESCSEQ16 (129) +ELF-ARM: Type: R_ARM_THM_TLS_DESCSEQ32 (130) + +ELF-MIPS: Type: R_MIPS_NONE (0) +ELF-MIPS: Type: R_MIPS_16 (1) +ELF-MIPS: Type: R_MIPS_32 (2) +ELF-MIPS: Type: R_MIPS_REL32 (3) +ELF-MIPS: Type: R_MIPS_26 (4) +ELF-MIPS: Type: R_MIPS_HI16 (5) +ELF-MIPS: Type: R_MIPS_LO16 (6) +ELF-MIPS: Type: R_MIPS_GPREL16 (7) +ELF-MIPS: Type: R_MIPS_LITERAL (8) +ELF-MIPS: Type: R_MIPS_GOT16 (9) +ELF-MIPS: Type: R_MIPS_PC16 (10) +ELF-MIPS: Type: R_MIPS_CALL16 (11) +ELF-MIPS: Type: R_MIPS_GPREL32 (12) +ELF-MIPS: Type: R_MIPS_SHIFT5 (16) +ELF-MIPS: Type: R_MIPS_SHIFT6 (17) +ELF-MIPS: Type: R_MIPS_64 (18) +ELF-MIPS: Type: R_MIPS_GOT_DISP (19) +ELF-MIPS: Type: R_MIPS_GOT_PAGE (20) +ELF-MIPS: Type: R_MIPS_GOT_OFST (21) +ELF-MIPS: Type: R_MIPS_GOT_HI16 (22) +ELF-MIPS: Type: R_MIPS_GOT_LO16 (23) +ELF-MIPS: Type: R_MIPS_SUB (24) +ELF-MIPS: Type: R_MIPS_INSERT_A (25) +ELF-MIPS: Type: R_MIPS_INSERT_B (26) +ELF-MIPS: Type: R_MIPS_DELETE (27) +ELF-MIPS: Type: R_MIPS_HIGHER (28) +ELF-MIPS: Type: R_MIPS_HIGHEST (29) +ELF-MIPS: Type: R_MIPS_CALL_HI16 (30) +ELF-MIPS: Type: R_MIPS_CALL_LO16 (31) +ELF-MIPS: Type: R_MIPS_SCN_DISP (32) +ELF-MIPS: Type: R_MIPS_REL16 (33) +ELF-MIPS: Type: R_MIPS_ADD_IMMEDIATE (34) +ELF-MIPS: Type: R_MIPS_PJUMP (35) +ELF-MIPS: Type: R_MIPS_RELGOT (36) +ELF-MIPS: Type: R_MIPS_JALR (37) +ELF-MIPS: Type: R_MIPS_TLS_DTPMOD32 (38) +ELF-MIPS: Type: R_MIPS_TLS_DTPREL32 (39) +ELF-MIPS: Type: R_MIPS_TLS_DTPMOD64 (40) +ELF-MIPS: Type: R_MIPS_TLS_DTPREL64 (41) +ELF-MIPS: Type: R_MIPS_TLS_GD (42) +ELF-MIPS: Type: R_MIPS_TLS_LDM (43) +ELF-MIPS: Type: R_MIPS_TLS_DTPREL_HI16 (44) +ELF-MIPS: Type: R_MIPS_TLS_DTPREL_LO16 (45) +ELF-MIPS: Type: R_MIPS_TLS_GOTTPREL (46) +ELF-MIPS: Type: R_MIPS_TLS_TPREL32 (47) +ELF-MIPS: Type: R_MIPS_TLS_TPREL64 (48) +ELF-MIPS: Type: R_MIPS_TLS_TPREL_HI16 (49) +ELF-MIPS: Type: R_MIPS_TLS_TPREL_LO16 (50) +ELF-MIPS: Type: R_MIPS_GLOB_DAT (51) +ELF-MIPS: Type: R_MIPS_COPY (126) +ELF-MIPS: Type: R_MIPS_JUMP_SLOT (127) +ELF-MIPS: Type: R_MIPS_NUM (218) +ELF-MIPS64EL: Type: R_MIPS_NONE/R_MIPS_NONE/R_MIPS_NONE (0) +ELF-MIPS64EL: Type: R_MIPS_16/R_MIPS_16/R_MIPS_16 (65793) +ELF-MIPS64EL: Type: R_MIPS_32/R_MIPS_32/R_MIPS_32 (131586) +ELF-MIPS64EL: Type: R_MIPS_REL32/R_MIPS_REL32/R_MIPS_REL32 (197379) +ELF-MIPS64EL: Type: R_MIPS_26/R_MIPS_26/R_MIPS_26 (263172) +ELF-MIPS64EL: Type: R_MIPS_HI16/R_MIPS_HI16/R_MIPS_HI16 (328965) +ELF-MIPS64EL: Type: R_MIPS_LO16/R_MIPS_LO16/R_MIPS_LO16 (394758) +ELF-MIPS64EL: Type: R_MIPS_GPREL16/R_MIPS_GPREL16/R_MIPS_GPREL16 (460551) +ELF-MIPS64EL: Type: R_MIPS_LITERAL/R_MIPS_LITERAL/R_MIPS_LITERAL (526344) +ELF-MIPS64EL: Type: R_MIPS_GOT16/R_MIPS_GOT16/R_MIPS_GOT16 (592137) +ELF-MIPS64EL: Type: R_MIPS_PC16/R_MIPS_PC16/R_MIPS_PC16 (657930) +ELF-MIPS64EL: Type: R_MIPS_CALL16/R_MIPS_CALL16/R_MIPS_CALL16 (723723) +ELF-MIPS64EL: Type: R_MIPS_GPREL32/R_MIPS_GPREL32/R_MIPS_GPREL32 (789516) +ELF-MIPS64EL: Type: R_MIPS_SHIFT5/R_MIPS_SHIFT5/R_MIPS_SHIFT5 (1052688) +ELF-MIPS64EL: Type: R_MIPS_SHIFT6/R_MIPS_SHIFT6/R_MIPS_SHIFT6 (1118481) +ELF-MIPS64EL: Type: R_MIPS_64/R_MIPS_64/R_MIPS_64 (1184274) +ELF-MIPS64EL: Type: R_MIPS_GOT_DISP/R_MIPS_GOT_DISP/R_MIPS_GOT_DISP (1250067) +ELF-MIPS64EL: Type: R_MIPS_GOT_PAGE/R_MIPS_GOT_PAGE/R_MIPS_GOT_PAGE (1315860) +ELF-MIPS64EL: Type: R_MIPS_GOT_OFST/R_MIPS_GOT_OFST/R_MIPS_GOT_OFST (1381653) +ELF-MIPS64EL: Type: R_MIPS_GOT_HI16/R_MIPS_GOT_HI16/R_MIPS_GOT_HI16 (1447446) +ELF-MIPS64EL: Type: R_MIPS_GOT_LO16/R_MIPS_GOT_LO16/R_MIPS_GOT_LO16 (1513239) +ELF-MIPS64EL: Type: R_MIPS_SUB/R_MIPS_SUB/R_MIPS_SUB (1579032) +ELF-MIPS64EL: Type: R_MIPS_INSERT_A/R_MIPS_INSERT_A/R_MIPS_INSERT_A (1644825) +ELF-MIPS64EL: Type: R_MIPS_INSERT_B/R_MIPS_INSERT_B/R_MIPS_INSERT_B (1710618) +ELF-MIPS64EL: Type: R_MIPS_DELETE/R_MIPS_DELETE/R_MIPS_DELETE (1776411) +ELF-MIPS64EL: Type: R_MIPS_HIGHER/R_MIPS_HIGHER/R_MIPS_HIGHER (1842204) +ELF-MIPS64EL: Type: R_MIPS_HIGHEST/R_MIPS_HIGHEST/R_MIPS_HIGHEST (1907997) +ELF-MIPS64EL: Type: R_MIPS_CALL_HI16/R_MIPS_CALL_HI16/R_MIPS_CALL_HI16 (1973790) +ELF-MIPS64EL: Type: R_MIPS_CALL_LO16/R_MIPS_CALL_LO16/R_MIPS_CALL_LO16 (2039583) +ELF-MIPS64EL: Type: R_MIPS_SCN_DISP/R_MIPS_SCN_DISP/R_MIPS_SCN_DISP (2105376) +ELF-MIPS64EL: Type: R_MIPS_REL16/R_MIPS_REL16/R_MIPS_REL16 (2171169) +ELF-MIPS64EL: Type: R_MIPS_ADD_IMMEDIATE/R_MIPS_ADD_IMMEDIATE/R_MIPS_ADD_IMMEDIATE (2236962) +ELF-MIPS64EL: Type: R_MIPS_PJUMP/R_MIPS_PJUMP/R_MIPS_PJUMP (2302755) +ELF-MIPS64EL: Type: R_MIPS_RELGOT/R_MIPS_RELGOT/R_MIPS_RELGOT (2368548) +ELF-MIPS64EL: Type: R_MIPS_JALR/R_MIPS_JALR/R_MIPS_JALR (2434341) +ELF-MIPS64EL: Type: R_MIPS_TLS_DTPMOD32/R_MIPS_TLS_DTPMOD32/R_MIPS_TLS_DTPMOD32 (2500134) +ELF-MIPS64EL: Type: R_MIPS_TLS_DTPREL32/R_MIPS_TLS_DTPREL32/R_MIPS_TLS_DTPREL32 (2565927) +ELF-MIPS64EL: Type: R_MIPS_TLS_DTPMOD64/R_MIPS_TLS_DTPMOD64/R_MIPS_TLS_DTPMOD64 (2631720) +ELF-MIPS64EL: Type: R_MIPS_TLS_DTPREL64/R_MIPS_TLS_DTPREL64/R_MIPS_TLS_DTPREL64 (2697513) +ELF-MIPS64EL: Type: R_MIPS_TLS_GD/R_MIPS_TLS_GD/R_MIPS_TLS_GD (2763306) +ELF-MIPS64EL: Type: R_MIPS_TLS_LDM/R_MIPS_TLS_LDM/R_MIPS_TLS_LDM (2829099) +ELF-MIPS64EL: Type: R_MIPS_TLS_DTPREL_HI16/R_MIPS_TLS_DTPREL_HI16/R_MIPS_TLS_DTPREL_HI16 (2894892) +ELF-MIPS64EL: Type: R_MIPS_TLS_DTPREL_LO16/R_MIPS_TLS_DTPREL_LO16/R_MIPS_TLS_DTPREL_LO16 (2960685) +ELF-MIPS64EL: Type: R_MIPS_TLS_GOTTPREL/R_MIPS_TLS_GOTTPREL/R_MIPS_TLS_GOTTPREL (3026478) +ELF-MIPS64EL: Type: R_MIPS_TLS_TPREL32/R_MIPS_TLS_TPREL32/R_MIPS_TLS_TPREL32 (3092271) +ELF-MIPS64EL: Type: R_MIPS_TLS_TPREL64/R_MIPS_TLS_TPREL64/R_MIPS_TLS_TPREL64 (3158064) +ELF-MIPS64EL: Type: R_MIPS_TLS_TPREL_HI16/R_MIPS_TLS_TPREL_HI16/R_MIPS_TLS_TPREL_HI16 (3223857) +ELF-MIPS64EL: Type: R_MIPS_TLS_TPREL_LO16/R_MIPS_TLS_TPREL_LO16/R_MIPS_TLS_TPREL_LO16 (3289650) +ELF-MIPS64EL: Type: R_MIPS_GLOB_DAT/R_MIPS_GLOB_DAT/R_MIPS_GLOB_DAT (3355443) +ELF-MIPS64EL: Type: R_MIPS_COPY/R_MIPS_COPY/R_MIPS_COPY (8289918) +ELF-MIPS64EL: Type: R_MIPS_JUMP_SLOT/R_MIPS_JUMP_SLOT/R_MIPS_JUMP_SLOT (8355711) +ELF-MIPS64EL: Type: R_MIPS_NUM/R_MIPS_NUM/R_MIPS_NUM (14342874) + +ELF-MBLAZE: Type: R_MICROBLAZE_NONE (0) +ELF-MBLAZE: Type: R_MICROBLAZE_32 (1) +ELF-MBLAZE: Type: R_MICROBLAZE_32_PCREL (2) +ELF-MBLAZE: Type: R_MICROBLAZE_64_PCREL (3) +ELF-MBLAZE: Type: R_MICROBLAZE_32_PCREL_LO (4) +ELF-MBLAZE: Type: R_MICROBLAZE_64 (5) +ELF-MBLAZE: Type: R_MICROBLAZE_32_LO (6) +ELF-MBLAZE: Type: R_MICROBLAZE_SRO32 (7) +ELF-MBLAZE: Type: R_MICROBLAZE_SRW32 (8) +ELF-MBLAZE: Type: R_MICROBLAZE_64_NONE (9) +ELF-MBLAZE: Type: R_MICROBLAZE_32_SYM_OP_SYM (10) +ELF-MBLAZE: Type: R_MICROBLAZE_GNU_VTINHERIT (11) +ELF-MBLAZE: Type: R_MICROBLAZE_GNU_VTENTRY (12) +ELF-MBLAZE: Type: R_MICROBLAZE_GOTPC_64 (13) +ELF-MBLAZE: Type: R_MICROBLAZE_GOT_64 (14) +ELF-MBLAZE: Type: R_MICROBLAZE_PLT_64 (15) +ELF-MBLAZE: Type: R_MICROBLAZE_REL (16) +ELF-MBLAZE: Type: R_MICROBLAZE_JUMP_SLOT (17) +ELF-MBLAZE: Type: R_MICROBLAZE_GLOB_DAT (18) +ELF-MBLAZE: Type: R_MICROBLAZE_GOTOFF_64 (19) +ELF-MBLAZE: Type: R_MICROBLAZE_GOTOFF_32 (20) +ELF-MBLAZE: Type: R_MICROBLAZE_COPY (21) + +ELF-HEXAGON: Type: R_HEX_NONE (0) +ELF-HEXAGON: Type: R_HEX_B22_PCREL (1) +ELF-HEXAGON: Type: R_HEX_B15_PCREL (2) +ELF-HEXAGON: Type: R_HEX_B7_PCREL (3) +ELF-HEXAGON: Type: R_HEX_LO16 (4) +ELF-HEXAGON: Type: R_HEX_HI16 (5) +ELF-HEXAGON: Type: R_HEX_32 (6) +ELF-HEXAGON: Type: R_HEX_16 (7) +ELF-HEXAGON: Type: R_HEX_8 (8) +ELF-HEXAGON: Type: R_HEX_GPREL16_0 (9) +ELF-HEXAGON: Type: R_HEX_GPREL16_1 (10) +ELF-HEXAGON: Type: R_HEX_GPREL16_2 (11) +ELF-HEXAGON: Type: R_HEX_GPREL16_3 (12) +ELF-HEXAGON: Type: R_HEX_HL16 (13) +ELF-HEXAGON: Type: R_HEX_B13_PCREL (14) +ELF-HEXAGON: Type: R_HEX_B9_PCREL (15) +ELF-HEXAGON: Type: R_HEX_B32_PCREL_X (16) +ELF-HEXAGON: Type: R_HEX_32_6_X (17) +ELF-HEXAGON: Type: R_HEX_B22_PCREL_X (18) +ELF-HEXAGON: Type: R_HEX_B15_PCREL_X (19) +ELF-HEXAGON: Type: R_HEX_B13_PCREL_X (20) +ELF-HEXAGON: Type: R_HEX_B9_PCREL_X (21) +ELF-HEXAGON: Type: R_HEX_B7_PCREL_X (22) +ELF-HEXAGON: Type: R_HEX_16_X (23) +ELF-HEXAGON: Type: R_HEX_12_X (24) +ELF-HEXAGON: Type: R_HEX_11_X (25) +ELF-HEXAGON: Type: R_HEX_10_X (26) +ELF-HEXAGON: Type: R_HEX_9_X (27) +ELF-HEXAGON: Type: R_HEX_8_X (28) +ELF-HEXAGON: Type: R_HEX_7_X (29) +ELF-HEXAGON: Type: R_HEX_6_X (30) +ELF-HEXAGON: Type: R_HEX_32_PCREL (31) +ELF-HEXAGON: Type: R_HEX_COPY (32) +ELF-HEXAGON: Type: R_HEX_GLOB_DAT (33) +ELF-HEXAGON: Type: R_HEX_JMP_SLOT (34) +ELF-HEXAGON: Type: R_HEX_RELATIVE (35) +ELF-HEXAGON: Type: R_HEX_PLT_B22_PCREL (36) +ELF-HEXAGON: Type: R_HEX_GOTREL_LO16 (37) +ELF-HEXAGON: Type: R_HEX_GOTREL_HI16 (38) +ELF-HEXAGON: Type: R_HEX_GOTREL_32 (39) +ELF-HEXAGON: Type: R_HEX_GOT_LO16 (40) +ELF-HEXAGON: Type: R_HEX_GOT_HI16 (41) +ELF-HEXAGON: Type: R_HEX_GOT_32 (42) +ELF-HEXAGON: Type: R_HEX_GOT_16 (43) +ELF-HEXAGON: Type: R_HEX_DTPMOD_32 (44) +ELF-HEXAGON: Type: R_HEX_DTPREL_LO16 (45) +ELF-HEXAGON: Type: R_HEX_DTPREL_HI16 (46) +ELF-HEXAGON: Type: R_HEX_DTPREL_32 (47) +ELF-HEXAGON: Type: R_HEX_DTPREL_16 (48) +ELF-HEXAGON: Type: R_HEX_GD_PLT_B22_PCREL (49) +ELF-HEXAGON: Type: R_HEX_GD_GOT_LO16 (50) +ELF-HEXAGON: Type: R_HEX_GD_GOT_HI16 (51) +ELF-HEXAGON: Type: R_HEX_GD_GOT_32 (52) +ELF-HEXAGON: Type: R_HEX_GD_GOT_16 (53) +ELF-HEXAGON: Type: R_HEX_IE_LO16 (54) +ELF-HEXAGON: Type: R_HEX_IE_HI16 (55) +ELF-HEXAGON: Type: R_HEX_IE_32 (56) +ELF-HEXAGON: Type: R_HEX_IE_GOT_LO16 (57) +ELF-HEXAGON: Type: R_HEX_IE_GOT_HI16 (58) +ELF-HEXAGON: Type: R_HEX_IE_GOT_32 (59) +ELF-HEXAGON: Type: R_HEX_IE_GOT_16 (60) +ELF-HEXAGON: Type: R_HEX_TPREL_LO16 (61) +ELF-HEXAGON: Type: R_HEX_TPREL_HI16 (62) +ELF-HEXAGON: Type: R_HEX_TPREL_32 (63) +ELF-HEXAGON: Type: R_HEX_TPREL_16 (64) +ELF-HEXAGON: Type: R_HEX_6_PCREL_X (65) +ELF-HEXAGON: Type: R_HEX_GOTREL_32_6_X (66) +ELF-HEXAGON: Type: R_HEX_GOTREL_16_X (67) +ELF-HEXAGON: Type: R_HEX_GOTREL_11_X (68) +ELF-HEXAGON: Type: R_HEX_GOT_32_6_X (69) +ELF-HEXAGON: Type: R_HEX_GOT_16_X (70) +ELF-HEXAGON: Type: R_HEX_GOT_11_X (71) +ELF-HEXAGON: Type: R_HEX_DTPREL_32_6_X (72) +ELF-HEXAGON: Type: R_HEX_DTPREL_16_X (73) +ELF-HEXAGON: Type: R_HEX_DTPREL_11_X (74) +ELF-HEXAGON: Type: R_HEX_GD_GOT_32_6_X (75) +ELF-HEXAGON: Type: R_HEX_GD_GOT_16_X (76) +ELF-HEXAGON: Type: R_HEX_GD_GOT_11_X (77) +ELF-HEXAGON: Type: R_HEX_IE_32_6_X (78) +ELF-HEXAGON: Type: R_HEX_IE_16_X (79) +ELF-HEXAGON: Type: R_HEX_IE_GOT_32_6_X (80) +ELF-HEXAGON: Type: R_HEX_IE_GOT_16_X (81) +ELF-HEXAGON: Type: R_HEX_IE_GOT_11_X (82) +ELF-HEXAGON: Type: R_HEX_TPREL_32_6_X (83) +ELF-HEXAGON: Type: R_HEX_TPREL_16_X (84) +ELF-HEXAGON: Type: R_HEX_TPREL_11_X (85) + +COFF-32: Type: IMAGE_REL_I386_ABSOLUTE (0) +COFF-32: Type: IMAGE_REL_I386_DIR16 (1) +COFF-32: Type: IMAGE_REL_I386_REL16 (2) +COFF-32: Type: IMAGE_REL_I386_DIR32 (6) +COFF-32: Type: IMAGE_REL_I386_DIR32NB (7) +COFF-32: Type: IMAGE_REL_I386_SEG12 (9) +COFF-32: Type: IMAGE_REL_I386_SECTION (10) +COFF-32: Type: IMAGE_REL_I386_SECREL (11) +COFF-32: Type: IMAGE_REL_I386_TOKEN (12) +COFF-32: Type: IMAGE_REL_I386_SECREL7 (13) +COFF-32: Type: IMAGE_REL_I386_REL32 (20) + +COFF-64: Type: IMAGE_REL_AMD64_ABSOLUTE (0) +COFF-64: Type: IMAGE_REL_AMD64_ADDR64 (1) +COFF-64: Type: IMAGE_REL_AMD64_ADDR32 (2) +COFF-64: Type: IMAGE_REL_AMD64_ADDR32NB (3) +COFF-64: Type: IMAGE_REL_AMD64_REL32 (4) +COFF-64: Type: IMAGE_REL_AMD64_REL32_1 (5) +COFF-64: Type: IMAGE_REL_AMD64_REL32_2 (6) +COFF-64: Type: IMAGE_REL_AMD64_REL32_3 (7) +COFF-64: Type: IMAGE_REL_AMD64_REL32_4 (8) +COFF-64: Type: IMAGE_REL_AMD64_REL32_5 (9) +COFF-64: Type: IMAGE_REL_AMD64_SECTION (10) +COFF-64: Type: IMAGE_REL_AMD64_SECREL (11) +COFF-64: Type: IMAGE_REL_AMD64_SECREL7 (12) +COFF-64: Type: IMAGE_REL_AMD64_TOKEN (13) +COFF-64: Type: IMAGE_REL_AMD64_SREL32 (14) +COFF-64: Type: IMAGE_REL_AMD64_PAIR (15) +COFF-64: Type: IMAGE_REL_AMD64_SSPAN32 (16) + +COFF-ARM: Type: IMAGE_REL_ARM_ABSOLUTE (0x0000) +COFF-ARM: Type: IMAGE_REL_ARM_ADDR32 (0x0001) +COFF-ARM: Type: IMAGE_REL_ARM_ADDR32NB (0x0002) +COFF-ARM: Type: IMAGE_REL_ARM_BRANCH24 (0x0003) +COFF-ARM: Type: IMAGE_REL_ARM_BRANCH11 (0x0004) +COFF-ARM: Type: IMAGE_REL_ARM_TOKEN (0x0005) +COFF-ARM: Type: IMAGE_REL_ARM_BLX24 (0x0008) +COFF-ARM: Type: IMAGE_REL_ARM_BLX11 (0x0009) +COFF-ARM: Type: IMAGE_REL_ARM_SECTION (0x000E) +COFF-ARM: Type: IMAGE_REL_ARM_SECREL (0x000F) +COFF-ARM: Type: IMAGE_REL_ARM_MOV32A (0x0010) +COFF-ARM: Type: IMAGE_REL_ARM_MOV32T (0x0011) +COFF-ARM: Type: IMAGE_REL_ARM_BRANCH20T (0x0012) +COFF-ARM: Type: IMAGE_REL_ARM_BRANCH24T (0x0014) +COFF-ARM: Type: IMAGE_REL_ARM_BLX23T (0x0015) + +MACHO-32: Type: GENERIC_RELOC_VANILLA (0) +MACHO-32: Type: GENERIC_RELOC_PAIR (1) +MACHO-32: Type: GENERIC_RELOC_SECTDIFF (2) +MACHO-32: Type: GENERIC_RELOC_PB_LA_PTR (3) +MACHO-32: Type: GENERIC_RELOC_LOCAL_SECTDIFF (4) +MACHO-32: Type: GENERIC_RELOC_TLV (5) + +MACHO-64: Type: X86_64_RELOC_UNSIGNED (0) +MACHO-64: Type: X86_64_RELOC_SIGNED (1) +MACHO-64: Type: X86_64_RELOC_BRANCH (2) +MACHO-64: Type: X86_64_RELOC_GOT_LOAD (3) +MACHO-64: Type: X86_64_RELOC_GOT (4) +MACHO-64: Type: X86_64_RELOC_SUBTRACTOR (5) +MACHO-64: Type: X86_64_RELOC_SIGNED_1 (6) +MACHO-64: Type: X86_64_RELOC_SIGNED_2 (7) +MACHO-64: Type: X86_64_RELOC_SIGNED_4 (8) +MACHO-64: Type: X86_64_RELOC_TLV (9) + +MACHO-ARM: Type: ARM_RELOC_VANILLA (0) +MACHO-ARM: Type: ARM_RELOC_PAIR (1) +MACHO-ARM: Type: ARM_RELOC_SECTDIFF (2) +MACHO-ARM: Type: ARM_RELOC_LOCAL_SECTDIFF (3) +MACHO-ARM: Type: ARM_RELOC_PB_LA_PTR (4) +MACHO-ARM: Type: ARM_RELOC_BR24 (5) +MACHO-ARM: Type: ARM_THUMB_RELOC_BR22 (6) +MACHO-ARM: Type: ARM_THUMB_32BIT_BRANCH (7) +MACHO-ARM: Type: ARM_RELOC_HALF (8) +MACHO-ARM: Type: ARM_RELOC_HALF_SECTDIFF (9) + +MACHO-PPC: PPC_RELOC_VANILLA (0) +MACHO-PPC: PPC_RELOC_PAIR (1) +MACHO-PPC: PPC_RELOC_BR14 (2) +MACHO-PPC: PPC_RELOC_BR24 (3) +MACHO-PPC: PPC_RELOC_HI16 (4) +MACHO-PPC: PPC_RELOC_LO16 (5) +MACHO-PPC: PPC_RELOC_HA16 (6) +MACHO-PPC: PPC_RELOC_LO14 (7) +MACHO-PPC: PPC_RELOC_SECTDIFF (8) +MACHO-PPC: PPC_RELOC_PB_LA_PTR (9) +MACHO-PPC: PPC_RELOC_HI16_SECTDIFF (10) +MACHO-PPC: PPC_RELOC_LO16_SECTDIFF (11) +MACHO-PPC: PPC_RELOC_HA16_SECTDIFF (12) +MACHO-PPC: PPC_RELOC_JBSR (13) +MACHO-PPC: PPC_RELOC_LO14_SECTDIFF (14) +MACHO-PPC: PPC_RELOC_LOCAL_SECTDIFF (15) diff --git a/test/tools/llvm-readobj/relocations.test b/test/tools/llvm-readobj/relocations.test new file mode 100644 index 0000000..dec7f86 --- /dev/null +++ b/test/tools/llvm-readobj/relocations.test @@ -0,0 +1,173 @@ +RUN: llvm-readobj -r %p/Inputs/trivial.obj.coff-i386 \ +RUN: | FileCheck %s -check-prefix COFF +RUN: llvm-readobj -r %p/Inputs/trivial.obj.elf-i386 \ +RUN: | FileCheck %s -check-prefix ELF +RUN: llvm-readobj -r %p/Inputs/trivial.obj.macho-i386 \ +RUN: | FileCheck %s -check-prefix MACHO-I386 +RUN: llvm-readobj -r %p/Inputs/trivial.obj.macho-x86-64 \ +RUN: | FileCheck %s -check-prefix MACHO-X86-64 +RUN: llvm-readobj -r %p/Inputs/trivial.obj.macho-ppc \ +RUN: | FileCheck %s -check-prefix MACHO-PPC +RUN: llvm-readobj -r %p/Inputs/trivial.obj.macho-ppc64 \ +RUN: | FileCheck %s -check-prefix MACHO-PPC64 +RUN: llvm-readobj -r -expand-relocs %p/Inputs/trivial.obj.macho-arm \ +RUN: | FileCheck %s -check-prefix MACHO-ARM + +COFF: Relocations [ +COFF-NEXT: Section (1) .text { +COFF-NEXT: 0x4 IMAGE_REL_I386_DIR32 .data +COFF-NEXT: 0x9 IMAGE_REL_I386_REL32 _puts +COFF-NEXT: 0xE IMAGE_REL_I386_REL32 _SomeOtherFunction +COFF-NEXT: } +COFF-NEXT: ] + +ELF: Relocations [ +ELF-NEXT: Section (1) .text { +ELF-NEXT: 0xC R_386_GOTPC _GLOBAL_OFFSET_TABLE_ 0x0 +ELF-NEXT: 0x12 R_386_GOTOFF .L.str 0x0 +ELF-NEXT: 0x1A R_386_PLT32 puts 0x0 +ELF-NEXT: 0x1F R_386_PLT32 SomeOtherFunction 0x0 +ELF-NEXT: } +ELF-NEXT: ] + +MACHO-I386: Relocations [ +MACHO-I386-NEXT: Section __text { +MACHO-I386-NEXT: 0x18 1 2 1 GENERIC_RELOC_VANILLA 0 _SomeOtherFunction +MACHO-I386-NEXT: 0x13 1 2 1 GENERIC_RELOC_VANILLA 0 _puts +MACHO-I386-NEXT: 0xB 0 2 n/a GENERIC_RELOC_LOCAL_SECTDIFF 1 - +MACHO-I386-NEXT: 0x0 0 2 n/a GENERIC_RELOC_PAIR 1 - +MACHO-I386-NEXT: } +MACHO-I386-NEXT: ] + +MACHO-X86-64: Relocations [ +MACHO-X86-64-NEXT: Section __text { +MACHO-X86-64-NEXT: 0xE 1 2 1 X86_64_RELOC_BRANCH 0 _SomeOtherFunction +MACHO-X86-64-NEXT: 0x9 1 2 1 X86_64_RELOC_BRANCH 0 _puts +MACHO-X86-64-NEXT: 0x4 1 2 1 X86_64_RELOC_SIGNED 0 L_.str +MACHO-X86-64-NEXT: } +MACHO-X86-64-NEXT:] + +MACHO-PPC: Relocations [ +MACHO-PPC-NEXT: Section __text { +MACHO-PPC-NEXT: 0x24 0 2 n/a PPC_RELOC_LO16_SECTDIFF 1 - +MACHO-PPC-NEXT: 0x0 0 2 n/a PPC_RELOC_PAIR 1 - +MACHO-PPC-NEXT: 0x1C 0 2 n/a PPC_RELOC_HA16_SECTDIFF 1 - +MACHO-PPC-NEXT: 0x58 0 2 n/a PPC_RELOC_PAIR 1 - +MACHO-PPC-NEXT: 0x18 1 2 0 PPC_RELOC_BR24 0 - +MACHO-PPC-NEXT: } +MACHO-PPC-NEXT: Section __picsymbolstub1 { +MACHO-PPC-NEXT: 0x14 0 2 n/a PPC_RELOC_LO16_SECTDIFF 1 - +MACHO-PPC-NEXT: 0x0 0 2 n/a PPC_RELOC_PAIR 1 - +MACHO-PPC-NEXT: 0xC 0 2 n/a PPC_RELOC_HA16_SECTDIFF 1 - +MACHO-PPC-NEXT: 0x20 0 2 n/a PPC_RELOC_PAIR 1 - +MACHO-PPC-NEXT: } +MACHO-PPC-NEXT: Section __la_symbol_ptr { +MACHO-PPC-NEXT: 0x0 0 2 1 PPC_RELOC_VANILLA 0 dyld_stub_binding_helper +MACHO-PPC-NEXT: } +MACHO-PPC-NEXT: ] + +MACHO-PPC64: Relocations [ +MACHO-PPC64-NEXT: Section __text { +MACHO-PPC64-NEXT: 0x24 0 2 n/a 1 - +MACHO-PPC64-NEXT: 0x0 0 2 n/a 1 - +MACHO-PPC64-NEXT: 0x1C 0 2 n/a 1 - +MACHO-PPC64-NEXT: 0x58 0 2 n/a 1 - +MACHO-PPC64-NEXT: 0x18 1 2 0 0 - +MACHO-PPC64-NEXT: } +MACHO-PPC64-NEXT: Section __picsymbolstub1 { +MACHO-PPC64-NEXT: 0x14 0 2 n/a 1 - +MACHO-PPC64-NEXT: 0x0 0 2 n/a 1 - +MACHO-PPC64-NEXT: 0xC 0 2 n/a 1 - +MACHO-PPC64-NEXT: 0x24 0 2 n/a 1 - +MACHO-PPC64-NEXT: } +MACHO-PPC64-NEXT: Section __la_symbol_ptr { +MACHO-PPC64-NEXT: 0x0 0 3 1 0 dyld_stub_binding_helper +MACHO-PPC64-NEXT: } +MACHO-PPC64-NEXT: ] + + +MACHO-ARM: Relocations [ +MACHO-ARM-NEXT: Section __text { +MACHO-ARM-NEXT: Relocation { +MACHO-ARM-NEXT: Offset: 0x38 +MACHO-ARM-NEXT: PCRel: 0 +MACHO-ARM-NEXT: Length: 2 +MACHO-ARM-NEXT: Extern: N/A +MACHO-ARM-NEXT: Type: ARM_RELOC_SECTDIFF (2) +MACHO-ARM-NEXT: Symbol: - +MACHO-ARM-NEXT: Scattered: 1 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Relocation { +MACHO-ARM-NEXT: Offset: 0x0 +MACHO-ARM-NEXT: PCRel: 0 +MACHO-ARM-NEXT: Length: 2 +MACHO-ARM-NEXT: Extern: N/A +MACHO-ARM-NEXT: Type: ARM_RELOC_PAIR (1) +MACHO-ARM-NEXT: Symbol: - +MACHO-ARM-NEXT: Scattered: 1 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Relocation { +MACHO-ARM-NEXT: Offset: 0x20 +MACHO-ARM-NEXT: PCRel: 1 +MACHO-ARM-NEXT: Length: 2 +MACHO-ARM-NEXT: Extern: 1 +MACHO-ARM-NEXT: Type: ARM_RELOC_BR24 (5) +MACHO-ARM-NEXT: Symbol: _g +MACHO-ARM-NEXT: Scattered: 0 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Relocation { +MACHO-ARM-NEXT: Offset: 0x1C +MACHO-ARM-NEXT: PCRel: 0 +MACHO-ARM-NEXT: Length: 1 +MACHO-ARM-NEXT: Extern: 1 +MACHO-ARM-NEXT: Type: ARM_RELOC_HALF (8) +MACHO-ARM-NEXT: Symbol: _g +MACHO-ARM-NEXT: Scattered: 0 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Relocation { +MACHO-ARM-NEXT: Offset: 0x0 +MACHO-ARM-NEXT: PCRel: 0 +MACHO-ARM-NEXT: Length: 1 +MACHO-ARM-NEXT: Extern: 0 +MACHO-ARM-NEXT: Type: ARM_RELOC_PAIR (1) +MACHO-ARM-NEXT: Symbol: - +MACHO-ARM-NEXT: Scattered: 0 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Relocation { +MACHO-ARM-NEXT: Offset: 0x18 +MACHO-ARM-NEXT: PCRel: 0 +MACHO-ARM-NEXT: Length: 0 +MACHO-ARM-NEXT: Extern: 1 +MACHO-ARM-NEXT: Type: ARM_RELOC_HALF (8) +MACHO-ARM-NEXT: Symbol: _g +MACHO-ARM-NEXT: Scattered: 0 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Relocation { +MACHO-ARM-NEXT: Offset: 0x0 +MACHO-ARM-NEXT: PCRel: 0 +MACHO-ARM-NEXT: Length: 0 +MACHO-ARM-NEXT: Extern: 0 +MACHO-ARM-NEXT: Type: ARM_RELOC_PAIR (1) +MACHO-ARM-NEXT: Symbol: - +MACHO-ARM-NEXT: Scattered: 0 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Relocation { +MACHO-ARM-NEXT: Offset: 0xC +MACHO-ARM-NEXT: PCRel: 0 +MACHO-ARM-NEXT: Length: 2 +MACHO-ARM-NEXT: Extern: N/A +MACHO-ARM-NEXT: Type: ARM_RELOC_SECTDIFF (2) +MACHO-ARM-NEXT: Symbol: - +MACHO-ARM-NEXT: Scattered: 1 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Relocation { +MACHO-ARM-NEXT: Offset: 0x0 +MACHO-ARM-NEXT: PCRel: 0 +MACHO-ARM-NEXT: Length: 2 +MACHO-ARM-NEXT: Extern: N/A +MACHO-ARM-NEXT: Type: ARM_RELOC_PAIR (1) +MACHO-ARM-NEXT: Symbol: - +MACHO-ARM-NEXT: Scattered: 1 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: ] diff --git a/test/tools/llvm-readobj/sections-ext.test b/test/tools/llvm-readobj/sections-ext.test new file mode 100644 index 0000000..327f040 --- /dev/null +++ b/test/tools/llvm-readobj/sections-ext.test @@ -0,0 +1,841 @@ +RUN: llvm-readobj -s -st -sr -sd %p/Inputs/trivial.obj.coff-i386 \ +RUN: | FileCheck %s -check-prefix COFF +RUN: llvm-readobj -s -st -sr -sd %p/Inputs/trivial.obj.elf-i386 \ +RUN: | FileCheck %s -check-prefix ELF +RUN: llvm-readobj -s -st -sr -sd %p/Inputs/trivial.obj.macho-i386 \ +RUN: | FileCheck %s -check-prefix MACHO-I386 +RUN: llvm-readobj -s -st -sr -sd %p/Inputs/trivial.obj.macho-x86-64 \ +RUN: | FileCheck %s -check-prefix MACHO-X86-64 +RUN: llvm-readobj -s -st -sr -sd %p/Inputs/trivial.obj.macho-ppc \ +RUN: | FileCheck %s -check-prefix MACHO-PPC +RUN: llvm-readobj -s -st -sr -sd %p/Inputs/trivial.obj.macho-ppc64 \ +RUN: | FileCheck %s -check-prefix MACHO-PPC64 +RUN: llvm-readobj -expand-relocs -s -st -sr -sd %p/Inputs/trivial.obj.macho-arm \ +RUN: | FileCheck %s -check-prefix MACHO-ARM + +COFF: Sections [ +COFF-NEXT: Section { +COFF-NEXT: Number: 1 +COFF-NEXT: Name: .text (2E 74 65 78 74 00 00 00) +COFF-NEXT: VirtualSize: 0x0 +COFF-NEXT: VirtualAddress: 0x0 +COFF-NEXT: RawDataSize: 22 +COFF-NEXT: PointerToRawData: 0x64 +COFF-NEXT: PointerToRelocations: 0x7A +COFF-NEXT: PointerToLineNumbers: 0x0 +COFF-NEXT: RelocationCount: 3 +COFF-NEXT: LineNumberCount: 0 +COFF-NEXT: Characteristics [ (0x60500020) +COFF-NEXT: IMAGE_SCN_ALIGN_16BYTES (0x500000) +COFF-NEXT: IMAGE_SCN_CNT_CODE (0x20) +COFF-NEXT: IMAGE_SCN_MEM_EXECUTE (0x20000000) +COFF-NEXT: IMAGE_SCN_MEM_READ (0x40000000) +COFF-NEXT: ] +COFF-NEXT: Relocations [ +COFF-NEXT: 0x4 IMAGE_REL_I386_DIR32 .data +COFF-NEXT: 0x9 IMAGE_REL_I386_REL32 _puts +COFF-NEXT: 0xE IMAGE_REL_I386_REL32 _SomeOtherFunction +COFF-NEXT: ] +COFF-NEXT: Symbols [ +COFF-NEXT: Symbol { +COFF-NEXT: Name: .text +COFF-NEXT: Value: 0 +COFF-NEXT: Section: .text (1) +COFF-NEXT: BaseType: Null (0x0) +COFF-NEXT: ComplexType: Null (0x0) +COFF-NEXT: StorageClass: Static (0x3) +COFF-NEXT: AuxSymbolCount: 1 +COFF-NEXT: AuxSectionDef { +COFF-NEXT: Length: 22 +COFF-NEXT: RelocationCount: 3 +COFF-NEXT: LineNumberCount: 0 +COFF-NEXT: Checksum: 0x0 +COFF-NEXT: Number: 1 +COFF-NEXT: Selection: 0x0 +COFF-NEXT: Unused: (00 00 00) +COFF-NEXT: } +COFF-NEXT: } +COFF-NEXT: Symbol { +COFF-NEXT: Name: _main +COFF-NEXT: Value: 0 +COFF-NEXT: Section: .text (1) +COFF-NEXT: BaseType: Null (0x0) +COFF-NEXT: ComplexType: Function (0x2) +COFF-NEXT: StorageClass: External (0x2) +COFF-NEXT: AuxSymbolCount: 0 +COFF-NEXT: } +COFF-NEXT: ] +COFF-NEXT: SectionData ( +COFF-NEXT: 0000: 50C70424 00000000 E8000000 00E80000 |P..$............| +COFF-NEXT: 0010: 000031C0 5AC3 |..1.Z.| +COFF-NEXT: ) +COFF-NEXT: } + +ELF: Sections [ +ELF-NEXT: Section { +ELF-NEXT: Index: 0 +ELF-NEXT: Name: (0) +ELF-NEXT: Type: SHT_NULL (0x0) +ELF-NEXT: Flags [ (0x0) +ELF-NEXT: ] +ELF-NEXT: Address: 0x0 +ELF-NEXT: Offset: 0x0 +ELF-NEXT: Size: 0 +ELF-NEXT: Link: 0 +ELF-NEXT: Info: 0 +ELF-NEXT: AddressAlignment: 0 +ELF-NEXT: EntrySize: 0 +ELF-NEXT: Relocations [ +ELF-NEXT: ] +ELF-NEXT: Symbols [ +ELF-NEXT: ] +ELF-NEXT: SectionData ( +ELF-NEXT: ) +ELF-NEXT: } +ELF-NEXT: Section { +ELF-NEXT: Index: 1 +ELF-NEXT: Name: .text (5) +ELF-NEXT: Type: SHT_PROGBITS (0x1) +ELF-NEXT: Flags [ (0x6) +ELF-NEXT: SHF_ALLOC (0x2) +ELF-NEXT: SHF_EXECINSTR (0x4) +ELF-NEXT: ] +ELF-NEXT: Address: 0x0 +ELF-NEXT: Offset: 0x40 +ELF-NEXT: Size: 42 +ELF-NEXT: Link: 0 +ELF-NEXT: Info: 0 +ELF-NEXT: AddressAlignment: 16 +ELF-NEXT: EntrySize: 0 +ELF-NEXT: Relocations [ +ELF-NEXT: 0xC R_386_GOTPC _GLOBAL_OFFSET_TABLE_ 0x0 +ELF-NEXT: 0x12 R_386_GOTOFF .L.str 0x0 +ELF-NEXT: 0x1A R_386_PLT32 puts 0x0 +ELF-NEXT: 0x1F R_386_PLT32 SomeOtherFunction 0x0 +ELF-NEXT: ] +ELF-NEXT: Symbols [ +ELF-NEXT: Symbol { +ELF-NEXT: Name: .text (0) +ELF-NEXT: Value: 0x0 +ELF-NEXT: Size: 0 +ELF-NEXT: Binding: Local (0x0) +ELF-NEXT: Type: Section (0x3) +ELF-NEXT: Other: 0 +ELF-NEXT: Section: .text (0x1) +ELF-NEXT: } +ELF-NEXT: Symbol { +ELF-NEXT: Name: main (12) +ELF-NEXT: Value: 0x0 +ELF-NEXT: Size: 42 +ELF-NEXT: Binding: Global (0x1) +ELF-NEXT: Type: Function (0x2) +ELF-NEXT: Other: 0 +ELF-NEXT: Section: .text (0x1) +ELF-NEXT: } +ELF-NEXT: ] +ELF-NEXT: SectionData ( +ELF-NEXT: 0000: 5383EC08 E8000000 005B81C3 03000000 |S........[......| +ELF-NEXT: 0010: 8D830000 00008904 24E8FCFF FFFFE8FC |........$.......| +ELF-NEXT: 0020: FFFFFF31 C083C408 5BC3 |...1....[.| +ELF-NEXT: ) +ELF-NEXT: } + +MACHO-I386: Sections [ +MACHO-I386-NEXT: Section { +MACHO-I386-NEXT: Index: 0 +MACHO-I386-NEXT: Name: __text (5F 5F 74 65 78 74 00 00 00 00 00 00 00 00 00 00) +MACHO-I386-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-I386-NEXT: Address: 0x0 +MACHO-I386-NEXT: Size: 0x22 +MACHO-I386-NEXT: Offset: 324 +MACHO-I386-NEXT: Alignment: 4 +MACHO-I386-NEXT: RelocationOffset: 0x174 +MACHO-I386-NEXT: RelocationCount: 4 +MACHO-I386-NEXT: Type: 0x0 +MACHO-I386-NEXT: Attributes [ (0x800004) +MACHO-I386-NEXT: PureInstructions (0x800000) +MACHO-I386-NEXT: SomeInstructions (0x4) +MACHO-I386-NEXT: ] +MACHO-I386-NEXT: Reserved1: 0x0 +MACHO-I386-NEXT: Reserved2: 0x0 +MACHO-I386-NEXT: Relocations [ +MACHO-I386-NEXT: 0x18 1 2 1 GENERIC_RELOC_VANILLA 0 _SomeOtherFunction +MACHO-I386-NEXT: 0x13 1 2 1 GENERIC_RELOC_VANILLA 0 _puts +MACHO-I386-NEXT: 0xB 0 2 n/a GENERIC_RELOC_LOCAL_SECTDIFF 1 - +MACHO-I386-NEXT: 0x0 0 2 n/a GENERIC_RELOC_PAIR 1 - +MACHO-I386-NEXT: ] +MACHO-I386-NEXT: Symbols [ +MACHO-I386-NEXT: Symbol { +MACHO-I386-NEXT: Name: _main (1) +MACHO-I386-NEXT: Type: 0xF +MACHO-I386-NEXT: Section: __text (0x1) +MACHO-I386-NEXT: RefType: UndefinedNonLazy (0x0) +MACHO-I386-NEXT: Flags [ (0x0) +MACHO-I386-NEXT: ] +MACHO-I386-NEXT: Value: 0x0 +MACHO-I386-NEXT: } +MACHO-I386-NEXT: ] +MACHO-I386-NEXT: SectionData ( +MACHO-I386-NEXT: 0000: 83EC0CE8 00000000 588D801A 00000089 |........X.......| +MACHO-I386-NEXT: 0010: 0424E8E9 FFFFFFE8 E4FFFFFF 31C083C4 |.$..........1...| +MACHO-I386-NEXT: 0020: 0CC3 |..| +MACHO-I386-NEXT: ) +MACHO-I386-NEXT: } + + +MACHO-X86-64: Sections [ +MACHO-X86-64-NEXT: Section { +MACHO-X86-64-NEXT: Index: 0 +MACHO-X86-64-NEXT: Name: __text (5F 5F 74 65 78 74 00 00 00 00 00 00 00 00 00 00) +MACHO-X86-64-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-X86-64-NEXT: Address: 0x0 +MACHO-X86-64-NEXT: Size: 0x16 +MACHO-X86-64-NEXT: Offset: 368 +MACHO-X86-64-NEXT: Alignment: 4 +MACHO-X86-64-NEXT: RelocationOffset: 0x194 +MACHO-X86-64-NEXT: RelocationCount: 3 +MACHO-X86-64-NEXT: Type: 0x0 +MACHO-X86-64-NEXT: Attributes [ (0x800004) +MACHO-X86-64-NEXT: PureInstructions (0x800000) +MACHO-X86-64-NEXT: SomeInstructions (0x4) +MACHO-X86-64-NEXT: ] +MACHO-X86-64-NEXT: Reserved1: 0x0 +MACHO-X86-64-NEXT: Reserved2: 0x0 +MACHO-X86-64-NEXT: Relocations [ +MACHO-X86-64-NEXT: 0xE 1 2 1 X86_64_RELOC_BRANCH 0 _SomeOtherFunction +MACHO-X86-64-NEXT: 0x9 1 2 1 X86_64_RELOC_BRANCH 0 _puts +MACHO-X86-64-NEXT: 0x4 1 2 1 X86_64_RELOC_SIGNED 0 L_.str +MACHO-X86-64-NEXT: ] +MACHO-X86-64-NEXT: Symbols [ +MACHO-X86-64-NEXT: Symbol { +MACHO-X86-64-NEXT: Name: _main (1) +MACHO-X86-64-NEXT: Type: 0xF +MACHO-X86-64-NEXT: Section: __text (0x1) +MACHO-X86-64-NEXT: RefType: UndefinedNonLazy (0x0) +MACHO-X86-64-NEXT: Flags [ (0x0) +MACHO-X86-64-NEXT: ] +MACHO-X86-64-NEXT: Value: 0x0 +MACHO-X86-64-NEXT: } +MACHO-X86-64-NEXT: ] +MACHO-X86-64-NEXT: SectionData ( +MACHO-X86-64-NEXT: 0000: 50488D3D 00000000 E8000000 00E80000 |PH.=............| +MACHO-X86-64-NEXT: 0010: 000031C0 5AC3 |..1.Z.| +MACHO-X86-64-NEXT: ) +MACHO-X86-64-NEXT: } +MACHO-X86-64-NEXT: Section { +MACHO-X86-64-NEXT: Index: 1 +MACHO-X86-64-NEXT: Name: __cstring (5F 5F 63 73 74 72 69 6E 67 00 00 00 00 00 00 00) +MACHO-X86-64-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-X86-64-NEXT: Address: 0x16 +MACHO-X86-64-NEXT: Size: 0xD +MACHO-X86-64-NEXT: Offset: 390 +MACHO-X86-64-NEXT: Alignment: 0 +MACHO-X86-64-NEXT: RelocationOffset: 0x0 +MACHO-X86-64-NEXT: RelocationCount: 0 +MACHO-X86-64-NEXT: Type: ExtReloc (0x2) +MACHO-X86-64-NEXT: Attributes [ (0x0) +MACHO-X86-64-NEXT: ] +MACHO-X86-64-NEXT: Reserved1: 0x0 +MACHO-X86-64-NEXT: Reserved2: 0x0 +MACHO-X86-64-NEXT: Relocations [ +MACHO-X86-64-NEXT: ] +MACHO-X86-64-NEXT: Symbols [ +MACHO-X86-64-NEXT: Symbol { +MACHO-X86-64-NEXT: Name: L_.str (32) +MACHO-X86-64-NEXT: Type: Section (0xE) +MACHO-X86-64-NEXT: Section: __cstring (0x2) +MACHO-X86-64-NEXT: RefType: UndefinedNonLazy (0x0) +MACHO-X86-64-NEXT: Flags [ (0x0) +MACHO-X86-64-NEXT: ] +MACHO-X86-64-NEXT: Value: 0x16 +MACHO-X86-64-NEXT: } +MACHO-X86-64-NEXT: ] +MACHO-X86-64-NEXT: SectionData ( +MACHO-X86-64-NEXT: 0000: 48656C6C 6F20576F 726C640A 00 |Hello World..| +MACHO-X86-64-NEXT: ) +MACHO-X86-64-NEXT: } +MACHO-X86-64-NEXT:] + +MACHO-PPC: Sections [ +MACHO-PPC-NEXT: Section { +MACHO-PPC-NEXT: Index: 0 +MACHO-PPC-NEXT: Name: __text (5F 5F 74 65 78 74 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC-NEXT: Address: 0x0 +MACHO-PPC-NEXT: Size: 0x3C +MACHO-PPC-NEXT: Offset: 528 +MACHO-PPC-NEXT: Alignment: 2 +MACHO-PPC-NEXT: RelocationOffset: 0x27C +MACHO-PPC-NEXT: RelocationCount: 5 +MACHO-PPC-NEXT: Type: 0x0 +MACHO-PPC-NEXT: Attributes [ (0x800004) +MACHO-PPC-NEXT: PureInstructions (0x800000) +MACHO-PPC-NEXT: SomeInstructions (0x4) +MACHO-PPC-NEXT: ] +MACHO-PPC-NEXT: Reserved1: 0x0 +MACHO-PPC-NEXT: Reserved2: 0x0 +MACHO-PPC-NEXT: Relocations [ +MACHO-PPC-NEXT: 0x24 0 2 n/a PPC_RELOC_LO16_SECTDIFF 1 - +MACHO-PPC-NEXT: 0x0 0 2 n/a PPC_RELOC_PAIR 1 - +MACHO-PPC-NEXT: 0x1C 0 2 n/a PPC_RELOC_HA16_SECTDIFF 1 - +MACHO-PPC-NEXT: 0x58 0 2 n/a PPC_RELOC_PAIR 1 - +MACHO-PPC-NEXT: 0x18 1 2 0 PPC_RELOC_BR24 0 - +MACHO-PPC-NEXT: ] +MACHO-PPC-NEXT: Symbols [ +MACHO-PPC-NEXT: Symbol { +MACHO-PPC-NEXT: Name: _f (4) +MACHO-PPC-NEXT: Type: 0xF +MACHO-PPC-NEXT: Section: __text (0x1) +MACHO-PPC-NEXT: RefType: UndefinedNonLazy (0x0) +MACHO-PPC-NEXT: Flags [ (0x0) +MACHO-PPC-NEXT: ] +MACHO-PPC-NEXT: Value: 0x0 +MACHO-PPC-NEXT: } +MACHO-PPC-NEXT: ] +MACHO-PPC-NEXT: SectionData ( +MACHO-PPC-NEXT: 0000: 7C0802A6 93E1FFFC 429F0005 7FE802A6 ||.......B.......| +MACHO-PPC-NEXT: 0010: 90010008 9421FFB0 48000029 3C5F0000 |.....!..H..)<_..| +MACHO-PPC-NEXT: 0020: 38210050 80420058 80010008 83E1FFFC |8!.P.B.X........| +MACHO-PPC-NEXT: 0030: 7C0803A6 80620000 4E800020 ||....b..N.. | +MACHO-PPC-NEXT: ) +MACHO-PPC-NEXT: } +MACHO-PPC-NEXT: Section { +MACHO-PPC-NEXT: Index: 1 +MACHO-PPC-NEXT: Name: __picsymbolstub1 (5F 5F 70 69 63 73 79 6D 62 6F 6C 73 74 75 62 31) +MACHO-PPC-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC-NEXT: Address: 0x40 +MACHO-PPC-NEXT: Size: 0x20 +MACHO-PPC-NEXT: Offset: 592 +MACHO-PPC-NEXT: Alignment: 5 +MACHO-PPC-NEXT: RelocationOffset: 0x2A4 +MACHO-PPC-NEXT: RelocationCount: 4 +MACHO-PPC-NEXT: Type: 0x8 +MACHO-PPC-NEXT: Attributes [ (0x800004) +MACHO-PPC-NEXT: PureInstructions (0x800000) +MACHO-PPC-NEXT: SomeInstructions (0x4) +MACHO-PPC-NEXT: ] +MACHO-PPC-NEXT: Reserved1: 0x0 +MACHO-PPC-NEXT: Reserved2: 0x20 +MACHO-PPC-NEXT: Relocations [ +MACHO-PPC-NEXT: 0x14 0 2 n/a PPC_RELOC_LO16_SECTDIFF 1 - +MACHO-PPC-NEXT: 0x0 0 2 n/a PPC_RELOC_PAIR 1 - +MACHO-PPC-NEXT: 0xC 0 2 n/a PPC_RELOC_HA16_SECTDIFF 1 - +MACHO-PPC-NEXT: 0x20 0 2 n/a PPC_RELOC_PAIR 1 - +MACHO-PPC-NEXT: ] +MACHO-PPC-NEXT: Symbols [ +MACHO-PPC-NEXT: ] +MACHO-PPC-NEXT: SectionData ( +MACHO-PPC-NEXT: 0000: 7C0802A6 429F0005 7D6802A6 3D6B0000 ||...B...}h..=k..| +MACHO-PPC-NEXT: 0010: 7C0803A6 858B0020 7D8903A6 4E800420 ||...... }...N.. | +MACHO-PPC-NEXT: ) +MACHO-PPC-NEXT: } +MACHO-PPC-NEXT: Section { +MACHO-PPC-NEXT: Index: 2 +MACHO-PPC-NEXT: Name: __data (5F 5F 64 61 74 61 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC-NEXT: Segment: __DATA (5F 5F 44 41 54 41 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC-NEXT: Address: 0x60 +MACHO-PPC-NEXT: Size: 0x4 +MACHO-PPC-NEXT: Offset: 624 +MACHO-PPC-NEXT: Alignment: 2 +MACHO-PPC-NEXT: RelocationOffset: 0x0 +MACHO-PPC-NEXT: RelocationCount: 0 +MACHO-PPC-NEXT: Type: 0x0 +MACHO-PPC-NEXT: Attributes [ (0x0) +MACHO-PPC-NEXT: ] +MACHO-PPC-NEXT: Reserved1: 0x0 +MACHO-PPC-NEXT: Reserved2: 0x0 +MACHO-PPC-NEXT: Relocations [ +MACHO-PPC-NEXT: ] +MACHO-PPC-NEXT: Symbols [ +MACHO-PPC-NEXT: Symbol { +MACHO-PPC-NEXT: Name: _b (1) +MACHO-PPC-NEXT: Type: 0xF +MACHO-PPC-NEXT: Section: __data (0x3) +MACHO-PPC-NEXT: RefType: UndefinedNonLazy (0x0) +MACHO-PPC-NEXT: Flags [ (0x0) +MACHO-PPC-NEXT: ] +MACHO-PPC-NEXT: Value: 0x60 +MACHO-PPC-NEXT: } +MACHO-PPC-NEXT: ] +MACHO-PPC-NEXT: SectionData ( +MACHO-PPC-NEXT: 0000: 0000002A |...*| +MACHO-PPC-NEXT: ) +MACHO-PPC-NEXT: } +MACHO-PPC-NEXT: Section { +MACHO-PPC-NEXT: Index: 3 +MACHO-PPC-NEXT: Name: __nl_symbol_ptr (5F 5F 6E 6C 5F 73 79 6D 62 6F 6C 5F 70 74 72 00) +MACHO-PPC-NEXT: Segment: __DATA (5F 5F 44 41 54 41 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC-NEXT: Address: 0x64 +MACHO-PPC-NEXT: Size: 0x4 +MACHO-PPC-NEXT: Offset: 628 +MACHO-PPC-NEXT: Alignment: 2 +MACHO-PPC-NEXT: RelocationOffset: 0x0 +MACHO-PPC-NEXT: RelocationCount: 0 +MACHO-PPC-NEXT: Type: 0x6 +MACHO-PPC-NEXT: Attributes [ (0x0) +MACHO-PPC-NEXT: ] +MACHO-PPC-NEXT: Reserved1: 0x1 +MACHO-PPC-NEXT: Reserved2: 0x0 +MACHO-PPC-NEXT: Relocations [ +MACHO-PPC-NEXT: ] +MACHO-PPC-NEXT: Symbols [ +MACHO-PPC-NEXT: ] +MACHO-PPC-NEXT: SectionData ( +MACHO-PPC-NEXT: 0000: 00000000 |....| +MACHO-PPC-NEXT: ) +MACHO-PPC-NEXT: } +MACHO-PPC-NEXT: Section { +MACHO-PPC-NEXT: Index: 4 +MACHO-PPC-NEXT: Name: __la_symbol_ptr (5F 5F 6C 61 5F 73 79 6D 62 6F 6C 5F 70 74 72 00) +MACHO-PPC-NEXT: Segment: __DATA (5F 5F 44 41 54 41 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC-NEXT: Address: 0x68 +MACHO-PPC-NEXT: Size: 0x4 +MACHO-PPC-NEXT: Offset: 632 +MACHO-PPC-NEXT: Alignment: 2 +MACHO-PPC-NEXT: RelocationOffset: 0x2C4 +MACHO-PPC-NEXT: RelocationCount: 1 +MACHO-PPC-NEXT: Type: 0x7 +MACHO-PPC-NEXT: Attributes [ (0x0) +MACHO-PPC-NEXT: ] +MACHO-PPC-NEXT: Reserved1: 0x2 +MACHO-PPC-NEXT: Reserved2: 0x0 +MACHO-PPC-NEXT: Relocations [ +MACHO-PPC-NEXT: 0x0 0 2 1 PPC_RELOC_VANILLA 0 dyld_stub_binding_helper +MACHO-PPC-NEXT: ] +MACHO-PPC-NEXT: Symbols [ +MACHO-PPC-NEXT: ] +MACHO-PPC-NEXT: SectionData ( +MACHO-PPC-NEXT: 0000: 00000000 |....| +MACHO-PPC-NEXT: ) +MACHO-PPC-NEXT: } +MACHO-PPC-NEXT: ] + + +MACHO-PPC64: Sections [ +MACHO-PPC64-NEXT: Section { +MACHO-PPC64-NEXT: Index: 0 +MACHO-PPC64-NEXT: Name: __text (5F 5F 74 65 78 74 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC64-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC64-NEXT: Address: 0x0 +MACHO-PPC64-NEXT: Size: 0x3C +MACHO-PPC64-NEXT: Offset: 608 +MACHO-PPC64-NEXT: Alignment: 2 +MACHO-PPC64-NEXT: RelocationOffset: 0x2D4 +MACHO-PPC64-NEXT: RelocationCount: 5 +MACHO-PPC64-NEXT: Type: 0x0 +MACHO-PPC64-NEXT: Attributes [ (0x800004) +MACHO-PPC64-NEXT: PureInstructions (0x800000) +MACHO-PPC64-NEXT: SomeInstructions (0x4) +MACHO-PPC64-NEXT: ] +MACHO-PPC64-NEXT: Reserved1: 0x0 +MACHO-PPC64-NEXT: Reserved2: 0x0 +MACHO-PPC64-NEXT: Relocations [ +MACHO-PPC64-NEXT: 0x24 0 2 n/a 1 - +MACHO-PPC64-NEXT: 0x0 0 2 n/a 1 - +MACHO-PPC64-NEXT: 0x1C 0 2 n/a 1 - +MACHO-PPC64-NEXT: 0x58 0 2 n/a 1 - +MACHO-PPC64-NEXT: 0x18 1 2 0 0 - +MACHO-PPC64-NEXT: ] +MACHO-PPC64-NEXT: Symbols [ +MACHO-PPC64-NEXT: Symbol { +MACHO-PPC64-NEXT: Name: _f (4) +MACHO-PPC64-NEXT: Type: 0xF +MACHO-PPC64-NEXT: Section: __text (0x1) +MACHO-PPC64-NEXT: RefType: UndefinedNonLazy (0x0) +MACHO-PPC64-NEXT: Flags [ (0x0) +MACHO-PPC64-NEXT: ] +MACHO-PPC64-NEXT: Value: 0x0 +MACHO-PPC64-NEXT: } +MACHO-PPC64-NEXT: ] +MACHO-PPC64-NEXT: SectionData ( +MACHO-PPC64-NEXT: 0000: 7C0802A6 FBE1FFF8 429F0005 7FE802A6 ||.......B.......| +MACHO-PPC64-NEXT: 0010: F8010010 F821FF81 48000029 3C5F0000 |.....!..H..)<_..| +MACHO-PPC64-NEXT: 0020: 38210080 E8420058 E8010010 EBE1FFF8 |8!...B.X........| +MACHO-PPC64-NEXT: 0030: 7C0803A6 E8620002 4E800020 ||....b..N.. | +MACHO-PPC64-NEXT: ) +MACHO-PPC64-NEXT: } +MACHO-PPC64-NEXT: Section { +MACHO-PPC64-NEXT: Index: 1 +MACHO-PPC64-NEXT: Name: __picsymbolstub1 (5F 5F 70 69 63 73 79 6D 62 6F 6C 73 74 75 62 31) +MACHO-PPC64-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC64-NEXT: Address: 0x40 +MACHO-PPC64-NEXT: Size: 0x20 +MACHO-PPC64-NEXT: Offset: 672 +MACHO-PPC64-NEXT: Alignment: 5 +MACHO-PPC64-NEXT: RelocationOffset: 0x2FC +MACHO-PPC64-NEXT: RelocationCount: 4 +MACHO-PPC64-NEXT: Type: 0x8 +MACHO-PPC64-NEXT: Attributes [ (0x800004) +MACHO-PPC64-NEXT: PureInstructions (0x800000) +MACHO-PPC64-NEXT: SomeInstructions (0x4) +MACHO-PPC64-NEXT: ] +MACHO-PPC64-NEXT: Reserved1: 0x0 +MACHO-PPC64-NEXT: Reserved2: 0x20 +MACHO-PPC64-NEXT: Relocations [ +MACHO-PPC64-NEXT: 0x14 0 2 n/a 1 - +MACHO-PPC64-NEXT: 0x0 0 2 n/a 1 - +MACHO-PPC64-NEXT: 0xC 0 2 n/a 1 - +MACHO-PPC64-NEXT: 0x24 0 2 n/a 1 - +MACHO-PPC64-NEXT: ] +MACHO-PPC64-NEXT: Symbols [ +MACHO-PPC64-NEXT: ] +MACHO-PPC64-NEXT: SectionData ( +MACHO-PPC64-NEXT: 0000: 7C0802A6 429F0005 7D6802A6 3D6B0000 ||...B...}h..=k..| +MACHO-PPC64-NEXT: 0010: 7C0803A6 E98B0025 7D8903A6 4E800420 ||......%}...N.. | +MACHO-PPC64-NEXT: ) +MACHO-PPC64-NEXT: } +MACHO-PPC64-NEXT: Section { +MACHO-PPC64-NEXT: Index: 2 +MACHO-PPC64-NEXT: Name: __data (5F 5F 64 61 74 61 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC64-NEXT: Segment: __DATA (5F 5F 44 41 54 41 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC64-NEXT: Address: 0x60 +MACHO-PPC64-NEXT: Size: 0x4 +MACHO-PPC64-NEXT: Offset: 704 +MACHO-PPC64-NEXT: Alignment: 2 +MACHO-PPC64-NEXT: RelocationOffset: 0x0 +MACHO-PPC64-NEXT: RelocationCount: 0 +MACHO-PPC64-NEXT: Type: 0x0 +MACHO-PPC64-NEXT: Attributes [ (0x0) +MACHO-PPC64-NEXT: ] +MACHO-PPC64-NEXT: Reserved1: 0x0 +MACHO-PPC64-NEXT: Reserved2: 0x0 +MACHO-PPC64-NEXT: Relocations [ +MACHO-PPC64-NEXT: ] +MACHO-PPC64-NEXT: Symbols [ +MACHO-PPC64-NEXT: Symbol { +MACHO-PPC64-NEXT: Name: _b (1) +MACHO-PPC64-NEXT: Type: 0xF +MACHO-PPC64-NEXT: Section: __data (0x3) +MACHO-PPC64-NEXT: RefType: UndefinedNonLazy (0x0) +MACHO-PPC64-NEXT: Flags [ (0x0) +MACHO-PPC64-NEXT: ] +MACHO-PPC64-NEXT: Value: 0x60 +MACHO-PPC64-NEXT: } +MACHO-PPC64-NEXT: ] +MACHO-PPC64-NEXT: SectionData ( +MACHO-PPC64-NEXT: 0000: 0000002A |...*| +MACHO-PPC64-NEXT: ) +MACHO-PPC64-NEXT: } +MACHO-PPC64-NEXT: Section { +MACHO-PPC64-NEXT: Index: 3 +MACHO-PPC64-NEXT: Name: __nl_symbol_ptr (5F 5F 6E 6C 5F 73 79 6D 62 6F 6C 5F 70 74 72 00) +MACHO-PPC64-NEXT: Segment: __DATA (5F 5F 44 41 54 41 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC64-NEXT: Address: 0x64 +MACHO-PPC64-NEXT: Size: 0x8 +MACHO-PPC64-NEXT: Offset: 708 +MACHO-PPC64-NEXT: Alignment: 2 +MACHO-PPC64-NEXT: RelocationOffset: 0x0 +MACHO-PPC64-NEXT: RelocationCount: 0 +MACHO-PPC64-NEXT: Type: 0x6 +MACHO-PPC64-NEXT: Attributes [ (0x0) +MACHO-PPC64-NEXT: ] +MACHO-PPC64-NEXT: Reserved1: 0x1 +MACHO-PPC64-NEXT: Reserved2: 0x0 +MACHO-PPC64-NEXT: Relocations [ +MACHO-PPC64-NEXT: ] +MACHO-PPC64-NEXT: Symbols [ +MACHO-PPC64-NEXT: ] +MACHO-PPC64-NEXT: SectionData ( +MACHO-PPC64-NEXT: 0000: 00000000 00000000 |........| +MACHO-PPC64-NEXT: ) +MACHO-PPC64-NEXT: } +MACHO-PPC64-NEXT: Section { +MACHO-PPC64-NEXT: Index: 4 +MACHO-PPC64-NEXT: Name: __la_symbol_ptr (5F 5F 6C 61 5F 73 79 6D 62 6F 6C 5F 70 74 72 00) +MACHO-PPC64-NEXT: Segment: __DATA (5F 5F 44 41 54 41 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC64-NEXT: Address: 0x6C +MACHO-PPC64-NEXT: Size: 0x8 +MACHO-PPC64-NEXT: Offset: 716 +MACHO-PPC64-NEXT: Alignment: 2 +MACHO-PPC64-NEXT: RelocationOffset: 0x31C +MACHO-PPC64-NEXT: RelocationCount: 1 +MACHO-PPC64-NEXT: Type: 0x7 +MACHO-PPC64-NEXT: Attributes [ (0x0) +MACHO-PPC64-NEXT: ] +MACHO-PPC64-NEXT: Reserved1: 0x2 +MACHO-PPC64-NEXT: Reserved2: 0x0 +MACHO-PPC64-NEXT: Relocations [ +MACHO-PPC64-NEXT: 0x0 0 3 1 0 dyld_stub_binding_helper +MACHO-PPC64-NEXT: ] +MACHO-PPC64-NEXT: Symbols [ +MACHO-PPC64-NEXT: ] +MACHO-PPC64-NEXT: SectionData ( +MACHO-PPC64-NEXT: 0000: 00000000 00000000 |........| +MACHO-PPC64-NEXT: ) +MACHO-PPC64-NEXT: } +MACHO-PPC64-NEXT: ] + +MACHO-ARM: Sections [ +MACHO-ARM-NEXT: Section { +MACHO-ARM-NEXT: Index: 0 +MACHO-ARM-NEXT: Name: __text (5F 5F 74 65 78 74 00 00 00 00 00 00 00 00 00 00) +MACHO-ARM-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-ARM-NEXT: Address: 0x0 +MACHO-ARM-NEXT: Size: 0x3C +MACHO-ARM-NEXT: Offset: 664 +MACHO-ARM-NEXT: Alignment: 2 +MACHO-ARM-NEXT: RelocationOffset: 0x2E0 +MACHO-ARM-NEXT: RelocationCount: 9 +MACHO-ARM-NEXT: Type: 0x0 +MACHO-ARM-NEXT: Attributes [ (0x800004) +MACHO-ARM-NEXT: PureInstructions (0x800000) +MACHO-ARM-NEXT: SomeInstructions (0x4) +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Reserved1: 0x0 +MACHO-ARM-NEXT: Reserved2: 0x0 +MACHO-ARM-NEXT: Relocations [ +MACHO-ARM-NEXT: Relocation { +MACHO-ARM-NEXT: Offset: 0x38 +MACHO-ARM-NEXT: PCRel: 0 +MACHO-ARM-NEXT: Length: 2 +MACHO-ARM-NEXT: Extern: N/A +MACHO-ARM-NEXT: Type: ARM_RELOC_SECTDIFF (2) +MACHO-ARM-NEXT: Symbol: - +MACHO-ARM-NEXT: Scattered: 1 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Relocation { +MACHO-ARM-NEXT: Offset: 0x0 +MACHO-ARM-NEXT: PCRel: 0 +MACHO-ARM-NEXT: Length: 2 +MACHO-ARM-NEXT: Extern: N/A +MACHO-ARM-NEXT: Type: ARM_RELOC_PAIR (1) +MACHO-ARM-NEXT: Symbol: - +MACHO-ARM-NEXT: Scattered: 1 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Relocation { +MACHO-ARM-NEXT: Offset: 0x20 +MACHO-ARM-NEXT: PCRel: 1 +MACHO-ARM-NEXT: Length: 2 +MACHO-ARM-NEXT: Extern: 1 +MACHO-ARM-NEXT: Type: ARM_RELOC_BR24 (5) +MACHO-ARM-NEXT: Symbol: _g +MACHO-ARM-NEXT: Scattered: 0 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Relocation { +MACHO-ARM-NEXT: Offset: 0x1C +MACHO-ARM-NEXT: PCRel: 0 +MACHO-ARM-NEXT: Length: 1 +MACHO-ARM-NEXT: Extern: 1 +MACHO-ARM-NEXT: Type: ARM_RELOC_HALF (8) +MACHO-ARM-NEXT: Symbol: _g +MACHO-ARM-NEXT: Scattered: 0 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Relocation { +MACHO-ARM-NEXT: Offset: 0x0 +MACHO-ARM-NEXT: PCRel: 0 +MACHO-ARM-NEXT: Length: 1 +MACHO-ARM-NEXT: Extern: 0 +MACHO-ARM-NEXT: Type: ARM_RELOC_PAIR (1) +MACHO-ARM-NEXT: Symbol: - +MACHO-ARM-NEXT: Scattered: 0 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Relocation { +MACHO-ARM-NEXT: Offset: 0x18 +MACHO-ARM-NEXT: PCRel: 0 +MACHO-ARM-NEXT: Length: 0 +MACHO-ARM-NEXT: Extern: 1 +MACHO-ARM-NEXT: Type: ARM_RELOC_HALF (8) +MACHO-ARM-NEXT: Symbol: _g +MACHO-ARM-NEXT: Scattered: 0 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Relocation { +MACHO-ARM-NEXT: Offset: 0x0 +MACHO-ARM-NEXT: PCRel: 0 +MACHO-ARM-NEXT: Length: 0 +MACHO-ARM-NEXT: Extern: 0 +MACHO-ARM-NEXT: Type: ARM_RELOC_PAIR (1) +MACHO-ARM-NEXT: Symbol: - +MACHO-ARM-NEXT: Scattered: 0 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Relocation { +MACHO-ARM-NEXT: Offset: 0xC +MACHO-ARM-NEXT: PCRel: 0 +MACHO-ARM-NEXT: Length: 2 +MACHO-ARM-NEXT: Extern: N/A +MACHO-ARM-NEXT: Type: ARM_RELOC_SECTDIFF (2) +MACHO-ARM-NEXT: Symbol: - +MACHO-ARM-NEXT: Scattered: 1 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Relocation { +MACHO-ARM-NEXT: Offset: 0x0 +MACHO-ARM-NEXT: PCRel: 0 +MACHO-ARM-NEXT: Length: 2 +MACHO-ARM-NEXT: Extern: N/A +MACHO-ARM-NEXT: Type: ARM_RELOC_PAIR (1) +MACHO-ARM-NEXT: Symbol: - +MACHO-ARM-NEXT: Scattered: 1 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Symbols [ +MACHO-ARM-NEXT: Symbol { +MACHO-ARM-NEXT: Name: _f (4) +MACHO-ARM-NEXT: Type: 0xF +MACHO-ARM-NEXT: Section: __text (0x1) +MACHO-ARM-NEXT: RefType: UndefinedNonLazy (0x0) +MACHO-ARM-NEXT: Flags [ (0x0) +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Value: 0x10 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Symbol { +MACHO-ARM-NEXT: Name: _h (1) +MACHO-ARM-NEXT: Type: 0xF +MACHO-ARM-NEXT: Section: __text (0x1) +MACHO-ARM-NEXT: RefType: UndefinedNonLazy (0x0) +MACHO-ARM-NEXT: Flags [ (0x0) +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Value: 0x0 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: SectionData ( +MACHO-ARM-NEXT: 0000: 04009FE5 00009FE7 1EFF2FE1 38000000 |........../.8...| +MACHO-ARM-NEXT: 0010: 80402DE9 0D70A0E1 000000E3 000040E3 |.@-..p........@.| +MACHO-ARM-NEXT: 0020: F6FFFFEB 0C009FE5 00009FE7 000090E5 |................| +MACHO-ARM-NEXT: 0030: 8040BDE8 1EFF2FE1 10000000 |.@..../.....| +MACHO-ARM-NEXT: ) +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Section { +MACHO-ARM-NEXT: Index: 1 +MACHO-ARM-NEXT: Name: __textcoal_nt (5F 5F 74 65 78 74 63 6F 61 6C 5F 6E 74 00 00 00) +MACHO-ARM-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-ARM-NEXT: Address: 0x3C +MACHO-ARM-NEXT: Size: 0x0 +MACHO-ARM-NEXT: Offset: 724 +MACHO-ARM-NEXT: Alignment: 0 +MACHO-ARM-NEXT: RelocationOffset: 0x0 +MACHO-ARM-NEXT: RelocationCount: 0 +MACHO-ARM-NEXT: Type: 0xB +MACHO-ARM-NEXT: Attributes [ (0x800000) +MACHO-ARM-NEXT: PureInstructions (0x800000) +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Reserved1: 0x0 +MACHO-ARM-NEXT: Reserved2: 0x0 +MACHO-ARM-NEXT: Relocations [ +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Symbols [ +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: SectionData ( +MACHO-ARM-NEXT: ) +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Section { +MACHO-ARM-NEXT: Index: 2 +MACHO-ARM-NEXT: Name: __const_coal (5F 5F 63 6F 6E 73 74 5F 63 6F 61 6C 00 00 00 00) +MACHO-ARM-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-ARM-NEXT: Address: 0x3C +MACHO-ARM-NEXT: Size: 0x0 +MACHO-ARM-NEXT: Offset: 724 +MACHO-ARM-NEXT: Alignment: 0 +MACHO-ARM-NEXT: RelocationOffset: 0x0 +MACHO-ARM-NEXT: RelocationCount: 0 +MACHO-ARM-NEXT: Type: 0xB +MACHO-ARM-NEXT: Attributes [ (0x0) +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Reserved1: 0x0 +MACHO-ARM-NEXT: Reserved2: 0x0 +MACHO-ARM-NEXT: Relocations [ +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Symbols [ +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: SectionData ( +MACHO-ARM-NEXT: ) +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Section { +MACHO-ARM-NEXT: Index: 3 +MACHO-ARM-NEXT: Name: __picsymbolstub4 (5F 5F 70 69 63 73 79 6D 62 6F 6C 73 74 75 62 34) +MACHO-ARM-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-ARM-NEXT: Address: 0x3C +MACHO-ARM-NEXT: Size: 0x0 +MACHO-ARM-NEXT: Offset: 724 +MACHO-ARM-NEXT: Alignment: 0 +MACHO-ARM-NEXT: RelocationOffset: 0x0 +MACHO-ARM-NEXT: RelocationCount: 0 +MACHO-ARM-NEXT: Type: 0x8 +MACHO-ARM-NEXT: Attributes [ (0x0) +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Reserved1: 0x0 +MACHO-ARM-NEXT: Reserved2: 0x10 +MACHO-ARM-NEXT: Relocations [ +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Symbols [ +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: SectionData ( +MACHO-ARM-NEXT: ) +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Section { +MACHO-ARM-NEXT: Index: 4 +MACHO-ARM-NEXT: Name: __StaticInit (5F 5F 53 74 61 74 69 63 49 6E 69 74 00 00 00 00) +MACHO-ARM-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-ARM-NEXT: Address: 0x3C +MACHO-ARM-NEXT: Size: 0x0 +MACHO-ARM-NEXT: Offset: 724 +MACHO-ARM-NEXT: Alignment: 0 +MACHO-ARM-NEXT: RelocationOffset: 0x0 +MACHO-ARM-NEXT: RelocationCount: 0 +MACHO-ARM-NEXT: Type: 0x0 +MACHO-ARM-NEXT: Attributes [ (0x800000) +MACHO-ARM-NEXT: PureInstructions (0x800000) +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Reserved1: 0x0 +MACHO-ARM-NEXT: Reserved2: 0x0 +MACHO-ARM-NEXT: Relocations [ +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Symbols [ +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: SectionData ( +MACHO-ARM-NEXT: ) +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Section { +MACHO-ARM-NEXT: Index: 5 +MACHO-ARM-NEXT: Name: __data (5F 5F 64 61 74 61 00 00 00 00 00 00 00 00 00 00) +MACHO-ARM-NEXT: Segment: __DATA (5F 5F 44 41 54 41 00 00 00 00 00 00 00 00 00 00) +MACHO-ARM-NEXT: Address: 0x3C +MACHO-ARM-NEXT: Size: 0x4 +MACHO-ARM-NEXT: Offset: 724 +MACHO-ARM-NEXT: Alignment: 2 +MACHO-ARM-NEXT: RelocationOffset: 0x0 +MACHO-ARM-NEXT: RelocationCount: 0 +MACHO-ARM-NEXT: Type: 0x0 +MACHO-ARM-NEXT: Attributes [ (0x0) +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Reserved1: 0x0 +MACHO-ARM-NEXT: Reserved2: 0x0 +MACHO-ARM-NEXT: Relocations [ +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Symbols [ +MACHO-ARM-NEXT: Symbol { +MACHO-ARM-NEXT: Name: _b (10) +MACHO-ARM-NEXT: Type: 0xF +MACHO-ARM-NEXT: Section: __data (0x6) +MACHO-ARM-NEXT: RefType: UndefinedNonLazy (0x0) +MACHO-ARM-NEXT: Flags [ (0x0) +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Value: 0x3C +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: SectionData ( +MACHO-ARM-NEXT: 0000: 2A000000 |*...| +MACHO-ARM-NEXT: ) +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Section { +MACHO-ARM-NEXT: Index: 6 +MACHO-ARM-NEXT: Name: __nl_symbol_ptr (5F 5F 6E 6C 5F 73 79 6D 62 6F 6C 5F 70 74 72 00) +MACHO-ARM-NEXT: Segment: __DATA (5F 5F 44 41 54 41 00 00 00 00 00 00 00 00 00 00) +MACHO-ARM-NEXT: Address: 0x40 +MACHO-ARM-NEXT: Size: 0x8 +MACHO-ARM-NEXT: Offset: 728 +MACHO-ARM-NEXT: Alignment: 2 +MACHO-ARM-NEXT: RelocationOffset: 0x0 +MACHO-ARM-NEXT: RelocationCount: 0 +MACHO-ARM-NEXT: Type: 0x6 +MACHO-ARM-NEXT: Attributes [ (0x0) +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Reserved1: 0x0 +MACHO-ARM-NEXT: Reserved2: 0x0 +MACHO-ARM-NEXT: Relocations [ +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Symbols [ +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: SectionData ( +MACHO-ARM-NEXT: 0000: 00000000 00000000 |........| +MACHO-ARM-NEXT: ) +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: ] diff --git a/test/tools/llvm-readobj/sections.test b/test/tools/llvm-readobj/sections.test new file mode 100644 index 0000000..16f1131 --- /dev/null +++ b/test/tools/llvm-readobj/sections.test @@ -0,0 +1,452 @@ +RUN: llvm-readobj -s %p/Inputs/trivial.obj.coff-i386 \ +RUN: | FileCheck %s -check-prefix COFF +RUN: llvm-readobj -s %p/Inputs/trivial.obj.elf-i386 \ +RUN: | FileCheck %s -check-prefix ELF +RUN: llvm-readobj -s %p/Inputs/trivial.obj.macho-i386 \ +RUN: | FileCheck %s -check-prefix MACHO-I386 +RUN: llvm-readobj -s %p/Inputs/trivial.obj.macho-x86-64 \ +RUN: | FileCheck %s -check-prefix MACHO-X86-64 +RUN: llvm-readobj -s %p/Inputs/trivial.obj.macho-ppc \ +RUN: | FileCheck %s -check-prefix MACHO-PPC +RUN: llvm-readobj -s %p/Inputs/trivial.obj.macho-ppc64 \ +RUN: | FileCheck %s -check-prefix MACHO-PPC64 +RUN: llvm-readobj -s %p/Inputs/trivial.obj.macho-arm \ +RUN: | FileCheck %s -check-prefix MACHO-ARM + +COFF: Sections [ +COFF-NEXT: Section { +COFF-NEXT: Number: 1 +COFF-NEXT: Name: .text (2E 74 65 78 74 00 00 00) +COFF-NEXT: VirtualSize: 0x0 +COFF-NEXT: VirtualAddress: 0x0 +COFF-NEXT: RawDataSize: 22 +COFF-NEXT: PointerToRawData: 0x64 +COFF-NEXT: PointerToRelocations: 0x7A +COFF-NEXT: PointerToLineNumbers: 0x0 +COFF-NEXT: RelocationCount: 3 +COFF-NEXT: LineNumberCount: 0 +COFF-NEXT: Characteristics [ (0x60500020) +COFF-NEXT: IMAGE_SCN_ALIGN_16BYTES (0x500000) +COFF-NEXT: IMAGE_SCN_CNT_CODE (0x20) +COFF-NEXT: IMAGE_SCN_MEM_EXECUTE (0x20000000) +COFF-NEXT: IMAGE_SCN_MEM_READ (0x40000000) +COFF-NEXT: ] +COFF-NEXT: } +COFF-NEXT: Section { +COFF-NEXT: Number: 2 +COFF-NEXT: Name: .data (2E 64 61 74 61 00 00 00) +COFF-NEXT: VirtualSize: 0x0 +COFF-NEXT: VirtualAddress: 0x0 +COFF-NEXT: RawDataSize: 13 +COFF-NEXT: PointerToRawData: 0x98 +COFF-NEXT: PointerToRelocations: 0x0 +COFF-NEXT: PointerToLineNumbers: 0x0 +COFF-NEXT: RelocationCount: 0 +COFF-NEXT: LineNumberCount: 0 +COFF-NEXT: Characteristics [ (0xC0300040) +COFF-NEXT: IMAGE_SCN_ALIGN_4BYTES (0x300000) +COFF-NEXT: IMAGE_SCN_CNT_INITIALIZED_DATA (0x40) +COFF-NEXT: IMAGE_SCN_MEM_READ (0x40000000) +COFF-NEXT: IMAGE_SCN_MEM_WRITE (0x80000000) +COFF-NEXT: ] +COFF-NEXT: } +COFF-NEXT: ] + +ELF: Sections [ +ELF-NEXT: Section { +ELF-NEXT: Index: 0 +ELF-NEXT: Name: (0) +ELF-NEXT: Type: SHT_NULL (0x0) +ELF-NEXT: Flags [ (0x0) +ELF-NEXT: ] +ELF-NEXT: Address: 0x0 +ELF-NEXT: Offset: 0x0 +ELF-NEXT: Size: 0 +ELF-NEXT: Link: 0 +ELF-NEXT: Info: 0 +ELF-NEXT: AddressAlignment: 0 +ELF-NEXT: EntrySize: 0 +ELF-NEXT: } +ELF-NEXT: Section { +ELF-NEXT: Index: 1 +ELF-NEXT: Name: .text (5) +ELF-NEXT: Type: SHT_PROGBITS (0x1) +ELF-NEXT: Flags [ (0x6) +ELF-NEXT: SHF_ALLOC (0x2) +ELF-NEXT: SHF_EXECINSTR (0x4) +ELF-NEXT: ] +ELF-NEXT: Address: 0x0 +ELF-NEXT: Offset: 0x40 +ELF-NEXT: Size: 42 +ELF-NEXT: Link: 0 +ELF-NEXT: Info: 0 +ELF-NEXT: AddressAlignment: 16 +ELF-NEXT: EntrySize: 0 +ELF-NEXT: } + +MACHO-I386: Sections [ +MACHO-I386-NEXT: Section { +MACHO-I386-NEXT: Index: 0 +MACHO-I386-NEXT: Name: __text (5F 5F 74 65 78 74 00 00 00 00 00 00 00 00 00 00) +MACHO-I386-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-I386-NEXT: Address: 0x0 +MACHO-I386-NEXT: Size: 0x22 +MACHO-I386-NEXT: Offset: 324 +MACHO-I386-NEXT: Alignment: 4 +MACHO-I386-NEXT: RelocationOffset: 0x174 +MACHO-I386-NEXT: RelocationCount: 4 +MACHO-I386-NEXT: Type: 0x0 +MACHO-I386-NEXT: Attributes [ (0x800004) +MACHO-I386-NEXT: PureInstructions (0x800000) +MACHO-I386-NEXT: SomeInstructions (0x4) +MACHO-I386-NEXT: ] +MACHO-I386-NEXT: Reserved1: 0x0 +MACHO-I386-NEXT: Reserved2: 0x0 +MACHO-I386-NEXT: } +MACHO-I386-NEXT: Section { +MACHO-I386-NEXT: Index: 1 +MACHO-I386-NEXT: Name: __cstring (5F 5F 63 73 74 72 69 6E 67 00 00 00 00 00 00 00) +MACHO-I386-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-I386-NEXT: Address: 0x22 +MACHO-I386-NEXT: Size: 0xD +MACHO-I386-NEXT: Offset: 358 +MACHO-I386-NEXT: Alignment: 0 +MACHO-I386-NEXT: RelocationOffset: 0x0 +MACHO-I386-NEXT: RelocationCount: 0 +MACHO-I386-NEXT: Type: ExtReloc (0x2) +MACHO-I386-NEXT: Attributes [ (0x0) +MACHO-I386-NEXT: ] +MACHO-I386-NEXT: Reserved1: 0x0 +MACHO-I386-NEXT: Reserved2: 0x0 +MACHO-I386-NEXT: } + + +MACHO-X86-64: Sections [ +MACHO-X86-64-NEXT: Section { +MACHO-X86-64-NEXT: Index: 0 +MACHO-X86-64-NEXT: Name: __text (5F 5F 74 65 78 74 00 00 00 00 00 00 00 00 00 00) +MACHO-X86-64-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-X86-64-NEXT: Address: 0x0 +MACHO-X86-64-NEXT: Size: 0x16 +MACHO-X86-64-NEXT: Offset: 368 +MACHO-X86-64-NEXT: Alignment: 4 +MACHO-X86-64-NEXT: RelocationOffset: 0x194 +MACHO-X86-64-NEXT: RelocationCount: 3 +MACHO-X86-64-NEXT: Type: 0x0 +MACHO-X86-64-NEXT: Attributes [ (0x800004) +MACHO-X86-64-NEXT: PureInstructions (0x800000) +MACHO-X86-64-NEXT: SomeInstructions (0x4) +MACHO-X86-64-NEXT: ] +MACHO-X86-64-NEXT: Reserved1: 0x0 +MACHO-X86-64-NEXT: Reserved2: 0x0 +MACHO-X86-64-NEXT: } +MACHO-X86-64-NEXT: Section { +MACHO-X86-64-NEXT: Index: 1 +MACHO-X86-64-NEXT: Name: __cstring (5F 5F 63 73 74 72 69 6E 67 00 00 00 00 00 00 00) +MACHO-X86-64-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-X86-64-NEXT: Address: 0x16 +MACHO-X86-64-NEXT: Size: 0xD +MACHO-X86-64-NEXT: Offset: 390 +MACHO-X86-64-NEXT: Alignment: 0 +MACHO-X86-64-NEXT: RelocationOffset: 0x0 +MACHO-X86-64-NEXT: RelocationCount: 0 +MACHO-X86-64-NEXT: Type: ExtReloc (0x2) +MACHO-X86-64-NEXT: Attributes [ (0x0) +MACHO-X86-64-NEXT: ] +MACHO-X86-64-NEXT: Reserved1: 0x0 +MACHO-X86-64-NEXT: Reserved2: 0x0 +MACHO-X86-64-NEXT: } +MACHO-X86-64-NEXT:] + +MACHO-PPC: Sections [ +MACHO-PPC-NEXT: Section { +MACHO-PPC-NEXT: Index: 0 +MACHO-PPC-NEXT: Name: __text (5F 5F 74 65 78 74 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC-NEXT: Address: 0x0 +MACHO-PPC-NEXT: Size: 0x3C +MACHO-PPC-NEXT: Offset: 528 +MACHO-PPC-NEXT: Alignment: 2 +MACHO-PPC-NEXT: RelocationOffset: 0x27C +MACHO-PPC-NEXT: RelocationCount: 5 +MACHO-PPC-NEXT: Type: 0x0 +MACHO-PPC-NEXT: Attributes [ (0x800004) +MACHO-PPC-NEXT: PureInstructions (0x800000) +MACHO-PPC-NEXT: SomeInstructions (0x4) +MACHO-PPC-NEXT: ] +MACHO-PPC-NEXT: Reserved1: 0x0 +MACHO-PPC-NEXT: Reserved2: 0x0 +MACHO-PPC-NEXT: } +MACHO-PPC-NEXT: Section { +MACHO-PPC-NEXT: Index: 1 +MACHO-PPC-NEXT: Name: __picsymbolstub1 (5F 5F 70 69 63 73 79 6D 62 6F 6C 73 74 75 62 31) +MACHO-PPC-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC-NEXT: Address: 0x40 +MACHO-PPC-NEXT: Size: 0x20 +MACHO-PPC-NEXT: Offset: 592 +MACHO-PPC-NEXT: Alignment: 5 +MACHO-PPC-NEXT: RelocationOffset: 0x2A4 +MACHO-PPC-NEXT: RelocationCount: 4 +MACHO-PPC-NEXT: Type: 0x8 +MACHO-PPC-NEXT: Attributes [ (0x800004) +MACHO-PPC-NEXT: PureInstructions (0x800000) +MACHO-PPC-NEXT: SomeInstructions (0x4) +MACHO-PPC-NEXT: ] +MACHO-PPC-NEXT: Reserved1: 0x0 +MACHO-PPC-NEXT: Reserved2: 0x20 +MACHO-PPC-NEXT: } +MACHO-PPC-NEXT: Section { +MACHO-PPC-NEXT: Index: 2 +MACHO-PPC-NEXT: Name: __data (5F 5F 64 61 74 61 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC-NEXT: Segment: __DATA (5F 5F 44 41 54 41 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC-NEXT: Address: 0x60 +MACHO-PPC-NEXT: Size: 0x4 +MACHO-PPC-NEXT: Offset: 624 +MACHO-PPC-NEXT: Alignment: 2 +MACHO-PPC-NEXT: RelocationOffset: 0x0 +MACHO-PPC-NEXT: RelocationCount: 0 +MACHO-PPC-NEXT: Type: 0x0 +MACHO-PPC-NEXT: Attributes [ (0x0) +MACHO-PPC-NEXT: ] +MACHO-PPC-NEXT: Reserved1: 0x0 +MACHO-PPC-NEXT: Reserved2: 0x0 +MACHO-PPC-NEXT: } +MACHO-PPC-NEXT: Section { +MACHO-PPC-NEXT: Index: 3 +MACHO-PPC-NEXT: Name: __nl_symbol_ptr (5F 5F 6E 6C 5F 73 79 6D 62 6F 6C 5F 70 74 72 00) +MACHO-PPC-NEXT: Segment: __DATA (5F 5F 44 41 54 41 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC-NEXT: Address: 0x64 +MACHO-PPC-NEXT: Size: 0x4 +MACHO-PPC-NEXT: Offset: 628 +MACHO-PPC-NEXT: Alignment: 2 +MACHO-PPC-NEXT: RelocationOffset: 0x0 +MACHO-PPC-NEXT: RelocationCount: 0 +MACHO-PPC-NEXT: Type: 0x6 +MACHO-PPC-NEXT: Attributes [ (0x0) +MACHO-PPC-NEXT: ] +MACHO-PPC-NEXT: Reserved1: 0x1 +MACHO-PPC-NEXT: Reserved2: 0x0 +MACHO-PPC-NEXT: } +MACHO-PPC-NEXT: Section { +MACHO-PPC-NEXT: Index: 4 +MACHO-PPC-NEXT: Name: __la_symbol_ptr (5F 5F 6C 61 5F 73 79 6D 62 6F 6C 5F 70 74 72 00) +MACHO-PPC-NEXT: Segment: __DATA (5F 5F 44 41 54 41 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC-NEXT: Address: 0x68 +MACHO-PPC-NEXT: Size: 0x4 +MACHO-PPC-NEXT: Offset: 632 +MACHO-PPC-NEXT: Alignment: 2 +MACHO-PPC-NEXT: RelocationOffset: 0x2C4 +MACHO-PPC-NEXT: RelocationCount: 1 +MACHO-PPC-NEXT: Type: 0x7 +MACHO-PPC-NEXT: Attributes [ (0x0) +MACHO-PPC-NEXT: ] +MACHO-PPC-NEXT: Reserved1: 0x2 +MACHO-PPC-NEXT: Reserved2: 0x0 +MACHO-PPC-NEXT: } +MACHO-PPC-NEXT: ] + +MACHO-PPC64: Sections [ +MACHO-PPC64-NEXT: Section { +MACHO-PPC64-NEXT: Index: 0 +MACHO-PPC64-NEXT: Name: __text (5F 5F 74 65 78 74 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC64-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC64-NEXT: Address: 0x0 +MACHO-PPC64-NEXT: Size: 0x3C +MACHO-PPC64-NEXT: Offset: 608 +MACHO-PPC64-NEXT: Alignment: 2 +MACHO-PPC64-NEXT: RelocationOffset: 0x2D4 +MACHO-PPC64-NEXT: RelocationCount: 5 +MACHO-PPC64-NEXT: Type: 0x0 +MACHO-PPC64-NEXT: Attributes [ (0x800004) +MACHO-PPC64-NEXT: PureInstructions (0x800000) +MACHO-PPC64-NEXT: SomeInstructions (0x4) +MACHO-PPC64-NEXT: ] +MACHO-PPC64-NEXT: Reserved1: 0x0 +MACHO-PPC64-NEXT: Reserved2: 0x0 +MACHO-PPC64-NEXT: } +MACHO-PPC64-NEXT: Section { +MACHO-PPC64-NEXT: Index: 1 +MACHO-PPC64-NEXT: Name: __picsymbolstub1 (5F 5F 70 69 63 73 79 6D 62 6F 6C 73 74 75 62 31) +MACHO-PPC64-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC64-NEXT: Address: 0x40 +MACHO-PPC64-NEXT: Size: 0x20 +MACHO-PPC64-NEXT: Offset: 672 +MACHO-PPC64-NEXT: Alignment: 5 +MACHO-PPC64-NEXT: RelocationOffset: 0x2FC +MACHO-PPC64-NEXT: RelocationCount: 4 +MACHO-PPC64-NEXT: Type: 0x8 +MACHO-PPC64-NEXT: Attributes [ (0x800004) +MACHO-PPC64-NEXT: PureInstructions (0x800000) +MACHO-PPC64-NEXT: SomeInstructions (0x4) +MACHO-PPC64-NEXT: ] +MACHO-PPC64-NEXT: Reserved1: 0x0 +MACHO-PPC64-NEXT: Reserved2: 0x20 +MACHO-PPC64-NEXT: } +MACHO-PPC64-NEXT: Section { +MACHO-PPC64-NEXT: Index: 2 +MACHO-PPC64-NEXT: Name: __data (5F 5F 64 61 74 61 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC64-NEXT: Segment: __DATA (5F 5F 44 41 54 41 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC64-NEXT: Address: 0x60 +MACHO-PPC64-NEXT: Size: 0x4 +MACHO-PPC64-NEXT: Offset: 704 +MACHO-PPC64-NEXT: Alignment: 2 +MACHO-PPC64-NEXT: RelocationOffset: 0x0 +MACHO-PPC64-NEXT: RelocationCount: 0 +MACHO-PPC64-NEXT: Type: 0x0 +MACHO-PPC64-NEXT: Attributes [ (0x0) +MACHO-PPC64-NEXT: ] +MACHO-PPC64-NEXT: Reserved1: 0x0 +MACHO-PPC64-NEXT: Reserved2: 0x0 +MACHO-PPC64-NEXT: } +MACHO-PPC64-NEXT: Section { +MACHO-PPC64-NEXT: Index: 3 +MACHO-PPC64-NEXT: Name: __nl_symbol_ptr (5F 5F 6E 6C 5F 73 79 6D 62 6F 6C 5F 70 74 72 00) +MACHO-PPC64-NEXT: Segment: __DATA (5F 5F 44 41 54 41 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC64-NEXT: Address: 0x64 +MACHO-PPC64-NEXT: Size: 0x8 +MACHO-PPC64-NEXT: Offset: 708 +MACHO-PPC64-NEXT: Alignment: 2 +MACHO-PPC64-NEXT: RelocationOffset: 0x0 +MACHO-PPC64-NEXT: RelocationCount: 0 +MACHO-PPC64-NEXT: Type: 0x6 +MACHO-PPC64-NEXT: Attributes [ (0x0) +MACHO-PPC64-NEXT: ] +MACHO-PPC64-NEXT: Reserved1: 0x1 +MACHO-PPC64-NEXT: Reserved2: 0x0 +MACHO-PPC64-NEXT: } +MACHO-PPC64-NEXT: Section { +MACHO-PPC64-NEXT: Index: 4 +MACHO-PPC64-NEXT: Name: __la_symbol_ptr (5F 5F 6C 61 5F 73 79 6D 62 6F 6C 5F 70 74 72 00) +MACHO-PPC64-NEXT: Segment: __DATA (5F 5F 44 41 54 41 00 00 00 00 00 00 00 00 00 00) +MACHO-PPC64-NEXT: Address: 0x6C +MACHO-PPC64-NEXT: Size: 0x8 +MACHO-PPC64-NEXT: Offset: 716 +MACHO-PPC64-NEXT: Alignment: 2 +MACHO-PPC64-NEXT: RelocationOffset: 0x31C +MACHO-PPC64-NEXT: RelocationCount: 1 +MACHO-PPC64-NEXT: Type: 0x7 +MACHO-PPC64-NEXT: Attributes [ (0x0) +MACHO-PPC64-NEXT: ] +MACHO-PPC64-NEXT: Reserved1: 0x2 +MACHO-PPC64-NEXT: Reserved2: 0x0 +MACHO-PPC64-NEXT: } +MACHO-PPC64-NEXT: ] + +MACHO-ARM: Sections [ +MACHO-ARM-NEXT: Section { +MACHO-ARM-NEXT: Index: 0 +MACHO-ARM-NEXT: Name: __text (5F 5F 74 65 78 74 00 00 00 00 00 00 00 00 00 00) +MACHO-ARM-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-ARM-NEXT: Address: 0x0 +MACHO-ARM-NEXT: Size: 0x3C +MACHO-ARM-NEXT: Offset: 664 +MACHO-ARM-NEXT: Alignment: 2 +MACHO-ARM-NEXT: RelocationOffset: 0x2E0 +MACHO-ARM-NEXT: RelocationCount: 9 +MACHO-ARM-NEXT: Type: 0x0 +MACHO-ARM-NEXT: Attributes [ (0x800004) +MACHO-ARM-NEXT: PureInstructions (0x800000) +MACHO-ARM-NEXT: SomeInstructions (0x4) +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Reserved1: 0x0 +MACHO-ARM-NEXT: Reserved2: 0x0 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Section { +MACHO-ARM-NEXT: Index: 1 +MACHO-ARM-NEXT: Name: __textcoal_nt (5F 5F 74 65 78 74 63 6F 61 6C 5F 6E 74 00 00 00) +MACHO-ARM-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-ARM-NEXT: Address: 0x3C +MACHO-ARM-NEXT: Size: 0x0 +MACHO-ARM-NEXT: Offset: 724 +MACHO-ARM-NEXT: Alignment: 0 +MACHO-ARM-NEXT: RelocationOffset: 0x0 +MACHO-ARM-NEXT: RelocationCount: 0 +MACHO-ARM-NEXT: Type: 0xB +MACHO-ARM-NEXT: Attributes [ (0x800000) +MACHO-ARM-NEXT: PureInstructions (0x800000) +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Reserved1: 0x0 +MACHO-ARM-NEXT: Reserved2: 0x0 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Section { +MACHO-ARM-NEXT: Index: 2 +MACHO-ARM-NEXT: Name: __const_coal (5F 5F 63 6F 6E 73 74 5F 63 6F 61 6C 00 00 00 00) +MACHO-ARM-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-ARM-NEXT: Address: 0x3C +MACHO-ARM-NEXT: Size: 0x0 +MACHO-ARM-NEXT: Offset: 724 +MACHO-ARM-NEXT: Alignment: 0 +MACHO-ARM-NEXT: RelocationOffset: 0x0 +MACHO-ARM-NEXT: RelocationCount: 0 +MACHO-ARM-NEXT: Type: 0xB +MACHO-ARM-NEXT: Attributes [ (0x0) +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Reserved1: 0x0 +MACHO-ARM-NEXT: Reserved2: 0x0 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Section { +MACHO-ARM-NEXT: Index: 3 +MACHO-ARM-NEXT: Name: __picsymbolstub4 (5F 5F 70 69 63 73 79 6D 62 6F 6C 73 74 75 62 34) +MACHO-ARM-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-ARM-NEXT: Address: 0x3C +MACHO-ARM-NEXT: Size: 0x0 +MACHO-ARM-NEXT: Offset: 724 +MACHO-ARM-NEXT: Alignment: 0 +MACHO-ARM-NEXT: RelocationOffset: 0x0 +MACHO-ARM-NEXT: RelocationCount: 0 +MACHO-ARM-NEXT: Type: 0x8 +MACHO-ARM-NEXT: Attributes [ (0x0) +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Reserved1: 0x0 +MACHO-ARM-NEXT: Reserved2: 0x10 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Section { +MACHO-ARM-NEXT: Index: 4 +MACHO-ARM-NEXT: Name: __StaticInit (5F 5F 53 74 61 74 69 63 49 6E 69 74 00 00 00 00) +MACHO-ARM-NEXT: Segment: __TEXT (5F 5F 54 45 58 54 00 00 00 00 00 00 00 00 00 00) +MACHO-ARM-NEXT: Address: 0x3C +MACHO-ARM-NEXT: Size: 0x0 +MACHO-ARM-NEXT: Offset: 724 +MACHO-ARM-NEXT: Alignment: 0 +MACHO-ARM-NEXT: RelocationOffset: 0x0 +MACHO-ARM-NEXT: RelocationCount: 0 +MACHO-ARM-NEXT: Type: 0x0 +MACHO-ARM-NEXT: Attributes [ (0x800000) +MACHO-ARM-NEXT: PureInstructions (0x800000) +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Reserved1: 0x0 +MACHO-ARM-NEXT: Reserved2: 0x0 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Section { +MACHO-ARM-NEXT: Index: 5 +MACHO-ARM-NEXT: Name: __data (5F 5F 64 61 74 61 00 00 00 00 00 00 00 00 00 00) +MACHO-ARM-NEXT: Segment: __DATA (5F 5F 44 41 54 41 00 00 00 00 00 00 00 00 00 00) +MACHO-ARM-NEXT: Address: 0x3C +MACHO-ARM-NEXT: Size: 0x4 +MACHO-ARM-NEXT: Offset: 724 +MACHO-ARM-NEXT: Alignment: 2 +MACHO-ARM-NEXT: RelocationOffset: 0x0 +MACHO-ARM-NEXT: RelocationCount: 0 +MACHO-ARM-NEXT: Type: 0x0 +MACHO-ARM-NEXT: Attributes [ (0x0) +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Reserved1: 0x0 +MACHO-ARM-NEXT: Reserved2: 0x0 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT: Section { +MACHO-ARM-NEXT: Index: 6 +MACHO-ARM-NEXT: Name: __nl_symbol_ptr (5F 5F 6E 6C 5F 73 79 6D 62 6F 6C 5F 70 74 72 00) +MACHO-ARM-NEXT: Segment: __DATA (5F 5F 44 41 54 41 00 00 00 00 00 00 00 00 00 00) +MACHO-ARM-NEXT: Address: 0x40 +MACHO-ARM-NEXT: Size: 0x8 +MACHO-ARM-NEXT: Offset: 728 +MACHO-ARM-NEXT: Alignment: 2 +MACHO-ARM-NEXT: RelocationOffset: 0x0 +MACHO-ARM-NEXT: RelocationCount: 0 +MACHO-ARM-NEXT: Type: 0x6 +MACHO-ARM-NEXT: Attributes [ (0x0) +MACHO-ARM-NEXT: ] +MACHO-ARM-NEXT: Reserved1: 0x0 +MACHO-ARM-NEXT: Reserved2: 0x0 +MACHO-ARM-NEXT: } +MACHO-ARM-NEXT:] diff --git a/test/tools/llvm-readobj/symbols.test b/test/tools/llvm-readobj/symbols.test new file mode 100644 index 0000000..d33bd8e --- /dev/null +++ b/test/tools/llvm-readobj/symbols.test @@ -0,0 +1,44 @@ +RUN: llvm-readobj -t %p/Inputs/trivial.obj.coff-i386 \ +RUN: | FileCheck %s -check-prefix COFF +RUN: llvm-readobj -t %p/Inputs/trivial.obj.elf-i386 \ +RUN: | FileCheck %s -check-prefix ELF + +COFF: Symbols [ +COFF-NEXT: Symbol { +COFF-NEXT: Name: .text +COFF-NEXT: Value: 0 +COFF-NEXT: Section: .text (1) +COFF-NEXT: BaseType: Null (0x0) +COFF-NEXT: ComplexType: Null (0x0) +COFF-NEXT: StorageClass: Static (0x3) +COFF-NEXT: AuxSymbolCount: 1 +COFF-NEXT: AuxSectionDef { +COFF-NEXT: Length: 22 +COFF-NEXT: RelocationCount: 3 +COFF-NEXT: LineNumberCount: 0 +COFF-NEXT: Checksum: 0x0 +COFF-NEXT: Number: 1 +COFF-NEXT: Selection: 0x0 +COFF-NEXT: Unused: (00 00 00) +COFF-NEXT: } +COFF-NEXT: } + +ELF: Symbols [ +ELF-NEXT: Symbol { +ELF-NEXT: Name: trivial.ll (1) +ELF-NEXT: Value: 0x0 +ELF-NEXT: Size: 0 +ELF-NEXT: Binding: Local (0x0) +ELF-NEXT: Type: File (0x4) +ELF-NEXT: Other: 0 +ELF-NEXT: Section: (0xFFF1) +ELF-NEXT: } +ELF-NEXT: Symbol { +ELF-NEXT: Name: .L.str (39) +ELF-NEXT: Value: 0x0 +ELF-NEXT: Size: 13 +ELF-NEXT: Binding: Local (0x0) +ELF-NEXT: Type: Object (0x1) +ELF-NEXT: Other: 0 +ELF-NEXT: Section: .rodata.str1.1 (0x5) +ELF-NEXT: } |