diff options
Diffstat (limited to 'test')
602 files changed, 10569 insertions, 4652 deletions
diff --git a/test/Analysis/GlobalsModRef/pr12351.ll b/test/Analysis/GlobalsModRef/pr12351.ll new file mode 100644 index 0000000..1c5ac43 --- /dev/null +++ b/test/Analysis/GlobalsModRef/pr12351.ll @@ -0,0 +1,33 @@ +; RUN: opt < %s -basicaa -globalsmodref-aa -gvn -S | FileCheck %s + +declare void @llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1) +define void @foo(i8* %x, i8* %y) { + call void @llvm.memcpy.p0i8.p0i8.i32(i8* %x, i8* %y, i32 1, i32 1, i1 false); + ret void +} + +define void @bar(i8* %y, i8* %z) { + %x = alloca i8 + call void @foo(i8* %x, i8* %y) + %t = load i8* %x + store i8 %t, i8* %y +; CHECK: store i8 %t, i8* %y + ret void +} + + +define i32 @foo2() { + %foo = alloca i32 + call void @bar2(i32* %foo) + %t0 = load i32* %foo, align 4 +; CHECK: %t0 = load i32* %foo, align 4 + ret i32 %t0 +} + +define void @bar2(i32* %foo) { + store i32 0, i32* %foo, align 4 + tail call void @llvm.dbg.value(metadata !{}, i64 0, metadata !{}) + ret void +} + +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone diff --git a/test/Analysis/ScalarEvolution/2012-03-26-LoadConstant.ll b/test/Analysis/ScalarEvolution/2012-03-26-LoadConstant.ll new file mode 100644 index 0000000..138c015 --- /dev/null +++ b/test/Analysis/ScalarEvolution/2012-03-26-LoadConstant.ll @@ -0,0 +1,47 @@ +; RUN: opt < %s -basicaa -globalopt -instcombine -loop-rotate -licm -instcombine -indvars -loop-deletion -constmerge -S +; PR11882: ComputeLoadConstantCompareExitLimit crash. +; +; for.body is deleted leaving a loop-invariant load. +; CHECK-NOT: for.body +target datalayout = "e-p:64:64:64-n32:64" + +@func_21_l_773 = external global i32, align 4 +@g_814 = external global i32, align 4 +@g_244 = internal global [1 x [0 x i32]] zeroinitializer, align 4 + +define void @func_21() nounwind uwtable ssp { +entry: + br label %lbl_818 + +lbl_818: ; preds = %for.end, %entry + call void (...)* @func_27() + store i32 0, i32* @g_814, align 4, !tbaa !0 + br label %for.cond + +for.cond: ; preds = %for.body, %lbl_818 + %0 = load i32* @g_814, align 4, !tbaa !0 + %cmp = icmp sle i32 %0, 0 + br i1 %cmp, label %for.body, label %for.end + +for.body: ; preds = %for.cond + %idxprom = sext i32 %0 to i64 + %arrayidx = getelementptr inbounds [0 x i32]* getelementptr inbounds ([1 x [0 x i32]]* @g_244, i32 0, i64 0), i32 0, i64 %idxprom + %1 = load i32* %arrayidx, align 1, !tbaa !0 + store i32 %1, i32* @func_21_l_773, align 4, !tbaa !0 + store i32 1, i32* @g_814, align 4, !tbaa !0 + br label %for.cond + +for.end: ; preds = %for.cond + %2 = load i32* @func_21_l_773, align 4, !tbaa !0 + %tobool = icmp ne i32 %2, 0 + br i1 %tobool, label %lbl_818, label %if.end + +if.end: ; preds = %for.end + ret void +} + +declare void @func_27(...) + +!0 = metadata !{metadata !"int", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/Analysis/ScalarEvolution/avoid-smax-1.ll b/test/Analysis/ScalarEvolution/avoid-smax-1.ll index e90a555..d9b83a9 100644 --- a/test/Analysis/ScalarEvolution/avoid-smax-1.ll +++ b/test/Analysis/ScalarEvolution/avoid-smax-1.ll @@ -1,14 +1,12 @@ -; RUN: opt < %s -indvars -S -enable-iv-rewrite | FileCheck %s - -; Indvars should be able to insert a canonical induction variable -; for the bb6 loop without using a maximum calculation (icmp, select) -; because it should be able to prove that the comparison is guarded -; by an appropriate conditional branch. Unfortunately, indvars is -; not yet able to find the comparison for the other two loops in -; this testcase. -; CHECK: entry: -; CHECK-NOT: select -; CHECK: bb6: +; RUN: opt < %s -analyze -scalar-evolution -S | FileCheck %s + +; Indvars should be able to find the trip count for the bb6 loop +; without using a maximum calculation (icmp, select) because it should +; be able to prove that the comparison is guarded by an appropriate +; conditional branch. Unfortunately, indvars is not yet able to find +; the comparison for the other two loops in this testcase. +; +; CHECK: Loop %bb6: backedge-taken count is (-1 + %w) target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i386-apple-darwin9" diff --git a/test/Assembler/aggregate-constant-values.ll b/test/Assembler/aggregate-constant-values.ll index a37d03e..d0aab81 100644 --- a/test/Assembler/aggregate-constant-values.ll +++ b/test/Assembler/aggregate-constant-values.ll @@ -1,25 +1,48 @@ -; RUN: llvm-as < %s | llvm-dis | grep 7 | count 3 +; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | FileCheck %s +; CHECK: @foo +; CHECK: store { i32, i32 } { i32 7, i32 9 }, { i32, i32 }* %x +; CHECK: ret define void @foo({i32, i32}* %x) nounwind { store {i32, i32}{i32 7, i32 9}, {i32, i32}* %x ret void } + +; CHECK: @foo_empty +; CHECK: store {} zeroinitializer, {}* %x +; CHECK: ret define void @foo_empty({}* %x) nounwind { store {}{}, {}* %x ret void } + +; CHECK: @bar +; CHECK: store [2 x i32] [i32 7, i32 9], [2 x i32]* %x +; CHECK: ret define void @bar([2 x i32]* %x) nounwind { store [2 x i32][i32 7, i32 9], [2 x i32]* %x ret void } + +; CHECK: @bar_empty +; CHECK: store [0 x i32] undef, [0 x i32]* %x +; CHECK: ret define void @bar_empty([0 x i32]* %x) nounwind { store [0 x i32][], [0 x i32]* %x ret void } + +; CHECK: @qux +; CHECK: store <{ i32, i32 }> <{ i32 7, i32 9 }>, <{ i32, i32 }>* %x +; CHECK: ret define void @qux(<{i32, i32}>* %x) nounwind { store <{i32, i32}><{i32 7, i32 9}>, <{i32, i32}>* %x ret void } + +; CHECK: @qux_empty +; CHECK: store <{}> zeroinitializer, <{}>* %x +; CHECK: ret define void @qux_empty(<{}>* %x) nounwind { store <{}><{}>, <{}>* %x ret void diff --git a/test/Assembler/bcwrap.ll b/test/Assembler/bcwrap.ll index 859dc4b..4bec48c 100644 --- a/test/Assembler/bcwrap.ll +++ b/test/Assembler/bcwrap.ll @@ -1,9 +1,11 @@ ; RUN: llvm-as < %s > %t -; RUN: llvm-nm %t | grep foo -; test for isBitcodeFile, llvm-nm must read from a file for this test +; RUN: llvm-nm %t | FileCheck %s +; Test for isBitcodeFile, llvm-nm must read from a file for this test. target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin9.2.2" +; CHECK: foo + define i32 @foo() { ret i32 0 } diff --git a/test/Assembler/extractvalue-invalid-idx.ll b/test/Assembler/extractvalue-invalid-idx.ll index f9644ea..9a215f7 100644 --- a/test/Assembler/extractvalue-invalid-idx.ll +++ b/test/Assembler/extractvalue-invalid-idx.ll @@ -1,6 +1,8 @@ -; RUN: not llvm-as < %s |& grep {invalid indices for extractvalue} +; RUN: not llvm-as < %s |& FileCheck %s ; PR4170 +; CHECK: invalid indices for extractvalue + define void @test() { entry: extractvalue [0 x i32] undef, 0 diff --git a/test/Assembler/getelementptr_struct.ll b/test/Assembler/getelementptr_struct.ll index c8779a6..bfebf29 100644 --- a/test/Assembler/getelementptr_struct.ll +++ b/test/Assembler/getelementptr_struct.ll @@ -1,6 +1,8 @@ -; RUN: not llvm-as < %s >/dev/null |& grep {invalid getelementptr indices} +; RUN: not llvm-as < %s >/dev/null |& FileCheck %s ; Test the case of a incorrect indices type into struct +; CHECK: invalid getelementptr indices + %RT = type { i8 , [10 x [20 x i32]], i8 } %ST = type { i32, double, %RT } diff --git a/test/Assembler/huge-array.ll b/test/Assembler/huge-array.ll index e080947..a1abf87 100644 --- a/test/Assembler/huge-array.ll +++ b/test/Assembler/huge-array.ll @@ -1,5 +1,7 @@ -; RUN: llvm-as < %s | llvm-dis | grep 18446744073709551615 | count 2 +; RUN: llvm-as < %s | llvm-dis | FileCheck %s +; CHECK: define [18446744073709551615 x i8]* @foo() { +; CHECK: ret [18446744073709551615 x i8]* null define [18446744073709551615 x i8]* @foo() { ret [18446744073709551615 x i8]* null } diff --git a/test/Assembler/insertextractvalue.ll b/test/Assembler/insertextractvalue.ll index 2f5521f..6c00b13 100644 --- a/test/Assembler/insertextractvalue.ll +++ b/test/Assembler/insertextractvalue.ll @@ -1,7 +1,11 @@ -; RUN: llvm-as < %s | llvm-dis > %t -; RUN: grep insertvalue %t | count 1 -; RUN: grep extractvalue %t | count 1 +; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | FileCheck %s +; CHECK: @foo +; CHECK-NEXT: load +; CHECK-NEXT: extractvalue +; CHECK-NEXT: insertvalue +; CHECK-NEXT: store +; CHECK-NEXT: ret define float @foo({{i32},{float, double}}* %p) nounwind { %t = load {{i32},{float, double}}* %p %s = extractvalue {{i32},{float, double}} %t, 1, 0 @@ -9,21 +13,34 @@ define float @foo({{i32},{float, double}}* %p) nounwind { store {{i32},{float, double}} %r, {{i32},{float, double}}* %p ret float %s } + +; CHECK: @bar +; CHECK-NEXT: store { { i32 }, { float, double } } { { i32 } { i32 4 }, { float, double } { float 4.000000e+00, double 2.000000e+01 } }, { { i32 }, { float, double } }* %p +; CHECK-NEXT: ret float 7.000000e+00 define float @bar({{i32},{float, double}}* %p) nounwind { store {{i32},{float, double}} insertvalue ({{i32},{float, double}}{{i32}{i32 4},{float, double}{float 4.0, double 5.0}}, double 20.0, 1, 1), {{i32},{float, double}}* %p ret float extractvalue ({{i32},{float, double}}{{i32}{i32 3},{float, double}{float 7.0, double 9.0}}, 1, 0) } + +; CHECK: @car +; CHECK-NEXT: store { { i32 }, { float, double } } { { i32 } undef, { float, double } { float undef, double 2.000000e+01 } }, { { i32 }, { float, double } }* %p +; CHECK-NEXT: ret float undef define float @car({{i32},{float, double}}* %p) nounwind { store {{i32},{float, double}} insertvalue ({{i32},{float, double}} undef, double 20.0, 1, 1), {{i32},{float, double}}* %p ret float extractvalue ({{i32},{float, double}} undef, 1, 0) } + +; CHECK: @dar +; CHECK-NEXT: store { { i32 }, { float, double } } { { i32 } zeroinitializer, { float, double } { float 0.000000e+00, double 2.000000e+01 } }, { { i32 }, { float, double } }* %p +; CHECK-NEXT: ret float 0.000000e+00 define float @dar({{i32},{float, double}}* %p) nounwind { store {{i32},{float, double}} insertvalue ({{i32},{float, double}} zeroinitializer, double 20.0, 1, 1), {{i32},{float, double}}* %p ret float extractvalue ({{i32},{float, double}} zeroinitializer, 1, 0) } - ; PR4963 +; CHECK: @test57 +; CHECK-NEXT: ret <{ i32, i32 }> <{ i32 0, i32 4 }> define <{ i32, i32 }> @test57() { ret <{ i32, i32 }> insertvalue (<{ i32, i32 }> zeroinitializer, i32 4, 1) } diff --git a/test/Assembler/insertvalue-invalid-idx.ll b/test/Assembler/insertvalue-invalid-idx.ll index 86e7258..355d4e8 100644 --- a/test/Assembler/insertvalue-invalid-idx.ll +++ b/test/Assembler/insertvalue-invalid-idx.ll @@ -1,7 +1,9 @@ -; RUN: not llvm-as < %s |& grep {invalid indices for insertvalue} +; RUN: not llvm-as < %s |& FileCheck %s + +; CHECK: invalid indices for insertvalue define void @test() { entry: - insertvalue [0 x i32] undef, i32 0, 0 - ret void + insertvalue [0 x i32] undef, i32 0, 0 + ret void } diff --git a/test/Assembler/invalid_cast.ll b/test/Assembler/invalid_cast.ll index c5b082b..f682835 100644 --- a/test/Assembler/invalid_cast.ll +++ b/test/Assembler/invalid_cast.ll @@ -1,4 +1,6 @@ -; RUN: not llvm-as < %s |& grep {invalid cast opcode} +; RUN: not llvm-as < %s |& FileCheck %s + +; CHECK: invalid cast opcode for cast from '<4 x i64>' to '<3 x i8>' define <3 x i8> @foo(<4 x i64> %x) { %y = trunc <4 x i64> %x to <3 x i8> diff --git a/test/Assembler/invalid_cast2.ll b/test/Assembler/invalid_cast2.ll index f2e7c41..a01b935 100644 --- a/test/Assembler/invalid_cast2.ll +++ b/test/Assembler/invalid_cast2.ll @@ -1,4 +1,6 @@ -; RUN: not llvm-as < %s |& grep {invalid cast opcode} +; RUN: not llvm-as < %s |& FileCheck %s + +; CHECK: invalid cast opcode for cast from '<4 x i64>' to 'i8' define i8 @foo(<4 x i64> %x) { %y = trunc <4 x i64> %x to i8 diff --git a/test/Assembler/metadata.ll b/test/Assembler/metadata.ll index 50f27b4..56888fd 100644 --- a/test/Assembler/metadata.ll +++ b/test/Assembler/metadata.ll @@ -1,12 +1,12 @@ -; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep {ret void, !bar !1, !foo !0} +; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | FileCheck %s + +; CHECK: @test +; CHECK: ret void, !bar !1, !foo !0 define void @test() { add i32 2, 1, !bar !0 add i32 1, 2, !foo !1 - call void @llvm.dbg.func.start(metadata !"foo") - extractvalue {{i32, i32}, i32} undef, 0, 1, !foo !0 - ret void, !foo !0, !bar !1 } @@ -15,8 +15,5 @@ define void @test() { declare void @llvm.dbg.func.start(metadata) nounwind readnone - !foo = !{ !0 } !bar = !{ !1 } - -; !foo = !{ !0, !"foo" } diff --git a/test/Assembler/vbool-cmp.ll b/test/Assembler/vbool-cmp.ll index ac8fb29..e652d2f 100644 --- a/test/Assembler/vbool-cmp.ll +++ b/test/Assembler/vbool-cmp.ll @@ -1,15 +1,18 @@ -; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep {icmp slt} -; rudimentary test of fcmp/icmp on vectors returning vector of bool +; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | FileCheck %s +; Rudimentary test of fcmp/icmp on vectors returning vector of bool +; CHECK: @ffoo +; CHECK: fcmp olt <4 x float> %a, %b define <4 x i1> @ffoo(<4 x float> %a, <4 x float> %b) nounwind { entry: - %cmp = fcmp olt <4 x float> %a, %b ; <4 x i1> [#uses=1] - ret <4 x i1> %cmp + %cmp = fcmp olt <4 x float> %a, %b ; <4 x i1> [#uses=1] + ret <4 x i1> %cmp } +; CHECK: @ifoo +; CHECK: icmp slt <4 x i32> %a, %b define <4 x i1> @ifoo(<4 x i32> %a, <4 x i32> %b) nounwind { entry: - %cmp = icmp slt <4 x i32> %a, %b ; <4 x i1> [#uses=1] - ret <4 x i1> %cmp + %cmp = icmp slt <4 x i32> %a, %b ; <4 x i1> [#uses=1] + ret <4 x i1> %cmp } - diff --git a/test/Assembler/vector-cmp.ll b/test/Assembler/vector-cmp.ll index 688369b..6e3894c 100644 --- a/test/Assembler/vector-cmp.ll +++ b/test/Assembler/vector-cmp.ll @@ -1,16 +1,16 @@ -; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep {global.*icmp slt} +; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | FileCheck %s ; PR2317 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" target triple = "i686-apple-darwin9.2.2" +; CHECK: @1 = global <4 x i1> <i1 icmp slt (i32 ptrtoint (i32* @B to i32), i32 1), i1 true, i1 false, i1 true> + define <4 x i1> @foo(<4 x float> %a, <4 x float> %b) nounwind { entry: - %cmp = fcmp olt <4 x float> %a, %b ; <4 x i32> [#uses=1] - ret <4 x i1> %cmp + %cmp = fcmp olt <4 x float> %a, %b ; <4 x i32> [#uses=1] + ret <4 x i1> %cmp } global <4 x i1> icmp slt ( <4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32> <i32 1, i32 2, i32 1, i32 2> ) - @B = external global i32 - global <4 x i1> icmp slt ( <4 x i32> <i32 ptrtoint (i32 * @B to i32), i32 1, i32 1, i32 1>, <4 x i32> <i32 1, i32 2, i32 1, i32 2> ) diff --git a/test/Assembler/vector-select.ll b/test/Assembler/vector-select.ll index 87af602..ae8358a 100644 --- a/test/Assembler/vector-select.ll +++ b/test/Assembler/vector-select.ll @@ -1,11 +1,11 @@ -; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep select -; rudimentary test of select on vectors returning vector of bool +; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | FileCheck %s +; Rudimentary test of select on vectors returning vector of bool -define <4 x i32> @foo(<4 x i32> %a, <4 x i32> %b, - <4 x i1> %cond) nounwind { +; CHECK: @foo +; CHECK: select <4 x i1> %cond, <4 x i32> %a, <4 x i32> %b +define <4 x i32> @foo(<4 x i32> %a, <4 x i32> %b, <4 x i1> %cond) nounwind { entry: - %cmp = select <4 x i1> %cond, <4 x i32> %a, <4 x i32> %b - ; <4 x i32> [#uses=1] + %cmp = select <4 x i1> %cond, <4 x i32> %a, <4 x i32> %b ret <4 x i32> %cmp } diff --git a/test/Assembler/vector-shift.ll b/test/Assembler/vector-shift.ll index 1850e66..6a6531b 100644 --- a/test/Assembler/vector-shift.ll +++ b/test/Assembler/vector-shift.ll @@ -1,32 +1,45 @@ -; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep shl | count 1 -; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep ashr | count 1 -; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep lshr | count 1 +; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | FileCheck %s +; CHECK: @foo +; CHECK: shl define <4 x i32> @foo(<4 x i32> %a, <4 x i32> %b) nounwind { entry: - %cmp = shl <4 x i32> %a, %b ; <4 x i32> [#uses=1] - ret <4 x i32> %cmp + %cmp = shl <4 x i32> %a, %b ; <4 x i32> [#uses=1] + ret <4 x i32> %cmp } +; CHECK: @bar +; CHECK: lshr define <4 x i32> @bar(<4 x i32> %a, <4 x i32> %b) nounwind { entry: - %cmp = lshr <4 x i32> %a, %b ; <4 x i32> [#uses=1] - ret <4 x i32> %cmp + %cmp = lshr <4 x i32> %a, %b ; <4 x i32> [#uses=1] + ret <4 x i32> %cmp } +; CHECK: @baz +; CHECK: ashr define <4 x i32> @baz(<4 x i32> %a, <4 x i32> %b) nounwind { entry: - %cmp = ashr <4 x i32> %a, %b ; <4 x i32> [#uses=1] - ret <4 x i32> %cmp + %cmp = ashr <4 x i32> %a, %b ; <4 x i32> [#uses=1] + ret <4 x i32> %cmp } ; Constant expressions: these should be folded. + +; CHECK: @foo_ce +; CHECK: ret <2 x i64> <i64 40, i64 192> define <2 x i64> @foo_ce() nounwind { ret <2 x i64> shl (<2 x i64> <i64 5, i64 6>, <2 x i64> <i64 3, i64 5>) } + +; CHECK: @bar_ce +; CHECK: ret <2 x i64> <i64 42, i64 11> define <2 x i64> @bar_ce() nounwind { ret <2 x i64> lshr (<2 x i64> <i64 340, i64 380>, <2 x i64> <i64 3, i64 5>) } + +; CHECK: baz_ce +; CHECK: ret <2 x i64> <i64 71, i64 12> define <2 x i64> @baz_ce() nounwind { ret <2 x i64> ashr (<2 x i64> <i64 573, i64 411>, <2 x i64> <i64 3, i64 5>) } diff --git a/test/Bindings/Ocaml/lit.local.cfg b/test/Bindings/Ocaml/lit.local.cfg index 127c3d5..640c58d 100644 --- a/test/Bindings/Ocaml/lit.local.cfg +++ b/test/Bindings/Ocaml/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll', '.c', '.cpp', '.ml'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -bindings = set([s.strip() for s in root.llvm_bindings.split(',')]) +bindings = set([s.strip() for s in config.root.llvm_bindings.split(',')]) if not 'ocaml' in bindings: config.unsupported = True diff --git a/test/Bitcode/null-type.ll b/test/Bitcode/null-type.ll index 5d3dfab..b972753 100644 --- a/test/Bitcode/null-type.ll +++ b/test/Bitcode/null-type.ll @@ -1,2 +1,4 @@ -; RUN: not llvm-dis < %s.bc > /dev/null |& grep "Invalid MODULE_CODE_FUNCTION record" +; RUN: not llvm-dis < %s.bc > /dev/null |& FileCheck %s ; PR8494 + +; CHECK: Invalid MODULE_CODE_FUNCTION record diff --git a/test/CodeGen/ARM/2011-03-23-PeepholeBug.ll b/test/CodeGen/ARM/2011-03-23-PeepholeBug.ll index 7c9af6f..0fe88bd 100644 --- a/test/CodeGen/ARM/2011-03-23-PeepholeBug.ll +++ b/test/CodeGen/ARM/2011-03-23-PeepholeBug.ll @@ -26,7 +26,7 @@ bb2: ; preds = %bb1, %entry ; CHECK: bb2 ; CHECK: subs [[REG:r[0-9]+]], #1 ; CHECK: cmp [[REG]], #0 -; CHECK: bgt +; CHECK: ble %indvar = phi i32 [ %indvar.next, %bb1 ], [ 0, %entry ] %tries.0 = sub i32 2147483647, %indvar %tmp1 = icmp sgt i32 %tries.0, 0 diff --git a/test/CodeGen/ARM/2012-03-13-DAGCombineBug.ll b/test/CodeGen/ARM/2012-03-13-DAGCombineBug.ll index 6d596df..6206cd7 100644 --- a/test/CodeGen/ARM/2012-03-13-DAGCombineBug.ll +++ b/test/CodeGen/ARM/2012-03-13-DAGCombineBug.ll @@ -6,8 +6,7 @@ ; (i32 extload $addr+c*sizeof(i16) define void @test_hi_short3(<3 x i16> * nocapture %srcA, <2 x i16> * nocapture %dst) nounwind { entry: -; CHECK: ldrh [[REG:r[0-9]+]] -; CHECK: strh [[REG]] +; CHECK: vst1.32 %0 = load <3 x i16> * %srcA, align 8 %1 = shufflevector <3 x i16> %0, <3 x i16> undef, <2 x i32> <i32 2, i32 undef> store <2 x i16> %1, <2 x i16> * %dst, align 4 diff --git a/test/CodeGen/ARM/2012-03-26-FoldImmBug.ll b/test/CodeGen/ARM/2012-03-26-FoldImmBug.ll new file mode 100644 index 0000000..0ff4f51 --- /dev/null +++ b/test/CodeGen/ARM/2012-03-26-FoldImmBug.ll @@ -0,0 +1,33 @@ +; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a8 | FileCheck %s + +; ARM has a peephole optimization which looks for a def / use pair. The def +; produces a 32-bit immediate which is consumed by the use. It tries to +; fold the immediate by breaking it into two parts and fold them into the +; immmediate fields of two uses. e.g +; movw r2, #40885 +; movt r3, #46540 +; add r0, r0, r3 +; => +; add.w r0, r0, #3019898880 +; add.w r0, r0, #30146560 +; +; However, this transformation is incorrect if the user produces a flag. e.g. +; movw r2, #40885 +; movt r3, #46540 +; adds r0, r0, r3 +; => +; add.w r0, r0, #3019898880 +; adds.w r0, r0, #30146560 +; Note the adds.w may not set the carry flag even if the original sequence +; would. +; +; rdar://11116189 +define i64 @t(i64 %aInput) nounwind { +; CHECK: t: +; CHECK: movs [[REG:(r[0-9]+)]], #0 +; CHECK: movt [[REG]], #46540 +; CHECK: adds r{{[0-9]+}}, r{{[0-9]+}}, [[REG]] + %1 = mul i64 %aInput, 1000000 + %2 = add i64 %1, -7952618389194932224 + ret i64 %2 +} diff --git a/test/CodeGen/ARM/2012-04-02-TwoAddrInstrCrash.ll b/test/CodeGen/ARM/2012-04-02-TwoAddrInstrCrash.ll new file mode 100644 index 0000000..33ad187 --- /dev/null +++ b/test/CodeGen/ARM/2012-04-02-TwoAddrInstrCrash.ll @@ -0,0 +1,24 @@ +; RUN: llc < %s +; PR11861 +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64" +target triple = "armv7-none-linux-gnueabi" + +define arm_aapcs_vfpcc void @foo() nounwind align 2 { + br i1 undef, label %5, label %1 + +; <label>:1 ; preds = %0 + %2 = shufflevector <1 x i64> zeroinitializer, <1 x i64> undef, <2 x i32> <i32 0, i32 1> + %3 = bitcast <2 x i64> %2 to <4 x float> + store <4 x float> zeroinitializer, <4 x float>* undef, align 16, !tbaa !0 + store <4 x float> zeroinitializer, <4 x float>* undef, align 16, !tbaa !0 + store <4 x float> %3, <4 x float>* undef, align 16, !tbaa !0 + %4 = insertelement <4 x float> %3, float 8.000000e+00, i32 2 + store <4 x float> %4, <4 x float>* undef, align 16, !tbaa !0 + unreachable + +; <label>:5 ; preds = %0 + ret void +} + +!0 = metadata !{metadata !"omnipotent char", metadata !1} +!1 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/ARM/2012-04-10-DAGCombine.ll b/test/CodeGen/ARM/2012-04-10-DAGCombine.ll new file mode 100644 index 0000000..6f50f27 --- /dev/null +++ b/test/CodeGen/ARM/2012-04-10-DAGCombine.ll @@ -0,0 +1,31 @@ +; RUN: llc < %s -march=arm -mcpu=cortex-a9 -enable-unsafe-fp-math +;target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64" +;target triple = "armv7-none-linux-gnueabi" + +define arm_aapcs_vfpcc void @foo(<4 x float> %arg) nounwind align 2 { +bb4: + %tmp = extractelement <2 x float> undef, i32 0 + br i1 undef, label %bb18, label %bb5 + +bb5: ; preds = %bb4 + %tmp6 = fadd float %tmp, -1.500000e+01 + %tmp7 = fdiv float %tmp6, 2.000000e+01 + %tmp8 = fadd float %tmp7, 1.000000e+00 + %tmp9 = fdiv float 1.000000e+00, %tmp8 + %tmp10 = fsub float 1.000000e+00, %tmp9 + %tmp11 = fmul float %tmp10, 1.000000e+01 + %tmp12 = fadd float %tmp11, 1.500000e+01 + %tmp13 = fdiv float %tmp12, %tmp + %tmp14 = insertelement <2 x float> undef, float %tmp13, i32 0 + %tmp15 = shufflevector <2 x float> %tmp14, <2 x float> undef, <4 x i32> zeroinitializer + %tmp16 = fmul <4 x float> zeroinitializer, %tmp15 + %tmp17 = fadd <4 x float> %tmp16, %arg + store <4 x float> %tmp17, <4 x float>* undef, align 8, !tbaa !0 + br label %bb18 + +bb18: ; preds = %bb5, %bb4 + ret void +} + +!0 = metadata !{metadata !"omnipotent char", metadata !1} +!1 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/ARM/call-tc.ll b/test/CodeGen/ARM/call-tc.ll index be3e105..94edff5 100644 --- a/test/CodeGen/ARM/call-tc.ll +++ b/test/CodeGen/ARM/call-tc.ll @@ -96,3 +96,70 @@ bb: tail call void @foo() nounwind ret void } + +; Make sure codegenprep is duplicating ret instructions to enable tail calls. +; rdar://11140249 +define i32 @t8(i32 %x) nounwind ssp { +entry: +; CHECKT2D: t8: +; CHECKT2D-NOT: push +; CHECKT2D-NOT + %and = and i32 %x, 1 + %tobool = icmp eq i32 %and, 0 + br i1 %tobool, label %if.end, label %if.then + +if.then: ; preds = %entry +; CHECKT2D: bne.w _a + %call = tail call i32 @a(i32 %x) nounwind + br label %return + +if.end: ; preds = %entry + %and1 = and i32 %x, 2 + %tobool2 = icmp eq i32 %and1, 0 + br i1 %tobool2, label %if.end5, label %if.then3 + +if.then3: ; preds = %if.end +; CHECKT2D: bne.w _b + %call4 = tail call i32 @b(i32 %x) nounwind + br label %return + +if.end5: ; preds = %if.end +; CHECKT2D: b.w _c + %call6 = tail call i32 @c(i32 %x) nounwind + br label %return + +return: ; preds = %if.end5, %if.then3, %if.then + %retval.0 = phi i32 [ %call, %if.then ], [ %call4, %if.then3 ], [ %call6, %if.end5 ] + ret i32 %retval.0 +} + +declare i32 @a(i32) + +declare i32 @b(i32) + +declare i32 @c(i32) + +; PR12419 +; rdar://11195178 +; Use the correct input chain for the tailcall node or else the call to +; _ZN9MutexLockD1Ev would be lost. +%class.MutexLock = type { i8 } + +@x = external global i32, align 4 + +define i32 @t9() nounwind { +; CHECKT2D: t9: +; CHECKT2D: blx __ZN9MutexLockC1Ev +; CHECKT2D: blx __ZN9MutexLockD1Ev +; CHECKT2D: b.w ___divsi3 + %lock = alloca %class.MutexLock, align 1 + %1 = call %class.MutexLock* @_ZN9MutexLockC1Ev(%class.MutexLock* %lock) + %2 = load i32* @x, align 4 + %3 = sdiv i32 1000, %2 + %4 = call %class.MutexLock* @_ZN9MutexLockD1Ev(%class.MutexLock* %lock) + ret i32 %3 +} + +declare %class.MutexLock* @_ZN9MutexLockC1Ev(%class.MutexLock*) unnamed_addr nounwind align 2 + +declare %class.MutexLock* @_ZN9MutexLockD1Ev(%class.MutexLock*) unnamed_addr nounwind align 2 diff --git a/test/CodeGen/ARM/commute-movcc.ll b/test/CodeGen/ARM/commute-movcc.ll new file mode 100644 index 0000000..7316452 --- /dev/null +++ b/test/CodeGen/ARM/commute-movcc.ll @@ -0,0 +1,67 @@ +; RUN: llc -mtriple=thumbv7-apple-ios -disable-code-place < %s | FileCheck %s +; RUN: llc -mtriple=armv7-apple-ios -disable-code-place < %s | FileCheck %s + +; LLVM IR optimizers canonicalize icmp+select this way. +; Make sure that TwoAddressInstructionPass can commute the corresponding +; MOVCC instructions to avoid excessive copies in one of the if blocks. +; +; CHECK: %if.then +; CHECK-NOT: mov +; CHECK: movlo +; CHECK: movlo +; CHECK-NOT: mov + +; CHECK: %if.else +; CHECK-NOT: mov +; CHECK: movls +; CHECK: movls +; CHECK-NOT: mov + +; This is really an LSR test: Make sure that cmp is using the incremented +; induction variable. +; CHECK: %if.end8 +; CHECK: add{{(s|\.w)?}} [[IV:r[0-9]+]], {{.*}}#1 +; CHECK: cmp [[IV]], # + +define i32 @f(i32* nocapture %a, i32 %Pref) nounwind ssp { +entry: + br label %for.body + +for.body: ; preds = %entry, %if.end8 + %i.012 = phi i32 [ 0, %entry ], [ %inc, %if.end8 ] + %BestCost.011 = phi i32 [ -1, %entry ], [ %BestCost.1, %if.end8 ] + %BestIdx.010 = phi i32 [ 0, %entry ], [ %BestIdx.1, %if.end8 ] + %arrayidx = getelementptr inbounds i32* %a, i32 %i.012 + %0 = load i32* %arrayidx, align 4, !tbaa !0 + %mul = mul i32 %0, %0 + %sub = add nsw i32 %i.012, -5 + %cmp2 = icmp eq i32 %sub, %Pref + br i1 %cmp2, label %if.else, label %if.then + +if.then: ; preds = %for.body + %cmp3 = icmp ult i32 %mul, %BestCost.011 + %i.0.BestIdx.0 = select i1 %cmp3, i32 %i.012, i32 %BestIdx.010 + %mul.BestCost.0 = select i1 %cmp3, i32 %mul, i32 %BestCost.011 + br label %if.end8 + +if.else: ; preds = %for.body + %cmp5 = icmp ugt i32 %mul, %BestCost.011 + %BestIdx.0.i.0 = select i1 %cmp5, i32 %BestIdx.010, i32 %i.012 + %BestCost.0.mul = select i1 %cmp5, i32 %BestCost.011, i32 %mul + br label %if.end8 + +if.end8: ; preds = %if.else, %if.then + %BestIdx.1 = phi i32 [ %i.0.BestIdx.0, %if.then ], [ %BestIdx.0.i.0, %if.else ] + %BestCost.1 = phi i32 [ %mul.BestCost.0, %if.then ], [ %BestCost.0.mul, %if.else ] + store i32 %mul, i32* %arrayidx, align 4, !tbaa !0 + %inc = add i32 %i.012, 1 + %cmp = icmp eq i32 %inc, 11 + br i1 %cmp, label %for.end, label %for.body + +for.end: ; preds = %if.end8 + ret i32 %BestIdx.1 +} + +!0 = metadata !{metadata !"int", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA", null} diff --git a/test/CodeGen/ARM/dagcombine-anyexttozeroext.ll b/test/CodeGen/ARM/dagcombine-anyexttozeroext.ll new file mode 100644 index 0000000..18f57ea --- /dev/null +++ b/test/CodeGen/ARM/dagcombine-anyexttozeroext.ll @@ -0,0 +1,30 @@ +; RUN: llc -mtriple armv7 %s -o - | FileCheck %s + +; CHECK: f: +define float @f(<4 x i16>* nocapture %in) { + ; CHECK: vldr + ; CHECK: vmovl.u16 + ; CHECK-NOT: vand + %1 = load <4 x i16>* %in + ; CHECK: vcvt.f32.u32 + %2 = uitofp <4 x i16> %1 to <4 x float> + %3 = extractelement <4 x float> %2, i32 0 + %4 = extractelement <4 x float> %2, i32 1 + %5 = extractelement <4 x float> %2, i32 2 + + ; CHECK: vadd.f32 + %6 = fadd float %3, %4 + %7 = fadd float %6, %5 + + ret float %7 +} + +define float @g(<4 x i16>* nocapture %in) { + ; CHECK: vldr + %1 = load <4 x i16>* %in + ; CHECK-NOT: uxth + %2 = extractelement <4 x i16> %1, i32 0 + ; CHECK: vcvt.f32.u32 + %3 = uitofp i16 %2 to float + ret float %3 +} diff --git a/test/CodeGen/ARM/fast-isel-br-const.ll b/test/CodeGen/ARM/fast-isel-br-const.ll index 625adc2..7c532d5 100644 --- a/test/CodeGen/ARM/fast-isel-br-const.ll +++ b/test/CodeGen/ARM/fast-isel-br-const.ll @@ -5,7 +5,7 @@ define i32 @t1(i32 %a, i32 %b) nounwind uwtable ssp { entry: ; THUMB: t1: ; ARM: t1: - + %x = add i32 %a, %b br i1 1, label %if.then, label %if.else ; THUMB-NOT: b LBB0_1 ; ARM-NOT: b LBB0_1 @@ -24,6 +24,7 @@ if.then2: ; preds = %if.else br label %if.end6 if.else3: ; preds = %if.else + %y = sub i32 %a, %b br i1 1, label %if.then5, label %if.end ; THUMB-NOT: b LBB0_5 ; ARM-NOT: b LBB0_5 diff --git a/test/CodeGen/ARM/fast-isel.ll b/test/CodeGen/ARM/fast-isel.ll index 905543a..417e2d9 100644 --- a/test/CodeGen/ARM/fast-isel.ll +++ b/test/CodeGen/ARM/fast-isel.ll @@ -217,3 +217,12 @@ entry: ; THUMB: vcmpe.f32 s0, #0 ret i1 %4 } + +; ARM: @urem_fold +; THUMB: @urem_fold +; ARM: and r0, r0, #31 +; THUMB: and r0, r0, #31 +define i32 @urem_fold(i32 %a) nounwind { + %rem = urem i32 %a, 32 + ret i32 %rem +} diff --git a/test/CodeGen/ARM/fcopysign.ll b/test/CodeGen/ARM/fcopysign.ll index 87115cc..27fa2b0 100644 --- a/test/CodeGen/ARM/fcopysign.ll +++ b/test/CodeGen/ARM/fcopysign.ll @@ -40,26 +40,10 @@ entry: ret double %1 } -; rdar://9059537 -define i32 @test4() ssp { -entry: -; SOFT: test4: -; SOFT: vmov.f64 [[REG4:(d[0-9]+)]], #1.000000e+00 -; This S-reg must be the first sub-reg of the last D-reg on vbsl. -; SOFT: vcvt.f32.f64 {{s1?[02468]}}, [[REG4]] -; SOFT: vshr.u64 [[REG4]], [[REG4]], #32 -; SOFT: vmov.i32 [[REG5:(d[0-9]+)]], #0x80000000 -; SOFT: vbsl [[REG5]], [[REG4]], {{d[0-9]+}} - %call80 = tail call double @copysign(double 1.000000e+00, double undef) - %conv81 = fptrunc double %call80 to float - %tmp88 = bitcast float %conv81 to i32 - ret i32 %tmp88 -} - ; rdar://9287902 -define float @test5() nounwind { +define float @test4() nounwind { entry: -; SOFT: test5: +; SOFT: test4: ; SOFT: vmov [[REG7:(d[0-9]+)]], r0, r1 ; SOFT: vmov.i32 [[REG6:(d[0-9]+)]], #0x80000000 ; SOFT: vshr.u64 [[REG7]], [[REG7]], #32 diff --git a/test/CodeGen/ARM/fusedMAC.ll b/test/CodeGen/ARM/fusedMAC.ll index 40e8bb2..802d1b8 100644 --- a/test/CodeGen/ARM/fusedMAC.ll +++ b/test/CodeGen/ARM/fusedMAC.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=arm -mattr=+neon,+vfp4 | FileCheck %s +; RUN: llc < %s -mtriple=armv7-eabi -mattr=+neon,+vfp4 | FileCheck %s ; Check generated fused MAC and MLS. define double @fusedMACTest1(double %d1, double %d2, double %d3) { @@ -98,3 +98,88 @@ define <4 x float> @fusedMACTest12(<4 x float> %a, <4 x float> %b) { %sub = fsub <4 x float> %a, %mul ret <4 x float> %sub } + +define float @test_fma_f32(float %a, float %b, float %c) nounwind readnone ssp { +entry: +; CHECK: test_fma_f32 +; CHECK: vfma.f32 + %tmp1 = tail call float @llvm.fma.f32(float %a, float %b, float %c) nounwind readnone + ret float %tmp1 +} + +define double @test_fma_f64(double %a, double %b, double %c) nounwind readnone ssp { +entry: +; CHECK: test_fma_f64 +; CHECK: vfma.f64 + %tmp1 = tail call double @llvm.fma.f64(double %a, double %b, double %c) nounwind readnone + ret double %tmp1 +} + +define <2 x float> @test_fma_v2f32(<2 x float> %a, <2 x float> %b, <2 x float> %c) nounwind readnone ssp { +entry: +; CHECK: test_fma_v2f32 +; CHECK: vfma.f32 + %tmp1 = tail call <2 x float> @llvm.fma.v2f32(<2 x float> %a, <2 x float> %b, <2 x float> %c) nounwind + ret <2 x float> %tmp1 +} + +define double @test_fms_f64(double %a, double %b, double %c) nounwind readnone ssp { +entry: +; CHECK: test_fms_f64 +; CHECK: vfms.f64 + %tmp1 = fsub double -0.0, %a + %tmp2 = tail call double @llvm.fma.f64(double %tmp1, double %b, double %c) nounwind readnone + ret double %tmp2 +} + +define double @test_fms_f64_2(double %a, double %b, double %c) nounwind readnone ssp { +entry: +; CHECK: test_fms_f64_2 +; CHECK: vfms.f64 + %tmp1 = fsub double -0.0, %b + %tmp2 = tail call double @llvm.fma.f64(double %a, double %tmp1, double %c) nounwind readnone + %tmp3 = fsub double -0.0, %tmp2 + ret double %tmp3 +} + +define double @test_fnms_f64(double %a, double %b, double %c) nounwind readnone ssp { +entry: +; CHECK: test_fnms_f64 +; CHECK: vfnms.f64 + %tmp1 = fsub double -0.0, %a + %tmp2 = tail call double @llvm.fma.f64(double %tmp1, double %b, double %c) nounwind readnone + %tmp3 = fsub double -0.0, %tmp2 + ret double %tmp3 +} + +define double @test_fnms_f64_2(double %a, double %b, double %c) nounwind readnone ssp { +entry: +; CHECK: test_fnms_f64_2 +; CHECK: vfnms.f64 + %tmp1 = fsub double -0.0, %b + %tmp2 = tail call double @llvm.fma.f64(double %a, double %tmp1, double %c) nounwind readnone + ret double %tmp2 +} + +define double @test_fnma_f64(double %a, double %b, double %c) nounwind readnone ssp { +entry: +; CHECK: test_fnma_f64 +; CHECK: vfnma.f64 + %tmp1 = tail call double @llvm.fma.f64(double %a, double %b, double %c) nounwind readnone + %tmp2 = fsub double -0.0, %tmp1 + ret double %tmp2 +} + +define double @test_fnma_f64_2(double %a, double %b, double %c) nounwind readnone ssp { +entry: +; CHECK: test_fnma_f64_2 +; CHECK: vfnma.f64 + %tmp1 = fsub double -0.0, %a + %tmp2 = fsub double -0.0, %c + %tmp3 = tail call double @llvm.fma.f64(double %tmp1, double %b, double %tmp2) nounwind readnone + ret double %tmp3 +} + +declare float @llvm.fma.f32(float, float, float) nounwind readnone +declare double @llvm.fma.f64(double, double, double) nounwind readnone +declare <2 x float> @llvm.fma.v2f32(<2 x float>, <2 x float>, <2 x float>) nounwind readnone diff --git a/test/CodeGen/ARM/ldr_post.ll b/test/CodeGen/ARM/ldr_post.ll index 97a48e1..8ddf025 100644 --- a/test/CodeGen/ARM/ldr_post.ll +++ b/test/CodeGen/ARM/ldr_post.ll @@ -1,7 +1,9 @@ -; RUN: llc < %s -march=arm | \ -; RUN: grep {ldr.*\\\[.*\],} | count 1 +; RUN: llc < %s -march=arm | FileCheck %s -define i32 @test(i32 %a, i32 %b, i32 %c) { +; CHECK: test1: +; CHECK: ldr {{.*, \[.*]}}, -r2 +; CHECK-NOT: ldr +define i32 @test1(i32 %a, i32 %b, i32 %c) { %tmp1 = mul i32 %a, %b ; <i32> [#uses=2] %tmp2 = inttoptr i32 %tmp1 to i32* ; <i32*> [#uses=1] %tmp3 = load i32* %tmp2 ; <i32> [#uses=1] @@ -10,3 +12,14 @@ define i32 @test(i32 %a, i32 %b, i32 %c) { ret i32 %tmp5 } +; CHECK: test2: +; CHECK: ldr {{.*, \[.*\]}}, #-16 +; CHECK-NOT: ldr +define i32 @test2(i32 %a, i32 %b) { + %tmp1 = mul i32 %a, %b ; <i32> [#uses=2] + %tmp2 = inttoptr i32 %tmp1 to i32* ; <i32*> [#uses=1] + %tmp3 = load i32* %tmp2 ; <i32> [#uses=1] + %tmp4 = sub i32 %tmp1, 16 ; <i32> [#uses=1] + %tmp5 = mul i32 %tmp4, %tmp3 ; <i32> [#uses=1] + ret i32 %tmp5 +} diff --git a/test/CodeGen/ARM/ldr_pre.ll b/test/CodeGen/ARM/ldr_pre.ll index 7c44284..e904e5f 100644 --- a/test/CodeGen/ARM/ldr_pre.ll +++ b/test/CodeGen/ARM/ldr_pre.ll @@ -1,6 +1,8 @@ -; RUN: llc < %s -march=arm | \ -; RUN: grep {ldr.*\\!} | count 2 +; RUN: llc < %s -march=arm | FileCheck %s +; CHECK: test1: +; CHECK: ldr {{.*!}} +; CHECK-NOT: ldr define i32* @test1(i32* %X, i32* %dest) { %Y = getelementptr i32* %X, i32 4 ; <i32*> [#uses=2] %A = load i32* %Y ; <i32> [#uses=1] @@ -8,6 +10,9 @@ define i32* @test1(i32* %X, i32* %dest) { ret i32* %Y } +; CHECK: test2: +; CHECK: ldr {{.*!}} +; CHECK-NOT: ldr define i32 @test2(i32 %a, i32 %b, i32 %c) { %tmp1 = sub i32 %a, %b ; <i32> [#uses=2] %tmp2 = inttoptr i32 %tmp1 to i32* ; <i32*> [#uses=1] @@ -16,4 +21,3 @@ define i32 @test2(i32 %a, i32 %b, i32 %c) { %tmp5 = add i32 %tmp4, %tmp3 ; <i32> [#uses=1] ret i32 %tmp5 } - diff --git a/test/CodeGen/ARM/ldrd.ll b/test/CodeGen/ARM/ldrd.ll index a588bc3..3f8fd75 100644 --- a/test/CodeGen/ARM/ldrd.ll +++ b/test/CodeGen/ARM/ldrd.ll @@ -44,8 +44,7 @@ entry: ; BASIC: str ; GREEDY: @f ; GREEDY: %bb -; GREEDY: ldr -; GREEDY: ldr +; GREEDY: ldrd ; GREEDY: str define void @f(i32* nocapture %a, i32* nocapture %b, i32 %n) nounwind { entry: diff --git a/test/CodeGen/ARM/lit.local.cfg b/test/CodeGen/ARM/lit.local.cfg index dd6c50d..cb77b09 100644 --- a/test/CodeGen/ARM/lit.local.cfg +++ b/test/CodeGen/ARM/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll', '.c', '.cpp'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'ARM' in targets: config.unsupported = True diff --git a/test/CodeGen/ARM/lsr-icmp-imm.ll b/test/CodeGen/ARM/lsr-icmp-imm.ll new file mode 100644 index 0000000..5283f57 --- /dev/null +++ b/test/CodeGen/ARM/lsr-icmp-imm.ll @@ -0,0 +1,33 @@ +; RUN: llc -mtriple=thumbv7-apple-ios -disable-code-place < %s | FileCheck %s +; RUN: llc -mtriple=armv7-apple-ios -disable-code-place < %s | FileCheck %s + +; LSR should compare against the post-incremented induction variable. +; In this case, the immediate value is -2 which requires a cmn instruction. +; +; CHECK: f: +; CHECK: %for.body +; CHECK: sub{{.*}}[[IV:r[0-9]+]], #2 +; CHECK: cmn{{.*}}[[IV]], #2 +; CHECK: bne +define i32 @f(i32* nocapture %a, i32 %i) nounwind readonly ssp { +entry: + %cmp3 = icmp eq i32 %i, -2 + br i1 %cmp3, label %for.end, label %for.body + +for.body: ; preds = %entry, %for.body + %bi.06 = phi i32 [ %i.addr.0.bi.0, %for.body ], [ 0, %entry ] + %i.addr.05 = phi i32 [ %sub, %for.body ], [ %i, %entry ] + %b.04 = phi i32 [ %.b.0, %for.body ], [ 0, %entry ] + %arrayidx = getelementptr inbounds i32* %a, i32 %i.addr.05 + %0 = load i32* %arrayidx, align 4 + %cmp1 = icmp sgt i32 %0, %b.04 + %.b.0 = select i1 %cmp1, i32 %0, i32 %b.04 + %i.addr.0.bi.0 = select i1 %cmp1, i32 %i.addr.05, i32 %bi.06 + %sub = add nsw i32 %i.addr.05, -2 + %cmp = icmp eq i32 %i.addr.05, 0 + br i1 %cmp, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + %bi.0.lcssa = phi i32 [ 0, %entry ], [ %i.addr.0.bi.0, %for.body ] + ret i32 %bi.0.lcssa +} diff --git a/test/CodeGen/ARM/lsr-on-unrolled-loops.ll b/test/CodeGen/ARM/lsr-on-unrolled-loops.ll deleted file mode 100644 index ea5ae8f..0000000 --- a/test/CodeGen/ARM/lsr-on-unrolled-loops.ll +++ /dev/null @@ -1,640 +0,0 @@ -; RUN: llc -mtriple=thumbv7-apple-darwin10 -mcpu=cortex-a8 -enable-lsr-nested < %s | FileCheck %s - -; LSR should recognize that this is an unrolled loop which can use -; constant offset addressing, so that each of the following stores -; uses the same register. - -; CHECK: vstr s{{.*}}, [{{(r[0-9]+)|(lr)}}, #32] -; CHECK: vstr s{{.*}}, [{{(r[0-9]+)|(lr)}}, #64] -; CHECK: vstr s{{.*}}, [{{(r[0-9]+)|(lr)}}, #96] - -; We can also save a register in the outer loop, but that requires -; performing LSR on the outer loop. - -target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32" - -%0 = type { %1*, %3*, %6*, i8*, i32, i32, %8*, i32, i32, i32, i32, i32, i32, i32, double, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i8**, i32, i32, i32, i32, i32, [64 x i32]*, [4 x %9*], [4 x %10*], [4 x %10*], i32, %11*, i32, i32, [16 x i8], [16 x i8], [16 x i8], i32, i32, i8, i8, i8, i16, i16, i32, i8, i32, %12*, i32, i32, i32, i32, i8*, i32, [4 x %11*], i32, i32, i32, [10 x i32], i32, i32, i32, i32, i32, %13*, %14*, %15*, %16*, %17*, %18*, %19*, %20*, %21*, %22*, %23* } -%1 = type { void (%2*)*, void (%2*, i32)*, void (%2*)*, void (%2*, i8*)*, void (%2*)*, i32, %7, i32, i32, i8**, i32, i8**, i32, i32 } -%2 = type { %1*, %3*, %6*, i8*, i32, i32 } -%3 = type { i8* (%2*, i32, i32)*, i8* (%2*, i32, i32)*, i8** (%2*, i32, i32, i32)*, [64 x i16]** (%2*, i32, i32, i32)*, %4* (%2*, i32, i32, i32, i32, i32)*, %5* (%2*, i32, i32, i32, i32, i32)*, void (%2*)*, i8** (%2*, %4*, i32, i32, i32)*, [64 x i16]** (%2*, %5*, i32, i32, i32)*, void (%2*, i32)*, void (%2*)*, i32, i32 } -%4 = type opaque -%5 = type opaque -%6 = type { void (%2*)*, i32, i32, i32, i32 } -%7 = type { [8 x i32], [12 x i32] } -%8 = type { i8*, i32, void (%0*)*, i32 (%0*)*, void (%0*, i32)*, i32 (%0*, i32)*, void (%0*)* } -%9 = type { [64 x i16], i32 } -%10 = type { [17 x i8], [256 x i8], i32 } -%11 = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, %9*, i8* } -%12 = type { %12*, i8, i32, i32, i8* } -%13 = type { void (%0*)*, void (%0*)*, i32 } -%14 = type { void (%0*, i32)*, void (%0*, i8**, i32*, i32)* } -%15 = type { void (%0*)*, i32 (%0*)*, void (%0*)*, i32 (%0*, i8***)*, %5** } -%16 = type { void (%0*, i32)*, void (%0*, i8***, i32*, i32, i8**, i32*, i32)* } -%17 = type { i32 (%0*)*, void (%0*)*, void (%0*)*, void (%0*)*, i32, i32 } -%18 = type { void (%0*)*, i32 (%0*)*, i32 (%0*)*, i32, i32, i32, i32 } -%19 = type { void (%0*)*, i32 (%0*, [64 x i16]**)*, i32 } -%20 = type { void (%0*)*, [10 x void (%0*, %11*, i16*, i8**, i32)*] } -%21 = type { void (%0*)*, void (%0*, i8***, i32*, i32, i8**, i32*, i32)*, i32 } -%22 = type { void (%0*)*, void (%0*, i8***, i32, i8**, i32)* } -%23 = type { void (%0*, i32)*, void (%0*, i8**, i8**, i32)*, void (%0*)*, void (%0*)* } - -define void @test(%0* nocapture %a0, %11* nocapture %a1, i16* nocapture %a2, i8** nocapture %a3, i32 %a4) nounwind { -bb: - %t = alloca [64 x float], align 4 - %t5 = getelementptr inbounds %0* %a0, i32 0, i32 65 - %t6 = load i8** %t5, align 4 - %t7 = getelementptr inbounds %11* %a1, i32 0, i32 20 - %t8 = load i8** %t7, align 4 - br label %bb9 - -bb9: - %t10 = phi i32 [ 0, %bb ], [ %t157, %bb156 ] - %t11 = add i32 %t10, 8 - %t12 = getelementptr [64 x float]* %t, i32 0, i32 %t11 - %t13 = add i32 %t10, 16 - %t14 = getelementptr [64 x float]* %t, i32 0, i32 %t13 - %t15 = add i32 %t10, 24 - %t16 = getelementptr [64 x float]* %t, i32 0, i32 %t15 - %t17 = add i32 %t10, 32 - %t18 = getelementptr [64 x float]* %t, i32 0, i32 %t17 - %t19 = add i32 %t10, 40 - %t20 = getelementptr [64 x float]* %t, i32 0, i32 %t19 - %t21 = add i32 %t10, 48 - %t22 = getelementptr [64 x float]* %t, i32 0, i32 %t21 - %t23 = add i32 %t10, 56 - %t24 = getelementptr [64 x float]* %t, i32 0, i32 %t23 - %t25 = getelementptr [64 x float]* %t, i32 0, i32 %t10 - %t26 = shl i32 %t10, 5 - %t27 = or i32 %t26, 8 - %t28 = getelementptr i8* %t8, i32 %t27 - %t29 = bitcast i8* %t28 to float* - %t30 = or i32 %t26, 16 - %t31 = getelementptr i8* %t8, i32 %t30 - %t32 = bitcast i8* %t31 to float* - %t33 = or i32 %t26, 24 - %t34 = getelementptr i8* %t8, i32 %t33 - %t35 = bitcast i8* %t34 to float* - %t36 = or i32 %t26, 4 - %t37 = getelementptr i8* %t8, i32 %t36 - %t38 = bitcast i8* %t37 to float* - %t39 = or i32 %t26, 12 - %t40 = getelementptr i8* %t8, i32 %t39 - %t41 = bitcast i8* %t40 to float* - %t42 = or i32 %t26, 20 - %t43 = getelementptr i8* %t8, i32 %t42 - %t44 = bitcast i8* %t43 to float* - %t45 = or i32 %t26, 28 - %t46 = getelementptr i8* %t8, i32 %t45 - %t47 = bitcast i8* %t46 to float* - %t48 = getelementptr i8* %t8, i32 %t26 - %t49 = bitcast i8* %t48 to float* - %t50 = shl i32 %t10, 3 - %t51 = or i32 %t50, 1 - %t52 = getelementptr i16* %a2, i32 %t51 - %t53 = or i32 %t50, 2 - %t54 = getelementptr i16* %a2, i32 %t53 - %t55 = or i32 %t50, 3 - %t56 = getelementptr i16* %a2, i32 %t55 - %t57 = or i32 %t50, 4 - %t58 = getelementptr i16* %a2, i32 %t57 - %t59 = or i32 %t50, 5 - %t60 = getelementptr i16* %a2, i32 %t59 - %t61 = or i32 %t50, 6 - %t62 = getelementptr i16* %a2, i32 %t61 - %t63 = or i32 %t50, 7 - %t64 = getelementptr i16* %a2, i32 %t63 - %t65 = getelementptr i16* %a2, i32 %t50 - %t66 = load i16* %t52, align 2 - %t67 = icmp eq i16 %t66, 0 - %t68 = load i16* %t54, align 2 - %t69 = icmp eq i16 %t68, 0 - %t70 = and i1 %t67, %t69 - br i1 %t70, label %bb71, label %bb91 - -bb71: - %t72 = load i16* %t56, align 2 - %t73 = icmp eq i16 %t72, 0 - br i1 %t73, label %bb74, label %bb91 - -bb74: - %t75 = load i16* %t58, align 2 - %t76 = icmp eq i16 %t75, 0 - br i1 %t76, label %bb77, label %bb91 - -bb77: - %t78 = load i16* %t60, align 2 - %t79 = icmp eq i16 %t78, 0 - br i1 %t79, label %bb80, label %bb91 - -bb80: - %t81 = load i16* %t62, align 2 - %t82 = icmp eq i16 %t81, 0 - br i1 %t82, label %bb83, label %bb91 - -bb83: - %t84 = load i16* %t64, align 2 - %t85 = icmp eq i16 %t84, 0 - br i1 %t85, label %bb86, label %bb91 - -bb86: - %t87 = load i16* %t65, align 2 - %t88 = sitofp i16 %t87 to float - %t89 = load float* %t49, align 4 - %t90 = fmul float %t88, %t89 - store float %t90, float* %t25, align 4 - store float %t90, float* %t12, align 4 - store float %t90, float* %t14, align 4 - store float %t90, float* %t16, align 4 - store float %t90, float* %t18, align 4 - store float %t90, float* %t20, align 4 - store float %t90, float* %t22, align 4 - store float %t90, float* %t24, align 4 - br label %bb156 - -bb91: - %t92 = load i16* %t65, align 2 - %t93 = sitofp i16 %t92 to float - %t94 = load float* %t49, align 4 - %t95 = fmul float %t93, %t94 - %t96 = sitofp i16 %t68 to float - %t97 = load float* %t29, align 4 - %t98 = fmul float %t96, %t97 - %t99 = load i16* %t58, align 2 - %t100 = sitofp i16 %t99 to float - %t101 = load float* %t32, align 4 - %t102 = fmul float %t100, %t101 - %t103 = load i16* %t62, align 2 - %t104 = sitofp i16 %t103 to float - %t105 = load float* %t35, align 4 - %t106 = fmul float %t104, %t105 - %t107 = fadd float %t95, %t102 - %t108 = fsub float %t95, %t102 - %t109 = fadd float %t98, %t106 - %t110 = fsub float %t98, %t106 - %t111 = fmul float %t110, 0x3FF6A09E60000000 - %t112 = fsub float %t111, %t109 - %t113 = fadd float %t107, %t109 - %t114 = fsub float %t107, %t109 - %t115 = fadd float %t108, %t112 - %t116 = fsub float %t108, %t112 - %t117 = sitofp i16 %t66 to float - %t118 = load float* %t38, align 4 - %t119 = fmul float %t117, %t118 - %t120 = load i16* %t56, align 2 - %t121 = sitofp i16 %t120 to float - %t122 = load float* %t41, align 4 - %t123 = fmul float %t121, %t122 - %t124 = load i16* %t60, align 2 - %t125 = sitofp i16 %t124 to float - %t126 = load float* %t44, align 4 - %t127 = fmul float %t125, %t126 - %t128 = load i16* %t64, align 2 - %t129 = sitofp i16 %t128 to float - %t130 = load float* %t47, align 4 - %t131 = fmul float %t129, %t130 - %t132 = fadd float %t127, %t123 - %t133 = fsub float %t127, %t123 - %t134 = fadd float %t119, %t131 - %t135 = fsub float %t119, %t131 - %t136 = fadd float %t134, %t132 - %t137 = fsub float %t134, %t132 - %t138 = fmul float %t137, 0x3FF6A09E60000000 - %t139 = fadd float %t133, %t135 - %t140 = fmul float %t139, 0x3FFD906BC0000000 - %t141 = fmul float %t135, 0x3FF1517A80000000 - %t142 = fsub float %t141, %t140 - %t143 = fmul float %t133, 0xC004E7AEA0000000 - %t144 = fadd float %t143, %t140 - %t145 = fsub float %t144, %t136 - %t146 = fsub float %t138, %t145 - %t147 = fadd float %t142, %t146 - %t148 = fadd float %t113, %t136 - store float %t148, float* %t25, align 4 - %t149 = fsub float %t113, %t136 - store float %t149, float* %t24, align 4 - %t150 = fadd float %t115, %t145 - store float %t150, float* %t12, align 4 - %t151 = fsub float %t115, %t145 - store float %t151, float* %t22, align 4 - %t152 = fadd float %t116, %t146 - store float %t152, float* %t14, align 4 - %t153 = fsub float %t116, %t146 - store float %t153, float* %t20, align 4 - %t154 = fadd float %t114, %t147 - store float %t154, float* %t18, align 4 - %t155 = fsub float %t114, %t147 - store float %t155, float* %t16, align 4 - br label %bb156 - -bb156: - %t157 = add i32 %t10, 1 - %t158 = icmp eq i32 %t157, 8 - br i1 %t158, label %bb159, label %bb9 - -bb159: - %t160 = add i32 %a4, 7 - %t161 = add i32 %a4, 1 - %t162 = add i32 %a4, 6 - %t163 = add i32 %a4, 2 - %t164 = add i32 %a4, 5 - %t165 = add i32 %a4, 4 - %t166 = add i32 %a4, 3 - br label %bb167 - -bb167: - %t168 = phi i32 [ 0, %bb159 ], [ %t293, %bb167 ] - %t169 = getelementptr i8** %a3, i32 %t168 - %t170 = shl i32 %t168, 3 - %t171 = or i32 %t170, 4 - %t172 = getelementptr [64 x float]* %t, i32 0, i32 %t171 - %t173 = or i32 %t170, 2 - %t174 = getelementptr [64 x float]* %t, i32 0, i32 %t173 - %t175 = or i32 %t170, 6 - %t176 = getelementptr [64 x float]* %t, i32 0, i32 %t175 - %t177 = or i32 %t170, 5 - %t178 = getelementptr [64 x float]* %t, i32 0, i32 %t177 - %t179 = or i32 %t170, 3 - %t180 = getelementptr [64 x float]* %t, i32 0, i32 %t179 - %t181 = or i32 %t170, 1 - %t182 = getelementptr [64 x float]* %t, i32 0, i32 %t181 - %t183 = or i32 %t170, 7 - %t184 = getelementptr [64 x float]* %t, i32 0, i32 %t183 - %t185 = getelementptr [64 x float]* %t, i32 0, i32 %t170 - %t186 = load i8** %t169, align 4 - %t187 = getelementptr inbounds i8* %t186, i32 %a4 - %t188 = load float* %t185, align 4 - %t189 = load float* %t172, align 4 - %t190 = fadd float %t188, %t189 - %t191 = fsub float %t188, %t189 - %t192 = load float* %t174, align 4 - %t193 = load float* %t176, align 4 - %t194 = fadd float %t192, %t193 - %t195 = fsub float %t192, %t193 - %t196 = fmul float %t195, 0x3FF6A09E60000000 - %t197 = fsub float %t196, %t194 - %t198 = fadd float %t190, %t194 - %t199 = fsub float %t190, %t194 - %t200 = fadd float %t191, %t197 - %t201 = fsub float %t191, %t197 - %t202 = load float* %t178, align 4 - %t203 = load float* %t180, align 4 - %t204 = fadd float %t202, %t203 - %t205 = fsub float %t202, %t203 - %t206 = load float* %t182, align 4 - %t207 = load float* %t184, align 4 - %t208 = fadd float %t206, %t207 - %t209 = fsub float %t206, %t207 - %t210 = fadd float %t208, %t204 - %t211 = fsub float %t208, %t204 - %t212 = fmul float %t211, 0x3FF6A09E60000000 - %t213 = fadd float %t205, %t209 - %t214 = fmul float %t213, 0x3FFD906BC0000000 - %t215 = fmul float %t209, 0x3FF1517A80000000 - %t216 = fsub float %t215, %t214 - %t217 = fmul float %t205, 0xC004E7AEA0000000 - %t218 = fadd float %t217, %t214 - %t219 = fsub float %t218, %t210 - %t220 = fsub float %t212, %t219 - %t221 = fadd float %t216, %t220 - %t222 = fadd float %t198, %t210 - %t223 = fptosi float %t222 to i32 - %t224 = add nsw i32 %t223, 4 - %t225 = lshr i32 %t224, 3 - %t226 = and i32 %t225, 1023 - %t227 = add i32 %t226, 128 - %t228 = getelementptr inbounds i8* %t6, i32 %t227 - %t229 = load i8* %t228, align 1 - store i8 %t229, i8* %t187, align 1 - %t230 = fsub float %t198, %t210 - %t231 = fptosi float %t230 to i32 - %t232 = add nsw i32 %t231, 4 - %t233 = lshr i32 %t232, 3 - %t234 = and i32 %t233, 1023 - %t235 = add i32 %t234, 128 - %t236 = getelementptr inbounds i8* %t6, i32 %t235 - %t237 = load i8* %t236, align 1 - %t238 = getelementptr inbounds i8* %t186, i32 %t160 - store i8 %t237, i8* %t238, align 1 - %t239 = fadd float %t200, %t219 - %t240 = fptosi float %t239 to i32 - %t241 = add nsw i32 %t240, 4 - %t242 = lshr i32 %t241, 3 - %t243 = and i32 %t242, 1023 - %t244 = add i32 %t243, 128 - %t245 = getelementptr inbounds i8* %t6, i32 %t244 - %t246 = load i8* %t245, align 1 - %t247 = getelementptr inbounds i8* %t186, i32 %t161 - store i8 %t246, i8* %t247, align 1 - %t248 = fsub float %t200, %t219 - %t249 = fptosi float %t248 to i32 - %t250 = add nsw i32 %t249, 4 - %t251 = lshr i32 %t250, 3 - %t252 = and i32 %t251, 1023 - %t253 = add i32 %t252, 128 - %t254 = getelementptr inbounds i8* %t6, i32 %t253 - %t255 = load i8* %t254, align 1 - %t256 = getelementptr inbounds i8* %t186, i32 %t162 - store i8 %t255, i8* %t256, align 1 - %t257 = fadd float %t201, %t220 - %t258 = fptosi float %t257 to i32 - %t259 = add nsw i32 %t258, 4 - %t260 = lshr i32 %t259, 3 - %t261 = and i32 %t260, 1023 - %t262 = add i32 %t261, 128 - %t263 = getelementptr inbounds i8* %t6, i32 %t262 - %t264 = load i8* %t263, align 1 - %t265 = getelementptr inbounds i8* %t186, i32 %t163 - store i8 %t264, i8* %t265, align 1 - %t266 = fsub float %t201, %t220 - %t267 = fptosi float %t266 to i32 - %t268 = add nsw i32 %t267, 4 - %t269 = lshr i32 %t268, 3 - %t270 = and i32 %t269, 1023 - %t271 = add i32 %t270, 128 - %t272 = getelementptr inbounds i8* %t6, i32 %t271 - %t273 = load i8* %t272, align 1 - %t274 = getelementptr inbounds i8* %t186, i32 %t164 - store i8 %t273, i8* %t274, align 1 - %t275 = fadd float %t199, %t221 - %t276 = fptosi float %t275 to i32 - %t277 = add nsw i32 %t276, 4 - %t278 = lshr i32 %t277, 3 - %t279 = and i32 %t278, 1023 - %t280 = add i32 %t279, 128 - %t281 = getelementptr inbounds i8* %t6, i32 %t280 - %t282 = load i8* %t281, align 1 - %t283 = getelementptr inbounds i8* %t186, i32 %t165 - store i8 %t282, i8* %t283, align 1 - %t284 = fsub float %t199, %t221 - %t285 = fptosi float %t284 to i32 - %t286 = add nsw i32 %t285, 4 - %t287 = lshr i32 %t286, 3 - %t288 = and i32 %t287, 1023 - %t289 = add i32 %t288, 128 - %t290 = getelementptr inbounds i8* %t6, i32 %t289 - %t291 = load i8* %t290, align 1 - %t292 = getelementptr inbounds i8* %t186, i32 %t166 - store i8 %t291, i8* %t292, align 1 - %t293 = add nsw i32 %t168, 1 - %t294 = icmp eq i32 %t293, 8 - br i1 %t294, label %bb295, label %bb167 - -bb295: - ret void -} - -%struct.ct_data_s = type { %union.anon, %union.anon } -%struct.gz_header = type { i32, i32, i32, i32, i8*, i32, i32, i8*, i32, i8*, i32, i32, i32 } -%struct.internal_state = type { %struct.z_stream*, i32, i8*, i32, i8*, i32, i32, %struct.gz_header*, i32, i8, i32, i32, i32, i32, i8*, i32, i16*, i16*, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [573 x %struct.ct_data_s], [61 x %struct.ct_data_s], [39 x %struct.ct_data_s], %struct.tree_desc_s, %struct.tree_desc_s, %struct.tree_desc_s, [16 x i16], [573 x i32], i32, i32, [573 x i8], i8*, i32, i32, i16*, i32, i32, i32, i32, i16, i32 } -%struct.static_tree_desc = type { i32 } -%struct.tree_desc_s = type { %struct.ct_data_s*, i32, %struct.static_tree_desc* } -%struct.z_stream = type { i8*, i32, i32, i8*, i32, i32, i8*, %struct.internal_state*, i8* (i8*, i32, i32)*, void (i8*, i8*)*, i8*, i32, i32, i32 } -%union.anon = type { i16 } - -define i32 @longest_match(%struct.internal_state* %s, i32 %cur_match) nounwind optsize { -entry: - %0 = getelementptr inbounds %struct.internal_state* %s, i32 0, i32 31 ; <i32*> [#uses=1] - %1 = load i32* %0, align 4 ; <i32> [#uses=2] - %2 = getelementptr inbounds %struct.internal_state* %s, i32 0, i32 14 ; <i8**> [#uses=1] - %3 = load i8** %2, align 4 ; <i8*> [#uses=27] - %4 = getelementptr inbounds %struct.internal_state* %s, i32 0, i32 27 ; <i32*> [#uses=1] - %5 = load i32* %4, align 4 ; <i32> [#uses=17] - %6 = getelementptr inbounds i8* %3, i32 %5 ; <i8*> [#uses=1] - %7 = getelementptr inbounds %struct.internal_state* %s, i32 0, i32 30 ; <i32*> [#uses=1] - %8 = load i32* %7, align 4 ; <i32> [#uses=4] - %9 = getelementptr inbounds %struct.internal_state* %s, i32 0, i32 36 ; <i32*> [#uses=1] - %10 = load i32* %9, align 4 ; <i32> [#uses=2] - %11 = getelementptr inbounds %struct.internal_state* %s, i32 0, i32 11 ; <i32*> [#uses=1] - %12 = load i32* %11, align 4 ; <i32> [#uses=2] - %13 = add i32 %12, -262 ; <i32> [#uses=1] - %14 = icmp ugt i32 %5, %13 ; <i1> [#uses=1] - br i1 %14, label %bb, label %bb2 - -bb: ; preds = %entry - %15 = add i32 %5, 262 ; <i32> [#uses=1] - %16 = sub i32 %15, %12 ; <i32> [#uses=1] - br label %bb2 - -bb2: ; preds = %bb, %entry - %iftmp.48.0 = phi i32 [ %16, %bb ], [ 0, %entry ] ; <i32> [#uses=1] - %17 = getelementptr inbounds %struct.internal_state* %s, i32 0, i32 16 ; <i16**> [#uses=1] - %18 = load i16** %17, align 4 ; <i16*> [#uses=1] - %19 = getelementptr inbounds %struct.internal_state* %s, i32 0, i32 13 ; <i32*> [#uses=1] - %20 = load i32* %19, align 4 ; <i32> [#uses=1] - %.sum = add i32 %5, 258 ; <i32> [#uses=2] - %21 = getelementptr inbounds i8* %3, i32 %.sum ; <i8*> [#uses=1] - %22 = add nsw i32 %5, -1 ; <i32> [#uses=1] - %.sum30 = add i32 %22, %8 ; <i32> [#uses=1] - %23 = getelementptr inbounds i8* %3, i32 %.sum30 ; <i8*> [#uses=1] - %24 = load i8* %23, align 1 ; <i8> [#uses=1] - %.sum31 = add i32 %8, %5 ; <i32> [#uses=1] - %25 = getelementptr inbounds i8* %3, i32 %.sum31 ; <i8*> [#uses=1] - %26 = load i8* %25, align 1 ; <i8> [#uses=1] - %27 = getelementptr inbounds %struct.internal_state* %s, i32 0, i32 35 ; <i32*> [#uses=1] - %28 = load i32* %27, align 4 ; <i32> [#uses=1] - %29 = lshr i32 %1, 2 ; <i32> [#uses=1] - %30 = icmp ult i32 %8, %28 ; <i1> [#uses=1] - %. = select i1 %30, i32 %1, i32 %29 ; <i32> [#uses=1] - %31 = getelementptr inbounds %struct.internal_state* %s, i32 0, i32 29 ; <i32*> [#uses=1] - %32 = load i32* %31, align 4 ; <i32> [#uses=4] - %33 = icmp ugt i32 %10, %32 ; <i1> [#uses=1] - %nice_match.0.ph = select i1 %33, i32 %32, i32 %10 ; <i32> [#uses=1] - %34 = getelementptr inbounds %struct.internal_state* %s, i32 0, i32 28 ; <i32*> [#uses=1] - %35 = ptrtoint i8* %21 to i32 ; <i32> [#uses=1] - %36 = add nsw i32 %5, 257 ; <i32> [#uses=1] - %tmp81 = add i32 %., -1 ; <i32> [#uses=1] - br label %bb6 - -bb6: ; preds = %bb24, %bb2 - %indvar78 = phi i32 [ 0, %bb2 ], [ %indvar.next79, %bb24 ] ; <i32> [#uses=2] - %best_len.2 = phi i32 [ %8, %bb2 ], [ %best_len.0, %bb24 ] ; <i32> [#uses=8] - %scan_end1.1 = phi i8 [ %24, %bb2 ], [ %scan_end1.0, %bb24 ] ; <i8> [#uses=6] - %cur_match_addr.0 = phi i32 [ %cur_match, %bb2 ], [ %90, %bb24 ] ; <i32> [#uses=14] - %scan_end.1 = phi i8 [ %26, %bb2 ], [ %scan_end.0, %bb24 ] ; <i8> [#uses=6] - %37 = getelementptr inbounds i8* %3, i32 %cur_match_addr.0 ; <i8*> [#uses=1] - %.sum32 = add i32 %cur_match_addr.0, %best_len.2 ; <i32> [#uses=1] - %38 = getelementptr inbounds i8* %3, i32 %.sum32 ; <i8*> [#uses=1] - %39 = load i8* %38, align 1 ; <i8> [#uses=1] - %40 = icmp eq i8 %39, %scan_end.1 ; <i1> [#uses=1] - br i1 %40, label %bb7, label %bb23 - -bb7: ; preds = %bb6 - %41 = add nsw i32 %best_len.2, -1 ; <i32> [#uses=1] - %.sum33 = add i32 %41, %cur_match_addr.0 ; <i32> [#uses=1] - %42 = getelementptr inbounds i8* %3, i32 %.sum33 ; <i8*> [#uses=1] - %43 = load i8* %42, align 1 ; <i8> [#uses=1] - %44 = icmp eq i8 %43, %scan_end1.1 ; <i1> [#uses=1] - br i1 %44, label %bb8, label %bb23 - -bb8: ; preds = %bb7 - %45 = load i8* %37, align 1 ; <i8> [#uses=1] - %46 = load i8* %6, align 1 ; <i8> [#uses=1] - %47 = icmp eq i8 %45, %46 ; <i1> [#uses=1] - br i1 %47, label %bb9, label %bb23 - -bb9: ; preds = %bb8 - %.sum34 = add i32 %cur_match_addr.0, 1 ; <i32> [#uses=1] - %48 = getelementptr inbounds i8* %3, i32 %.sum34 ; <i8*> [#uses=1] - %49 = load i8* %48, align 1 ; <i8> [#uses=1] - %.sum88 = add i32 %5, 1 ; <i32> [#uses=1] - %50 = getelementptr inbounds i8* %3, i32 %.sum88 ; <i8*> [#uses=1] - %51 = load i8* %50, align 1 ; <i8> [#uses=1] - %52 = icmp eq i8 %49, %51 ; <i1> [#uses=1] - br i1 %52, label %bb10, label %bb23 - -bb10: ; preds = %bb9 - %tmp39 = add i32 %cur_match_addr.0, 10 ; <i32> [#uses=1] - %tmp41 = add i32 %cur_match_addr.0, 9 ; <i32> [#uses=1] - %tmp44 = add i32 %cur_match_addr.0, 8 ; <i32> [#uses=1] - %tmp47 = add i32 %cur_match_addr.0, 7 ; <i32> [#uses=1] - %tmp50 = add i32 %cur_match_addr.0, 6 ; <i32> [#uses=1] - %tmp53 = add i32 %cur_match_addr.0, 5 ; <i32> [#uses=1] - %tmp56 = add i32 %cur_match_addr.0, 4 ; <i32> [#uses=1] - %tmp59 = add i32 %cur_match_addr.0, 3 ; <i32> [#uses=1] - br label %bb11 - -bb11: ; preds = %bb18, %bb10 - %indvar = phi i32 [ %indvar.next, %bb18 ], [ 0, %bb10 ] ; <i32> [#uses=2] - %tmp = shl i32 %indvar, 3 ; <i32> [#uses=16] - %tmp40 = add i32 %tmp39, %tmp ; <i32> [#uses=1] - %scevgep = getelementptr i8* %3, i32 %tmp40 ; <i8*> [#uses=1] - %tmp42 = add i32 %tmp41, %tmp ; <i32> [#uses=1] - %scevgep43 = getelementptr i8* %3, i32 %tmp42 ; <i8*> [#uses=1] - %tmp45 = add i32 %tmp44, %tmp ; <i32> [#uses=1] - %scevgep46 = getelementptr i8* %3, i32 %tmp45 ; <i8*> [#uses=1] - %tmp48 = add i32 %tmp47, %tmp ; <i32> [#uses=1] - %scevgep49 = getelementptr i8* %3, i32 %tmp48 ; <i8*> [#uses=1] - %tmp51 = add i32 %tmp50, %tmp ; <i32> [#uses=1] - %scevgep52 = getelementptr i8* %3, i32 %tmp51 ; <i8*> [#uses=1] - %tmp54 = add i32 %tmp53, %tmp ; <i32> [#uses=1] - %scevgep55 = getelementptr i8* %3, i32 %tmp54 ; <i8*> [#uses=1] - %tmp60 = add i32 %tmp59, %tmp ; <i32> [#uses=1] - %scevgep61 = getelementptr i8* %3, i32 %tmp60 ; <i8*> [#uses=1] - %tmp62 = add i32 %tmp, 10 ; <i32> [#uses=1] - %.sum89 = add i32 %5, %tmp62 ; <i32> [#uses=2] - %scevgep63 = getelementptr i8* %3, i32 %.sum89 ; <i8*> [#uses=2] - %tmp64 = add i32 %tmp, 9 ; <i32> [#uses=1] - %.sum90 = add i32 %5, %tmp64 ; <i32> [#uses=1] - %scevgep65 = getelementptr i8* %3, i32 %.sum90 ; <i8*> [#uses=2] - %tmp66 = add i32 %tmp, 8 ; <i32> [#uses=1] - %.sum91 = add i32 %5, %tmp66 ; <i32> [#uses=1] - %scevgep67 = getelementptr i8* %3, i32 %.sum91 ; <i8*> [#uses=2] - %tmp6883 = or i32 %tmp, 7 ; <i32> [#uses=1] - %.sum92 = add i32 %5, %tmp6883 ; <i32> [#uses=1] - %scevgep69 = getelementptr i8* %3, i32 %.sum92 ; <i8*> [#uses=2] - %tmp7084 = or i32 %tmp, 6 ; <i32> [#uses=1] - %.sum93 = add i32 %5, %tmp7084 ; <i32> [#uses=1] - %scevgep71 = getelementptr i8* %3, i32 %.sum93 ; <i8*> [#uses=2] - %tmp7285 = or i32 %tmp, 5 ; <i32> [#uses=1] - %.sum94 = add i32 %5, %tmp7285 ; <i32> [#uses=1] - %scevgep73 = getelementptr i8* %3, i32 %.sum94 ; <i8*> [#uses=2] - %tmp7486 = or i32 %tmp, 4 ; <i32> [#uses=1] - %.sum95 = add i32 %5, %tmp7486 ; <i32> [#uses=1] - %scevgep75 = getelementptr i8* %3, i32 %.sum95 ; <i8*> [#uses=2] - %tmp7687 = or i32 %tmp, 3 ; <i32> [#uses=1] - %.sum96 = add i32 %5, %tmp7687 ; <i32> [#uses=1] - %scevgep77 = getelementptr i8* %3, i32 %.sum96 ; <i8*> [#uses=2] - %53 = load i8* %scevgep77, align 1 ; <i8> [#uses=1] - %54 = load i8* %scevgep61, align 1 ; <i8> [#uses=1] - %55 = icmp eq i8 %53, %54 ; <i1> [#uses=1] - br i1 %55, label %bb12, label %bb20 - -bb12: ; preds = %bb11 - %tmp57 = add i32 %tmp56, %tmp ; <i32> [#uses=1] - %scevgep58 = getelementptr i8* %3, i32 %tmp57 ; <i8*> [#uses=1] - %56 = load i8* %scevgep75, align 1 ; <i8> [#uses=1] - %57 = load i8* %scevgep58, align 1 ; <i8> [#uses=1] - %58 = icmp eq i8 %56, %57 ; <i1> [#uses=1] - br i1 %58, label %bb13, label %bb20 - -bb13: ; preds = %bb12 - %59 = load i8* %scevgep73, align 1 ; <i8> [#uses=1] - %60 = load i8* %scevgep55, align 1 ; <i8> [#uses=1] - %61 = icmp eq i8 %59, %60 ; <i1> [#uses=1] - br i1 %61, label %bb14, label %bb20 - -bb14: ; preds = %bb13 - %62 = load i8* %scevgep71, align 1 ; <i8> [#uses=1] - %63 = load i8* %scevgep52, align 1 ; <i8> [#uses=1] - %64 = icmp eq i8 %62, %63 ; <i1> [#uses=1] - br i1 %64, label %bb15, label %bb20 - -bb15: ; preds = %bb14 - %65 = load i8* %scevgep69, align 1 ; <i8> [#uses=1] - %66 = load i8* %scevgep49, align 1 ; <i8> [#uses=1] - %67 = icmp eq i8 %65, %66 ; <i1> [#uses=1] - br i1 %67, label %bb16, label %bb20 - -bb16: ; preds = %bb15 - %68 = load i8* %scevgep67, align 1 ; <i8> [#uses=1] - %69 = load i8* %scevgep46, align 1 ; <i8> [#uses=1] - %70 = icmp eq i8 %68, %69 ; <i1> [#uses=1] - br i1 %70, label %bb17, label %bb20 - -bb17: ; preds = %bb16 - %71 = load i8* %scevgep65, align 1 ; <i8> [#uses=1] - %72 = load i8* %scevgep43, align 1 ; <i8> [#uses=1] - %73 = icmp eq i8 %71, %72 ; <i1> [#uses=1] - br i1 %73, label %bb18, label %bb20 - -bb18: ; preds = %bb17 - %74 = load i8* %scevgep63, align 1 ; <i8> [#uses=1] - %75 = load i8* %scevgep, align 1 ; <i8> [#uses=1] - %76 = icmp eq i8 %74, %75 ; <i1> [#uses=1] - %77 = icmp slt i32 %.sum89, %.sum ; <i1> [#uses=1] - %or.cond = and i1 %76, %77 ; <i1> [#uses=1] - %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1] - br i1 %or.cond, label %bb11, label %bb20 - -bb20: ; preds = %bb18, %bb17, %bb16, %bb15, %bb14, %bb13, %bb12, %bb11 - %scan.3 = phi i8* [ %scevgep77, %bb11 ], [ %scevgep75, %bb12 ], [ %scevgep73, %bb13 ], [ %scevgep71, %bb14 ], [ %scevgep69, %bb15 ], [ %scevgep67, %bb16 ], [ %scevgep65, %bb17 ], [ %scevgep63, %bb18 ] ; <i8*> [#uses=1] - %78 = ptrtoint i8* %scan.3 to i32 ; <i32> [#uses=1] - %79 = sub nsw i32 %78, %35 ; <i32> [#uses=2] - %80 = add i32 %79, 258 ; <i32> [#uses=5] - %81 = icmp sgt i32 %80, %best_len.2 ; <i1> [#uses=1] - br i1 %81, label %bb21, label %bb23 - -bb21: ; preds = %bb20 - store i32 %cur_match_addr.0, i32* %34, align 4 - %82 = icmp slt i32 %80, %nice_match.0.ph ; <i1> [#uses=1] - br i1 %82, label %bb22, label %bb25 - -bb22: ; preds = %bb21 - %.sum37 = add i32 %36, %79 ; <i32> [#uses=1] - %83 = getelementptr inbounds i8* %3, i32 %.sum37 ; <i8*> [#uses=1] - %84 = load i8* %83, align 1 ; <i8> [#uses=1] - %.sum38 = add i32 %80, %5 ; <i32> [#uses=1] - %85 = getelementptr inbounds i8* %3, i32 %.sum38 ; <i8*> [#uses=1] - %86 = load i8* %85, align 1 ; <i8> [#uses=1] - br label %bb23 - -bb23: ; preds = %bb22, %bb20, %bb9, %bb8, %bb7, %bb6 - %best_len.0 = phi i32 [ %best_len.2, %bb6 ], [ %best_len.2, %bb7 ], [ %best_len.2, %bb8 ], [ %best_len.2, %bb9 ], [ %80, %bb22 ], [ %best_len.2, %bb20 ] ; <i32> [#uses=3] - %scan_end1.0 = phi i8 [ %scan_end1.1, %bb6 ], [ %scan_end1.1, %bb7 ], [ %scan_end1.1, %bb8 ], [ %scan_end1.1, %bb9 ], [ %84, %bb22 ], [ %scan_end1.1, %bb20 ] ; <i8> [#uses=1] - %scan_end.0 = phi i8 [ %scan_end.1, %bb6 ], [ %scan_end.1, %bb7 ], [ %scan_end.1, %bb8 ], [ %scan_end.1, %bb9 ], [ %86, %bb22 ], [ %scan_end.1, %bb20 ] ; <i8> [#uses=1] - %87 = and i32 %cur_match_addr.0, %20 ; <i32> [#uses=1] - %88 = getelementptr inbounds i16* %18, i32 %87 ; <i16*> [#uses=1] - %89 = load i16* %88, align 2 ; <i16> [#uses=1] - %90 = zext i16 %89 to i32 ; <i32> [#uses=2] - %91 = icmp ugt i32 %90, %iftmp.48.0 ; <i1> [#uses=1] - br i1 %91, label %bb24, label %bb25 - -bb24: ; preds = %bb23 - -; LSR should use count-down iteration to avoid requiring the trip count -; in a register. - -; CHECK: @ %bb24 -; CHECK: subs{{.*}} {{(r[0-9]+)|(lr)}}, #1 -; CHECK: bne.w - - %92 = icmp eq i32 %tmp81, %indvar78 ; <i1> [#uses=1] - %indvar.next79 = add i32 %indvar78, 1 ; <i32> [#uses=1] - br i1 %92, label %bb25, label %bb6 - -bb25: ; preds = %bb24, %bb23, %bb21 - %best_len.1 = phi i32 [ %best_len.0, %bb23 ], [ %best_len.0, %bb24 ], [ %80, %bb21 ] ; <i32> [#uses=2] - %93 = icmp ugt i32 %best_len.1, %32 ; <i1> [#uses=1] - %merge = select i1 %93, i32 %32, i32 %best_len.1 ; <i32> [#uses=1] - ret i32 %merge -} diff --git a/test/CodeGen/ARM/machine-cse-cmp.ll b/test/CodeGen/ARM/machine-cse-cmp.ll index f566974..3ac7d77 100644 --- a/test/CodeGen/ARM/machine-cse-cmp.ll +++ b/test/CodeGen/ARM/machine-cse-cmp.ll @@ -10,7 +10,7 @@ entry: ; CHECK: cmp ; CHECK: moveq ; CHECK-NOT: cmp -; CHECK: moveq +; CHECK: mov{{eq|ne}} %tmp1 = icmp eq i32 %cond1, 0 %tmp2 = select i1 %tmp1, i32 %x1, i32 %x2 %tmp3 = select i1 %tmp1, i32 %x2, i32 %x3 diff --git a/test/CodeGen/ARM/opt-shuff-tstore.ll b/test/CodeGen/ARM/opt-shuff-tstore.ll new file mode 100644 index 0000000..b4da552 --- /dev/null +++ b/test/CodeGen/ARM/opt-shuff-tstore.ll @@ -0,0 +1,19 @@ +; RUN: llc -mcpu=cortex-a9 -mtriple=arm-linux-unknown -promote-elements -mattr=+neon < %s | FileCheck %s + +; CHECK: func_4_8 +; CHECK: vst1.32 +; CHECK-NEXT: bx lr +define void @func_4_8(<4 x i8> %param, <4 x i8>* %p) { + %r = add <4 x i8> %param, <i8 1, i8 2, i8 3, i8 4> + store <4 x i8> %r, <4 x i8>* %p + ret void +} + +; CHECK: func_2_16 +; CHECK: vst1.32 +; CHECK-NEXT: bx lr +define void @func_2_16(<2 x i16> %param, <2 x i16>* %p) { + %r = add <2 x i16> %param, <i16 1, i16 2> + store <2 x i16> %r, <2 x i16>* %p + ret void +} diff --git a/test/CodeGen/ARM/reg_asc_order.ll b/test/CodeGen/ARM/reg_asc_order.ll new file mode 100644 index 0000000..d1d0ee5 --- /dev/null +++ b/test/CodeGen/ARM/reg_asc_order.ll @@ -0,0 +1,16 @@ +; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s +; Check that memcpy gets lowered to ldm/stm, at least in this very smple case. + +%struct.Foo = type { i32, i32, i32, i32 } + +define void @_Z10CopyStructP3FooS0_(%struct.Foo* nocapture %a, %struct.Foo* nocapture %b) nounwind { +entry: +;CHECK: ldm +;CHECK: stm + %0 = bitcast %struct.Foo* %a to i8* + %1 = bitcast %struct.Foo* %b to i8* + tail call void @llvm.memcpy.p0i8.p0i8.i32(i8* %0, i8* %1, i32 16, i32 4, i1 false) + ret void +} + +declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind diff --git a/test/CodeGen/ARM/reg_sequence.ll b/test/CodeGen/ARM/reg_sequence.ll index 78b4e7e..05794e4 100644 --- a/test/CodeGen/ARM/reg_sequence.ll +++ b/test/CodeGen/ARM/reg_sequence.ll @@ -273,7 +273,7 @@ define arm_aapcs_vfpcc i32 @t10() nounwind { entry: ; CHECK: t10: ; CHECK: vmov.i32 q[[Q0:[0-9]+]], #0x3f000000 -; CHECK: vmul.f32 q8, q8, d0[0] +; CHECK: vmul.f32 q8, q8, d[[DREG:[0-1]+]] ; CHECK: vadd.f32 q8, q8, q8 %0 = shufflevector <4 x float> zeroinitializer, <4 x float> undef, <4 x i32> zeroinitializer ; <<4 x float>> [#uses=1] %1 = insertelement <4 x float> %0, float undef, i32 1 ; <<4 x float>> [#uses=1] diff --git a/test/CodeGen/ARM/select-imm.ll b/test/CodeGen/ARM/select-imm.ll index e927b39..c9ac66a 100644 --- a/test/CodeGen/ARM/select-imm.ll +++ b/test/CodeGen/ARM/select-imm.ll @@ -64,7 +64,7 @@ define i32 @t4(i32 %a, i32 %b, i32 %x) nounwind { entry: ; ARM: t4: ; ARM: ldr -; ARM: movlt +; ARM: mov{{lt|ge}} ; ARMT2: t4: ; ARMT2: movwlt [[R0:r[0-9]+]], #65365 diff --git a/test/CodeGen/ARM/select.ll b/test/CodeGen/ARM/select.ll index f1bd7ee..3e07da8 100644 --- a/test/CodeGen/ARM/select.ll +++ b/test/CodeGen/ARM/select.ll @@ -76,12 +76,12 @@ define double @f7(double %a, double %b) { ; block generated, odds are good that we have close to the ideal code for this: ; ; CHECK-NEON: _f8: -; CHECK-NEON: adr r2, LCPI7_0 -; CHECK-NEON-NEXT: movw r3, #1123 -; CHECK-NEON-NEXT: adds r1, r2, #4 -; CHECK-NEON-NEXT: cmp r0, r3 +; CHECK-NEON: adr [[R2:r[0-9]+]], LCPI7_0 +; CHECK-NEON-NEXT: movw [[R3:r[0-9]+]], #1123 +; CHECK-NEON-NEXT: adds {{r.*}}, [[R2]], #4 +; CHECK-NEON-NEXT: cmp r0, [[R3]] ; CHECK-NEON-NEXT: it ne -; CHECK-NEON-NEXT: movne r1, r2 +; CHECK-NEON-NEXT: movne {{r.*}}, [[R2]] ; CHECK-NEON-NEXT: ldr ; CHECK-NEON: bx diff --git a/test/CodeGen/ARM/tail-opts.ll b/test/CodeGen/ARM/tail-opts.ll index 3dc77e2..220b0f1 100644 --- a/test/CodeGen/ARM/tail-opts.ll +++ b/test/CodeGen/ARM/tail-opts.ll @@ -16,11 +16,11 @@ declare i8* @choose(i8*, i8*) ; CHECK: tail_duplicate_me: ; CHECK: qux -; CHECK: qux ; CHECK: movw r{{[0-9]+}}, :lower16:_GHJK ; CHECK: movt r{{[0-9]+}}, :upper16:_GHJK ; CHECK: str r ; CHECK-NEXT: bx r +; CHECK: qux ; CHECK: movw r{{[0-9]+}}, :lower16:_GHJK ; CHECK: movt r{{[0-9]+}}, :upper16:_GHJK ; CHECK: str r diff --git a/test/CodeGen/ARM/vdiv_combine.ll b/test/CodeGen/ARM/vdiv_combine.ll index 1387393..7fddbed 100644 --- a/test/CodeGen/ARM/vdiv_combine.ll +++ b/test/CodeGen/ARM/vdiv_combine.ll @@ -8,7 +8,7 @@ declare void @foo_int32x4_t(<4 x i32>) ; Test signed conversion. ; CHECK: t1 -; CHECK-NOT: vdiv +; CHECK-NOT: {{vdiv|vmul}} define void @t1() nounwind { entry: %tmp = load i32* @iin, align 4, !tbaa !3 @@ -24,7 +24,7 @@ declare void @foo_float32x2_t(<2 x float>) ; Test unsigned conversion. ; CHECK: t2 -; CHECK-NOT: vdiv +; CHECK-NOT: {{vdiv|vmul}} define void @t2() nounwind { entry: %tmp = load i32* @uin, align 4, !tbaa !3 @@ -38,7 +38,7 @@ entry: ; Test which should not fold due to non-power of 2. ; CHECK: t3 -; CHECK: vdiv +; CHECK: {{vdiv|vmul}} define void @t3() nounwind { entry: %tmp = load i32* @iin, align 4, !tbaa !3 @@ -52,7 +52,7 @@ entry: ; Test which should not fold due to power of 2 out of range. ; CHECK: t4 -; CHECK: vdiv +; CHECK: {{vdiv|vmul}} define void @t4() nounwind { entry: %tmp = load i32* @iin, align 4, !tbaa !3 @@ -66,7 +66,7 @@ entry: ; Test case where const is max power of 2 (i.e., 2^32). ; CHECK: t5 -; CHECK-NOT: vdiv +; CHECK-NOT: {{vdiv|vmul}} define void @t5() nounwind { entry: %tmp = load i32* @iin, align 4, !tbaa !3 @@ -80,7 +80,7 @@ entry: ; Test quadword. ; CHECK: t6 -; CHECK-NOT: vdiv +; CHECK-NOT: {{vdiv|vmul}} define void @t6() nounwind { entry: %tmp = load i32* @iin, align 4, !tbaa !3 diff --git a/test/CodeGen/ARM/vector-extend-narrow.ll b/test/CodeGen/ARM/vector-extend-narrow.ll new file mode 100644 index 0000000..1ec36da --- /dev/null +++ b/test/CodeGen/ARM/vector-extend-narrow.ll @@ -0,0 +1,60 @@ +; RUN: llc -mtriple armv7 %s -o - | FileCheck %s + +; CHECK: f: +define float @f(<4 x i16>* nocapture %in) { + ; CHECK: vldr + ; CHECK: vmovl.u16 + %1 = load <4 x i16>* %in + ; CHECK: vcvt.f32.u32 + %2 = uitofp <4 x i16> %1 to <4 x float> + %3 = extractelement <4 x float> %2, i32 0 + %4 = extractelement <4 x float> %2, i32 1 + %5 = extractelement <4 x float> %2, i32 2 + + ; CHECK: vadd.f32 + %6 = fadd float %3, %4 + %7 = fadd float %6, %5 + + ret float %7 +} + +; CHECK: g: +define float @g(<4 x i8>* nocapture %in) { + ; CHECK: vldr + ; CHECK: vmovl.u8 + ; CHECK: vmovl.u16 + %1 = load <4 x i8>* %in + ; CHECK: vcvt.f32.u32 + %2 = uitofp <4 x i8> %1 to <4 x float> + %3 = extractelement <4 x float> %2, i32 0 + %4 = extractelement <4 x float> %2, i32 1 + %5 = extractelement <4 x float> %2, i32 2 + + ; CHECK: vadd.f32 + %6 = fadd float %3, %4 + %7 = fadd float %6, %5 + + ret float %7 +} + +; CHECK: h: +define <4 x i8> @h(<4 x float> %v) { + ; CHECK: vcvt.{{[us]}}32.f32 + ; CHECK: vmovn.i32 + %1 = fptoui <4 x float> %v to <4 x i8> + ret <4 x i8> %1 +} + +; CHECK: i: +define <4 x i8> @i(<4 x i8>* %x) { + ; CHECK: vldr + ; CHECK: vmovl.s8 + ; CHECK: vmovl.s16 + ; CHECK: vrecpe + ; CHECK: vrecps + ; CHECK: vmul + ; CHECK: vmovn + %1 = load <4 x i8>* %x, align 4 + %2 = sdiv <4 x i8> zeroinitializer, %1 + ret <4 x i8> %2 +} diff --git a/test/CodeGen/ARM/vrev.ll b/test/CodeGen/ARM/vrev.ll index e154334..122ec03 100644 --- a/test/CodeGen/ARM/vrev.ll +++ b/test/CodeGen/ARM/vrev.ll @@ -149,12 +149,10 @@ define void @test_with_vcombine(<4 x float>* %v) nounwind { } ; The type <2 x i16> is legalized to <2 x i32> and need to be trunc-stored -; to <2 x i16> when stored to memory. Currently ARM scalarizes these stores. -; See PR 11158 +; to <2 x i16> when stored to memory. define void @test_vrev64(<4 x i16>* nocapture %source, <2 x i16>* nocapture %dst) nounwind ssp { ; CHECK: test_vrev64: -; CHECK: vst1.16 -; CHECK: vst1.16 +; CHECK: vst1.32 entry: %0 = bitcast <4 x i16>* %source to <8 x i16>* %tmp2 = load <8 x i16>* %0, align 4 diff --git a/test/CodeGen/ARM/widen-vmovs.ll b/test/CodeGen/ARM/widen-vmovs.ll index 1f5113e..679e3f4 100644 --- a/test/CodeGen/ARM/widen-vmovs.ll +++ b/test/CodeGen/ARM/widen-vmovs.ll @@ -1,7 +1,7 @@ -; RUN: llc < %s -widen-vmovs -mcpu=cortex-a8 -verify-machineinstrs | FileCheck %s +; RUN: llc < %s -widen-vmovs -mcpu=cortex-a8 -verify-machineinstrs -disable-code-place | FileCheck %s target triple = "thumbv7-apple-ios" -; The 0.0 constant is loaded from the constant pool and kept in a register. +; The 1.0e+10 constant is loaded from the constant pool and kept in a register. ; CHECK: %entry ; CHECK: vldr s ; The float loop variable is initialized with a vmovs from the constant register. @@ -10,6 +10,7 @@ target triple = "thumbv7-apple-ios" ; CHECK: , [[DN]] ; CHECK: %for.body.i ; CHECK: vadd.f32 [[DL]], [[DL]], [[DN]] +; CHECK: %rInnerproduct.exit ; ; This test is verifying: ; - The VMOVS widening is happening. @@ -24,8 +25,8 @@ for.body4: br label %for.body.i for.body.i: - %tmp3.i = phi float [ 0.000000e+00, %for.body4 ], [ %add.i, %for.body.i ] - %add.i = fadd float %tmp3.i, 0.000000e+00 + %tmp3.i = phi float [ 1.000000e+10, %for.body4 ], [ %add.i, %for.body.i ] + %add.i = fadd float %tmp3.i, 1.000000e+10 %exitcond.i = icmp eq i32 undef, 41 br i1 %exitcond.i, label %rInnerproduct.exit, label %for.body.i diff --git a/test/CodeGen/CBackend/2002-05-16-NameCollide.ll b/test/CodeGen/CBackend/2002-05-16-NameCollide.ll deleted file mode 100644 index 0b06041..0000000 --- a/test/CodeGen/CBackend/2002-05-16-NameCollide.ll +++ /dev/null @@ -1,8 +0,0 @@ -; RUN: llc < %s -march=c - -; Make sure that global variables do not collide if they have the same name, -; but different types. - -@X = global i32 5 ; <i32*> [#uses=0] -@X.upgrd.1 = global i64 7 ; <i64*> [#uses=0] - diff --git a/test/CodeGen/CBackend/2002-05-21-MissingReturn.ll b/test/CodeGen/CBackend/2002-05-21-MissingReturn.ll deleted file mode 100644 index a9f54e4..0000000 --- a/test/CodeGen/CBackend/2002-05-21-MissingReturn.ll +++ /dev/null @@ -1,20 +0,0 @@ -; RUN: llc < %s -march=c - -; This case was emitting code that looked like this: -; ... -; llvm_BB1: /* no statement here */ -; } -; -; Which the Sun C compiler rejected, so now we are sure to put a return -; instruction in there if the basic block is otherwise empty. -; -define void @test() { - br label %BB1 - -BB2: ; preds = %BB2 - br label %BB2 - -BB1: ; preds = %0 - ret void -} - diff --git a/test/CodeGen/CBackend/2002-08-19-ConstPointerRef.ll b/test/CodeGen/CBackend/2002-08-19-ConstPointerRef.ll deleted file mode 100644 index 2afb1a0..0000000 --- a/test/CodeGen/CBackend/2002-08-19-ConstPointerRef.ll +++ /dev/null @@ -1,7 +0,0 @@ -; RUN: llc < %s -march=c - -; Test const pointer refs & forward references - -@t3 = global i32* @t1 ; <i32**> [#uses=0] -@t1 = global i32 4 ; <i32*> [#uses=1] - diff --git a/test/CodeGen/CBackend/2002-08-19-ConstantExpr.ll b/test/CodeGen/CBackend/2002-08-19-ConstantExpr.ll deleted file mode 100644 index b71cf07..0000000 --- a/test/CodeGen/CBackend/2002-08-19-ConstantExpr.ll +++ /dev/null @@ -1,8 +0,0 @@ -; RUN: llc < %s -march=c - -global i32* bitcast (float* @2 to i32*) ;; Forward numeric reference -global float* @2 ;; Duplicate forward numeric reference -global float 0.0 - -@array = constant [2 x i32] [ i32 12, i32 52 ] -@arrayPtr = global i32* getelementptr ([2 x i32]* @array, i64 0, i64 0) diff --git a/test/CodeGen/CBackend/2002-08-19-DataPointer.ll b/test/CodeGen/CBackend/2002-08-19-DataPointer.ll deleted file mode 100644 index b5a1f0b..0000000 --- a/test/CodeGen/CBackend/2002-08-19-DataPointer.ll +++ /dev/null @@ -1,4 +0,0 @@ -; RUN: llc < %s -march=c - -@sptr1 = global [11 x i8]* @somestr ;; Forward ref to a constant -@somestr = constant [11 x i8] c"hello world" diff --git a/test/CodeGen/CBackend/2002-08-19-FunctionPointer.ll b/test/CodeGen/CBackend/2002-08-19-FunctionPointer.ll deleted file mode 100644 index 10b9fe2..0000000 --- a/test/CodeGen/CBackend/2002-08-19-FunctionPointer.ll +++ /dev/null @@ -1,5 +0,0 @@ -; RUN: llc < %s -march=c - -@fptr = global void ()* @f ;; Forward ref method defn -declare void @f() ;; External method - diff --git a/test/CodeGen/CBackend/2002-08-19-HardConstantExpr.ll b/test/CodeGen/CBackend/2002-08-19-HardConstantExpr.ll deleted file mode 100644 index 0827423..0000000 --- a/test/CodeGen/CBackend/2002-08-19-HardConstantExpr.ll +++ /dev/null @@ -1,5 +0,0 @@ -; RUN: llc < %s -march=c - -@array = constant [2 x i32] [ i32 12, i32 52 ] ; <[2 x i32]*> [#uses=1] -@arrayPtr = global i32* getelementptr ([2 x i32]* @array, i64 0, i64 0) ; <i32**> [#uses=0] - diff --git a/test/CodeGen/CBackend/2002-08-20-UnnamedArgument.ll b/test/CodeGen/CBackend/2002-08-20-UnnamedArgument.ll deleted file mode 100644 index 59aafd5..0000000 --- a/test/CodeGen/CBackend/2002-08-20-UnnamedArgument.ll +++ /dev/null @@ -1,10 +0,0 @@ -; RUN: llc < %s -march=c - -; The C Writer bombs on this testcase because it tries the print the prototype -; for the test function, which tries to print the argument name. The function -; has not been incorporated into the slot calculator, so after it does the name -; lookup, it tries a slot calculator lookup, which fails. - -define i32 @test(i32) { - ret i32 0 -} diff --git a/test/CodeGen/CBackend/2002-08-26-IndirectCallTest.ll b/test/CodeGen/CBackend/2002-08-26-IndirectCallTest.ll deleted file mode 100644 index 6c4d629..0000000 --- a/test/CodeGen/CBackend/2002-08-26-IndirectCallTest.ll +++ /dev/null @@ -1,17 +0,0 @@ -; RUN: llc < %s -march=c - -; Indirect function call test... found by Joel & Brian -; - -@taskArray = external global i32* ; <i32**> [#uses=1] - -define void @test(i32 %X) { - %Y = add i32 %X, -1 ; <i32> [#uses=1] - %cast100 = sext i32 %Y to i64 ; <i64> [#uses=1] - %gep100 = getelementptr i32** @taskArray, i64 %cast100 ; <i32**> [#uses=1] - %fooPtr = load i32** %gep100 ; <i32*> [#uses=1] - %cast101 = bitcast i32* %fooPtr to void (i32)* ; <void (i32)*> [#uses=1] - call void %cast101( i32 1000 ) - ret void -} - diff --git a/test/CodeGen/CBackend/2002-08-30-StructureOrderingTest.ll b/test/CodeGen/CBackend/2002-08-30-StructureOrderingTest.ll deleted file mode 100644 index 1187a37..0000000 --- a/test/CodeGen/CBackend/2002-08-30-StructureOrderingTest.ll +++ /dev/null @@ -1,8 +0,0 @@ -; RUN: llc < %s -march=c - -; This testcase fails because the C backend does not arrange to output the -; contents of a structure type before it outputs the structure type itself. - -@Y = external global { { i32 } } ; <{ { i32 } }*> [#uses=0] -@X = external global { float } ; <{ float }*> [#uses=0] - diff --git a/test/CodeGen/CBackend/2002-09-20-ArrayTypeFailure.ll b/test/CodeGen/CBackend/2002-09-20-ArrayTypeFailure.ll deleted file mode 100644 index 021adb9..0000000 --- a/test/CodeGen/CBackend/2002-09-20-ArrayTypeFailure.ll +++ /dev/null @@ -1,7 +0,0 @@ -; RUN: llc < %s -march=c - -define void @test() { - %X = alloca [4 x i32] ; <[4 x i32]*> [#uses=0] - ret void -} - diff --git a/test/CodeGen/CBackend/2002-09-20-VarArgPrototypes.ll b/test/CodeGen/CBackend/2002-09-20-VarArgPrototypes.ll deleted file mode 100644 index e915cd2..0000000 --- a/test/CodeGen/CBackend/2002-09-20-VarArgPrototypes.ll +++ /dev/null @@ -1,6 +0,0 @@ -; RUN: llc < %s -march=c - - -declare void @foo(...) - - diff --git a/test/CodeGen/CBackend/2002-10-16-External.ll b/test/CodeGen/CBackend/2002-10-16-External.ll deleted file mode 100644 index 2cdd15c..0000000 --- a/test/CodeGen/CBackend/2002-10-16-External.ll +++ /dev/null @@ -1,4 +0,0 @@ -; RUN: llc < %s -march=c - -@bob = external global i32 ; <i32*> [#uses=0] - diff --git a/test/CodeGen/CBackend/2002-11-06-PrintEscaped.ll b/test/CodeGen/CBackend/2002-11-06-PrintEscaped.ll deleted file mode 100644 index 82d594f..0000000 --- a/test/CodeGen/CBackend/2002-11-06-PrintEscaped.ll +++ /dev/null @@ -1,11 +0,0 @@ -; RUN: llc < %s -march=c - -@testString = internal constant [18 x i8] c"Escaped newline\5Cn\00" ; <[18 x i8]*> [#uses=1] - -declare i32 @printf(i8*, ...) - -define i32 @main() { - call i32 (i8*, ...)* @printf( i8* getelementptr ([18 x i8]* @testString, i64 0, i64 0) ) ; <i32>:1 [#uses=0] - ret i32 0 -} - diff --git a/test/CodeGen/CBackend/2003-05-12-IntegerSizeWarning.ll b/test/CodeGen/CBackend/2003-05-12-IntegerSizeWarning.ll deleted file mode 100644 index 92d582d..0000000 --- a/test/CodeGen/CBackend/2003-05-12-IntegerSizeWarning.ll +++ /dev/null @@ -1,8 +0,0 @@ -; RUN: llc < %s -march=c - -; Apparently this constant was unsigned in ISO C 90, but not in C 99. - -define i32 @foo() { - ret i32 -2147483648 -} - diff --git a/test/CodeGen/CBackend/2003-05-13-VarArgFunction.ll b/test/CodeGen/CBackend/2003-05-13-VarArgFunction.ll deleted file mode 100644 index a42dc27..0000000 --- a/test/CodeGen/CBackend/2003-05-13-VarArgFunction.ll +++ /dev/null @@ -1,11 +0,0 @@ -; RUN: llc < %s -march=c - -; This testcase breaks the C backend, because gcc doesn't like (...) functions -; with no arguments at all. - -define void @test(i64 %Ptr) { - %P = inttoptr i64 %Ptr to void (...)* ; <void (...)*> [#uses=1] - call void (...)* %P( i64 %Ptr ) - ret void -} - diff --git a/test/CodeGen/CBackend/2003-05-31-MissingStructName.ll b/test/CodeGen/CBackend/2003-05-31-MissingStructName.ll deleted file mode 100644 index 19c7840..0000000 --- a/test/CodeGen/CBackend/2003-05-31-MissingStructName.ll +++ /dev/null @@ -1,5 +0,0 @@ -; RUN: llc < %s -march=c - -; The C backend was dying when there was no typename for a struct type! - -declare i32 @test(i32, { [32 x i32] }*) diff --git a/test/CodeGen/CBackend/2003-06-01-NullPointerType.ll b/test/CodeGen/CBackend/2003-06-01-NullPointerType.ll deleted file mode 100644 index 048e045..0000000 --- a/test/CodeGen/CBackend/2003-06-01-NullPointerType.ll +++ /dev/null @@ -1,9 +0,0 @@ -; RUN: llc < %s -march=c - -%X = type { i32, float } - -define void @test() { - getelementptr %X* null, i64 0, i32 1 ; <float*>:1 [#uses=0] - ret void -} - diff --git a/test/CodeGen/CBackend/2003-06-11-HexConstant.ll b/test/CodeGen/CBackend/2003-06-11-HexConstant.ll deleted file mode 100644 index 6197b30..0000000 --- a/test/CodeGen/CBackend/2003-06-11-HexConstant.ll +++ /dev/null @@ -1,4 +0,0 @@ -; RUN: llc < %s -march=c - -; Make sure hex constant does not continue into a valid hexadecimal letter/number -@version = global [3 x i8] c"\001\00" diff --git a/test/CodeGen/CBackend/2003-06-11-LiteralStringProblem.ll b/test/CodeGen/CBackend/2003-06-11-LiteralStringProblem.ll deleted file mode 100644 index f6177ea..0000000 --- a/test/CodeGen/CBackend/2003-06-11-LiteralStringProblem.ll +++ /dev/null @@ -1,3 +0,0 @@ -; RUN: llc < %s -march=c - -@version = global [3 x i8] c"1\00\00" diff --git a/test/CodeGen/CBackend/2003-06-28-InvokeSupport.ll b/test/CodeGen/CBackend/2003-06-28-InvokeSupport.ll deleted file mode 100644 index f0b1bbc..0000000 --- a/test/CodeGen/CBackend/2003-06-28-InvokeSupport.ll +++ /dev/null @@ -1,17 +0,0 @@ -; RUN: llc < %s -march=c - -declare i32 @callee(i32, i32) - -define i32 @test(i32 %X) { -; <label>:0 - %A = invoke i32 @callee( i32 %X, i32 5 ) - to label %Ok unwind label %Threw ; <i32> [#uses=1] - -Ok: ; preds = %Threw, %0 - %B = phi i32 [ %A, %0 ], [ -1, %Threw ] ; <i32> [#uses=1] - ret i32 %B - -Threw: ; preds = %0 - br label %Ok -} - diff --git a/test/CodeGen/CBackend/2003-06-28-LinkOnceGlobalVars.ll b/test/CodeGen/CBackend/2003-06-28-LinkOnceGlobalVars.ll deleted file mode 100644 index 4bd1da2..0000000 --- a/test/CodeGen/CBackend/2003-06-28-LinkOnceGlobalVars.ll +++ /dev/null @@ -1,3 +0,0 @@ -; RUN: llc < %s -march=c | grep common | grep X - -@X = linkonce global i32 5 diff --git a/test/CodeGen/CBackend/2003-10-12-NANGlobalInits.ll b/test/CodeGen/CBackend/2003-10-12-NANGlobalInits.ll deleted file mode 100644 index 0fbb3fe..0000000 --- a/test/CodeGen/CBackend/2003-10-12-NANGlobalInits.ll +++ /dev/null @@ -1,5 +0,0 @@ -; RUN: llc < %s -march=c - -; This is a non-normal FP value: it's a nan. -@NAN = global { float } { float 0x7FF8000000000000 } ; <{ float }*> [#uses=0] -@NANs = global { float } { float 0x7FFC000000000000 } ; <{ float }*> [#uses=0] diff --git a/test/CodeGen/CBackend/2003-10-23-UnusedType.ll b/test/CodeGen/CBackend/2003-10-23-UnusedType.ll deleted file mode 100644 index 9195634..0000000 --- a/test/CodeGen/CBackend/2003-10-23-UnusedType.ll +++ /dev/null @@ -1,8 +0,0 @@ -; RUN: llc < %s -march=c - -%A = type { i32, i8*, { i32, i32, i32, i32, i32, i32, i32, i32 }*, i16 } - -define void @test(%A*) { - ret void -} - diff --git a/test/CodeGen/CBackend/2003-10-28-CastToPtrToStruct.ll b/test/CodeGen/CBackend/2003-10-28-CastToPtrToStruct.ll deleted file mode 100644 index b4389ff..0000000 --- a/test/CodeGen/CBackend/2003-10-28-CastToPtrToStruct.ll +++ /dev/null @@ -1,12 +0,0 @@ -; RUN: llc < %s -march=c - -; reduced from DOOM. - %union._XEvent = type { i32 } -@.X_event_9 = global %union._XEvent zeroinitializer ; <%union._XEvent*> [#uses=1] - -define void @I_InitGraphics() { -shortcirc_next.3: - %tmp.319 = load i32* getelementptr ({ i32, i32 }* bitcast (%union._XEvent* @.X_event_9 to { i32, i32 }*), i64 0, i32 1) ; <i32> [#uses=0] - ret void -} - diff --git a/test/CodeGen/CBackend/2003-11-21-ConstantShiftExpr.ll b/test/CodeGen/CBackend/2003-11-21-ConstantShiftExpr.ll deleted file mode 100644 index 6a26291..0000000 --- a/test/CodeGen/CBackend/2003-11-21-ConstantShiftExpr.ll +++ /dev/null @@ -1,13 +0,0 @@ -; RUN: llc < %s -march=c -@y = weak global i8 0 ; <i8*> [#uses=1] - -define i32 @testcaseshr() { -entry: - ret i32 lshr (i32 ptrtoint (i8* @y to i32), i32 4) -} - -define i32 @testcaseshl() { -entry: - ret i32 shl (i32 ptrtoint (i8* @y to i32), i32 4) -} - diff --git a/test/CodeGen/CBackend/2004-02-13-FrameReturnAddress.ll b/test/CodeGen/CBackend/2004-02-13-FrameReturnAddress.ll deleted file mode 100644 index 142fbd8..0000000 --- a/test/CodeGen/CBackend/2004-02-13-FrameReturnAddress.ll +++ /dev/null @@ -1,16 +0,0 @@ -; RUN: llc < %s -march=c | grep builtin_return_address - -declare i8* @llvm.returnaddress(i32) - -declare i8* @llvm.frameaddress(i32) - -define i8* @test1() { - %X = call i8* @llvm.returnaddress( i32 0 ) ; <i8*> [#uses=1] - ret i8* %X -} - -define i8* @test2() { - %X = call i8* @llvm.frameaddress( i32 0 ) ; <i8*> [#uses=1] - ret i8* %X -} - diff --git a/test/CodeGen/CBackend/2004-02-15-PreexistingExternals.ll b/test/CodeGen/CBackend/2004-02-15-PreexistingExternals.ll deleted file mode 100644 index d1c6861..0000000 --- a/test/CodeGen/CBackend/2004-02-15-PreexistingExternals.ll +++ /dev/null @@ -1,18 +0,0 @@ -; The intrinsic lowering pass was lowering intrinsics like llvm.memcpy to -; explicitly specified prototypes, inserting a new function if the old one -; didn't exist. This caused there to be two external memcpy functions in -; this testcase for example, which caused the CBE to mangle one, screwing -; everything up. :( Test that this does not happen anymore. -; -; RUN: llc < %s -march=c | not grep _memcpy - -declare void @llvm.memcpy.i32(i8*, i8*, i32, i32) - -declare float* @memcpy(i32*, i32, i32) - -define i32 @test(i8* %A, i8* %B, i32* %C) { - call float* @memcpy( i32* %C, i32 4, i32 17 ) ; <float*>:1 [#uses=0] - call void @llvm.memcpy.i32( i8* %A, i8* %B, i32 123, i32 14 ) - ret i32 7 -} - diff --git a/test/CodeGen/CBackend/2004-02-26-FPNotPrintableConstants.ll b/test/CodeGen/CBackend/2004-02-26-FPNotPrintableConstants.ll deleted file mode 100644 index 6fceb08..0000000 --- a/test/CodeGen/CBackend/2004-02-26-FPNotPrintableConstants.ll +++ /dev/null @@ -1,11 +0,0 @@ -; This is a non-normal FP value -; RUN: llc < %s -march=c | grep FPConstant | grep static - -define float @func() { - ret float 0xFFF0000000000000 -} - -define double @func2() { - ret double 0xFF20000000000000 -} - diff --git a/test/CodeGen/CBackend/2004-02-26-LinkOnceFunctions.ll b/test/CodeGen/CBackend/2004-02-26-LinkOnceFunctions.ll deleted file mode 100644 index cf59634..0000000 --- a/test/CodeGen/CBackend/2004-02-26-LinkOnceFunctions.ll +++ /dev/null @@ -1,6 +0,0 @@ -; RUN: llc < %s -march=c | grep func1 | grep WEAK - -define linkonce i32 @func1() { - ret i32 5 -} - diff --git a/test/CodeGen/CBackend/2004-08-09-va-end-null.ll b/test/CodeGen/CBackend/2004-08-09-va-end-null.ll deleted file mode 100644 index 3ee23d1..0000000 --- a/test/CodeGen/CBackend/2004-08-09-va-end-null.ll +++ /dev/null @@ -1,10 +0,0 @@ -; RUN: llc < %s -march=c - -declare void @llvm.va_end(i8*) - -define void @test() { - %va.upgrd.1 = bitcast i8* null to i8* ; <i8*> [#uses=1] - call void @llvm.va_end( i8* %va.upgrd.1 ) - ret void -} - diff --git a/test/CodeGen/CBackend/2004-11-13-FunctionPointerCast.ll b/test/CodeGen/CBackend/2004-11-13-FunctionPointerCast.ll deleted file mode 100644 index af8f441..0000000 --- a/test/CodeGen/CBackend/2004-11-13-FunctionPointerCast.ll +++ /dev/null @@ -1,12 +0,0 @@ -; The CBE should not emit code that casts the function pointer. This causes -; GCC to get testy and insert trap instructions instead of doing the right -; thing. :( -; RUN: llc < %s -march=c - -declare void @external(i8*) - -define i32 @test(i32* %X) { - %RV = call i32 bitcast (void (i8*)* @external to i32 (i32*)*)( i32* %X ) ; <i32> [#uses=1] - ret i32 %RV -} - diff --git a/test/CodeGen/CBackend/2004-12-03-ExternStatics.ll b/test/CodeGen/CBackend/2004-12-03-ExternStatics.ll deleted file mode 100644 index 78e9bac..0000000 --- a/test/CodeGen/CBackend/2004-12-03-ExternStatics.ll +++ /dev/null @@ -1,10 +0,0 @@ -; RUN: llc < %s -march=c | not grep extern.*msg -; PR472 - -@msg = internal global [6 x i8] c"hello\00" ; <[6 x i8]*> [#uses=1] - -define i8* @foo() { -entry: - ret i8* getelementptr ([6 x i8]* @msg, i32 0, i32 0) -} - diff --git a/test/CodeGen/CBackend/2004-12-28-LogicalConstantExprs.ll b/test/CodeGen/CBackend/2004-12-28-LogicalConstantExprs.ll deleted file mode 100644 index 57a9adc..0000000 --- a/test/CodeGen/CBackend/2004-12-28-LogicalConstantExprs.ll +++ /dev/null @@ -1,5 +0,0 @@ -; RUN: llc < %s -march=c - -define i32 @foo() { - ret i32 and (i32 123456, i32 ptrtoint (i32 ()* @foo to i32)) -} diff --git a/test/CodeGen/CBackend/2005-07-14-NegationToMinusMinus.ll b/test/CodeGen/CBackend/2005-07-14-NegationToMinusMinus.ll deleted file mode 100644 index 808b8f9..0000000 --- a/test/CodeGen/CBackend/2005-07-14-NegationToMinusMinus.ll +++ /dev/null @@ -1,18 +0,0 @@ -; RUN: llc < %s -march=c | not grep -- --65535 -; PR596 - -target datalayout = "e-p:32:32" -target triple = "i686-pc-linux-gnu" - -declare void @func(i32) - -define void @funcb() { -entry: - %tmp.1 = sub i32 0, -65535 ; <i32> [#uses=1] - call void @func( i32 %tmp.1 ) - br label %return - -return: ; preds = %entry - ret void -} - diff --git a/test/CodeGen/CBackend/2005-08-23-Fmod.ll b/test/CodeGen/CBackend/2005-08-23-Fmod.ll deleted file mode 100644 index 6e650eb..0000000 --- a/test/CodeGen/CBackend/2005-08-23-Fmod.ll +++ /dev/null @@ -1,7 +0,0 @@ -; RUN: llc < %s -march=c | grep fmod - -define double @test(double %A, double %B) { - %C = frem double %A, %B ; <double> [#uses=1] - ret double %C -} - diff --git a/test/CodeGen/CBackend/2006-12-11-Float-Bitcast.ll b/test/CodeGen/CBackend/2006-12-11-Float-Bitcast.ll deleted file mode 100644 index c9df800..0000000 --- a/test/CodeGen/CBackend/2006-12-11-Float-Bitcast.ll +++ /dev/null @@ -1,49 +0,0 @@ -; RUN: llc < %s -march=c | \ -; RUN: grep __BITCAST | count 14 - -define i32 @test1(float %F) { - %X = bitcast float %F to i32 ; <i32> [#uses=1] - ret i32 %X -} - -define float @test2(i32 %I) { - %X = bitcast i32 %I to float ; <float> [#uses=1] - ret float %X -} - -define i64 @test3(double %D) { - %X = bitcast double %D to i64 ; <i64> [#uses=1] - ret i64 %X -} - -define double @test4(i64 %L) { - %X = bitcast i64 %L to double ; <double> [#uses=1] - ret double %X -} - -define double @test5(double %D) { - %X = bitcast double %D to double ; <double> [#uses=1] - %Y = fadd double %X, 2.000000e+00 ; <double> [#uses=1] - %Z = bitcast double %Y to i64 ; <i64> [#uses=1] - %res = bitcast i64 %Z to double ; <double> [#uses=1] - ret double %res -} - -define float @test6(float %F) { - %X = bitcast float %F to float ; <float> [#uses=1] - %Y = fadd float %X, 2.000000e+00 ; <float> [#uses=1] - %Z = bitcast float %Y to i32 ; <i32> [#uses=1] - %res = bitcast i32 %Z to float ; <float> [#uses=1] - ret float %res -} - -define i32 @main(i32 %argc, i8** %argv) { - %a = call i32 @test1( float 0x400921FB40000000 ) ; <i32> [#uses=2] - %b = call float @test2( i32 %a ) ; <float> [#uses=0] - %c = call i64 @test3( double 0x400921FB4D12D84A ) ; <i64> [#uses=1] - %d = call double @test4( i64 %c ) ; <double> [#uses=0] - %e = call double @test5( double 7.000000e+00 ) ; <double> [#uses=0] - %f = call float @test6( float 7.000000e+00 ) ; <float> [#uses=0] - ret i32 %a -} - diff --git a/test/CodeGen/CBackend/2007-01-08-ParamAttr-ICmp.ll b/test/CodeGen/CBackend/2007-01-08-ParamAttr-ICmp.ll deleted file mode 100644 index da36e78..0000000 --- a/test/CodeGen/CBackend/2007-01-08-ParamAttr-ICmp.ll +++ /dev/null @@ -1,26 +0,0 @@ -; For PR1099 -; RUN: llc < %s -march=c | grep {(llvm_cbe_tmp2 == llvm_cbe_b_2e_0_2e_0_2e_val)} - -target datalayout = "e-p:32:32" -target triple = "i686-apple-darwin8" - %struct.Connector = type { i16, i16, i8, i8, %struct.Connector*, i8* } - - -define i1 @prune_match_entry_2E_ce(%struct.Connector* %a, i16 %b.0.0.val) { -newFuncRoot: - br label %entry.ce - -cond_next.exitStub: ; preds = %entry.ce - ret i1 true - -entry.return_crit_edge.exitStub: ; preds = %entry.ce - ret i1 false - -entry.ce: ; preds = %newFuncRoot - %tmp1 = getelementptr %struct.Connector* %a, i32 0, i32 0 ; <i16*> [#uses=1] - %tmp2 = load i16* %tmp1 ; <i16> [#uses=1] - %tmp3 = icmp eq i16 %tmp2, %b.0.0.val ; <i1> [#uses=1] - br i1 %tmp3, label %cond_next.exitStub, label %entry.return_crit_edge.exitStub -} - - diff --git a/test/CodeGen/CBackend/2007-01-17-StackSaveNRestore.ll b/test/CodeGen/CBackend/2007-01-17-StackSaveNRestore.ll deleted file mode 100644 index 4f699b7..0000000 --- a/test/CodeGen/CBackend/2007-01-17-StackSaveNRestore.ll +++ /dev/null @@ -1,12 +0,0 @@ -; RUN: llc < %s -march=c | grep __builtin_stack_save -; RUN: llc < %s -march=c | grep __builtin_stack_restore -; PR1028 - -declare i8* @llvm.stacksave() -declare void @llvm.stackrestore(i8*) - -define i8* @test() { - %s = call i8* @llvm.stacksave() - call void @llvm.stackrestore(i8* %s) - ret i8* %s -} diff --git a/test/CodeGen/CBackend/2007-02-05-memset.ll b/test/CodeGen/CBackend/2007-02-05-memset.ll deleted file mode 100644 index 7d508e4..0000000 --- a/test/CodeGen/CBackend/2007-02-05-memset.ll +++ /dev/null @@ -1,13 +0,0 @@ -; RUN: llc < %s -march=c -; PR1181 -target datalayout = "e-p:64:64" -target triple = "x86_64-apple-darwin8" - - -declare void @llvm.memset.i64(i8*, i8, i64, i32) - -define fastcc void @InitUser_data_unregistered() { -entry: - tail call void @llvm.memset.i64( i8* null, i8 0, i64 65496, i32 1 ) - ret void -} diff --git a/test/CodeGen/CBackend/2007-02-23-NameConflicts.ll b/test/CodeGen/CBackend/2007-02-23-NameConflicts.ll deleted file mode 100644 index 7e1ff2a..0000000 --- a/test/CodeGen/CBackend/2007-02-23-NameConflicts.ll +++ /dev/null @@ -1,14 +0,0 @@ -; PR1164 -; RUN: llc < %s -march=c | grep {llvm_cbe_A = \\*llvm_cbe_G;} -; RUN: llc < %s -march=c | grep {llvm_cbe_B = \\*(<mp_0_1);} -; RUN: llc < %s -march=c | grep {return (((unsigned int )(((unsigned int )llvm_cbe_A) + ((unsigned int )llvm_cbe_B))));} - -@G = global i32 123 -@ltmp_0_1 = global i32 123 - -define i32 @test(i32 *%G) { - %A = load i32* %G - %B = load i32* @ltmp_0_1 - %C = add i32 %A, %B - ret i32 %C -} diff --git a/test/CodeGen/CBackend/2007-07-11-PackedStruct.ll b/test/CodeGen/CBackend/2007-07-11-PackedStruct.ll deleted file mode 100644 index c8bfdd6..0000000 --- a/test/CodeGen/CBackend/2007-07-11-PackedStruct.ll +++ /dev/null @@ -1,9 +0,0 @@ -; RUN: llc < %s -march=c | grep {packed} - - %struct.p = type <{ i16 }> - -define i32 @main() { -entry: - %t = alloca %struct.p, align 2 - ret i32 5 -} diff --git a/test/CodeGen/CBackend/2008-02-01-UnalignedLoadStore.ll b/test/CodeGen/CBackend/2008-02-01-UnalignedLoadStore.ll deleted file mode 100644 index e6eeba3..0000000 --- a/test/CodeGen/CBackend/2008-02-01-UnalignedLoadStore.ll +++ /dev/null @@ -1,15 +0,0 @@ -; RUN: llc < %s -march=c | \ -; RUN: grep {struct __attribute__ ((packed, aligned(} | count 4 - -define void @test(i32* %P) { - %X = load i32* %P, align 1 - store i32 %X, i32* %P, align 1 - ret void -} - -define void @test2(i32* %P) { - %X = load volatile i32* %P, align 2 - store volatile i32 %X, i32* %P, align 2 - ret void -} - diff --git a/test/CodeGen/CBackend/2008-05-31-BoolOverflow.ll b/test/CodeGen/CBackend/2008-05-31-BoolOverflow.ll deleted file mode 100644 index e9fa552..0000000 --- a/test/CodeGen/CBackend/2008-05-31-BoolOverflow.ll +++ /dev/null @@ -1,14 +0,0 @@ -; RUN: llc < %s -march=c | grep {llvm_cbe_t.*&1} -define i32 @test(i32 %r) { - %s = icmp eq i32 %r, 0 - %t = add i1 %s, %s - %u = zext i1 %t to i32 - br i1 %t, label %A, label %B -A: - - ret i32 %u -B: - - %v = select i1 %t, i32 %r, i32 %u - ret i32 %v -} diff --git a/test/CodeGen/CBackend/2008-10-21-PPCLongDoubleConstant.ll b/test/CodeGen/CBackend/2008-10-21-PPCLongDoubleConstant.ll deleted file mode 100644 index b72b573..0000000 --- a/test/CodeGen/CBackend/2008-10-21-PPCLongDoubleConstant.ll +++ /dev/null @@ -1,29 +0,0 @@ -; RUN: llc < %s -march=c -; PR2907 -target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128" -target triple = "powerpc-apple-darwin9.5" - %"struct.Point<0>" = type { %"struct.Tensor<1,0>" } - %"struct.QGauss2<1>" = type { %"struct.Quadrature<0>" } - %"struct.Quadrature<0>" = type { %struct.Subscriptor, i32, %"struct.std::vector<Point<0>,std::allocator<Point<0> > >", %"struct.std::vector<double,std::allocator<double> >" } - %struct.Subscriptor = type { i32 (...)**, i32, %"struct.std::type_info"* } - %"struct.Tensor<1,0>" = type { [1 x double] } - %"struct.std::_Vector_base<Point<0>,std::allocator<Point<0> > >" = type { %"struct.std::_Vector_base<Point<0>,std::allocator<Point<0> > >::_Vector_impl" } - %"struct.std::_Vector_base<Point<0>,std::allocator<Point<0> > >::_Vector_impl" = type { %"struct.Point<0>"*, %"struct.Point<0>"*, %"struct.Point<0>"* } - %"struct.std::_Vector_base<double,std::allocator<double> >" = type { %"struct.std::_Vector_base<double,std::allocator<double> >::_Vector_impl" } - %"struct.std::_Vector_base<double,std::allocator<double> >::_Vector_impl" = type { double*, double*, double* } - %"struct.std::type_info" = type { i32 (...)**, i8* } - %"struct.std::vector<Point<0>,std::allocator<Point<0> > >" = type { %"struct.std::_Vector_base<Point<0>,std::allocator<Point<0> > >" } - %"struct.std::vector<double,std::allocator<double> >" = type { %"struct.std::_Vector_base<double,std::allocator<double> >" } - -define fastcc void @_ZN6QGaussILi1EEC1Ej(%"struct.QGauss2<1>"* %this, i32 %n) { -entry: - br label %bb4 - -bb4: ; preds = %bb5.split, %bb4, %entry - %0 = fcmp ogt ppc_fp128 0xM00000000000000000000000000000000, select (i1 fcmp olt (ppc_fp128 fpext (double 0x3C447AE147AE147B to ppc_fp128), ppc_fp128 fmul (ppc_fp128 0xM00000000000000010000000000000000, ppc_fp128 0xM40140000000000000000000000000000)), ppc_fp128 fmul (ppc_fp128 0xM00000000000000010000000000000000, ppc_fp128 0xM40140000000000000000000000000000), ppc_fp128 fpext (double 0x3C447AE147AE147B to ppc_fp128)) ; <i1> [#uses=1] - br i1 %0, label %bb4, label %bb5.split - -bb5.split: ; preds = %bb4 - %1 = getelementptr double* null, i32 0 ; <double*> [#uses=0] - br label %bb4 -} diff --git a/test/CodeGen/CBackend/2011-06-08-addWithOverflow.ll b/test/CodeGen/CBackend/2011-06-08-addWithOverflow.ll deleted file mode 100644 index 0ae480d..0000000 --- a/test/CodeGen/CBackend/2011-06-08-addWithOverflow.ll +++ /dev/null @@ -1,35 +0,0 @@ -; RUN: llc < %s -march=c -; Check that uadd and sadd with overflow are handled by C Backend. - -%0 = type { i32, i1 } ; type %0 - -define i1 @func1(i32 zeroext %v1, i32 zeroext %v2) nounwind { -entry: - %t = call %0 @llvm.uadd.with.overflow.i32(i32 %v1, i32 %v2) ; <%0> [#uses=1] - %obit = extractvalue %0 %t, 1 ; <i1> [#uses=1] - br i1 %obit, label %carry, label %normal - -normal: ; preds = %entry - ret i1 true - -carry: ; preds = %entry - ret i1 false -} - -define i1 @func2(i32 signext %v1, i32 signext %v2) nounwind { -entry: - %t = call %0 @llvm.sadd.with.overflow.i32(i32 %v1, i32 %v2) ; <%0> [#uses=1] - %obit = extractvalue %0 %t, 1 ; <i1> [#uses=1] - br i1 %obit, label %carry, label %normal - -normal: ; preds = %entry - ret i1 true - -carry: ; preds = %entry - ret i1 false -} - -declare %0 @llvm.sadd.with.overflow.i32(i32, i32) nounwind - -declare %0 @llvm.uadd.with.overflow.i32(i32, i32) nounwind - diff --git a/test/CodeGen/CBackend/X86/2008-06-04-IndirectMem.ll b/test/CodeGen/CBackend/X86/2008-06-04-IndirectMem.ll deleted file mode 100644 index 054a3ca..0000000 --- a/test/CodeGen/CBackend/X86/2008-06-04-IndirectMem.ll +++ /dev/null @@ -1,12 +0,0 @@ -; RUN: llc < %s -march=c | grep {"m"(llvm_cbe_newcw))} -; PR2407 - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" -target triple = "i386-pc-linux-gnu" - -define void @foo() { - %newcw = alloca i16 ; <i16*> [#uses=2] - call void asm sideeffect "fldcw $0", "*m,~{dirflag},~{fpsr},~{flags}"( i16* -%newcw ) nounwind - ret void -} diff --git a/test/CodeGen/CBackend/X86/lit.local.cfg b/test/CodeGen/CBackend/X86/lit.local.cfg deleted file mode 100644 index 037d8c3..0000000 --- a/test/CodeGen/CBackend/X86/lit.local.cfg +++ /dev/null @@ -1,13 +0,0 @@ -config.suffixes = ['.ll', '.c', '.cpp'] - -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) -if not 'CBackend' in targets or not 'X86' in targets: - config.unsupported = True - diff --git a/test/CodeGen/CBackend/fneg.ll b/test/CodeGen/CBackend/fneg.ll deleted file mode 100644 index 7dec3d9..0000000 --- a/test/CodeGen/CBackend/fneg.ll +++ /dev/null @@ -1,7 +0,0 @@ -; RUN: llc < %s -march=c - -define void @func() nounwind { - entry: - %0 = fsub double -0.0, undef - ret void -} diff --git a/test/CodeGen/CBackend/lit.local.cfg b/test/CodeGen/CBackend/lit.local.cfg deleted file mode 100644 index 0dce170..0000000 --- a/test/CodeGen/CBackend/lit.local.cfg +++ /dev/null @@ -1,13 +0,0 @@ -config.suffixes = ['.ll', '.c', '.cpp'] - -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) -if not 'CBackend' in targets: - config.unsupported = True - diff --git a/test/CodeGen/CBackend/pr2408.ll b/test/CodeGen/CBackend/pr2408.ll deleted file mode 100644 index bf8477b..0000000 --- a/test/CodeGen/CBackend/pr2408.ll +++ /dev/null @@ -1,12 +0,0 @@ -; RUN: llc < %s -march=c | grep {\\* ((unsigned int )} -; PR2408 - -define i32 @a(i32 %a) { -entry: - %shr = ashr i32 %a, 0 ; <i32> [#uses=1] - %shr2 = ashr i32 2, 0 ; <i32> [#uses=1] - %mul = mul i32 %shr, %shr2 ; <i32> [#uses=1] - %shr4 = ashr i32 2, 0 ; <i32> [#uses=1] - %div = sdiv i32 %mul, %shr4 ; <i32> [#uses=1] - ret i32 %div -} diff --git a/test/CodeGen/CBackend/vectors.ll b/test/CodeGen/CBackend/vectors.ll deleted file mode 100644 index b7b7677..0000000 --- a/test/CodeGen/CBackend/vectors.ll +++ /dev/null @@ -1,37 +0,0 @@ -; RUN: llc < %s -march=c -@.str15 = external global [2 x i8] - -define <4 x i32> @foo(<4 x i32> %a, i32 %b) { - %c = insertelement <4 x i32> %a, i32 1, i32 %b - - ret <4 x i32> %c -} - -define i32 @test2(<4 x i32> %a, i32 %b) { - %c = extractelement <4 x i32> %a, i32 1 - - ret i32 %c -} - -define <4 x float> @test3(<4 x float> %Y) { - %Z = fadd <4 x float> %Y, %Y - %X = shufflevector <4 x float> zeroinitializer, <4 x float> %Z, <4 x i32> < i32 0, i32 5, i32 6, i32 7 > - ret <4 x float> %X -} - -define void @test4() { - %x = alloca <4 x float> - %tmp3.i16 = getelementptr <4 x float>* %x, i32 0, i32 0 - store float 1.0, float* %tmp3.i16 - ret void -} - -define i32* @test5({i32, i32} * %P) { - %x = getelementptr {i32, i32} * %P, i32 0, i32 1 - ret i32* %x -} - -define i8* @test6() { - ret i8* getelementptr ([2 x i8]* @.str15, i32 0, i32 0) -} - diff --git a/test/CodeGen/CPP/lit.local.cfg b/test/CodeGen/CPP/lit.local.cfg index 96596d8..4d4b4a4 100644 --- a/test/CodeGen/CPP/lit.local.cfg +++ b/test/CodeGen/CPP/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll', '.c', '.cpp'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'CppBackend' in targets: config.unsupported = True diff --git a/test/CodeGen/CellSPU/2009-01-01-BrCond.ll b/test/CodeGen/CellSPU/2009-01-01-BrCond.ll index 58e3190..3542231 100644 --- a/test/CodeGen/CellSPU/2009-01-01-BrCond.ll +++ b/test/CodeGen/CellSPU/2009-01-01-BrCond.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=cellspu -o - | grep brnz +; RUN: llc < %s -march=cellspu -o - | grep brz ; PR3274 target datalayout = "E-p:32:32:128-i1:8:128-i8:8:128-i16:16:128-i32:32:128-i64:32:128-f32:32:128-f64:64:128-v64:64:64-v128:128:128-a0:0:128-s0:128:128" diff --git a/test/CodeGen/CellSPU/lit.local.cfg b/test/CodeGen/CellSPU/lit.local.cfg index 6ae0972..ea00867 100644 --- a/test/CodeGen/CellSPU/lit.local.cfg +++ b/test/CodeGen/CellSPU/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll', '.c', '.cpp'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'CellSPU' in targets: config.unsupported = True diff --git a/test/CodeGen/Generic/pr12507.ll b/test/CodeGen/Generic/pr12507.ll new file mode 100644 index 0000000..c793358 --- /dev/null +++ b/test/CodeGen/Generic/pr12507.ll @@ -0,0 +1,18 @@ +; RUN: llc < %s + +@c = external global i32, align 4 + +define void @foo(i160 %x) { +entry: + %cmp.i = icmp ne i160 %x, 340282366920938463463374607431768211456 + %conv.i = zext i1 %cmp.i to i32 + %tobool.i = icmp eq i32 %conv.i, 0 + br i1 %tobool.i, label %if.then.i, label %fn1.exit + +if.then.i: + store i32 0, i32* @c, align 4 + br label %fn1.exit + +fn1.exit: + ret void +} diff --git a/test/CodeGen/Generic/select.ll b/test/CodeGen/Generic/select.ll index 63052c1..77636eb 100644 --- a/test/CodeGen/Generic/select.ll +++ b/test/CodeGen/Generic/select.ll @@ -185,3 +185,11 @@ define i32 @checkFoldGEP(%Domain* %D, i64 %idx) { ret i32 %reg820 } +; Test case for scalarising a 1 element vselect +; +define <1 x i32> @checkScalariseVSELECT(<1 x i32> %a, <1 x i32> %b) { + %cond = icmp uge <1 x i32> %a, %b + %s = select <1 x i1> %cond, <1 x i32> %a, <1 x i32> %b + ret <1 x i32> %s +} + diff --git a/test/CodeGen/Hexagon/args.ll b/test/CodeGen/Hexagon/args.ll index e9ac8b6..69002e0 100644 --- a/test/CodeGen/Hexagon/args.ll +++ b/test/CodeGen/Hexagon/args.ll @@ -1,4 +1,5 @@ -; RUN: llc -march=hexagon -mcpu=hexagonv4 -disable-dfa-sched < %s | FileCheck %s +; RUN: true +; DISABLED: llc -march=hexagon -mcpu=hexagonv4 -disable-dfa-sched < %s | FileCheck %s ; CHECK: r[[T0:[0-9]+]] = #7 ; CHECK: memw(r29 + #0) = r[[T0]] ; CHECK: r0 = #1 diff --git a/test/CodeGen/Hexagon/combine.ll b/test/CodeGen/Hexagon/combine.ll index 7219985..36abd74 100644 --- a/test/CodeGen/Hexagon/combine.ll +++ b/test/CodeGen/Hexagon/combine.ll @@ -1,4 +1,5 @@ -; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; RUN: true +; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s ; CHECK: combine(r{{[0-9]+}}, r{{[0-9]+}}) @j = external global i32 diff --git a/test/CodeGen/Hexagon/double.ll b/test/CodeGen/Hexagon/double.ll index c3b6f37..04c2ec1 100644 --- a/test/CodeGen/Hexagon/double.ll +++ b/test/CodeGen/Hexagon/double.ll @@ -1,4 +1,5 @@ -; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; RUN: true +; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s ; CHECK: __hexagon_adddf3 ; CHECK: __hexagon_subdf3 diff --git a/test/CodeGen/Hexagon/float.ll b/test/CodeGen/Hexagon/float.ll index bec9f58..51acf2e 100644 --- a/test/CodeGen/Hexagon/float.ll +++ b/test/CodeGen/Hexagon/float.ll @@ -1,4 +1,5 @@ -; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; RUN: true +; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s ; CHECK: __hexagon_addsf3 ; CHECK: __hexagon_subsf3 diff --git a/test/CodeGen/Hexagon/frame.ll b/test/CodeGen/Hexagon/frame.ll index dc87c73..c0a9fda 100644 --- a/test/CodeGen/Hexagon/frame.ll +++ b/test/CodeGen/Hexagon/frame.ll @@ -1,4 +1,5 @@ -; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; RUN: true +; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s @num = external global i32 @acc = external global i32 diff --git a/test/CodeGen/Hexagon/lit.local.cfg b/test/CodeGen/Hexagon/lit.local.cfg index ea12f68..24324b2 100644 --- a/test/CodeGen/Hexagon/lit.local.cfg +++ b/test/CodeGen/Hexagon/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll', '.c', '.cpp'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'Hexagon' in targets: config.unsupported = True diff --git a/test/CodeGen/Hexagon/mpy.ll b/test/CodeGen/Hexagon/mpy.ll index d5c5ae3..afd6fc6 100644 --- a/test/CodeGen/Hexagon/mpy.ll +++ b/test/CodeGen/Hexagon/mpy.ll @@ -1,4 +1,5 @@ -; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; RUN: true +; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s ; CHECK: += mpyi define void @foo(i32 %acc, i32 %num, i32 %num2) nounwind { diff --git a/test/CodeGen/Hexagon/static.ll b/test/CodeGen/Hexagon/static.ll index 1105096..c63a3ba 100644 --- a/test/CodeGen/Hexagon/static.ll +++ b/test/CodeGen/Hexagon/static.ll @@ -1,4 +1,5 @@ -; RUN: llc -march=hexagon -mcpu=hexagonv4 -disable-dfa-sched < %s | FileCheck %s +; RUN: true +; DISABLED: llc -march=hexagon -mcpu=hexagonv4 -disable-dfa-sched < %s | FileCheck %s @num = external global i32 @acc = external global i32 diff --git a/test/CodeGen/Hexagon/struct_args.ll b/test/CodeGen/Hexagon/struct_args.ll index cc409db..2c962d0 100644 --- a/test/CodeGen/Hexagon/struct_args.ll +++ b/test/CodeGen/Hexagon/struct_args.ll @@ -1,4 +1,5 @@ -; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; RUN: true +; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s ; CHECK: r1:0 = or(r{{[0-9]}}:{{[0-9]}}, r{{[0-9]}}:{{[0-9]}}) %struct.small = type { i32, i32 } diff --git a/test/CodeGen/Hexagon/struct_args_large.ll b/test/CodeGen/Hexagon/struct_args_large.ll index af099cd..69de4f6 100644 --- a/test/CodeGen/Hexagon/struct_args_large.ll +++ b/test/CodeGen/Hexagon/struct_args_large.ll @@ -1,4 +1,5 @@ -; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; RUN: true +; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s ; CHECK: r[[T0:[0-9]+]] = CONST32(#s2) ; CHECK: r[[T1:[0-9]+]] = memw(r[[T0]] + #0) ; CHECK: memw(r29 + #0) = r[[T1]] diff --git a/test/CodeGen/Hexagon/vaddh.ll b/test/CodeGen/Hexagon/vaddh.ll index 01d2041..788e474 100644 --- a/test/CodeGen/Hexagon/vaddh.ll +++ b/test/CodeGen/Hexagon/vaddh.ll @@ -1,4 +1,5 @@ -; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s +; RUN: true +; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s ; CHECK: vaddh(r{{[0-9]+}}, r{{[0-9]+}}) @j = external global i32 diff --git a/test/CodeGen/MBlaze/lit.local.cfg b/test/CodeGen/MBlaze/lit.local.cfg index e43df89..e236200 100644 --- a/test/CodeGen/MBlaze/lit.local.cfg +++ b/test/CodeGen/MBlaze/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll', '.c', '.cpp'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'MBlaze' in targets: config.unsupported = True diff --git a/test/CodeGen/MSP430/lit.local.cfg b/test/CodeGen/MSP430/lit.local.cfg index b9b654d..972732e 100644 --- a/test/CodeGen/MSP430/lit.local.cfg +++ b/test/CodeGen/MSP430/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll', '.c', '.cpp'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'MSP430' in targets: config.unsupported = True diff --git a/test/CodeGen/Mips/2009-11-16-CstPoolLoad.ll b/test/CodeGen/Mips/2009-11-16-CstPoolLoad.ll index b8d6826..2b2ee0f 100644 --- a/test/CodeGen/Mips/2009-11-16-CstPoolLoad.ll +++ b/test/CodeGen/Mips/2009-11-16-CstPoolLoad.ll @@ -1,10 +1,23 @@ -; RUN: llc < %s | FileCheck %s -target datalayout = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-n32" -target triple = "mips-unknown-linux" +; RUN: llc -march=mipsel -relocation-model=pic < %s | FileCheck %s -check-prefix=PIC-O32 +; RUN: llc -march=mipsel -relocation-model=static < %s | FileCheck %s -check-prefix=STATIC-O32 +; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=n32 -relocation-model=pic < %s | FileCheck %s -check-prefix=PIC-N32 +; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=n32 -relocation-model=static < %s | FileCheck %s -check-prefix=STATIC-N32 +; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=n64 -relocation-model=pic < %s | FileCheck %s -check-prefix=PIC-N64 +; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=n64 -relocation-model=static < %s | FileCheck %s -check-prefix=STATIC-N64 define float @h() nounwind readnone { entry: -; CHECK: lw $2, %got($CPI0_0)($gp) -; CHECK: lwc1 $f0, %lo($CPI0_0)($2) +; PIC-O32: lw $[[R0:[0-9]+]], %got($CPI0_0) +; PIC-O32: lwc1 $f0, %lo($CPI0_0)($[[R0]]) +; STATIC-O32: lui $[[R0:[0-9]+]], %hi($CPI0_0) +; STATIC-O32: lwc1 $f0, %lo($CPI0_0)($[[R0]]) +; PIC-N32: lw $[[R0:[0-9]+]], %got_page($CPI0_0) +; PIC-N32: lwc1 $f0, %got_ofst($CPI0_0)($[[R0]]) +; STATIC-N32: lui $[[R0:[0-9]+]], %hi($CPI0_0) +; STATIC-N32: lwc1 $f0, %lo($CPI0_0)($[[R0]]) +; PIC-N64: ld $[[R0:[0-9]+]], %got_page($CPI0_0) +; PIC-N64: lwc1 $f0, %got_ofst($CPI0_0)($[[R0]]) +; STATIC-N64: ld $[[R0:[0-9]+]], %got_page($CPI0_0) +; STATIC-N64: lwc1 $f0, %got_ofst($CPI0_0)($[[R0]]) ret float 0x400B333340000000 } diff --git a/test/CodeGen/Mips/2010-07-20-Switch.ll b/test/CodeGen/Mips/2010-07-20-Switch.ll index 785a416..aaf6767 100644 --- a/test/CodeGen/Mips/2010-07-20-Switch.ll +++ b/test/CodeGen/Mips/2010-07-20-Switch.ll @@ -13,9 +13,13 @@ entry: ; PIC-O32: lw $[[R0:[0-9]+]], %got($JTI0_0) ; PIC-O32: addiu ${{[0-9]+}}, $[[R0]], %lo($JTI0_0) ; PIC-O32: sll ${{[0-9]+}}, ${{[0-9]+}}, 2 +; PIC-O32: addu $[[R1:[0-9]+]], ${{[0-9]+}}, $gp +; PIC-O32: jr $[[R1]] ; PIC-N64: ld $[[R0:[0-9]+]], %got_page($JTI0_0) ; PIC-N64: daddiu ${{[0-9]+}}, $[[R0]], %got_ofst($JTI0_0) ; PIC-N64: dsll ${{[0-9]+}}, ${{[0-9]+}}, 3 +; PIC-N64: daddu $[[R1:[0-9]+]], ${{[0-9]+}}, $gp +; PIC-N64: jr $[[R1]] switch i32 %0, label %bb4 [ i32 0, label %bb5 i32 1, label %bb1 diff --git a/test/CodeGen/Mips/analyzebranch.ll b/test/CodeGen/Mips/analyzebranch.ll index 8f0bdf2..bc5bcc3 100644 --- a/test/CodeGen/Mips/analyzebranch.ll +++ b/test/CodeGen/Mips/analyzebranch.ll @@ -26,9 +26,9 @@ return: ; preds = %if.else, %if.end6 define void @f1(float %f) nounwind { entry: -; CHECK: bc1t $BB1_2 +; CHECK: bc1f $BB1_1 ; CHECK: nop -; CHECK: # BB#1: +; CHECK: # BB#2: %cmp = fcmp une float %f, 0.000000e+00 br i1 %cmp, label %if.then, label %if.end diff --git a/test/CodeGen/Mips/blockaddr.ll b/test/CodeGen/Mips/blockaddr.ll index 6de6b77..7de7fa6 100644 --- a/test/CodeGen/Mips/blockaddr.ll +++ b/test/CodeGen/Mips/blockaddr.ll @@ -1,5 +1,9 @@ -; RUN: llc -march=mipsel -relocation-model=pic < %s | FileCheck %s -check-prefix=CHECK-PIC -; RUN: llc -march=mipsel -relocation-model=static < %s | FileCheck %s -check-prefix=CHECK-STATIC +; RUN: llc -march=mipsel -relocation-model=pic < %s | FileCheck %s -check-prefix=PIC-O32 +; RUN: llc -march=mipsel -relocation-model=static < %s | FileCheck %s -check-prefix=STATIC-O32 +; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=n32 -relocation-model=pic < %s | FileCheck %s -check-prefix=PIC-N32 +; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=n32 -relocation-model=static < %s | FileCheck %s -check-prefix=STATIC-N32 +; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=n64 -relocation-model=pic < %s | FileCheck %s -check-prefix=PIC-N64 +; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=n64 -relocation-model=static < %s | FileCheck %s -check-prefix=STATIC-N64 @reg = common global i8* null, align 4 @@ -8,14 +12,30 @@ entry: ret i8* %x } -; CHECK-PIC: lw $[[R0:[0-9]+]], %got($tmp[[T0:[0-9]+]])($gp) -; CHECK-PIC: addiu ${{[0-9]+}}, $[[R0]], %lo($tmp[[T0]]) -; CHECK-PIC: lw $[[R1:[0-9]+]], %got($tmp[[T1:[0-9]+]])($gp) -; CHECK-PIC: addiu ${{[0-9]+}}, $[[R1]], %lo($tmp[[T1]]) -; CHECK-STATIC: lui $[[R2:[0-9]+]], %hi($tmp[[T0:[0-9]+]]) -; CHECK-STATIC: addiu ${{[0-9]+}}, $[[R2]], %lo($tmp[[T0]]) -; CHECK-STATIC: lui $[[R3:[0-9]+]], %hi($tmp[[T1:[0-9]+]]) -; CHECK-STATIC: addiu ${{[0-9]+}}, $[[R3]], %lo($tmp[[T1]]) +; PIC-O32: lw $[[R0:[0-9]+]], %got($tmp[[T0:[0-9]+]]) +; PIC-O32: addiu ${{[0-9]+}}, $[[R0]], %lo($tmp[[T0]]) +; PIC-O32: lw $[[R1:[0-9]+]], %got($tmp[[T1:[0-9]+]]) +; PIC-O32: addiu ${{[0-9]+}}, $[[R1]], %lo($tmp[[T1]]) +; STATIC-O32: lui $[[R2:[0-9]+]], %hi($tmp[[T2:[0-9]+]]) +; STATIC-O32: addiu ${{[0-9]+}}, $[[R2]], %lo($tmp[[T2]]) +; STATIC-O32: lui $[[R3:[0-9]+]], %hi($tmp[[T3:[0-9]+]]) +; STATIC-O32: addiu ${{[0-9]+}}, $[[R3]], %lo($tmp[[T3]]) +; PIC-N32: lw $[[R0:[0-9]+]], %got_page($tmp[[T0:[0-9]+]]) +; PIC-N32: addiu ${{[0-9]+}}, $[[R0]], %got_ofst($tmp[[T0]]) +; PIC-N32: lw $[[R1:[0-9]+]], %got_page($tmp[[T1:[0-9]+]]) +; PIC-N32: addiu ${{[0-9]+}}, $[[R1]], %got_ofst($tmp[[T1]]) +; STATIC-N32: lui $[[R2:[0-9]+]], %hi($tmp[[T2:[0-9]+]]) +; STATIC-N32: addiu ${{[0-9]+}}, $[[R2]], %lo($tmp[[T2]]) +; STATIC-N32: lui $[[R3:[0-9]+]], %hi($tmp[[T3:[0-9]+]]) +; STATIC-N32: addiu ${{[0-9]+}}, $[[R3]], %lo($tmp[[T3]]) +; PIC-N64: ld $[[R0:[0-9]+]], %got_page($tmp[[T0:[0-9]+]]) +; PIC-N64: daddiu ${{[0-9]+}}, $[[R0]], %got_ofst($tmp[[T0]]) +; PIC-N64: ld $[[R1:[0-9]+]], %got_page($tmp[[T1:[0-9]+]]) +; PIC-N64: daddiu ${{[0-9]+}}, $[[R1]], %got_ofst($tmp[[T1]]) +; STATIC-N64: ld $[[R2:[0-9]+]], %got_page($tmp[[T2:[0-9]+]]) +; STATIC-N64: daddiu ${{[0-9]+}}, $[[R2]], %got_ofst($tmp[[T2]]) +; STATIC-N64: ld $[[R3:[0-9]+]], %got_page($tmp[[T3:[0-9]+]]) +; STATIC-N64: daddiu ${{[0-9]+}}, $[[R3]], %got_ofst($tmp[[T3]]) define void @f() nounwind { entry: %call = tail call i8* @dummy(i8* blockaddress(@f, %baz)) diff --git a/test/CodeGen/Mips/cprestore.ll b/test/CodeGen/Mips/cprestore.ll index a275c8b..57d022f 100644 --- a/test/CodeGen/Mips/cprestore.ll +++ b/test/CodeGen/Mips/cprestore.ll @@ -1,7 +1,9 @@ ; RUN: llc -march=mipsel < %s | FileCheck %s ; CHECK: .set macro +; CHECK: .set at ; CHECK-NEXT: .cprestore +; CHECK: .set noat ; CHECK-NEXT: .set nomacro %struct.S = type { [16384 x i32] } diff --git a/test/CodeGen/Mips/eh.ll b/test/CodeGen/Mips/eh.ll index c3facdb..2e2f9a4 100644 --- a/test/CodeGen/Mips/eh.ll +++ b/test/CodeGen/Mips/eh.ll @@ -26,7 +26,7 @@ entry: lpad: ; preds = %entry ; CHECK-EL: # %lpad ; CHECK-EL: lw $gp -; CHECK-EL: beq $5 +; CHECK-EL: bne $5 %exn.val = landingpad { i8*, i32 } personality i32 (...)* @__gxx_personality_v0 catch i8* bitcast (i8** @_ZTId to i8*) diff --git a/test/CodeGen/Mips/fabs.ll b/test/CodeGen/Mips/fabs.ll new file mode 100644 index 0000000..b296ab3 --- /dev/null +++ b/test/CodeGen/Mips/fabs.ll @@ -0,0 +1,52 @@ +; RUN: llc < %s -march=mipsel -mcpu=mips32 | FileCheck %s -check-prefix=32 +; RUN: llc < %s -march=mipsel -mcpu=mips32r2 | FileCheck %s -check-prefix=32R2 +; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=n64 | FileCheck %s -check-prefix=64 +; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -mattr=n64 | FileCheck %s -check-prefix=64R2 +; RUN: llc < %s -march=mipsel -mcpu=mips32 -enable-no-nans-fp-math | FileCheck %s -check-prefix=NO-NAN + +define float @foo0(float %a) nounwind readnone { +entry: + +; 32: lui $[[T0:[0-9]+]], 32767 +; 32: ori $[[MSK0:[0-9]+]], $[[T0]], 65535 +; 32: and $[[AND:[0-9]+]], ${{[0-9]+}}, $[[MSK0]] +; 32: mtc1 $[[AND]], $f0 + +; 32R2: ins $[[INS:[0-9]+]], $zero, 31, 1 +; 32R2: mtc1 $[[INS]], $f0 + +; NO-NAN: abs.s + + %call = tail call float @fabsf(float %a) nounwind readnone + ret float %call +} + +declare float @fabsf(float) nounwind readnone + +define double @foo1(double %a) nounwind readnone { +entry: + +; 32: lui $[[T0:[0-9]+]], 32767 +; 32: ori $[[MSK0:[0-9]+]], $[[T0]], 65535 +; 32: and $[[AND:[0-9]+]], ${{[0-9]+}}, $[[MSK0]] +; 32: mtc1 $[[AND]], $f1 + +; 32R2: ins $[[INS:[0-9]+]], $zero, 31, 1 +; 32R2: mtc1 $[[INS]], $f1 + +; 64: daddiu $[[T0:[0-9]+]], $zero, 1 +; 64: dsll $[[T1:[0-9]+]], ${{[0-9]+}}, 63 +; 64: daddiu $[[MSK0:[0-9]+]], $[[T1]], -1 +; 64: and $[[AND:[0-9]+]], ${{[0-9]+}}, $[[MSK0]] +; 64: dmtc1 $[[AND]], $f0 + +; 64R2: dins $[[INS:[0-9]+]], $zero, 63, 1 +; 64R2: dmtc1 $[[INS]], $f0 + +; NO-NAN: abs.d + + %call = tail call double @fabs(double %a) nounwind readnone + ret double %call +} + +declare double @fabs(double) nounwind readnone diff --git a/test/CodeGen/Mips/fcopysign-f32-f64.ll b/test/CodeGen/Mips/fcopysign-f32-f64.ll new file mode 100644 index 0000000..b36473d --- /dev/null +++ b/test/CodeGen/Mips/fcopysign-f32-f64.ll @@ -0,0 +1,50 @@ +; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=n64 | FileCheck %s -check-prefix=64 +; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -mattr=n64 | FileCheck %s -check-prefix=64R2 + +declare double @copysign(double, double) nounwind readnone + +declare float @copysignf(float, float) nounwind readnone + +define float @func2(float %d, double %f) nounwind readnone { +entry: +; 64: func2 +; 64: lui $[[T0:[0-9]+]], 32767 +; 64: ori $[[MSK0:[0-9]+]], $[[T0]], 65535 +; 64: and $[[AND0:[0-9]+]], ${{[0-9]+}}, $[[MSK0]] +; 64: dsrl ${{[0-9]+}}, ${{[0-9]+}}, 63 +; 64: sll $[[SLL:[0-9]+]], ${{[0-9]+}}, 31 +; 64: or $[[OR:[0-9]+]], $[[AND0]], $[[SLL]] +; 64: mtc1 $[[OR]], $f0 + +; 64R2: dext ${{[0-9]+}}, ${{[0-9]+}}, 63, 1 +; 64R2: ins $[[INS:[0-9]+]], ${{[0-9]+}}, 31, 1 +; 64R2: mtc1 $[[INS]], $f0 + + %add = fadd float %d, 1.000000e+00 + %conv = fptrunc double %f to float + %call = tail call float @copysignf(float %add, float %conv) nounwind readnone + ret float %call +} + +define double @func3(double %d, float %f) nounwind readnone { +entry: + +; 64: daddiu $[[T0:[0-9]+]], $zero, 1 +; 64: dsll $[[T1:[0-9]+]], $[[T0]], 63 +; 64: daddiu $[[MSK0:[0-9]+]], $[[T1]], -1 +; 64: and $[[AND0:[0-9]+]], ${{[0-9]+}}, $[[MSK0]] +; 64: srl ${{[0-9]+}}, ${{[0-9]+}}, 31 +; 64: dsll $[[DSLL:[0-9]+]], ${{[0-9]+}}, 63 +; 64: or $[[OR:[0-9]+]], $[[AND0]], $[[DSLL]] +; 64: dmtc1 $[[OR]], $f0 + +; 64R2: ext ${{[0-9]+}}, ${{[0-9]+}}, 31, 1 +; 64R2: dins $[[INS:[0-9]+]], ${{[0-9]+}}, 63, 1 +; 64R2: dmtc1 $[[INS]], $f0 + + %add = fadd double %d, 1.000000e+00 + %conv = fpext float %f to double + %call = tail call double @copysign(double %add, double %conv) nounwind readnone + ret double %call +} + diff --git a/test/CodeGen/Mips/fcopysign.ll b/test/CodeGen/Mips/fcopysign.ll index e494fe2..1c57eca 100644 --- a/test/CodeGen/Mips/fcopysign.ll +++ b/test/CodeGen/Mips/fcopysign.ll @@ -1,40 +1,35 @@ -; RUN: llc < %s -march=mipsel | FileCheck %s -check-prefix=MIPS32-EL -; RUN: llc < %s -march=mips | FileCheck %s -check-prefix=MIPS32-EB -; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=n64 | FileCheck %s -check-prefix=MIPS64 +; RUN: llc < %s -march=mipsel -mcpu=mips32 | FileCheck %s -check-prefix=32 +; RUN: llc < %s -march=mipsel -mcpu=mips32r2 | FileCheck %s -check-prefix=32R2 +; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=n64 | FileCheck %s -check-prefix=64 +; RUN: llc < %s -march=mips64el -mcpu=mips64r2 -mattr=n64 | FileCheck %s -check-prefix=64R2 define double @func0(double %d0, double %d1) nounwind readnone { entry: -; MIPS32-EL: func0: -; MIPS32-EL: mfc1 $[[HI0:[0-9]+]], $f15 -; MIPS32-EL: lui $[[MSK1:[0-9]+]], 32768 -; MIPS32-EL: and $[[AND1:[0-9]+]], $[[HI0]], $[[MSK1]] -; MIPS32-EL: lui $[[T0:[0-9]+]], 32767 -; MIPS32-EL: ori $[[MSK0:[0-9]+]], $[[T0]], 65535 -; MIPS32-EL: mfc1 $[[HI1:[0-9]+]], $f13 -; MIPS32-EL: and $[[AND0:[0-9]+]], $[[HI1]], $[[MSK0]] -; MIPS32-EL: or $[[OR:[0-9]+]], $[[AND0]], $[[AND1]] -; MIPS32-EL: mfc1 $[[LO0:[0-9]+]], $f12 -; MIPS32-EL: mtc1 $[[LO0]], $f0 -; MIPS32-EL: mtc1 $[[OR]], $f1 ; -; MIPS32-EB: mfc1 $[[HI1:[0-9]+]], $f14 -; MIPS32-EB: lui $[[MSK1:[0-9]+]], 32768 -; MIPS32-EB: and $[[AND1:[0-9]+]], $[[HI1]], $[[MSK1]] -; MIPS32-EB: lui $[[T0:[0-9]+]], 32767 -; MIPS32-EB: ori $[[MSK0:[0-9]+]], $[[T0]], 65535 -; MIPS32-EB: mfc1 $[[HI0:[0-9]+]], $f12 -; MIPS32-EB: and $[[AND0:[0-9]+]], $[[HI0]], $[[MSK0]] -; MIPS32-EB: or $[[OR:[0-9]+]], $[[AND0]], $[[AND1]] -; MIPS32-EB: mfc1 $[[LO0:[0-9]+]], $f13 -; MIPS32-EB: mtc1 $[[OR]], $f0 -; MIPS32-EB: mtc1 $[[LO0]], $f1 - -; MIPS64: dmfc1 $[[R0:[0-9]+]], $f13 -; MIPS64: and $[[R1:[0-9]+]], $[[R0]], ${{[0-9]+}} -; MIPS64: dmfc1 $[[R2:[0-9]+]], $f12 -; MIPS64: and $[[R3:[0-9]+]], $[[R2]], ${{[0-9]+}} -; MIPS64: or $[[R4:[0-9]+]], $[[R3]], $[[R1]] -; MIPS64: dmtc1 $[[R4]], $f0 +; 32: lui $[[MSK1:[0-9]+]], 32768 +; 32: and $[[AND1:[0-9]+]], ${{[0-9]+}}, $[[MSK1]] +; 32: lui $[[T0:[0-9]+]], 32767 +; 32: ori $[[MSK0:[0-9]+]], $[[T0]], 65535 +; 32: and $[[AND0:[0-9]+]], ${{[0-9]+}}, $[[MSK0]] +; 32: or $[[OR:[0-9]+]], $[[AND0]], $[[AND1]] +; 32: mtc1 $[[OR]], $f1 + +; 32R2: ext $[[EXT:[0-9]+]], ${{[0-9]+}}, 31, 1 +; 32R2: ins $[[INS:[0-9]+]], $[[EXT]], 31, 1 +; 32R2: mtc1 $[[INS]], $f1 + +; 64: daddiu $[[T0:[0-9]+]], $zero, 1 +; 64: dsll $[[MSK1:[0-9]+]], $[[T0]], 63 +; 64: and $[[AND1:[0-9]+]], ${{[0-9]+}}, $[[MSK1]] +; 64: daddiu $[[MSK0:[0-9]+]], $[[MSK1]], -1 +; 64: and $[[AND0:[0-9]+]], ${{[0-9]+}}, $[[MSK0]] +; 64: or $[[OR:[0-9]+]], $[[AND0]], $[[AND1]] +; 64: dmtc1 $[[OR]], $f0 + +; 64R2: dext $[[EXT:[0-9]+]], ${{[0-9]+}}, 63, 1 +; 64R2: dins $[[INS:[0-9]+]], $[[EXT]], 63, 1 +; 64R2: dmtc1 $[[INS]], $f0 + %call = tail call double @copysign(double %d0, double %d1) nounwind readnone ret double %call } @@ -43,18 +38,22 @@ declare double @copysign(double, double) nounwind readnone define float @func1(float %f0, float %f1) nounwind readnone { entry: -; MIPS32-EL: func1: -; MIPS32-EL: mfc1 $[[ARG1:[0-9]+]], $f14 -; MIPS32-EL: lui $[[MSK1:[0-9]+]], 32768 -; MIPS32-EL: and $[[T3:[0-9]+]], $[[ARG1]], $[[MSK1]] -; MIPS32-EL: lui $[[T0:[0-9]+]], 32767 -; MIPS32-EL: ori $[[MSK0:[0-9]+]], $[[T0]], 65535 -; MIPS32-EL: mfc1 $[[ARG0:[0-9]+]], $f12 -; MIPS32-EL: and $[[T2:[0-9]+]], $[[ARG0]], $[[MSK0]] -; MIPS32-EL: or $[[T4:[0-9]+]], $[[T2]], $[[T3]] -; MIPS32-EL: mtc1 $[[T4]], $f0 + +; 32: lui $[[MSK1:[0-9]+]], 32768 +; 32: and $[[AND1:[0-9]+]], ${{[0-9]+}}, $[[MSK1]] +; 32: lui $[[T0:[0-9]+]], 32767 +; 32: ori $[[MSK0:[0-9]+]], $[[T0]], 65535 +; 32: and $[[AND0:[0-9]+]], ${{[0-9]+}}, $[[MSK0]] +; 32: or $[[OR:[0-9]+]], $[[AND0]], $[[AND1]] +; 32: mtc1 $[[OR]], $f0 + +; 32R2: ext $[[EXT:[0-9]+]], ${{[0-9]+}}, 31, 1 +; 32R2: ins $[[INS:[0-9]+]], $[[EXT]], 31, 1 +; 32R2: mtc1 $[[INS]], $f0 + %call = tail call float @copysignf(float %f0, float %f1) nounwind readnone ret float %call } declare float @copysignf(float, float) nounwind readnone + diff --git a/test/CodeGen/Mips/fneg.ll b/test/CodeGen/Mips/fneg.ll new file mode 100644 index 0000000..b322abd --- /dev/null +++ b/test/CodeGen/Mips/fneg.ll @@ -0,0 +1,17 @@ +; RUN: llc < %s -march=mipsel -mcpu=mips32 | FileCheck %s + +define float @foo0(i32 %a, float %d) nounwind readnone { +entry: +; CHECK-NOT: neg.s + %sub = fsub float -0.000000e+00, %d + ret float %sub +} + +define double @foo1(i32 %a, double %d) nounwind readnone { +entry: +; CHECK: foo1 +; CHECK-NOT: neg.d +; CHECK: jr + %sub = fsub double -0.000000e+00, %d + ret double %sub +} diff --git a/test/CodeGen/Mips/fpbr.ll b/test/CodeGen/Mips/fpbr.ll index 0a6478b..a136557 100644 --- a/test/CodeGen/Mips/fpbr.ll +++ b/test/CodeGen/Mips/fpbr.ll @@ -45,7 +45,7 @@ if.end: ; preds = %if.else, %if.then define void @func2(float %f2, float %f3) nounwind { entry: ; CHECK: c.ole.s -; CHECK: bc1f +; CHECK: bc1t %cmp = fcmp ugt float %f2, %f3 br i1 %cmp, label %if.else, label %if.then @@ -102,7 +102,7 @@ if.end: ; preds = %if.else, %if.then define void @func5(double %f2, double %f3) nounwind { entry: ; CHECK: c.ole.d -; CHECK: bc1f +; CHECK: bc1t %cmp = fcmp ugt double %f2, %f3 br i1 %cmp, label %if.else, label %if.then diff --git a/test/CodeGen/Mips/frem.ll b/test/CodeGen/Mips/frem.ll new file mode 100644 index 0000000..be222b2 --- /dev/null +++ b/test/CodeGen/Mips/frem.ll @@ -0,0 +1,13 @@ +; RUN: llc < %s -march=mipsel + +define float @fmods(float %x, float %y) { +entry: + %r = frem float %x, %y + ret float %r +} + +define double @fmodd(double %x, double %y) { +entry: + %r = frem double %x, %y + ret double %r +} diff --git a/test/CodeGen/Mips/global-address.ll b/test/CodeGen/Mips/global-address.ll new file mode 100644 index 0000000..0d49a74 --- /dev/null +++ b/test/CodeGen/Mips/global-address.ll @@ -0,0 +1,46 @@ +; RUN: llc -march=mipsel -relocation-model=pic < %s | FileCheck %s -check-prefix=PIC-O32 +; RUN: llc -march=mipsel -relocation-model=static -mtriple=mipsel-linux-gnu < %s | FileCheck %s -check-prefix=STATIC-O32 +; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=n32 -relocation-model=pic < %s | FileCheck %s -check-prefix=PIC-N32 +; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=n32 -relocation-model=static -mtriple=mipsel-linux-gnu < %s | FileCheck %s -check-prefix=STATIC-N32 +; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=n64 -relocation-model=pic < %s | FileCheck %s -check-prefix=PIC-N64 +; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=n64 -relocation-model=static < %s | FileCheck %s -check-prefix=STATIC-N64 + +@s1 = internal unnamed_addr global i32 8, align 4 +@g1 = external global i32 + +define void @foo() nounwind { +entry: +; PIC-O32: lw $[[R0:[0-9]+]], %got(s1) +; PIC-O32: lw ${{[0-9]+}}, %lo(s1)($[[R0]]) +; PIC-O32: lw ${{[0-9]+}}, %got(g1) +; STATIC-O32: lui $[[R1:[0-9]+]], %hi(s1) +; STATIC-O32: lw ${{[0-9]+}}, %lo(s1)($[[R1]]) +; STATIC-O32: lui $[[R2:[0-9]+]], %hi(g1) +; STATIC-O32: lw ${{[0-9]+}}, %lo(g1)($[[R2]]) + +; PIC-N32: lw $[[R0:[0-9]+]], %got_page(s1) +; PIC-N32: lw ${{[0-9]+}}, %got_ofst(s1)($[[R0]]) +; PIC-N32: lw ${{[0-9]+}}, %got_disp(g1) +; STATIC-N32: lui $[[R1:[0-9]+]], %hi(s1) +; STATIC-N32: lw ${{[0-9]+}}, %lo(s1)($[[R1]]) +; STATIC-N32: lui $[[R2:[0-9]+]], %hi(g1) +; STATIC-N32: lw ${{[0-9]+}}, %lo(g1)($[[R2]]) + +; PIC-N64: ld $[[R0:[0-9]+]], %got_page(s1) +; PIC-N64: lw ${{[0-9]+}}, %got_ofst(s1)($[[R0]]) +; PIC-N64: ld ${{[0-9]+}}, %got_disp(g1) +; STATIC-N64: ld $[[R1:[0-9]+]], %got_page(s1) +; STATIC-N64: lw ${{[0-9]+}}, %got_ofst(s1)($[[R1]]) +; STATIC-N64: ld ${{[0-9]+}}, %got_disp(g1) + + %0 = load i32* @s1, align 4 + tail call void @foo1(i32 %0) nounwind + %1 = load i32* @g1, align 4 + store i32 %1, i32* @s1, align 4 + %add = add nsw i32 %1, 2 + store i32 %add, i32* @g1, align 4 + ret void +} + +declare void @foo1(i32) + diff --git a/test/CodeGen/Mips/lit.local.cfg b/test/CodeGen/Mips/lit.local.cfg index e1cd73a..0587d32 100644 --- a/test/CodeGen/Mips/lit.local.cfg +++ b/test/CodeGen/Mips/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll', '.c', '.cpp'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'Mips' in targets: config.unsupported = True diff --git a/test/CodeGen/Mips/mips64fpldst.ll b/test/CodeGen/Mips/mips64fpldst.ll index abeff09..24647b2 100644 --- a/test/CodeGen/Mips/mips64fpldst.ll +++ b/test/CodeGen/Mips/mips64fpldst.ll @@ -12,7 +12,7 @@ entry: ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(f0) ; CHECK-N64: lwc1 $f{{[0-9]+}}, 0($[[R0]]) ; CHECK-N32: funcfl1 -; CHECK-N32: lw $[[R0:[0-9]+]], %got(f0) +; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(f0) ; CHECK-N32: lwc1 $f{{[0-9]+}}, 0($[[R0]]) %0 = load float* @f0, align 4 ret float %0 @@ -24,7 +24,7 @@ entry: ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(d0) ; CHECK-N64: ldc1 $f{{[0-9]+}}, 0($[[R0]]) ; CHECK-N32: funcfl2 -; CHECK-N32: lw $[[R0:[0-9]+]], %got(d0) +; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(d0) ; CHECK-N32: ldc1 $f{{[0-9]+}}, 0($[[R0]]) %0 = load double* @d0, align 8 ret double %0 @@ -36,7 +36,7 @@ entry: ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(f0) ; CHECK-N64: swc1 $f{{[0-9]+}}, 0($[[R0]]) ; CHECK-N32: funcfs1 -; CHECK-N32: lw $[[R0:[0-9]+]], %got(f0) +; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(f0) ; CHECK-N32: swc1 $f{{[0-9]+}}, 0($[[R0]]) %0 = load float* @f1, align 4 store float %0, float* @f0, align 4 @@ -49,7 +49,7 @@ entry: ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(d0) ; CHECK-N64: sdc1 $f{{[0-9]+}}, 0($[[R0]]) ; CHECK-N32: funcfs2 -; CHECK-N32: lw $[[R0:[0-9]+]], %got(d0) +; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(d0) ; CHECK-N32: sdc1 $f{{[0-9]+}}, 0($[[R0]]) %0 = load double* @d1, align 8 store double %0, double* @d0, align 8 diff --git a/test/CodeGen/Mips/mips64intldst.ll b/test/CodeGen/Mips/mips64intldst.ll index af3a2f8..0e310a8 100644 --- a/test/CodeGen/Mips/mips64intldst.ll +++ b/test/CodeGen/Mips/mips64intldst.ll @@ -16,7 +16,7 @@ entry: ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(c) ; CHECK-N64: lb ${{[0-9]+}}, 0($[[R0]]) ; CHECK-N32: func1 -; CHECK-N32: lw $[[R0:[0-9]+]], %got(c) +; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(c) ; CHECK-N32: lb ${{[0-9]+}}, 0($[[R0]]) %0 = load i8* @c, align 4 %conv = sext i8 %0 to i64 @@ -29,7 +29,7 @@ entry: ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(s) ; CHECK-N64: lh ${{[0-9]+}}, 0($[[R0]]) ; CHECK-N32: func2 -; CHECK-N32: lw $[[R0:[0-9]+]], %got(s) +; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(s) ; CHECK-N32: lh ${{[0-9]+}}, 0($[[R0]]) %0 = load i16* @s, align 4 %conv = sext i16 %0 to i64 @@ -42,7 +42,7 @@ entry: ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(i) ; CHECK-N64: lw ${{[0-9]+}}, 0($[[R0]]) ; CHECK-N32: func3 -; CHECK-N32: lw $[[R0:[0-9]+]], %got(i) +; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(i) ; CHECK-N32: lw ${{[0-9]+}}, 0($[[R0]]) %0 = load i32* @i, align 4 %conv = sext i32 %0 to i64 @@ -55,7 +55,7 @@ entry: ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(l) ; CHECK-N64: ld ${{[0-9]+}}, 0($[[R0]]) ; CHECK-N32: func4 -; CHECK-N32: lw $[[R0:[0-9]+]], %got(l) +; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(l) ; CHECK-N32: ld ${{[0-9]+}}, 0($[[R0]]) %0 = load i64* @l, align 8 ret i64 %0 @@ -67,7 +67,7 @@ entry: ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(uc) ; CHECK-N64: lbu ${{[0-9]+}}, 0($[[R0]]) ; CHECK-N32: ufunc1 -; CHECK-N32: lw $[[R0:[0-9]+]], %got(uc) +; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(uc) ; CHECK-N32: lbu ${{[0-9]+}}, 0($[[R0]]) %0 = load i8* @uc, align 4 %conv = zext i8 %0 to i64 @@ -80,7 +80,7 @@ entry: ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(us) ; CHECK-N64: lhu ${{[0-9]+}}, 0($[[R0]]) ; CHECK-N32: ufunc2 -; CHECK-N32: lw $[[R0:[0-9]+]], %got(us) +; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(us) ; CHECK-N32: lhu ${{[0-9]+}}, 0($[[R0]]) %0 = load i16* @us, align 4 %conv = zext i16 %0 to i64 @@ -93,7 +93,7 @@ entry: ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(ui) ; CHECK-N64: lwu ${{[0-9]+}}, 0($[[R0]]) ; CHECK-N32: ufunc3 -; CHECK-N32: lw $[[R0:[0-9]+]], %got(ui) +; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(ui) ; CHECK-N32: lwu ${{[0-9]+}}, 0($[[R0]]) %0 = load i32* @ui, align 4 %conv = zext i32 %0 to i64 @@ -106,7 +106,7 @@ entry: ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(c) ; CHECK-N64: sb ${{[0-9]+}}, 0($[[R0]]) ; CHECK-N32: sfunc1 -; CHECK-N32: lw $[[R0:[0-9]+]], %got(c) +; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(c) ; CHECK-N32: sb ${{[0-9]+}}, 0($[[R0]]) %0 = load i64* @l1, align 8 %conv = trunc i64 %0 to i8 @@ -120,7 +120,7 @@ entry: ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(s) ; CHECK-N64: sh ${{[0-9]+}}, 0($[[R0]]) ; CHECK-N32: sfunc2 -; CHECK-N32: lw $[[R0:[0-9]+]], %got(s) +; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(s) ; CHECK-N32: sh ${{[0-9]+}}, 0($[[R0]]) %0 = load i64* @l1, align 8 %conv = trunc i64 %0 to i16 @@ -134,7 +134,7 @@ entry: ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(i) ; CHECK-N64: sw ${{[0-9]+}}, 0($[[R0]]) ; CHECK-N32: sfunc3 -; CHECK-N32: lw $[[R0:[0-9]+]], %got(i) +; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(i) ; CHECK-N32: sw ${{[0-9]+}}, 0($[[R0]]) %0 = load i64* @l1, align 8 %conv = trunc i64 %0 to i32 @@ -148,7 +148,7 @@ entry: ; CHECK-N64: ld $[[R0:[0-9]+]], %got_disp(l) ; CHECK-N64: sd ${{[0-9]+}}, 0($[[R0]]) ; CHECK-N32: sfunc4 -; CHECK-N32: lw $[[R0:[0-9]+]], %got(l) +; CHECK-N32: lw $[[R0:[0-9]+]], %got_disp(l) ; CHECK-N32: sd ${{[0-9]+}}, 0($[[R0]]) %0 = load i64* @l1, align 8 store i64 %0, i64* @l, align 8 diff --git a/test/CodeGen/PTX/lit.local.cfg b/test/CodeGen/PTX/lit.local.cfg index 7399089..e748f7f 100644 --- a/test/CodeGen/PTX/lit.local.cfg +++ b/test/CodeGen/PTX/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll', '.c', '.cpp'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'PTX' in targets: config.unsupported = True diff --git a/test/CodeGen/PowerPC/a2-fp-basic.ll b/test/CodeGen/PowerPC/a2-fp-basic.ll new file mode 100644 index 0000000..932ad7a --- /dev/null +++ b/test/CodeGen/PowerPC/a2-fp-basic.ll @@ -0,0 +1,33 @@ +; RUN: llc < %s -march=ppc64 -mcpu=a2 | FileCheck %s + +%0 = type { double, double } + +define void @maybe_an_fma(%0* sret %agg.result, %0* byval %a, %0* byval %b, %0* byval %c) nounwind { +entry: + %a.realp = getelementptr inbounds %0* %a, i32 0, i32 0 + %a.real = load double* %a.realp + %a.imagp = getelementptr inbounds %0* %a, i32 0, i32 1 + %a.imag = load double* %a.imagp + %b.realp = getelementptr inbounds %0* %b, i32 0, i32 0 + %b.real = load double* %b.realp + %b.imagp = getelementptr inbounds %0* %b, i32 0, i32 1 + %b.imag = load double* %b.imagp + %mul.rl = fmul double %a.real, %b.real + %mul.rr = fmul double %a.imag, %b.imag + %mul.r = fsub double %mul.rl, %mul.rr + %mul.il = fmul double %a.imag, %b.real + %mul.ir = fmul double %a.real, %b.imag + %mul.i = fadd double %mul.il, %mul.ir + %c.realp = getelementptr inbounds %0* %c, i32 0, i32 0 + %c.real = load double* %c.realp + %c.imagp = getelementptr inbounds %0* %c, i32 0, i32 1 + %c.imag = load double* %c.imagp + %add.r = fadd double %mul.r, %c.real + %add.i = fadd double %mul.i, %c.imag + %real = getelementptr inbounds %0* %agg.result, i32 0, i32 0 + %imag = getelementptr inbounds %0* %agg.result, i32 0, i32 1 + store double %add.r, double* %real + store double %add.i, double* %imag + ret void +; CHECK: fmadd +} diff --git a/test/CodeGen/PowerPC/lit.local.cfg b/test/CodeGen/PowerPC/lit.local.cfg index 5c7f267..4019eca 100644 --- a/test/CodeGen/PowerPC/lit.local.cfg +++ b/test/CodeGen/PowerPC/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll', '.c', '.cpp'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'PowerPC' in targets: config.unsupported = True diff --git a/test/CodeGen/PowerPC/ppc-vaarg-agg.ll b/test/CodeGen/PowerPC/ppc-vaarg-agg.ll new file mode 100644 index 0000000..d5ea044 --- /dev/null +++ b/test/CodeGen/PowerPC/ppc-vaarg-agg.ll @@ -0,0 +1,46 @@ +target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32" +target triple = "powerpc-montavista-linux-gnuspe" +; RUN: llc < %s -march=ppc32 | FileCheck %s + +%struct.__va_list_tag.0.9.18.23.32.41.48.55.62.67.72.77.82.87.90.93.96.101.105 = type { i8, i8, i16, i8*, i8* } + +define fastcc void @test1(%struct.__va_list_tag.0.9.18.23.32.41.48.55.62.67.72.77.82.87.90.93.96.101.105* %args) { +entry: + br i1 undef, label %repeat, label %maxlen_reached + +repeat: ; preds = %entry + switch i32 undef, label %sw.bb323 [ + i32 77, label %sw.bb72 + i32 111, label %sw.bb309 + i32 80, label %sw.bb313 + i32 117, label %sw.bb326 + i32 88, label %sw.bb321 + ] + +sw.bb72: ; preds = %repeat + unreachable + +sw.bb309: ; preds = %repeat + unreachable + +sw.bb313: ; preds = %repeat + unreachable + +sw.bb321: ; preds = %repeat + unreachable + +sw.bb323: ; preds = %repeat + %0 = va_arg %struct.__va_list_tag.0.9.18.23.32.41.48.55.62.67.72.77.82.87.90.93.96.101.105* %args, i32 + unreachable + +sw.bb326: ; preds = %repeat + unreachable + +maxlen_reached: ; preds = %entry + ret void +} + +; If the SD nodes are not cleaup up correctly, then this can fail to compile +; with an error like: Cannot select: ch = setlt [ID=6] +; CHECK: @test1 + diff --git a/test/CodeGen/PowerPC/ppc64-prefetch.ll b/test/CodeGen/PowerPC/ppc64-prefetch.ll new file mode 100644 index 0000000..b2f3709 --- /dev/null +++ b/test/CodeGen/PowerPC/ppc64-prefetch.ll @@ -0,0 +1,15 @@ +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" +; RUN: llc < %s | FileCheck %s + +define void @test1(i8* %a, ...) nounwind { +entry: + call void @llvm.prefetch(i8* %a, i32 0, i32 3, i32 1) + ret void +} + +declare void @llvm.prefetch(i8*, i32, i32, i32) + +; CHECK: @test1 +; CHECK: dcbt + diff --git a/test/CodeGen/PowerPC/ppc64-vaarg-int.ll b/test/CodeGen/PowerPC/ppc64-vaarg-int.ll new file mode 100644 index 0000000..5a63b01 --- /dev/null +++ b/test/CodeGen/PowerPC/ppc64-vaarg-int.ll @@ -0,0 +1,20 @@ +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" +; RUN: llc < %s | FileCheck %s + +define i32 @intvaarg(i32 %a, ...) nounwind { +entry: + %va = alloca i8*, align 8 + %va1 = bitcast i8** %va to i8* + call void @llvm.va_start(i8* %va1) + %0 = va_arg i8** %va, i32 + %sub = sub nsw i32 %a, %0 + ret i32 %sub +} + +declare void @llvm.va_start(i8*) nounwind + +; CHECK: @intvaarg +; Make sure that the va pointer is incremented by 8 (not 4). +; CHECK: addi{{.*}}, 8 + diff --git a/test/CodeGen/SPARC/lit.local.cfg b/test/CodeGen/SPARC/lit.local.cfg index ba81a16..786fee9 100644 --- a/test/CodeGen/SPARC/lit.local.cfg +++ b/test/CodeGen/SPARC/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll', '.c', '.cpp'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'Sparc' in targets: config.unsupported = True diff --git a/test/CodeGen/Thumb/lit.local.cfg b/test/CodeGen/Thumb/lit.local.cfg index dd6c50d..cb77b09 100644 --- a/test/CodeGen/Thumb/lit.local.cfg +++ b/test/CodeGen/Thumb/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll', '.c', '.cpp'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'ARM' in targets: config.unsupported = True diff --git a/test/CodeGen/Thumb2/crash.ll b/test/CodeGen/Thumb2/crash.ll index d8b51ec..cb4d080 100644 --- a/test/CodeGen/Thumb2/crash.ll +++ b/test/CodeGen/Thumb2/crash.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 +; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a8 -verify-machineinstrs target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32" target triple = "thumbv7-apple-darwin10" @@ -47,3 +47,32 @@ bb2: ; preds = %bb tail call void @llvm.arm.neon.vst4.v4i32(i8* bitcast ([16 x i32]* @dbuf to i8*), <4 x i32> %2, <4 x i32> %3, <4 x i32> %4, <4 x i32> %5, i32 1) nounwind ret i32 0 } + +; PR12389 +; Make sure the DPair register class can spill. +define void @pr12389(i8* %p) nounwind ssp { +entry: + %vld1 = tail call <4 x float> @llvm.arm.neon.vld1.v4f32(i8* %p, i32 1) + tail call void asm sideeffect "", "~{q0},~{q1},~{q2},~{q3},~{q4},~{q5},~{q6},~{q7},~{q8},~{q9},~{q10},~{q11},~{q12},~{q13},~{q14},~{q15}"() nounwind + tail call void @llvm.arm.neon.vst1.v4f32(i8* %p, <4 x float> %vld1, i32 1) + ret void +} + +declare <4 x float> @llvm.arm.neon.vld1.v4f32(i8*, i32) nounwind readonly + +declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>, i32) nounwind + +; <rdar://problem/11101911> +; When an strd is expanded into two str instructions, make sure the first str +; doesn't kill the base register. This can happen if the base register is the +; same as the data register. +%class = type { i8*, %class*, i32 } +define void @f11101911(%class* %this, i32 %num) ssp align 2 { +entry: + %p1 = getelementptr inbounds %class* %this, i32 0, i32 1 + %p2 = getelementptr inbounds %class* %this, i32 0, i32 2 + tail call void asm sideeffect "", "~{r1},~{r3},~{r5},~{r11},~{r13}"() nounwind + store %class* %this, %class** %p1, align 4 + store i32 %num, i32* %p2, align 4 + ret void +} diff --git a/test/CodeGen/Thumb2/lit.local.cfg b/test/CodeGen/Thumb2/lit.local.cfg index dd6c50d..cb77b09 100644 --- a/test/CodeGen/Thumb2/lit.local.cfg +++ b/test/CodeGen/Thumb2/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll', '.c', '.cpp'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'ARM' in targets: config.unsupported = True diff --git a/test/CodeGen/Thumb2/lsr-deficiency.ll b/test/CodeGen/Thumb2/lsr-deficiency.ll index 9ff114e..9aaa821 100644 --- a/test/CodeGen/Thumb2/lsr-deficiency.ll +++ b/test/CodeGen/Thumb2/lsr-deficiency.ll @@ -3,11 +3,6 @@ ; This now reduces to a single induction variable. -; TODO: It still gets a GPR shuffle at the end of the loop -; This is because something in instruction selection has decided -; that comparing the pre-incremented value with zero is better -; than comparing the post-incremented value with -4. - @G = external global i32 ; <i32*> [#uses=2] @array = external global i32* ; <i32**> [#uses=1] @@ -20,9 +15,9 @@ entry: bb: ; preds = %bb, %entry ; CHECK: LBB0_1: -; CHECK: cmp [[R2:r[0-9]+]], #0 -; CHECK: sub{{(.w)?}} [[REGISTER:(r[0-9]+)|(lr)]], [[R2]], #1 -; CHECK: mov [[R2]], [[REGISTER]] +; CHECK: subs [[R2:r[0-9]+]], #1 +; CHECK: cmp.w [[R2]], #-1 +; CHECK: bne LBB0_1 %0 = phi i32 [ %.pre, %entry ], [ %3, %bb ] ; <i32> [#uses=1] %indvar = phi i32 [ 0, %entry ], [ %indvar.next, %bb ] ; <i32> [#uses=2] diff --git a/test/CodeGen/Thumb2/thumb2-branch.ll b/test/CodeGen/Thumb2/thumb2-branch.ll index 27d8e8f..f1c097c 100644 --- a/test/CodeGen/Thumb2/thumb2-branch.ll +++ b/test/CodeGen/Thumb2/thumb2-branch.ll @@ -58,8 +58,8 @@ define i32 @f4(i32 %a, i32 %b, i32* %v) { entry: ; CHECK: f4: ; CHECK: blo LBB - %tmp = icmp ult i32 %a, %b ; <i1> [#uses=1] - br i1 %tmp, label %return, label %cond_true + %tmp = icmp uge i32 %a, %b ; <i1> [#uses=1] + br i1 %tmp, label %cond_true, label %return cond_true: ; preds = %entry fence seq_cst diff --git a/test/CodeGen/Thumb2/thumb2-ifcvt2.ll b/test/CodeGen/Thumb2/thumb2-ifcvt2.ll index f577f79..5aa9a73 100644 --- a/test/CodeGen/Thumb2/thumb2-ifcvt2.ll +++ b/test/CodeGen/Thumb2/thumb2-ifcvt2.ll @@ -29,13 +29,13 @@ declare i32 @bar(...) define fastcc i32 @CountTree(%struct.quad_struct* %tree) { entry: ; CHECK: CountTree: -; CHECK: it eq -; CHECK: cmpeq -; CHECK: bne -; CHECK: cmp ; CHECK: itt eq ; CHECK: moveq ; CHECK: popeq +; CHECK: bne +; CHECK: cmp +; CHECK: it eq +; CHECK: cmpeq br label %tailrecurse tailrecurse: ; preds = %bb, %entry @@ -83,7 +83,7 @@ define fastcc void @t2() nounwind { entry: ; CHECK: t2: ; CHECK: cmp r0, #0 -; CHECK: beq +; CHECK: %growMapping.exit br i1 undef, label %bb.i.i3, label %growMapping.exit bb.i.i3: ; preds = %entry diff --git a/test/CodeGen/Thumb2/thumb2-jtb.ll b/test/CodeGen/Thumb2/thumb2-jtb.ll index f5a56e5..7e1655f 100644 --- a/test/CodeGen/Thumb2/thumb2-jtb.ll +++ b/test/CodeGen/Thumb2/thumb2-jtb.ll @@ -3,11 +3,19 @@ ; Do not use tbb / tbh if any destination is before the jumptable. ; rdar://7102917 -define i16 @main__getopt_internal_2E_exit_2E_ce(i32) nounwind { +define i16 @main__getopt_internal_2E_exit_2E_ce(i32, i1 %b) nounwind { +entry: + br i1 %b, label %codeRepl127.exitStub, label %newFuncRoot + newFuncRoot: br label %_getopt_internal.exit.ce codeRepl127.exitStub: ; preds = %_getopt_internal.exit.ce + ; Add an explicit edge back to before the jump table to ensure this block + ; is placed first. + br i1 %b, label %newFuncRoot, label %codeRepl127.exitStub.exit + +codeRepl127.exitStub.exit: ret i16 0 parse_options.exit.loopexit.exitStub: ; preds = %_getopt_internal.exit.ce diff --git a/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll b/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll index 88e8b4a..d583e59 100644 --- a/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll +++ b/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll @@ -6,8 +6,8 @@ define i32 @test(i32 %argc, i8** %argv) nounwind { entry: ; CHECK: cmpl $2 -; CHECK-NEXT: je -; CHECK-NEXT: %entry +; CHECK-NEXT: jne +; CHECK-NEXT: %bb2 switch i32 %argc, label %UnifiedReturnBlock [ i32 1, label %bb diff --git a/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll b/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll index a708224..4160b20 100644 --- a/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll +++ b/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -enable-unsafe-fp-math -march=x86 | grep jnp +; RUN: llc < %s -enable-unsafe-fp-math -march=x86 | grep jp ; rdar://5902801 declare void @test2() diff --git a/test/CodeGen/X86/2010-06-28-DbgEntryPC.ll b/test/CodeGen/X86/2010-06-28-DbgEntryPC.ll deleted file mode 100644 index 628790c..0000000 --- a/test/CodeGen/X86/2010-06-28-DbgEntryPC.ll +++ /dev/null @@ -1,108 +0,0 @@ -; RUN: llc -O2 -mtriple=i386-apple-darwin <%s | FileCheck %s -; Use DW_FORM_addr for DW_AT_entry_pc. -; Radar 8094785 - -; CHECK: .byte 17 ## DW_TAG_compile_unit -; CHECK-NEXT: .byte 1 ## DW_CHILDREN_yes -; CHECK-NEXT: .byte 37 ## DW_AT_producer -; CHECK-NEXT: .byte 14 ## DW_FORM_strp -; CHECK-NEXT: .byte 19 ## DW_AT_language -; CHECK-NEXT: .byte 5 ## DW_FORM_data2 -; CHECK-NEXT: .byte 3 ## DW_AT_name -; CHECK-NEXT: .byte 14 ## DW_FORM_strp -; CHECK-NEXT: .byte 82 ## DW_AT_entry_pc -; CHECK-NEXT: .byte 1 ## DW_FORM_addr -; CHECK-NEXT: .byte 16 ## DW_AT_stmt_list -; CHECK-NEXT: .byte 6 ## DW_FORM_data4 -; CHECK-NEXT: .byte 27 ## DW_AT_comp_dir -; CHECK-NEXT: .byte 14 ## DW_FORM_strp -; CHECK-NEXT: .ascii "\341\177" ## DW_AT_APPLE_optimized - -%struct.a = type { i32, %struct.a* } - -@ret = common global i32 0 ; <i32*> [#uses=2] - -define void @foo(i32 %x) nounwind noinline ssp { -entry: - tail call void @llvm.dbg.value(metadata !{i32 %x}, i64 0, metadata !21), !dbg !28 - store i32 %x, i32* @ret, align 4, !dbg !29 - ret void, !dbg !31 -} - -declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone - -declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone - -define i8* @bar(%struct.a* %b) nounwind noinline ssp { -entry: - tail call void @llvm.dbg.value(metadata !{%struct.a* %b}, i64 0, metadata !22), !dbg !32 - %0 = getelementptr inbounds %struct.a* %b, i64 0, i32 0, !dbg !33 ; <i32*> [#uses=1] - %1 = load i32* %0, align 8, !dbg !33 ; <i32> [#uses=1] - tail call void @foo(i32 %1) nounwind noinline ssp, !dbg !33 - %2 = bitcast %struct.a* %b to i8*, !dbg !35 ; <i8*> [#uses=1] - ret i8* %2, !dbg !35 -} - -define i32 @main(i32 %argc, i8** nocapture %argv) nounwind ssp { -entry: - %e = alloca %struct.a, align 8 ; <%struct.a*> [#uses=4] - call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !23), !dbg !36 - call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !24), !dbg !36 - call void @llvm.dbg.declare(metadata !{%struct.a* %e}, metadata !25), !dbg !37 - %0 = getelementptr inbounds %struct.a* %e, i64 0, i32 0, !dbg !38 ; <i32*> [#uses=1] - store i32 4, i32* %0, align 8, !dbg !38 - %1 = getelementptr inbounds %struct.a* %e, i64 0, i32 1, !dbg !39 ; <%struct.a**> [#uses=1] - store %struct.a* %e, %struct.a** %1, align 8, !dbg !39 - %2 = call i8* @bar(%struct.a* %e) nounwind noinline ssp, !dbg !40 ; <i8*> [#uses=0] - %3 = load i32* @ret, align 4, !dbg !41 ; <i32> [#uses=1] - ret i32 %3, !dbg !41 -} - -!llvm.dbg.sp = !{!0, !6, !15} -!llvm.dbg.lv.foo = !{!21} -!llvm.dbg.lv.bar = !{!22} -!llvm.dbg.lv.main = !{!23, !24, !25} -!llvm.dbg.gv = !{!27} - -!0 = metadata !{i32 524334, i32 0, metadata !1, metadata !"foo", metadata !"foo", metadata !"foo", metadata !1, i32 34, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 true, void (i32)* @foo} ; [ DW_TAG_subprogram ] -!1 = metadata !{i32 524329, metadata !"2010-06-28-DbgEntryPC.c", metadata !"/Users/yash/clean/llvm/test/FrontendC", metadata !2} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 524305, i32 0, i32 1, metadata !"2010-06-28-DbgEntryPC.c", metadata !"/Users/yash/clean/llvm/test/FrontendC", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!3 = metadata !{i32 524309, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ] -!4 = metadata !{null, metadata !5} -!5 = metadata !{i32 524324, metadata !1, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] -!6 = metadata !{i32 524334, i32 0, metadata !1, metadata !"bar", metadata !"bar", metadata !"bar", metadata !1, i32 38, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 true, i8* (%struct.a*)* @bar} ; [ DW_TAG_subprogram ] -!7 = metadata !{i32 524309, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, null} ; [ DW_TAG_subroutine_type ] -!8 = metadata !{metadata !9, metadata !10} -!9 = metadata !{i32 524303, metadata !1, metadata !"", metadata !1, i32 0, i64 64, i64 64, i64 0, i32 0, null} ; [ DW_TAG_pointer_type ] -!10 = metadata !{i32 524303, metadata !1, metadata !"", metadata !1, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !11} ; [ DW_TAG_pointer_type ] -!11 = metadata !{i32 524307, metadata !1, metadata !"a", metadata !1, i32 23, i64 128, i64 64, i64 0, i32 0, null, metadata !12, i32 0, null} ; [ DW_TAG_structure_type ] -!12 = metadata !{metadata !13, metadata !14} -!13 = metadata !{i32 524301, metadata !11, metadata !"c", metadata !1, i32 24, i64 32, i64 32, i64 0, i32 0, metadata !5} ; [ DW_TAG_member ] -!14 = metadata !{i32 524301, metadata !11, metadata !"d", metadata !1, i32 25, i64 64, i64 64, i64 64, i32 0, metadata !10} ; [ DW_TAG_member ] -!15 = metadata !{i32 524334, i32 0, metadata !1, metadata !"main", metadata !"main", metadata !"main", metadata !1, i32 43, metadata !16, i1 false, i1 true, i32 0, i32 0, null, i1 false, i1 true, i32 (i32, i8**)* @main} ; [ DW_TAG_subprogram ] -!16 = metadata !{i32 524309, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !17, i32 0, null} ; [ DW_TAG_subroutine_type ] -!17 = metadata !{metadata !5, metadata !5, metadata !18} -!18 = metadata !{i32 524303, metadata !1, metadata !"", metadata !1, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !19} ; [ DW_TAG_pointer_type ] -!19 = metadata !{i32 524303, metadata !1, metadata !"", metadata !1, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !20} ; [ DW_TAG_pointer_type ] -!20 = metadata !{i32 524324, metadata !1, metadata !"char", metadata !1, i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ] -!21 = metadata !{i32 524545, metadata !0, metadata !"x", metadata !1, i32 33, metadata !5} ; [ DW_TAG_arg_variable ] -!22 = metadata !{i32 524545, metadata !6, metadata !"b", metadata !1, i32 38, metadata !10} ; [ DW_TAG_arg_variable ] -!23 = metadata !{i32 524545, metadata !15, metadata !"argc", metadata !1, i32 43, metadata !5} ; [ DW_TAG_arg_variable ] -!24 = metadata !{i32 524545, metadata !15, metadata !"argv", metadata !1, i32 43, metadata !18} ; [ DW_TAG_arg_variable ] -!25 = metadata !{i32 524544, metadata !26, metadata !"e", metadata !1, i32 44, metadata !11} ; [ DW_TAG_auto_variable ] -!26 = metadata !{i32 524299, metadata !15, i32 43, i32 0} ; [ DW_TAG_lexical_block ] -!27 = metadata !{i32 524340, i32 0, metadata !1, metadata !"ret", metadata !"ret", metadata !"", metadata !1, i32 28, metadata !5, i1 false, i1 true, i32* @ret} ; [ DW_TAG_variable ] -!28 = metadata !{i32 33, i32 0, metadata !0, null} -!29 = metadata !{i32 35, i32 0, metadata !30, null} -!30 = metadata !{i32 524299, metadata !0, i32 34, i32 0} ; [ DW_TAG_lexical_block ] -!31 = metadata !{i32 36, i32 0, metadata !30, null} -!32 = metadata !{i32 38, i32 0, metadata !6, null} -!33 = metadata !{i32 39, i32 0, metadata !34, null} -!34 = metadata !{i32 524299, metadata !6, i32 38, i32 0} ; [ DW_TAG_lexical_block ] -!35 = metadata !{i32 40, i32 0, metadata !34, null} -!36 = metadata !{i32 43, i32 0, metadata !15, null} -!37 = metadata !{i32 44, i32 0, metadata !26, null} -!38 = metadata !{i32 45, i32 0, metadata !26, null} -!39 = metadata !{i32 46, i32 0, metadata !26, null} -!40 = metadata !{i32 48, i32 0, metadata !26, null} -!41 = metadata !{i32 49, i32 0, metadata !26, null} diff --git a/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll b/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll index 1919d2e..12a8274 100644 --- a/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll +++ b/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll @@ -17,7 +17,7 @@ entry: ; CHECK: andl $150 ; CHECK-NEXT: testb -; CHECK-NEXT: jg +; CHECK-NEXT: jle entry.if.end_crit_edge: ; preds = %entry %tmp4.pre = load i32* @g_38 ; <i32> [#uses=1] diff --git a/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll b/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll index a1074b6..6d54c7e 100644 --- a/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll +++ b/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -march=x86 -mattr=+cmov | FileCheck %s ; Both values were being zero extended. @u = external global i8 @s = external global i8 diff --git a/test/CodeGen/X86/2011-09-14-valcoalesce.ll b/test/CodeGen/X86/2011-09-14-valcoalesce.ll index 1068d1b..a5ec614 100644 --- a/test/CodeGen/X86/2011-09-14-valcoalesce.ll +++ b/test/CodeGen/X86/2011-09-14-valcoalesce.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -march=x86 | FileCheck %s +; RUN: llc < %s -march=x86 -disable-code-place | FileCheck %s ; ; Test RegistersDefinedFromSameValue. We have multiple copies of the same vreg: ; while.body85.i: diff --git a/test/CodeGen/X86/2011-10-27-tstore.ll b/test/CodeGen/X86/2011-10-27-tstore.ll index 016e02c..6e83f67 100644 --- a/test/CodeGen/X86/2011-10-27-tstore.ll +++ b/test/CodeGen/X86/2011-10-27-tstore.ll @@ -3,14 +3,14 @@ target triple = "x86_64-unknown-linux-gnu" ;CHECK: ltstore -;CHECK: pshufd -;CHECK: pshufd +;CHECK: movq +;CHECK: movq ;CHECK: ret -define void @ltstore() { +define void @ltstore(<4 x i32>* %pA, <2 x i32>* %pB) { entry: - %in = load <4 x i32>* undef + %in = load <4 x i32>* %pA %j = shufflevector <4 x i32> %in, <4 x i32> undef, <2 x i32> <i32 0, i32 1> - store <2 x i32> %j, <2 x i32>* undef + store <2 x i32> %j, <2 x i32>* %pB ret void } diff --git a/test/CodeGen/X86/2012-02-20-MachineCPBug.ll b/test/CodeGen/X86/2012-02-20-MachineCPBug.ll index 3013f16..557d49d 100644 --- a/test/CodeGen/X86/2012-02-20-MachineCPBug.ll +++ b/test/CodeGen/X86/2012-02-20-MachineCPBug.ll @@ -52,7 +52,8 @@ for.body9.lr.ph.i: ; preds = %if.end.i, %for.cond for.body9.i: ; preds = %for.body9.i, %for.body9.lr.ph.i ; CHECK: %for.body9.i -; CHECK: movb %al, %ch +; CHECK: movb +; CHECK: shrdl %i6.02.i = phi i32 [ 0, %for.body9.lr.ph.i ], [ %inc21.i, %for.body9.i ] %add10.i = add i32 %i6.02.i, %div.i %arrayidx12.i = getelementptr inbounds i64* %.pre.i, i32 %add10.i diff --git a/test/CodeGen/X86/2012-03-26-PostRALICMBug.ll b/test/CodeGen/X86/2012-03-26-PostRALICMBug.ll new file mode 100644 index 0000000..101ecca --- /dev/null +++ b/test/CodeGen/X86/2012-03-26-PostRALICMBug.ll @@ -0,0 +1,59 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -stats |& \ +; RUN: not grep {Number of machine instructions hoisted out of loops post regalloc} + +; rdar://11095580 + +%struct.ref_s = type { %union.color_sample, i16, i16 } +%union.color_sample = type { i64 } + +@table = external global [3891 x i64] + +declare i32 @foo() + +define i32 @zarray(%struct.ref_s* nocapture %op) nounwind ssp { +entry: + %call = tail call i32 @foo() + %tmp = ashr i32 %call, 31 + %0 = and i32 %tmp, 1396 + %index9 = add i32 %0, 2397 + indirectbr i8* undef, [label %return, label %if.end] + +if.end: ; preds = %entry + %size5 = getelementptr inbounds %struct.ref_s* %op, i64 0, i32 2 + %tmp6 = load i16* %size5, align 2 + %tobool1 = icmp eq i16 %tmp6, 0 + %1 = select i1 %tobool1, i32 1396, i32 -1910 + %index10 = add i32 %index9, %1 + indirectbr i8* undef, [label %return, label %while.body.lr.ph] + +while.body.lr.ph: ; preds = %if.end + %refs = bitcast %struct.ref_s* %op to %struct.ref_s** + %tmp9 = load %struct.ref_s** %refs, align 8 + %tmp4 = zext i16 %tmp6 to i64 + %index13 = add i32 %index10, 1658 + %2 = sext i32 %index13 to i64 + %3 = getelementptr [3891 x i64]* @table, i64 0, i64 %2 + %blockaddress14 = load i64* %3, align 8 + %4 = inttoptr i64 %blockaddress14 to i8* + indirectbr i8* %4, [label %while.body] + +while.body: ; preds = %while.body, %while.body.lr.ph + %index7 = phi i32 [ %index15, %while.body ], [ %index13, %while.body.lr.ph ] + %indvar = phi i64 [ %indvar.next, %while.body ], [ 0, %while.body.lr.ph ] + %type_attrs = getelementptr %struct.ref_s* %tmp9, i64 %indvar, i32 1 + store i16 32, i16* %type_attrs, align 2 + %indvar.next = add i64 %indvar, 1 + %exitcond5 = icmp eq i64 %indvar.next, %tmp4 + %tmp7 = select i1 %exitcond5, i32 1648, i32 0 + %index15 = add i32 %index7, %tmp7 + %tmp8 = select i1 %exitcond5, i64 13, i64 0 + %5 = sext i32 %index15 to i64 + %6 = getelementptr [3891 x i64]* @table, i64 0, i64 %5 + %blockaddress16 = load i64* %6, align 8 + %7 = inttoptr i64 %blockaddress16 to i8* + indirectbr i8* %7, [label %return, label %while.body] + +return: ; preds = %while.body, %if.end, %entry + %retval.0 = phi i32 [ %call, %entry ], [ 0, %if.end ], [ 0, %while.body ] + ret i32 %retval.0 +} diff --git a/test/CodeGen/X86/2012-04-09-TwoAddrPassBug.ll b/test/CodeGen/X86/2012-04-09-TwoAddrPassBug.ll new file mode 100644 index 0000000..2d90165 --- /dev/null +++ b/test/CodeGen/X86/2012-04-09-TwoAddrPassBug.ll @@ -0,0 +1,34 @@ +; RUN: llc -O1 -verify-coalescing < %s +; PR12495 +target datalayout = +"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +target triple = "x86_64-apple-macosx10.7.0" + +define void @func(i8* nocapture) nounwind uwtable ssp align 2 { + br i1 undef, label %4, label %2 + +; <label>:2 ; preds = %1 + %3 = tail call double @foo() nounwind + br label %4 + +; <label>:4 ; preds = %2, %1 + %5 = phi double [ %3, %2 ], [ 0.000000e+00, %1 ] + %6 = fsub double %5, undef + %7 = fcmp olt double %6, 0.000000e+00 + %8 = select i1 %7, double 0.000000e+00, double %6 + %9 = fcmp olt double undef, 0.000000e+00 + %10 = fcmp olt double %8, undef + %11 = or i1 %9, %10 + br i1 %11, label %12, label %14 + +; <label>:12 ; preds = %4 + %13 = tail call double @fmod(double %8, double 0.000000e+00) nounwind + unreachable + +; <label>:14 ; preds = %4 + ret void +} + +declare double @foo() + +declare double @fmod(double, double) diff --git a/test/CodeGen/X86/GC/lit.local.cfg b/test/CodeGen/X86/GC/lit.local.cfg index b05ed3c..a8ad0f1 100644 --- a/test/CodeGen/X86/GC/lit.local.cfg +++ b/test/CodeGen/X86/GC/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll', '.c', '.cpp'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'X86' in targets: config.unsupported = True diff --git a/test/CodeGen/X86/SwizzleShuff.ll b/test/CodeGen/X86/SwizzleShuff.ll new file mode 100644 index 0000000..100817a --- /dev/null +++ b/test/CodeGen/X86/SwizzleShuff.ll @@ -0,0 +1,68 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s + +; Check that we perform a scalar XOR on i32. + +; CHECK: pull_bitcast +; CHECK: xorl +; CHECK: ret +define void @pull_bitcast (<4 x i8>* %pA, <4 x i8>* %pB) { + %A = load <4 x i8>* %pA + %B = load <4 x i8>* %pB + %C = xor <4 x i8> %A, %B + store <4 x i8> %C, <4 x i8>* %pA + ret void +} + +; CHECK: multi_use_swizzle +; CHECK: mov +; CHECK-NEXT: shuf +; CHECK-NEXT: shuf +; CHECK-NEXT: shuf +; CHECK-NEXT: xor +; CHECK-NEXT: ret +define <4 x i32> @multi_use_swizzle (<4 x i32>* %pA, <4 x i32>* %pB) { + %A = load <4 x i32>* %pA + %B = load <4 x i32>* %pB + %S = shufflevector <4 x i32> %A, <4 x i32> %B, <4 x i32> <i32 1, i32 1, i32 5, i32 6> + %S1 = shufflevector <4 x i32> %S, <4 x i32> undef, <4 x i32> <i32 1, i32 3, i32 2, i32 2> + %S2 = shufflevector <4 x i32> %S, <4 x i32> undef, <4 x i32> <i32 2, i32 1, i32 0, i32 2> + %R = xor <4 x i32> %S1, %S2 + ret <4 x i32> %R +} + +; CHECK: pull_bitcast2 +; CHECK: xorl +; CHECK: ret +define <4 x i8> @pull_bitcast2 (<4 x i8>* %pA, <4 x i8>* %pB, <4 x i8>* %pC) { + %A = load <4 x i8>* %pA + store <4 x i8> %A, <4 x i8>* %pC + %B = load <4 x i8>* %pB + %C = xor <4 x i8> %A, %B + store <4 x i8> %C, <4 x i8>* %pA + ret <4 x i8> %C +} + + + +; CHECK: reverse_1 +; CHECK-NOT: shuf +; CHECK: ret +define <4 x i32> @reverse_1 (<4 x i32>* %pA, <4 x i32>* %pB) { + %A = load <4 x i32>* %pA + %B = load <4 x i32>* %pB + %S = shufflevector <4 x i32> %A, <4 x i32> %B, <4 x i32> <i32 1, i32 0, i32 3, i32 2> + %S1 = shufflevector <4 x i32> %S, <4 x i32> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2> + ret <4 x i32> %S1 +} + + +; CHECK: no_reverse_shuff +; CHECK: shuf +; CHECK: ret +define <4 x i32> @no_reverse_shuff (<4 x i32>* %pA, <4 x i32>* %pB) { + %A = load <4 x i32>* %pA + %B = load <4 x i32>* %pB + %S = shufflevector <4 x i32> %A, <4 x i32> %B, <4 x i32> <i32 1, i32 0, i32 3, i32 2> + %S1 = shufflevector <4 x i32> %S, <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 3, i32 2> + ret <4 x i32> %S1 +} diff --git a/test/CodeGen/X86/atom-sched.ll b/test/CodeGen/X86/atom-sched.ll index 2301dfc..4dd9a9e 100644 --- a/test/CodeGen/X86/atom-sched.ll +++ b/test/CodeGen/X86/atom-sched.ll @@ -1,5 +1,9 @@ +; XFAIL: * ; RUN: llc <%s -O2 -mcpu=atom -march=x86 -relocation-model=static | FileCheck -check-prefix=atom %s ; RUN: llc <%s -O2 -mcpu=core2 -march=x86 -relocation-model=static | FileCheck %s +; +; FIXME: Atom's scheduler is temporarily disabled. +; XFAIL: * @a = common global i32 0, align 4 @b = common global i32 0, align 4 diff --git a/test/CodeGen/X86/atomic_op.ll b/test/CodeGen/X86/atomic_op.ll index 972dab2..7c5abe2 100644 --- a/test/CodeGen/X86/atomic_op.ll +++ b/test/CodeGen/X86/atomic_op.ll @@ -13,6 +13,7 @@ entry: %xort = alloca i32 ; <i32*> [#uses=2] %old = alloca i32 ; <i32*> [#uses=18] %temp = alloca i32 ; <i32*> [#uses=2] + %temp64 = alloca i64 store i32 %argc, i32* %argc.addr store i8** %argv, i8*** %argv.addr store i32 0, i32* %val1 @@ -106,6 +107,25 @@ entry: ; CHECK: cmpxchgl %17 = cmpxchg i32* %val2, i32 1976, i32 1 monotonic store i32 %17, i32* %old + ; CHECK: movl $1401, %[[R17mask:[a-z]*]] + ; CHECK: movl [[R17atomic:.*]], %eax + ; CHECK: movl %eax, %[[R17newval:[a-z]*]] + ; CHECK: andl %[[R17mask]], %[[R17newval]] + ; CHECK: notl %[[R17newval]] + ; CHECK: lock + ; CHECK: cmpxchgl %[[R17newval]], [[R17atomic]] + ; CHECK: jne + ; CHECK: movl %eax, + %18 = atomicrmw nand i32* %val2, i32 1401 monotonic + store i32 %18, i32* %old + ; CHECK: andl + ; CHECK: andl + ; CHECK: notl + ; CHECK: notl + ; CHECK: lock + ; CHECK: cmpxchg8b + %19 = atomicrmw nand i64* %temp64, i64 17361641481138401520 monotonic + store i64 %19, i64* %temp64 ret void } diff --git a/test/CodeGen/X86/avx-intrinsics-x86.ll b/test/CodeGen/X86/avx-intrinsics-x86.ll index 616601a..b334932 100644 --- a/test/CodeGen/X86/avx-intrinsics-x86.ll +++ b/test/CodeGen/X86/avx-intrinsics-x86.ll @@ -1078,33 +1078,33 @@ define <2 x i64> @test_x86_sse41_pmuldq(<4 x i32> %a0, <4 x i32> %a1) { declare <2 x i64> @llvm.x86.sse41.pmuldq(<4 x i32>, <4 x i32>) nounwind readnone -define i32 @test_x86_sse41_ptestc(<4 x float> %a0, <4 x float> %a1) { +define i32 @test_x86_sse41_ptestc(<2 x i64> %a0, <2 x i64> %a1) { ; CHECK: vptest ; CHECK: sbbl - %res = call i32 @llvm.x86.sse41.ptestc(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1] + %res = call i32 @llvm.x86.sse41.ptestc(<2 x i64> %a0, <2 x i64> %a1) ; <i32> [#uses=1] ret i32 %res } -declare i32 @llvm.x86.sse41.ptestc(<4 x float>, <4 x float>) nounwind readnone +declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) nounwind readnone -define i32 @test_x86_sse41_ptestnzc(<4 x float> %a0, <4 x float> %a1) { +define i32 @test_x86_sse41_ptestnzc(<2 x i64> %a0, <2 x i64> %a1) { ; CHECK: vptest ; CHECK: seta ; CHECK: movzbl - %res = call i32 @llvm.x86.sse41.ptestnzc(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1] + %res = call i32 @llvm.x86.sse41.ptestnzc(<2 x i64> %a0, <2 x i64> %a1) ; <i32> [#uses=1] ret i32 %res } -declare i32 @llvm.x86.sse41.ptestnzc(<4 x float>, <4 x float>) nounwind readnone +declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) nounwind readnone -define i32 @test_x86_sse41_ptestz(<4 x float> %a0, <4 x float> %a1) { +define i32 @test_x86_sse41_ptestz(<2 x i64> %a0, <2 x i64> %a1) { ; CHECK: vptest ; CHECK: sete ; CHECK: movzbl - %res = call i32 @llvm.x86.sse41.ptestz(<4 x float> %a0, <4 x float> %a1) ; <i32> [#uses=1] + %res = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %a0, <2 x i64> %a1) ; <i32> [#uses=1] ret i32 %res } -declare i32 @llvm.x86.sse41.ptestz(<4 x float>, <4 x float>) nounwind readnone +declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone define <2 x double> @test_x86_sse41_round_pd(<2 x double> %a0) { diff --git a/test/CodeGen/X86/avx-shuffle.ll b/test/CodeGen/X86/avx-shuffle.ll index 54f01e9..16c447b 100644 --- a/test/CodeGen/X86/avx-shuffle.ll +++ b/test/CodeGen/X86/avx-shuffle.ll @@ -147,3 +147,58 @@ entry: %shuffle.i = shufflevector <4 x float> %1, <4 x float> <float 0.000000e+00, float undef, float undef, float undef>, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 4, i32 4, i32 4> ret <8 x float> %shuffle.i } + +; PR12413 +; CHECK: vpshufb +; CHECK: vpshufb +; CHECK: vpshufb +; CHECK: vpshufb +define <32 x i8> @shuf(<32 x i8> %inval1, <32 x i8> %inval2) { +entry: + %0 = shufflevector <32 x i8> %inval1, <32 x i8> %inval2, <32 x i32> <i32 0, +i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 +22, i32 24, i32 26, i32 28, i32 30, i32 32, i32 34, i32 36, i32 38, i32 40, i32 +42, i32 44, i32 46, i32 48, i32 50, i32 52, i32 54, i32 56, i32 58, i32 60, i32 +62> + ret <32 x i8> %0 +} + +; CHECK: blend1 +; CHECK: vblendps +; CHECK: ret +define <4 x i32> @blend1(<4 x i32> %a, <4 x i32> %b) nounwind alwaysinline { + %t = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 7> + ret <4 x i32> %t +} + +; CHECK: blend2 +; CHECK: vblendps +; CHECK: ret +define <4 x i32> @blend2(<4 x i32> %a, <4 x i32> %b) nounwind alwaysinline { + %t = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 5, i32 2, i32 7> + ret <4 x i32> %t +} + +; CHECK: blend2a +; CHECK: vblendps +; CHECK: ret +define <4 x float> @blend2a(<4 x float> %a, <4 x float> %b) nounwind alwaysinline { + %t = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 5, i32 2, i32 7> + ret <4 x float> %t +} + +; CHECK: blend3 +; CHECK-NOT: vblendps +; CHECK: ret +define <4 x i32> @blend3(<4 x i32> %a, <4 x i32> %b) nounwind alwaysinline { + %t = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 2, i32 7> + ret <4 x i32> %t +} + +; CHECK: blend4 +; CHECK: vblendpd +; CHECK: ret +define <4 x i64> @blend4(<4 x i64> %a, <4 x i64> %b) nounwind alwaysinline { + %t = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 7> + ret <4 x i64> %t +} diff --git a/test/CodeGen/X86/avx-vbroadcast.ll b/test/CodeGen/X86/avx-vbroadcast.ll index 5bf9f4f..148ae73 100644 --- a/test/CodeGen/X86/avx-vbroadcast.ll +++ b/test/CodeGen/X86/avx-vbroadcast.ll @@ -47,7 +47,7 @@ entry: ;;;; 128-bit versions ; CHECK: vbroadcastss (% -define <4 x float> @E(float* %ptr) nounwind uwtable readnone ssp { +define <4 x float> @e(float* %ptr) nounwind uwtable readnone ssp { entry: %q = load float* %ptr, align 4 %vecinit.i = insertelement <4 x float> undef, float %q, i32 0 @@ -57,6 +57,19 @@ entry: ret <4 x float> %vecinit6.i } + +; CHECK: _e2 +; CHECK-NOT: vbroadcastss +; CHECK: ret +define <4 x float> @_e2(float* %ptr) nounwind uwtable readnone ssp { + %vecinit.i = insertelement <4 x float> undef, float 0xbf80000000000000, i32 0 + %vecinit2.i = insertelement <4 x float> %vecinit.i, float 0xbf80000000000000, i32 1 + %vecinit4.i = insertelement <4 x float> %vecinit2.i, float 0xbf80000000000000, i32 2 + %vecinit6.i = insertelement <4 x float> %vecinit4.i, float 0xbf80000000000000, i32 3 + ret <4 x float> %vecinit6.i +} + + ; CHECK: vbroadcastss (% define <4 x i32> @F(i32* %ptr) nounwind uwtable readnone ssp { entry: @@ -71,7 +84,7 @@ entry: ; Unsupported vbroadcasts ; CHECK: _G -; CHECK-NOT: vbroadcastsd (% +; CHECK-NOT: broadcast (% ; CHECK: ret define <2 x i64> @G(i64* %ptr) nounwind uwtable readnone ssp { entry: @@ -82,7 +95,7 @@ entry: } ; CHECK: _H -; CHECK-NOT: vbroadcastss +; CHECK-NOT: broadcast ; CHECK: ret define <4 x i32> @H(<4 x i32> %a) { %x = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 undef, i32 undef> @@ -90,7 +103,7 @@ define <4 x i32> @H(<4 x i32> %a) { } ; CHECK: _I -; CHECK-NOT: vbroadcastsd (% +; CHECK-NOT: broadcast (% ; CHECK: ret define <2 x double> @I(double* %ptr) nounwind uwtable readnone ssp { entry: diff --git a/test/CodeGen/X86/avx-vpermil.ll b/test/CodeGen/X86/avx-vpermil.ll index 9707cd9..cb904b9 100644 --- a/test/CodeGen/X86/avx-vpermil.ll +++ b/test/CodeGen/X86/avx-vpermil.ll @@ -45,7 +45,8 @@ entry: ret <8 x float> %shuffle } -; CHECK: vpermilps +; CHECK: palignr +; CHECK: palignr define <8 x float> @funcF(<8 x float> %a) nounwind uwtable readnone ssp { entry: %shuffle = shufflevector <8 x float> %a, <8 x float> zeroinitializer, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9> diff --git a/test/CodeGen/X86/avx2-intrinsics-x86.ll b/test/CodeGen/X86/avx2-intrinsics-x86.ll index 1fb41c0..3f27a02 100644 --- a/test/CodeGen/X86/avx2-intrinsics-x86.ll +++ b/test/CodeGen/X86/avx2-intrinsics-x86.ll @@ -800,22 +800,6 @@ define <8 x float> @test_x86_avx2_permps(<8 x float> %a0, <8 x float> %a1) { declare <8 x float> @llvm.x86.avx2.permps(<8 x float>, <8 x float>) nounwind readonly -define <4 x i64> @test_x86_avx2_permq(<4 x i64> %a0) { - ; CHECK: vpermq - %res = call <4 x i64> @llvm.x86.avx2.permq(<4 x i64> %a0, i8 7) ; <<4 x i64>> [#uses=1] - ret <4 x i64> %res -} -declare <4 x i64> @llvm.x86.avx2.permq(<4 x i64>, i8) nounwind readonly - - -define <4 x double> @test_x86_avx2_permpd(<4 x double> %a0) { - ; CHECK: vpermpd - %res = call <4 x double> @llvm.x86.avx2.permpd(<4 x double> %a0, i8 7) ; <<4 x double>> [#uses=1] - ret <4 x double> %res -} -declare <4 x double> @llvm.x86.avx2.permpd(<4 x double>, i8) nounwind readonly - - define <4 x i64> @test_x86_avx2_vperm2i128(<4 x i64> %a0, <4 x i64> %a1) { ; CHECK: vperm2i128 %res = call <4 x i64> @llvm.x86.avx2.vperm2i128(<4 x i64> %a0, <4 x i64> %a1, i8 1) ; <<4 x i64>> [#uses=1] diff --git a/test/CodeGen/X86/avx2-vbroadcast.ll b/test/CodeGen/X86/avx2-vbroadcast.ll index fbabb15..1a78414 100644 --- a/test/CodeGen/X86/avx2-vbroadcast.ll +++ b/test/CodeGen/X86/avx2-vbroadcast.ll @@ -150,3 +150,38 @@ entry: %vecinit2.i = insertelement <2 x double> %vecinit.i, double %q, i32 1 ret <2 x double> %vecinit2.i } + +; CHECK: V111 +; CHECK: vpbroadcastd +; CHECK: ret +define <8 x i32> @V111(<8 x i32> %in) nounwind uwtable readnone ssp { +entry: + %g = add <8 x i32> %in, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1> + ret <8 x i32> %g +} + +; CHECK: _e2 +; CHECK: vbroadcastss +; CHECK: ret +define <4 x float> @_e2(float* %ptr) nounwind uwtable readnone ssp { + %vecinit.i = insertelement <4 x float> undef, float 0xbf80000000000000, i32 0 + %vecinit2.i = insertelement <4 x float> %vecinit.i, float 0xbf80000000000000, i32 1 + %vecinit4.i = insertelement <4 x float> %vecinit2.i, float 0xbf80000000000000, i32 2 + %vecinit6.i = insertelement <4 x float> %vecinit4.i, float 0xbf80000000000000, i32 3 + ret <4 x float> %vecinit6.i +} + +; CHECK: _e4 +; CHECK-NOT: broadcast +; CHECK: ret +define <8 x i8> @_e4(i8* %ptr) nounwind uwtable readnone ssp { + %vecinit0.i = insertelement <8 x i8> undef, i8 52, i32 0 + %vecinit1.i = insertelement <8 x i8> %vecinit0.i, i8 52, i32 1 + %vecinit2.i = insertelement <8 x i8> %vecinit1.i, i8 52, i32 2 + %vecinit3.i = insertelement <8 x i8> %vecinit2.i, i8 52, i32 3 + %vecinit4.i = insertelement <8 x i8> %vecinit3.i, i8 52, i32 3 + %vecinit5.i = insertelement <8 x i8> %vecinit4.i, i8 52, i32 3 + %vecinit6.i = insertelement <8 x i8> %vecinit5.i, i8 52, i32 3 + %vecinit7.i = insertelement <8 x i8> %vecinit6.i, i8 52, i32 3 + ret <8 x i8> %vecinit7.i +} diff --git a/test/CodeGen/X86/avx2-vperm.ll b/test/CodeGen/X86/avx2-vperm.ll new file mode 100755 index 0000000..d576d0e --- /dev/null +++ b/test/CodeGen/X86/avx2-vperm.ll @@ -0,0 +1,34 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 -mattr=+avx2 | FileCheck %s + +define <8 x i32> @perm_cl_int_8x32(<8 x i32> %A) nounwind readnone { +entry: +; CHECK: perm_cl_int_8x32 +; CHECK: vpermd + %B = shufflevector <8 x i32> %A, <8 x i32> undef, <8 x i32> <i32 0, i32 7, i32 2, i32 1, i32 2, i32 7, i32 6, i32 0> + ret <8 x i32> %B +} + + +define <8 x float> @perm_cl_fp_8x32(<8 x float> %A) nounwind readnone { +entry: +; CHECK: perm_cl_fp_8x32 +; CHECK: vpermps + %B = shufflevector <8 x float> %A, <8 x float> undef, <8 x i32> <i32 undef, i32 7, i32 2, i32 undef, i32 4, i32 undef, i32 1, i32 6> + ret <8 x float> %B +} + +define <4 x i64> @perm_cl_int_4x64(<4 x i64> %A) nounwind readnone { +entry: +; CHECK: perm_cl_int_4x64 +; CHECK: vpermq + %B = shufflevector <4 x i64> %A, <4 x i64> undef, <4 x i32> <i32 0, i32 3, i32 2, i32 1> + ret <4 x i64> %B +} + +define <4 x double> @perm_cl_fp_4x64(<4 x double> %A) nounwind readnone { +entry: +; CHECK: perm_cl_fp_4x64 +; CHECK: vpermpd + %B = shufflevector <4 x double> %A, <4 x double> undef, <4 x i32> <i32 0, i32 3, i32 2, i32 1> + ret <4 x double> %B +} diff --git a/test/CodeGen/X86/block-placement.ll b/test/CodeGen/X86/block-placement.ll index 167d522..fc7b638 100644 --- a/test/CodeGen/X86/block-placement.ll +++ b/test/CodeGen/X86/block-placement.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=i686-linux -enable-block-placement < %s | FileCheck %s +; RUN: llc -mtriple=i686-linux < %s | FileCheck %s declare void @error(i32 %i, i32 %a, i32 %b) @@ -76,11 +76,11 @@ define i32 @test_loop_cold_blocks(i32 %i, i32* %a) { ; Check that we sink cold loop blocks after the hot loop body. ; CHECK: test_loop_cold_blocks: ; CHECK: %entry +; CHECK: %unlikely1 +; CHECK: %unlikely2 ; CHECK: %body1 ; CHECK: %body2 ; CHECK: %body3 -; CHECK: %unlikely1 -; CHECK: %unlikely2 ; CHECK: %exit entry: @@ -122,14 +122,14 @@ define i32 @test_loop_early_exits(i32 %i, i32* %a) { ; Check that we sink early exit blocks out of loop bodies. ; CHECK: test_loop_early_exits: ; CHECK: %entry +; CHECK: %body1 ; CHECK: %body2 ; CHECK: %body3 ; CHECK: %body4 -; CHECK: %body1 +; CHECK: %exit ; CHECK: %bail1 ; CHECK: %bail2 ; CHECK: %bail3 -; CHECK: %exit entry: br label %body1 @@ -199,6 +199,36 @@ exit: ret i32 %base } +define i32 @test_no_loop_rotate(i32 %i, i32* %a) { +; Check that we don't try to rotate a loop which is already laid out with +; fallthrough opportunities into the top and out of the bottom. +; CHECK: test_no_loop_rotate: +; CHECK: %entry +; CHECK: %body0 +; CHECK: %body1 +; CHECK: %exit + +entry: + br label %body0 + +body0: + %iv = phi i32 [ 0, %entry ], [ %next, %body1 ] + %base = phi i32 [ 0, %entry ], [ %sum, %body1 ] + %arrayidx = getelementptr inbounds i32* %a, i32 %iv + %0 = load i32* %arrayidx + %sum = add nsw i32 %0, %base + %bailcond1 = icmp eq i32 %sum, 42 + br i1 %bailcond1, label %exit, label %body1 + +body1: + %next = add i32 %iv, 1 + %exitcond = icmp eq i32 %next, %i + br i1 %exitcond, label %exit, label %body0 + +exit: + ret i32 %base +} + define void @test_loop_rotate_reversed_blocks() { ; This test case (greatly reduced from an Olden bencmark) ensures that the loop ; rotate implementation doesn't assume that loops are laid out in a particular @@ -348,7 +378,6 @@ define void @unnatural_cfg2() { ; CHECK: %entry ; CHECK: %loop.body1 ; CHECK: %loop.body2 -; CHECK: %loop.header ; CHECK: %loop.body3 ; CHECK: %loop.inner1.begin ; The end block is folded with %loop.body3... @@ -356,6 +385,7 @@ define void @unnatural_cfg2() { ; CHECK: %loop.body4 ; CHECK: %loop.inner2.begin ; The loop.inner2.end block is folded +; CHECK: %loop.header ; CHECK: %bail entry: @@ -928,3 +958,126 @@ entry: exit: ret void } + +define void @benchmark_heapsort(i32 %n, double* nocapture %ra) { +; This test case comes from the heapsort benchmark, and exemplifies several +; important aspects to block placement in the presence of loops: +; 1) Loop rotation needs to *ensure* that the desired exiting edge can be +; a fallthrough. +; 2) The exiting edge from the loop which is rotated to be laid out at the +; bottom of the loop needs to be exiting into the nearest enclosing loop (to +; which there is an exit). Otherwise, we force that enclosing loop into +; strange layouts that are siginificantly less efficient, often times maing +; it discontiguous. +; +; CHECK: @benchmark_heapsort +; CHECK: %entry +; First rotated loop top. +; CHECK: .align +; CHECK: %while.end +; CHECK: %for.cond +; CHECK: %if.then +; CHECK: %if.else +; CHECK: %if.end10 +; Second rotated loop top +; CHECK: .align +; CHECK: %if.then24 +; CHECK: %while.cond.outer +; Third rotated loop top +; CHECK: .align +; CHECK: %while.cond +; CHECK: %while.body +; CHECK: %land.lhs.true +; CHECK: %if.then19 +; CHECK: %if.then19 +; CHECK: %if.then8 +; CHECK: ret + +entry: + %shr = ashr i32 %n, 1 + %add = add nsw i32 %shr, 1 + %arrayidx3 = getelementptr inbounds double* %ra, i64 1 + br label %for.cond + +for.cond: + %ir.0 = phi i32 [ %n, %entry ], [ %ir.1, %while.end ] + %l.0 = phi i32 [ %add, %entry ], [ %l.1, %while.end ] + %cmp = icmp sgt i32 %l.0, 1 + br i1 %cmp, label %if.then, label %if.else + +if.then: + %dec = add nsw i32 %l.0, -1 + %idxprom = sext i32 %dec to i64 + %arrayidx = getelementptr inbounds double* %ra, i64 %idxprom + %0 = load double* %arrayidx, align 8 + br label %if.end10 + +if.else: + %idxprom1 = sext i32 %ir.0 to i64 + %arrayidx2 = getelementptr inbounds double* %ra, i64 %idxprom1 + %1 = load double* %arrayidx2, align 8 + %2 = load double* %arrayidx3, align 8 + store double %2, double* %arrayidx2, align 8 + %dec6 = add nsw i32 %ir.0, -1 + %cmp7 = icmp eq i32 %dec6, 1 + br i1 %cmp7, label %if.then8, label %if.end10 + +if.then8: + store double %1, double* %arrayidx3, align 8 + ret void + +if.end10: + %ir.1 = phi i32 [ %ir.0, %if.then ], [ %dec6, %if.else ] + %l.1 = phi i32 [ %dec, %if.then ], [ %l.0, %if.else ] + %rra.0 = phi double [ %0, %if.then ], [ %1, %if.else ] + %add31 = add nsw i32 %ir.1, 1 + br label %while.cond.outer + +while.cond.outer: + %j.0.ph.in = phi i32 [ %l.1, %if.end10 ], [ %j.1, %if.then24 ] + %j.0.ph = shl i32 %j.0.ph.in, 1 + br label %while.cond + +while.cond: + %j.0 = phi i32 [ %add31, %if.end20 ], [ %j.0.ph, %while.cond.outer ] + %cmp11 = icmp sgt i32 %j.0, %ir.1 + br i1 %cmp11, label %while.end, label %while.body + +while.body: + %cmp12 = icmp slt i32 %j.0, %ir.1 + br i1 %cmp12, label %land.lhs.true, label %if.end20 + +land.lhs.true: + %idxprom13 = sext i32 %j.0 to i64 + %arrayidx14 = getelementptr inbounds double* %ra, i64 %idxprom13 + %3 = load double* %arrayidx14, align 8 + %add15 = add nsw i32 %j.0, 1 + %idxprom16 = sext i32 %add15 to i64 + %arrayidx17 = getelementptr inbounds double* %ra, i64 %idxprom16 + %4 = load double* %arrayidx17, align 8 + %cmp18 = fcmp olt double %3, %4 + br i1 %cmp18, label %if.then19, label %if.end20 + +if.then19: + br label %if.end20 + +if.end20: + %j.1 = phi i32 [ %add15, %if.then19 ], [ %j.0, %land.lhs.true ], [ %j.0, %while.body ] + %idxprom21 = sext i32 %j.1 to i64 + %arrayidx22 = getelementptr inbounds double* %ra, i64 %idxprom21 + %5 = load double* %arrayidx22, align 8 + %cmp23 = fcmp olt double %rra.0, %5 + br i1 %cmp23, label %if.then24, label %while.cond + +if.then24: + %idxprom27 = sext i32 %j.0.ph.in to i64 + %arrayidx28 = getelementptr inbounds double* %ra, i64 %idxprom27 + store double %5, double* %arrayidx28, align 8 + br label %while.cond.outer + +while.end: + %idxprom33 = sext i32 %j.0.ph.in to i64 + %arrayidx34 = getelementptr inbounds double* %ra, i64 %idxprom33 + store double %rra.0, double* %arrayidx34, align 8 + br label %for.cond +} diff --git a/test/CodeGen/X86/br-fold.ll b/test/CodeGen/X86/br-fold.ll index 8af3bd1..2c37194 100644 --- a/test/CodeGen/X86/br-fold.ll +++ b/test/CodeGen/X86/br-fold.ll @@ -1,7 +1,7 @@ ; RUN: llc -march=x86-64 < %s | FileCheck %s ; CHECK: orq -; CHECK-NEXT: jne +; CHECK-NEXT: LBB0_1 @_ZN11xercesc_2_513SchemaSymbols21fgURI_SCHEMAFORSCHEMAE = external constant [33 x i16], align 32 ; <[33 x i16]*> [#uses=1] @_ZN11xercesc_2_56XMLUni16fgNotationStringE = external constant [9 x i16], align 16 ; <[9 x i16]*> [#uses=1] diff --git a/test/CodeGen/X86/call-push.ll b/test/CodeGen/X86/call-push.ll index 8cca10c..e69f8c1 100644 --- a/test/CodeGen/X86/call-push.ll +++ b/test/CodeGen/X86/call-push.ll @@ -7,8 +7,8 @@ define i32 @decode_byte(%struct.decode_t* %decode) nounwind { ; CHECK: decode_byte: ; CHECK: pushl ; CHECK: popl -; CHECK: popl ; CHECK: jmp +; CHECK: popl entry: %tmp2 = getelementptr %struct.decode_t* %decode, i32 0, i32 4 ; <i16*> [#uses=1] %tmp23 = bitcast i16* %tmp2 to i32* ; <i32*> [#uses=1] diff --git a/test/CodeGen/X86/change-compare-stride-0.ll b/test/CodeGen/X86/change-compare-stride-0.ll deleted file mode 100644 index 439f7b0..0000000 --- a/test/CodeGen/X86/change-compare-stride-0.ll +++ /dev/null @@ -1,83 +0,0 @@ -; RUN: llc < %s -march=x86 -enable-lsr-nested | FileCheck %s -; -; Nested LSR is required to optimize this case. -; We do not expect to see this form of IR without -enable-iv-rewrite. - -define void @borf(i8* nocapture %in, i8* nocapture %out) nounwind { -; CHECK: borf: -; CHECK-NOT: inc -; CHECK-NOT: leal 1( -; CHECK-NOT: leal -1( -; CHECK: decl -; CHECK-NEXT: cmpl $-478 -; CHECK: ret - -bb4.thread: - br label %bb2.outer - -bb2.outer: ; preds = %bb4, %bb4.thread - %indvar18 = phi i32 [ 0, %bb4.thread ], [ %indvar.next28, %bb4 ] ; <i32> [#uses=3] - %tmp34 = mul i32 %indvar18, 65535 ; <i32> [#uses=1] - %i.0.reg2mem.0.ph = add i32 %tmp34, 639 ; <i32> [#uses=1] - %0 = and i32 %i.0.reg2mem.0.ph, 65535 ; <i32> [#uses=1] - %1 = mul i32 %0, 480 ; <i32> [#uses=1] - %tmp20 = mul i32 %indvar18, -478 ; <i32> [#uses=1] - br label %bb2 - -bb2: ; preds = %bb2, %bb2.outer - %indvar = phi i32 [ 0, %bb2.outer ], [ %indvar.next, %bb2 ] ; <i32> [#uses=3] - %ctg2 = getelementptr i8* %out, i32 %tmp20 ; <i8*> [#uses=1] - %tmp21 = ptrtoint i8* %ctg2 to i32 ; <i32> [#uses=1] - %tmp23 = sub i32 %tmp21, %indvar ; <i32> [#uses=1] - %out_addr.0.reg2mem.0 = inttoptr i32 %tmp23 to i8* ; <i8*> [#uses=1] - %tmp25 = mul i32 %indvar, 65535 ; <i32> [#uses=1] - %j.0.reg2mem.0 = add i32 %tmp25, 479 ; <i32> [#uses=1] - %2 = and i32 %j.0.reg2mem.0, 65535 ; <i32> [#uses=1] - %3 = add i32 %1, %2 ; <i32> [#uses=9] - %4 = add i32 %3, -481 ; <i32> [#uses=1] - %5 = getelementptr i8* %in, i32 %4 ; <i8*> [#uses=1] - %6 = load i8* %5, align 1 ; <i8> [#uses=1] - %7 = add i32 %3, -480 ; <i32> [#uses=1] - %8 = getelementptr i8* %in, i32 %7 ; <i8*> [#uses=1] - %9 = load i8* %8, align 1 ; <i8> [#uses=1] - %10 = add i32 %3, -479 ; <i32> [#uses=1] - %11 = getelementptr i8* %in, i32 %10 ; <i8*> [#uses=1] - %12 = load i8* %11, align 1 ; <i8> [#uses=1] - %13 = add i32 %3, -1 ; <i32> [#uses=1] - %14 = getelementptr i8* %in, i32 %13 ; <i8*> [#uses=1] - %15 = load i8* %14, align 1 ; <i8> [#uses=1] - %16 = getelementptr i8* %in, i32 %3 ; <i8*> [#uses=1] - %17 = load i8* %16, align 1 ; <i8> [#uses=1] - %18 = add i32 %3, 1 ; <i32> [#uses=1] - %19 = getelementptr i8* %in, i32 %18 ; <i8*> [#uses=1] - %20 = load i8* %19, align 1 ; <i8> [#uses=1] - %21 = add i32 %3, 481 ; <i32> [#uses=1] - %22 = getelementptr i8* %in, i32 %21 ; <i8*> [#uses=1] - %23 = load i8* %22, align 1 ; <i8> [#uses=1] - %24 = add i32 %3, 480 ; <i32> [#uses=1] - %25 = getelementptr i8* %in, i32 %24 ; <i8*> [#uses=1] - %26 = load i8* %25, align 1 ; <i8> [#uses=1] - %27 = add i32 %3, 479 ; <i32> [#uses=1] - %28 = getelementptr i8* %in, i32 %27 ; <i8*> [#uses=1] - %29 = load i8* %28, align 1 ; <i8> [#uses=1] - %30 = add i8 %9, %6 ; <i8> [#uses=1] - %31 = add i8 %30, %12 ; <i8> [#uses=1] - %32 = add i8 %31, %15 ; <i8> [#uses=1] - %33 = add i8 %32, %17 ; <i8> [#uses=1] - %34 = add i8 %33, %20 ; <i8> [#uses=1] - %35 = add i8 %34, %23 ; <i8> [#uses=1] - %36 = add i8 %35, %26 ; <i8> [#uses=1] - %37 = add i8 %36, %29 ; <i8> [#uses=1] - store i8 %37, i8* %out_addr.0.reg2mem.0, align 1 - %indvar.next = add i32 %indvar, 1 ; <i32> [#uses=2] - %exitcond = icmp eq i32 %indvar.next, 478 ; <i1> [#uses=1] - br i1 %exitcond, label %bb4, label %bb2 - -bb4: ; preds = %bb2 - %indvar.next28 = add i32 %indvar18, 1 ; <i32> [#uses=2] - %exitcond29 = icmp eq i32 %indvar.next28, 638 ; <i1> [#uses=1] - br i1 %exitcond29, label %return, label %bb2.outer - -return: ; preds = %bb4 - ret void -} diff --git a/test/CodeGen/X86/dbg-declare.ll b/test/CodeGen/X86/dbg-declare.ll new file mode 100644 index 0000000..5d4cedc --- /dev/null +++ b/test/CodeGen/X86/dbg-declare.ll @@ -0,0 +1,57 @@ +; RUN: llc < %s -O0 -mtriple x86_64-apple-darwin +; <rdar://problem/11134152> + +define i32 @foo(i32* %x) nounwind uwtable ssp { +entry: + %x.addr = alloca i32*, align 8 + %saved_stack = alloca i8* + %cleanup.dest.slot = alloca i32 + store i32* %x, i32** %x.addr, align 8 + call void @llvm.dbg.declare(metadata !{i32** %x.addr}, metadata !14), !dbg !15 + %0 = load i32** %x.addr, align 8, !dbg !16 + %1 = load i32* %0, align 4, !dbg !16 + %2 = zext i32 %1 to i64, !dbg !16 + %3 = call i8* @llvm.stacksave(), !dbg !16 + store i8* %3, i8** %saved_stack, !dbg !16 + %vla = alloca i8, i64 %2, align 16, !dbg !16 + call void @llvm.dbg.declare(metadata !{i8* %vla}, metadata !18), !dbg !23 + store i32 1, i32* %cleanup.dest.slot + %4 = load i8** %saved_stack, !dbg !24 + call void @llvm.stackrestore(i8* %4), !dbg !24 + ret i32 0, !dbg !25 +} + +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + +declare i8* @llvm.stacksave() nounwind + +declare void @llvm.stackrestore(i8*) nounwind + +!llvm.dbg.cu = !{!0} + +!0 = metadata !{i32 786449, i32 0, i32 12, metadata !"20020104-2.c", metadata !"/Volumes/Sandbox/llvm", metadata !"clang version 3.1 (trunk 153698)", i1 true, i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1} ; [ DW_TAG_compile_unit ] +!1 = metadata !{metadata !2} +!2 = metadata !{i32 0} +!3 = metadata !{metadata !4} +!4 = metadata !{metadata !5} +!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"foo", metadata !"foo", metadata !"", metadata !6, i32 6, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 (i32*)* @foo, null, null, metadata !12} ; [ DW_TAG_subprogram ] +!6 = metadata !{i32 786473, metadata !"20020104-2.c", metadata !"/Volumes/Sandbox/llvm", null} ; [ DW_TAG_file_type ] +!7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!8 = metadata !{metadata !9, metadata !10} +!9 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!10 = metadata !{i32 786447, null, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !11} ; [ DW_TAG_pointer_type ] +!11 = metadata !{i32 786470, null, metadata !"", null, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !9} ; [ DW_TAG_const_type ] +!12 = metadata !{metadata !13} +!13 = metadata !{i32 786468} ; [ DW_TAG_base_type ] +!14 = metadata !{i32 786689, metadata !5, metadata !"x", metadata !6, i32 16777221, metadata !10, i32 0, i32 0} ; [ DW_TAG_arg_variable ] +!15 = metadata !{i32 5, i32 21, metadata !5, null} +!16 = metadata !{i32 7, i32 13, metadata !17, null} +!17 = metadata !{i32 786443, metadata !5, i32 6, i32 1, metadata !6, i32 0} ; [ DW_TAG_lexical_block ] +!18 = metadata !{i32 786688, metadata !17, metadata !"a", metadata !6, i32 7, metadata !19, i32 0, i32 0} ; [ DW_TAG_auto_variable ] +!19 = metadata !{i32 786433, null, metadata !"", null, i32 0, i64 0, i64 8, i32 0, i32 0, metadata !20, metadata !21, i32 0, i32 0} ; [ DW_TAG_array_type ] +!20 = metadata !{i32 786468, null, metadata !"char", null, i32 0, i64 8, i64 8, i64 0, i32 0, i32 6} ; [ DW_TAG_base_type ] +!21 = metadata !{metadata !22} +!22 = metadata !{i32 786465, i64 1, i64 0} ; [ DW_TAG_subrange_type ] +!23 = metadata !{i32 7, i32 8, metadata !17, null} +!24 = metadata !{i32 9, i32 1, metadata !17, null} +!25 = metadata !{i32 8, i32 3, metadata !17, null} diff --git a/test/CodeGen/X86/dec-eflags-lower.ll b/test/CodeGen/X86/dec-eflags-lower.ll deleted file mode 100644 index 190819f..0000000 --- a/test/CodeGen/X86/dec-eflags-lower.ll +++ /dev/null @@ -1,67 +0,0 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s - -%struct.obj = type { i64 } - -; CHECK: _Z7releaseP3obj -define void @_Z7releaseP3obj(%struct.obj* nocapture %o) nounwind uwtable ssp { -entry: -; CHECK: decq (%{{rdi|rcx}}) -; CHECK-NEXT: je - %refcnt = getelementptr inbounds %struct.obj* %o, i64 0, i32 0 - %0 = load i64* %refcnt, align 8, !tbaa !0 - %dec = add i64 %0, -1 - store i64 %dec, i64* %refcnt, align 8, !tbaa !0 - %tobool = icmp eq i64 %dec, 0 - br i1 %tobool, label %if.end, label %return - -if.end: ; preds = %entry - %1 = bitcast %struct.obj* %o to i8* - tail call void @free(i8* %1) - br label %return - -return: ; preds = %entry, %if.end - ret void -} - -@c = common global i64 0, align 8 -@a = common global i32 0, align 4 -@.str = private unnamed_addr constant [5 x i8] c"%ld\0A\00", align 1 -@b = common global i32 0, align 4 - -; CHECK: test -define i32 @test() nounwind uwtable ssp { -entry: -; CHECK: decq -; CHECK-NOT: decq -%0 = load i64* @c, align 8, !tbaa !0 -%dec.i = add nsw i64 %0, -1 -store i64 %dec.i, i64* @c, align 8, !tbaa !0 -%tobool.i = icmp ne i64 %dec.i, 0 -%lor.ext.i = zext i1 %tobool.i to i32 -store i32 %lor.ext.i, i32* @a, align 4, !tbaa !3 -%call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i64 0, i64 0), i64 %dec.i) nounwind -ret i32 0 -} - -; CHECK: test2 -define i32 @test2() nounwind uwtable ssp { -entry: -; CHECK-NOT: decq ({{.*}}) -%0 = load i64* @c, align 8, !tbaa !0 -%dec.i = add nsw i64 %0, -1 -store i64 %dec.i, i64* @c, align 8, !tbaa !0 -%tobool.i = icmp ne i64 %0, 0 -%lor.ext.i = zext i1 %tobool.i to i32 -store i32 %lor.ext.i, i32* @a, align 4, !tbaa !3 -%call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i64 0, i64 0), i64 %dec.i) nounwind -ret i32 0 -} - -declare i32 @printf(i8* nocapture, ...) nounwind - -declare void @free(i8* nocapture) nounwind - -!0 = metadata !{metadata !"long", metadata !1} -!1 = metadata !{metadata !"omnipotent char", metadata !2} -!2 = metadata !{metadata !"Simple C/C++ TBAA", null} -!3 = metadata !{metadata !"int", metadata !1} diff --git a/test/CodeGen/X86/fdiv.ll b/test/CodeGen/X86/fdiv.ll new file mode 100644 index 0000000..0749682 --- /dev/null +++ b/test/CodeGen/X86/fdiv.ll @@ -0,0 +1,41 @@ +; RUN: llc < %s -march=x86-64 -enable-unsafe-fp-math | FileCheck %s + +define double @exact(double %x) { +; Exact division by a constant converted to multiplication. +; CHECK: @exact +; CHECK: mulsd + %div = fdiv double %x, 2.0 + ret double %div +} + +define double @inexact(double %x) { +; Inexact division by a constant converted to multiplication. +; CHECK: @inexact +; CHECK: mulsd + %div = fdiv double %x, 0x41DFFFFFFFC00000 + ret double %div +} + +define double @funky(double %x) { +; No conversion to multiplication if too funky. +; CHECK: @funky +; CHECK: divsd + %div = fdiv double %x, 0.0 + ret double %div +} + +define double @denormal1(double %x) { +; Don't generate multiplication by a denormal. +; CHECK: @denormal1 +; CHECK: divsd + %div = fdiv double %x, 0x7FD0000000000001 + ret double %div +} + +define double @denormal2(double %x) { +; Don't generate multiplication by a denormal. +; CHECK: @denormal +; CHECK: divsd + %div = fdiv double %x, 0x7FEFFFFFFFFFFFFF + ret double %div +} diff --git a/test/CodeGen/X86/iv-users-in-other-loops.ll b/test/CodeGen/X86/iv-users-in-other-loops.ll deleted file mode 100644 index e51e61d..0000000 --- a/test/CodeGen/X86/iv-users-in-other-loops.ll +++ /dev/null @@ -1,299 +0,0 @@ -; RUN: llc < %s -mcpu=generic -march=x86-64 -enable-lsr-nested -o %t -; RUN: not grep inc %t -; RUN: grep dec %t | count 2 -; RUN: grep addq %t | count 12 -; RUN: not grep addb %t -; RUN: not grep leal %t -; RUN: not grep movq %t - -; IV users in each of the loops from other loops shouldn't cause LSR -; to insert new induction variables. Previously it would create a -; flood of new induction variables. -; Also, the loop reversal should kick in once. -; -; In this example, performing LSR on the entire loop nest, -; as opposed to only the inner loop can further reduce induction variables, -; and their related instructions and registers. - -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" -target triple = "x86_64-unknown-linux-gnu" - -define void @foo(float* %A, i32 %IA, float* %B, i32 %IB, float* nocapture %C, i32 %N) nounwind { -entry: - %0 = xor i32 %IA, 1 ; <i32> [#uses=1] - %1 = xor i32 %IB, 1 ; <i32> [#uses=1] - %2 = or i32 %1, %0 ; <i32> [#uses=1] - %3 = icmp eq i32 %2, 0 ; <i1> [#uses=1] - br i1 %3, label %bb2, label %bb13 - -bb: ; preds = %bb3 - %4 = load float* %A_addr.0, align 4 ; <float> [#uses=1] - %5 = load float* %B_addr.0, align 4 ; <float> [#uses=1] - %6 = fmul float %4, %5 ; <float> [#uses=1] - %7 = fadd float %6, %Sum0.0 ; <float> [#uses=1] - %indvar.next154 = add i64 %B_addr.0.rec, 1 ; <i64> [#uses=1] - br label %bb2 - -bb2: ; preds = %entry, %bb - %B_addr.0.rec = phi i64 [ %indvar.next154, %bb ], [ 0, %entry ] ; <i64> [#uses=14] - %Sum0.0 = phi float [ %7, %bb ], [ 0.000000e+00, %entry ] ; <float> [#uses=5] - %indvar146 = trunc i64 %B_addr.0.rec to i32 ; <i32> [#uses=1] - %N_addr.0 = sub i32 %N, %indvar146 ; <i32> [#uses=6] - %A_addr.0 = getelementptr float* %A, i64 %B_addr.0.rec ; <float*> [#uses=4] - %B_addr.0 = getelementptr float* %B, i64 %B_addr.0.rec ; <float*> [#uses=4] - %8 = icmp sgt i32 %N_addr.0, 0 ; <i1> [#uses=1] - br i1 %8, label %bb3, label %bb4 - -bb3: ; preds = %bb2 - %9 = ptrtoint float* %A_addr.0 to i64 ; <i64> [#uses=1] - %10 = and i64 %9, 15 ; <i64> [#uses=1] - %11 = icmp eq i64 %10, 0 ; <i1> [#uses=1] - br i1 %11, label %bb4, label %bb - -bb4: ; preds = %bb3, %bb2 - %12 = ptrtoint float* %B_addr.0 to i64 ; <i64> [#uses=1] - %13 = and i64 %12, 15 ; <i64> [#uses=1] - %14 = icmp eq i64 %13, 0 ; <i1> [#uses=1] - %15 = icmp sgt i32 %N_addr.0, 15 ; <i1> [#uses=2] - br i1 %14, label %bb6.preheader, label %bb10.preheader - -bb10.preheader: ; preds = %bb4 - br i1 %15, label %bb9, label %bb12.loopexit - -bb6.preheader: ; preds = %bb4 - br i1 %15, label %bb5, label %bb8.loopexit - -bb5: ; preds = %bb5, %bb6.preheader - %indvar143 = phi i64 [ 0, %bb6.preheader ], [ %indvar.next144, %bb5 ] ; <i64> [#uses=3] - %vSum0.072 = phi <4 x float> [ zeroinitializer, %bb6.preheader ], [ %21, %bb5 ] ; <<4 x float>> [#uses=1] - %vSum1.070 = phi <4 x float> [ zeroinitializer, %bb6.preheader ], [ %29, %bb5 ] ; <<4 x float>> [#uses=1] - %vSum2.069 = phi <4 x float> [ zeroinitializer, %bb6.preheader ], [ %37, %bb5 ] ; <<4 x float>> [#uses=1] - %vSum3.067 = phi <4 x float> [ zeroinitializer, %bb6.preheader ], [ %45, %bb5 ] ; <<4 x float>> [#uses=1] - %indvar145 = trunc i64 %indvar143 to i32 ; <i32> [#uses=1] - %tmp150 = mul i32 %indvar145, -16 ; <i32> [#uses=1] - %N_addr.268 = add i32 %tmp150, %N_addr.0 ; <i32> [#uses=1] - %A_addr.273.rec = shl i64 %indvar143, 4 ; <i64> [#uses=5] - %B_addr.0.sum180 = add i64 %B_addr.0.rec, %A_addr.273.rec ; <i64> [#uses=2] - %B_addr.271 = getelementptr float* %B, i64 %B_addr.0.sum180 ; <float*> [#uses=1] - %A_addr.273 = getelementptr float* %A, i64 %B_addr.0.sum180 ; <float*> [#uses=1] - tail call void asm sideeffect ";# foo", "~{dirflag},~{fpsr},~{flags}"() nounwind - %16 = bitcast float* %A_addr.273 to <4 x float>* ; <<4 x float>*> [#uses=1] - %17 = load <4 x float>* %16, align 16 ; <<4 x float>> [#uses=1] - %18 = bitcast float* %B_addr.271 to <4 x float>* ; <<4 x float>*> [#uses=1] - %19 = load <4 x float>* %18, align 16 ; <<4 x float>> [#uses=1] - %20 = fmul <4 x float> %17, %19 ; <<4 x float>> [#uses=1] - %21 = fadd <4 x float> %20, %vSum0.072 ; <<4 x float>> [#uses=2] - %A_addr.273.sum163 = or i64 %A_addr.273.rec, 4 ; <i64> [#uses=1] - %A_addr.0.sum175 = add i64 %B_addr.0.rec, %A_addr.273.sum163 ; <i64> [#uses=2] - %22 = getelementptr float* %A, i64 %A_addr.0.sum175 ; <float*> [#uses=1] - %23 = bitcast float* %22 to <4 x float>* ; <<4 x float>*> [#uses=1] - %24 = load <4 x float>* %23, align 16 ; <<4 x float>> [#uses=1] - %25 = getelementptr float* %B, i64 %A_addr.0.sum175 ; <float*> [#uses=1] - %26 = bitcast float* %25 to <4 x float>* ; <<4 x float>*> [#uses=1] - %27 = load <4 x float>* %26, align 16 ; <<4 x float>> [#uses=1] - %28 = fmul <4 x float> %24, %27 ; <<4 x float>> [#uses=1] - %29 = fadd <4 x float> %28, %vSum1.070 ; <<4 x float>> [#uses=2] - %A_addr.273.sum161 = or i64 %A_addr.273.rec, 8 ; <i64> [#uses=1] - %A_addr.0.sum174 = add i64 %B_addr.0.rec, %A_addr.273.sum161 ; <i64> [#uses=2] - %30 = getelementptr float* %A, i64 %A_addr.0.sum174 ; <float*> [#uses=1] - %31 = bitcast float* %30 to <4 x float>* ; <<4 x float>*> [#uses=1] - %32 = load <4 x float>* %31, align 16 ; <<4 x float>> [#uses=1] - %33 = getelementptr float* %B, i64 %A_addr.0.sum174 ; <float*> [#uses=1] - %34 = bitcast float* %33 to <4 x float>* ; <<4 x float>*> [#uses=1] - %35 = load <4 x float>* %34, align 16 ; <<4 x float>> [#uses=1] - %36 = fmul <4 x float> %32, %35 ; <<4 x float>> [#uses=1] - %37 = fadd <4 x float> %36, %vSum2.069 ; <<4 x float>> [#uses=2] - %A_addr.273.sum159 = or i64 %A_addr.273.rec, 12 ; <i64> [#uses=1] - %A_addr.0.sum173 = add i64 %B_addr.0.rec, %A_addr.273.sum159 ; <i64> [#uses=2] - %38 = getelementptr float* %A, i64 %A_addr.0.sum173 ; <float*> [#uses=1] - %39 = bitcast float* %38 to <4 x float>* ; <<4 x float>*> [#uses=1] - %40 = load <4 x float>* %39, align 16 ; <<4 x float>> [#uses=1] - %41 = getelementptr float* %B, i64 %A_addr.0.sum173 ; <float*> [#uses=1] - %42 = bitcast float* %41 to <4 x float>* ; <<4 x float>*> [#uses=1] - %43 = load <4 x float>* %42, align 16 ; <<4 x float>> [#uses=1] - %44 = fmul <4 x float> %40, %43 ; <<4 x float>> [#uses=1] - %45 = fadd <4 x float> %44, %vSum3.067 ; <<4 x float>> [#uses=2] - %.rec83 = add i64 %A_addr.273.rec, 16 ; <i64> [#uses=1] - %A_addr.0.sum172 = add i64 %B_addr.0.rec, %.rec83 ; <i64> [#uses=2] - %46 = getelementptr float* %A, i64 %A_addr.0.sum172 ; <float*> [#uses=1] - %47 = getelementptr float* %B, i64 %A_addr.0.sum172 ; <float*> [#uses=1] - %48 = add i32 %N_addr.268, -16 ; <i32> [#uses=2] - %49 = icmp sgt i32 %48, 15 ; <i1> [#uses=1] - %indvar.next144 = add i64 %indvar143, 1 ; <i64> [#uses=1] - br i1 %49, label %bb5, label %bb8.loopexit - -bb7: ; preds = %bb7, %bb8.loopexit - %indvar130 = phi i64 [ 0, %bb8.loopexit ], [ %indvar.next131, %bb7 ] ; <i64> [#uses=3] - %vSum0.260 = phi <4 x float> [ %vSum0.0.lcssa, %bb8.loopexit ], [ %55, %bb7 ] ; <<4 x float>> [#uses=1] - %indvar132 = trunc i64 %indvar130 to i32 ; <i32> [#uses=1] - %tmp133 = mul i32 %indvar132, -4 ; <i32> [#uses=1] - %N_addr.358 = add i32 %tmp133, %N_addr.2.lcssa ; <i32> [#uses=1] - %A_addr.361.rec = shl i64 %indvar130, 2 ; <i64> [#uses=3] - %B_addr.359 = getelementptr float* %B_addr.2.lcssa, i64 %A_addr.361.rec ; <float*> [#uses=1] - %A_addr.361 = getelementptr float* %A_addr.2.lcssa, i64 %A_addr.361.rec ; <float*> [#uses=1] - %50 = bitcast float* %A_addr.361 to <4 x float>* ; <<4 x float>*> [#uses=1] - %51 = load <4 x float>* %50, align 16 ; <<4 x float>> [#uses=1] - %52 = bitcast float* %B_addr.359 to <4 x float>* ; <<4 x float>*> [#uses=1] - %53 = load <4 x float>* %52, align 16 ; <<4 x float>> [#uses=1] - %54 = fmul <4 x float> %51, %53 ; <<4 x float>> [#uses=1] - %55 = fadd <4 x float> %54, %vSum0.260 ; <<4 x float>> [#uses=2] - %.rec85 = add i64 %A_addr.361.rec, 4 ; <i64> [#uses=2] - %56 = getelementptr float* %A_addr.2.lcssa, i64 %.rec85 ; <float*> [#uses=1] - %57 = getelementptr float* %B_addr.2.lcssa, i64 %.rec85 ; <float*> [#uses=1] - %58 = add i32 %N_addr.358, -4 ; <i32> [#uses=2] - %59 = icmp sgt i32 %58, 3 ; <i1> [#uses=1] - %indvar.next131 = add i64 %indvar130, 1 ; <i64> [#uses=1] - br i1 %59, label %bb7, label %bb13 - -bb8.loopexit: ; preds = %bb5, %bb6.preheader - %A_addr.2.lcssa = phi float* [ %A_addr.0, %bb6.preheader ], [ %46, %bb5 ] ; <float*> [#uses=3] - %vSum0.0.lcssa = phi <4 x float> [ zeroinitializer, %bb6.preheader ], [ %21, %bb5 ] ; <<4 x float>> [#uses=2] - %B_addr.2.lcssa = phi float* [ %B_addr.0, %bb6.preheader ], [ %47, %bb5 ] ; <float*> [#uses=3] - %vSum1.0.lcssa = phi <4 x float> [ zeroinitializer, %bb6.preheader ], [ %29, %bb5 ] ; <<4 x float>> [#uses=2] - %vSum2.0.lcssa = phi <4 x float> [ zeroinitializer, %bb6.preheader ], [ %37, %bb5 ] ; <<4 x float>> [#uses=2] - %N_addr.2.lcssa = phi i32 [ %N_addr.0, %bb6.preheader ], [ %48, %bb5 ] ; <i32> [#uses=3] - %vSum3.0.lcssa = phi <4 x float> [ zeroinitializer, %bb6.preheader ], [ %45, %bb5 ] ; <<4 x float>> [#uses=2] - %60 = icmp sgt i32 %N_addr.2.lcssa, 3 ; <i1> [#uses=1] - br i1 %60, label %bb7, label %bb13 - -bb9: ; preds = %bb9, %bb10.preheader - %indvar106 = phi i64 [ 0, %bb10.preheader ], [ %indvar.next107, %bb9 ] ; <i64> [#uses=3] - %vSum0.339 = phi <4 x float> [ zeroinitializer, %bb10.preheader ], [ %75, %bb9 ] ; <<4 x float>> [#uses=1] - %vSum1.237 = phi <4 x float> [ zeroinitializer, %bb10.preheader ], [ %80, %bb9 ] ; <<4 x float>> [#uses=1] - %vSum2.236 = phi <4 x float> [ zeroinitializer, %bb10.preheader ], [ %85, %bb9 ] ; <<4 x float>> [#uses=1] - %vSum3.234 = phi <4 x float> [ zeroinitializer, %bb10.preheader ], [ %90, %bb9 ] ; <<4 x float>> [#uses=1] - %indvar108 = trunc i64 %indvar106 to i32 ; <i32> [#uses=1] - %tmp113 = mul i32 %indvar108, -16 ; <i32> [#uses=1] - %N_addr.435 = add i32 %tmp113, %N_addr.0 ; <i32> [#uses=1] - %A_addr.440.rec = shl i64 %indvar106, 4 ; <i64> [#uses=5] - %B_addr.0.sum = add i64 %B_addr.0.rec, %A_addr.440.rec ; <i64> [#uses=2] - %B_addr.438 = getelementptr float* %B, i64 %B_addr.0.sum ; <float*> [#uses=1] - %A_addr.440 = getelementptr float* %A, i64 %B_addr.0.sum ; <float*> [#uses=1] - %61 = bitcast float* %B_addr.438 to <4 x float>* ; <i8*> [#uses=1] - %62 = load <4 x float>* %61, align 1 - %B_addr.438.sum169 = or i64 %A_addr.440.rec, 4 ; <i64> [#uses=1] - %B_addr.0.sum187 = add i64 %B_addr.0.rec, %B_addr.438.sum169 ; <i64> [#uses=2] - %63 = getelementptr float* %B, i64 %B_addr.0.sum187 ; <float*> [#uses=1] - %64 = bitcast float* %63 to <4 x float>* ; <i8*> [#uses=1] - %65 = load <4 x float>* %64, align 1 - %B_addr.438.sum168 = or i64 %A_addr.440.rec, 8 ; <i64> [#uses=1] - %B_addr.0.sum186 = add i64 %B_addr.0.rec, %B_addr.438.sum168 ; <i64> [#uses=2] - %66 = getelementptr float* %B, i64 %B_addr.0.sum186 ; <float*> [#uses=1] - %67 = bitcast float* %66 to <4 x float>* ; <i8*> [#uses=1] - %68 = load <4 x float>* %67, align 1 - %B_addr.438.sum167 = or i64 %A_addr.440.rec, 12 ; <i64> [#uses=1] - %B_addr.0.sum185 = add i64 %B_addr.0.rec, %B_addr.438.sum167 ; <i64> [#uses=2] - %69 = getelementptr float* %B, i64 %B_addr.0.sum185 ; <float*> [#uses=1] - %70 = bitcast float* %69 to <4 x float>* ; <i8*> [#uses=1] - %71 = load <4 x float>* %70, align 1 - %72 = bitcast float* %A_addr.440 to <4 x float>* ; <<4 x float>*> [#uses=1] - %73 = load <4 x float>* %72, align 16 ; <<4 x float>> [#uses=1] - %74 = fmul <4 x float> %73, %62 ; <<4 x float>> [#uses=1] - %75 = fadd <4 x float> %74, %vSum0.339 ; <<4 x float>> [#uses=2] - %76 = getelementptr float* %A, i64 %B_addr.0.sum187 ; <float*> [#uses=1] - %77 = bitcast float* %76 to <4 x float>* ; <<4 x float>*> [#uses=1] - %78 = load <4 x float>* %77, align 16 ; <<4 x float>> [#uses=1] - %79 = fmul <4 x float> %78, %65 ; <<4 x float>> [#uses=1] - %80 = fadd <4 x float> %79, %vSum1.237 ; <<4 x float>> [#uses=2] - %81 = getelementptr float* %A, i64 %B_addr.0.sum186 ; <float*> [#uses=1] - %82 = bitcast float* %81 to <4 x float>* ; <<4 x float>*> [#uses=1] - %83 = load <4 x float>* %82, align 16 ; <<4 x float>> [#uses=1] - %84 = fmul <4 x float> %83, %68 ; <<4 x float>> [#uses=1] - %85 = fadd <4 x float> %84, %vSum2.236 ; <<4 x float>> [#uses=2] - %86 = getelementptr float* %A, i64 %B_addr.0.sum185 ; <float*> [#uses=1] - %87 = bitcast float* %86 to <4 x float>* ; <<4 x float>*> [#uses=1] - %88 = load <4 x float>* %87, align 16 ; <<4 x float>> [#uses=1] - %89 = fmul <4 x float> %88, %71 ; <<4 x float>> [#uses=1] - %90 = fadd <4 x float> %89, %vSum3.234 ; <<4 x float>> [#uses=2] - %.rec89 = add i64 %A_addr.440.rec, 16 ; <i64> [#uses=1] - %A_addr.0.sum170 = add i64 %B_addr.0.rec, %.rec89 ; <i64> [#uses=2] - %91 = getelementptr float* %A, i64 %A_addr.0.sum170 ; <float*> [#uses=1] - %92 = getelementptr float* %B, i64 %A_addr.0.sum170 ; <float*> [#uses=1] - %93 = add i32 %N_addr.435, -16 ; <i32> [#uses=2] - %94 = icmp sgt i32 %93, 15 ; <i1> [#uses=1] - %indvar.next107 = add i64 %indvar106, 1 ; <i64> [#uses=1] - br i1 %94, label %bb9, label %bb12.loopexit - -bb11: ; preds = %bb11, %bb12.loopexit - %indvar = phi i64 [ 0, %bb12.loopexit ], [ %indvar.next, %bb11 ] ; <i64> [#uses=3] - %vSum0.428 = phi <4 x float> [ %vSum0.3.lcssa, %bb12.loopexit ], [ %100, %bb11 ] ; <<4 x float>> [#uses=1] - %indvar96 = trunc i64 %indvar to i32 ; <i32> [#uses=1] - %tmp = mul i32 %indvar96, -4 ; <i32> [#uses=1] - %N_addr.526 = add i32 %tmp, %N_addr.4.lcssa ; <i32> [#uses=1] - %A_addr.529.rec = shl i64 %indvar, 2 ; <i64> [#uses=3] - %B_addr.527 = getelementptr float* %B_addr.4.lcssa, i64 %A_addr.529.rec ; <float*> [#uses=1] - %A_addr.529 = getelementptr float* %A_addr.4.lcssa, i64 %A_addr.529.rec ; <float*> [#uses=1] - %95 = bitcast float* %B_addr.527 to <4 x float>* ; <i8*> [#uses=1] - %96 = load <4 x float>* %95, align 1 - %97 = bitcast float* %A_addr.529 to <4 x float>* ; <<4 x float>*> [#uses=1] - %98 = load <4 x float>* %97, align 16 ; <<4 x float>> [#uses=1] - %99 = fmul <4 x float> %98, %96 ; <<4 x float>> [#uses=1] - %100 = fadd <4 x float> %99, %vSum0.428 ; <<4 x float>> [#uses=2] - %.rec91 = add i64 %A_addr.529.rec, 4 ; <i64> [#uses=2] - %101 = getelementptr float* %A_addr.4.lcssa, i64 %.rec91 ; <float*> [#uses=1] - %102 = getelementptr float* %B_addr.4.lcssa, i64 %.rec91 ; <float*> [#uses=1] - %103 = add i32 %N_addr.526, -4 ; <i32> [#uses=2] - %104 = icmp sgt i32 %103, 3 ; <i1> [#uses=1] - %indvar.next = add i64 %indvar, 1 ; <i64> [#uses=1] - br i1 %104, label %bb11, label %bb13 - -bb12.loopexit: ; preds = %bb9, %bb10.preheader - %A_addr.4.lcssa = phi float* [ %A_addr.0, %bb10.preheader ], [ %91, %bb9 ] ; <float*> [#uses=3] - %vSum0.3.lcssa = phi <4 x float> [ zeroinitializer, %bb10.preheader ], [ %75, %bb9 ] ; <<4 x float>> [#uses=2] - %B_addr.4.lcssa = phi float* [ %B_addr.0, %bb10.preheader ], [ %92, %bb9 ] ; <float*> [#uses=3] - %vSum1.2.lcssa = phi <4 x float> [ zeroinitializer, %bb10.preheader ], [ %80, %bb9 ] ; <<4 x float>> [#uses=2] - %vSum2.2.lcssa = phi <4 x float> [ zeroinitializer, %bb10.preheader ], [ %85, %bb9 ] ; <<4 x float>> [#uses=2] - %N_addr.4.lcssa = phi i32 [ %N_addr.0, %bb10.preheader ], [ %93, %bb9 ] ; <i32> [#uses=3] - %vSum3.2.lcssa = phi <4 x float> [ zeroinitializer, %bb10.preheader ], [ %90, %bb9 ] ; <<4 x float>> [#uses=2] - %105 = icmp sgt i32 %N_addr.4.lcssa, 3 ; <i1> [#uses=1] - br i1 %105, label %bb11, label %bb13 - -bb13: ; preds = %bb12.loopexit, %bb11, %bb8.loopexit, %bb7, %entry - %Sum0.1 = phi float [ 0.000000e+00, %entry ], [ %Sum0.0, %bb7 ], [ %Sum0.0, %bb8.loopexit ], [ %Sum0.0, %bb11 ], [ %Sum0.0, %bb12.loopexit ] ; <float> [#uses=1] - %vSum3.1 = phi <4 x float> [ zeroinitializer, %entry ], [ %vSum3.0.lcssa, %bb7 ], [ %vSum3.0.lcssa, %bb8.loopexit ], [ %vSum3.2.lcssa, %bb11 ], [ %vSum3.2.lcssa, %bb12.loopexit ] ; <<4 x float>> [#uses=1] - %N_addr.1 = phi i32 [ %N, %entry ], [ %N_addr.2.lcssa, %bb8.loopexit ], [ %58, %bb7 ], [ %N_addr.4.lcssa, %bb12.loopexit ], [ %103, %bb11 ] ; <i32> [#uses=2] - %vSum2.1 = phi <4 x float> [ zeroinitializer, %entry ], [ %vSum2.0.lcssa, %bb7 ], [ %vSum2.0.lcssa, %bb8.loopexit ], [ %vSum2.2.lcssa, %bb11 ], [ %vSum2.2.lcssa, %bb12.loopexit ] ; <<4 x float>> [#uses=1] - %vSum1.1 = phi <4 x float> [ zeroinitializer, %entry ], [ %vSum1.0.lcssa, %bb7 ], [ %vSum1.0.lcssa, %bb8.loopexit ], [ %vSum1.2.lcssa, %bb11 ], [ %vSum1.2.lcssa, %bb12.loopexit ] ; <<4 x float>> [#uses=1] - %B_addr.1 = phi float* [ %B, %entry ], [ %B_addr.2.lcssa, %bb8.loopexit ], [ %57, %bb7 ], [ %B_addr.4.lcssa, %bb12.loopexit ], [ %102, %bb11 ] ; <float*> [#uses=1] - %vSum0.1 = phi <4 x float> [ zeroinitializer, %entry ], [ %vSum0.0.lcssa, %bb8.loopexit ], [ %55, %bb7 ], [ %vSum0.3.lcssa, %bb12.loopexit ], [ %100, %bb11 ] ; <<4 x float>> [#uses=1] - %A_addr.1 = phi float* [ %A, %entry ], [ %A_addr.2.lcssa, %bb8.loopexit ], [ %56, %bb7 ], [ %A_addr.4.lcssa, %bb12.loopexit ], [ %101, %bb11 ] ; <float*> [#uses=1] - %106 = fadd <4 x float> %vSum0.1, %vSum2.1 ; <<4 x float>> [#uses=1] - %107 = fadd <4 x float> %vSum1.1, %vSum3.1 ; <<4 x float>> [#uses=1] - %108 = fadd <4 x float> %106, %107 ; <<4 x float>> [#uses=4] - %tmp23 = extractelement <4 x float> %108, i32 0 ; <float> [#uses=1] - %tmp21 = extractelement <4 x float> %108, i32 1 ; <float> [#uses=1] - %109 = fadd float %tmp23, %tmp21 ; <float> [#uses=1] - %tmp19 = extractelement <4 x float> %108, i32 2 ; <float> [#uses=1] - %tmp17 = extractelement <4 x float> %108, i32 3 ; <float> [#uses=1] - %110 = fadd float %tmp19, %tmp17 ; <float> [#uses=1] - %111 = fadd float %109, %110 ; <float> [#uses=1] - %Sum0.254 = fadd float %111, %Sum0.1 ; <float> [#uses=2] - %112 = icmp sgt i32 %N_addr.1, 0 ; <i1> [#uses=1] - br i1 %112, label %bb.nph56, label %bb16 - -bb.nph56: ; preds = %bb13 - %tmp. = zext i32 %N_addr.1 to i64 ; <i64> [#uses=1] - br label %bb14 - -bb14: ; preds = %bb14, %bb.nph56 - %indvar117 = phi i64 [ 0, %bb.nph56 ], [ %indvar.next118, %bb14 ] ; <i64> [#uses=3] - %Sum0.255 = phi float [ %Sum0.254, %bb.nph56 ], [ %Sum0.2, %bb14 ] ; <float> [#uses=1] - %tmp.122 = sext i32 %IB to i64 ; <i64> [#uses=1] - %B_addr.652.rec = mul i64 %indvar117, %tmp.122 ; <i64> [#uses=1] - %tmp.124 = sext i32 %IA to i64 ; <i64> [#uses=1] - %A_addr.653.rec = mul i64 %indvar117, %tmp.124 ; <i64> [#uses=1] - %B_addr.652 = getelementptr float* %B_addr.1, i64 %B_addr.652.rec ; <float*> [#uses=1] - %A_addr.653 = getelementptr float* %A_addr.1, i64 %A_addr.653.rec ; <float*> [#uses=1] - %113 = load float* %A_addr.653, align 4 ; <float> [#uses=1] - %114 = load float* %B_addr.652, align 4 ; <float> [#uses=1] - %115 = fmul float %113, %114 ; <float> [#uses=1] - %Sum0.2 = fadd float %115, %Sum0.255 ; <float> [#uses=2] - %indvar.next118 = add i64 %indvar117, 1 ; <i64> [#uses=2] - %exitcond = icmp eq i64 %indvar.next118, %tmp. ; <i1> [#uses=1] - br i1 %exitcond, label %bb16, label %bb14 - -bb16: ; preds = %bb14, %bb13 - %Sum0.2.lcssa = phi float [ %Sum0.254, %bb13 ], [ %Sum0.2, %bb14 ] ; <float> [#uses=1] - store float %Sum0.2.lcssa, float* %C, align 4 - ret void -} diff --git a/test/CodeGen/X86/licm-dominance.ll b/test/CodeGen/X86/licm-dominance.ll index 8a0958d..019f8a3 100644 --- a/test/CodeGen/X86/licm-dominance.ll +++ b/test/CodeGen/X86/licm-dominance.ll @@ -1,7 +1,7 @@ -; RUN: llc -asm-verbose=false < %s | FileCheck %s +; RUN: llc -asm-verbose=true < %s | FileCheck %s ; MachineLICM should check dominance before hoisting instructions. -; CHECK: jne LBB0_3 +; CHECK: ## in Loop: ; CHECK-NEXT: xorb %al, %al ; CHECK-NEXT: testb %al, %al diff --git a/test/CodeGen/X86/lit.local.cfg b/test/CodeGen/X86/lit.local.cfg index b05ed3c..a8ad0f1 100644 --- a/test/CodeGen/X86/lit.local.cfg +++ b/test/CodeGen/X86/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll', '.c', '.cpp'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'X86' in targets: config.unsupported = True diff --git a/test/CodeGen/X86/loop-blocks.ll b/test/CodeGen/X86/loop-blocks.ll index faba630..d14102f 100644 --- a/test/CodeGen/X86/loop-blocks.ll +++ b/test/CodeGen/X86/loop-blocks.ll @@ -41,6 +41,7 @@ done: ; CHECK-NEXT: align ; CHECK-NEXT: .LBB1_4: ; CHECK-NEXT: callq bar99 +; CHECK-NEXT: align ; CHECK-NEXT: .LBB1_1: ; CHECK-NEXT: callq body @@ -75,19 +76,21 @@ exit: ; CHECK: yet_more_involved: ; CHECK: jmp .LBB2_1 ; CHECK-NEXT: align -; CHECK-NEXT: .LBB2_4: -; CHECK-NEXT: callq bar99 +; CHECK-NEXT: .LBB2_5: +; CHECK-NEXT: callq block_a_true_func +; CHECK-NEXT: callq block_a_merge_func +; CHECK-NEXT: align +; CHECK-NEXT: .LBB2_1: +; CHECK-NEXT: callq body +; +; LBB2_4 +; CHECK: callq bar99 ; CHECK-NEXT: callq get ; CHECK-NEXT: cmpl $2999, %eax ; CHECK-NEXT: jle .LBB2_5 ; CHECK-NEXT: callq block_a_false_func ; CHECK-NEXT: callq block_a_merge_func ; CHECK-NEXT: jmp .LBB2_1 -; CHECK-NEXT: .LBB2_5: -; CHECK-NEXT: callq block_a_true_func -; CHECK-NEXT: callq block_a_merge_func -; CHECK-NEXT: .LBB2_1: -; CHECK-NEXT: callq body define void @yet_more_involved() nounwind { entry: @@ -136,17 +139,22 @@ exit: ; CHECK-NEXT: align ; CHECK-NEXT: .LBB3_7: ; CHECK-NEXT: callq bar100 -; CHECK-NEXT: jmp .LBB3_1 -; CHECK-NEXT: .LBB3_8: +; CHECK-NEXT: align +; CHECK-NEXT: .LBB3_1: +; CHECK-NEXT: callq loop_header +; CHECK: jl .LBB3_7 +; CHECK: jge .LBB3_3 ; CHECK-NEXT: callq bar101 ; CHECK-NEXT: jmp .LBB3_1 -; CHECK-NEXT: .LBB3_9: +; CHECK-NEXT: .LBB3_3: +; CHECK: jge .LBB3_4 ; CHECK-NEXT: callq bar102 ; CHECK-NEXT: jmp .LBB3_1 -; CHECK-NEXT: .LBB3_5: +; CHECK-NEXT: .LBB3_4: +; CHECK: jl .LBB3_6 ; CHECK-NEXT: callq loop_latch -; CHECK-NEXT: .LBB3_1: -; CHECK-NEXT: callq loop_header +; CHECK-NEXT: jmp .LBB3_1 +; CHECK-NEXT: .LBB3_6: define void @cfg_islands() nounwind { entry: diff --git a/test/CodeGen/X86/loop-strength-reduce3.ll b/test/CodeGen/X86/loop-strength-reduce3.ll deleted file mode 100644 index d6c265f..0000000 --- a/test/CodeGen/X86/loop-strength-reduce3.ll +++ /dev/null @@ -1,37 +0,0 @@ -; RUN: llc < %s -march=x86 -enable-lsr-nested | grep cmp | grep 240 -; RUN: llc < %s -march=x86 -enable-lsr-nested | grep inc | count 1 - -define i32 @foo(i32 %A, i32 %B, i32 %C, i32 %D) nounwind { -entry: - %tmp2955 = icmp sgt i32 %C, 0 ; <i1> [#uses=1] - br i1 %tmp2955, label %bb26.outer.us, label %bb40.split - -bb26.outer.us: ; preds = %bb26.bb32_crit_edge.us, %entry - %i.044.0.ph.us = phi i32 [ 0, %entry ], [ %indvar.next57, %bb26.bb32_crit_edge.us ] ; <i32> [#uses=2] - %k.1.ph.us = phi i32 [ 0, %entry ], [ %k.0.us, %bb26.bb32_crit_edge.us ] ; <i32> [#uses=1] - %tmp3.us = mul i32 %i.044.0.ph.us, 6 ; <i32> [#uses=1] - br label %bb1.us - -bb1.us: ; preds = %bb1.us, %bb26.outer.us - %j.053.us = phi i32 [ 0, %bb26.outer.us ], [ %tmp25.us, %bb1.us ] ; <i32> [#uses=2] - %k.154.us = phi i32 [ %k.1.ph.us, %bb26.outer.us ], [ %k.0.us, %bb1.us ] ; <i32> [#uses=1] - %tmp5.us = add i32 %tmp3.us, %j.053.us ; <i32> [#uses=1] - %tmp7.us = shl i32 %D, %tmp5.us ; <i32> [#uses=2] - %tmp9.us = icmp eq i32 %tmp7.us, %B ; <i1> [#uses=1] - %tmp910.us = zext i1 %tmp9.us to i32 ; <i32> [#uses=1] - %tmp12.us = and i32 %tmp7.us, %A ; <i32> [#uses=1] - %tmp19.us = and i32 %tmp12.us, %tmp910.us ; <i32> [#uses=1] - %k.0.us = add i32 %tmp19.us, %k.154.us ; <i32> [#uses=3] - %tmp25.us = add i32 %j.053.us, 1 ; <i32> [#uses=2] - %tmp29.us = icmp slt i32 %tmp25.us, %C ; <i1> [#uses=1] - br i1 %tmp29.us, label %bb1.us, label %bb26.bb32_crit_edge.us - -bb26.bb32_crit_edge.us: ; preds = %bb1.us - %indvar.next57 = add i32 %i.044.0.ph.us, 1 ; <i32> [#uses=2] - %exitcond = icmp eq i32 %indvar.next57, 40 ; <i1> [#uses=1] - br i1 %exitcond, label %bb40.split, label %bb26.outer.us - -bb40.split: ; preds = %bb26.bb32_crit_edge.us, %entry - %k.1.lcssa.lcssa.us-lcssa = phi i32 [ %k.0.us, %bb26.bb32_crit_edge.us ], [ 0, %entry ] ; <i32> [#uses=1] - ret i32 %k.1.lcssa.lcssa.us-lcssa -} diff --git a/test/CodeGen/X86/lsr-loop-exit-cond.ll b/test/CodeGen/X86/lsr-loop-exit-cond.ll index bdf09df..ebda9f2 100644 --- a/test/CodeGen/X86/lsr-loop-exit-cond.ll +++ b/test/CodeGen/X86/lsr-loop-exit-cond.ll @@ -1,5 +1,6 @@ ; RUN: llc -mtriple=x86_64-darwin < %s | FileCheck %s +; CHECK: t: ; CHECK: decq ; CHECK-NEXT: movl ( ; CHECK-NEXT: jne @@ -136,3 +137,44 @@ bb2: ; preds = %bb store i8 %92, i8* %93, align 1 ret void } + +; Check that DAGCombiner doesn't mess up the IV update when the exiting value +; is equal to the stride. +; It must not fold (cmp (add iv, 1), 1) --> (cmp iv, 0). + +; CHECK: f: +; CHECK: %for.body +; CHECK: incl [[IV:%e..]] +; CHECK: cmpl $1, [[IV]] +; CHECK: jne +; CHECK: ret + +define i32 @f(i32 %i, i32* nocapture %a) nounwind uwtable readonly ssp { +entry: + %cmp4 = icmp eq i32 %i, 1 + br i1 %cmp4, label %for.end, label %for.body.lr.ph + +for.body.lr.ph: ; preds = %entry + %0 = sext i32 %i to i64 + br label %for.body + +for.body: ; preds = %for.body.lr.ph, %for.body + %indvars.iv = phi i64 [ %0, %for.body.lr.ph ], [ %indvars.iv.next, %for.body ] + %bi.06 = phi i32 [ 0, %for.body.lr.ph ], [ %i.addr.0.bi.0, %for.body ] + %b.05 = phi i32 [ 0, %for.body.lr.ph ], [ %.b.0, %for.body ] + %arrayidx = getelementptr inbounds i32* %a, i64 %indvars.iv + %1 = load i32* %arrayidx, align 4 + %cmp1 = icmp ugt i32 %1, %b.05 + %.b.0 = select i1 %cmp1, i32 %1, i32 %b.05 + %2 = trunc i64 %indvars.iv to i32 + %i.addr.0.bi.0 = select i1 %cmp1, i32 %2, i32 %bi.06 + %indvars.iv.next = add i64 %indvars.iv, 1 + %lftr.wideiv = trunc i64 %indvars.iv.next to i32 + %exitcond = icmp eq i32 %lftr.wideiv, 1 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body, %entry + %bi.0.lcssa = phi i32 [ 0, %entry ], [ %i.addr.0.bi.0, %for.body ] + ret i32 %bi.0.lcssa +} + diff --git a/test/CodeGen/X86/machine-cp.ll b/test/CodeGen/X86/machine-cp.ll index 54fa01c..8e97b99 100644 --- a/test/CodeGen/X86/machine-cp.ll +++ b/test/CodeGen/X86/machine-cp.ll @@ -5,11 +5,11 @@ define i32 @t1(i32 %a, i32 %b) nounwind { entry: ; CHECK: t1: -; CHECK: jne +; CHECK: je [[LABEL:.*BB.*]] %cmp1 = icmp eq i32 %b, 0 br i1 %cmp1, label %while.end, label %while.body -; CHECK: BB +; CHECK: [[LABEL]]: ; CHECK-NOT: mov ; CHECK: ret diff --git a/test/CodeGen/X86/misched-new.ll b/test/CodeGen/X86/misched-new.ll index f3c2af8..8f2f6f7 100644 --- a/test/CodeGen/X86/misched-new.ll +++ b/test/CodeGen/X86/misched-new.ll @@ -1,8 +1,10 @@ ; RUN: llc -march=x86-64 -mcpu=core2 -enable-misched -misched=shuffle -misched-bottomup < %s -; XFAIL: * -; ...should pass. See PR12324: misched bringup +; REQUIRES: asserts ; ; Interesting MachineScheduler cases. +; +; FIXME: There should be an assert in the coalescer that we're not rematting +; "not-quite-dead" copies, but that breaks a lot of tests <rdar://problem/11148682>. declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind diff --git a/test/CodeGen/X86/postra-licm.ll b/test/CodeGen/X86/postra-licm.ll index 48c48ae..01d6cbe 100644 --- a/test/CodeGen/X86/postra-licm.ll +++ b/test/CodeGen/X86/postra-licm.ll @@ -70,8 +70,8 @@ bb26.preheader: ; preds = %imix_test.exit bb23: ; preds = %imix_test.exit unreachable ; Verify that there are no loads inside the loop. -; X86-32: %bb26.preheader ; X86-32: .align 4 +; X86-32: %bb28 ; X86-32-NOT: (%esp), ; X86-32-NOT: (%ebp), ; X86-32: jmp diff --git a/test/CodeGen/X86/pr12360.ll b/test/CodeGen/X86/pr12360.ll new file mode 100644 index 0000000..f29e50e --- /dev/null +++ b/test/CodeGen/X86/pr12360.ll @@ -0,0 +1,46 @@ +; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s + +define zeroext i1 @f1(i8* %x) { +; CHECK: f1: +; CHECK: movb (%rdi), %al +; CHECK-NEXT: ret + +entry: + %0 = load i8* %x, align 1, !range !0 + %tobool = trunc i8 %0 to i1 + ret i1 %tobool +} + +define zeroext i1 @f2(i8* %x) { +; CHECK: f2: +; CHECK: movb (%rdi), %al +; CHECK-NEXT: ret + +entry: + %0 = load i8* %x, align 1, !range !0 + %tobool = icmp ne i8 %0, 0 + ret i1 %tobool +} + +!0 = metadata !{i8 0, i8 2} + + +; check that we don't build a "trunc" from i1 to i1, which would assert. +define zeroext i1 @f3(i1 %x) { +; CHECK: f3: + +entry: + %tobool = icmp ne i1 %x, 0 + ret i1 %tobool +} + +; check that we don't build a trunc when other bits are needed +define zeroext i1 @f4(i32 %x) { +; CHECK: f4: +; CHECK: and + +entry: + %y = and i32 %x, 32768 + %z = icmp ne i32 %y, 0 + ret i1 %z +} diff --git a/test/CodeGen/X86/pr2659.ll b/test/CodeGen/X86/pr2659.ll index 5dab5c9..8003588 100644 --- a/test/CodeGen/X86/pr2659.ll +++ b/test/CodeGen/X86/pr2659.ll @@ -18,11 +18,12 @@ forcond.preheader: ; preds = %entry ; CHECK-NOT: xorl ; CHECK-NOT: movl ; CHECK-NOT: LBB -; CHECK: jne +; CHECK: je ; There should be no moves required in the for loop body. ; CHECK: %forbody ; CHECK-NOT: mov +; CHECK: jbe ifthen: ; preds = %entry ret i32 0 diff --git a/test/CodeGen/X86/pr3495.ll b/test/CodeGen/X86/pr3495.ll deleted file mode 100644 index 1ce3b49..0000000 --- a/test/CodeGen/X86/pr3495.ll +++ /dev/null @@ -1,79 +0,0 @@ -; RUN: llc < %s -march=x86 -stats -enable-lsr-nested |& grep {Number of spill slots allocated} | grep 1 -; PR3495 -; -; Note: this should not spill at all with either good LSR or good regalloc. - -target triple = "i386-pc-linux-gnu" -@x = external global [8 x i32], align 32 ; <[8 x i32]*> [#uses=1] -@rows = external global [8 x i32], align 32 ; <[8 x i32]*> [#uses=2] -@up = external global [15 x i32], align 32 ; <[15 x i32]*> [#uses=2] -@down = external global [15 x i32], align 32 ; <[15 x i32]*> [#uses=1] - -define i32 @queens(i32 %c) nounwind { -entry: - %tmp91 = add i32 %c, 1 ; <i32> [#uses=3] - %tmp135 = getelementptr [8 x i32]* @x, i32 0, i32 %tmp91 ; <i32*> [#uses=1] - br label %bb - -bb: ; preds = %bb569, %entry - %r25.0.reg2mem.0 = phi i32 [ 0, %entry ], [ %indvar.next715, %bb569 ] ; <i32> [#uses=4] - %tmp27 = getelementptr [8 x i32]* @rows, i32 0, i32 %r25.0.reg2mem.0 ; <i32*> [#uses=1] - %tmp28 = load i32* %tmp27, align 4 ; <i32> [#uses=1] - %tmp29 = icmp eq i32 %tmp28, 0 ; <i1> [#uses=1] - br i1 %tmp29, label %bb569, label %bb31 - -bb31: ; preds = %bb - %tmp35 = sub i32 %r25.0.reg2mem.0, 0 ; <i32> [#uses=1] - %tmp36 = getelementptr [15 x i32]* @up, i32 0, i32 %tmp35 ; <i32*> [#uses=1] - %tmp37 = load i32* %tmp36, align 4 ; <i32> [#uses=1] - %tmp38 = icmp eq i32 %tmp37, 0 ; <i1> [#uses=1] - br i1 %tmp38, label %bb569, label %bb41 - -bb41: ; preds = %bb31 - %tmp54 = sub i32 %r25.0.reg2mem.0, %c ; <i32> [#uses=1] - %tmp55 = add i32 %tmp54, 7 ; <i32> [#uses=1] - %tmp62 = getelementptr [15 x i32]* @up, i32 0, i32 %tmp55 ; <i32*> [#uses=2] - store i32 0, i32* %tmp62, align 4 - br label %bb92 - -bb92: ; preds = %bb545, %bb41 - %r20.0.reg2mem.0 = phi i32 [ 0, %bb41 ], [ %indvar.next711, %bb545 ] ; <i32> [#uses=5] - %tmp94 = getelementptr [8 x i32]* @rows, i32 0, i32 %r20.0.reg2mem.0 ; <i32*> [#uses=1] - %tmp95 = load i32* %tmp94, align 4 ; <i32> [#uses=0] - %tmp112 = add i32 %r20.0.reg2mem.0, %tmp91 ; <i32> [#uses=1] - %tmp113 = getelementptr [15 x i32]* @down, i32 0, i32 %tmp112 ; <i32*> [#uses=2] - %tmp114 = load i32* %tmp113, align 4 ; <i32> [#uses=1] - %tmp115 = icmp eq i32 %tmp114, 0 ; <i1> [#uses=1] - br i1 %tmp115, label %bb545, label %bb118 - -bb118: ; preds = %bb92 - %tmp122 = sub i32 %r20.0.reg2mem.0, %tmp91 ; <i32> [#uses=0] - store i32 0, i32* %tmp113, align 4 - store i32 %r20.0.reg2mem.0, i32* %tmp135, align 4 - br label %bb142 - -bb142: ; preds = %bb142, %bb118 - %k18.0.reg2mem.0 = phi i32 [ 0, %bb118 ], [ %indvar.next709, %bb142 ] ; <i32> [#uses=1] - %indvar.next709 = add i32 %k18.0.reg2mem.0, 1 ; <i32> [#uses=2] - %exitcond710 = icmp eq i32 %indvar.next709, 8 ; <i1> [#uses=1] - br i1 %exitcond710, label %bb155, label %bb142 - -bb155: ; preds = %bb142 - %tmp156 = tail call i32 @putchar(i32 10) nounwind ; <i32> [#uses=0] - br label %bb545 - -bb545: ; preds = %bb155, %bb92 - %indvar.next711 = add i32 %r20.0.reg2mem.0, 1 ; <i32> [#uses=2] - %exitcond712 = icmp eq i32 %indvar.next711, 8 ; <i1> [#uses=1] - br i1 %exitcond712, label %bb553, label %bb92 - -bb553: ; preds = %bb545 - store i32 1, i32* %tmp62, align 4 - br label %bb569 - -bb569: ; preds = %bb553, %bb31, %bb - %indvar.next715 = add i32 %r25.0.reg2mem.0, 1 ; <i32> [#uses=1] - br label %bb -} - -declare i32 @putchar(i32) diff --git a/test/CodeGen/X86/rd-mod-wr-eflags.ll b/test/CodeGen/X86/rd-mod-wr-eflags.ll new file mode 100644 index 0000000..faca3d7 --- /dev/null +++ b/test/CodeGen/X86/rd-mod-wr-eflags.ll @@ -0,0 +1,179 @@ +; RUN: llc < %s -march=x86-64 | FileCheck %s + +%struct.obj = type { i64 } + +; CHECK: _Z7releaseP3obj +define void @_Z7releaseP3obj(%struct.obj* nocapture %o) nounwind uwtable ssp { +entry: +; CHECK: decq (%{{rdi|rcx}}) +; CHECK-NEXT: je + %refcnt = getelementptr inbounds %struct.obj* %o, i64 0, i32 0 + %0 = load i64* %refcnt, align 8, !tbaa !0 + %dec = add i64 %0, -1 + store i64 %dec, i64* %refcnt, align 8, !tbaa !0 + %tobool = icmp eq i64 %dec, 0 + br i1 %tobool, label %if.end, label %return + +if.end: ; preds = %entry + %1 = bitcast %struct.obj* %o to i8* + tail call void @free(i8* %1) + br label %return + +return: ; preds = %entry, %if.end + ret void +} + +@c = common global i64 0, align 8 +@a = common global i32 0, align 4 +@.str = private unnamed_addr constant [5 x i8] c"%ld\0A\00", align 1 +@b = common global i32 0, align 4 + +; CHECK: test +define i32 @test() nounwind uwtable ssp { +entry: +; CHECK: decq +; CHECK-NOT: decq +%0 = load i64* @c, align 8, !tbaa !0 +%dec.i = add nsw i64 %0, -1 +store i64 %dec.i, i64* @c, align 8, !tbaa !0 +%tobool.i = icmp ne i64 %dec.i, 0 +%lor.ext.i = zext i1 %tobool.i to i32 +store i32 %lor.ext.i, i32* @a, align 4, !tbaa !3 +%call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i64 0, i64 0), i64 %dec.i) nounwind +ret i32 0 +} + +; CHECK: test2 +define i32 @test2() nounwind uwtable ssp { +entry: +; CHECK-NOT: decq ({{.*}}) +%0 = load i64* @c, align 8, !tbaa !0 +%dec.i = add nsw i64 %0, -1 +store i64 %dec.i, i64* @c, align 8, !tbaa !0 +%tobool.i = icmp ne i64 %0, 0 +%lor.ext.i = zext i1 %tobool.i to i32 +store i32 %lor.ext.i, i32* @a, align 4, !tbaa !3 +%call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([5 x i8]* @.str, i64 0, i64 0), i64 %dec.i) nounwind +ret i32 0 +} + +declare i32 @printf(i8* nocapture, ...) nounwind + +declare void @free(i8* nocapture) nounwind + +!0 = metadata !{metadata !"long", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA", null} +!3 = metadata !{metadata !"int", metadata !1} + +%struct.obj2 = type { i64, i32, i16, i8 } + +declare void @other(%struct.obj2* ) nounwind; + +; CHECK: example_dec +define void @example_dec(%struct.obj2* %o) nounwind uwtable ssp { +; 64 bit dec +entry: + %s64 = getelementptr inbounds %struct.obj2* %o, i64 0, i32 0 +; CHECK-NOT: load + %0 = load i64* %s64, align 8 +; CHECK: decq ({{.*}}) + %dec = add i64 %0, -1 + store i64 %dec, i64* %s64, align 8 + %tobool = icmp eq i64 %dec, 0 + br i1 %tobool, label %if.end, label %return + +; 32 bit dec +if.end: + %s32 = getelementptr inbounds %struct.obj2* %o, i64 0, i32 1 +; CHECK-NOT: load + %1 = load i32* %s32, align 4 +; CHECK: decl {{[0-9][0-9]*}}({{.*}}) + %dec1 = add i32 %1, -1 + store i32 %dec1, i32* %s32, align 4 + %tobool2 = icmp eq i32 %dec1, 0 + br i1 %tobool2, label %if.end1, label %return + +; 16 bit dec +if.end1: + %s16 = getelementptr inbounds %struct.obj2* %o, i64 0, i32 2 +; CHECK-NOT: load + %2 = load i16* %s16, align 2 +; CHECK: decw {{[0-9][0-9]*}}({{.*}}) + %dec2 = add i16 %2, -1 + store i16 %dec2, i16* %s16, align 2 + %tobool3 = icmp eq i16 %dec2, 0 + br i1 %tobool3, label %if.end2, label %return + +; 8 bit dec +if.end2: + %s8 = getelementptr inbounds %struct.obj2* %o, i64 0, i32 3 +; CHECK-NOT: load + %3 = load i8* %s8 +; CHECK: decb {{[0-9][0-9]*}}({{.*}}) + %dec3 = add i8 %3, -1 + store i8 %dec3, i8* %s8 + %tobool4 = icmp eq i8 %dec3, 0 + br i1 %tobool4, label %if.end4, label %return + +if.end4: + tail call void @other(%struct.obj2* %o) nounwind + br label %return + +return: ; preds = %if.end4, %if.end, %entry + ret void +} + +; CHECK: example_inc +define void @example_inc(%struct.obj2* %o) nounwind uwtable ssp { +; 64 bit inc +entry: + %s64 = getelementptr inbounds %struct.obj2* %o, i64 0, i32 0 +; CHECK-NOT: load + %0 = load i64* %s64, align 8 +; CHECK: incq ({{.*}}) + %inc = add i64 %0, 1 + store i64 %inc, i64* %s64, align 8 + %tobool = icmp eq i64 %inc, 0 + br i1 %tobool, label %if.end, label %return + +; 32 bit inc +if.end: + %s32 = getelementptr inbounds %struct.obj2* %o, i64 0, i32 1 +; CHECK-NOT: load + %1 = load i32* %s32, align 4 +; CHECK: incl {{[0-9][0-9]*}}({{.*}}) + %inc1 = add i32 %1, 1 + store i32 %inc1, i32* %s32, align 4 + %tobool2 = icmp eq i32 %inc1, 0 + br i1 %tobool2, label %if.end1, label %return + +; 16 bit inc +if.end1: + %s16 = getelementptr inbounds %struct.obj2* %o, i64 0, i32 2 +; CHECK-NOT: load + %2 = load i16* %s16, align 2 +; CHECK: incw {{[0-9][0-9]*}}({{.*}}) + %inc2 = add i16 %2, 1 + store i16 %inc2, i16* %s16, align 2 + %tobool3 = icmp eq i16 %inc2, 0 + br i1 %tobool3, label %if.end2, label %return + +; 8 bit inc +if.end2: + %s8 = getelementptr inbounds %struct.obj2* %o, i64 0, i32 3 +; CHECK-NOT: load + %3 = load i8* %s8 +; CHECK: incb {{[0-9][0-9]*}}({{.*}}) + %inc3 = add i8 %3, 1 + store i8 %inc3, i8* %s8 + %tobool4 = icmp eq i8 %inc3, 0 + br i1 %tobool4, label %if.end4, label %return + +if.end4: + tail call void @other(%struct.obj2* %o) nounwind + br label %return + +return: + ret void +} diff --git a/test/CodeGen/X86/select.ll b/test/CodeGen/X86/select.ll index ce04e07..f465a4f 100644 --- a/test/CodeGen/X86/select.ll +++ b/test/CodeGen/X86/select.ll @@ -75,9 +75,9 @@ define void @test6(i32 %C, <4 x float>* %A, <4 x float>* %B) nounwind { ; Verify that the fmul gets sunk into the one part of the diamond where it is ; needed. ; CHECK: test6: -; CHECK: jne -; CHECK: mulps +; CHECK: je ; CHECK: ret +; CHECK: mulps ; CHECK: ret } diff --git a/test/CodeGen/X86/sibcall.ll b/test/CodeGen/X86/sibcall.ll index a9a5420..2af3559 100644 --- a/test/CodeGen/X86/sibcall.ll +++ b/test/CodeGen/X86/sibcall.ll @@ -147,7 +147,7 @@ define i32 @t11(i32 %x, i32 %y, i32 %z.0, i32 %z.1, i32 %z.2) nounwind ssp { ; 32: t11: ; 32-NOT: subl ${{[0-9]+}}, %esp -; 32: jne +; 32: je ; 32-NOT: movl ; 32-NOT: addl ${{[0-9]+}}, %esp ; 32: jmp {{_?}}foo5 diff --git a/test/CodeGen/X86/sink-hoist.ll b/test/CodeGen/X86/sink-hoist.ll index e13a817..7957eb8 100644 --- a/test/CodeGen/X86/sink-hoist.ll +++ b/test/CodeGen/X86/sink-hoist.ll @@ -7,8 +7,9 @@ ; CHECK: foo: ; CHECK-NEXT: testb $1, %dil -; CHECK-NEXT: je +; CHECK-NEXT: jne ; CHECK-NEXT: divsd +; CHECK-NEXT: movaps ; CHECK-NEXT: ret ; CHECK: divsd @@ -25,10 +26,10 @@ define double @foo(double %x, double %y, i1 %c) nounwind { ; CHECK: split: ; CHECK-NEXT: testb $1, %dil -; CHECK-NEXT: je -; CHECK-NEXT: divsd +; CHECK-NEXT: jne +; CHECK-NEXT: movaps ; CHECK-NEXT: ret -; CHECK: movaps +; CHECK: divsd ; CHECK-NEXT: ret define double @split(double %x, double %y, i1 %c) nounwind { %a = fdiv double %x, 3.2 diff --git a/test/CodeGen/X86/smul-with-overflow.ll b/test/CodeGen/X86/smul-with-overflow.ll index 7c2e247..7ac3840 100644 --- a/test/CodeGen/X86/smul-with-overflow.ll +++ b/test/CodeGen/X86/smul-with-overflow.ll @@ -19,7 +19,7 @@ overflow: ret i1 false ; CHECK: test1: ; CHECK: imull -; CHECK-NEXT: jo +; CHECK-NEXT: jno } define i1 @test2(i32 %v1, i32 %v2) nounwind { diff --git a/test/CodeGen/X86/sse41-blend.ll b/test/CodeGen/X86/sse41-blend.ll index 78604a0..1a1017d 100644 --- a/test/CodeGen/X86/sse41-blend.ll +++ b/test/CodeGen/X86/sse41-blend.ll @@ -80,3 +80,11 @@ define <2 x double> @B(<2 x double> %x, <2 x double> %y) { ret <2 x double> %min } +; CHECK: float_crash +define void @float_crash() nounwind { +entry: + %merge205vector_func.i = select <4 x i1> undef, <4 x double> undef, <4 x double> undef + %extract214vector_func.i = extractelement <4 x double> %merge205vector_func.i, i32 0 + store double %extract214vector_func.i, double addrspace(1)* undef, align 8 + ret void +} diff --git a/test/CodeGen/X86/sse41.ll b/test/CodeGen/X86/sse41.ll index 2ac4cb4..54264b1 100644 --- a/test/CodeGen/X86/sse41.ll +++ b/test/CodeGen/X86/sse41.ll @@ -183,8 +183,8 @@ define <4 x float> @insertps_3(<4 x float> %t1, <4 x float> %t2) nounwind { ; X64: insertps $0, %xmm1, %xmm0 } -define i32 @ptestz_1(<4 x float> %t1, <4 x float> %t2) nounwind { - %tmp1 = call i32 @llvm.x86.sse41.ptestz(<4 x float> %t1, <4 x float> %t2) nounwind readnone +define i32 @ptestz_1(<2 x i64> %t1, <2 x i64> %t2) nounwind { + %tmp1 = call i32 @llvm.x86.sse41.ptestz(<2 x i64> %t1, <2 x i64> %t2) nounwind readnone ret i32 %tmp1 ; X32: _ptestz_1: ; X32: ptest %xmm1, %xmm0 @@ -195,8 +195,8 @@ define i32 @ptestz_1(<4 x float> %t1, <4 x float> %t2) nounwind { ; X64: sete %al } -define i32 @ptestz_2(<4 x float> %t1, <4 x float> %t2) nounwind { - %tmp1 = call i32 @llvm.x86.sse41.ptestc(<4 x float> %t1, <4 x float> %t2) nounwind readnone +define i32 @ptestz_2(<2 x i64> %t1, <2 x i64> %t2) nounwind { + %tmp1 = call i32 @llvm.x86.sse41.ptestc(<2 x i64> %t1, <2 x i64> %t2) nounwind readnone ret i32 %tmp1 ; X32: _ptestz_2: ; X32: ptest %xmm1, %xmm0 @@ -207,8 +207,8 @@ define i32 @ptestz_2(<4 x float> %t1, <4 x float> %t2) nounwind { ; X64: sbbl %eax } -define i32 @ptestz_3(<4 x float> %t1, <4 x float> %t2) nounwind { - %tmp1 = call i32 @llvm.x86.sse41.ptestnzc(<4 x float> %t1, <4 x float> %t2) nounwind readnone +define i32 @ptestz_3(<2 x i64> %t1, <2 x i64> %t2) nounwind { + %tmp1 = call i32 @llvm.x86.sse41.ptestnzc(<2 x i64> %t1, <2 x i64> %t2) nounwind readnone ret i32 %tmp1 ; X32: _ptestz_3: ; X32: ptest %xmm1, %xmm0 @@ -220,9 +220,9 @@ define i32 @ptestz_3(<4 x float> %t1, <4 x float> %t2) nounwind { } -declare i32 @llvm.x86.sse41.ptestz(<4 x float>, <4 x float>) nounwind readnone -declare i32 @llvm.x86.sse41.ptestc(<4 x float>, <4 x float>) nounwind readnone -declare i32 @llvm.x86.sse41.ptestnzc(<4 x float>, <4 x float>) nounwind readnone +declare i32 @llvm.x86.sse41.ptestz(<2 x i64>, <2 x i64>) nounwind readnone +declare i32 @llvm.x86.sse41.ptestc(<2 x i64>, <2 x i64>) nounwind readnone +declare i32 @llvm.x86.sse41.ptestnzc(<2 x i64>, <2 x i64>) nounwind readnone ; This used to compile to insertps $0 + insertps $16. insertps $0 is always ; pointless. diff --git a/test/CodeGen/X86/store_op_load_fold2.ll b/test/CodeGen/X86/store_op_load_fold2.ll index 1168622..8313166 100644 --- a/test/CodeGen/X86/store_op_load_fold2.ll +++ b/test/CodeGen/X86/store_op_load_fold2.ll @@ -1,4 +1,5 @@ -; RUN: llc < %s -mtriple=i686-linux -x86-asm-syntax=intel | FileCheck %s +; RUN: llc < %s -mtriple=i686-linux -x86-asm-syntax=att | FileCheck %s -check-prefix=ATT +; RUN: llc < %s -mtriple=i686-linux -x86-asm-syntax=intel | FileCheck %s -check-prefix=INTEL target datalayout = "e-p:32:32" %struct.Macroblock = type { i32, i32, i32, i32, i32, [8 x i32], %struct.Macroblock*, %struct.Macroblock*, i32, [2 x [4 x [4 x [2 x i32]]]], [16 x i8], [16 x i8], i32, i64, [4 x i32], [4 x i32], i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, double, i32, i32, i32, i32, i32, i32, i32, i32, i32 } @@ -16,9 +17,14 @@ cond_true2732.preheader: ; preds = %entry store i64 %tmp2676.us.us, i64* %tmp2666 ret i32 0 -; CHECK: and {{E..}}, DWORD PTR [360] -; CHECK: and DWORD PTR [356], {{E..}} -; CHECK: mov DWORD PTR [360], {{E..}} +; INTEL: and {{E..}}, DWORD PTR [360] +; INTEL: and DWORD PTR [356], {{E..}} +; FIXME: mov DWORD PTR [360], {{E..}} +; The above line comes out as 'mov 360, EAX', but when the register is ECX it works? + +; ATT: andl 360, %{{e..}} +; ATT: andl %{{e..}}, 356 +; ATT: movl %{{e..}}, 360 } diff --git a/test/CodeGen/X86/sub-with-overflow.ll b/test/CodeGen/X86/sub-with-overflow.ll index 749b5db..db8313c 100644 --- a/test/CodeGen/X86/sub-with-overflow.ll +++ b/test/CodeGen/X86/sub-with-overflow.ll @@ -20,7 +20,7 @@ overflow: ; CHECK: func1: ; CHECK: subl 20(%esp) -; CHECK-NEXT: jo +; CHECK-NEXT: jno } define i1 @func2(i32 %v1, i32 %v2) nounwind { @@ -40,7 +40,7 @@ carry: ; CHECK: func2: ; CHECK: subl 20(%esp) -; CHECK-NEXT: jb +; CHECK-NEXT: jae } declare i32 @printf(i8*, ...) nounwind diff --git a/test/CodeGen/X86/switch-bt.ll b/test/CodeGen/X86/switch-bt.ll index 8e39342..58a5c03 100644 --- a/test/CodeGen/X86/switch-bt.ll +++ b/test/CodeGen/X86/switch-bt.ll @@ -5,11 +5,11 @@ ; CHECK: movabsq $2305843009482129440, %r ; CHECK-NEXT: btq %rax, %r -; CHECK-NEXT: jb -; CHECK-NEXT: movl $671088640, %e +; CHECK-NEXT: jae +; CHECK: movl $671088640, %e ; CHECK-NEXT: btq %rax, %r -; CHECK-NEXT: jb -; CHECK-NEXT: testq %rax, %r +; CHECK-NEXT: jae +; CHECK: testq %rax, %r ; CHECK-NEXT: j define void @test(i8* %l) nounwind { @@ -60,7 +60,7 @@ define void @test2(i32 %x) nounwind ssp { ; CHECK-NEXT: movl $91 ; CHECK-NOT: movl ; CHECK-NEXT: btl -; CHECK-NEXT: jb +; CHECK-NEXT: jae entry: switch i32 %x, label %if.end [ i32 6, label %if.then @@ -85,7 +85,7 @@ define void @test3(i32 %x) nounwind { ; CHECK: cmpl $5 ; CHECK: ja ; CHECK: cmpl $4 -; CHECK: jne +; CHECK: je switch i32 %x, label %if.end [ i32 0, label %if.then i32 1, label %if.then diff --git a/test/CodeGen/X86/tail-opts.ll b/test/CodeGen/X86/tail-opts.ll index f1b9f20..6e20af5 100644 --- a/test/CodeGen/X86/tail-opts.ll +++ b/test/CodeGen/X86/tail-opts.ll @@ -113,15 +113,16 @@ altret: ; CHECK-NEXT: jbe .LBB2_3 ; CHECK-NEXT: ucomiss %xmm{{[0-2]}}, %xmm{{[0-2]}} ; CHECK-NEXT: ja .LBB2_4 -; CHECK-NEXT: .LBB2_2: -; CHECK-NEXT: movb $1, %al -; CHECK-NEXT: ret +; CHECK-NEXT: jmp .LBB2_2 ; CHECK-NEXT: .LBB2_3: ; CHECK-NEXT: ucomiss %xmm{{[0-2]}}, %xmm{{[0-2]}} ; CHECK-NEXT: jbe .LBB2_2 ; CHECK-NEXT: .LBB2_4: ; CHECK-NEXT: xorb %al, %al ; CHECK-NEXT: ret +; CHECK-NEXT: .LBB2_2: +; CHECK-NEXT: movb $1, %al +; CHECK-NEXT: ret define i1 @dont_merge_oddly(float* %result) nounwind { entry: @@ -336,10 +337,10 @@ return: ; CHECK: two: ; CHECK-NOT: XYZ +; CHECK: ret ; CHECK: movl $0, XYZ(%rip) ; CHECK: movl $1, XYZ(%rip) ; CHECK-NOT: XYZ -; CHECK: ret define void @two() nounwind optsize { entry: diff --git a/test/CodeGen/X86/tls-pie.ll b/test/CodeGen/X86/tls-pie.ll new file mode 100644 index 0000000..e2e58a54 --- /dev/null +++ b/test/CodeGen/X86/tls-pie.ll @@ -0,0 +1,63 @@ +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic -enable-pie \ +; RUN: | FileCheck -check-prefix=X32 %s +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -relocation-model=pic -enable-pie \ +; RUN: | FileCheck -check-prefix=X64 %s + +@i = thread_local global i32 15 +@i2 = external thread_local global i32 + +define i32 @f1() { +; X32: f1: +; X32: movl %gs:i@NTPOFF, %eax +; X32-NEXT: ret +; X64: f1: +; X64: movl %fs:i@TPOFF, %eax +; X64-NEXT: ret + +entry: + %tmp1 = load i32* @i + ret i32 %tmp1 +} + +define i32* @f2() { +; X32: f2: +; X32: movl %gs:0, %eax +; X32-NEXT: leal i@NTPOFF(%eax), %eax +; X32-NEXT: ret +; X64: f2: +; X64: movq %fs:0, %rax +; X64-NEXT: leaq i@TPOFF(%rax), %rax +; X64-NEXT: ret + +entry: + ret i32* @i +} + +define i32 @f3() { +; X32: f3: +; X32: movl i2@INDNTPOFF, %eax +; X32-NEXT: movl %gs:(%eax), %eax +; X32-NEXT: ret +; X64: f3: +; X64: movq i2@GOTTPOFF(%rip), %rax +; X64-NEXT: movl %fs:(%rax), %eax +; X64-NEXT: ret + +entry: + %tmp1 = load i32* @i2 + ret i32 %tmp1 +} + +define i32* @f4() { +; X32: f4: +; X32: movl %gs:0, %eax +; X32-NEXT: addl i2@INDNTPOFF, %eax +; X32-NEXT: ret +; X64: f4: +; X64: movq %fs:0, %rax +; X64-NEXT: addq i2@GOTTPOFF(%rip), %rax +; X64-NEXT: ret + +entry: + ret i32* @i2 +} diff --git a/test/CodeGen/X86/tls.ll b/test/CodeGen/X86/tls.ll new file mode 100644 index 0000000..e8a79bf --- /dev/null +++ b/test/CodeGen/X86/tls.ll @@ -0,0 +1,329 @@ +; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32_LINUX %s +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64_LINUX %s +; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 | FileCheck -check-prefix=X32_WIN %s +; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 | FileCheck -check-prefix=X64_WIN %s + +@i1 = thread_local global i32 15 +@i2 = external thread_local global i32 +@i3 = internal thread_local global i32 15 +@i4 = hidden thread_local global i32 15 +@i5 = external hidden thread_local global i32 +@s1 = thread_local global i16 15 +@b1 = thread_local global i8 0 + +define i32 @f1() { +; X32_LINUX: f1: +; X32_LINUX: movl %gs:i1@NTPOFF, %eax +; X32_LINUX-NEXT: ret +; X64_LINUX: f1: +; X64_LINUX: movl %fs:i1@TPOFF, %eax +; X64_LINUX-NEXT: ret +; X32_WIN: f1: +; X32_WIN: movl __tls_index, %eax +; X32_WIN-NEXT: movl %fs:__tls_array, %ecx +; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax +; X32_WIN-NEXT: movl _i1@SECREL(%eax), %eax +; X32_WIN-NEXT: ret +; X64_WIN: f1: +; X64_WIN: movl _tls_index(%rip), %eax +; X64_WIN-NEXT: movq %gs:88, %rcx +; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax +; X64_WIN-NEXT: movl i1@SECREL(%rax), %eax +; X64_WIN-NEXT: ret + +entry: + %tmp1 = load i32* @i1 + ret i32 %tmp1 +} + +define i32* @f2() { +; X32_LINUX: f2: +; X32_LINUX: movl %gs:0, %eax +; X32_LINUX-NEXT: leal i1@NTPOFF(%eax), %eax +; X32_LINUX-NEXT: ret +; X64_LINUX: f2: +; X64_LINUX: movq %fs:0, %rax +; X64_LINUX-NEXT: leaq i1@TPOFF(%rax), %rax +; X64_LINUX-NEXT: ret +; X32_WIN: f2: +; X32_WIN: movl __tls_index, %eax +; X32_WIN-NEXT: movl %fs:__tls_array, %ecx +; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax +; X32_WIN-NEXT: leal _i1@SECREL(%eax), %eax +; X32_WIN-NEXT: ret +; X64_WIN: f2: +; X64_WIN: movl _tls_index(%rip), %eax +; X64_WIN-NEXT: movq %gs:88, %rcx +; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax +; X64_WIN-NEXT: leaq i1@SECREL(%rax), %rax +; X64_WIN-NEXT: ret + +entry: + ret i32* @i1 +} + +define i32 @f3() nounwind { +; X32_LINUX: f3: +; X32_LINUX: movl i2@INDNTPOFF, %eax +; X32_LINUX-NEXT: movl %gs:(%eax), %eax +; X32_LINUX-NEXT: ret +; X64_LINUX: f3: +; X64_LINUX: movq i2@GOTTPOFF(%rip), %rax +; X64_LINUX-NEXT: movl %fs:(%rax), %eax +; X64_LINUX-NEXT: ret +; X32_WIN: f3: +; X32_WIN: movl __tls_index, %eax +; X32_WIN-NEXT: movl %fs:__tls_array, %ecx +; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax +; X32_WIN-NEXT: movl _i2@SECREL(%eax), %eax +; X32_WIN-NEXT: ret +; X64_WIN: f3: +; X64_WIN: movl _tls_index(%rip), %eax +; X64_WIN-NEXT: movq %gs:88, %rcx +; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax +; X64_WIN-NEXT: movl i2@SECREL(%rax), %eax +; X64_WIN-NEXT: ret + +entry: + %tmp1 = load i32* @i2 + ret i32 %tmp1 +} + +define i32* @f4() { +; X32_LINUX: f4: +; X32_LINUX: movl %gs:0, %eax +; X32_LINUX-NEXT: addl i2@INDNTPOFF, %eax +; X32_LINUX-NEXT: ret +; X64_LINUX: f4: +; X64_LINUX: movq %fs:0, %rax +; X64_LINUX-NEXT: addq i2@GOTTPOFF(%rip), %rax +; X64_LINUX-NEXT: ret +; X32_WIN: f4: +; X32_WIN: movl __tls_index, %eax +; X32_WIN-NEXT: movl %fs:__tls_array, %ecx +; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax +; X32_WIN-NEXT: leal _i2@SECREL(%eax), %eax +; X32_WIN-NEXT: ret +; X64_WIN: f4: +; X64_WIN: movl _tls_index(%rip), %eax +; X64_WIN-NEXT: movq %gs:88, %rcx +; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax +; X64_WIN-NEXT: leaq i2@SECREL(%rax), %rax +; X64_WIN-NEXT: ret + +entry: + ret i32* @i2 +} + +define i32 @f5() nounwind { +; X32_LINUX: f5: +; X32_LINUX: movl %gs:i3@NTPOFF, %eax +; X32_LINUX-NEXT: ret +; X64_LINUX: f5: +; X64_LINUX: movl %fs:i3@TPOFF, %eax +; X64_LINUX-NEXT: ret +; X32_WIN: f5: +; X32_WIN: movl __tls_index, %eax +; X32_WIN-NEXT: movl %fs:__tls_array, %ecx +; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax +; X32_WIN-NEXT: movl _i3@SECREL(%eax), %eax +; X32_WIN-NEXT: ret +; X64_WIN: f5: +; X64_WIN: movl _tls_index(%rip), %eax +; X64_WIN-NEXT: movq %gs:88, %rcx +; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax +; X64_WIN-NEXT: movl i3@SECREL(%rax), %eax +; X64_WIN-NEXT: ret + +entry: + %tmp1 = load i32* @i3 + ret i32 %tmp1 +} + +define i32* @f6() { +; X32_LINUX: f6: +; X32_LINUX: movl %gs:0, %eax +; X32_LINUX-NEXT: leal i3@NTPOFF(%eax), %eax +; X32_LINUX-NEXT: ret +; X64_LINUX: f6: +; X64_LINUX: movq %fs:0, %rax +; X64_LINUX-NEXT: leaq i3@TPOFF(%rax), %rax +; X64_LINUX-NEXT: ret +; X32_WIN: f6: +; X32_WIN: movl __tls_index, %eax +; X32_WIN-NEXT: movl %fs:__tls_array, %ecx +; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax +; X32_WIN-NEXT: leal _i3@SECREL(%eax), %eax +; X32_WIN-NEXT: ret +; X64_WIN: f6: +; X64_WIN: movl _tls_index(%rip), %eax +; X64_WIN-NEXT: movq %gs:88, %rcx +; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax +; X64_WIN-NEXT: leaq i3@SECREL(%rax), %rax +; X64_WIN-NEXT: ret + +entry: + ret i32* @i3 +} + +define i32 @f7() { +; X32_LINUX: f7: +; X32_LINUX: movl %gs:i4@NTPOFF, %eax +; X32_LINUX-NEXT: ret +; X64_LINUX: f7: +; X64_LINUX: movl %fs:i4@TPOFF, %eax +; X64_LINUX-NEXT: ret + +entry: + %tmp1 = load i32* @i4 + ret i32 %tmp1 +} + +define i32* @f8() { +; X32_LINUX: f8: +; X32_LINUX: movl %gs:0, %eax +; X32_LINUX-NEXT: leal i4@NTPOFF(%eax), %eax +; X32_LINUX-NEXT: ret +; X64_LINUX: f8: +; X64_LINUX: movq %fs:0, %rax +; X64_LINUX-NEXT: leaq i4@TPOFF(%rax), %rax +; X64_LINUX-NEXT: ret + +entry: + ret i32* @i4 +} + +define i32 @f9() { +; X32_LINUX: f9: +; X32_LINUX: movl %gs:i5@NTPOFF, %eax +; X32_LINUX-NEXT: ret +; X64_LINUX: f9: +; X64_LINUX: movl %fs:i5@TPOFF, %eax +; X64_LINUX-NEXT: ret + +entry: + %tmp1 = load i32* @i5 + ret i32 %tmp1 +} + +define i32* @f10() { +; X32_LINUX: f10: +; X32_LINUX: movl %gs:0, %eax +; X32_LINUX-NEXT: leal i5@NTPOFF(%eax), %eax +; X32_LINUX-NEXT: ret +; X64_LINUX: f10: +; X64_LINUX: movq %fs:0, %rax +; X64_LINUX-NEXT: leaq i5@TPOFF(%rax), %rax +; X64_LINUX-NEXT: ret + +entry: + ret i32* @i5 +} + +define i16 @f11() { +; X32_LINUX: f11: +; X32_LINUX: movzwl %gs:s1@NTPOFF, %eax +; Why is this kill line here, but no where else? +; X32_LINUX-NEXT: # kill +; X32_LINUX-NEXT: ret +; X64_LINUX: f11: +; X64_LINUX: movzwl %fs:s1@TPOFF, %eax +; X64_LINUX-NEXT: # kill +; X64_LINUX-NEXT: ret +; X32_WIN: f11: +; X32_WIN: movl __tls_index, %eax +; X32_WIN-NEXT: movl %fs:__tls_array, %ecx +; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax +; X32_WIN-NEXT: movzwl _s1@SECREL(%eax), %eax +; X32_WIN-NEXT: # kill +; X32_WIN-NEXT: ret +; X64_WIN: f11: +; X64_WIN: movl _tls_index(%rip), %eax +; X64_WIN-NEXT: movq %gs:88, %rcx +; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax +; X64_WIN-NEXT: movzwl s1@SECREL(%rax), %eax +; X64_WIN-NEXT: # kill +; X64_WIN-NEXT: ret + +entry: + %tmp1 = load i16* @s1 + ret i16 %tmp1 +} + +define i32 @f12() { +; X32_LINUX: f12: +; X32_LINUX: movswl %gs:s1@NTPOFF, %eax +; X32_LINUX-NEXT: ret +; X64_LINUX: f12: +; X64_LINUX: movswl %fs:s1@TPOFF, %eax +; X64_LINUX-NEXT: ret +; X32_WIN: f12: +; X32_WIN: movl __tls_index, %eax +; X32_WIN-NEXT: movl %fs:__tls_array, %ecx +; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax +; X32_WIN-NEXT: movswl _s1@SECREL(%eax), %eax +; X32_WIN-NEXT: ret +; X64_WIN: f12: +; X64_WIN: movl _tls_index(%rip), %eax +; X64_WIN-NEXT: movq %gs:88, %rcx +; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax +; X64_WIN-NEXT: movswl s1@SECREL(%rax), %eax +; X64_WIN-NEXT: ret + +entry: + %tmp1 = load i16* @s1 + %tmp2 = sext i16 %tmp1 to i32 + ret i32 %tmp2 +} + +define i8 @f13() { +; X32_LINUX: f13: +; X32_LINUX: movb %gs:b1@NTPOFF, %al +; X32_LINUX-NEXT: ret +; X64_LINUX: f13: +; X64_LINUX: movb %fs:b1@TPOFF, %al +; X64_LINUX-NEXT: ret +; X32_WIN: f13: +; X32_WIN: movl __tls_index, %eax +; X32_WIN-NEXT: movl %fs:__tls_array, %ecx +; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax +; X32_WIN-NEXT: movb _b1@SECREL(%eax), %al +; X32_WIN-NEXT: ret +; X64_WIN: f13: +; X64_WIN: movl _tls_index(%rip), %eax +; X64_WIN-NEXT: movq %gs:88, %rcx +; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax +; X64_WIN-NEXT: movb b1@SECREL(%rax), %al +; X64_WIN-NEXT: ret + +entry: + %tmp1 = load i8* @b1 + ret i8 %tmp1 +} + +define i32 @f14() { +; X32_LINUX: f14: +; X32_LINUX: movsbl %gs:b1@NTPOFF, %eax +; X32_LINUX-NEXT: ret +; X64_LINUX: f14: +; X64_LINUX: movsbl %fs:b1@TPOFF, %eax +; X64_LINUX-NEXT: ret +; X32_WIN: f14: +; X32_WIN: movl __tls_index, %eax +; X32_WIN-NEXT: movl %fs:__tls_array, %ecx +; X32_WIN-NEXT: movl (%ecx,%eax,4), %eax +; X32_WIN-NEXT: movsbl _b1@SECREL(%eax), %eax +; X32_WIN-NEXT: ret +; X64_WIN: f14: +; X64_WIN: movl _tls_index(%rip), %eax +; X64_WIN-NEXT: movq %gs:88, %rcx +; X64_WIN-NEXT: movq (%rcx,%rax,8), %rax +; X64_WIN-NEXT: movsbl b1@SECREL(%rax), %eax +; X64_WIN-NEXT: ret + +entry: + %tmp1 = load i8* @b1 + %tmp2 = sext i8 %tmp1 to i32 + ret i32 %tmp2 +} + diff --git a/test/CodeGen/X86/tls1.ll b/test/CodeGen/X86/tls1.ll deleted file mode 100644 index f39658e..0000000 --- a/test/CodeGen/X86/tls1.ll +++ /dev/null @@ -1,20 +0,0 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32_LINUX %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64_LINUX %s -; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 | FileCheck -check-prefix=X32_WIN %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 | FileCheck -check-prefix=X64_WIN %s - -@i = thread_local global i32 15 - -define i32 @f() nounwind { -entry: - %tmp1 = load i32* @i - ret i32 %tmp1 -} -; X32_LINUX: movl %gs:i@NTPOFF, %eax -; X64_LINUX: movl %fs:i@TPOFF, %eax -; X32_WIN: movl __tls_index, %eax -; X32_WIN: movl %fs:__tls_array, %ecx -; X32_WIN: movl _i@SECREL(%eax), %eax -; X64_WIN: movl _tls_index(%rip), %eax -; X64_WIN: movabsq $i@SECREL, %rcx - diff --git a/test/CodeGen/X86/tls10.ll b/test/CodeGen/X86/tls10.ll deleted file mode 100644 index fb61596..0000000 --- a/test/CodeGen/X86/tls10.ll +++ /dev/null @@ -1,13 +0,0 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t -; RUN: grep {movl %gs:0, %eax} %t -; RUN: grep {leal i@NTPOFF(%eax), %eax} %t -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 -; RUN: grep {movq %fs:0, %rax} %t2 -; RUN: grep {leaq i@TPOFF(%rax), %rax} %t2 - -@i = external hidden thread_local global i32 - -define i32* @f() { -entry: - ret i32* @i -} diff --git a/test/CodeGen/X86/tls11.ll b/test/CodeGen/X86/tls11.ll deleted file mode 100644 index cc14826..0000000 --- a/test/CodeGen/X86/tls11.ll +++ /dev/null @@ -1,21 +0,0 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32_LINUX %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64_LINUX %s -; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 | FileCheck -check-prefix=X32_WIN %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 | FileCheck -check-prefix=X64_WIN %s - -@i = thread_local global i16 15 - -define i16 @f() { -entry: - %tmp1 = load i16* @i - ret i16 %tmp1 -} -; X32_LINUX: movzwl %gs:i@NTPOFF, %eax -; X64_LINUX: movzwl %fs:i@TPOFF, %eax -; X32_WIN: movl __tls_index, %eax -; X32_WIN: movl %fs:__tls_array, %ecx -; X32_WIN: movzwl _i@SECREL(%eax), %eax -; X64_WIN: movl _tls_index(%rip), %eax -; X64_WIN: movq %gs:88, %rcx -; X64_WIN: movabsq $i@SECREL, %rcx -; X64_WIN: movzwl (%rax,%rcx), %eax diff --git a/test/CodeGen/X86/tls12.ll b/test/CodeGen/X86/tls12.ll deleted file mode 100644 index 3da789e..0000000 --- a/test/CodeGen/X86/tls12.ll +++ /dev/null @@ -1,21 +0,0 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32_LINUX %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64_LINUX %s -; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 | FileCheck -check-prefix=X32_WIN %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 | FileCheck -check-prefix=X64_WIN %s - -@i = thread_local global i8 15 - -define i8 @f() { -entry: - %tmp1 = load i8* @i - ret i8 %tmp1 -} -; X32_LINUX: movb %gs:i@NTPOFF, %al -; X64_LINUX: movb %fs:i@TPOFF, %al -; X32_WIN: movl __tls_index, %eax -; X32_WIN: movl %fs:__tls_array, %ecx -; X32_WIN: movb _i@SECREL(%eax), %al -; X64_WIN: movl _tls_index(%rip), %eax -; X64_WIN: movq %gs:88, %rcx -; X64_WIN: movabsq $i@SECREL, %rcx -; X64_WIN: movb (%rax,%rcx), %al diff --git a/test/CodeGen/X86/tls13.ll b/test/CodeGen/X86/tls13.ll deleted file mode 100644 index 0f6a98a..0000000 --- a/test/CodeGen/X86/tls13.ll +++ /dev/null @@ -1,33 +0,0 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32_LINUX %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64_LINUX %s -; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 | FileCheck -check-prefix=X32_WIN %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 | FileCheck -check-prefix=X64_WIN %s - -@i = thread_local global i16 0 -@j = thread_local global i16 0 - -define void @f() nounwind optsize { -entry: - %0 = load i16* @i, align 2 - %1 = sext i16 %0 to i32 - tail call void @g(i32 %1) nounwind - %2 = load i16* @j, align 2 - %3 = zext i16 %2 to i32 - tail call void @h(i32 %3) nounwind - ret void -} - -declare void @g(i32) - -declare void @h(i32) - -; X32_LINUX: movswl %gs:i@NTPOFF, %eax -; X32_LINUX: movzwl %gs:j@NTPOFF, %eax -; X64_LINUX: movswl %fs:i@TPOFF, %edi -; X64_LINUX: movzwl %fs:j@TPOFF, %edi -; X32_WIN: movswl _i@SECREL(%esi), %eax -; X32_WIN: movzwl _j@SECREL(%esi), %eax -; X64_WIN: movabsq $i@SECREL, %rax -; X64_WIN: movswl (%rsi,%rax), %ecx -; X64_WIN: movabsq $j@SECREL, %rax -; X64_WIN: movzwl (%rsi,%rax), %ecx diff --git a/test/CodeGen/X86/tls14.ll b/test/CodeGen/X86/tls14.ll deleted file mode 100644 index 6462571..0000000 --- a/test/CodeGen/X86/tls14.ll +++ /dev/null @@ -1,33 +0,0 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32_LINUX %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64_LINUX %s -; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 | FileCheck -check-prefix=X32_WIN %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 | FileCheck -check-prefix=X64_WIN %s - -@i = thread_local global i8 0 -@j = thread_local global i8 0 - -define void @f() nounwind optsize { -entry: - %0 = load i8* @i, align 2 - %1 = sext i8 %0 to i32 - tail call void @g(i32 %1) nounwind - %2 = load i8* @j, align 2 - %3 = zext i8 %2 to i32 - tail call void @h(i32 %3) nounwind - ret void -} - -declare void @g(i32) - -declare void @h(i32) - -; X32_LINUX: movsbl %gs:i@NTPOFF, %eax -; X32_LINUX: movzbl %gs:j@NTPOFF, %eax -; X64_LINUX: movsbl %fs:i@TPOFF, %edi -; X64_LINUX: movzbl %fs:j@TPOFF, %edi -; X32_WIN: movsbl _i@SECREL(%esi), %eax -; X32_WIN: movzbl _j@SECREL(%esi), %eax -; X64_WIN: movabsq $i@SECREL, %rax -; X64_WIN: movsbl (%rsi,%rax), %ecx -; X64_WIN: movabsq $j@SECREL, %rax -; X64_WIN: movzbl (%rsi,%rax), %ecx diff --git a/test/CodeGen/X86/tls15.ll b/test/CodeGen/X86/tls15.ll deleted file mode 100644 index 7abf070..0000000 --- a/test/CodeGen/X86/tls15.ll +++ /dev/null @@ -1,18 +0,0 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t -; RUN: grep {movl %gs:0, %eax} %t | count 1 -; RUN: grep {leal i@NTPOFF(%eax), %ecx} %t -; RUN: grep {leal j@NTPOFF(%eax), %eax} %t -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 -; RUN: grep {movq %fs:0, %rax} %t2 | count 1 -; RUN: grep {leaq i@TPOFF(%rax), %rcx} %t2 -; RUN: grep {leaq j@TPOFF(%rax), %rax} %t2 - -@i = thread_local global i32 0 -@j = thread_local global i32 0 - -define void @f(i32** %a, i32** %b) { -entry: - store i32* @i, i32** %a, align 8 - store i32* @j, i32** %b, align 8 - ret void -} diff --git a/test/CodeGen/X86/tls2.ll b/test/CodeGen/X86/tls2.ll deleted file mode 100644 index e882f53..0000000 --- a/test/CodeGen/X86/tls2.ll +++ /dev/null @@ -1,21 +0,0 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32_LINUX %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64_LINUX %s -; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 | FileCheck -check-prefix=X32_WIN %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 | FileCheck -check-prefix=X64_WIN %s - -@i = thread_local global i32 15 - -define i32* @f() { -entry: - ret i32* @i -} -; X32_LINUX: movl %gs:0, %eax -; X32_LINUX: leal i@NTPOFF(%eax), %eax -; X64_LINUX: movq %fs:0, %rax -; X64_LINUX: leaq i@TPOFF(%rax), %rax -; X32_WIN: movl __tls_index, %eax -; X32_WIN: movl %fs:__tls_array, %ecx -; X32_WIN: leal _i@SECREL(%eax), %eax -; X64_WIN: movl _tls_index(%rip), %eax -; X64_WIN: movq %gs:88, %rcx -; X64_WIN: addq $i@SECREL, %rax diff --git a/test/CodeGen/X86/tls3.ll b/test/CodeGen/X86/tls3.ll deleted file mode 100644 index ee3f28f..0000000 --- a/test/CodeGen/X86/tls3.ll +++ /dev/null @@ -1,21 +0,0 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32_LINUX %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64_LINUX %s -; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 | FileCheck -check-prefix=X32_WIN %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 | FileCheck -check-prefix=X64_WIN %s - -@i = external thread_local global i32 ; <i32*> [#uses=2] - -define i32 @f() nounwind { -entry: - %tmp1 = load i32* @i ; <i32> [#uses=1] - ret i32 %tmp1 -} -; X32_LINUX: movl i@INDNTPOFF, %eax -; X32_LINUX: movl %gs:(%eax), %eax -; X64_LINUX: movq i@GOTTPOFF(%rip), %rax -; X64_LINUX: movl %fs:(%rax), %eax -; X32_WIN: movl __tls_index, %eax -; X32_WIN: movl %fs:__tls_array, %ecx -; X32_WIN: movl _i@SECREL(%eax), %eax -; X64_WIN: movl _tls_index(%rip), %eax -; X64_WIN: movabsq $i@SECREL, %rcx diff --git a/test/CodeGen/X86/tls4.ll b/test/CodeGen/X86/tls4.ll deleted file mode 100644 index 2b53ec5..0000000 --- a/test/CodeGen/X86/tls4.ll +++ /dev/null @@ -1,21 +0,0 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32_LINUX %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64_LINUX %s -; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 | FileCheck -check-prefix=X32_WIN %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 | FileCheck -check-prefix=X64_WIN %s - -@i = external thread_local global i32 ; <i32*> [#uses=2] - -define i32* @f() { -entry: - ret i32* @i -} -; X32_LINUX: movl %gs:0, %eax -; X32_LINUX: addl i@INDNTPOFF, %eax -; X64_LINUX: movq %fs:0, %rax -; X64_LINUX: addq i@GOTTPOFF(%rip), %rax -; X32_WIN: movl __tls_index, %eax -; X32_WIN: movl %fs:__tls_array, %ecx -; X32_WIN: leal _i@SECREL(%eax), %eax -; X64_WIN: movl _tls_index(%rip), %eax -; X64_WIN: movq %gs:88, %rcx -; X64_WIN: addq $i@SECREL, %rax diff --git a/test/CodeGen/X86/tls5.ll b/test/CodeGen/X86/tls5.ll deleted file mode 100644 index 3cc6dab..0000000 --- a/test/CodeGen/X86/tls5.ll +++ /dev/null @@ -1,19 +0,0 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32_LINUX %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64_LINUX %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 | FileCheck -check-prefix=X64_WIN %s -; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 | FileCheck -check-prefix=X32_WIN %s - -@i = internal thread_local global i32 15 - -define i32 @f() { -entry: - %tmp1 = load i32* @i - ret i32 %tmp1 -} -; X32_LINUX: movl %gs:i@NTPOFF, %eax -; X64_LINUX: movl %fs:i@TPOFF, %eax -; X32_WIN: movl __tls_index, %eax -; X32_WIN: movl %fs:__tls_array, %ecx -; X32_WIN: movl _i@SECREL(%eax), %eax -; X64_WIN: movl _tls_index(%rip), %eax -; X64_WIN: movabsq $i@SECREL, %rcx diff --git a/test/CodeGen/X86/tls6.ll b/test/CodeGen/X86/tls6.ll deleted file mode 100644 index c98ad7c..0000000 --- a/test/CodeGen/X86/tls6.ll +++ /dev/null @@ -1,21 +0,0 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32_LINUX %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64_LINUX %s -; RUN: llc < %s -march=x86 -mtriple=x86-pc-win32 | FileCheck -check-prefix=X32_WIN %s -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-pc-win32 | FileCheck -check-prefix=X64_WIN %s - -@i = internal thread_local global i32 15 - -define i32* @f() { -entry: - ret i32* @i -} -; X32_LINUX: movl %gs:0, %eax -; X32_LINUX: leal i@NTPOFF(%eax), %eax -; X64_LINUX: movq %fs:0, %rax -; X64_LINUX: leaq i@TPOFF(%rax), %rax -; X32_WIN: movl __tls_index, %eax -; X32_WIN: movl %fs:__tls_array, %ecx -; X32_WIN: leal _i@SECREL(%eax), %eax -; X64_WIN: movl _tls_index(%rip), %eax -; X64_WIN: movq %gs:88, %rcx -; X64_WIN: addq $i@SECREL, %rax diff --git a/test/CodeGen/X86/tls7.ll b/test/CodeGen/X86/tls7.ll deleted file mode 100644 index e9116e7..0000000 --- a/test/CodeGen/X86/tls7.ll +++ /dev/null @@ -1,12 +0,0 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t -; RUN: grep {movl %gs:i@NTPOFF, %eax} %t -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 -; RUN: grep {movl %fs:i@TPOFF, %eax} %t2 - -@i = hidden thread_local global i32 15 - -define i32 @f() { -entry: - %tmp1 = load i32* @i - ret i32 %tmp1 -} diff --git a/test/CodeGen/X86/tls8.ll b/test/CodeGen/X86/tls8.ll deleted file mode 100644 index 375af94..0000000 --- a/test/CodeGen/X86/tls8.ll +++ /dev/null @@ -1,13 +0,0 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t -; RUN: grep {movl %gs:0, %eax} %t -; RUN: grep {leal i@NTPOFF(%eax), %eax} %t -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 -; RUN: grep {movq %fs:0, %rax} %t2 -; RUN: grep {leaq i@TPOFF(%rax), %rax} %t2 - -@i = hidden thread_local global i32 15 - -define i32* @f() { -entry: - ret i32* @i -} diff --git a/test/CodeGen/X86/tls9.ll b/test/CodeGen/X86/tls9.ll deleted file mode 100644 index 7d08df8..0000000 --- a/test/CodeGen/X86/tls9.ll +++ /dev/null @@ -1,12 +0,0 @@ -; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu > %t -; RUN: grep {movl %gs:i@NTPOFF, %eax} %t -; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu > %t2 -; RUN: grep {movl %fs:i@TPOFF, %eax} %t2 - -@i = external hidden thread_local global i32 - -define i32 @f() nounwind { -entry: - %tmp1 = load i32* @i - ret i32 %tmp1 -} diff --git a/test/CodeGen/X86/uint64-to-float.ll b/test/CodeGen/X86/uint64-to-float.ll index e853e77..ca764e7 100644 --- a/test/CodeGen/X86/uint64-to-float.ll +++ b/test/CodeGen/X86/uint64-to-float.ll @@ -7,13 +7,14 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 target triple = "x86_64-apple-darwin10.0.0" ; CHECK: testq %rdi, %rdi -; CHECK-NEXT: jns LBB0_2 +; CHECK-NEXT: js LBB0_1 +; CHECK: cvtsi2ss +; CHECK-NEXT: ret +; CHECK: LBB0_1 ; CHECK: shrq ; CHECK-NEXT: andq ; CHECK-NEXT: orq ; CHECK-NEXT: cvtsi2ss -; CHECK: LBB0_2 -; CHECK-NEXT: cvtsi2ss define float @test(i64 %a) { entry: %b = uitofp i64 %a to float diff --git a/test/CodeGen/X86/utf16-cfstrings.ll b/test/CodeGen/X86/utf16-cfstrings.ll new file mode 100644 index 0000000..af76a33 --- /dev/null +++ b/test/CodeGen/X86/utf16-cfstrings.ll @@ -0,0 +1,35 @@ +; RUN: llc < %s -mtriple x86_64-apple-macosx10 | FileCheck %s +; <rdar://problem/10655949> + +%0 = type opaque +%struct.NSConstantString = type { i32*, i32, i8*, i64 } + +@__CFConstantStringClassReference = external global [0 x i32] +@.str = internal unnamed_addr constant [5 x i16] [i16 252, i16 98, i16 101, i16 114, i16 0], align 2 +@_unnamed_cfstring_ = private constant %struct.NSConstantString { i32* getelementptr inbounds ([0 x i32]* @__CFConstantStringClassReference, i32 0, i32 0), i32 2000, i8* bitcast ([5 x i16]* @.str to i8*), i64 4 }, section "__DATA,__cfstring" + +; CHECK: .section __TEXT,__ustring +; CHECK-NEXT: .align 1 +; CHECK-NEXT: _.str: +; CHECK-NEXT: .short 252 ## 0xfc +; CHECK-NEXT: .short 98 ## 0x62 +; CHECK-NEXT: .short 101 ## 0x65 +; CHECK-NEXT: .short 114 ## 0x72 +; CHECK-NEXT: .short 0 ## 0x0 + +define i32 @main() uwtable ssp { +entry: + %retval = alloca i32, align 4 + store i32 0, i32* %retval + call void (%0*, ...)* @NSLog(%0* bitcast (%struct.NSConstantString* @_unnamed_cfstring_ to %0*)) + ret i32 0 +} + +declare void @NSLog(%0*, ...) + +!llvm.module.flags = !{!0, !1, !2, !3} + +!0 = metadata !{i32 1, metadata !"Objective-C Version", i32 2} +!1 = metadata !{i32 1, metadata !"Objective-C Image Info Version", i32 0} +!2 = metadata !{i32 1, metadata !"Objective-C Image Info Section", metadata !"__DATA, __objc_imageinfo, regular, no_dead_strip"} +!3 = metadata !{i32 4, metadata !"Objective-C Garbage Collection", i32 0} diff --git a/test/CodeGen/X86/utf8.ll b/test/CodeGen/X86/utf8.ll new file mode 100644 index 0000000..67bc5ae --- /dev/null +++ b/test/CodeGen/X86/utf8.ll @@ -0,0 +1,4 @@ +; RUN: llc < %s -march=x86 | FileCheck %s + +; CHECK: iΔ +@"i\CE\94" = common global i32 0, align 4 diff --git a/test/CodeGen/X86/vec_compare-2.ll b/test/CodeGen/X86/vec_compare-2.ll index 946b126..91777f7 100644 --- a/test/CodeGen/X86/vec_compare-2.ll +++ b/test/CodeGen/X86/vec_compare-2.ll @@ -10,8 +10,10 @@ define void @blackDespeckle_wrapper(i8** %args_list, i64* %gtid, i64 %xend) { entry: ; CHECK: cfi_def_cfa_offset ; CHECK-NOT: set -; CHECK: pcmpgt -; CHECK: blendvps +; CHECK: movzwl +; CHECK: movzwl +; CHECK: pshufd +; CHECK: pshufb %shr.i = ashr <4 x i32> zeroinitializer, <i32 3, i32 3, i32 3, i32 3> ; <<4 x i32>> [#uses=1] %cmp318.i = sext <4 x i1> zeroinitializer to <4 x i32> ; <<4 x i32>> [#uses=1] %sub322.i = sub <4 x i32> %shr.i, zeroinitializer ; <<4 x i32>> [#uses=1] diff --git a/test/CodeGen/X86/vec_shuffle-20.ll b/test/CodeGen/X86/vec_shuffle-20.ll index fc06b95..976cd18 100644 --- a/test/CodeGen/X86/vec_shuffle-20.ll +++ b/test/CodeGen/X86/vec_shuffle-20.ll @@ -1,4 +1,4 @@ -; RUN: llc < %s -o /dev/null -march=x86 -mattr=+sse2 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 3 +; RUN: llc < %s -o /dev/null -march=x86 -mcpu=corei7 -mtriple=i686-apple-darwin9 -stats -info-output-file - | grep asm-printer | grep 3 define <4 x float> @func(<4 x float> %fp0, <4 x float> %fp1) nounwind { entry: diff --git a/test/CodeGen/X86/vec_shuffle-37.ll b/test/CodeGen/X86/vec_shuffle-37.ll index 0608398..430aa04 100644 --- a/test/CodeGen/X86/vec_shuffle-37.ll +++ b/test/CodeGen/X86/vec_shuffle-37.ll @@ -4,10 +4,10 @@ define <4 x i32> @t00(<4 x i32>* %a0) nounwind ssp { entry: -; CHECK: movaps ({{%rdi|%rcx}}), %xmm0 -; CHECK: movaps %xmm0, %xmm1 -; CHECK-NEXT: movss %xmm2, %xmm1 -; CHECK-NEXT: shufps $36, %xmm1, %xmm0 +; CHECK: movaps ({{%rdi|%rcx}}), %[[XMM0:xmm[0-9]+]] +; CHECK: movaps %[[XMM0]], %[[XMM1:xmm[0-9]+]] +; CHECK-NEXT: movss %xmm{{[0-9]+}}, %[[XMM1]] +; CHECK-NEXT: shufps $36, %[[XMM1]], %[[XMM0]] %0 = load <4 x i32>* undef, align 16 %1 = load <4 x i32>* %a0, align 16 %2 = shufflevector <4 x i32> %1, <4 x i32> %0, <4 x i32> <i32 0, i32 1, i32 2, i32 4> diff --git a/test/CodeGen/X86/xor-icmp.ll b/test/CodeGen/X86/xor-icmp.ll index 34875ed..fd1b006 100644 --- a/test/CodeGen/X86/xor-icmp.ll +++ b/test/CodeGen/X86/xor-icmp.ll @@ -9,13 +9,13 @@ entry: ; X32-NOT: andb ; X32-NOT: shrb ; X32: testb $64 -; X32: jne +; X32: je ; X64: t: ; X64-NOT: setne ; X64: xorl ; X64: testb $64 -; X64: jne +; X64: je %0 = and i32 %a, 16384 %1 = icmp ne i32 %0, 0 %2 = and i32 %b, 16384 @@ -43,7 +43,7 @@ define i32 @t2(i32 %x, i32 %y) nounwind ssp { ; X32: cmpl ; X32: sete ; X32-NOT: xor -; X32: jne +; X32: je ; X64: t2: ; X64: testl @@ -51,7 +51,7 @@ define i32 @t2(i32 %x, i32 %y) nounwind ssp { ; X64: testl ; X64: sete ; X64-NOT: xor -; X64: jne +; X64: je entry: %0 = icmp eq i32 %x, 0 ; <i1> [#uses=1] %1 = icmp eq i32 %y, 0 ; <i1> [#uses=1] diff --git a/test/CodeGen/XCore/ashr.ll b/test/CodeGen/XCore/ashr.ll index 4514fdb..03b6b1f 100644 --- a/test/CodeGen/XCore/ashr.ll +++ b/test/CodeGen/XCore/ashr.ll @@ -30,7 +30,7 @@ not_less: } ; CHECK: f1: ; CHECK-NEXT: ashr r0, r0, 32 -; CHECK-NEXT: bf r0 +; CHECK-NEXT: bt r0 define i32 @f2(i32 %a) { %1 = icmp sge i32 %a, 0 @@ -51,9 +51,9 @@ define i32 @f3(i32 %a) { } ; CHECK: f3: ; CHECK-NEXT: ashr r0, r0, 32 -; CHECK-NEXT: bf r0 -; CHECK-NEXT: ldc r0, 10 -; CHECK: ldc r0, 17 +; CHECK-NEXT: bt r0 +; CHECK-NEXT: ldc r0, 17 +; CHECK: ldc r0, 10 define i32 @f4(i32 %a) { %1 = icmp sge i32 %a, 0 @@ -62,9 +62,9 @@ define i32 @f4(i32 %a) { } ; CHECK: f4: ; CHECK-NEXT: ashr r0, r0, 32 -; CHECK-NEXT: bf r0 -; CHECK-NEXT: ldc r0, 17 -; CHECK: ldc r0, 10 +; CHECK-NEXT: bt r0 +; CHECK-NEXT: ldc r0, 10 +; CHECK: ldc r0, 17 define i32 @f5(i32 %a) { %1 = icmp sge i32 %a, 0 diff --git a/test/CodeGen/XCore/ladd_lsub_combine.ll b/test/CodeGen/XCore/ladd_lsub_combine.ll index a693ee2..cd89966 100644 --- a/test/CodeGen/XCore/ladd_lsub_combine.ll +++ b/test/CodeGen/XCore/ladd_lsub_combine.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=xcore | FileCheck %s +; RUN: llc -march=xcore < %s | FileCheck %s ; Only needs one ladd define i64 @f1(i32 %x, i32 %y) nounwind { diff --git a/test/CodeGen/XCore/lit.local.cfg b/test/CodeGen/XCore/lit.local.cfg index c697912..f8726af 100644 --- a/test/CodeGen/XCore/lit.local.cfg +++ b/test/CodeGen/XCore/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll', '.c', '.cpp'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'XCore' in targets: config.unsupported = True diff --git a/test/DebugInfo/2010-04-25-CU-entry_pc.ll b/test/DebugInfo/2010-04-25-CU-entry_pc.ll deleted file mode 100644 index de099b6..0000000 --- a/test/DebugInfo/2010-04-25-CU-entry_pc.ll +++ /dev/null @@ -1,9 +0,0 @@ -; RUN: llc < %s | grep entry_pc | count 2 -@i = global i32 1 ; <i32*> [#uses=0] - -!llvm.dbg.gv = !{!0} - -!0 = metadata !{i32 524340, i32 0, metadata !1, metadata !"i", metadata !"i", metadata !"", metadata !1, i32 1, metadata !3, i1 false, i1 true, i32* @i} ; [ DW_TAG_variable ] -!1 = metadata !{i32 524329, metadata !"b.c", metadata !"/tmp", metadata !2} ; [ DW_TAG_file_type ] -!2 = metadata !{i32 524305, i32 0, i32 1, metadata !"b.c", metadata !"/tmp", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ] -!3 = metadata !{i32 524324, metadata !1, metadata !"int", metadata !1, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] diff --git a/test/DebugInfo/X86/DW_TAG_friend.ll b/test/DebugInfo/X86/DW_TAG_friend.ll new file mode 100644 index 0000000..a0dcec3 --- /dev/null +++ b/test/DebugInfo/X86/DW_TAG_friend.ll @@ -0,0 +1,47 @@ +; RUN: llc -mtriple=x86_64-apple-darwin %s -o %t -filetype=obj +; RUN: llvm-dwarfdump %t | FileCheck %s + +; Check that the friend tag is there and is followed by a DW_AT_friend that has a reference back. + +; CHECK: 0x00000032: DW_TAG_class_type [4] +; CHECK: 0x00000077: DW_TAG_class_type [4] +; CHECK: 0x000000a0: DW_TAG_friend [9] +; CHECK: 0x000000a1: DW_AT_friend [DW_FORM_ref4] (cu + 0x0032 => {0x00000032}) + + +%class.A = type { i32 } +%class.B = type { i32 } + +@a = global %class.A zeroinitializer, align 4 +@b = global %class.B zeroinitializer, align 4 + +!llvm.dbg.cu = !{!0} + +!0 = metadata !{i32 786449, i32 0, i32 4, metadata !"foo.cpp", metadata !"/Users/echristo/tmp", metadata !"clang version 3.1 (trunk 153413) (llvm/trunk 153428)", i1 true, i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !1, metadata !3} ; [ DW_TAG_compile_unit ] +!1 = metadata !{metadata !2} +!2 = metadata !{i32 0} +!3 = metadata !{metadata !4} +!4 = metadata !{metadata !5, metadata !17} +!5 = metadata !{i32 786484, i32 0, null, metadata !"a", metadata !"a", metadata !"", metadata !6, i32 10, metadata !7, i32 0, i32 1, %class.A* @a} ; [ DW_TAG_variable ] +!6 = metadata !{i32 786473, metadata !"foo.cpp", metadata !"/Users/echristo/tmp", null} ; [ DW_TAG_file_type ] +!7 = metadata !{i32 786434, null, metadata !"A", metadata !6, i32 1, i64 32, i64 32, i32 0, i32 0, null, metadata !8, i32 0, null, null} ; [ DW_TAG_class_type ] +!8 = metadata !{metadata !9, metadata !11} +!9 = metadata !{i32 786445, metadata !7, metadata !"a", metadata !6, i32 2, i64 32, i64 32, i64 0, i32 1, metadata !10} ; [ DW_TAG_member ] +!10 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!11 = metadata !{i32 786478, i32 0, metadata !7, metadata !"A", metadata !"A", metadata !"", metadata !6, i32 1, metadata !12, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !15} ; [ DW_TAG_subprogram ] +!12 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !13, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!13 = metadata !{null, metadata !14} +!14 = metadata !{i32 786447, i32 0, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !7} ; [ DW_TAG_pointer_type ] +!15 = metadata !{metadata !16} +!16 = metadata !{i32 786468} ; [ DW_TAG_base_type ] +!17 = metadata !{i32 786484, i32 0, null, metadata !"b", metadata !"b", metadata !"", metadata !6, i32 11, metadata !18, i32 0, i32 1, %class.B* @b} ; [ DW_TAG_variable ] +!18 = metadata !{i32 786434, null, metadata !"B", metadata !6, i32 5, i64 32, i64 32, i32 0, i32 0, null, metadata !19, i32 0, null, null} ; [ DW_TAG_class_type ] +!19 = metadata !{metadata !20, metadata !21, metadata !27} +!20 = metadata !{i32 786445, metadata !18, metadata !"b", metadata !6, i32 7, i64 32, i64 32, i64 0, i32 1, metadata !10} ; [ DW_TAG_member ] +!21 = metadata !{i32 786478, i32 0, metadata !18, metadata !"B", metadata !"B", metadata !"", metadata !6, i32 5, metadata !22, i1 false, i1 false, i32 0, i32 0, null, i32 320, i1 false, null, null, i32 0, metadata !25} ; [ DW_TAG_subprogram ] +!22 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !23, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!23 = metadata !{null, metadata !24} +!24 = metadata !{i32 786447, i32 0, metadata !"", i32 0, i32 0, i64 64, i64 64, i64 0, i32 64, metadata !18} ; [ DW_TAG_pointer_type ] +!25 = metadata !{metadata !26} +!26 = metadata !{i32 786468} ; [ DW_TAG_base_type ] +!27 = metadata !{i32 786474, metadata !18, null, metadata !6, i32 0, i64 0, i64 0, i64 0, i32 0, metadata !7} ; [ DW_TAG_friend ] diff --git a/test/DebugInfo/X86/ending-run.ll b/test/DebugInfo/X86/ending-run.ll new file mode 100644 index 0000000..6935c47 --- /dev/null +++ b/test/DebugInfo/X86/ending-run.ll @@ -0,0 +1,49 @@ +; RUN: llc -mtriple=x86_64-apple-darwin %s -o %t -filetype=obj +; RUN: llvm-dwarfdump %t | FileCheck %s + +; Check that the line table starts at 7, not 4, but that the first +; statement isn't until line 8. + +; CHECK-NOT: 0x0000000000000000 7 0 1 0 is_stmt +; CHECK: 0x0000000000000000 7 0 1 0 +; CHECK: 0x0000000000000004 8 18 1 0 is_stmt prologue_end + +define i32 @callee(i32 %x) nounwind uwtable ssp { +entry: + %x.addr = alloca i32, align 4 + %y = alloca i32, align 4 + store i32 %x, i32* %x.addr, align 4 + call void @llvm.dbg.declare(metadata !{i32* %x.addr}, metadata !12), !dbg !13 + call void @llvm.dbg.declare(metadata !{i32* %y}, metadata !14), !dbg !16 + %0 = load i32* %x.addr, align 4, !dbg !17 + %1 = load i32* %x.addr, align 4, !dbg !17 + %mul = mul nsw i32 %0, %1, !dbg !17 + store i32 %mul, i32* %y, align 4, !dbg !17 + %2 = load i32* %y, align 4, !dbg !18 + %sub = sub nsw i32 %2, 2, !dbg !18 + ret i32 %sub, !dbg !18 +} + +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone + +!llvm.dbg.cu = !{!0} + +!0 = metadata !{i32 786449, i32 0, i32 12, metadata !"ending-run.c", metadata !"/Users/echristo/tmp", metadata !"clang version 3.1 (trunk 153921) (llvm/trunk 153916)", i1 true, i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1} ; [ DW_TAG_compile_unit ] +!1 = metadata !{metadata !2} +!2 = metadata !{i32 0} +!3 = metadata !{metadata !4} +!4 = metadata !{metadata !5} +!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"callee", metadata !"callee", metadata !"", metadata !6, i32 4, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 0, i1 false, i32 (i32)* @callee, null, null, metadata !10, i32 7} ; [ DW_TAG_subprogram ] +!6 = metadata !{i32 786473, metadata !"ending-run.c", metadata !"/Users/echristo/tmp", null} ; [ DW_TAG_file_type ] +!7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!8 = metadata !{metadata !9, metadata !9} +!9 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!10 = metadata !{metadata !11} +!11 = metadata !{i32 786468} ; [ DW_TAG_base_type ] +!12 = metadata !{i32 786689, metadata !5, metadata !"x", metadata !6, i32 16777221, metadata !9, i32 0, i32 0} ; [ DW_TAG_arg_variable ] +!13 = metadata !{i32 5, i32 5, metadata !5, null} +!14 = metadata !{i32 786688, metadata !15, metadata !"y", metadata !6, i32 8, metadata !9, i32 0, i32 0} ; [ DW_TAG_auto_variable ] +!15 = metadata !{i32 786443, metadata !5, i32 7, i32 1, metadata !6, i32 0} ; [ DW_TAG_lexical_block ] +!16 = metadata !{i32 8, i32 9, metadata !15, null} +!17 = metadata !{i32 8, i32 18, metadata !15, null} +!18 = metadata !{i32 9, i32 5, metadata !15, null} diff --git a/test/DebugInfo/X86/lit.local.cfg b/test/DebugInfo/X86/lit.local.cfg index 2092c29..0d694da 100644 --- a/test/DebugInfo/X86/lit.local.cfg +++ b/test/DebugInfo/X86/lit.local.cfg @@ -1,12 +1,5 @@ config.suffixes = ['.ll'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'X86' in targets: config.unsupported = True diff --git a/test/DebugInfo/X86/low-pc-cu.ll b/test/DebugInfo/X86/low-pc-cu.ll new file mode 100644 index 0000000..f9d9b91 --- /dev/null +++ b/test/DebugInfo/X86/low-pc-cu.ll @@ -0,0 +1,31 @@ +; RUN: llc -mtriple=x86_64-apple-darwin %s -o %t -filetype=obj +; RUN: llvm-dwarfdump %t | FileCheck %s + +; Check that we use DW_AT_low_pc + +; CHECK: DW_TAG_compile_unit [1] +; CHECK: DW_AT_low_pc [DW_FORM_addr] (0x0000000000000000) +; CHECK: DW_TAG_subprogram [2] + +define i32 @_Z1qv() nounwind uwtable readnone ssp { +entry: + ret i32 undef, !dbg !13 +} + +!llvm.dbg.cu = !{!0} + +!0 = metadata !{i32 786449, i32 0, i32 4, metadata !"foo.cpp", metadata !"/Users/echristo/tmp", metadata !"clang version 3.1 (trunk 153454) (llvm/trunk 153471)", i1 true, i1 false, metadata !"", i32 0, metadata !1, metadata !1, metadata !3, metadata !1} ; [ DW_TAG_compile_unit ] +!1 = metadata !{metadata !2} +!2 = metadata !{i32 0} +!3 = metadata !{metadata !4} +!4 = metadata !{metadata !5, metadata !12} +!5 = metadata !{i32 786478, i32 0, metadata !6, metadata !"q", metadata !"q", metadata !"_Z1qv", metadata !6, i32 5, metadata !7, i1 false, i1 true, i32 0, i32 0, null, i32 256, i1 false, i32 ()* @_Z1qv, null, null, metadata !10} ; [ DW_TAG_subprogram ] +!6 = metadata !{i32 786473, metadata !"foo.cpp", metadata !"/Users/echristo/tmp", null} ; [ DW_TAG_file_type ] +!7 = metadata !{i32 786453, i32 0, metadata !"", i32 0, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !8, i32 0, i32 0} ; [ DW_TAG_subroutine_type ] +!8 = metadata !{metadata !9} +!9 = metadata !{i32 786468, null, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ] +!10 = metadata !{metadata !11} +!11 = metadata !{i32 786468} ; [ DW_TAG_base_type ] +!12 = metadata !{i32 786478, i32 0, metadata !6, metadata !"t", metadata !"t", metadata !"", metadata !6, i32 2, metadata !7, i1 true, i1 true, i32 0, i32 0, null, i32 256, i1 false, null, null, null, metadata !10} ; [ DW_TAG_subprogram ] +!13 = metadata !{i32 7, i32 1, metadata !14, null} +!14 = metadata !{i32 786443, metadata !5, i32 5, i32 1, metadata !6, i32 0} ; [ DW_TAG_lexical_block ] diff --git a/test/ExecutionEngine/2002-12-16-ArgTest.ll b/test/ExecutionEngine/2002-12-16-ArgTest.ll index b36feee..eb2fe8c 100644 --- a/test/ExecutionEngine/2002-12-16-ArgTest.ll +++ b/test/ExecutionEngine/2002-12-16-ArgTest.ll @@ -1,5 +1,4 @@ ; RUN: %lli %s > /dev/null -; XFAIL: mcjit @.LC0 = internal global [10 x i8] c"argc: %d\0A\00" ; <[10 x i8]*> [#uses=1] diff --git a/test/ExecutionEngine/2003-01-04-ArgumentBug.ll b/test/ExecutionEngine/2003-01-04-ArgumentBug.ll index 0cc0efd..3182193 100644 --- a/test/ExecutionEngine/2003-01-04-ArgumentBug.ll +++ b/test/ExecutionEngine/2003-01-04-ArgumentBug.ll @@ -1,6 +1,5 @@ ; RUN: %lli %s > /dev/null ; XFAIL: arm -; XFAIL: mcjit define i32 @foo(i32 %X, i32 %Y, double %A) { %cond212 = fcmp une double %A, 1.000000e+00 ; <i1> [#uses=1] diff --git a/test/ExecutionEngine/2003-01-04-LoopTest.ll b/test/ExecutionEngine/2003-01-04-LoopTest.ll index e4049a7..3e27e06 100644 --- a/test/ExecutionEngine/2003-01-04-LoopTest.ll +++ b/test/ExecutionEngine/2003-01-04-LoopTest.ll @@ -1,6 +1,5 @@ ; RUN: %lli %s > /dev/null ; XFAIL: arm -; XFAIL: mcjit define i32 @main() { call i32 @mylog( i32 4 ) ; <i32>:1 [#uses=0] diff --git a/test/ExecutionEngine/2003-05-06-LivenessClobber.ll b/test/ExecutionEngine/2003-05-06-LivenessClobber.ll index 1e155ee..6f61aa6 100644 --- a/test/ExecutionEngine/2003-05-06-LivenessClobber.ll +++ b/test/ExecutionEngine/2003-05-06-LivenessClobber.ll @@ -2,7 +2,6 @@ ; ; RUN: not %lli %s ; XFAIL: arm -; XFAIL: mcjit @test = global i64 0 ; <i64*> [#uses=1] diff --git a/test/ExecutionEngine/2003-05-07-ArgumentTest.ll b/test/ExecutionEngine/2003-05-07-ArgumentTest.ll index 1a1ae5f..236be18 100644 --- a/test/ExecutionEngine/2003-05-07-ArgumentTest.ll +++ b/test/ExecutionEngine/2003-05-07-ArgumentTest.ll @@ -1,6 +1,5 @@ ; RUN: %lli %s test ; XFAIL: arm -; XFAIL: mcjit declare i32 @puts(i8*) diff --git a/test/ExecutionEngine/2003-08-21-EnvironmentTest.ll b/test/ExecutionEngine/2003-08-21-EnvironmentTest.ll index b56025a..60dc3d6 100644 --- a/test/ExecutionEngine/2003-08-21-EnvironmentTest.ll +++ b/test/ExecutionEngine/2003-08-21-EnvironmentTest.ll @@ -1,6 +1,5 @@ ; RUN: %lli %s > /dev/null ; XFAIL: arm -; XFAIL: mcjit ; ; Regression Test: EnvironmentTest.ll diff --git a/test/ExecutionEngine/2005-12-02-TailCallBug.ll b/test/ExecutionEngine/2005-12-02-TailCallBug.ll index 4d7bd89..8523b5e 100644 --- a/test/ExecutionEngine/2005-12-02-TailCallBug.ll +++ b/test/ExecutionEngine/2005-12-02-TailCallBug.ll @@ -1,7 +1,6 @@ ; PR672 ; RUN: %lli %s ; XFAIL: arm -; XFAIL: mcjit-ia32 define i32 @main() { %f = bitcast i32 (i32, i32*, i32)* @check_tail to i32* ; <i32*> [#uses=1] diff --git a/test/ExecutionEngine/MCJIT/2002-12-16-ArgTest.ll b/test/ExecutionEngine/MCJIT/2002-12-16-ArgTest.ll deleted file mode 100644 index 46273d3..0000000 --- a/test/ExecutionEngine/MCJIT/2002-12-16-ArgTest.ll +++ /dev/null @@ -1,37 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -@.LC0 = internal global [10 x i8] c"argc: %d\0A\00" ; <[10 x i8]*> [#uses=1] - -declare i32 @puts(i8*) - -define void @getoptions(i32* %argc) { -bb0: - ret void -} - -declare i32 @printf(i8*, ...) - -define i32 @main(i32 %argc, i8** %argv) { -bb0: - call i32 (i8*, ...)* @printf( i8* getelementptr ([10 x i8]* @.LC0, i64 0, i64 0), i32 %argc ) ; <i32>:0 [#uses=0] - %cast224 = bitcast i8** %argv to i8* ; <i8*> [#uses=1] - %local = alloca i8* ; <i8**> [#uses=3] - store i8* %cast224, i8** %local - %cond226 = icmp sle i32 %argc, 0 ; <i1> [#uses=1] - br i1 %cond226, label %bb3, label %bb2 -bb2: ; preds = %bb2, %bb0 - %cann-indvar = phi i32 [ 0, %bb0 ], [ %add1-indvar, %bb2 ] ; <i32> [#uses=2] - %add1-indvar = add i32 %cann-indvar, 1 ; <i32> [#uses=2] - %cann-indvar-idxcast = sext i32 %cann-indvar to i64 ; <i64> [#uses=1] - %CT = bitcast i8** %local to i8*** ; <i8***> [#uses=1] - %reg115 = load i8*** %CT ; <i8**> [#uses=1] - %cast235 = getelementptr i8** %reg115, i64 %cann-indvar-idxcast ; <i8**> [#uses=1] - %reg117 = load i8** %cast235 ; <i8*> [#uses=1] - %reg236 = call i32 @puts( i8* %reg117 ) ; <i32> [#uses=0] - %cond239 = icmp slt i32 %add1-indvar, %argc ; <i1> [#uses=1] - br i1 %cond239, label %bb2, label %bb3 -bb3: ; preds = %bb2, %bb0 - %cast243 = bitcast i8** %local to i32* ; <i32*> [#uses=1] - call void @getoptions( i32* %cast243 ) - ret i32 0 -} diff --git a/test/ExecutionEngine/MCJIT/2003-01-04-ArgumentBug.ll b/test/ExecutionEngine/MCJIT/2003-01-04-ArgumentBug.ll deleted file mode 100644 index 88bfbb3..0000000 --- a/test/ExecutionEngine/MCJIT/2003-01-04-ArgumentBug.ll +++ /dev/null @@ -1,13 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -define i32 @foo(i32 %X, i32 %Y, double %A) { - %cond212 = fcmp une double %A, 1.000000e+00 ; <i1> [#uses=1] - %cast110 = zext i1 %cond212 to i32 ; <i32> [#uses=1] - ret i32 %cast110 -} - -define i32 @main() { - %reg212 = call i32 @foo( i32 0, i32 1, double 1.000000e+00 ) ; <i32> [#uses=1] - ret i32 %reg212 -} - diff --git a/test/ExecutionEngine/MCJIT/2003-01-04-LoopTest.ll b/test/ExecutionEngine/MCJIT/2003-01-04-LoopTest.ll deleted file mode 100644 index d5f860d..0000000 --- a/test/ExecutionEngine/MCJIT/2003-01-04-LoopTest.ll +++ /dev/null @@ -1,20 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -define i32 @main() { - call i32 @mylog( i32 4 ) ; <i32>:1 [#uses=0] - ret i32 0 -} - -define internal i32 @mylog(i32 %num) { -bb0: - br label %bb2 -bb2: ; preds = %bb2, %bb0 - %reg112 = phi i32 [ 10, %bb2 ], [ 1, %bb0 ] ; <i32> [#uses=1] - %cann-indvar = phi i32 [ %cann-indvar, %bb2 ], [ 0, %bb0 ] ; <i32> [#uses=1] - %reg114 = add i32 %reg112, 1 ; <i32> [#uses=2] - %cond222 = icmp slt i32 %reg114, %num ; <i1> [#uses=1] - br i1 %cond222, label %bb2, label %bb3 -bb3: ; preds = %bb2 - ret i32 %reg114 -} - diff --git a/test/ExecutionEngine/MCJIT/2003-01-04-PhiTest.ll b/test/ExecutionEngine/MCJIT/2003-01-04-PhiTest.ll deleted file mode 100644 index 721f2e8..0000000 --- a/test/ExecutionEngine/MCJIT/2003-01-04-PhiTest.ll +++ /dev/null @@ -1,12 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -define i32 @main() { -; <label>:0 - br label %Loop -Loop: ; preds = %Loop, %0 - %X = phi i32 [ 0, %0 ], [ 1, %Loop ] ; <i32> [#uses=1] - br i1 true, label %Out, label %Loop -Out: ; preds = %Loop - ret i32 %X -} - diff --git a/test/ExecutionEngine/MCJIT/2003-01-09-SARTest.ll b/test/ExecutionEngine/MCJIT/2003-01-09-SARTest.ll deleted file mode 100644 index d17df99..0000000 --- a/test/ExecutionEngine/MCJIT/2003-01-09-SARTest.ll +++ /dev/null @@ -1,11 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -; We were accidentally inverting the signedness of right shifts. Whoops. - -define i32 @main() { - %X = ashr i32 -1, 16 ; <i32> [#uses=1] - %Y = ashr i32 %X, 16 ; <i32> [#uses=1] - %Z = add i32 %Y, 1 ; <i32> [#uses=1] - ret i32 %Z -} - diff --git a/test/ExecutionEngine/MCJIT/2003-01-10-FUCOM.ll b/test/ExecutionEngine/MCJIT/2003-01-10-FUCOM.ll deleted file mode 100644 index e55cb06..0000000 --- a/test/ExecutionEngine/MCJIT/2003-01-10-FUCOM.ll +++ /dev/null @@ -1,10 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -define i32 @main() { - %X = fadd double 0.000000e+00, 1.000000e+00 ; <double> [#uses=1] - %Y = fsub double 0.000000e+00, 1.000000e+00 ; <double> [#uses=2] - %Z = fcmp oeq double %X, %Y ; <i1> [#uses=0] - fadd double %Y, 0.000000e+00 ; <double>:1 [#uses=0] - ret i32 0 -} - diff --git a/test/ExecutionEngine/MCJIT/2003-01-15-AlignmentTest.ll b/test/ExecutionEngine/MCJIT/2003-01-15-AlignmentTest.ll deleted file mode 100644 index 663dc40..0000000 --- a/test/ExecutionEngine/MCJIT/2003-01-15-AlignmentTest.ll +++ /dev/null @@ -1,17 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -define i32 @bar(i8* %X) { - ; pointer should be 4 byte aligned! - %P = alloca double ; <double*> [#uses=1] - %R = ptrtoint double* %P to i32 ; <i32> [#uses=1] - %A = and i32 %R, 3 ; <i32> [#uses=1] - ret i32 %A -} - -define i32 @main() { - %SP = alloca i8 ; <i8*> [#uses=1] - %X = add i32 0, 0 ; <i32> [#uses=1] - alloca i8, i32 %X ; <i8*>:1 [#uses=0] - call i32 @bar( i8* %SP ) ; <i32>:2 [#uses=1] - ret i32 %2 -} diff --git a/test/ExecutionEngine/MCJIT/2003-05-06-LivenessClobber.ll b/test/ExecutionEngine/MCJIT/2003-05-06-LivenessClobber.ll deleted file mode 100644 index e95294b..0000000 --- a/test/ExecutionEngine/MCJIT/2003-05-06-LivenessClobber.ll +++ /dev/null @@ -1,19 +0,0 @@ -; This testcase should return with an exit code of 1. -; -; RUN: not %lli -use-mcjit %s - -@test = global i64 0 ; <i64*> [#uses=1] - -define internal i64 @test.upgrd.1() { - %tmp.0 = load i64* @test ; <i64> [#uses=1] - %tmp.1 = add i64 %tmp.0, 1 ; <i64> [#uses=1] - ret i64 %tmp.1 -} - -define i32 @main() { - %L = call i64 @test.upgrd.1( ) ; <i64> [#uses=1] - %I = trunc i64 %L to i32 ; <i32> [#uses=1] - ret i32 %I -} - - diff --git a/test/ExecutionEngine/MCJIT/2003-05-07-ArgumentTest.ll b/test/ExecutionEngine/MCJIT/2003-05-07-ArgumentTest.ll deleted file mode 100644 index a237194..0000000 --- a/test/ExecutionEngine/MCJIT/2003-05-07-ArgumentTest.ll +++ /dev/null @@ -1,11 +0,0 @@ -; RUN: %lli -use-mcjit %s test - -declare i32 @puts(i8*) - -define i32 @main(i32 %argc.1, i8** %argv.1) { - %tmp.5 = getelementptr i8** %argv.1, i64 1 ; <i8**> [#uses=1] - %tmp.6 = load i8** %tmp.5 ; <i8*> [#uses=1] - %tmp.0 = call i32 @puts( i8* %tmp.6 ) ; <i32> [#uses=0] - ret i32 0 -} - diff --git a/test/ExecutionEngine/MCJIT/2003-05-11-PHIRegAllocBug.ll b/test/ExecutionEngine/MCJIT/2003-05-11-PHIRegAllocBug.ll deleted file mode 100644 index 70464a3..0000000 --- a/test/ExecutionEngine/MCJIT/2003-05-11-PHIRegAllocBug.ll +++ /dev/null @@ -1,15 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -target datalayout = "e-p:32:32" - -define i32 @main() { -entry: - br label %endif -then: ; No predecessors! - br label %endif -endif: ; preds = %then, %entry - %x = phi i32 [ 4, %entry ], [ 27, %then ] ; <i32> [#uses=0] - %result = phi i32 [ 32, %then ], [ 0, %entry ] ; <i32> [#uses=0] - ret i32 0 -} - diff --git a/test/ExecutionEngine/MCJIT/2003-06-04-bzip2-bug.ll b/test/ExecutionEngine/MCJIT/2003-06-04-bzip2-bug.ll deleted file mode 100644 index 58d423f..0000000 --- a/test/ExecutionEngine/MCJIT/2003-06-04-bzip2-bug.ll +++ /dev/null @@ -1,19 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -; Testcase distilled from 256.bzip2. - -target datalayout = "e-p:32:32" - -define i32 @main() { -entry: - br label %loopentry.0 -loopentry.0: ; preds = %loopentry.0, %entry - %h.0 = phi i32 [ %tmp.2, %loopentry.0 ], [ -1, %entry ] ; <i32> [#uses=1] - %tmp.2 = add i32 %h.0, 1 ; <i32> [#uses=3] - %tmp.4 = icmp ne i32 %tmp.2, 0 ; <i1> [#uses=1] - br i1 %tmp.4, label %loopentry.0, label %loopentry.1 -loopentry.1: ; preds = %loopentry.0 - %h.1 = phi i32 [ %tmp.2, %loopentry.0 ] ; <i32> [#uses=1] - ret i32 %h.1 -} - diff --git a/test/ExecutionEngine/MCJIT/2003-06-05-PHIBug.ll b/test/ExecutionEngine/MCJIT/2003-06-05-PHIBug.ll deleted file mode 100644 index a22fe07..0000000 --- a/test/ExecutionEngine/MCJIT/2003-06-05-PHIBug.ll +++ /dev/null @@ -1,17 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -; Testcase distilled from 256.bzip2. - -target datalayout = "e-p:32:32" - -define i32 @main() { -entry: - %X = add i32 1, -1 ; <i32> [#uses=3] - br label %Next -Next: ; preds = %entry - %A = phi i32 [ %X, %entry ] ; <i32> [#uses=0] - %B = phi i32 [ %X, %entry ] ; <i32> [#uses=0] - %C = phi i32 [ %X, %entry ] ; <i32> [#uses=1] - ret i32 %C -} - diff --git a/test/ExecutionEngine/MCJIT/2003-08-15-AllocaAssertion.ll b/test/ExecutionEngine/MCJIT/2003-08-15-AllocaAssertion.ll deleted file mode 100644 index b3c6d8a..0000000 --- a/test/ExecutionEngine/MCJIT/2003-08-15-AllocaAssertion.ll +++ /dev/null @@ -1,11 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -; This testcase failed to work because two variable sized allocas confused the -; local register allocator. - -define i32 @main(i32 %X) { - %A = alloca i32, i32 %X ; <i32*> [#uses=0] - %B = alloca float, i32 %X ; <float*> [#uses=0] - ret i32 0 -} - diff --git a/test/ExecutionEngine/MCJIT/2003-08-21-EnvironmentTest.ll b/test/ExecutionEngine/MCJIT/2003-08-21-EnvironmentTest.ll deleted file mode 100644 index bd32f30..0000000 --- a/test/ExecutionEngine/MCJIT/2003-08-21-EnvironmentTest.ll +++ /dev/null @@ -1,21 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -; -; Regression Test: EnvironmentTest.ll -; -; Description: -; This is a regression test that verifies that the JIT passes the -; environment to the main() function. -; - - -declare i32 @strlen(i8*) - -define i32 @main(i32 %argc.1, i8** %argv.1, i8** %envp.1) { - %tmp.2 = load i8** %envp.1 ; <i8*> [#uses=1] - %tmp.3 = call i32 @strlen( i8* %tmp.2 ) ; <i32> [#uses=1] - %T = icmp eq i32 %tmp.3, 0 ; <i1> [#uses=1] - %R = zext i1 %T to i32 ; <i32> [#uses=1] - ret i32 %R -} - diff --git a/test/ExecutionEngine/MCJIT/2003-08-23-RegisterAllocatePhysReg.ll b/test/ExecutionEngine/MCJIT/2003-08-23-RegisterAllocatePhysReg.ll deleted file mode 100644 index 1959534..0000000 --- a/test/ExecutionEngine/MCJIT/2003-08-23-RegisterAllocatePhysReg.ll +++ /dev/null @@ -1,34 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -; This testcase exposes a bug in the local register allocator where it runs out -; of registers (due to too many overlapping live ranges), but then attempts to -; use the ESP register (which is not allocatable) to hold a value. - -define i32 @main(i32 %A) { - ; ESP gets used again... - %Ap2 = alloca i32, i32 %A ; <i32*> [#uses=11] - ; Produce lots of overlapping live ranges - %B = add i32 %A, 1 ; <i32> [#uses=1] - %C = add i32 %A, 2 ; <i32> [#uses=1] - %D = add i32 %A, 3 ; <i32> [#uses=1] - %E = add i32 %A, 4 ; <i32> [#uses=1] - %F = add i32 %A, 5 ; <i32> [#uses=1] - %G = add i32 %A, 6 ; <i32> [#uses=1] - %H = add i32 %A, 7 ; <i32> [#uses=1] - %I = add i32 %A, 8 ; <i32> [#uses=1] - %J = add i32 %A, 9 ; <i32> [#uses=1] - %K = add i32 %A, 10 ; <i32> [#uses=1] - ; Uses of all of the values - store i32 %A, i32* %Ap2 - store i32 %B, i32* %Ap2 - store i32 %C, i32* %Ap2 - store i32 %D, i32* %Ap2 - store i32 %E, i32* %Ap2 - store i32 %F, i32* %Ap2 - store i32 %G, i32* %Ap2 - store i32 %H, i32* %Ap2 - store i32 %I, i32* %Ap2 - store i32 %J, i32* %Ap2 - store i32 %K, i32* %Ap2 - ret i32 0 -} diff --git a/test/ExecutionEngine/MCJIT/2003-10-18-PHINode-ConstantExpr-CondCode-Failure.ll b/test/ExecutionEngine/MCJIT/2003-10-18-PHINode-ConstantExpr-CondCode-Failure.ll deleted file mode 100644 index 1f8343f..0000000 --- a/test/ExecutionEngine/MCJIT/2003-10-18-PHINode-ConstantExpr-CondCode-Failure.ll +++ /dev/null @@ -1,23 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -@A = global i32 0 ; <i32*> [#uses=1] - -define i32 @main() { - %Ret = call i32 @test( i1 true, i32 0 ) ; <i32> [#uses=1] - ret i32 %Ret -} - -define i32 @test(i1 %c, i32 %A) { - br i1 %c, label %Taken1, label %NotTaken -Cont: ; preds = %Taken1, %NotTaken - %V = phi i32 [ 0, %NotTaken ], [ sub (i32 ptrtoint (i32* @A to i32), i32 1234), %Taken1 ] ; <i32> [#uses=0] - ret i32 0 -NotTaken: ; preds = %0 - br label %Cont -Taken1: ; preds = %0 - %B = icmp eq i32 %A, 0 ; <i1> [#uses=1] - br i1 %B, label %Cont, label %ExitError -ExitError: ; preds = %Taken1 - ret i32 12 -} - diff --git a/test/ExecutionEngine/MCJIT/2005-12-02-TailCallBug.ll b/test/ExecutionEngine/MCJIT/2005-12-02-TailCallBug.ll deleted file mode 100644 index 79a7d58..0000000 --- a/test/ExecutionEngine/MCJIT/2005-12-02-TailCallBug.ll +++ /dev/null @@ -1,22 +0,0 @@ -; PR672 -; RUN: %lli -use-mcjit %s -; XFAIL: mcjit-ia32 - -define i32 @main() { - %f = bitcast i32 (i32, i32*, i32)* @check_tail to i32* ; <i32*> [#uses=1] - %res = tail call fastcc i32 @check_tail( i32 10, i32* %f, i32 10 ) ; <i32> [#uses=1] - ret i32 %res -} - -define fastcc i32 @check_tail(i32 %x, i32* %f, i32 %g) { - %tmp1 = icmp sgt i32 %x, 0 ; <i1> [#uses=1] - br i1 %tmp1, label %if-then, label %if-else -if-then: ; preds = %0 - %fun_ptr = bitcast i32* %f to i32 (i32, i32*, i32)* ; <i32 (i32, i32*, i32)*> [#uses=1] - %arg1 = add i32 %x, -1 ; <i32> [#uses=1] - %res = tail call fastcc i32 %fun_ptr( i32 %arg1, i32* %f, i32 %g ) ; <i32> [#uses=1] - ret i32 %res -if-else: ; preds = %0 - ret i32 %x -} - diff --git a/test/ExecutionEngine/MCJIT/2007-12-10-APIntLoadStore.ll b/test/ExecutionEngine/MCJIT/2007-12-10-APIntLoadStore.ll deleted file mode 100644 index 52cef4d..0000000 --- a/test/ExecutionEngine/MCJIT/2007-12-10-APIntLoadStore.ll +++ /dev/null @@ -1,19 +0,0 @@ -; RUN: %lli -use-mcjit -force-interpreter %s -; PR1836 - -define i32 @main() { -entry: - %retval = alloca i32 ; <i32*> [#uses=2] - %tmp = alloca i32 ; <i32*> [#uses=2] - %x = alloca i75, align 16 ; <i75*> [#uses=1] - %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] - store i75 999, i75* %x, align 16 - store i32 0, i32* %tmp, align 4 - %tmp1 = load i32* %tmp, align 4 ; <i32> [#uses=1] - store i32 %tmp1, i32* %retval, align 4 - br label %return - -return: ; preds = %entry - %retval2 = load i32* %retval ; <i32> [#uses=1] - ret i32 %retval2 -} diff --git a/test/ExecutionEngine/MCJIT/2008-06-05-APInt-OverAShr.ll b/test/ExecutionEngine/MCJIT/2008-06-05-APInt-OverAShr.ll deleted file mode 100644 index a6e917f..0000000 --- a/test/ExecutionEngine/MCJIT/2008-06-05-APInt-OverAShr.ll +++ /dev/null @@ -1,59 +0,0 @@ -; RUN: %lli -use-mcjit -force-interpreter=true %s | grep 1 - -target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32" -target triple = "i686-pc-linux-gnu" -@.str = internal constant [10 x i8] c"MSB = %d\0A\00" ; <[10 x i8]*> [#uses=1] - -define i65 @foo(i65 %x) { -entry: - %x_addr = alloca i65 ; <i65*> [#uses=2] - %retval = alloca i65 ; <i65*> [#uses=2] - %tmp = alloca i65 ; <i65*> [#uses=2] - %"alloca point" = bitcast i65 0 to i65 ; <i65> [#uses=0] - store i65 %x, i65* %x_addr - %tmp1 = load i65* %x_addr, align 4 ; <i65> [#uses=1] - %tmp2 = ashr i65 %tmp1, 65 ; <i65> [#uses=1] - store i65 %tmp2, i65* %tmp, align 4 - %tmp3 = load i65* %tmp, align 4 ; <i65> [#uses=1] - store i65 %tmp3, i65* %retval, align 4 - br label %return - -return: ; preds = %entry - %retval4 = load i65* %retval ; <i65> [#uses=1] - ret i65 %retval4 -} - -define i32 @main() { -entry: - %retval = alloca i32 ; <i32*> [#uses=1] - %iftmp.0 = alloca i32 ; <i32*> [#uses=3] - %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] - %tmp = call i65 @foo( i65 -9 ) ; <i65> [#uses=1] - %tmp1 = lshr i65 %tmp, 64 ; <i65> [#uses=1] - %tmp2 = xor i65 %tmp1, 1 ; <i65> [#uses=1] - %tmp3 = and i65 %tmp2, 1 ; <i65> [#uses=1] - %tmp34 = trunc i65 %tmp3 to i8 ; <i8> [#uses=1] - %toBool = icmp ne i8 %tmp34, 0 ; <i1> [#uses=1] - br i1 %toBool, label %cond_true, label %cond_false - -cond_true: ; preds = %entry - store i32 0, i32* %iftmp.0, align 4 - br label %cond_next - -cond_false: ; preds = %entry - store i32 1, i32* %iftmp.0, align 4 - br label %cond_next - -cond_next: ; preds = %cond_false, %cond_true - %tmp5 = getelementptr [10 x i8]* @.str, i32 0, i32 0 ; <i8*> [#uses=1] - %tmp6 = load i32* %iftmp.0, align 4 ; <i32> [#uses=1] - %tmp7 = call i32 (i8*, ...)* @printf( i8* noalias %tmp5, i32 %tmp6 ) nounwind ; <i32> [#uses=0] - br label %return - -return: ; preds = %cond_next - store i32 0, i32* %retval, align 4 - %retval8 = load i32* %retval ; <i32> [#uses=1] - ret i32 %retval8 -} - -declare i32 @printf(i8* noalias , ...) nounwind diff --git a/test/ExecutionEngine/MCJIT/2010-01-15-UndefValue.ll b/test/ExecutionEngine/MCJIT/2010-01-15-UndefValue.ll deleted file mode 100644 index 524a724..0000000 --- a/test/ExecutionEngine/MCJIT/2010-01-15-UndefValue.ll +++ /dev/null @@ -1,8 +0,0 @@ -; RUN: %lli -use-mcjit -force-interpreter=true %s - -define i32 @main() { - %a = add i32 0, undef - %b = fadd float 0.0, undef - %c = fadd double 0.0, undef - ret i32 0 -} diff --git a/test/ExecutionEngine/MCJIT/fpbitcast.ll b/test/ExecutionEngine/MCJIT/fpbitcast.ll deleted file mode 100644 index 9da908f..0000000 --- a/test/ExecutionEngine/MCJIT/fpbitcast.ll +++ /dev/null @@ -1,20 +0,0 @@ -; RUN: %lli -use-mcjit -force-interpreter=true %s | grep 40091eb8 -; -define i32 @test(double %x) { -entry: - %x46.i = bitcast double %x to i64 - %tmp343.i = lshr i64 %x46.i, 32 - %tmp344.i = trunc i64 %tmp343.i to i32 - ret i32 %tmp344.i -} - -define i32 @main() -{ - %res = call i32 @test(double 3.14) - %ptr = getelementptr [4 x i8]* @format, i32 0, i32 0 - call i32 (i8*,...)* @printf(i8* %ptr, i32 %res) - ret i32 0 -} - -declare i32 @printf(i8*, ...) -@format = internal constant [4 x i8] c"%x\0A\00" diff --git a/test/ExecutionEngine/MCJIT/hello.ll b/test/ExecutionEngine/MCJIT/hello.ll deleted file mode 100644 index a52b6d4..0000000 --- a/test/ExecutionEngine/MCJIT/hello.ll +++ /dev/null @@ -1,11 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -@.LC0 = internal global [12 x i8] c"Hello World\00" ; <[12 x i8]*> [#uses=1] - -declare i32 @puts(i8*) - -define i32 @main() { - %reg210 = call i32 @puts( i8* getelementptr ([12 x i8]* @.LC0, i64 0, i64 0) ) ; <i32> [#uses=0] - ret i32 0 -} - diff --git a/test/ExecutionEngine/MCJIT/hello2.ll b/test/ExecutionEngine/MCJIT/hello2.ll deleted file mode 100644 index 670a6dd..0000000 --- a/test/ExecutionEngine/MCJIT/hello2.ll +++ /dev/null @@ -1,17 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -@X = global i32 7 ; <i32*> [#uses=0] -@msg = internal global [13 x i8] c"Hello World\0A\00" ; <[13 x i8]*> [#uses=1] - -declare void @printf([13 x i8]*, ...) - -define void @bar() { - call void ([13 x i8]*, ...)* @printf( [13 x i8]* @msg ) - ret void -} - -define i32 @main() { - call void @bar( ) - ret i32 0 -} - diff --git a/test/ExecutionEngine/MCJIT/lit.local.cfg b/test/ExecutionEngine/MCJIT/lit.local.cfg deleted file mode 100644 index f943fe4..0000000 --- a/test/ExecutionEngine/MCJIT/lit.local.cfg +++ /dev/null @@ -1,17 +0,0 @@ -config.suffixes = ['.ll', '.c', '.cpp'] - -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) -if ('X86' in targets) | ('ARM' in targets): - config.unsupported = False -else: - config.unsupported = True - -if root.host_os in ['Win32', 'Cygwin', 'MingW']: - config.unsupported = True diff --git a/test/ExecutionEngine/MCJIT/simplesttest.ll b/test/ExecutionEngine/MCJIT/simplesttest.ll deleted file mode 100644 index a6688c2..0000000 --- a/test/ExecutionEngine/MCJIT/simplesttest.ll +++ /dev/null @@ -1,6 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -define i32 @main() { - ret i32 0 -} - diff --git a/test/ExecutionEngine/MCJIT/simpletest.ll b/test/ExecutionEngine/MCJIT/simpletest.ll deleted file mode 100644 index 4562aa6..0000000 --- a/test/ExecutionEngine/MCJIT/simpletest.ll +++ /dev/null @@ -1,11 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -define i32 @bar() { - ret i32 0 -} - -define i32 @main() { - %r = call i32 @bar( ) ; <i32> [#uses=1] - ret i32 %r -} - diff --git a/test/ExecutionEngine/MCJIT/test-arith.ll b/test/ExecutionEngine/MCJIT/test-arith.ll deleted file mode 100644 index 3177760..0000000 --- a/test/ExecutionEngine/MCJIT/test-arith.ll +++ /dev/null @@ -1,34 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -define i32 @main() { - %A = add i8 0, 12 ; <i8> [#uses=1] - %B = sub i8 %A, 1 ; <i8> [#uses=2] - %C = mul i8 %B, %B ; <i8> [#uses=2] - %D = sdiv i8 %C, %C ; <i8> [#uses=2] - %E = srem i8 %D, %D ; <i8> [#uses=0] - %F = udiv i8 5, 6 ; <i8> [#uses=0] - %G = urem i8 6, 5 ; <i8> [#uses=0] - %A.upgrd.1 = add i16 0, 12 ; <i16> [#uses=1] - %B.upgrd.2 = sub i16 %A.upgrd.1, 1 ; <i16> [#uses=2] - %C.upgrd.3 = mul i16 %B.upgrd.2, %B.upgrd.2 ; <i16> [#uses=2] - %D.upgrd.4 = sdiv i16 %C.upgrd.3, %C.upgrd.3 ; <i16> [#uses=2] - %E.upgrd.5 = srem i16 %D.upgrd.4, %D.upgrd.4 ; <i16> [#uses=0] - %F.upgrd.6 = udiv i16 5, 6 ; <i16> [#uses=0] - %G.upgrd.7 = urem i32 6, 5 ; <i32> [#uses=0] - %A.upgrd.8 = add i32 0, 12 ; <i32> [#uses=1] - %B.upgrd.9 = sub i32 %A.upgrd.8, 1 ; <i32> [#uses=2] - %C.upgrd.10 = mul i32 %B.upgrd.9, %B.upgrd.9 ; <i32> [#uses=2] - %D.upgrd.11 = sdiv i32 %C.upgrd.10, %C.upgrd.10 ; <i32> [#uses=2] - %E.upgrd.12 = srem i32 %D.upgrd.11, %D.upgrd.11 ; <i32> [#uses=0] - %F.upgrd.13 = udiv i32 5, 6 ; <i32> [#uses=0] - %G1 = urem i32 6, 5 ; <i32> [#uses=0] - %A.upgrd.14 = add i64 0, 12 ; <i64> [#uses=1] - %B.upgrd.15 = sub i64 %A.upgrd.14, 1 ; <i64> [#uses=2] - %C.upgrd.16 = mul i64 %B.upgrd.15, %B.upgrd.15 ; <i64> [#uses=2] - %D.upgrd.17 = sdiv i64 %C.upgrd.16, %C.upgrd.16 ; <i64> [#uses=2] - %E.upgrd.18 = srem i64 %D.upgrd.17, %D.upgrd.17 ; <i64> [#uses=0] - %F.upgrd.19 = udiv i64 5, 6 ; <i64> [#uses=0] - %G.upgrd.20 = urem i64 6, 5 ; <i64> [#uses=0] - ret i32 0 -} - diff --git a/test/ExecutionEngine/MCJIT/test-branch.ll b/test/ExecutionEngine/MCJIT/test-branch.ll deleted file mode 100644 index 702c110..0000000 --- a/test/ExecutionEngine/MCJIT/test-branch.ll +++ /dev/null @@ -1,12 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -; test unconditional branch -define i32 @main() { - br label %Test -Test: ; preds = %Test, %0 - %X = icmp eq i32 0, 4 ; <i1> [#uses=1] - br i1 %X, label %Test, label %Label -Label: ; preds = %Test - ret i32 0 -} - diff --git a/test/ExecutionEngine/MCJIT/test-call-no-external-funcs.ll b/test/ExecutionEngine/MCJIT/test-call-no-external-funcs.ll deleted file mode 100644 index 6f28405..0000000 --- a/test/ExecutionEngine/MCJIT/test-call-no-external-funcs.ll +++ /dev/null @@ -1,14 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -define i32 @_Z14func_exit_codev() nounwind uwtable { -entry: - ret i32 0 -} - -define i32 @main() nounwind uwtable { -entry: - %retval = alloca i32, align 4 - store i32 0, i32* %retval - %call = call i32 @_Z14func_exit_codev() - ret i32 %call -} diff --git a/test/ExecutionEngine/MCJIT/test-call.ll b/test/ExecutionEngine/MCJIT/test-call.ll deleted file mode 100644 index 7a244ee..0000000 --- a/test/ExecutionEngine/MCJIT/test-call.ll +++ /dev/null @@ -1,21 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -declare void @exit(i32) - -define i32 @test(i8 %C, i16 %S) { - %X = trunc i16 %S to i8 ; <i8> [#uses=1] - %Y = zext i8 %X to i32 ; <i32> [#uses=1] - ret i32 %Y -} - -define void @FP(void (i32)* %F) { - %X = call i32 @test( i8 123, i16 1024 ) ; <i32> [#uses=1] - call void %F( i32 %X ) - ret void -} - -define i32 @main() { - call void @FP( void (i32)* @exit ) - ret i32 1 -} - diff --git a/test/ExecutionEngine/MCJIT/test-cast.ll b/test/ExecutionEngine/MCJIT/test-cast.ll deleted file mode 100644 index 75e7d1b..0000000 --- a/test/ExecutionEngine/MCJIT/test-cast.ll +++ /dev/null @@ -1,109 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -define i32 @foo() { - ret i32 0 -} - -define i32 @main() { - icmp ne i1 true, false ; <i1>:1 [#uses=0] - zext i1 true to i8 ; <i8>:2 [#uses=0] - zext i1 true to i8 ; <i8>:3 [#uses=0] - zext i1 true to i16 ; <i16>:4 [#uses=0] - zext i1 true to i16 ; <i16>:5 [#uses=0] - zext i1 true to i32 ; <i32>:6 [#uses=0] - zext i1 true to i32 ; <i32>:7 [#uses=0] - zext i1 true to i64 ; <i64>:8 [#uses=0] - zext i1 true to i64 ; <i64>:9 [#uses=0] - uitofp i1 true to float ; <float>:10 [#uses=0] - uitofp i1 true to double ; <double>:11 [#uses=0] - icmp ne i8 0, 0 ; <i1>:12 [#uses=0] - icmp ne i8 1, 0 ; <i1>:13 [#uses=0] - bitcast i8 0 to i8 ; <i8>:14 [#uses=0] - bitcast i8 -1 to i8 ; <i8>:15 [#uses=0] - sext i8 4 to i16 ; <i16>:16 [#uses=0] - sext i8 4 to i16 ; <i16>:17 [#uses=0] - sext i8 4 to i64 ; <i64>:18 [#uses=0] - sext i8 4 to i64 ; <i64>:19 [#uses=0] - sitofp i8 4 to float ; <float>:20 [#uses=0] - sitofp i8 4 to double ; <double>:21 [#uses=0] - icmp ne i8 0, 0 ; <i1>:22 [#uses=0] - icmp ne i8 1, 0 ; <i1>:23 [#uses=0] - bitcast i8 0 to i8 ; <i8>:24 [#uses=0] - bitcast i8 1 to i8 ; <i8>:25 [#uses=0] - zext i8 4 to i16 ; <i16>:26 [#uses=0] - zext i8 4 to i16 ; <i16>:27 [#uses=0] - zext i8 4 to i64 ; <i64>:28 [#uses=0] - zext i8 4 to i64 ; <i64>:29 [#uses=0] - uitofp i8 0 to float ; <float>:30 [#uses=0] - uitofp i8 0 to double ; <double>:31 [#uses=0] - icmp ne i16 1, 0 ; <i1>:32 [#uses=0] - trunc i16 -1 to i8 ; <i8>:33 [#uses=0] - trunc i16 255 to i8 ; <i8>:34 [#uses=0] - bitcast i16 0 to i16 ; <i16>:35 [#uses=0] - bitcast i16 0 to i16 ; <i16>:36 [#uses=0] - sext i16 0 to i64 ; <i64>:37 [#uses=0] - sext i16 0 to i64 ; <i64>:38 [#uses=0] - sitofp i16 0 to float ; <float>:39 [#uses=0] - sitofp i16 0 to double ; <double>:40 [#uses=0] - icmp ne i16 1, 0 ; <i1>:41 [#uses=0] - trunc i16 1 to i8 ; <i8>:42 [#uses=0] - trunc i16 255 to i8 ; <i8>:43 [#uses=0] - bitcast i16 0 to i16 ; <i16>:44 [#uses=0] - bitcast i16 0 to i16 ; <i16>:45 [#uses=0] - zext i16 0 to i64 ; <i64>:46 [#uses=0] - zext i16 0 to i64 ; <i64>:47 [#uses=0] - uitofp i16 0 to float ; <float>:48 [#uses=0] - uitofp i16 0 to double ; <double>:49 [#uses=0] - icmp ne i32 6, 0 ; <i1>:50 [#uses=0] - trunc i32 -6 to i8 ; <i8>:51 [#uses=0] - trunc i32 6 to i8 ; <i8>:52 [#uses=0] - trunc i32 6 to i16 ; <i16>:53 [#uses=0] - bitcast i32 0 to i32 ; <i32>:54 [#uses=0] - sext i32 0 to i64 ; <i64>:55 [#uses=0] - sext i32 0 to i64 ; <i64>:56 [#uses=0] - sitofp i32 0 to float ; <float>:57 [#uses=0] - sitofp i32 0 to double ; <double>:58 [#uses=0] - icmp ne i32 6, 0 ; <i1>:59 [#uses=0] - trunc i32 7 to i8 ; <i8>:60 [#uses=0] - trunc i32 8 to i8 ; <i8>:61 [#uses=0] - trunc i32 9 to i16 ; <i16>:62 [#uses=0] - bitcast i32 10 to i32 ; <i32>:63 [#uses=0] - zext i32 0 to i64 ; <i64>:64 [#uses=0] - zext i32 0 to i64 ; <i64>:65 [#uses=0] - uitofp i32 0 to float ; <float>:66 [#uses=0] - uitofp i32 0 to double ; <double>:67 [#uses=0] - icmp ne i64 0, 0 ; <i1>:68 [#uses=0] - trunc i64 0 to i8 ; <i8>:69 [#uses=0] - trunc i64 0 to i8 ; <i8>:70 [#uses=0] - trunc i64 0 to i16 ; <i16>:71 [#uses=0] - trunc i64 0 to i16 ; <i16>:72 [#uses=0] - trunc i64 0 to i32 ; <i32>:73 [#uses=0] - trunc i64 0 to i32 ; <i32>:74 [#uses=0] - bitcast i64 0 to i64 ; <i64>:75 [#uses=0] - bitcast i64 0 to i64 ; <i64>:76 [#uses=0] - sitofp i64 0 to float ; <float>:77 [#uses=0] - sitofp i64 0 to double ; <double>:78 [#uses=0] - icmp ne i64 1, 0 ; <i1>:79 [#uses=0] - trunc i64 1 to i8 ; <i8>:80 [#uses=0] - trunc i64 1 to i8 ; <i8>:81 [#uses=0] - trunc i64 1 to i16 ; <i16>:82 [#uses=0] - trunc i64 1 to i16 ; <i16>:83 [#uses=0] - trunc i64 1 to i32 ; <i32>:84 [#uses=0] - trunc i64 1 to i32 ; <i32>:85 [#uses=0] - bitcast i64 1 to i64 ; <i64>:86 [#uses=0] - bitcast i64 1 to i64 ; <i64>:87 [#uses=0] - uitofp i64 1 to float ; <float>:88 [#uses=0] - uitofp i64 0 to double ; <double>:89 [#uses=0] - bitcast float 0.000000e+00 to float ; <float>:90 [#uses=0] - fpext float 0.000000e+00 to double ; <double>:91 [#uses=0] - fptosi double 0.000000e+00 to i8 ; <i8>:92 [#uses=0] - fptoui double 0.000000e+00 to i8 ; <i8>:93 [#uses=0] - fptosi double 0.000000e+00 to i16 ; <i16>:94 [#uses=0] - fptoui double 0.000000e+00 to i16 ; <i16>:95 [#uses=0] - fptosi double 0.000000e+00 to i32 ; <i32>:96 [#uses=0] - fptoui double 0.000000e+00 to i32 ; <i32>:97 [#uses=0] - fptosi double 0.000000e+00 to i64 ; <i64>:98 [#uses=0] - fptrunc double 0.000000e+00 to float ; <float>:99 [#uses=0] - bitcast double 0.000000e+00 to double ; <double>:100 [#uses=0] - ret i32 0 -} diff --git a/test/ExecutionEngine/MCJIT/test-constantexpr.ll b/test/ExecutionEngine/MCJIT/test-constantexpr.ll deleted file mode 100644 index 6b46639..0000000 --- a/test/ExecutionEngine/MCJIT/test-constantexpr.ll +++ /dev/null @@ -1,12 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -; This tests to make sure that we can evaluate weird constant expressions - -@A = global i32 5 ; <i32*> [#uses=1] -@B = global i32 6 ; <i32*> [#uses=1] - -define i32 @main() { - %A = or i1 false, icmp slt (i32* @A, i32* @B) ; <i1> [#uses=0] - ret i32 0 -} - diff --git a/test/ExecutionEngine/MCJIT/test-fp-no-external-funcs.ll b/test/ExecutionEngine/MCJIT/test-fp-no-external-funcs.ll deleted file mode 100644 index 35491df..0000000 --- a/test/ExecutionEngine/MCJIT/test-fp-no-external-funcs.ll +++ /dev/null @@ -1,21 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -define double @test(double* %DP, double %Arg) { - %D = load double* %DP ; <double> [#uses=1] - %V = fadd double %D, 1.000000e+00 ; <double> [#uses=2] - %W = fsub double %V, %V ; <double> [#uses=3] - %X = fmul double %W, %W ; <double> [#uses=2] - %Y = fdiv double %X, %X ; <double> [#uses=2] - %Q = fadd double %Y, %Arg ; <double> [#uses=1] - %R = bitcast double %Q to double ; <double> [#uses=1] - store double %Q, double* %DP - ret double %Y -} - -define i32 @main() { - %X = alloca double ; <double*> [#uses=2] - store double 0.000000e+00, double* %X - call double @test( double* %X, double 2.000000e+00 ) ; <double>:1 [#uses=0] - ret i32 0 -} - diff --git a/test/ExecutionEngine/MCJIT/test-fp.ll b/test/ExecutionEngine/MCJIT/test-fp.ll deleted file mode 100644 index 6fc5a50..0000000 --- a/test/ExecutionEngine/MCJIT/test-fp.ll +++ /dev/null @@ -1,23 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -define double @test(double* %DP, double %Arg) { - %D = load double* %DP ; <double> [#uses=1] - %V = fadd double %D, 1.000000e+00 ; <double> [#uses=2] - %W = fsub double %V, %V ; <double> [#uses=3] - %X = fmul double %W, %W ; <double> [#uses=2] - %Y = fdiv double %X, %X ; <double> [#uses=2] - %Z = frem double %Y, %Y ; <double> [#uses=3] - %Z1 = fdiv double %Z, %W ; <double> [#uses=0] - %Q = fadd double %Z, %Arg ; <double> [#uses=1] - %R = bitcast double %Q to double ; <double> [#uses=1] - store double %R, double* %DP - ret double %Z -} - -define i32 @main() { - %X = alloca double ; <double*> [#uses=2] - store double 0.000000e+00, double* %X - call double @test( double* %X, double 2.000000e+00 ) ; <double>:1 [#uses=0] - ret i32 0 -} - diff --git a/test/ExecutionEngine/MCJIT/test-global-init-nonzero.ll b/test/ExecutionEngine/MCJIT/test-global-init-nonzero.ll deleted file mode 100644 index 4a790c6..0000000 --- a/test/ExecutionEngine/MCJIT/test-global-init-nonzero.ll +++ /dev/null @@ -1,34 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -@count = global i32 1, align 4 - -define i32 @main() nounwind uwtable { -entry: - %retval = alloca i32, align 4 - %i = alloca i32, align 4 - store i32 0, i32* %retval - store i32 0, i32* %i, align 4 - br label %for.cond - -for.cond: ; preds = %for.inc, %entry - %0 = load i32* %i, align 4 - %cmp = icmp slt i32 %0, 49 - br i1 %cmp, label %for.body, label %for.end - -for.body: ; preds = %for.cond - %1 = load i32* @count, align 4 - %inc = add nsw i32 %1, 1 - store i32 %inc, i32* @count, align 4 - br label %for.inc - -for.inc: ; preds = %for.body - %2 = load i32* %i, align 4 - %inc1 = add nsw i32 %2, 1 - store i32 %inc1, i32* %i, align 4 - br label %for.cond - -for.end: ; preds = %for.cond - %3 = load i32* @count, align 4 - %sub = sub nsw i32 %3, 50 - ret i32 %sub -} diff --git a/test/ExecutionEngine/MCJIT/test-loadstore.ll b/test/ExecutionEngine/MCJIT/test-loadstore.ll deleted file mode 100644 index e917149..0000000 --- a/test/ExecutionEngine/MCJIT/test-loadstore.ll +++ /dev/null @@ -1,31 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -define void @test(i8* %P, i16* %P.upgrd.1, i32* %P.upgrd.2, i64* %P.upgrd.3) { - %V = load i8* %P ; <i8> [#uses=1] - store i8 %V, i8* %P - %V.upgrd.4 = load i16* %P.upgrd.1 ; <i16> [#uses=1] - store i16 %V.upgrd.4, i16* %P.upgrd.1 - %V.upgrd.5 = load i32* %P.upgrd.2 ; <i32> [#uses=1] - store i32 %V.upgrd.5, i32* %P.upgrd.2 - %V.upgrd.6 = load i64* %P.upgrd.3 ; <i64> [#uses=1] - store i64 %V.upgrd.6, i64* %P.upgrd.3 - ret void -} - -define i32 @varalloca(i32 %Size) { - ;; Variable sized alloca - %X = alloca i32, i32 %Size ; <i32*> [#uses=2] - store i32 %Size, i32* %X - %Y = load i32* %X ; <i32> [#uses=1] - ret i32 %Y -} - -define i32 @main() { - %A = alloca i8 ; <i8*> [#uses=1] - %B = alloca i16 ; <i16*> [#uses=1] - %C = alloca i32 ; <i32*> [#uses=1] - %D = alloca i64 ; <i64*> [#uses=1] - call void @test( i8* %A, i16* %B, i32* %C, i64* %D ) - call i32 @varalloca( i32 7 ) ; <i32>:1 [#uses=0] - ret i32 0 -} diff --git a/test/ExecutionEngine/MCJIT/test-local.ll b/test/ExecutionEngine/MCJIT/test-local.ll deleted file mode 100644 index 4f5ae47..0000000 --- a/test/ExecutionEngine/MCJIT/test-local.ll +++ /dev/null @@ -1,34 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -define i32 @main() nounwind uwtable { -entry: - %retval = alloca i32, align 4 - %count = alloca i32, align 4 - %i = alloca i32, align 4 - store i32 0, i32* %retval - store i32 0, i32* %count, align 4 - store i32 0, i32* %i, align 4 - br label %for.cond - -for.cond: ; preds = %for.inc, %entry - %0 = load i32* %i, align 4 - %cmp = icmp slt i32 %0, 50 - br i1 %cmp, label %for.body, label %for.end - -for.body: ; preds = %for.cond - %1 = load i32* %count, align 4 - %inc = add nsw i32 %1, 1 - store i32 %inc, i32* %count, align 4 - br label %for.inc - -for.inc: ; preds = %for.body - %2 = load i32* %i, align 4 - %inc1 = add nsw i32 %2, 1 - store i32 %inc1, i32* %i, align 4 - br label %for.cond - -for.end: ; preds = %for.cond - %3 = load i32* %count, align 4 - %sub = sub nsw i32 %3, 50 - ret i32 %sub -} diff --git a/test/ExecutionEngine/MCJIT/test-logical.ll b/test/ExecutionEngine/MCJIT/test-logical.ll deleted file mode 100644 index 0540c22..0000000 --- a/test/ExecutionEngine/MCJIT/test-logical.ll +++ /dev/null @@ -1,18 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -define i32 @main() { - %A = and i8 4, 8 ; <i8> [#uses=2] - %B = or i8 %A, 7 ; <i8> [#uses=1] - %C = xor i8 %B, %A ; <i8> [#uses=0] - %A.upgrd.1 = and i16 4, 8 ; <i16> [#uses=2] - %B.upgrd.2 = or i16 %A.upgrd.1, 7 ; <i16> [#uses=1] - %C.upgrd.3 = xor i16 %B.upgrd.2, %A.upgrd.1 ; <i16> [#uses=0] - %A.upgrd.4 = and i32 4, 8 ; <i32> [#uses=2] - %B.upgrd.5 = or i32 %A.upgrd.4, 7 ; <i32> [#uses=1] - %C.upgrd.6 = xor i32 %B.upgrd.5, %A.upgrd.4 ; <i32> [#uses=0] - %A.upgrd.7 = and i64 4, 8 ; <i64> [#uses=2] - %B.upgrd.8 = or i64 %A.upgrd.7, 7 ; <i64> [#uses=1] - %C.upgrd.9 = xor i64 %B.upgrd.8, %A.upgrd.7 ; <i64> [#uses=0] - ret i32 0 -} - diff --git a/test/ExecutionEngine/MCJIT/test-loop.ll b/test/ExecutionEngine/MCJIT/test-loop.ll deleted file mode 100644 index b1dbf40..0000000 --- a/test/ExecutionEngine/MCJIT/test-loop.ll +++ /dev/null @@ -1,14 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -define i32 @main() { -; <label>:0 - br label %Loop -Loop: ; preds = %Loop, %0 - %I = phi i32 [ 0, %0 ], [ %i2, %Loop ] ; <i32> [#uses=1] - %i2 = add i32 %I, 1 ; <i32> [#uses=2] - %C = icmp eq i32 %i2, 10 ; <i1> [#uses=1] - br i1 %C, label %Out, label %Loop -Out: ; preds = %Loop - ret i32 0 -} - diff --git a/test/ExecutionEngine/MCJIT/test-phi.ll b/test/ExecutionEngine/MCJIT/test-phi.ll deleted file mode 100644 index fbc0808..0000000 --- a/test/ExecutionEngine/MCJIT/test-phi.ll +++ /dev/null @@ -1,34 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -; test phi node -@Y = global i32 6 ; <i32*> [#uses=1] - -define void @blah(i32* %X) { -; <label>:0 - br label %T -T: ; preds = %Dead, %0 - phi i32* [ %X, %0 ], [ @Y, %Dead ] ; <i32*>:1 [#uses=0] - ret void -Dead: ; No predecessors! - br label %T -} - -define i32 @test(i1 %C) { -; <label>:0 - br i1 %C, label %T, label %T -T: ; preds = %0, %0 - %X = phi i32 [ 123, %0 ], [ 123, %0 ] ; <i32> [#uses=1] - ret i32 %X -} - -define i32 @main() { -; <label>:0 - br label %Test -Test: ; preds = %Dead, %0 - %X = phi i32 [ 0, %0 ], [ %Y, %Dead ] ; <i32> [#uses=1] - ret i32 %X -Dead: ; No predecessors! - %Y = ashr i32 12, 4 ; <i32> [#uses=1] - br label %Test -} - diff --git a/test/ExecutionEngine/MCJIT/test-ret.ll b/test/ExecutionEngine/MCJIT/test-ret.ll deleted file mode 100644 index 1b90ee0..0000000 --- a/test/ExecutionEngine/MCJIT/test-ret.ll +++ /dev/null @@ -1,46 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -; test return instructions -define void @test1() { - ret void -} - -define i8 @test2() { - ret i8 1 -} - -define i8 @test3() { - ret i8 1 -} - -define i16 @test4() { - ret i16 -1 -} - -define i16 @test5() { - ret i16 -1 -} - -define i32 @main() { - ret i32 0 -} - -define i32 @test6() { - ret i32 4 -} - -define i64 @test7() { - ret i64 0 -} - -define i64 @test8() { - ret i64 0 -} - -define float @test9() { - ret float 1.000000e+00 -} - -define double @test10() { - ret double 2.000000e+00 -} diff --git a/test/ExecutionEngine/MCJIT/test-return.ll b/test/ExecutionEngine/MCJIT/test-return.ll deleted file mode 100644 index 9c399ca..0000000 --- a/test/ExecutionEngine/MCJIT/test-return.ll +++ /dev/null @@ -1,8 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -define i32 @main() nounwind uwtable { -entry: - %retval = alloca i32, align 4 - store i32 0, i32* %retval - ret i32 0 -} diff --git a/test/ExecutionEngine/MCJIT/test-setcond-fp.ll b/test/ExecutionEngine/MCJIT/test-setcond-fp.ll deleted file mode 100644 index 030ff31..0000000 --- a/test/ExecutionEngine/MCJIT/test-setcond-fp.ll +++ /dev/null @@ -1,24 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - - -define i32 @main() { - %double1 = fadd double 0.000000e+00, 0.000000e+00 ; <double> [#uses=6] - %double2 = fadd double 0.000000e+00, 0.000000e+00 ; <double> [#uses=6] - %float1 = fadd float 0.000000e+00, 0.000000e+00 ; <float> [#uses=6] - %float2 = fadd float 0.000000e+00, 0.000000e+00 ; <float> [#uses=6] - %test49 = fcmp oeq float %float1, %float2 ; <i1> [#uses=0] - %test50 = fcmp oge float %float1, %float2 ; <i1> [#uses=0] - %test51 = fcmp ogt float %float1, %float2 ; <i1> [#uses=0] - %test52 = fcmp ole float %float1, %float2 ; <i1> [#uses=0] - %test53 = fcmp olt float %float1, %float2 ; <i1> [#uses=0] - %test54 = fcmp une float %float1, %float2 ; <i1> [#uses=0] - %test55 = fcmp oeq double %double1, %double2 ; <i1> [#uses=0] - %test56 = fcmp oge double %double1, %double2 ; <i1> [#uses=0] - %test57 = fcmp ogt double %double1, %double2 ; <i1> [#uses=0] - %test58 = fcmp ole double %double1, %double2 ; <i1> [#uses=0] - %test59 = fcmp olt double %double1, %double2 ; <i1> [#uses=0] - %test60 = fcmp une double %double1, %double2 ; <i1> [#uses=0] - ret i32 0 -} - - diff --git a/test/ExecutionEngine/MCJIT/test-setcond-int.ll b/test/ExecutionEngine/MCJIT/test-setcond-int.ll deleted file mode 100644 index 1113efe..0000000 --- a/test/ExecutionEngine/MCJIT/test-setcond-int.ll +++ /dev/null @@ -1,69 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -define i32 @main() { - %int1 = add i32 0, 0 ; <i32> [#uses=6] - %int2 = add i32 0, 0 ; <i32> [#uses=6] - %long1 = add i64 0, 0 ; <i64> [#uses=6] - %long2 = add i64 0, 0 ; <i64> [#uses=6] - %sbyte1 = add i8 0, 0 ; <i8> [#uses=6] - %sbyte2 = add i8 0, 0 ; <i8> [#uses=6] - %short1 = add i16 0, 0 ; <i16> [#uses=6] - %short2 = add i16 0, 0 ; <i16> [#uses=6] - %ubyte1 = add i8 0, 0 ; <i8> [#uses=6] - %ubyte2 = add i8 0, 0 ; <i8> [#uses=6] - %uint1 = add i32 0, 0 ; <i32> [#uses=6] - %uint2 = add i32 0, 0 ; <i32> [#uses=6] - %ulong1 = add i64 0, 0 ; <i64> [#uses=6] - %ulong2 = add i64 0, 0 ; <i64> [#uses=6] - %ushort1 = add i16 0, 0 ; <i16> [#uses=6] - %ushort2 = add i16 0, 0 ; <i16> [#uses=6] - %test1 = icmp eq i8 %ubyte1, %ubyte2 ; <i1> [#uses=0] - %test2 = icmp uge i8 %ubyte1, %ubyte2 ; <i1> [#uses=0] - %test3 = icmp ugt i8 %ubyte1, %ubyte2 ; <i1> [#uses=0] - %test4 = icmp ule i8 %ubyte1, %ubyte2 ; <i1> [#uses=0] - %test5 = icmp ult i8 %ubyte1, %ubyte2 ; <i1> [#uses=0] - %test6 = icmp ne i8 %ubyte1, %ubyte2 ; <i1> [#uses=0] - %test7 = icmp eq i16 %ushort1, %ushort2 ; <i1> [#uses=0] - %test8 = icmp uge i16 %ushort1, %ushort2 ; <i1> [#uses=0] - %test9 = icmp ugt i16 %ushort1, %ushort2 ; <i1> [#uses=0] - %test10 = icmp ule i16 %ushort1, %ushort2 ; <i1> [#uses=0] - %test11 = icmp ult i16 %ushort1, %ushort2 ; <i1> [#uses=0] - %test12 = icmp ne i16 %ushort1, %ushort2 ; <i1> [#uses=0] - %test13 = icmp eq i32 %uint1, %uint2 ; <i1> [#uses=0] - %test14 = icmp uge i32 %uint1, %uint2 ; <i1> [#uses=0] - %test15 = icmp ugt i32 %uint1, %uint2 ; <i1> [#uses=0] - %test16 = icmp ule i32 %uint1, %uint2 ; <i1> [#uses=0] - %test17 = icmp ult i32 %uint1, %uint2 ; <i1> [#uses=0] - %test18 = icmp ne i32 %uint1, %uint2 ; <i1> [#uses=0] - %test19 = icmp eq i64 %ulong1, %ulong2 ; <i1> [#uses=0] - %test20 = icmp uge i64 %ulong1, %ulong2 ; <i1> [#uses=0] - %test21 = icmp ugt i64 %ulong1, %ulong2 ; <i1> [#uses=0] - %test22 = icmp ule i64 %ulong1, %ulong2 ; <i1> [#uses=0] - %test23 = icmp ult i64 %ulong1, %ulong2 ; <i1> [#uses=0] - %test24 = icmp ne i64 %ulong1, %ulong2 ; <i1> [#uses=0] - %test25 = icmp eq i8 %sbyte1, %sbyte2 ; <i1> [#uses=0] - %test26 = icmp sge i8 %sbyte1, %sbyte2 ; <i1> [#uses=0] - %test27 = icmp sgt i8 %sbyte1, %sbyte2 ; <i1> [#uses=0] - %test28 = icmp sle i8 %sbyte1, %sbyte2 ; <i1> [#uses=0] - %test29 = icmp slt i8 %sbyte1, %sbyte2 ; <i1> [#uses=0] - %test30 = icmp ne i8 %sbyte1, %sbyte2 ; <i1> [#uses=0] - %test31 = icmp eq i16 %short1, %short2 ; <i1> [#uses=0] - %test32 = icmp sge i16 %short1, %short2 ; <i1> [#uses=0] - %test33 = icmp sgt i16 %short1, %short2 ; <i1> [#uses=0] - %test34 = icmp sle i16 %short1, %short2 ; <i1> [#uses=0] - %test35 = icmp slt i16 %short1, %short2 ; <i1> [#uses=0] - %test36 = icmp ne i16 %short1, %short2 ; <i1> [#uses=0] - %test37 = icmp eq i32 %int1, %int2 ; <i1> [#uses=0] - %test38 = icmp sge i32 %int1, %int2 ; <i1> [#uses=0] - %test39 = icmp sgt i32 %int1, %int2 ; <i1> [#uses=0] - %test40 = icmp sle i32 %int1, %int2 ; <i1> [#uses=0] - %test41 = icmp slt i32 %int1, %int2 ; <i1> [#uses=0] - %test42 = icmp ne i32 %int1, %int2 ; <i1> [#uses=0] - %test43 = icmp eq i64 %long1, %long2 ; <i1> [#uses=0] - %test44 = icmp sge i64 %long1, %long2 ; <i1> [#uses=0] - %test45 = icmp sgt i64 %long1, %long2 ; <i1> [#uses=0] - %test46 = icmp sle i64 %long1, %long2 ; <i1> [#uses=0] - %test47 = icmp slt i64 %long1, %long2 ; <i1> [#uses=0] - %test48 = icmp ne i64 %long1, %long2 ; <i1> [#uses=0] - ret i32 0 -} diff --git a/test/ExecutionEngine/MCJIT/test-shift.ll b/test/ExecutionEngine/MCJIT/test-shift.ll deleted file mode 100644 index 2da824f..0000000 --- a/test/ExecutionEngine/MCJIT/test-shift.ll +++ /dev/null @@ -1,32 +0,0 @@ -; RUN: %lli -use-mcjit %s > /dev/null - -define i32 @main() { - %shamt = add i8 0, 1 ; <i8> [#uses=8] - %shift.upgrd.1 = zext i8 %shamt to i32 ; <i32> [#uses=1] - %t1.s = shl i32 1, %shift.upgrd.1 ; <i32> [#uses=0] - %t2.s = shl i32 1, 4 ; <i32> [#uses=0] - %shift.upgrd.2 = zext i8 %shamt to i32 ; <i32> [#uses=1] - %t1 = shl i32 1, %shift.upgrd.2 ; <i32> [#uses=0] - %t2 = shl i32 1, 5 ; <i32> [#uses=0] - %t2.s.upgrd.3 = shl i64 1, 4 ; <i64> [#uses=0] - %t2.upgrd.4 = shl i64 1, 5 ; <i64> [#uses=0] - %shift.upgrd.5 = zext i8 %shamt to i32 ; <i32> [#uses=1] - %tr1.s = ashr i32 1, %shift.upgrd.5 ; <i32> [#uses=0] - %tr2.s = ashr i32 1, 4 ; <i32> [#uses=0] - %shift.upgrd.6 = zext i8 %shamt to i32 ; <i32> [#uses=1] - %tr1 = lshr i32 1, %shift.upgrd.6 ; <i32> [#uses=0] - %tr2 = lshr i32 1, 5 ; <i32> [#uses=0] - %tr1.l = ashr i64 1, 4 ; <i64> [#uses=0] - %shift.upgrd.7 = zext i8 %shamt to i64 ; <i64> [#uses=1] - %tr2.l = ashr i64 1, %shift.upgrd.7 ; <i64> [#uses=0] - %tr3.l = shl i64 1, 4 ; <i64> [#uses=0] - %shift.upgrd.8 = zext i8 %shamt to i64 ; <i64> [#uses=1] - %tr4.l = shl i64 1, %shift.upgrd.8 ; <i64> [#uses=0] - %tr1.u = lshr i64 1, 5 ; <i64> [#uses=0] - %shift.upgrd.9 = zext i8 %shamt to i64 ; <i64> [#uses=1] - %tr2.u = lshr i64 1, %shift.upgrd.9 ; <i64> [#uses=0] - %tr3.u = shl i64 1, 5 ; <i64> [#uses=0] - %shift.upgrd.10 = zext i8 %shamt to i64 ; <i64> [#uses=1] - %tr4.u = shl i64 1, %shift.upgrd.10 ; <i64> [#uses=0] - ret i32 0 -} diff --git a/test/ExecutionEngine/hello.ll b/test/ExecutionEngine/hello.ll index 4d1d987..f2c4a7f 100644 --- a/test/ExecutionEngine/hello.ll +++ b/test/ExecutionEngine/hello.ll @@ -1,6 +1,5 @@ ; RUN: %lli %s > /dev/null ; XFAIL: arm -; XFAIL: mcjit @.LC0 = internal global [12 x i8] c"Hello World\00" ; <[12 x i8]*> [#uses=1] diff --git a/test/ExecutionEngine/hello2.ll b/test/ExecutionEngine/hello2.ll index 05b4409..155ed41 100644 --- a/test/ExecutionEngine/hello2.ll +++ b/test/ExecutionEngine/hello2.ll @@ -1,6 +1,5 @@ ; RUN: %lli %s > /dev/null ; XFAIL: arm -; XFAIL: mcjit @X = global i32 7 ; <i32*> [#uses=0] @msg = internal global [13 x i8] c"Hello World\0A\00" ; <[13 x i8]*> [#uses=1] diff --git a/test/ExecutionEngine/stubs.ll b/test/ExecutionEngine/stubs.ll index c1134e9..b40e4be 100644 --- a/test/ExecutionEngine/stubs.ll +++ b/test/ExecutionEngine/stubs.ll @@ -1,6 +1,5 @@ ; RUN: %lli -disable-lazy-compilation=false %s ; XFAIL: arm -; XFAIL: mcjit define i32 @main() nounwind { entry: diff --git a/test/ExecutionEngine/test-call-no-external-funcs.ll b/test/ExecutionEngine/test-call-no-external-funcs.ll index 0c98379..b2dd532 100644 --- a/test/ExecutionEngine/test-call-no-external-funcs.ll +++ b/test/ExecutionEngine/test-call-no-external-funcs.ll @@ -1,6 +1,5 @@ ; RUN: %lli %s > /dev/null ; XFAIL: arm -; XFAIL: mcjit define i32 @_Z14func_exit_codev() nounwind uwtable { entry: diff --git a/test/ExecutionEngine/test-call.ll b/test/ExecutionEngine/test-call.ll index eaadbba..3fd39fe 100644 --- a/test/ExecutionEngine/test-call.ll +++ b/test/ExecutionEngine/test-call.ll @@ -1,6 +1,5 @@ ; RUN: %lli %s > /dev/null ; XFAIL: arm -; XFAIL: mcjit declare void @exit(i32) diff --git a/test/ExecutionEngine/test-common-symbols.ll b/test/ExecutionEngine/test-common-symbols.ll index 52ce7d1..4dd9265 100644 --- a/test/ExecutionEngine/test-common-symbols.ll +++ b/test/ExecutionEngine/test-common-symbols.ll @@ -1,6 +1,5 @@ ; RUN: %lli -O0 -disable-lazy-compilation=false %s ; XFAIL: arm -; XFAIL: mcjit ; The intention of this test is to verify that symbols mapped to COMMON in ELF ; work as expected. diff --git a/test/ExecutionEngine/test-fp-no-external-funcs.ll b/test/ExecutionEngine/test-fp-no-external-funcs.ll index 6b8410a..61b12c2 100644 --- a/test/ExecutionEngine/test-fp-no-external-funcs.ll +++ b/test/ExecutionEngine/test-fp-no-external-funcs.ll @@ -1,5 +1,4 @@ ; RUN: %lli %s > /dev/null -; XFAIL: mcjit define double @test(double* %DP, double %Arg) { %D = load double* %DP ; <double> [#uses=1] diff --git a/test/ExecutionEngine/test-fp.ll b/test/ExecutionEngine/test-fp.ll index 3411ca1..2bf0210 100644 --- a/test/ExecutionEngine/test-fp.ll +++ b/test/ExecutionEngine/test-fp.ll @@ -1,5 +1,4 @@ ; RUN: %lli %s > /dev/null -; XFAIL: mcjit define double @test(double* %DP, double %Arg) { %D = load double* %DP ; <double> [#uses=1] diff --git a/test/ExecutionEngine/test-global-init-nonzero.ll b/test/ExecutionEngine/test-global-init-nonzero.ll index a13bfc9..ef2d37b 100644 --- a/test/ExecutionEngine/test-global-init-nonzero.ll +++ b/test/ExecutionEngine/test-global-init-nonzero.ll @@ -1,6 +1,5 @@ ; RUN: %lli %s > /dev/null ; XFAIL: arm -; XFAIL: mcjit @count = global i32 1, align 4 diff --git a/test/ExecutionEngine/test-global.ll b/test/ExecutionEngine/test-global.ll index ce25cb2..2ea50de 100644 --- a/test/ExecutionEngine/test-global.ll +++ b/test/ExecutionEngine/test-global.ll @@ -1,6 +1,5 @@ ; RUN: %lli %s > /dev/null ; XFAIL: arm -; XFAIL: mcjit @count = global i32 0, align 4 diff --git a/test/ExecutionEngine/test-loadstore.ll b/test/ExecutionEngine/test-loadstore.ll index b9b7798..7574314 100644 --- a/test/ExecutionEngine/test-loadstore.ll +++ b/test/ExecutionEngine/test-loadstore.ll @@ -1,6 +1,5 @@ ; RUN: %lli %s > /dev/null ; XFAIL: arm -; XFAIL: mcjit-ia32 define void @test(i8* %P, i16* %P.upgrd.1, i32* %P.upgrd.2, i64* %P.upgrd.3) { %V = load i8* %P ; <i8> [#uses=1] diff --git a/test/Feature/llvm2cpp.exp b/test/Feature/llvm2cpp.exp deleted file mode 100644 index de0126c..0000000 --- a/test/Feature/llvm2cpp.exp +++ /dev/null @@ -1,3 +0,0 @@ -load_lib llvm2cpp.exp - -llvm2cpp-test [lsort [glob -nocomplain $srcdir/$subdir/*.ll]] diff --git a/test/Instrumentation/ThreadSanitizer/lit.local.cfg b/test/Instrumentation/ThreadSanitizer/lit.local.cfg new file mode 100644 index 0000000..19eebc0 --- /dev/null +++ b/test/Instrumentation/ThreadSanitizer/lit.local.cfg @@ -0,0 +1 @@ +config.suffixes = ['.ll', '.c', '.cpp'] diff --git a/test/Instrumentation/ThreadSanitizer/read_before_write.ll b/test/Instrumentation/ThreadSanitizer/read_before_write.ll new file mode 100644 index 0000000..482362a --- /dev/null +++ b/test/Instrumentation/ThreadSanitizer/read_before_write.ll @@ -0,0 +1,32 @@ +; RUN: opt < %s -tsan -S | FileCheck %s + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" + +define void @IncrementMe(i32* nocapture %ptr) nounwind uwtable { +entry: + %0 = load i32* %ptr, align 4 + %inc = add nsw i32 %0, 1 + store i32 %inc, i32* %ptr, align 4 + ret void +} +; CHECK: define void @IncrementMe +; CHECK-NOT: __tsan_read +; CHECK: __tsan_write +; CHECK: ret void + +define void @IncrementMeWithCallInBetween(i32* nocapture %ptr) nounwind uwtable { +entry: + %0 = load i32* %ptr, align 4 + %inc = add nsw i32 %0, 1 + call void @foo() + store i32 %inc, i32* %ptr, align 4 + ret void +} + +; CHECK: define void @IncrementMeWithCallInBetween +; CHECK: __tsan_read +; CHECK: __tsan_write +; CHECK: ret void + +declare void @foo() + diff --git a/test/Instrumentation/ThreadSanitizer/read_from_global.ll b/test/Instrumentation/ThreadSanitizer/read_from_global.ll new file mode 100644 index 0000000..a08453a --- /dev/null +++ b/test/Instrumentation/ThreadSanitizer/read_from_global.ll @@ -0,0 +1,61 @@ +; RUN: opt < %s -tsan -S | FileCheck %s +; Check that tsan does not instrument reads from constant globals. + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" + +@const_global = external constant i32 +define i32 @read_from_const_global() nounwind uwtable readnone { +entry: + %0 = load i32* @const_global, align 4 + ret i32 %0 +} +; CHECK: define i32 @read_from_const_global +; CHECK-NOT: __tsan +; CHECK: ret i32 + +@non_const_global = global i32 0, align 4 +define i32 @read_from_non_const_global() nounwind uwtable readonly { +entry: + %0 = load i32* @non_const_global, align 4 + ret i32 %0 +} + +; CHECK: define i32 @read_from_non_const_global +; CHECK: __tsan_read +; CHECK: ret i32 + +@const_global_array = external constant [10 x i32] +define i32 @read_from_const_global_array(i32 %idx) nounwind uwtable readnone { +entry: + %idxprom = sext i32 %idx to i64 + %arrayidx = getelementptr inbounds [10 x i32]* @const_global_array, i64 0, i64 %idxprom + %0 = load i32* %arrayidx, align 4 + ret i32 %0 +} + +; CHECK: define i32 @read_from_const_global_array +; CHECK-NOT: __tsan +; CHECK: ret i32 + +%struct.Foo = type { i32 (...)** } +define void @call_virtual_func(%struct.Foo* %f) uwtable { +entry: + %0 = bitcast %struct.Foo* %f to void (%struct.Foo*)*** + %vtable = load void (%struct.Foo*)*** %0, align 8, !tbaa !3 + %1 = load void (%struct.Foo*)** %vtable, align 8 + call void %1(%struct.Foo* %f) + ret void +} + +; CHECK: define void @call_virtual_func +; CHECK: __tsan_read +; CHECK: = load +; CHECK-NOT: __tsan_read +; CHECK: = load +; CHECK: ret void + +!0 = metadata !{metadata !"int", metadata !1} +!1 = metadata !{metadata !"omnipotent char", metadata !2} +!2 = metadata !{metadata !"Simple C/C++ TBAA", null} +!3 = metadata !{metadata !"vtable pointer", metadata !2} + diff --git a/test/Instrumentation/ThreadSanitizer/vptr_update.ll b/test/Instrumentation/ThreadSanitizer/vptr_update.ll new file mode 100644 index 0000000..f318659 --- /dev/null +++ b/test/Instrumentation/ThreadSanitizer/vptr_update.ll @@ -0,0 +1,13 @@ +; RUN: opt < %s -tsan -S | FileCheck %s +; Check that vtable pointer updates are treated in a special way. +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" + +define void @Foo(i8** nocapture %a, i8* %b) nounwind uwtable { +entry: +; CHECK: call void @__tsan_vptr_update + store i8* %b, i8** %a, align 8, !tbaa !0 + ret void +} +!0 = metadata !{metadata !"vtable pointer", metadata !1} +!1 = metadata !{metadata !"Simple C/C++ TBAA", null} + diff --git a/test/MC/ARM/arm_fixups.s b/test/MC/ARM/arm_fixups.s index 2f34748..74dfb99 100644 --- a/test/MC/ARM/arm_fixups.s +++ b/test/MC/ARM/arm_fixups.s @@ -3,7 +3,7 @@ bl _printf @ CHECK: bl _printf @ encoding: [A,A,A,0xeb] -@ CHECK: @ fixup A - offset: 0, value: _printf, kind: fixup_arm_bl +@ CHECK: @ fixup A - offset: 0, value: _printf, kind: fixup_arm_uncondbl mov r9, :lower16:(_foo) movw r9, :lower16:(_foo) diff --git a/test/MC/ARM/basic-arm-instructions.s b/test/MC/ARM/basic-arm-instructions.s index 4ae1ac7..4788ac7 100644 --- a/test/MC/ARM/basic-arm-instructions.s +++ b/test/MC/ARM/basic-arm-instructions.s @@ -382,13 +382,16 @@ Lforward: @------------------------------------------------------------------------------ bl _bar + bleq _bar blx _bar blls #28634268 blx #32424576 blx #16212288 @ CHECK: bl _bar @ encoding: [A,A,A,0xeb] -@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_bl +@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_uncondbl +@ CHECK: bleq _bar @ encoding: [A,A,A,0x0b] +@ CHECK: @ fixup A - offset: 0, value: _bar, kind: fixup_arm_condbl @ CHECK: blx _bar @ encoding: [A,A,A,0xfa] @ fixup A - offset: 0, value: _bar, kind: fixup_arm_blx @ CHECK: blls #28634268 @ encoding: [0x27,0x3b,0x6d,0x9b] @@ -494,6 +497,7 @@ Lforward: cmp r7, r8, ror r2 cmp r1, r6, rrx cmp r0, #-2 + cmp lr, #0 @ CHECK: cmp r1, #15 @ encoding: [0x0f,0x00,0x51,0xe3] @ CHECK: cmp r1, r6 @ encoding: [0x06,0x00,0x51,0xe1] @@ -508,6 +512,7 @@ Lforward: @ CHECK: cmp r7, r8, ror r2 @ encoding: [0x78,0x02,0x57,0xe1] @ CHECK: cmp r1, r6, rrx @ encoding: [0x66,0x00,0x51,0xe1] @ CHECK: cmn r0, #2 @ encoding: [0x02,0x00,0x70,0xe3] +@ CHECK: cmp lr, #0 @ encoding: [0x00,0x00,0x5e,0xe3] @------------------------------------------------------------------------------ diff --git a/test/MC/ARM/basic-thumb-instructions.s b/test/MC/ARM/basic-thumb-instructions.s index 6e830cd..bc2605c 100644 --- a/test/MC/ARM/basic-thumb-instructions.s +++ b/test/MC/ARM/basic-thumb-instructions.s @@ -59,12 +59,16 @@ _func: add sp, sp, #4 add r2, sp, #8 add r2, sp, #1020 + add sp, sp, #-8 + add sp, #-8 @ CHECK: add sp, #4 @ encoding: [0x01,0xb0] @ CHECK: add sp, #508 @ encoding: [0x7f,0xb0] @ CHECK: add sp, #4 @ encoding: [0x01,0xb0] @ CHECK: add r2, sp, #8 @ encoding: [0x02,0xaa] @ CHECK: add r2, sp, #1020 @ encoding: [0xff,0xaa] +@ CHECK: sub sp, #8 @ encoding: [0x82,0xb0] +@ CHECK: sub sp, #8 @ encoding: [0x82,0xb0] @------------------------------------------------------------------------------ @@ -93,10 +97,16 @@ _func: asrs r2, r3, #32 asrs r2, r3, #5 asrs r2, r3, #1 + asrs r5, #21 + asrs r5, r5, #21 + asrs r3, r5, #21 @ CHECK: asrs r2, r3, #32 @ encoding: [0x1a,0x10] @ CHECK: asrs r2, r3, #5 @ encoding: [0x5a,0x11] @ CHECK: asrs r2, r3, #1 @ encoding: [0x5a,0x10] +@ CHECK: asrs r5, r5, #21 @ encoding: [0x6d,0x15] +@ CHECK: asrs r5, r5, #21 @ encoding: [0x6d,0x15] +@ CHECK: asrs r3, r5, #21 @ encoding: [0x6b,0x15] @------------------------------------------------------------------------------ @@ -315,9 +325,15 @@ _func: @------------------------------------------------------------------------------ lsls r4, r5, #0 lsls r4, r5, #4 + lsls r3, #12 + lsls r3, r3, #12 + lsls r1, r3, #12 @ CHECK: lsls r4, r5, #0 @ encoding: [0x2c,0x00] @ CHECK: lsls r4, r5, #4 @ encoding: [0x2c,0x01] +@ CHECK: lsls r3, r3, #12 @ encoding: [0x1b,0x03] +@ CHECK: lsls r3, r3, #12 @ encoding: [0x1b,0x03] +@ CHECK: lsls r1, r3, #12 @ encoding: [0x19,0x03] @------------------------------------------------------------------------------ @@ -333,9 +349,15 @@ _func: @------------------------------------------------------------------------------ lsrs r1, r3, #1 lsrs r1, r3, #32 + lsrs r4, #20 + lsrs r4, r4, #20 + lsrs r2, r4, #20 @ CHECK: lsrs r1, r3, #1 @ encoding: [0x59,0x08] @ CHECK: lsrs r1, r3, #32 @ encoding: [0x19,0x08] +@ CHECK: lsrs r4, r4, #20 @ encoding: [0x24,0x0d] +@ CHECK: lsrs r4, r4, #20 @ encoding: [0x24,0x0d] +@ CHECK: lsrs r2, r4, #20 @ encoding: [0x22,0x0d] @------------------------------------------------------------------------------ diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s index ce97ca6..d2e208b 100644 --- a/test/MC/ARM/basic-thumb2-instructions.s +++ b/test/MC/ARM/basic-thumb2-instructions.s @@ -75,6 +75,8 @@ _func: adds r1, r2, #0x1f0 add r2, #1 add r0, r0, #32 + adds r2, r2, #56 + adds r2, #56 @ CHECK: itet eq @ encoding: [0x0a,0xbf] @ CHECK: addeq r1, r2, #4 @ encoding: [0x11,0x1d] @@ -89,6 +91,8 @@ _func: @ CHECK: adds.w r1, r2, #496 @ encoding: [0x12,0xf5,0xf8,0x71] @ CHECK: add.w r2, r2, #1 @ encoding: [0x02,0xf1,0x01,0x02] @ CHECK: add.w r0, r0, #32 @ encoding: [0x00,0xf1,0x20,0x00] +@ CHECK: adds r2, #56 @ encoding: [0x38,0x32] +@ CHECK: adds r2, #56 @ encoding: [0x38,0x32] @------------------------------------------------------------------------------ @@ -368,7 +372,8 @@ _func: cmp sp, r6, lsr #1 cmp r2, r5, asr #24 cmp r1, r4, ror #15 - cmp r0, #-2 + cmp r2, #-2 + cmp r9, #1 @ CHECK: cmp.w r5, #65280 @ encoding: [0xb5,0xf5,0x7f,0x4f] @ CHECK: cmp.w r4, r12 @ encoding: [0xb4,0xeb,0x0c,0x0f] @@ -377,7 +382,9 @@ _func: @ CHECK: cmp.w sp, r6, lsr #1 @ encoding: [0xbd,0xeb,0x56,0x0f] @ CHECK: cmp.w r2, r5, asr #24 @ encoding: [0xb2,0xeb,0x25,0x6f] @ CHECK: cmp.w r1, r4, ror #15 @ encoding: [0xb1,0xeb,0xf4,0x3f] -@ CHECK: cmn.w r0, #2 @ encoding: [0x10,0xf1,0x02,0x0f] +@ CHECK: cmn.w r2, #2 @ encoding: [0x12,0xf1,0x02,0x0f] +@ CHECK: cmp.w r9, #1 @ encoding: [0xb9,0xf1,0x01,0x0f] + @------------------------------------------------------------------------------ @ DBG @@ -1130,6 +1137,8 @@ _func: moveq r1, #12 movne.w r1, #12 mov.w r6, #450 + it lo + movlo r1, #-1 @ alias for mvn mov r3, #-3 @@ -1149,7 +1158,8 @@ _func: @ CHECK: moveq r1, #12 @ encoding: [0x0c,0x21] @ CHECK: movne.w r1, #12 @ encoding: [0x4f,0xf0,0x0c,0x01] @ CHECK: mov.w r6, #450 @ encoding: [0x4f,0xf4,0xe1,0x76] - +@ CHECK: it lo @ encoding: [0x38,0xbf] +@ CHECK: movlo.w r1, #-1 @ encoding: [0x4f,0xf0,0xff,0x31] @ CHECK: mvn r3, #2 @ encoding: [0x6f,0xf0,0x02,0x03] @------------------------------------------------------------------------------ @@ -1258,6 +1268,7 @@ _func: msr spsr_fc, r0 msr SPSR_fsxc, r5 msr cpsr_fsxc, r8 + msr cpsr, r3 @ CHECK: msr APSR_nzcvq, r1 @ encoding: [0x81,0xf3,0x00,0x88] @ CHECK: msr APSR_g, r2 @ encoding: [0x82,0xf3,0x00,0x84] @@ -1273,6 +1284,7 @@ _func: @ CHECK: msr SPSR_fc, r0 @ encoding: [0x90,0xf3,0x00,0x89] @ CHECK: msr SPSR_fsxc, r5 @ encoding: [0x95,0xf3,0x00,0x8f] @ CHECK: msr CPSR_fsxc, r8 @ encoding: [0x88,0xf3,0x00,0x8f] +@ CHECK: msr CPSR_fc, r3 @ encoding: [0x83,0xf3,0x00,0x89] @------------------------------------------------------------------------------ @@ -2644,6 +2656,8 @@ _func: subs r1, r2, #0x1f0 sub r2, #1 sub r0, r0, #32 + subs r2, r2, #56 + subs r2, #56 @ CHECK: itet eq @ encoding: [0x0a,0xbf] @ CHECK: subeq r1, r2, #4 @ encoding: [0x11,0x1f] @@ -2658,6 +2672,8 @@ _func: @ CHECK: subs.w r1, r2, #496 @ encoding: [0xb2,0xf5,0xf8,0x71] @ CHECK: sub.w r2, r2, #1 @ encoding: [0xa2,0xf1,0x01,0x02] @ CHECK: sub.w r0, r0, #32 @ encoding: [0xa0,0xf1,0x20,0x00] +@ CHECK: subs r2, #56 @ encoding: [0x38,0x3a] +@ CHECK: subs r2, #56 @ encoding: [0x38,0x3a] @------------------------------------------------------------------------------ @@ -2670,6 +2686,12 @@ _func: sub r4, r5, r6, asr #5 sub r4, r5, r6, ror #5 sub.w r5, r2, r12, rrx + sub r2, sp, ip + sub sp, sp, ip + sub sp, ip + sub.w r2, sp, ip + sub.w sp, sp, ip + sub.w sp, ip @ CHECK: sub.w r4, r5, r6 @ encoding: [0xa5,0xeb,0x06,0x04] @ CHECK: sub.w r4, r5, r6, lsl #5 @ encoding: [0xa5,0xeb,0x46,0x14] @@ -2678,6 +2700,12 @@ _func: @ CHECK: sub.w r4, r5, r6, asr #5 @ encoding: [0xa5,0xeb,0x66,0x14] @ CHECK: sub.w r4, r5, r6, ror #5 @ encoding: [0xa5,0xeb,0x76,0x14] @ CHECK: sub.w r5, r2, r12, rrx @ encoding: [0xa2,0xeb,0x3c,0x05] +@ CHECK: sub.w r2, sp, r12 @ encoding: [0xad,0xeb,0x0c,0x02] +@ CHECK: sub.w sp, sp, r12 @ encoding: [0xad,0xeb,0x0c,0x0d] +@ CHECK: sub.w sp, sp, r12 @ encoding: [0xad,0xeb,0x0c,0x0d] +@ CHECK: sub.w r2, sp, r12 @ encoding: [0xad,0xeb,0x0c,0x02] +@ CHECK: sub.w sp, sp, r12 @ encoding: [0xad,0xeb,0x0c,0x0d] +@ CHECK: sub.w sp, sp, r12 @ encoding: [0xad,0xeb,0x0c,0x0d] @------------------------------------------------------------------------------ diff --git a/test/MC/ARM/elf-reloc-condcall.s b/test/MC/ARM/elf-reloc-condcall.s new file mode 100644 index 0000000..dcc62d3 --- /dev/null +++ b/test/MC/ARM/elf-reloc-condcall.s @@ -0,0 +1,23 @@ +// RUN: llvm-mc -triple=armv7-linux-gnueabi -filetype=obj %s -o - | \ +// RUN: elf-dump | FileCheck -check-prefix=OBJ %s + + bleq some_label + bl some_label + blx some_label +// OBJ: .rel.text + +// OBJ: 'r_offset', 0x00000000 +// OBJ-NEXT: 'r_sym', 0x000004 +// OBJ-NEXT: 'r_type', 0x1d + +// OBJ: 'r_offset', 0x00000004 +// OBJ-NEXT: 'r_sym', 0x000004 +// OBJ-NEXT: 'r_type', 0x1c + +// OBJ: 'r_offset', 0x00000008 +// OBJ-NEXT: 'r_sym', 0x000004 +// OBJ-NEXT: 'r_type', 0x1c + +// OBJ: .symtab +// OBJ: Symbol 4 +// OBJ-NEXT: some_label
\ No newline at end of file diff --git a/test/MC/ARM/lit.local.cfg b/test/MC/ARM/lit.local.cfg index 92d3ff3..5700913 100644 --- a/test/MC/ARM/lit.local.cfg +++ b/test/MC/ARM/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll', '.c', '.cpp', '.s'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'ARM' in targets: config.unsupported = True diff --git a/test/MC/ARM/neon-add-encoding.s b/test/MC/ARM/neon-add-encoding.s index 1fdfa4c..50c8f85 100644 --- a/test/MC/ARM/neon-add-encoding.s +++ b/test/MC/ARM/neon-add-encoding.s @@ -64,31 +64,86 @@ vhadd.u16 q8, q8, q9 @ CHECK: vhadd.u32 q8, q8, q9 @ encoding: [0xe2,0x00,0x60,0xf3] vhadd.u32 q8, q8, q9 - -@ CHECK: vrhadd.s8 d16, d16, d17 @ encoding: [0xa1,0x01,0x40,0xf2] + + + vhadd.s8 d11, d24 + vhadd.s16 d12, d23 + vhadd.s32 d13, d22 + vhadd.u8 d14, d21 + vhadd.u16 d15, d20 + vhadd.u32 d16, d19 + vhadd.s8 q1, q12 + vhadd.s16 q2, q11 + vhadd.s32 q3, q10 + vhadd.u8 q4, q9 + vhadd.u16 q5, q8 + vhadd.u32 q6, q7 + +@ CHECK: vhadd.s8 d11, d11, d24 @ encoding: [0x28,0xb0,0x0b,0xf2] +@ CHECK: vhadd.s16 d12, d12, d23 @ encoding: [0x27,0xc0,0x1c,0xf2] +@ CHECK: vhadd.s32 d13, d13, d22 @ encoding: [0x26,0xd0,0x2d,0xf2] +@ CHECK: vhadd.u8 d14, d14, d21 @ encoding: [0x25,0xe0,0x0e,0xf3] +@ CHECK: vhadd.u16 d15, d15, d20 @ encoding: [0x24,0xf0,0x1f,0xf3] +@ CHECK: vhadd.u32 d16, d16, d19 @ encoding: [0xa3,0x00,0x60,0xf3] +@ CHECK: vhadd.s8 q1, q1, q12 @ encoding: [0x68,0x20,0x02,0xf2] +@ CHECK: vhadd.s16 q2, q2, q11 @ encoding: [0x66,0x40,0x14,0xf2] +@ CHECK: vhadd.s32 q3, q3, q10 @ encoding: [0x64,0x60,0x26,0xf2] +@ CHECK: vhadd.u8 q4, q4, q9 @ encoding: [0x62,0x80,0x08,0xf3] +@ CHECK: vhadd.u16 q5, q5, q8 @ encoding: [0x60,0xa0,0x1a,0xf3] +@ CHECK: vhadd.u32 q6, q6, q7 @ encoding: [0x4e,0xc0,0x2c,0xf3] + vrhadd.s8 d16, d16, d17 -@ CHECK: vrhadd.s16 d16, d16, d17 @ encoding: [0xa1,0x01,0x50,0xf2] vrhadd.s16 d16, d16, d17 -@ CHECK: vrhadd.s32 d16, d16, d17 @ encoding: [0xa1,0x01,0x60,0xf2] vrhadd.s32 d16, d16, d17 -@ CHECK: vrhadd.u8 d16, d16, d17 @ encoding: [0xa1,0x01,0x40,0xf3] vrhadd.u8 d16, d16, d17 -@ CHECK: vrhadd.u16 d16, d16, d17 @ encoding: [0xa1,0x01,0x50,0xf3] vrhadd.u16 d16, d16, d17 -@ CHECK: vrhadd.u32 d16, d16, d17 @ encoding: [0xa1,0x01,0x60,0xf3] vrhadd.u32 d16, d16, d17 -@ CHECK: vrhadd.s8 q8, q8, q9 @ encoding: [0xe2,0x01,0x40,0xf2] vrhadd.s8 q8, q8, q9 -@ CHECK: vrhadd.s16 q8, q8, q9 @ encoding: [0xe2,0x01,0x50,0xf2] vrhadd.s16 q8, q8, q9 -@ CHECK: vrhadd.s32 q8, q8, q9 @ encoding: [0xe2,0x01,0x60,0xf2] vrhadd.s32 q8, q8, q9 -@ CHECK: vrhadd.u8 q8, q8, q9 @ encoding: [0xe2,0x01,0x40,0xf3] vrhadd.u8 q8, q8, q9 -@ CHECK: vrhadd.u16 q8, q8, q9 @ encoding: [0xe2,0x01,0x50,0xf3] vrhadd.u16 q8, q8, q9 -@ CHECK: vrhadd.u32 q8, q8, q9 @ encoding: [0xe2,0x01,0x60,0xf3] vrhadd.u32 q8, q8, q9 + @ Two-operand forms. + vrhadd.s8 d16, d17 + vrhadd.s16 d16, d17 + vrhadd.s32 d16, d17 + vrhadd.u8 d16, d17 + vrhadd.u16 d16, d17 + vrhadd.u32 d16, d17 + vrhadd.s8 q8, q9 + vrhadd.s16 q8, q9 + vrhadd.s32 q8, q9 + vrhadd.u8 q8, q9 + vrhadd.u16 q8, q9 + vrhadd.u32 q8, q9 + +@ CHECK: vrhadd.s8 d16, d16, d17 @ encoding: [0xa1,0x01,0x40,0xf2] +@ CHECK: vrhadd.s16 d16, d16, d17 @ encoding: [0xa1,0x01,0x50,0xf2] +@ CHECK: vrhadd.s32 d16, d16, d17 @ encoding: [0xa1,0x01,0x60,0xf2] +@ CHECK: vrhadd.u8 d16, d16, d17 @ encoding: [0xa1,0x01,0x40,0xf3] +@ CHECK: vrhadd.u16 d16, d16, d17 @ encoding: [0xa1,0x01,0x50,0xf3] +@ CHECK: vrhadd.u32 d16, d16, d17 @ encoding: [0xa1,0x01,0x60,0xf3] +@ CHECK: vrhadd.s8 q8, q8, q9 @ encoding: [0xe2,0x01,0x40,0xf2] +@ CHECK: vrhadd.s16 q8, q8, q9 @ encoding: [0xe2,0x01,0x50,0xf2] +@ CHECK: vrhadd.s32 q8, q8, q9 @ encoding: [0xe2,0x01,0x60,0xf2] +@ CHECK: vrhadd.u8 q8, q8, q9 @ encoding: [0xe2,0x01,0x40,0xf3] +@ CHECK: vrhadd.u16 q8, q8, q9 @ encoding: [0xe2,0x01,0x50,0xf3] +@ CHECK: vrhadd.u32 q8, q8, q9 @ encoding: [0xe2,0x01,0x60,0xf3] + +@ CHECK: vrhadd.s8 d16, d16, d17 @ encoding: [0xa1,0x01,0x40,0xf2] +@ CHECK: vrhadd.s16 d16, d16, d17 @ encoding: [0xa1,0x01,0x50,0xf2] +@ CHECK: vrhadd.s32 d16, d16, d17 @ encoding: [0xa1,0x01,0x60,0xf2] +@ CHECK: vrhadd.u8 d16, d16, d17 @ encoding: [0xa1,0x01,0x40,0xf3] +@ CHECK: vrhadd.u16 d16, d16, d17 @ encoding: [0xa1,0x01,0x50,0xf3] +@ CHECK: vrhadd.u32 d16, d16, d17 @ encoding: [0xa1,0x01,0x60,0xf3] +@ CHECK: vrhadd.s8 q8, q8, q9 @ encoding: [0xe2,0x01,0x40,0xf2] +@ CHECK: vrhadd.s16 q8, q8, q9 @ encoding: [0xe2,0x01,0x50,0xf2] +@ CHECK: vrhadd.s32 q8, q8, q9 @ encoding: [0xe2,0x01,0x60,0xf2] +@ CHECK: vrhadd.u8 q8, q8, q9 @ encoding: [0xe2,0x01,0x40,0xf3] +@ CHECK: vrhadd.u16 q8, q8, q9 @ encoding: [0xe2,0x01,0x50,0xf3] +@ CHECK: vrhadd.u32 q8, q8, q9 @ encoding: [0xe2,0x01,0x60,0xf3] + vqadd.s8 d16, d16, d17 vqadd.s16 d16, d16, d17 diff --git a/test/MC/ARM/neon-shift-encoding.s b/test/MC/ARM/neon-shift-encoding.s index cd450a8..3c97f8b 100644 --- a/test/MC/ARM/neon-shift-encoding.s +++ b/test/MC/ARM/neon-shift-encoding.s @@ -250,113 +250,124 @@ _foo: @ CHECK: vsli.64 q7, q7, #63 @ encoding: [0xde,0xe5,0xbf,0xf3] -@ CHECK: vshll.s8 q8, d16, #7 @ encoding: [0x30,0x0a,0xcf,0xf2] vshll.s8 q8, d16, #7 -@ CHECK: vshll.s16 q8, d16, #15 @ encoding: [0x30,0x0a,0xdf,0xf2] vshll.s16 q8, d16, #15 -@ CHECK: vshll.s32 q8, d16, #31 @ encoding: [0x30,0x0a,0xff,0xf2] vshll.s32 q8, d16, #31 -@ CHECK: vshll.u8 q8, d16, #7 @ encoding: [0x30,0x0a,0xcf,0xf3] vshll.u8 q8, d16, #7 -@ CHECK: vshll.u16 q8, d16, #15 @ encoding: [0x30,0x0a,0xdf,0xf3] vshll.u16 q8, d16, #15 -@ CHECK: vshll.u32 q8, d16, #31 @ encoding: [0x30,0x0a,0xff,0xf3] vshll.u32 q8, d16, #31 -@ CHECK: vshll.i8 q8, d16, #8 @ encoding: [0x20,0x03,0xf2,0xf3] vshll.i8 q8, d16, #8 -@ CHECK: vshll.i16 q8, d16, #16 @ encoding: [0x20,0x03,0xf6,0xf3] vshll.i16 q8, d16, #16 -@ CHECK: vshll.i32 q8, d16, #32 @ encoding: [0x20,0x03,0xfa,0xf3] vshll.i32 q8, d16, #32 -@ CHECK: vshrn.i16 d16, q8, #8 @ encoding: [0x30,0x08,0xc8,0xf2] + +@ CHECK: vshll.s8 q8, d16, #7 @ encoding: [0x30,0x0a,0xcf,0xf2] +@ CHECK: vshll.s16 q8, d16, #15 @ encoding: [0x30,0x0a,0xdf,0xf2] +@ CHECK: vshll.s32 q8, d16, #31 @ encoding: [0x30,0x0a,0xff,0xf2] +@ CHECK: vshll.u8 q8, d16, #7 @ encoding: [0x30,0x0a,0xcf,0xf3] +@ CHECK: vshll.u16 q8, d16, #15 @ encoding: [0x30,0x0a,0xdf,0xf3] +@ CHECK: vshll.u32 q8, d16, #31 @ encoding: [0x30,0x0a,0xff,0xf3] +@ CHECK: vshll.i8 q8, d16, #8 @ encoding: [0x20,0x03,0xf2,0xf3] +@ CHECK: vshll.i16 q8, d16, #16 @ encoding: [0x20,0x03,0xf6,0xf3] +@ CHECK: vshll.i32 q8, d16, #32 @ encoding: [0x20,0x03,0xfa,0xf3] + vshrn.i16 d16, q8, #8 -@ CHECK: vshrn.i32 d16, q8, #16 @ encoding: [0x30,0x08,0xd0,0xf2] vshrn.i32 d16, q8, #16 -@ CHECK: vshrn.i64 d16, q8, #32 @ encoding: [0x30,0x08,0xe0,0xf2] vshrn.i64 d16, q8, #32 -@ CHECK: vrshl.s8 d16, d17, d16 @ encoding: [0xa1,0x05,0x40,0xf2] + +@ CHECK: vshrn.i16 d16, q8, #8 @ encoding: [0x30,0x08,0xc8,0xf2] +@ CHECK: vshrn.i32 d16, q8, #16 @ encoding: [0x30,0x08,0xd0,0xf2] +@ CHECK: vshrn.i64 d16, q8, #32 @ encoding: [0x30,0x08,0xe0,0xf2] + vrshl.s8 d16, d17, d16 -@ CHECK: vrshl.s16 d16, d17, d16 @ encoding: [0xa1,0x05,0x50,0xf2] vrshl.s16 d16, d17, d16 -@ CHECK: vrshl.s32 d16, d17, d16 @ encoding: [0xa1,0x05,0x60,0xf2] vrshl.s32 d16, d17, d16 -@ CHECK: vrshl.s64 d16, d17, d16 @ encoding: [0xa1,0x05,0x70,0xf2] vrshl.s64 d16, d17, d16 -@ CHECK: vrshl.u8 d16, d17, d16 @ encoding: [0xa1,0x05,0x40,0xf3] vrshl.u8 d16, d17, d16 -@ CHECK: vrshl.u16 d16, d17, d16 @ encoding: [0xa1,0x05,0x50,0xf3] vrshl.u16 d16, d17, d16 -@ CHECK: vrshl.u32 d16, d17, d16 @ encoding: [0xa1,0x05,0x60,0xf3] vrshl.u32 d16, d17, d16 -@ CHECK: vrshl.u64 d16, d17, d16 @ encoding: [0xa1,0x05,0x70,0xf3] vrshl.u64 d16, d17, d16 -@ CHECK: vrshl.s8 q8, q9, q8 @ encoding: [0xe2,0x05,0x40,0xf2] vrshl.s8 q8, q9, q8 -@ CHECK: vrshl.s16 q8, q9, q8 @ encoding: [0xe2,0x05,0x50,0xf2] vrshl.s16 q8, q9, q8 -@ CHECK: vrshl.s32 q8, q9, q8 @ encoding: [0xe2,0x05,0x60,0xf2] vrshl.s32 q8, q9, q8 -@ CHECK: vrshl.s64 q8, q9, q8 @ encoding: [0xe2,0x05,0x70,0xf2] vrshl.s64 q8, q9, q8 -@ CHECK: vrshl.u8 q8, q9, q8 @ encoding: [0xe2,0x05,0x40,0xf3] vrshl.u8 q8, q9, q8 -@ CHECK: vrshl.u16 q8, q9, q8 @ encoding: [0xe2,0x05,0x50,0xf3] vrshl.u16 q8, q9, q8 -@ CHECK: vrshl.u32 q8, q9, q8 @ encoding: [0xe2,0x05,0x60,0xf3] vrshl.u32 q8, q9, q8 -@ CHECK: vrshl.u64 q8, q9, q8 @ encoding: [0xe2,0x05,0x70,0xf3] vrshl.u64 q8, q9, q8 -@ CHECK: vrshr.s8 d16, d16, #8 @ encoding: [0x30,0x02,0xc8,0xf2] + +@ CHECK: vrshl.s8 d16, d17, d16 @ encoding: [0xa1,0x05,0x40,0xf2] +@ CHECK: vrshl.s16 d16, d17, d16 @ encoding: [0xa1,0x05,0x50,0xf2] +@ CHECK: vrshl.s32 d16, d17, d16 @ encoding: [0xa1,0x05,0x60,0xf2] +@ CHECK: vrshl.s64 d16, d17, d16 @ encoding: [0xa1,0x05,0x70,0xf2] +@ CHECK: vrshl.u8 d16, d17, d16 @ encoding: [0xa1,0x05,0x40,0xf3] +@ CHECK: vrshl.u16 d16, d17, d16 @ encoding: [0xa1,0x05,0x50,0xf3] +@ CHECK: vrshl.u32 d16, d17, d16 @ encoding: [0xa1,0x05,0x60,0xf3] +@ CHECK: vrshl.u64 d16, d17, d16 @ encoding: [0xa1,0x05,0x70,0xf3] +@ CHECK: vrshl.s8 q8, q9, q8 @ encoding: [0xe2,0x05,0x40,0xf2] +@ CHECK: vrshl.s16 q8, q9, q8 @ encoding: [0xe2,0x05,0x50,0xf2] +@ CHECK: vrshl.s32 q8, q9, q8 @ encoding: [0xe2,0x05,0x60,0xf2] +@ CHECK: vrshl.s64 q8, q9, q8 @ encoding: [0xe2,0x05,0x70,0xf2] +@ CHECK: vrshl.u8 q8, q9, q8 @ encoding: [0xe2,0x05,0x40,0xf3] +@ CHECK: vrshl.u16 q8, q9, q8 @ encoding: [0xe2,0x05,0x50,0xf3] +@ CHECK: vrshl.u32 q8, q9, q8 @ encoding: [0xe2,0x05,0x60,0xf3] +@ CHECK: vrshl.u64 q8, q9, q8 @ encoding: [0xe2,0x05,0x70,0xf3] + vrshr.s8 d16, d16, #8 -@ CHECK: vrshr.s16 d16, d16, #16 @ encoding: [0x30,0x02,0xd0,0xf2] vrshr.s16 d16, d16, #16 -@ CHECK: vrshr.s32 d16, d16, #32 @ encoding: [0x30,0x02,0xe0,0xf2] vrshr.s32 d16, d16, #32 -@ CHECK: vrshr.s64 d16, d16, #64 @ encoding: [0xb0,0x02,0xc0,0xf2] vrshr.s64 d16, d16, #64 -@ CHECK: vrshr.u8 d16, d16, #8 @ encoding: [0x30,0x02,0xc8,0xf3] vrshr.u8 d16, d16, #8 -@ CHECK: vrshr.u16 d16, d16, #16 @ encoding: [0x30,0x02,0xd0,0xf3] vrshr.u16 d16, d16, #16 -@ CHECK: vrshr.u32 d16, d16, #32 @ encoding: [0x30,0x02,0xe0,0xf3] vrshr.u32 d16, d16, #32 -@ CHECK: vrshr.u64 d16, d16, #64 @ encoding: [0xb0,0x02,0xc0,0xf3] vrshr.u64 d16, d16, #64 -@ CHECK: vrshr.s8 q8, q8, #8 @ encoding: [0x70,0x02,0xc8,0xf2] vrshr.s8 q8, q8, #8 -@ CHECK: vrshr.s16 q8, q8, #16 @ encoding: [0x70,0x02,0xd0,0xf2] vrshr.s16 q8, q8, #16 -@ CHECK: vrshr.s32 q8, q8, #32 @ encoding: [0x70,0x02,0xe0,0xf2] vrshr.s32 q8, q8, #32 -@ CHECK: vrshr.s64 q8, q8, #64 @ encoding: [0xf0,0x02,0xc0,0xf2] vrshr.s64 q8, q8, #64 -@ CHECK: vrshr.u8 q8, q8, #8 @ encoding: [0x70,0x02,0xc8,0xf3] vrshr.u8 q8, q8, #8 -@ CHECK: vrshr.u16 q8, q8, #16 @ encoding: [0x70,0x02,0xd0,0xf3] vrshr.u16 q8, q8, #16 -@ CHECK: vrshr.u32 q8, q8, #32 @ encoding: [0x70,0x02,0xe0,0xf3] vrshr.u32 q8, q8, #32 -@ CHECK: vrshr.u64 q8, q8, #64 @ encoding: [0xf0,0x02,0xc0,0xf3] vrshr.u64 q8, q8, #64 -@ CHECK: vrshrn.i16 d16, q8, #8 @ encoding: [0x70,0x08,0xc8,0xf2] + +@ CHECK: vrshr.s8 d16, d16, #8 @ encoding: [0x30,0x02,0xc8,0xf2] +@ CHECK: vrshr.s16 d16, d16, #16 @ encoding: [0x30,0x02,0xd0,0xf2] +@ CHECK: vrshr.s32 d16, d16, #32 @ encoding: [0x30,0x02,0xe0,0xf2] +@ CHECK: vrshr.s64 d16, d16, #64 @ encoding: [0xb0,0x02,0xc0,0xf2] +@ CHECK: vrshr.u8 d16, d16, #8 @ encoding: [0x30,0x02,0xc8,0xf3] +@ CHECK: vrshr.u16 d16, d16, #16 @ encoding: [0x30,0x02,0xd0,0xf3] +@ CHECK: vrshr.u32 d16, d16, #32 @ encoding: [0x30,0x02,0xe0,0xf3] +@ CHECK: vrshr.u64 d16, d16, #64 @ encoding: [0xb0,0x02,0xc0,0xf3] +@ CHECK: vrshr.s8 q8, q8, #8 @ encoding: [0x70,0x02,0xc8,0xf2] +@ CHECK: vrshr.s16 q8, q8, #16 @ encoding: [0x70,0x02,0xd0,0xf2] +@ CHECK: vrshr.s32 q8, q8, #32 @ encoding: [0x70,0x02,0xe0,0xf2] +@ CHECK: vrshr.s64 q8, q8, #64 @ encoding: [0xf0,0x02,0xc0,0xf2] +@ CHECK: vrshr.u8 q8, q8, #8 @ encoding: [0x70,0x02,0xc8,0xf3] +@ CHECK: vrshr.u16 q8, q8, #16 @ encoding: [0x70,0x02,0xd0,0xf3] +@ CHECK: vrshr.u32 q8, q8, #32 @ encoding: [0x70,0x02,0xe0,0xf3] +@ CHECK: vrshr.u64 q8, q8, #64 @ encoding: [0xf0,0x02,0xc0,0xf3] + + vrshrn.i16 d16, q8, #8 -@ CHECK: vrshrn.i32 d16, q8, #16 @ encoding: [0x70,0x08,0xd0,0xf2] vrshrn.i32 d16, q8, #16 -@ CHECK: vrshrn.i64 d16, q8, #32 @ encoding: [0x70,0x08,0xe0,0xf2] vrshrn.i64 d16, q8, #32 -@ CHECK: vqrshrn.s16 d16, q8, #4 @ encoding: [0x70,0x09,0xcc,0xf2] vqrshrn.s16 d16, q8, #4 -@ CHECK: vqrshrn.s32 d16, q8, #13 @ encoding: [0x70,0x09,0xd3,0xf2] vqrshrn.s32 d16, q8, #13 -@ CHECK: vqrshrn.s64 d16, q8, #13 @ encoding: [0x70,0x09,0xf3,0xf2] vqrshrn.s64 d16, q8, #13 -@ CHECK: vqrshrn.u16 d16, q8, #4 @ encoding: [0x70,0x09,0xcc,0xf3] vqrshrn.u16 d16, q8, #4 -@ CHECK: vqrshrn.u32 d16, q8, #13 @ encoding: [0x70,0x09,0xd3,0xf3] vqrshrn.u32 d16, q8, #13 -@ CHECK: vqrshrn.u64 d16, q8, #13 @ encoding: [0x70,0x09,0xf3,0xf3] vqrshrn.u64 d16, q8, #13 +@ CHECK: vrshrn.i16 d16, q8, #8 @ encoding: [0x70,0x08,0xc8,0xf2] +@ CHECK: vrshrn.i32 d16, q8, #16 @ encoding: [0x70,0x08,0xd0,0xf2] +@ CHECK: vrshrn.i64 d16, q8, #32 @ encoding: [0x70,0x08,0xe0,0xf2] +@ CHECK: vqrshrn.s16 d16, q8, #4 @ encoding: [0x70,0x09,0xcc,0xf2] +@ CHECK: vqrshrn.s32 d16, q8, #13 @ encoding: [0x70,0x09,0xd3,0xf2] +@ CHECK: vqrshrn.s64 d16, q8, #13 @ encoding: [0x70,0x09,0xf3,0xf2] +@ CHECK: vqrshrn.u16 d16, q8, #4 @ encoding: [0x70,0x09,0xcc,0xf3] +@ CHECK: vqrshrn.u32 d16, q8, #13 @ encoding: [0x70,0x09,0xd3,0xf3] +@ CHECK: vqrshrn.u64 d16, q8, #13 @ encoding: [0x70,0x09,0xf3,0xf3] + + @ Optional destination operand variants. vshl.s8 q4, q5 vshl.s16 q4, q5 @@ -417,3 +428,108 @@ _foo: @ CHECK: vshl.i16 d4, d4, #10 @ encoding: [0x14,0x45,0x9a,0xf2] @ CHECK: vshl.i32 d4, d4, #17 @ encoding: [0x14,0x45,0xb1,0xf2] @ CHECK: vshl.i64 d4, d4, #43 @ encoding: [0x94,0x45,0xab,0xf2] + + @ Two-operand VRSHL forms. + vrshl.s8 d11, d4 + vrshl.s16 d12, d5 + vrshl.s32 d13, d6 + vrshl.s64 d14, d7 + vrshl.u8 d15, d8 + vrshl.u16 d16, d9 + vrshl.u32 d17, d10 + vrshl.u64 d18, d11 + vrshl.s8 q1, q8 + vrshl.s16 q2, q15 + vrshl.s32 q3, q14 + vrshl.s64 q4, q13 + vrshl.u8 q5, q12 + vrshl.u16 q6, q11 + vrshl.u32 q7, q10 + vrshl.u64 q8, q9 + +@ CHECK: vrshl.s8 d11, d11, d4 @ encoding: [0x0b,0xb5,0x04,0xf2] +@ CHECK: vrshl.s16 d12, d12, d5 @ encoding: [0x0c,0xc5,0x15,0xf2] +@ CHECK: vrshl.s32 d13, d13, d6 @ encoding: [0x0d,0xd5,0x26,0xf2] +@ CHECK: vrshl.s64 d14, d14, d7 @ encoding: [0x0e,0xe5,0x37,0xf2] +@ CHECK: vrshl.u8 d15, d15, d8 @ encoding: [0x0f,0xf5,0x08,0xf3] +@ CHECK: vrshl.u16 d16, d16, d9 @ encoding: [0x20,0x05,0x59,0xf3] +@ CHECK: vrshl.u32 d17, d17, d10 @ encoding: [0x21,0x15,0x6a,0xf3] +@ CHECK: vrshl.u64 d18, d18, d11 @ encoding: [0x22,0x25,0x7b,0xf3] +@ CHECK: vrshl.s8 q1, q1, q8 @ encoding: [0xc2,0x25,0x00,0xf2] +@ CHECK: vrshl.s16 q2, q2, q15 @ encoding: [0xc4,0x45,0x1e,0xf2] +@ CHECK: vrshl.s32 q3, q3, q14 @ encoding: [0xc6,0x65,0x2c,0xf2] +@ CHECK: vrshl.s64 q4, q4, q13 @ encoding: [0xc8,0x85,0x3a,0xf2] +@ CHECK: vrshl.u8 q5, q5, q12 @ encoding: [0xca,0xa5,0x08,0xf3] +@ CHECK: vrshl.u16 q6, q6, q11 @ encoding: [0xcc,0xc5,0x16,0xf3] +@ CHECK: vrshl.u32 q7, q7, q10 @ encoding: [0xce,0xe5,0x24,0xf3] +@ CHECK: vrshl.u64 q8, q8, q9 @ encoding: [0xe0,0x05,0x72,0xf3] + + +@ Two-operand forms. + vshr.s8 d15, #8 + vshr.s16 d12, #16 + vshr.s32 d13, #32 + vshr.s64 d14, #64 + vshr.u8 d16, #8 + vshr.u16 d17, #16 + vshr.u32 d6, #32 + vshr.u64 d10, #64 + vshr.s8 q1, #8 + vshr.s16 q2, #16 + vshr.s32 q3, #32 + vshr.s64 q4, #64 + vshr.u8 q5, #8 + vshr.u16 q6, #16 + vshr.u32 q7, #32 + vshr.u64 q8, #64 + +@ CHECK: vshr.s8 d15, d15, #8 @ encoding: [0x1f,0xf0,0x88,0xf2] +@ CHECK: vshr.s16 d12, d12, #16 @ encoding: [0x1c,0xc0,0x90,0xf2] +@ CHECK: vshr.s32 d13, d13, #32 @ encoding: [0x1d,0xd0,0xa0,0xf2] +@ CHECK: vshr.s64 d14, d14, #64 @ encoding: [0x9e,0xe0,0x80,0xf2] +@ CHECK: vshr.u8 d16, d16, #8 @ encoding: [0x30,0x00,0xc8,0xf3] +@ CHECK: vshr.u16 d17, d17, #16 @ encoding: [0x31,0x10,0xd0,0xf3] +@ CHECK: vshr.u32 d6, d6, #32 @ encoding: [0x16,0x60,0xa0,0xf3] +@ CHECK: vshr.u64 d10, d10, #64 @ encoding: [0x9a,0xa0,0x80,0xf3] +@ CHECK: vshr.s8 q1, q1, #8 @ encoding: [0x52,0x20,0x88,0xf2] +@ CHECK: vshr.s16 q2, q2, #16 @ encoding: [0x54,0x40,0x90,0xf2] +@ CHECK: vshr.s32 q3, q3, #32 @ encoding: [0x56,0x60,0xa0,0xf2] +@ CHECK: vshr.s64 q4, q4, #64 @ encoding: [0xd8,0x80,0x80,0xf2] +@ CHECK: vshr.u8 q5, q5, #8 @ encoding: [0x5a,0xa0,0x88,0xf3] +@ CHECK: vshr.u16 q6, q6, #16 @ encoding: [0x5c,0xc0,0x90,0xf3] +@ CHECK: vshr.u32 q7, q7, #32 @ encoding: [0x5e,0xe0,0xa0,0xf3] +@ CHECK: vshr.u64 q8, q8, #64 @ encoding: [0xf0,0x00,0xc0,0xf3] + + vrshr.s8 d15, #8 + vrshr.s16 d12, #16 + vrshr.s32 d13, #32 + vrshr.s64 d14, #64 + vrshr.u8 d16, #8 + vrshr.u16 d17, #16 + vrshr.u32 d6, #32 + vrshr.u64 d10, #64 + vrshr.s8 q1, #8 + vrshr.s16 q2, #16 + vrshr.s32 q3, #32 + vrshr.s64 q4, #64 + vrshr.u8 q5, #8 + vrshr.u16 q6, #16 + vrshr.u32 q7, #32 + vrshr.u64 q8, #64 + +@ CHECK: vrshr.s8 d15, d15, #8 @ encoding: [0x1f,0xf2,0x88,0xf2] +@ CHECK: vrshr.s16 d12, d12, #16 @ encoding: [0x1c,0xc2,0x90,0xf2] +@ CHECK: vrshr.s32 d13, d13, #32 @ encoding: [0x1d,0xd2,0xa0,0xf2] +@ CHECK: vrshr.s64 d14, d14, #64 @ encoding: [0x9e,0xe2,0x80,0xf2] +@ CHECK: vrshr.u8 d16, d16, #8 @ encoding: [0x30,0x02,0xc8,0xf3] +@ CHECK: vrshr.u16 d17, d17, #16 @ encoding: [0x31,0x12,0xd0,0xf3] +@ CHECK: vrshr.u32 d6, d6, #32 @ encoding: [0x16,0x62,0xa0,0xf3] +@ CHECK: vrshr.u64 d10, d10, #64 @ encoding: [0x9a,0xa2,0x80,0xf3] +@ CHECK: vrshr.s8 q1, q1, #8 @ encoding: [0x52,0x22,0x88,0xf2] +@ CHECK: vrshr.s16 q2, q2, #16 @ encoding: [0x54,0x42,0x90,0xf2] +@ CHECK: vrshr.s32 q3, q3, #32 @ encoding: [0x56,0x62,0xa0,0xf2] +@ CHECK: vrshr.s64 q4, q4, #64 @ encoding: [0xd8,0x82,0x80,0xf2] +@ CHECK: vrshr.u8 q5, q5, #8 @ encoding: [0x5a,0xa2,0x88,0xf3] +@ CHECK: vrshr.u16 q6, q6, #16 @ encoding: [0x5c,0xc2,0x90,0xf3] +@ CHECK: vrshr.u32 q7, q7, #32 @ encoding: [0x5e,0xe2,0xa0,0xf3] +@ CHECK: vrshr.u64 q8, q8, #64 @ encoding: [0xf0,0x02,0xc0,0xf3] diff --git a/test/MC/ARM/neon-shuffle-encoding.s b/test/MC/ARM/neon-shuffle-encoding.s index 26734c1..0f07d9f 100644 --- a/test/MC/ARM/neon-shuffle-encoding.s +++ b/test/MC/ARM/neon-shuffle-encoding.s @@ -59,6 +59,8 @@ vzip.8 q9, q8 vzip.16 q9, q8 vzip.32 q9, q8 + vzip.32 d2, d3 + vuzp.32 d2, d3 @ CHECK: vuzp.8 d17, d16 @ encoding: [0x20,0x11,0xf2,0xf3] @ CHECK: vuzp.16 d17, d16 @ encoding: [0x20,0x11,0xf6,0xf3] @@ -70,6 +72,8 @@ @ CHECK: vzip.8 q9, q8 @ encoding: [0xe0,0x21,0xf2,0xf3] @ CHECK: vzip.16 q9, q8 @ encoding: [0xe0,0x21,0xf6,0xf3] @ CHECK: vzip.32 q9, q8 @ encoding: [0xe0,0x21,0xfa,0xf3] +@ CHECK: vtrn.32 d2, d3 @ encoding: [0x83,0x20,0xba,0xf3] +@ CHECK: vtrn.32 d2, d3 @ encoding: [0x83,0x20,0xba,0xf3] @ VTRN alternate size suffices diff --git a/test/MC/ARM/neon-sub-encoding.s b/test/MC/ARM/neon-sub-encoding.s index 0622e19..8eb38a5 100644 --- a/test/MC/ARM/neon-sub-encoding.s +++ b/test/MC/ARM/neon-sub-encoding.s @@ -132,3 +132,29 @@ vrsubhn.i32 d16, q8, q9 @ CHECK: vrsubhn.i64 d16, q8, q9 @ encoding: [0xa2,0x06,0xe0,0xf3] vrsubhn.i64 d16, q8, q9 + + vhsub.s8 d11, d24 + vhsub.s16 d12, d23 + vhsub.s32 d13, d22 + vhsub.u8 d14, d21 + vhsub.u16 d15, d20 + vhsub.u32 d16, d19 + vhsub.s8 q1, q12 + vhsub.s16 q2, q11 + vhsub.s32 q3, q10 + vhsub.u8 q4, q9 + vhsub.u16 q5, q8 + vhsub.u32 q6, q7 + +@ CHECK: vhsub.s8 d11, d11, d24 @ encoding: [0x28,0xb2,0x0b,0xf2] +@ CHECK: vhsub.s16 d12, d12, d23 @ encoding: [0x27,0xc2,0x1c,0xf2] +@ CHECK: vhsub.s32 d13, d13, d22 @ encoding: [0x26,0xd2,0x2d,0xf2] +@ CHECK: vhsub.u8 d14, d14, d21 @ encoding: [0x25,0xe2,0x0e,0xf3] +@ CHECK: vhsub.u16 d15, d15, d20 @ encoding: [0x24,0xf2,0x1f,0xf3] +@ CHECK: vhsub.u32 d16, d16, d19 @ encoding: [0xa3,0x02,0x60,0xf3] +@ CHECK: vhsub.s8 q1, q1, q12 @ encoding: [0x68,0x22,0x02,0xf2] +@ CHECK: vhsub.s16 q2, q2, q11 @ encoding: [0x66,0x42,0x14,0xf2] +@ CHECK: vhsub.s32 q3, q3, q10 @ encoding: [0x64,0x62,0x26,0xf2] +@ CHECK: vhsub.u8 q4, q4, q9 @ encoding: [0x62,0x82,0x08,0xf3] +@ CHECK: vhsub.u16 q5, q5, q8 @ encoding: [0x60,0xa2,0x1a,0xf3] +@ CHECK: vhsub.u32 q6, q6, q7 @ encoding: [0x4e,0xc2,0x2c,0xf3] diff --git a/test/MC/ARM/neon-vst-encoding.s b/test/MC/ARM/neon-vst-encoding.s index 1f07461..f5feca4 100644 --- a/test/MC/ARM/neon-vst-encoding.s +++ b/test/MC/ARM/neon-vst-encoding.s @@ -268,3 +268,11 @@ @ rdar://11082188 vst2.8 {d8, d10}, [r4] @ CHECK: vst2.8 {d8, d10}, [r4] @ encoding: [0x0f,0x89,0x04,0xf4] + + vst1.32 {d9[1]}, [r3, :32] + vst1.32 {d27[1]}, [r9, :32]! + vst1.32 {d27[1]}, [r3, :32], r5 +@ CHECK: vst1.32 {d9[1]}, [r3, :32] @ encoding: [0xbf,0x98,0x83,0xf4] +@ CHECK: vst1.32 {d27[1]}, [r9, :32]! @ encoding: [0xbd,0xb8,0xc9,0xf4] +@ CHECK: vst1.32 {d27[1]}, [r3, :32], r5 @ encoding: [0xb5,0xb8,0xc3,0xf4] + diff --git a/test/MC/ARM/neon-vswp.s b/test/MC/ARM/neon-vswp.s new file mode 100644 index 0000000..2138eed --- /dev/null +++ b/test/MC/ARM/neon-vswp.s @@ -0,0 +1,7 @@ +@ RUN: llvm-mc -mcpu=cortex-a8 -triple armv7-apple-darwin -show-encoding < %s | FileCheck %s + +vswp d1, d2 +vswp q1, q2 + +@ CHECK: vswp d1, d2 @ encoding: [0x02,0x10,0xb2,0xf3] +@ CHECK: vswp q1, q2 @ encoding: [0x44,0x20,0xb2,0xf3] diff --git a/test/MC/ARM/vfp4.s b/test/MC/ARM/vfp4.s new file mode 100644 index 0000000..cc87a38 --- /dev/null +++ b/test/MC/ARM/vfp4.s @@ -0,0 +1,50 @@ +@ RUN: llvm-mc < %s -triple armv7-unknown-unknown -show-encoding -mattr=+neon,+vfp4 | FileCheck %s --check-prefix=ARM +@ RUN: llvm-mc < %s -triple thumbv7-unknown-unknown -show-encoding -mattr=+neon,+vfp4 | FileCheck %s --check-prefix=THUMB + +@ ARM: vfma.f64 d16, d18, d17 @ encoding: [0xa1,0x0b,0xe2,0xee] +@ THUMB: vfma.f64 d16, d18, d17 @ encoding: [0xe2,0xee,0xa1,0x0b] +vfma.f64 d16, d18, d17 + +@ ARM: vfma.f32 s2, s4, s0 @ encoding: [0x00,0x1a,0xa2,0xee] +@ THUMB: vfma.f32 s2, s4, s0 @ encoding: [0xa2,0xee,0x00,0x1a] +vfma.f32 s2, s4, s0 + +@ ARM: vfma.f32 d16, d18, d17 @ encoding: [0xb1,0x0c,0x42,0xf2] +@ THUMB: vfma.f32 d16, d18, d17 @ encoding: [0x42,0xef,0xb1,0x0c] +vfma.f32 d16, d18, d17 + +@ ARM: vfma.f32 q2, q4, q0 @ encoding: [0x50,0x4c,0x08,0xf2] +@ THUMB: vfma.f32 q2, q4, q0 @ encoding: [0x08,0xef,0x50,0x4c] +vfma.f32 q2, q4, q0 + +@ ARM: vfnma.f64 d16, d18, d17 @ encoding: [0xe1,0x0b,0xd2,0xee] +@ THUMB: vfnma.f64 d16, d18, d17 @ encoding: [0xd2,0xee,0xe1,0x0b] +vfnma.f64 d16, d18, d17 + +@ ARM: vfnma.f32 s2, s4, s0 @ encoding: [0x40,0x1a,0x92,0xee] +@ THUMB: vfnma.f32 s2, s4, s0 @ encoding: [0x92,0xee,0x40,0x1a] +vfnma.f32 s2, s4, s0 + +@ ARM: vfms.f64 d16, d18, d17 @ encoding: [0xe1,0x0b,0xe2,0xee] +@ THUMB: vfms.f64 d16, d18, d17 @ encoding: [0xe2,0xee,0xe1,0x0b] +vfms.f64 d16, d18, d17 + +@ ARM: vfms.f32 s2, s4, s0 @ encoding: [0x40,0x1a,0xa2,0xee] +@ THUMB: vfms.f32 s2, s4, s0 @ encoding: [0xa2,0xee,0x40,0x1a] +vfms.f32 s2, s4, s0 + +@ ARM: vfms.f32 d16, d18, d17 @ encoding: [0xb1,0x0c,0x62,0xf2] +@ THUMB: vfms.f32 d16, d18, d17 @ encoding: [0x62,0xef,0xb1,0x0c] +vfms.f32 d16, d18, d17 + +@ ARM: vfms.f32 q2, q4, q0 @ encoding: [0x50,0x4c,0x28,0xf2] +@ THUMB: vfms.f32 q2, q4, q0 @ encoding: [0x28,0xef,0x50,0x4c] +vfms.f32 q2, q4, q0 + +@ ARM: vfnms.f64 d16, d18, d17 @ encoding: [0xa1,0x0b,0xd2,0xee] +@ THUMB: vfnms.f64 d16, d18, d17 @ encoding: [0xd2,0xee,0xa1,0x0b] +vfnms.f64 d16, d18, d17 + +@ ARM: vfnms.f32 s2, s4, s0 @ encoding: [0x00,0x1a,0x92,0xee] +@ THUMB: vfnms.f32 s2, s4, s0 @ encoding: [0x92,0xee,0x00,0x1a] +vfnms.f32 s2, s4, s0 diff --git a/test/MC/AsmParser/lit.local.cfg b/test/MC/AsmParser/lit.local.cfg index 1f53769..6c49f08 100644 --- a/test/MC/AsmParser/lit.local.cfg +++ b/test/MC/AsmParser/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.s'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'X86' in targets: config.unsupported = True diff --git a/test/MC/AsmParser/macro-args.s b/test/MC/AsmParser/macro-args.s index 4b87899..13b197a 100644 --- a/test/MC/AsmParser/macro-args.s +++ b/test/MC/AsmParser/macro-args.s @@ -18,3 +18,27 @@ bar // CHECK: .long 3 // CHECK: .long 0 + + +.macro top + middle _$0, $1 +.endm +.macro middle + $0: + .if $n > 1 + bottom $1 + .endif +.endm +.macro bottom + .set fred, $0 +.endm + +.text + +top foo +top bar, 42 + +// CHECK: _foo: +// CHECK-NOT: fred +// CHECK: _bar +// CHECK-NEXT: fred = 42 diff --git a/test/MC/COFF/lit.local.cfg b/test/MC/COFF/lit.local.cfg index ec8d4d3..41a8434 100644 --- a/test/MC/COFF/lit.local.cfg +++ b/test/MC/COFF/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.s', '.ll'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'X86' in targets: config.unsupported = True diff --git a/test/MC/Disassembler/ARM/arm-tests.txt b/test/MC/Disassembler/ARM/arm-tests.txt index 264a78a..471076a 100644 --- a/test/MC/Disassembler/ARM/arm-tests.txt +++ b/test/MC/Disassembler/ARM/arm-tests.txt @@ -201,7 +201,7 @@ 0x20 0x51 0x17 0xe6 # CHECK: strdeq r2, r3, [r0], -r8 -0xf8 0x24 0x00 0x00 +0xf8 0x20 0x00 0x00 # CHECK: ldrdeq r2, r3, [r0], -r12 0xdc 0x24 0x00 0x00 @@ -321,3 +321,6 @@ # CHECK: ldmgt sp!, {r9} 0x00 0x02 0xbd 0xc8 +# CHECK: cdp2 p10, #0, c6, c12, c0, #7 +0xe0 0x6a 0x0c 0xfe + diff --git a/test/MC/Disassembler/ARM/invalid-LDRT-arm.txt b/test/MC/Disassembler/ARM/invalid-LDRT-arm.txt deleted file mode 100644 index 067dcb3..0000000 --- a/test/MC/Disassembler/ARM/invalid-LDRT-arm.txt +++ /dev/null @@ -1,12 +0,0 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} - -# Opcode=0 Name=PHI Format=(42) -# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 -# ------------------------------------------------------------------------------------------------- -# | 1: 1: 1: 0| 0: 1: 1: 0| 0: 0: 1: 1| 0: 1: 1: 1| 0: 1: 0: 1| 0: 0: 0: 1| 0: 0: 0: 1| 0: 0: 0: 0| -# ------------------------------------------------------------------------------------------------- -# -# The bytes have Inst{4} = 1, so it's not an LDRT Encoding A2 instruction. -0x10 0x51 0x37 0xe6 - - diff --git a/test/MC/Disassembler/ARM/invalid-MRRC2-arm.txt b/test/MC/Disassembler/ARM/invalid-MRRC2-arm.txt new file mode 100644 index 0000000..aaae6ce --- /dev/null +++ b/test/MC/Disassembler/ARM/invalid-MRRC2-arm.txt @@ -0,0 +1,4 @@ +# RUN: llvm-mc --disassemble %s -triple=armv7-linux-gnueabi |& FileCheck %s + +# CHECK: invalid instruction encoding +0x00 0x1a 0x50 0xfc diff --git a/test/MC/Disassembler/ARM/invalid-VST1d8Twb_register-thumb.txt b/test/MC/Disassembler/ARM/invalid-VST1d8Twb_register-thumb.txt new file mode 100644 index 0000000..8ff3a2b --- /dev/null +++ b/test/MC/Disassembler/ARM/invalid-VST1d8Twb_register-thumb.txt @@ -0,0 +1,13 @@ +# RUN: llvm-mc --disassemble %s -triple=thumb-apple-darwin9 |& grep {invalid instruction encoding} + +# Opcode=1839 Name=VST1d8Twb_register Format=ARM_FORMAT_NLdSt(30) +# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +# ------------------------------------------------------------------------------------------------- +# | 1: 1: 1: 1| 1: 0: 0: 1| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 1: 1: 0| 0: 0: 1: 0| 1: 1: 1: 1| +# ------------------------------------------------------------------------------------------------- +# +# A8.6.391 VST1 (multiple single elements) +# This encoding looks like: vst1.8 {d0,d1,d2}, [r0, :128] +# But bits 5-4 for the alignment of 128 encoded as align = 0b10, is available only if <list> +# contains two or four registers. rdar://11220250 +0x00 0xf9 0x2f 0x06 diff --git a/test/MC/Disassembler/ARM/ldrd-armv4.txt b/test/MC/Disassembler/ARM/ldrd-armv4.txt new file mode 100644 index 0000000..bb87ade --- /dev/null +++ b/test/MC/Disassembler/ARM/ldrd-armv4.txt @@ -0,0 +1,15 @@ +# RUN: llvm-mc --disassemble %s -triple=armv4-linux-gnueabi |& FileCheck %s -check-prefix=V4 +# RUN: llvm-mc --disassemble %s -triple=armv5te-linux-gnueabi |& FileCheck %s -check-prefix=V5TE + +# 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 +# ------------------------------------------------------------------------------------------------- +# | 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| X: X: X: 1| X: X: X: X| 1: 1: X: 1| X: X: X: X| +# ------------------------------------------------------------------------------------------------- +# +# A8.6.68 LDRD (register) +# if Rt{0} = 1 then UNDEFINED; + +# V4: invalid instruction encoding +# V5TE: ldrd +0xd0 0x10 0x00 0x01 + diff --git a/test/MC/Disassembler/ARM/lit.local.cfg b/test/MC/Disassembler/ARM/lit.local.cfg index c5dd3fb..22a76e5 100644 --- a/test/MC/Disassembler/ARM/lit.local.cfg +++ b/test/MC/Disassembler/ARM/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.txt'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'ARM' in targets: config.unsupported = True diff --git a/test/MC/Disassembler/ARM/neon.txt b/test/MC/Disassembler/ARM/neon.txt index 998e9e8..c5dbee3 100644 --- a/test/MC/Disassembler/ARM/neon.txt +++ b/test/MC/Disassembler/ARM/neon.txt @@ -2061,3 +2061,222 @@ # CHECK: vst4.16 {d8, d10, d12, d14}, [r4] 0x8f 0x81 0x04 0xf4 # CHECK: vst4.32 {d8, d10, d12, d14}, [r4] + +# rdar://11204059 +0x0d 0x87 0x24 0xf4 +# CHECK: vld1.8 {d8}, [r4]! +0x4d 0x87 0x24 0xf4 +# CHECK: vld1.16 {d8}, [r4]! +0x8d 0x87 0x24 0xf4 +# CHECK: vld1.32 {d8}, [r4]! +0xcd 0x87 0x24 0xf4 +# CHECK: vld1.64 {d8}, [r4]! +0x06 0x87 0x24 0xf4 +# CHECK: vld1.8 {d8}, [r4], r6 +0x46 0x87 0x24 0xf4 +# CHECK: vld1.16 {d8}, [r4], r6 +0x86 0x87 0x24 0xf4 +# CHECK: vld1.32 {d8}, [r4], r6 +0xc6 0x87 0x24 0xf4 +# CHECK: vld1.64 {d8}, [r4], r6 +0x0d 0x8a 0x24 0xf4 +# CHECK: vld1.8 {d8, d9}, [r4]! +0x4d 0x8a 0x24 0xf4 +# CHECK: vld1.16 {d8, d9}, [r4]! +0x8d 0x8a 0x24 0xf4 +# CHECK: vld1.32 {d8, d9}, [r4]! +0xcd 0x8a 0x24 0xf4 +# CHECK: vld1.64 {d8, d9}, [r4]! +0x06 0x8a 0x24 0xf4 +# CHECK: vld1.8 {d8, d9}, [r4], r6 +0x46 0x8a 0x24 0xf4 +# CHECK: vld1.16 {d8, d9}, [r4], r6 +0x86 0x8a 0x24 0xf4 +# CHECK: vld1.32 {d8, d9}, [r4], r6 +0xc6 0x8a 0x24 0xf4 +# CHECK: vld1.64 {d8, d9}, [r4], r6 +0x0d 0x86 0x24 0xf4 +# CHECK: vld1.8 {d8, d9, d10}, [r4]! +0x4d 0x86 0x24 0xf4 +# CHECK: vld1.16 {d8, d9, d10}, [r4]! +0x8d 0x86 0x24 0xf4 +# CHECK: vld1.32 {d8, d9, d10}, [r4]! +0xcd 0x86 0x24 0xf4 +# CHECK: vld1.64 {d8, d9, d10}, [r4]! +0x06 0x86 0x24 0xf4 +# CHECK: vld1.8 {d8, d9, d10}, [r4], r6 +0x46 0x86 0x24 0xf4 +# CHECK: vld1.16 {d8, d9, d10}, [r4], r6 +0x86 0x86 0x24 0xf4 +# CHECK: vld1.32 {d8, d9, d10}, [r4], r6 +0xc6 0x86 0x24 0xf4 +# CHECK: vld1.64 {d8, d9, d10}, [r4], r6 +0x0d 0x82 0x24 0xf4 +# CHECK: vld1.8 {d8, d9, d10, d11}, [r4]! +0x4d 0x82 0x24 0xf4 +# CHECK: vld1.16 {d8, d9, d10, d11}, [r4]! +0x8d 0x82 0x24 0xf4 +# CHECK: vld1.32 {d8, d9, d10, d11}, [r4]! +0xcd 0x82 0x24 0xf4 +# CHECK: vld1.64 {d8, d9, d10, d11}, [r4]! +0x06 0x82 0x24 0xf4 +# CHECK: vld1.8 {d8, d9, d10, d11}, [r4], r6 +0x46 0x82 0x24 0xf4 +# CHECK: vld1.16 {d8, d9, d10, d11}, [r4], r6 +0x86 0x82 0x24 0xf4 +# CHECK: vld1.32 {d8, d9, d10, d11}, [r4], r6 +0xc6 0x82 0x24 0xf4 +# CHECK: vld1.64 {d8, d9, d10, d11}, [r4], r6 +0x0d 0x88 0x24 0xf4 +# CHECK: vld2.8 {d8, d9}, [r4]! +0x4d 0x88 0x24 0xf4 +# CHECK: vld2.16 {d8, d9}, [r4]! +0x8d 0x88 0x24 0xf4 +# CHECK: vld2.32 {d8, d9}, [r4]! +0x06 0x88 0x24 0xf4 +# CHECK: vld2.8 {d8, d9}, [r4], r6 +0x46 0x88 0x24 0xf4 +# CHECK: vld2.16 {d8, d9}, [r4], r6 +0x86 0x88 0x24 0xf4 +# CHECK: vld2.32 {d8, d9}, [r4], r6 +0x0d 0x89 0x24 0xf4 +# CHECK: vld2.8 {d8, d10}, [r4]! +0x4d 0x89 0x24 0xf4 +# CHECK: vld2.16 {d8, d10}, [r4]! +0x8d 0x89 0x24 0xf4 +# CHECK: vld2.32 {d8, d10}, [r4]! +0x06 0x89 0x24 0xf4 +# CHECK: vld2.8 {d8, d10}, [r4], r6 +0x46 0x89 0x24 0xf4 +# CHECK: vld2.16 {d8, d10}, [r4], r6 +0x86 0x89 0x24 0xf4 +# CHECK: vld2.32 {d8, d10}, [r4], r6 +0x0d 0x84 0x24 0xf4 +# CHECK: vld3.8 {d8, d9, d10}, [r4]! +0x4d 0x84 0x24 0xf4 +# CHECK: vld3.16 {d8, d9, d10}, [r4]! +0x8d 0x84 0x24 0xf4 +# CHECK: vld3.32 {d8, d9, d10}, [r4]! +0x06 0x85 0x24 0xf4 +# CHECK: vld3.8 {d8, d10, d12}, [r4], r6 +0x46 0x85 0x24 0xf4 +# CHECK: vld3.16 {d8, d10, d12}, [r4], r6 +0x86 0x85 0x24 0xf4 +# CHECK: vld3.32 {d8, d10, d12}, [r4], r6 +0x0d 0x80 0x24 0xf4 +# CHECK: vld4.8 {d8, d9, d10, d11}, [r4]! +0x4d 0x80 0x24 0xf4 +# CHECK: vld4.16 {d8, d9, d10, d11}, [r4]! +0x8d 0x80 0x24 0xf4 +# CHECK: vld4.32 {d8, d9, d10, d11}, [r4]! +0x06 0x81 0x24 0xf4 +# CHECK: vld4.8 {d8, d10, d12, d14}, [r4], r6 +0x46 0x81 0x24 0xf4 +# CHECK: vld4.16 {d8, d10, d12, d14}, [r4], r6 +0x86 0x81 0x24 0xf4 +# CHECK: vld4.32 {d8, d10, d12, d14}, [r4], r6 +0x4f 0x8a 0x24 0xf4 +# CHECK: vld1.16 {d8, d9}, [r4] +0x8f 0x8a 0x24 0xf4 +# CHECK: vld1.32 {d8, d9}, [r4] +0xcf 0x8a 0x24 0xf4 +# CHECK: vld1.64 {d8, d9}, [r4] +0x0f 0x8a 0x24 0xf4 +# CHECK: vld1.8 {d8, d9}, [r4] +0x4f 0x88 0x24 0xf4 +# CHECK: vld2.16 {d8, d9}, [r4] +0x8f 0x88 0x24 0xf4 +# CHECK: vld2.32 {d8, d9}, [r4] +0x0f 0x88 0x24 0xf4 +# CHECK: vld2.8 {d8, d9}, [r4] +0x4d 0x88 0x24 0xf4 +# CHECK: vld2.16 {d8, d9}, [r4]! +0x46 0x88 0x24 0xf4 +# CHECK: vld2.16 {d8, d9}, [r4], r6 +0x8d 0x88 0x24 0xf4 +# CHECK: vld2.32 {d8, d9}, [r4]! +0x86 0x88 0x24 0xf4 +# CHECK: vld2.32 {d8, d9}, [r4], r6 +0x0d 0x88 0x24 0xf4 +# CHECK: vld2.8 {d8, d9}, [r4]! +0x06 0x88 0x24 0xf4 +# CHECK: vld2.8 {d8, d9}, [r4], r6 +0x4f 0x89 0x24 0xf4 +# CHECK: vld2.16 {d8, d10}, [r4] +0x8f 0x89 0x24 0xf4 +# CHECK: vld2.32 {d8, d10}, [r4] +0x0f 0x89 0x24 0xf4 +# CHECK: vld2.8 {d8, d10}, [r4] +0x4d 0x83 0x24 0xf4 +# CHECK: vld2.16 {d8, d9, d10, d11}, [r4]! +0x46 0x83 0x24 0xf4 +# CHECK: vld2.16 {d8, d9, d10, d11}, [r4], r6 +0x8d 0x83 0x24 0xf4 +# CHECK: vld2.32 {d8, d9, d10, d11}, [r4]! +0x86 0x83 0x24 0xf4 +# CHECK: vld2.32 {d8, d9, d10, d11}, [r4], r6 +0x0d 0x83 0x24 0xf4 +# CHECK: vld2.8 {d8, d9, d10, d11}, [r4]! +0x06 0x83 0x24 0xf4 +# CHECK: vld2.8 {d8, d9, d10, d11}, [r4], r6 +0x0f 0x84 0x24 0xf4 +# CHECK: vld3.8 {d8, d9, d10}, [r4] +0x4f 0x84 0x24 0xf4 +# CHECK: vld3.16 {d8, d9, d10}, [r4] +0x8f 0x84 0x24 0xf4 +# CHECK: vld3.32 {d8, d9, d10}, [r4] +0x0f 0x80 0x24 0xf4 +# CHECK: vld4.8 {d8, d9, d10, d11}, [r4] +0x4f 0x80 0x24 0xf4 +# CHECK: vld4.16 {d8, d9, d10, d11}, [r4] +0x8f 0x80 0x24 0xf4 +# CHECK: vld4.32 {d8, d9, d10, d11}, [r4] +0x0f 0x85 0x24 0xf4 +# CHECK: vld3.8 {d8, d10, d12}, [r4] +0x4f 0x85 0x24 0xf4 +# CHECK: vld3.16 {d8, d10, d12}, [r4] +0x8f 0x85 0x24 0xf4 +# CHECK: vld3.32 {d8, d10, d12}, [r4] +0x0f 0x81 0x24 0xf4 +# CHECK: vld4.8 {d8, d10, d12, d14}, [r4] +0x4f 0x81 0x24 0xf4 +# CHECK: vld4.16 {d8, d10, d12, d14}, [r4] +0x8f 0x81 0x24 0xf4 +# CHECK: vld4.32 {d8, d10, d12, d14}, [r4] + +# rdar://11256967 +0x0f 0x0d 0xa2 0xf4 +# CHECK: vld2.8 {d0[], d1[]}, [r2] +0x4f 0x0d 0xa2 0xf4 +# CHECK: vld2.16 {d0[], d1[]}, [r2] +0x8f 0x0d 0xa2 0xf4 +# CHECK: vld2.32 {d0[], d1[]}, [r2] +0x0d 0x0d 0xa2 0xf4 +# CHECK: vld2.8 {d0[], d1[]}, [r2]! +0x4d 0x0d 0xa2 0xf4 +# CHECK: vld2.16 {d0[], d1[]}, [r2]! +0x8d 0x0d 0xa2 0xf4 +# CHECK: vld2.32 {d0[], d1[]}, [r2]! +0x03 0x0d 0xa2 0xf4 +# CHECK: vld2.8 {d0[], d1[]}, [r2], r3 +0x43 0x0d 0xa2 0xf4 +# CHECK: vld2.16 {d0[], d1[]}, [r2], r3 +0x83 0x0d 0xa2 0xf4 +# CHECK: vld2.32 {d0[], d1[]}, [r2], r3 +0x2f 0x0d 0xa3 0xf4 +# CHECK: vld2.8 {d0[], d2[]}, [r3] +0x6f 0x0d 0xa3 0xf4 +# CHECK: vld2.16 {d0[], d2[]}, [r3] +0xaf 0x0d 0xa3 0xf4 +# CHECK: vld2.32 {d0[], d2[]}, [r3] +0x2d 0x0d 0xa3 0xf4 +# CHECK: vld2.8 {d0[], d2[]}, [r3]! +0x6d 0x0d 0xa3 0xf4 +# CHECK: vld2.16 {d0[], d2[]}, [r3]! +0xad 0x0d 0xa3 0xf4 +# CHECK: vld2.32 {d0[], d2[]}, [r3]! +0x24 0x0d 0xa3 0xf4 +# CHECK: vld2.8 {d0[], d2[]}, [r3], r4 +0x64 0x0d 0xa3 0xf4 +0xa4 0x0d 0xa3 0xf4 +# CHECK: vld2.32 {d0[], d2[]}, [r3], r4 diff --git a/test/MC/Disassembler/ARM/neont2.txt b/test/MC/Disassembler/ARM/neont2.txt index f8e7dbe..65cd230 100644 --- a/test/MC/Disassembler/ARM/neont2.txt +++ b/test/MC/Disassembler/ARM/neont2.txt @@ -1778,3 +1778,223 @@ # CHECK: vst4.16 {d8, d10, d12, d14}, [r4] 0x04 0xf9 0x8f 0x81 # CHECK: vst4.32 {d8, d10, d12, d14}, [r4] + +# rdar://11204059 +0x24 0xf9 0x0d 0x87 +# CHECK: vld1.8 {d8}, [r4]! +0x24 0xf9 0x4d 0x87 +# CHECK: vld1.16 {d8}, [r4]! +0x24 0xf9 0x8d 0x87 +# CHECK: vld1.32 {d8}, [r4]! +0x24 0xf9 0xcd 0x87 +# CHECK: vld1.64 {d8}, [r4]! +0x24 0xf9 0x06 0x87 +# CHECK: vld1.8 {d8}, [r4], r6 +0x24 0xf9 0x46 0x87 +# CHECK: vld1.16 {d8}, [r4], r6 +0x24 0xf9 0x86 0x87 +# CHECK: vld1.32 {d8}, [r4], r6 +0x24 0xf9 0xc6 0x87 +# CHECK: vld1.64 {d8}, [r4], r6 +0x24 0xf9 0x0d 0x8a +# CHECK: vld1.8 {d8, d9}, [r4]! +0x24 0xf9 0x4d 0x8a +# CHECK: vld1.16 {d8, d9}, [r4]! +0x24 0xf9 0x8d 0x8a +# CHECK: vld1.32 {d8, d9}, [r4]! +0x24 0xf9 0xcd 0x8a +# CHECK: vld1.64 {d8, d9}, [r4]! +0x24 0xf9 0x06 0x8a +# CHECK: vld1.8 {d8, d9}, [r4], r6 +0x24 0xf9 0x46 0x8a +# CHECK: vld1.16 {d8, d9}, [r4], r6 +0x24 0xf9 0x86 0x8a +# CHECK: vld1.32 {d8, d9}, [r4], r6 +0x24 0xf9 0xc6 0x8a +# CHECK: vld1.64 {d8, d9}, [r4], r6 +0x24 0xf9 0x0d 0x86 +# CHECK: vld1.8 {d8, d9, d10}, [r4]! +0x24 0xf9 0x4d 0x86 +# CHECK: vld1.16 {d8, d9, d10}, [r4]! +0x24 0xf9 0x8d 0x86 +# CHECK: vld1.32 {d8, d9, d10}, [r4]! +0x24 0xf9 0xcd 0x86 +# CHECK: vld1.64 {d8, d9, d10}, [r4]! +0x24 0xf9 0x06 0x86 +# CHECK: vld1.8 {d8, d9, d10}, [r4], r6 +0x24 0xf9 0x46 0x86 +# CHECK: vld1.16 {d8, d9, d10}, [r4], r6 +0x24 0xf9 0x86 0x86 +# CHECK: vld1.32 {d8, d9, d10}, [r4], r6 +0x24 0xf9 0xc6 0x86 +# CHECK: vld1.64 {d8, d9, d10}, [r4], r6 +0x24 0xf9 0x0d 0x82 +# CHECK: vld1.8 {d8, d9, d10, d11}, [r4]! +0x24 0xf9 0x4d 0x82 +# CHECK: vld1.16 {d8, d9, d10, d11}, [r4]! +0x24 0xf9 0x8d 0x82 +# CHECK: vld1.32 {d8, d9, d10, d11}, [r4]! +0x24 0xf9 0xcd 0x82 +# CHECK: vld1.64 {d8, d9, d10, d11}, [r4]! +0x24 0xf9 0x06 0x82 +# CHECK: vld1.8 {d8, d9, d10, d11}, [r4], r6 +0x24 0xf9 0x46 0x82 +# CHECK: vld1.16 {d8, d9, d10, d11}, [r4], r6 +0x24 0xf9 0x86 0x82 +# CHECK: vld1.32 {d8, d9, d10, d11}, [r4], r6 +0x24 0xf9 0xc6 0x82 +# CHECK: vld1.64 {d8, d9, d10, d11}, [r4], r6 +0x24 0xf9 0x0d 0x88 +# CHECK: vld2.8 {d8, d9}, [r4]! +0x24 0xf9 0x4d 0x88 +# CHECK: vld2.16 {d8, d9}, [r4]! +0x24 0xf9 0x8d 0x88 +# CHECK: vld2.32 {d8, d9}, [r4]! +0x24 0xf9 0x06 0x88 +# CHECK: vld2.8 {d8, d9}, [r4], r6 +0x24 0xf9 0x46 0x88 +# CHECK: vld2.16 {d8, d9}, [r4], r6 +0x24 0xf9 0x86 0x88 +# CHECK: vld2.32 {d8, d9}, [r4], r6 +0x24 0xf9 0x0d 0x89 +# CHECK: vld2.8 {d8, d10}, [r4]! +0x24 0xf9 0x4d 0x89 +# CHECK: vld2.16 {d8, d10}, [r4]! +0x24 0xf9 0x8d 0x89 +# CHECK: vld2.32 {d8, d10}, [r4]! +0x24 0xf9 0x06 0x89 +# CHECK: vld2.8 {d8, d10}, [r4], r6 +0x24 0xf9 0x46 0x89 +# CHECK: vld2.16 {d8, d10}, [r4], r6 +0x24 0xf9 0x86 0x89 +# CHECK: vld2.32 {d8, d10}, [r4], r6 +0x24 0xf9 0x0d 0x84 +# CHECK: vld3.8 {d8, d9, d10}, [r4]! +0x24 0xf9 0x4d 0x84 +# CHECK: vld3.16 {d8, d9, d10}, [r4]! +0x24 0xf9 0x8d 0x84 +# CHECK: vld3.32 {d8, d9, d10}, [r4]! +0x24 0xf9 0x06 0x85 +# CHECK: vld3.8 {d8, d10, d12}, [r4], r6 +0x24 0xf9 0x46 0x85 +# CHECK: vld3.16 {d8, d10, d12}, [r4], r6 +0x24 0xf9 0x86 0x85 +# CHECK: vld3.32 {d8, d10, d12}, [r4], r6 +0x24 0xf9 0x0d 0x80 +# CHECK: vld4.8 {d8, d9, d10, d11}, [r4]! +0x24 0xf9 0x4d 0x80 +# CHECK: vld4.16 {d8, d9, d10, d11}, [r4]! +0x24 0xf9 0x8d 0x80 +# CHECK: vld4.32 {d8, d9, d10, d11}, [r4]! +0x24 0xf9 0x06 0x81 +# CHECK: vld4.8 {d8, d10, d12, d14}, [r4], r6 +0x24 0xf9 0x46 0x81 +# CHECK: vld4.16 {d8, d10, d12, d14}, [r4], r6 +0x24 0xf9 0x86 0x81 +# CHECK: vld4.32 {d8, d10, d12, d14}, [r4], r6 +0x24 0xf9 0x4f 0x8a +# CHECK: vld1.16 {d8, d9}, [r4] +0x24 0xf9 0x8f 0x8a +# CHECK: vld1.32 {d8, d9}, [r4] +0x24 0xf9 0xcf 0x8a +# CHECK: vld1.64 {d8, d9}, [r4] +0x24 0xf9 0x0f 0x8a +# CHECK: vld1.8 {d8, d9}, [r4] +0x24 0xf9 0x4f 0x88 +# CHECK: vld2.16 {d8, d9}, [r4] +0x24 0xf9 0x8f 0x88 +# CHECK: vld2.32 {d8, d9}, [r4] +0x24 0xf9 0x0f 0x88 +# CHECK: vld2.8 {d8, d9}, [r4] +0x24 0xf9 0x4d 0x88 +# CHECK: vld2.16 {d8, d9}, [r4]! +0x24 0xf9 0x46 0x88 +# CHECK: vld2.16 {d8, d9}, [r4], r6 +0x24 0xf9 0x8d 0x88 +# CHECK: vld2.32 {d8, d9}, [r4]! +0x24 0xf9 0x86 0x88 +# CHECK: vld2.32 {d8, d9}, [r4], r6 +0x24 0xf9 0x0d 0x88 +# CHECK: vld2.8 {d8, d9}, [r4]! +0x24 0xf9 0x06 0x88 +# CHECK: vld2.8 {d8, d9}, [r4], r6 +0x24 0xf9 0x4f 0x89 +# CHECK: vld2.16 {d8, d10}, [r4] +0x24 0xf9 0x8f 0x89 +# CHECK: vld2.32 {d8, d10}, [r4] +0x24 0xf9 0x0f 0x89 +# CHECK: vld2.8 {d8, d10}, [r4] +0x24 0xf9 0x4d 0x83 +# CHECK: vld2.16 {d8, d9, d10, d11}, [r4]! +0x24 0xf9 0x46 0x83 +# CHECK: vld2.16 {d8, d9, d10, d11}, [r4], r6 +0x24 0xf9 0x8d 0x83 +# CHECK: vld2.32 {d8, d9, d10, d11}, [r4]! +0x24 0xf9 0x86 0x83 +# CHECK: vld2.32 {d8, d9, d10, d11}, [r4], r6 +0x24 0xf9 0x0d 0x83 +# CHECK: vld2.8 {d8, d9, d10, d11}, [r4]! +0x24 0xf9 0x06 0x83 +# CHECK: vld2.8 {d8, d9, d10, d11}, [r4], r6 +0x24 0xf9 0x0f 0x84 +# CHECK: vld3.8 {d8, d9, d10}, [r4] +0x24 0xf9 0x4f 0x84 +# CHECK: vld3.16 {d8, d9, d10}, [r4] +0x24 0xf9 0x8f 0x84 +# CHECK: vld3.32 {d8, d9, d10}, [r4] +0x24 0xf9 0x0f 0x80 +# CHECK: vld4.8 {d8, d9, d10, d11}, [r4] +0x24 0xf9 0x4f 0x80 +# CHECK: vld4.16 {d8, d9, d10, d11}, [r4] +0x24 0xf9 0x8f 0x80 +# CHECK: vld4.32 {d8, d9, d10, d11}, [r4] +0x24 0xf9 0x0f 0x85 +# CHECK: vld3.8 {d8, d10, d12}, [r4] +0x24 0xf9 0x4f 0x85 +# CHECK: vld3.16 {d8, d10, d12}, [r4] +0x24 0xf9 0x8f 0x85 +# CHECK: vld3.32 {d8, d10, d12}, [r4] +0x24 0xf9 0x0f 0x81 +# CHECK: vld4.8 {d8, d10, d12, d14}, [r4] +0x24 0xf9 0x4f 0x81 +# CHECK: vld4.16 {d8, d10, d12, d14}, [r4] +0x24 0xf9 0x8f 0x81 +# CHECK: vld4.32 {d8, d10, d12, d14}, [r4] + +# rdar://11256967 +0xa2 0xf9 0x0f 0x0d +# CHECK: vld2.8 {d0[], d1[]}, [r2] +0xa2 0xf9 0x4f 0x0d +# CHECK: vld2.16 {d0[], d1[]}, [r2] +0xa2 0xf9 0x8f 0x0d +# CHECK: vld2.32 {d0[], d1[]}, [r2] +0xa2 0xf9 0x0d 0x0d +# CHECK: vld2.8 {d0[], d1[]}, [r2]! +0xa2 0xf9 0x4d 0x0d +# CHECK: vld2.16 {d0[], d1[]}, [r2]! +0xa2 0xf9 0x8d 0x0d +# CHECK: vld2.32 {d0[], d1[]}, [r2]! +0xa2 0xf9 0x03 0x0d +# CHECK: vld2.8 {d0[], d1[]}, [r2], r3 +0xa2 0xf9 0x43 0x0d +# CHECK: vld2.16 {d0[], d1[]}, [r2], r3 +0xa2 0xf9 0x83 0x0d +# CHECK: vld2.32 {d0[], d1[]}, [r2], r3 +0xa3 0xf9 0x2f 0x0d +# CHECK: vld2.8 {d0[], d2[]}, [r3] +0xa3 0xf9 0x6f 0x0d +# CHECK: vld2.16 {d0[], d2[]}, [r3] +0xa3 0xf9 0xaf 0x0d +# CHECK: vld2.32 {d0[], d2[]}, [r3] +0xa3 0xf9 0x2d 0x0d +# CHECK: vld2.8 {d0[], d2[]}, [r3]! +0xa3 0xf9 0x6d 0x0d +# CHECK: vld2.16 {d0[], d2[]}, [r3]! +0xa3 0xf9 0xad 0x0d +# CHECK: vld2.32 {d0[], d2[]}, [r3]! +0xa3 0xf9 0x24 0x0d +# CHECK: vld2.8 {d0[], d2[]}, [r3], r4 +0xa3 0xf9 0x64 0x0d +# CHECK: vld2.16 {d0[], d2[]}, [r3], r4 +0xa3 0xf9 0xa4 0x0d +# CHECK: vld2.32 {d0[], d2[]}, [r3], r4 diff --git a/test/MC/Disassembler/ARM/unpredictable-ADC-arm.txt b/test/MC/Disassembler/ARM/unpredictable-ADC-arm.txt new file mode 100644 index 0000000..275bae2 --- /dev/null +++ b/test/MC/Disassembler/ARM/unpredictable-ADC-arm.txt @@ -0,0 +1,17 @@ +# RUN: llvm-mc --disassemble %s -triple=armv7-linux-gnueabi |& FileCheck %s + +# CHECK: potentially undefined +# CHECK: 0x1f 0x12 0xb0 0x00 +0x1f 0x12 0xb0 0x00 + +# CHECK: potentially undefined +# CHECK: 0x13 0xf2 0xb0 0x00 +0x13 0xf2 0xb0 0x00 + +# CHECK: potentially undefined +# CHECK: 0x13 0x1f 0xb0 0x00 +0x13 0x1f 0xb0 0x00 + +# CHECK: potentially undefined +# CHECK: 0x13 0x12 0xbf 0x00 +0x13 0x12 0xbf 0x00 diff --git a/test/MC/Disassembler/ARM/unpredictable-ADDREXT3-arm.txt b/test/MC/Disassembler/ARM/unpredictable-ADDREXT3-arm.txt new file mode 100644 index 0000000..635b66e --- /dev/null +++ b/test/MC/Disassembler/ARM/unpredictable-ADDREXT3-arm.txt @@ -0,0 +1,16 @@ +# RUN: llvm-mc --disassemble %s -triple=armv7-linux-gnueabi |& FileCheck %s + +# CHECK: potentially undefined +# CHECK: 0xd1 0xf1 0x5f 0x01 +0xd1 0xf1 0x5f 0x01 +# CHECK: potentially undefined +# CHECK: 0xf1 0xf1 0x5f 0x01 +0xf1 0xf1 0x5f 0x01 +# CHECK: potentially undefined +# CHECK: 0xf1 0xf1 0x5f 0x01 +0xf1 0xf1 0x5f 0x01 +# CHECK: potentially undefined +# CHECK: 0xd1 0xe1 0x4f 0x01 +0xd1 0xe1 0x4f 0x01 + + diff --git a/test/MC/Disassembler/ARM/unpredictable-AI1cmp-arm.txt b/test/MC/Disassembler/ARM/unpredictable-AI1cmp-arm.txt new file mode 100644 index 0000000..dac4390 --- /dev/null +++ b/test/MC/Disassembler/ARM/unpredictable-AI1cmp-arm.txt @@ -0,0 +1,30 @@ +# RUN: llvm-mc --disassemble %s -triple=armv7-linux-gnueabi |& FileCheck %s + +# CHECK: potentially undefined +# CHECK: 0x01 0x10 0x50 0x03 +0x01 0x10 0x50 0x03 + +# CHECK: potentially undefined +# CHECK: 0x82 0x10 0x50 0x01 +0x82 0x10 0x50 0x01 + +# CHECK: potentially undefined +# CHECK: 0x02 0x10 0x50 0x01 +0x02 0x10 0x50 0x01 + +# CHECK: potentially undefined +# CHECK: 0x1f 0x01 0x52 0x01 +0x1f 0x01 0x52 0x01 + +# CHECK: potentially undefined +# CHECK: 0x10 0x11 0x52 0x01 +0x10 0x11 0x52 0x01 + +# CHECK: potentially undefined +# CHECK: 0x10 0x0f 0x51 0x01 +0x10 0x0f 0x51 0x01 + +# CHECK: potentially undefined +# CHECK: 0x10 0x01 0x5f 0x01 +0x10 0x01 0x5f 0x01 + diff --git a/test/MC/Disassembler/ARM/unpredictable-LDR-arm.txt b/test/MC/Disassembler/ARM/unpredictable-LDR-arm.txt new file mode 100644 index 0000000..ed5e350 --- /dev/null +++ b/test/MC/Disassembler/ARM/unpredictable-LDR-arm.txt @@ -0,0 +1,22 @@ +# RUN: llvm-mc --disassemble %s -triple=armv7-linux-gnueabi |& FileCheck %s + +# CHECK: potentially undefined +# CHECK: 0xff 0x00 0xb9 0x00 +0xff 0x00 0xb9 0x00 + +# CHECK: potentially undefined +# CHECK: 0xfb 0xf0 0xb9 0x00 +0xfb 0xf0 0xb9 0x00 + +# CHECK: potentially undefined +# CHECK: 0xfb 0x01 0xb9 0x00 +0xfb 0x01 0xb9 0x00 + +# CHECK: potentially undefined +# CHECK: 0xfb 0x00 0xbf 0x00 +0xfb 0x00 0xbf 0x00 + +# CHECK: potentially undefined +# CHECK: 0xfb 0x90 0xb9 0x00 +0xfb 0x90 0xb9 0x00 + diff --git a/test/MC/Disassembler/ARM/invalid-LDRD-arm.txt b/test/MC/Disassembler/ARM/unpredictable-LDRD-arm.txt index f8f23ed..a8f54f7 100644 --- a/test/MC/Disassembler/ARM/invalid-LDRD-arm.txt +++ b/test/MC/Disassembler/ARM/unpredictable-LDRD-arm.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& grep {invalid instruction encoding} +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& FileCheck %s # 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 # ------------------------------------------------------------------------------------------------- @@ -7,4 +7,7 @@ # # A8.6.68 LDRD (register) # if Rt{0} = 1 then UNDEFINED; + +# CHECK: potentially undefined +# CHECK: 0xd0 0x10 0x00 0x00 0xd0 0x10 0x00 0x00 diff --git a/test/MC/Disassembler/ARM/unpredictable-MRRC2-arm.txt b/test/MC/Disassembler/ARM/unpredictable-MRRC2-arm.txt new file mode 100644 index 0000000..26b286d --- /dev/null +++ b/test/MC/Disassembler/ARM/unpredictable-MRRC2-arm.txt @@ -0,0 +1,13 @@ +# RUN: llvm-mc --disassemble %s -triple=armv7-linux-gnueabi |& FileCheck %s + +# CHECK: potentially undefined +# CHECK: 0x00 0x10 0x51 0xfc +0x00 0x10 0x51 0xfc + +# CHECK: potentially undefined +# CHECK: 0x00 0xf0 0x41 0x0c +0x00 0xf0 0x41 0x0c + +# CHECK: potentially undefined +# CHECK: 0x00 0x00 0x4f 0x0c +0x00 0x00 0x4f 0x0c diff --git a/test/MC/Disassembler/ARM/unpredictable-MRS-arm.txt b/test/MC/Disassembler/ARM/unpredictable-MRS-arm.txt new file mode 100644 index 0000000..3e472cd --- /dev/null +++ b/test/MC/Disassembler/ARM/unpredictable-MRS-arm.txt @@ -0,0 +1,18 @@ +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& FileCheck %s + +# CHECK: warning: potentially undefined +# CHECK: 0x00 0xf0 0x0f 0x01 +0x00 0xf0 0x0f 0x01 + +# CHECK: warning: potentially undefined +# CHECK: 0x00 0xf0 0x4f 0x01 +0x00 0xf0 0x4f 0x01 + +# CHECK: warning: potentially undefined +# CHECK: 0x0f 0x0d 0x01 0x01 +0x0f 0x0d 0x01 0x01 + +# CHECK: warning: potentially undefined +# CHECK: 0x0f 0x0d 0x40 0x01 +0x0f 0x0d 0x40 0x01 + diff --git a/test/MC/Disassembler/ARM/unpredictable-MUL-arm.txt b/test/MC/Disassembler/ARM/unpredictable-MUL-arm.txt new file mode 100644 index 0000000..3db86cc --- /dev/null +++ b/test/MC/Disassembler/ARM/unpredictable-MUL-arm.txt @@ -0,0 +1,17 @@ +# RUN: llvm-mc --disassemble %s -triple=armv7-linux-gnueabi |& FileCheck %s + +# CHECK: potentially undefined +# CHECK: 0x93 0x12 0x01 0x00 +0x93 0x12 0x01 0x00 + +# CHECK: potentially undefined +# CHECK: 0x92 0x0f 0x01 0x00 +0x92 0x0f 0x01 0x00 + +# CHECK: potentially undefined +# CHECK: 0x9f 0x02 0x01 0x00 +0x9f 0x02 0x01 0x00 + +# CHECK: potentially undefined +# CHECK: 0x92 0x01 0x0f 0x00 +0x92 0x01 0x0f 0x00 diff --git a/test/MC/Disassembler/ARM/unpredictable-SHADD16-arm.txt b/test/MC/Disassembler/ARM/unpredictable-SHADD16-arm.txt new file mode 100644 index 0000000..8ec49ca --- /dev/null +++ b/test/MC/Disassembler/ARM/unpredictable-SHADD16-arm.txt @@ -0,0 +1,7 @@ +# RUN: llvm-mc --disassemble %s -triple=arm-apple-darwin9 |& FileCheck %s + +# CHECK: warning: potentially undefined +# CHECK: shadd16 r5, r7, r0 +0x10 0x51 0x37 0xe6 + + diff --git a/test/MC/Disassembler/ARM/unpredictable-swp-arm.txt b/test/MC/Disassembler/ARM/unpredictable-swp-arm.txt new file mode 100644 index 0000000..64bb171 --- /dev/null +++ b/test/MC/Disassembler/ARM/unpredictable-swp-arm.txt @@ -0,0 +1,26 @@ +# RUN: llvm-mc --disassemble %s -triple=armv7-linux-gnueabi |& FileCheck %s + +# CHECK: potentially undefined +# CHECK: 0x9f 0x10 0x03 0x01 +0x9f 0x10 0x03 0x01 + +# CHECK: potentially undefined +# CHECK: 0x90 0xf0 0x03 0x01 +0x90 0xf0 0x03 0x01 + +# CHECK: potentially undefined +# CHECK: 0x90 0x1f 0x03 0x01 +0x90 0x1f 0x03 0x01 + +# CHECK: potentially undefined +# CHECK: 0x90 0x10 0x0f 0x01 +0x90 0x10 0x0f 0x01 + +# CHECK: potentially undefined +# CHECK: 0x90 0x10 0x01 0x01 +0x90 0x10 0x01 0x01 + +# CHECK: potentially undefined +# CHECK: 0x90 0x10 0x00 0x01 +0x90 0x10 0x00 0x01 + diff --git a/test/MC/Disassembler/ARM/vfp4.txt b/test/MC/Disassembler/ARM/vfp4.txt new file mode 100644 index 0000000..4f2c732 --- /dev/null +++ b/test/MC/Disassembler/ARM/vfp4.txt @@ -0,0 +1,37 @@ +# RUN: llvm-mc < %s -triple thumbv7-unknown-unknown --disassemble -mattr=+neon,+vfp4 | FileCheck %s + +# CHECK: vfma.f64 d16, d18, d17 +0xe2 0xee 0xa1 0x0b + +# CHECK: vfma.f32 s2, s4, s0 +0xa2 0xee 0x00 0x1a + +# CHECK: vfma.f32 d16, d18, d17 +0x42 0xef 0xb1 0x0c + +# CHECK: vfma.f32 q2, q4, q0 +0x08 0xef 0x50 0x4c + +# CHECK: vfnms.f64 d16, d18, d17 +0xd2 0xee 0xa1 0x0b + +# CHECK: vfnms.f32 s2, s4, s0 +0x92 0xee 0x00 0x1a + +# CHECK: vfms.f64 d16, d18, d17 +0xe2 0xee 0xe1 0x0b + +# CHECK: vfms.f32 s2, s4, s0 +0xa2 0xee 0x40 0x1a + +# CHECK: vfms.f32 d16, d18, d17 +0x62 0xef 0xb1 0x0c + +# CHECK: vfms.f32 q2, q4, q0 +0x28 0xef 0x50 0x4c + +# CHECK: vfnma.f64 d16, d18, d17 +0xd2 0xee 0xe1 0x0b + +# CHECK: vfnma.f32 s2, s4, s0 +0x92 0xee 0x40 0x1a diff --git a/test/MC/Disassembler/MBlaze/lit.local.cfg b/test/MC/Disassembler/MBlaze/lit.local.cfg index 766b980..3955b4e 100644 --- a/test/MC/Disassembler/MBlaze/lit.local.cfg +++ b/test/MC/Disassembler/MBlaze/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.txt'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'MBlaze' in targets: config.unsupported = True diff --git a/test/MC/Disassembler/Mips/mips32.txt b/test/MC/Disassembler/Mips/mips32.txt new file mode 100644 index 0000000..591d8c4 --- /dev/null +++ b/test/MC/Disassembler/Mips/mips32.txt @@ -0,0 +1,421 @@ +# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux + +# CHECK: abs.d $f12,$f14 +0x46 0x20 0x39 0x85 + +# CHECK: abs.s $f6,$f7 +0x46 0x00 0x39 0x85 + +# CHECK: add t1,a2,a3 +0x00 0xc7 0x48 0x20 + +# CHECK: add.d $f18,$f12,$f14 +0x46 0x27 0x32 0x40 + +# CHECK: add.s $f9,$f6,$f7 +0x46 0x07 0x32 0x40 + +# CHECK: addi t1,a2,17767 +0x20 0xc9 0x45 0x67 + +# CHECK: addiu t1,a2,-15001 +0x24 0xc9 0xc5 0x67 + +# CHECK: addu t1,a2,a3 +0x00 0xc7 0x48 0x21 + +# CHECK: and t1,a2,a3 +0x00 0xc7 0x48 0x24 + +# CHECK: andi t1,a2,0x4567 +0x30 0xc9 0x45 0x67 + +# CHECK: b 00000534 +0x10 0x00 0x01 0x4c + +# CHECK: bal 00000534 +0x04 0x11 0x01 0x4c + +# CHECK: bc1f 00000534 +0x45 0x00 0x01 0x4c + +# CHECK: bc1t 00000534 +0x45 0x01 0x01 0x4c + +# CHECK: beq t1,a2,00000534 +0x11 0x26 0x01 0x4c + +# CHECK: bgez a2,00000534 +0x04 0xc1 0x01 0x4c + +# CHECK: bgezal a2,00000534 +0x04 0xd1 0x01 0x4c + +# CHECK: bgtz a2,00000534 +0x1c 0xc0 0x01 0x4c + +# CHECK: blez a2,00000534 +0x18 0xc0 0x01 0x4c + +# CHECK: bne t1,a2,00000534 +0x15 0x26 0x01 0x4c + +# CHECK: c.eq.d $f12,$f14 +0x46 0x27 0x30 0x32 + +# CHECK: c.eq.s $f6,$f7 +0x46 0x07 0x30 0x32 + +# CHECK: c.f.d $f12,$f14 +0x46 0x27 0x30 0x30 + +# CHECK: c.f.s $f6,$f7 +0x46 0x07 0x30 0x30 + +# CHECK: c.le.d $f12,$f14 +0x46 0x27 0x30 0x3e + +# CHECK: c.le.s $f6,$f7 +0x46 0x07 0x30 0x3e + +# CHECK: c.lt.d $f12,$f14 +0x46 0x27 0x30 0x3c + +# CHECK: c.lt.s $f6,$f7 +0x46 0x07 0x30 0x3c + +# CHECK: c.nge.d $f12,$f14 +0x46 0x27 0x30 0x3d + +# CHECK: c.nge.s $f6,$f7 +0x46 0x07 0x30 0x3d + +# CHECK: c.ngl.d $f12,$f14 +0x46 0x27 0x30 0x3b + +# CHECK: c.ngl.s $f6,$f7 +0x46 0x07 0x30 0x3b + +# CHECK: c.ngle.d $f12,$f14 +0x46 0x27 0x30 0x39 + +# CHECK: c.ngle.s $f6,$f7 +0x46 0x07 0x30 0x39 + +# CHECK: c.ngt.d $f12,$f14 +0x46 0x27 0x30 0x3f + +# CHECK: c.ngt.s $f6,$f7 +0x46 0x07 0x30 0x3f + +# CHECK: c.ole.d $f12,$f14 +0x46 0x27 0x30 0x36 + +# CHECK: c.ole.s $f6,$f7 +0x46 0x07 0x30 0x36 + +# CHECK: c.olt.d $f12,$f14 +0x46 0x27 0x30 0x34 + +# CHECK: c.olt.s $f6,$f7 +0x46 0x07 0x30 0x34 + +# CHECK: c.seq.d $f12,$f14 +0x46 0x27 0x30 0x3a + +# CHECK: c.seq.s $f6,$f7 +0x46 0x07 0x30 0x3a + +# CHECK: c.sf.d $f12,$f14 +0x46 0x27 0x30 0x38 + +# CHECK: c.sf.s $f6,$f7 +0x46 0x07 0x30 0x38 + +# CHECK: c.ueq.d $f12,$f14 +0x46 0x27 0x30 0x33 + +# CHECK: c.ueq.s $f28,$f18 +0x46 0x12 0xe0 0x33 + +# CHECK: c.ule.d $f12,$f14 +0x46 0x27 0x30 0x37 + +# CHECK: c.ule.s $f6,$f7 +0x46 0x07 0x30 0x37 + +# CHECK: c.ult.d $f12,$f14 +0x46 0x27 0x30 0x35 + +# CHECK: c.ult.s $f6,$f7 +0x46 0x07 0x30 0x35 + +# CHECK: c.un.d $f12,$f14 +0x46 0x27 0x30 0x31 + +# CHECK: c.un.s $f6,$f7 +0x46 0x07 0x30 0x31 + +# CHECK: ceil.w.d $f12,$f14 +0x46 0x20 0x39 0x8e + +# CHECK: ceil.w.s $f6,$f7 +0x46 0x00 0x39 0x8e + +# CHECK: cfc1 a2,$7 +0x44 0x46 0x38 0x00 + +# CHECK: clo a2,a3 +0x70 0xe6 0x30 0x21 + +# CHECK: clz a2,a3 +0x70 0xe6 0x30 0x20 + +# CHECK: ctc1 a2,$7 +0x44 0xc6 0x38 0x00 + +# CHECK: cvt.d.s $f6,$f7 +0x46 0x00 0x38 0xa1 + +# CHECK: cvt.d.w $f12,$f14 +0x46 0x80 0x38 0xa1 + +# CHECK: cvt.l.d $f12,$f14 +0x46 0x20 0x39 0xa5 + +# CHECK: cvt.l.s $f6,$f7 +0x46 0x00 0x39 0xa5 + +# CHECK: cvt.s.d $f12,$f14 +0x46 0x20 0x39 0xa0 + +# CHECK: cvt.s.w $f6,$f7 +0x46 0x80 0x39 0xa0 + +# CHECK: cvt.w.d $f12,$f14 +0x46 0x20 0x39 0xa4 + +# CHECK: cvt.w.s $f6,$f7 +0x46 0x00 0x39 0xa4 + +# CHECK: floor.w.d $f12,$f14 +0x46 0x20 0x39 0x8f + +# CHECK: floor.w.s $f6,$f7 +0x46 0x00 0x39 0x8f + +# CHECK: j 00000530 +0x08 0x00 0x01 0x4c + +# CHECK: jal 00000530 +0x0c 0x00 0x01 0x4c + +# CHECK: jalr a2,a3 +0x00 0xe0 0xf8 0x09 + +# CHECK: jr a3 +0x00 0xe0 0x00 0x08 + +# CHECK: lb a0,9158(a1) +0x80 0xa4 0x23 0xc6 + +# CHECK: lbu a0,6(a1) +0x90 0xa4 0x00 0x06 + +# CHECK: ldc1 $f9,9158(a3) +0xd4 0xe9 0x23 0xc6 + +# CHECK: lh a0,12(a1) +0x84 0xa4 0x00 0x0c + +# CHECK: lh a0,12(a1) +0x84 0xa4 0x00 0x0c + +# CHECK: li v1,17767 +0x24 0x03 0x45 0x67 + +# CHECK: ll t1,9158(a3) +0xc0 0xe9 0x23 0xc6 + +# CHECK: lui a2,0x4567 +0x3c 0x06 0x45 0x67 + +# CHECK: lw a0,24(a1) +0x8c 0xa4 0x00 0x18 + +# CHECK: lwc1 $f9,9158(a3) +0xc4 0xe9 0x23 0xc6 + +# CHECK: madd a2,a3 +0x70 0xc7 0x00 0x00 + +# CHECK: maddu a2,a3 +0x70 0xc7 0x00 0x01 + +# CHECK: mfc1 a2,$f7 +0x44 0x06 0x38 0x00 + +# CHECK: mfhi a1 +0x00 0x00 0x28 0x10 + +# CHECK: mflo a1 +0x00 0x00 0x28 0x12 + +# CHECK: mov.d $f6,$f7 +0x46 0x20 0x39 0x86 + +# CHECK: mov.s $f6,$f7 +0x46 0x00 0x39 0x86 + +# CHECK: move a2,a1 +0x00 0xa0 0x30 0x21 + +# CHECK: msub a2,a3 +0x70 0xc7 0x00 0x04 + +# CHECK: msubu a2,a3 +0x70 0xc7 0x00 0x05 + +# CHECK: mtc1 a2,$f7 +0x44 0x86 0x38 0x00 + +# CHECK: mthi a3 +0x00 0xe0 0x00 0x11 + +# CHECK: mtlo a3 +0x00 0xe0 0x00 0x13 + +# CHECK: mul.d $f9,$f12,$f14 +0x46 0x27 0x32 0x42 + +# CHECK: mul.s $f9,$f6,$f7 +0x46 0x07 0x32 0x42 + +# CHECK: mul t1,a2,a3 +0x70 0xc7 0x48 0x02 + +# CHECK: mult v1,a1 +0x00 0x65 0x00 0x18 + +# CHECK: multu v1,a1 +0x00 0x65 0x00 0x19 + +# CHECK: neg.d $f12,$f14 +0x46 0x20 0x39 0x87 + +# CHECK: neg.s $f6,$f7 +0x46 0x00 0x39 0x87 + +# CHECK: neg v1,a1 +0x00 0x05 0x18 0x22 + +# CHECK: nop +0x00 0x00 0x00 0x00 + +# CHECK: nor t1,a2,a3 +0x00 0xc7 0x48 0x27 + +# CHECK: not v1,a1 +0x00 0xa0 0x18 0x27 + +# CHECK: or v1,v1,a1 +0x00 0x65 0x18 0x25 + +# CHECK: ori t1,a2,0x4567 +0x34 0xc9 0x45 0x67 + +# CHECK: rdhwr a2,$29 +0x7c 0x06 0xe8 0x3b + +# CHECK: round.w.d $f12,$f14 +0x46 0x20 0x39 0x8c + +# CHECK: round.w.s $f6,$f7 +0x46 0x00 0x39 0x8c + +# CHECK: sb a0,9158(a1) +0xa0 0xa4 0x23 0xc6 + +# CHECK: sb a0,6(a1) +0xa0 0xa4 0x00 0x06 + +# CHECK: sc t1,9158(a3) +0xe0 0xe9 0x23 0xc6 + +# CHECK: sdc1 $f9,9158(a3) +0xf4 0xe9 0x23 0xc6 + +# CHECK: sh a0,9158(a1) +0xa4 0xa4 0x23 0xc6 + +# CHECK: sll a0,v1,0x7 +0x00 0x03 0x21 0xc0 + +# CHECK: sllv v0,v1,a1 +0x00 0xa3 0x10 0x04 + +# CHECK: slt v1,v1,a1 +0x00 0x65 0x18 0x2a + +# CHECK: slti v1,v1,103 +0x28 0x63 0x00 0x67 + +# CHECK: sltiu v1,v1,103 +0x2c 0x63 0x00 0x67 + +# CHECK: sltu v1,v1,a1 +0x00 0x65 0x18 0x2b + +# CHECK: sqrt.d $f12,$f14 +0x46 0x20 0x39 0x84 + +# CHECK: sqrt.s $f6,$f7 +0x46 0x00 0x39 0x84 + +# CHECK: sra a0,v1,0x7 +0x00 0x03 0x21 0xc3 + +# CHECK: sra a0,v1,0x7 +0x00 0x03 0x21 0xc3 + +# CHECK: srav v0,v1,a1 +0x00 0xa3 0x10 0x07 + +# CHECK: srl a0,v1,0x7 +0x00 0x03 0x21 0xc2 + +# CHECK: srlv v0,v1,a1 +0x00 0xa3 0x10 0x06 + +# CHECK: sub.d $f9,$f12,$f14 +0x46 0x27 0x32 0x41 + +# CHECK: sub.s $f9,$f6,$f7 +0x46 0x07 0x32 0x41 + +# CHECK: sub t1,a2,a3 +0x00 0xc7 0x48 0x22 + +# CHECK: subu a0,v1,a1 +0x00 0x65 0x20 0x23 + +# CHECK: sw a0,24(a1) +0xac 0xa4 0x00 0x18 + +# CHECK: swc1 $f9,9158(a3) +0xe4 0xe9 0x23 0xc6 + +# CHECK: sync 0x7 +0x00 0x00 0x01 0xcf + +# CHECK: trunc.w.d $f12,$f14 +0x46 0x20 0x39 0x8d + +# CHECK: trunc.w.s $f6,$f7 +0x46 0x00 0x39 0x8d + +# CHECK: xor v1,v1,a1 +0x00 0x65 0x18 0x26 + +# CHECK: xori t1,a2,0x4567 +0x38 0xc9 0x45 0x67 diff --git a/test/MC/Disassembler/Mips/mips32_le.txt b/test/MC/Disassembler/Mips/mips32_le.txt new file mode 100644 index 0000000..a5a3cfd --- /dev/null +++ b/test/MC/Disassembler/Mips/mips32_le.txt @@ -0,0 +1,424 @@ +# RUN: llvm-mc --disassemble %s -triple=mipsel-unknown-linux + +# CHECK: abs.d $f12,$f14 +0x85 0x39 0x20 0x46 + +# CHECK: abs.s $f6,$f7 +0x85 0x39 0x00 0x46 + +# CHECK: add t1,a2,a3 +0x20 0x48 0xc7 0x00 + +# CHECK: add.d $f18,$f12,$f14 +0x40 0x32 0x27 0x46 + +# CHECK: add.s $f9,$f6,$f7 +0x40 0x32 0x07 0x46 + +# CHECK: addi t1,a2,17767 +0x67 0x45 0xc9 0x20 + +# CHECK: addiu t1,a2,-15001 +0x67 0xc5 0xc9 0x24 + +# CHECK: addu t1,a2,a3 +0x21 0x48 0xc7 0x00 + +# CHECK: and t1,a2,a3 +0x24 0x48 0xc7 0x00 + +# CHECK: andi t1,a2,0x4567 +0x67 0x45 0xc9 0x30 + +# CHECK: b 00000534 +0x4c 0x01 0x00 0x10 + +# CHECK: bal 00000534 +0x4c 0x01 0x11 0x04 + +# CHECK: bc1f 00000534 +0x4c 0x01 0x00 0x45 + +# CHECK: bc1t 00000534 +0x4c 0x01 0x01 0x45 + +# CHECK: beq t1,a2,00000534 +0x4c 0x01 0x26 0x11 + +# CHECK: bgez a2,00000534 +0x4c 0x01 0xc1 0x04 + +# CHECK: bgezal a2,00000534 +0x4c 0x01 0xd1 0x04 + +# CHECK: bgtz a2,00000534 +0x4c 0x01 0xc0 0x1c + +# CHECK: blez a2,00000534 +0x4c 0x01 0xc0 0x18 + +# CHECK: bne t1,a2,00000534 +0x4c 0x01 0x26 0x15 + +# CHECK: c.eq.d $f12,$f14 +0x32 0x30 0x27 0x46 + +# CHECK: c.eq.s $f6,$f7 +0x32 0x30 0x07 0x46 + +# CHECK: c.f.d $f12,$f14 +0x30 0x30 0x27 0x46 + +# CHECK: c.f.s $f6,$f7 +0x30 0x30 0x07 0x46 + +# CHECK: c.le.d $f12,$f14 +0x3e 0x30 0x27 0x46 + +# CHECK: c.le.s $f6,$f7 +0x3e 0x30 0x07 0x46 + +# CHECK: c.lt.d $f12,$f14 +0x3c 0x30 0x27 0x46 + +# CHECK: c.lt.s $f6,$f7 +0x3c 0x30 0x07 0x46 + +# CHECK: c.nge.d $f12,$f14 +0x3d 0x30 0x27 0x46 + +# CHECK: c.nge.s $f6,$f7 +0x3d 0x30 0x07 0x46 + +# CHECK: c.ngl.d $f12,$f14 +0x3b 0x30 0x27 0x46 + +# CHECK: c.ngl.s $f6,$f7 +0x3b 0x30 0x07 0x46 + +# CHECK: c.ngle.d $f12,$f14 +0x39 0x30 0x27 0x46 + +# CHECK: c.ngle.s $f6,$f7 +0x39 0x30 0x07 0x46 + +# CHECK: c.ngt.d $f12,$f14 +0x3f 0x30 0x27 0x46 + +# CHECK: c.ngt.s $f6,$f7 +0x3f 0x30 0x07 0x46 + +# CHECK: c.ole.d $f12,$f14 +0x36 0x30 0x27 0x46 + +# CHECK: c.ole.s $f6,$f7 +0x36 0x30 0x07 0x46 + +# CHECK: c.olt.d $f12,$f14 +0x34 0x30 0x27 0x46 + +# CHECK: c.olt.s $f6,$f7 +0x34 0x30 0x07 0x46 + +# CHECK: c.seq.d $f12,$f14 +0x3a 0x30 0x27 0x46 + +# CHECK: c.seq.s $f6,$f7 +0x3a 0x30 0x07 0x46 + +# CHECK: c.sf.d $f12,$f14 +0x38 0x30 0x27 0x46 + +# CHECK: c.sf.s $f6,$f7 +0x38 0x30 0x07 0x46 + +# CHECK: c.ueq.d $f12,$f14 +0x33 0x30 0x27 0x46 + +# CHECK: c.ueq.s $f28,$f18 +0x33 0xe0 0x12 0x46 + +# CHECK: c.ule.d $f12,$f14 +0x37 0x30 0x27 0x46 + +# CHECK: c.ule.s $f6,$f7 +0x37 0x30 0x07 0x46 + +# CHECK: c.ult.d $f12,$f14 +0x35 0x30 0x27 0x46 + +# CHECK: c.ult.s $f6,$f7 +0x35 0x30 0x07 0x46 + +# CHECK: c.un.d $f12,$f14 +0x31 0x30 0x27 0x46 + +# CHECK: c.un.s $f6,$f7 +0x31 0x30 0x07 0x46 + +# CHECK: ceil.w.d $f12,$f14 +0x8e 0x38 0x20 0x46 + +# CHECK: ceil.w.s $f6,$f7 +0x8e 0x38 0x00 0x46 + +# CHECK: cfc1 a2,$7 +0x00 0x38 0x46 0x44 + +# CHECK: clo a2,a3 +0x21 0x30 0xe6 0x70 + +# CHECK: clz a2,a3 +0x20 0x30 0xe6 0x70 + +# CHECK: ctc1 a2,$7 +0x00 0x38 0xc6 0x44 + +# CHECK: cvt.d.s $f6,$f7 +0xa1 0x39 0x00 0x46 + +# CHECK: cvt.d.w $f12,$f14 +0xa1 0x39 0x80 0x46 + +# CHECK: cvt.l.d $f12,$f14 +0xa5 0x39 0x20 0x46 + +# CHECK: cvt.l.s $f6,$f7 +0xa5 0x39 0x00 0x46 + +# CHECK: cvt.s.d $f12,$f14 +0xa0 0x39 0x20 0x46 + +# CHECK: cvt.s.w $f6,$f7 +0xa0 0x39 0x80 0x46 + +# CHECK: cvt.w.d $f12,$f14 +0xa4 0x39 0x20 0x46 + +# CHECK: cvt.w.s $f6,$f7 +0xa4 0x39 0x00 0x46 + +# CHECK: floor.w.d $f12,$f14 +0x8f 0x39 0x20 0x46 + +# CHECK: floor.w.s $f6,$f7 +0x8f 0x39 0x00 0x46 + +# CHECK: j 00000530 +0x4c 0x01 0x00 0x08 + +# CHECK: jal 00000530 +0x4c 0x01 0x00 0x0c + +# CHECK: jalr a2,a3 +0x09 0xf8 0xe0 0x00 + +# CHECK: jr a3 +0x08 0x00 0xe0 0x00 + +# CHECK: lb a0,9158(a1) +0xc6 0x23 0xa4 0x80 + +# CHECK: lbu a0,6(a1) +0x06 0x00 0xa4 0x90 + +# CHECK: ldc1 $f9,9158(a3) +0xc6 0x23 0xe9 0xd4 + +# CHECK: lh a0,12(a1) +0x0c 0x00 0xa4 0x84 + +# CHECK: lh a0,12(a1) +0x0c 0x00 0xa4 0x84 + +# CHECK: li v1,17767 +0x67 0x45 0x03 0x24 + +# CHECK: ll t1,9158(a3) +0xc6 0x23 0xe9 0xc0 + +# CHECK: lui a2,0x4567 +0x67 0x45 0x06 0x3c + +# CHECK: lw a0,24(a1) +0x18 0x00 0xa4 0x8c + +# CHECK lw at,-18316(v0) +0x74 0xb8 0x41 0x8c + +# CHECK: lwc1 $f9,9158(a3) +0xc6 0x23 0xe9 0xc4 + +# CHECK: madd a2,a3 +0x00 0x00 0xc7 0x70 + +# CHECK: maddu a2,a3 +0x01 0x00 0xc7 0x70 + +# CHECK: mfc1 a2,$f7 +0x00 0x38 0x06 0x44 + +# CHECK: mfhi a1 +0x10 0x28 0x00 0x00 + +# CHECK: mflo a1 +0x12 0x28 0x00 0x00 + +# CHECK: mov.d $f12,$f14 +0x86 0x39 0x20 0x46 + +# CHECK: mov.s $f6,$f7 +0x86 0x39 0x00 0x46 + +# CHECK: move a2,a1 +0x21 0x30 0xa0 0x00 + +# CHECK: msub a2,a3 +0x04 0x00 0xc7 0x70 + +# CHECK: msubu a2,a3 +0x05 0x00 0xc7 0x70 + +# CHECK: mtc1 a2,$f7 +0x00 0x38 0x86 0x44 + +# CHECK: mthi a3 +0x11 0x00 0xe0 0x00 + +# CHECK: mtlo a3 +0x13 0x00 0xe0 0x00 + +# CHECK: mul.d $f9,$f12,$f14 +0x42 0x32 0x27 0x46 + +# CHECK: mul.s $f9,$f6,$f7 +0x42 0x32 0x07 0x46 + +# CHECK: mul t1,a2,a3 +0x02 0x48 0xc7 0x70 + +# CHECK: mult v1,a1 +0x18 0x00 0x65 0x00 + +# CHECK: multu v1,a1 +0x19 0x00 0x65 0x00 + +# CHECK: neg.d $f12,$f14 +0x87 0x39 0x20 0x46 + +# CHECK: neg.s $f6,$f7 +0x87 0x39 0x00 0x46 + +# CHECK: neg v1,a1 +0x22 0x18 0x05 0x00 + +# CHECK: nop +0x00 0x00 0x00 0x00 + +# CHECK: nor t1,a2,a3 +0x27 0x48 0xc7 0x00 + +# CHECK: not v1,a1 +0x27 0x18 0xa0 0x00 + +# CHECK: or v1,v1,a1 +0x25 0x18 0x65 0x00 + +# CHECK: ori t1,a2,0x4567 +0x67 0x45 0xc9 0x34 + +# CHECK: rdhwr a2,$29 +0x3b 0xe8 0x06 0x7c + +# CHECK: round.w.d $f12,$f14 +0x8c 0x39 0x20 0x46 + +# CHECK: round.w.s $f6,$f7 +0x8c 0x39 0x00 0x46 + +# CHECK: sb a0,9158(a1) +0xc6 0x23 0xa4 0xa0 + +# CHECK: sb a0,6(a1) +0x06 0x00 0xa4 0xa0 + +# CHECK: sc t1,9158(a3) +0xc6 0x23 0xe9 0xe0 + +# CHECK: sdc1 $f9,9158(a3) +0xc6 0x23 0xe9 0xf4 + +# CHECK: sh a0,9158(a1) +0xc6 0x23 0xa4 0xa4 + +# CHECK: sll a0,v1,0x7 +0xc0 0x21 0x03 0x00 + +# CHECK: sllv v0,v1,a1 +0x04 0x10 0xa3 0x00 + +# CHECK: slt v1,v1,a1 +0x2a 0x18 0x65 0x00 + +# CHECK: slti v1,v1,103 +0x67 0x00 0x63 0x28 + +# CHECK: sltiu v1,v1,103 +0x67 0x00 0x63 0x2c + +# CHECK: sltu v1,v1,a1 +0x2b 0x18 0x65 0x00 + +# CHECK: sqrt.d $f12,$f14 +0x84 0x39 0x20 0x46 + +# CHECK: sqrt.s $f6,$f7 +0x84 0x39 0x00 0x46 + +# CHECK: sra a0,v1,0x7 +0xc3 0x21 0x03 0x00 + +# CHECK: sra a0,v1,0x7 +0xc3 0x21 0x03 0x00 + +# CHECK: srav v0,v1,a1 +0x07 0x10 0xa3 0x00 + +# CHECK: srl a0,v1,0x7 +0xc2 0x21 0x03 0x00 + +# CHECK: srlv v0,v1,a1 +0x06 0x10 0xa3 0x00 + +# CHECK: sub.d $f9,$f12,$f14 +0x41 0x32 0x27 0x46 + +# CHECK: sub.s $f9,$f6,$f7 +0x41 0x32 0x07 0x46 + +# CHECK: sub t1,a2,a3 +0x22 0x48 0xc7 0x00 + +# CHECK: subu a0,v1,a1 +0x23 0x20 0x65 0x00 + +# CHECK: sw a0,24(a1) +0x18 0x00 0xa4 0xac + +# CHECK: swc1 $f9,9158(a3) +0xc6 0x23 0xe9 0xe4 + +# CHECK: sync 0x7 +0xcf 0x01 0x00 0x00 + +# CHECK: trunc.w.d $f12,$f14 +0x8d 0x39 0x20 0x46 + +# CHECK: trunc.w.s $f6,$f7 +0x8d 0x39 0x00 0x46 + +# CHECK: xor v1,v1,a1 +0x26 0x18 0x65 0x00 + +# CHECK: xori t1,a2,0x4567 +0x67 0x45 0xc9 0x38 diff --git a/test/MC/Disassembler/Mips/mips32r2.txt b/test/MC/Disassembler/Mips/mips32r2.txt new file mode 100644 index 0000000..295ffd0 --- /dev/null +++ b/test/MC/Disassembler/Mips/mips32r2.txt @@ -0,0 +1,439 @@ +# RUN: llvm-mc --disassemble %s -triple=mips-unknown-linux -mcpu=mips32r2 + +# CHECK: abs.d $f12,$f14 +0x46 0x20 0x39 0x85 + +# CHECK: abs.s $f6,$f7 +0x46 0x00 0x39 0x85 + +# CHECK: add t1,a2,a3 +0x00 0xc7 0x48 0x20 + +# CHECK: add.d $f18,$f12,$f14 +0x46 0x27 0x32 0x40 + +# CHECK: add.s $f9,$f6,$f7 +0x46 0x07 0x32 0x40 + +# CHECK: addi t1,a2,17767 +0x20 0xc9 0x45 0x67 + +# CHECK: addiu t1,a2,-15001 +0x24 0xc9 0xc5 0x67 + +# CHECK: addu t1,a2,a3 +0x00 0xc7 0x48 0x21 + +# CHECK: and t1,a2,a3 +0x00 0xc7 0x48 0x24 + +# CHECK: andi t1,a2,0x4567 +0x30 0xc9 0x45 0x67 + +# CHECK: b 00000534 +0x10 0x00 0x01 0x4c + +# CHECK: bal 00000534 +0x04 0x11 0x01 0x4c + +# CHECK: bc1f 00000534 +0x45 0x00 0x01 0x4c + +# CHECK: bc1t 00000534 +0x45 0x01 0x01 0x4c + +# CHECK: beq t1,a2,00000534 +0x11 0x26 0x01 0x4c + +# CHECK: bgez a2,00000534 +0x04 0xc1 0x01 0x4c + +# CHECK: bgezal a2,00000534 +0x04 0xd1 0x01 0x4c + +# CHECK: bgtz a2,00000534 +0x1c 0xc0 0x01 0x4c + +# CHECK: blez a2,00000534 +0x18 0xc0 0x01 0x4c + +# CHECK: bne t1,a2,00000534 +0x15 0x26 0x01 0x4c + +# CHECK: c.eq.d $f12,$f14 +0x46 0x27 0x30 0x32 + +# CHECK: c.eq.s $f6,$f7 +0x46 0x07 0x30 0x32 + +# CHECK: c.f.d $f12,$f14 +0x46 0x27 0x30 0x30 + +# CHECK: c.f.s $f6,$f7 +0x46 0x07 0x30 0x30 + +# CHECK: c.le.d $f12,$f14 +0x46 0x27 0x30 0x3e + +# CHECK: c.le.s $f6,$f7 +0x46 0x07 0x30 0x3e + +# CHECK: c.lt.d $f12,$f14 +0x46 0x27 0x30 0x3c + +# CHECK: c.lt.s $f6,$f7 +0x46 0x07 0x30 0x3c + +# CHECK: c.nge.d $f12,$f14 +0x46 0x27 0x30 0x3d + +# CHECK: c.nge.s $f6,$f7 +0x46 0x07 0x30 0x3d + +# CHECK: c.ngl.d $f12,$f14 +0x46 0x27 0x30 0x3b + +# CHECK: c.ngl.s $f6,$f7 +0x46 0x07 0x30 0x3b + +# CHECK: c.ngle.d $f12,$f14 +0x46 0x27 0x30 0x39 + +# CHECK: c.ngle.s $f6,$f7 +0x46 0x07 0x30 0x39 + +# CHECK: c.ngt.d $f12,$f14 +0x46 0x27 0x30 0x3f + +# CHECK: c.ngt.s $f6,$f7 +0x46 0x07 0x30 0x3f + +# CHECK: c.ole.d $f12,$f14 +0x46 0x27 0x30 0x36 + +# CHECK: c.ole.s $f6,$f7 +0x46 0x07 0x30 0x36 + +# CHECK: c.olt.d $f12,$f14 +0x46 0x27 0x30 0x34 + +# CHECK: c.olt.s $f6,$f7 +0x46 0x07 0x30 0x34 + +# CHECK: c.seq.d $f12,$f14 +0x46 0x27 0x30 0x3a + +# CHECK: c.seq.s $f6,$f7 +0x46 0x07 0x30 0x3a + +# CHECK: c.sf.d $f12,$f14 +0x46 0x27 0x30 0x38 + +# CHECK: c.sf.s $f6,$f7 +0x46 0x07 0x30 0x38 + +# CHECK: c.ueq.d $f12,$f14 +0x46 0x27 0x30 0x33 + +# CHECK: c.ueq.s $f28,$f18 +0x46 0x12 0xe0 0x33 + +# CHECK: c.ule.d $f12,$f14 +0x46 0x27 0x30 0x37 + +# CHECK: c.ule.s $f6,$f7 +0x46 0x07 0x30 0x37 + +# CHECK: c.ult.d $f12,$f14 +0x46 0x27 0x30 0x35 + +# CHECK: c.ult.s $f6,$f7 +0x46 0x07 0x30 0x35 + +# CHECK: c.un.d $f12,$f14 +0x46 0x27 0x30 0x31 + +# CHECK: c.un.s $f6,$f7 +0x46 0x07 0x30 0x31 + +# CHECK: ceil.w.d $f12,$f14 +0x46 0x20 0x39 0x8e + +# CHECK: ceil.w.s $f6,$f7 +0x46 0x00 0x39 0x8e + +# CHECK: cfc1 a2,$7 +0x44 0x46 0x38 0x00 + +# CHECK: clo a2,a3 +0x70 0xe6 0x30 0x21 + +# CHECK: clz a2,a3 +0x70 0xe6 0x30 0x20 + +# CHECK: ctc1 a2,$7 +0x44 0xc6 0x38 0x00 + +# CHECK: cvt.d.s $f6,$f7 +0x46 0x00 0x38 0xa1 + +# CHECK: cvt.d.w $f12,$f14 +0x46 0x80 0x38 0xa1 + +# CHECK: cvt.l.d $f12,$f14 +0x46 0x20 0x39 0xa5 + +# CHECK: cvt.l.s $f6,$f7 +0x46 0x00 0x39 0xa5 + +# CHECK: cvt.s.d $f12,$f14 +0x46 0x20 0x39 0xa0 + +# CHECK: cvt.s.w $f6,$f7 +0x46 0x80 0x39 0xa0 + +# CHECK: cvt.w.d $f12,$f14 +0x46 0x20 0x39 0xa4 + +# CHECK: cvt.w.s $f6,$f7 +0x46 0x00 0x39 0xa4 + +# CHECK: floor.w.d $f12,$f14 +0x46 0x20 0x39 0x8f + +# CHECK: floor.w.s $f6,$f7 +0x46 0x00 0x39 0x8f + +# CHECK: ins s3,t1,0x6,0x7 +0x7d 0x33 0x61 0x84 + +# CHECK: j 00000530 +0x08 0x00 0x01 0x4c + +# CHECK: jal 00000530 +0x0c 0x00 0x01 0x4c + +# CHECK: jalr a2,a3 +0x00 0xe0 0xf8 0x09 + +# CHECK: jr a3 +0x00 0xe0 0x00 0x08 + +# CHECK: lb a0,9158(a1) +0x80 0xa4 0x23 0xc6 + +# CHECK: lbu a0,6(a1) +0x90 0xa4 0x00 0x06 + +# CHECK: ldc1 $f9,9158(a3) +0xd4 0xe9 0x23 0xc6 + +# CHECK: lh a0,12(a1) +0x84 0xa4 0x00 0x0c + +# CHECK: lh a0,12(a1) +0x84 0xa4 0x00 0x0c + +# CHECK: li v1,17767 +0x24 0x03 0x45 0x67 + +# CHECK: ll t1,9158(a3) +0xc0 0xe9 0x23 0xc6 + +# CHECK: lui a2,0x4567 +0x3c 0x06 0x45 0x67 + +# CHECK: lw a0,24(a1) +0x8c 0xa4 0x00 0x18 + +# CHECK: lwc1 $f9,9158(a3) +0xc4 0xe9 0x23 0xc6 + +# CHECK: madd a2,a3 +0x70 0xc7 0x00 0x00 + +# CHECK: maddu a2,a3 +0x70 0xc7 0x00 0x01 + +# CHECK: mfc1 a2,$f7 +0x44 0x06 0x38 0x00 + +# CHECK: mfhi a1 +0x00 0x00 0x28 0x10 + +# CHECK: mflo a1 +0x00 0x00 0x28 0x12 + +# CHECK: mov.d $f6,$f7 +0x46 0x20 0x39 0x86 + +# CHECK: mov.s $f6,$f7 +0x46 0x00 0x39 0x86 + +# CHECK: move a2,a1 +0x00 0xa0 0x30 0x21 + +# CHECK: msub a2,a3 +0x70 0xc7 0x00 0x04 + +# CHECK: msubu a2,a3 +0x70 0xc7 0x00 0x05 + +# CHECK: mtc1 a2,$f7 +0x44 0x86 0x38 0x00 + +# CHECK: mthi a3 +0x00 0xe0 0x00 0x11 + +# CHECK: mtlo a3 +0x00 0xe0 0x00 0x13 + +# CHECK: mul.d $f9,$f12,$f14 +0x46 0x27 0x32 0x42 + +# CHECK: mul.s $f9,$f6,$f7 +0x46 0x07 0x32 0x42 + +# CHECK: mul t1,a2,a3 +0x70 0xc7 0x48 0x02 + +# CHECK: mult v1,a1 +0x00 0x65 0x00 0x18 + +# CHECK: multu v1,a1 +0x00 0x65 0x00 0x19 + +# CHECK: neg.d $f12,$f14 +0x46 0x20 0x39 0x87 + +# CHECK: neg.s $f6,$f7 +0x46 0x00 0x39 0x87 + +# CHECK: neg v1,a1 +0x00 0x05 0x18 0x22 + +# CHECK: nop +0x00 0x00 0x00 0x00 + +# CHECK: nor t1,a2,a3 +0x00 0xc7 0x48 0x27 + +# CHECK: not v1,a1 +0x00 0xa0 0x18 0x27 + +# CHECK: or v1,v1,a1 +0x00 0x65 0x18 0x25 + +# CHECK: ori t1,a2,0x4567 +0x34 0xc9 0x45 0x67 + +# CHECK: rdhwr a2,$29 +0x7c 0x06 0xe8 0x3b + +# CHECK: ror t1,a2,0x7 +0x00 0x26 0x49 0xc2 + +# CHECK: rorv t1,a2,a3 +0x00 0xe6 0x48 0x46 + +# CHECK: round.w.d $f12,$f14 +0x46 0x20 0x39 0x8c + +# CHECK: round.w.s $f6,$f7 +0x46 0x00 0x39 0x8c + +# CHECK: sb a0,9158(a1) +0xa0 0xa4 0x23 0xc6 + +# CHECK: sb a0,6(a1) +0xa0 0xa4 0x00 0x06 + +# CHECK: sc t1,9158(a3) +0xe0 0xe9 0x23 0xc6 + +# CHECK: sdc1 $f9,9158(a3) +0xf4 0xe9 0x23 0xc6 + +# CHECK: seb a2,a3 +0x7c 0x07 0x34 0x20 + +# CHECK: seh a2,a3 +0x7c 0x07 0x36 0x20 + +# CHECK: sh a0,9158(a1) +0xa4 0xa4 0x23 0xc6 + +# CHECK: sll a0,v1,0x7 +0x00 0x03 0x21 0xc0 + +# CHECK: sllv v0,v1,a1 +0x00 0xa3 0x10 0x04 + +# CHECK: slt v1,v1,a1 +0x00 0x65 0x18 0x2a + +# CHECK: slti v1,v1,103 +0x28 0x63 0x00 0x67 + +# CHECK: sltiu v1,v1,103 +0x2c 0x63 0x00 0x67 + +# CHECK: sltu v1,v1,a1 +0x00 0x65 0x18 0x2b + +# CHECK: sqrt.d $f12,$f14 +0x46 0x20 0x39 0x84 + +# CHECK: sqrt.s $f6,$f7 +0x46 0x00 0x39 0x84 + +# CHECK: sra a0,v1,0x7 +0x00 0x03 0x21 0xc3 + +# CHECK: sra a0,v1,0x7 +0x00 0x03 0x21 0xc3 + +# CHECK: srav v0,v1,a1 +0x00 0xa3 0x10 0x07 + +# CHECK: srl a0,v1,0x7 +0x00 0x03 0x21 0xc2 + +# CHECK: srlv v0,v1,a1 +0x00 0xa3 0x10 0x06 + +# CHECK: sub.d $f9,$f12,$f14 +0x46 0x27 0x32 0x41 + +# CHECK: sub.s $f9,$f6,$f7 +0x46 0x07 0x32 0x41 + +# CHECK: sub t1,a2,a3 +0x00 0xc7 0x48 0x22 + +# CHECK: subu a0,v1,a1 +0x00 0x65 0x20 0x23 + +# CHECK: sw a0,24(a1) +0xac 0xa4 0x00 0x18 + +# CHECK: swc1 $f9,9158(a3) +0xe4 0xe9 0x23 0xc6 + +# CHECK: sync 0x7 +0x00 0x00 0x01 0xcf + +# CHECK: trunc.w.d $f12,$f14 +0x46 0x20 0x39 0x8d + +# CHECK: trunc.w.s $f6,$f7 +0x46 0x00 0x39 0x8d + +# CHECK: wsbh a2,a3 +0x7c 0x07 0x30 0xa0 + +# CHECK: xor v1,v1,a1 +0x00 0x65 0x18 0x26 + +# CHECK: xori t1,a2,0x4567 +0x38 0xc9 0x45 0x67 diff --git a/test/MC/Disassembler/Mips/mips32r2_le.txt b/test/MC/Disassembler/Mips/mips32r2_le.txt new file mode 100644 index 0000000..6d8be79 --- /dev/null +++ b/test/MC/Disassembler/Mips/mips32r2_le.txt @@ -0,0 +1,442 @@ +# RUN: llvm-mc --disassemble %s -triple=mipsel-unknown-linux -mcpu=mips32r2 + +# CHECK: abs.d $f12,$f14 +0x85 0x39 0x20 0x46 + +# CHECK: abs.s $f6,$f7 +0x85 0x39 0x00 0x46 + +# CHECK: add t1,a2,a3 +0x20 0x48 0xc7 0x00 + +# CHECK: add.d $f18,$f12,$f14 +0x40 0x32 0x27 0x46 + +# CHECK: add.s $f9,$f6,$f7 +0x40 0x32 0x07 0x46 + +# CHECK: addi t1,a2,17767 +0x67 0x45 0xc9 0x20 + +# CHECK: addiu t1,a2,-15001 +0x67 0xc5 0xc9 0x24 + +# CHECK: addu t1,a2,a3 +0x21 0x48 0xc7 0x00 + +# CHECK: and t1,a2,a3 +0x24 0x48 0xc7 0x00 + +# CHECK: andi t1,a2,0x4567 +0x67 0x45 0xc9 0x30 + +# CHECK: b 00000534 +0x4c 0x01 0x00 0x10 + +# CHECK: bal 00000534 +0x4c 0x01 0x11 0x04 + +# CHECK: bc1f 00000534 +0x4c 0x01 0x00 0x45 + +# CHECK: bc1t 00000534 +0x4c 0x01 0x01 0x45 + +# CHECK: beq t1,a2,00000534 +0x4c 0x01 0x26 0x11 + +# CHECK: bgez a2,00000534 +0x4c 0x01 0xc1 0x04 + +# CHECK: bgezal a2,00000534 +0x4c 0x01 0xd1 0x04 + +# CHECK: bgtz a2,00000534 +0x4c 0x01 0xc0 0x1c + +# CHECK: blez a2,00000534 +0x4c 0x01 0xc0 0x18 + +# CHECK: bne t1,a2,00000534 +0x4c 0x01 0x26 0x15 + +# CHECK: c.eq.d $f12,$f14 +0x32 0x30 0x27 0x46 + +# CHECK: c.eq.s $f6,$f7 +0x32 0x30 0x07 0x46 + +# CHECK: c.f.d $f12,$f14 +0x30 0x30 0x27 0x46 + +# CHECK: c.f.s $f6,$f7 +0x30 0x30 0x07 0x46 + +# CHECK: c.le.d $f12,$f14 +0x3e 0x30 0x27 0x46 + +# CHECK: c.le.s $f6,$f7 +0x3e 0x30 0x07 0x46 + +# CHECK: c.lt.d $f12,$f14 +0x3c 0x30 0x27 0x46 + +# CHECK: c.lt.s $f6,$f7 +0x3c 0x30 0x07 0x46 + +# CHECK: c.nge.d $f12,$f14 +0x3d 0x30 0x27 0x46 + +# CHECK: c.nge.s $f6,$f7 +0x3d 0x30 0x07 0x46 + +# CHECK: c.ngl.d $f12,$f14 +0x3b 0x30 0x27 0x46 + +# CHECK: c.ngl.s $f6,$f7 +0x3b 0x30 0x07 0x46 + +# CHECK: c.ngle.d $f12,$f14 +0x39 0x30 0x27 0x46 + +# CHECK: c.ngle.s $f6,$f7 +0x39 0x30 0x07 0x46 + +# CHECK: c.ngt.d $f12,$f14 +0x3f 0x30 0x27 0x46 + +# CHECK: c.ngt.s $f6,$f7 +0x3f 0x30 0x07 0x46 + +# CHECK: c.ole.d $f12,$f14 +0x36 0x30 0x27 0x46 + +# CHECK: c.ole.s $f6,$f7 +0x36 0x30 0x07 0x46 + +# CHECK: c.olt.d $f12,$f14 +0x34 0x30 0x27 0x46 + +# CHECK: c.olt.s $f6,$f7 +0x34 0x30 0x07 0x46 + +# CHECK: c.seq.d $f12,$f14 +0x3a 0x30 0x27 0x46 + +# CHECK: c.seq.s $f6,$f7 +0x3a 0x30 0x07 0x46 + +# CHECK: c.sf.d $f12,$f14 +0x38 0x30 0x27 0x46 + +# CHECK: c.sf.s $f6,$f7 +0x38 0x30 0x07 0x46 + +# CHECK: c.ueq.d $f12,$f14 +0x33 0x30 0x27 0x46 + +# CHECK: c.ueq.s $f28,$f18 +0x33 0xe0 0x12 0x46 + +# CHECK: c.ule.d $f12,$f14 +0x37 0x30 0x27 0x46 + +# CHECK: c.ule.s $f6,$f7 +0x37 0x30 0x07 0x46 + +# CHECK: c.ult.d $f12,$f14 +0x35 0x30 0x27 0x46 + +# CHECK: c.ult.s $f6,$f7 +0x35 0x30 0x07 0x46 + +# CHECK: c.un.d $f12,$f14 +0x31 0x30 0x27 0x46 + +# CHECK: c.un.s $f6,$f7 +0x31 0x30 0x07 0x46 + +# CHECK: ceil.w.d $f12,$f14 +0x8e 0x38 0x20 0x46 + +# CHECK: ceil.w.s $f6,$f7 +0x8e 0x38 0x00 0x46 + +# CHECK: cfc1 a2,$7 +0x00 0x38 0x46 0x44 + +# CHECK: clo a2,a3 +0x21 0x30 0xe6 0x70 + +# CHECK: clz a2,a3 +0x20 0x30 0xe6 0x70 + +# CHECK: ctc1 a2,$7 +0x00 0x38 0xc6 0x44 + +# CHECK: cvt.d.s $f6,$f7 +0xa1 0x39 0x00 0x46 + +# CHECK: cvt.d.w $f12,$f14 +0xa1 0x39 0x80 0x46 + +# CHECK: cvt.l.d $f12,$f14 +0xa5 0x39 0x20 0x46 + +# CHECK: cvt.l.s $f6,$f7 +0xa5 0x39 0x00 0x46 + +# CHECK: cvt.s.d $f12,$f14 +0xa0 0x39 0x20 0x46 + +# CHECK: cvt.s.w $f6,$f7 +0xa0 0x39 0x80 0x46 + +# CHECK: cvt.w.d $f12,$f14 +0xa4 0x39 0x20 0x46 + +# CHECK: cvt.w.s $f6,$f7 +0xa4 0x39 0x00 0x46 + +# CHECK: floor.w.d $f12,$f14 +0x8f 0x39 0x20 0x46 + +# CHECK: floor.w.s $f6,$f7 +0x8f 0x39 0x00 0x46 + +# CHECK: ins s3,t1,0x6,0x7 +0x84 0x61 0x33 0x7d + +# CHECK: j 00000530 +0x4c 0x01 0x00 0x08 + +# CHECK: jal 00000530 +0x4c 0x01 0x00 0x0c + +# CHECK: jalr a2,a3 +0x09 0xf8 0xe0 0x00 + +# CHECK: jr a3 +0x08 0x00 0xe0 0x00 + +# CHECK: lb a0,9158(a1) +0xc6 0x23 0xa4 0x80 + +# CHECK: lbu a0,6(a1) +0x06 0x00 0xa4 0x90 + +# CHECK: ldc1 $f9,9158(a3) +0xc6 0x23 0xe9 0xd4 + +# CHECK: lh a0,12(a1) +0x0c 0x00 0xa4 0x84 + +# CHECK: lh a0,12(a1) +0x0c 0x00 0xa4 0x84 + +# CHECK: li v1,17767 +0x67 0x45 0x03 0x24 + +# CHECK: ll t1,9158(a3) +0xc6 0x23 0xe9 0xc0 + +# CHECK: lui a2,0x4567 +0x67 0x45 0x06 0x3c + +# CHECK: lw a0,24(a1) +0x18 0x00 0xa4 0x8c + +# CHECK lw at,-18316(v0) +0x74 0xb8 0x41 0x8c + +# CHECK: lwc1 $f9,9158(a3) +0xc6 0x23 0xe9 0xc4 + +# CHECK: madd a2,a3 +0x00 0x00 0xc7 0x70 + +# CHECK: maddu a2,a3 +0x01 0x00 0xc7 0x70 + +# CHECK: mfc1 a2,$f7 +0x00 0x38 0x06 0x44 + +# CHECK: mfhi a1 +0x10 0x28 0x00 0x00 + +# CHECK: mflo a1 +0x12 0x28 0x00 0x00 + +# CHECK: mov.d $f12,$f14 +0x86 0x39 0x20 0x46 + +# CHECK: mov.s $f6,$f7 +0x86 0x39 0x00 0x46 + +# CHECK: move a2,a1 +0x21 0x30 0xa0 0x00 + +# CHECK: msub a2,a3 +0x04 0x00 0xc7 0x70 + +# CHECK: msubu a2,a3 +0x05 0x00 0xc7 0x70 + +# CHECK: mtc1 a2,$f7 +0x00 0x38 0x86 0x44 + +# CHECK: mthi a3 +0x11 0x00 0xe0 0x00 + +# CHECK: mtlo a3 +0x13 0x00 0xe0 0x00 + +# CHECK: mul.d $f9,$f12,$f14 +0x42 0x32 0x27 0x46 + +# CHECK: mul.s $f9,$f6,$f7 +0x42 0x32 0x07 0x46 + +# CHECK: mul t1,a2,a3 +0x02 0x48 0xc7 0x70 + +# CHECK: mult v1,a1 +0x18 0x00 0x65 0x00 + +# CHECK: multu v1,a1 +0x19 0x00 0x65 0x00 + +# CHECK: neg.d $f12,$f14 +0x87 0x39 0x20 0x46 + +# CHECK: neg.s $f6,$f7 +0x87 0x39 0x00 0x46 + +# CHECK: neg v1,a1 +0x22 0x18 0x05 0x00 + +# CHECK: nop +0x00 0x00 0x00 0x00 + +# CHECK: nor t1,a2,a3 +0x27 0x48 0xc7 0x00 + +# CHECK: not v1,a1 +0x27 0x18 0xa0 0x00 + +# CHECK: or v1,v1,a1 +0x25 0x18 0x65 0x00 + +# CHECK: ori t1,a2,0x4567 +0x67 0x45 0xc9 0x34 + +# CHECK: rdhwr a2,$29 +0x3b 0xe8 0x06 0x7c + +# CHECK: ror t1,a2,0x7 +0xc2 0x49 0x26 0x00 + +# CHECK: rorv t1,a2,a3 +0x46 0x48 0xe6 0x00 + +# CHECK: round.w.d $f12,$f14 +0x8c 0x39 0x20 0x46 + +# CHECK: round.w.s $f6,$f7 +0x8c 0x39 0x00 0x46 + +# CHECK: sb a0,9158(a1) +0xc6 0x23 0xa4 0xa0 + +# CHECK: sb a0,6(a1) +0x06 0x00 0xa4 0xa0 + +# CHECK: sc t1,9158(a3) +0xc6 0x23 0xe9 0xe0 + +# CHECK: sdc1 $f9,9158(a3) +0xc6 0x23 0xe9 0xf4 + +# CHECK: seb a2,a3 +0x20 0x34 0x07 0x7c + +# CHECK: seh a2,a3 +0x20 0x36 0x07 0x7c + +# CHECK: sh a0,9158(a1) +0xc6 0x23 0xa4 0xa4 + +# CHECK: sll a0,v1,0x7 +0xc0 0x21 0x03 0x00 + +# CHECK: sllv v0,v1,a1 +0x04 0x10 0xa3 0x00 + +# CHECK: slt v1,v1,a1 +0x2a 0x18 0x65 0x00 + +# CHECK: slti v1,v1,103 +0x67 0x00 0x63 0x28 + +# CHECK: sltiu v1,v1,103 +0x67 0x00 0x63 0x2c + +# CHECK: sltu v1,v1,a1 +0x2b 0x18 0x65 0x00 + +# CHECK: sqrt.d $f12,$f14 +0x84 0x39 0x20 0x46 + +# CHECK: sqrt.s $f6,$f7 +0x84 0x39 0x00 0x46 + +# CHECK: sra a0,v1,0x7 +0xc3 0x21 0x03 0x00 + +# CHECK: sra a0,v1,0x7 +0xc3 0x21 0x03 0x00 + +# CHECK: srav v0,v1,a1 +0x07 0x10 0xa3 0x00 + +# CHECK: srl a0,v1,0x7 +0xc2 0x21 0x03 0x00 + +# CHECK: srlv v0,v1,a1 +0x06 0x10 0xa3 0x00 + +# CHECK: sub.d $f9,$f12,$f14 +0x41 0x32 0x27 0x46 + +# CHECK: sub.s $f9,$f6,$f7 +0x41 0x32 0x07 0x46 + +# CHECK: sub t1,a2,a3 +0x22 0x48 0xc7 0x00 + +# CHECK: subu a0,v1,a1 +0x23 0x20 0x65 0x00 + +# CHECK: sw a0,24(a1) +0x18 0x00 0xa4 0xac + +# CHECK: swc1 $f9,9158(a3) +0xc6 0x23 0xe9 0xe4 + +# CHECK: sync 0x7 +0xcf 0x01 0x00 0x00 + +# CHECK: trunc.w.d $f12,$f14 +0x8d 0x39 0x20 0x46 + +# CHECK: trunc.w.s $f6,$f7 +0x8d 0x39 0x00 0x46 + +# CHECK: wsbh a2,a3 +0xa0 0x30 0x07 0x7c + +# CHECK: xor v1,v1,a1 +0x26 0x18 0x65 0x00 + +# CHECK: xori t1,a2,0x4567 +0x67 0x45 0xc9 0x38 diff --git a/test/MC/Disassembler/Mips/mips64.txt b/test/MC/Disassembler/Mips/mips64.txt new file mode 100644 index 0000000..1c7447a --- /dev/null +++ b/test/MC/Disassembler/Mips/mips64.txt @@ -0,0 +1,67 @@ +# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux
+
+# CHECK: daddiu t3,k0,31949
+0x67 0x4b 0x7c 0xcd
+
+# CHECK: daddu k0,at,t3
+0x00 0x2b 0xd0 0x2d
+
+# CHECK: ddiv zero,k0,s6
+0x03 0x56 0x00 0x1e
+
+# CHECK: ddivu zero,t1,t8
+0x01 0x38 0x00 0x1f
+
+# CHECK: dmfc1 v0,$f14
+0x44 0x22 0x70 0x00
+
+# CHECK: dmtc1 s7,$f5
+0x44 0xb7 0x28 0x00
+
+# CHECK: dmult t3,k0
+0x01 0x7a 0x00 0x1c
+
+# CHECK: dmultu s7,t5
+0x02 0xed 0x00 0x1d
+
+# CHECK: dsll v1,t8,0x11
+0x00 0x18 0x1c 0x78
+
+# CHECK: dsllv gp,k1,t8
+0x03 0x1b 0xe0 0x14
+
+# CHECK: dsra at,at,0x1e
+0x00 0x01 0x0f 0xbb
+
+# CHECK: dsrav at,at,s8
+0x03 0xc1 0x08 0x17
+
+# CHECK: dsrl t2,gp,0x18
+0x00 0x1c 0x56 0x3a
+
+# CHECK: dsrlv gp,t2,s7
+0x02 0xea 0xe0 0x16
+
+# CHECK: dsubu gp,k1,t8
+0x03 0x78 0xe0 0x2f
+
+# CHECK: lw k1,-15155(at)
+0x8c 0x3b 0xc4 0xcd
+
+# CHECK: lui at,0x1
+0x3c 0x01 0x00 0x01
+
+# CHECK: lwu v1,-1746(v1)
+0x9c 0x63 0xf9 0x2e
+
+# CHECK: lui ra,0x1
+0x3c 0x1f 0x00 0x01
+
+# CHECK: sw k0,-15159(at)
+0xac 0x3a 0xc4 0xc9
+
+# CHECK: ld k0,3958(zero)
+0xdc 0x1a 0x0f 0x76
+
+# CHECK: sd a2,17767(zero)
+0xfc 0x06 0x45 0x67
diff --git a/test/MC/Disassembler/Mips/mips64_le.txt b/test/MC/Disassembler/Mips/mips64_le.txt new file mode 100644 index 0000000..dd87522 --- /dev/null +++ b/test/MC/Disassembler/Mips/mips64_le.txt @@ -0,0 +1,67 @@ +# RUN: llvm-mc --disassemble %s -triple=mips64el-unknown-linux
+
+# CHECK: daddiu t3,k0,31949
+0xcd 0x7c 0x4b 0x67
+
+# CHECK: daddu k0,at,t3
+0x2d 0xd0 0x2b 0x00
+
+# CHECK: ddiv zero,k0,s6
+0x1e 0x00 0x56 0x03
+
+# CHECK: ddivu zero,t1,t8
+0x1f 0x00 0x38 0x01
+
+# CHECK: dmfc1 v0,$f14
+0x00 0x70 0x22 0x44
+
+# CHECK: dmtc1 s7,$f5
+0x00 0x28 0xb7 0x44
+
+# CHECK: dmult t3,k0
+0x1c 0x00 0x7a 0x01
+
+# CHECK: dmultu s7,t5
+0x1d 0x00 0xed 0x02
+
+# CHECK: dsll v1,t8,0x11
+0x78 0x1c 0x18 0x00
+
+# CHECK: dsllv gp,k1,t8
+0x14 0xe0 0x1b 0x03
+
+# CHECK: dsra at,at,0x1e
+0xbb 0x0f 0x01 0x00
+
+# CHECK: dsrav at,at,s8
+0x17 0x08 0xc1 0x03
+
+# CHECK: dsrl t2,gp,0x18
+0x3a 0x56 0x1c 0x00
+
+# CHECK: dsrlv gp,t2,s7
+0x16 0xe0 0xea 0x02
+
+# CHECK: dsubu gp,k1,t8
+0x2f 0xe0 0x78 0x03
+
+# CHECK: lw k1,-15155(at)
+0xcd 0xc4 0x3b 0x8c
+
+# CHECK: lui at,0x1
+0x01 0x00 0x01 0x3c
+
+# CHECK: lwu v1,-1746(v1)
+0x2e 0xf9 0x63 0x9c
+
+# CHECK: lui ra,0x1
+0x01 0x00 0x1f 0x3c
+
+# CHECK: sw k0,-15159(at)
+0xc9 0xc4 0x3a 0xac
+
+# CHECK: ld k0,3958(zero)
+0x76 0x0f 0x1a 0xdc
+
+# CHECK: sd a2,17767(zero)
+0x67 0x45 0x06 0xfc
diff --git a/test/MC/Disassembler/Mips/mips64r2.txt b/test/MC/Disassembler/Mips/mips64r2.txt new file mode 100644 index 0000000..26bc94d --- /dev/null +++ b/test/MC/Disassembler/Mips/mips64r2.txt @@ -0,0 +1,91 @@ +# RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mattr +mips64r2
+
+# CHECK: daddiu t3,k0,31949
+0x67 0x4b 0x7c 0xcd
+
+# CHECK: daddu k0,at,t3
+0x00 0x2b 0xd0 0x2d
+
+# CHECK: ddiv zero,k0,s6
+0x03 0x56 0x00 0x1e
+
+# CHECK: ddivu zero,t1,t8
+0x01 0x38 0x00 0x1f
+
+# CHECK: dmfc1 v0,$f14
+0x44 0x22 0x70 0x00
+
+# CHECK: dmtc1 s7,$f5
+0x44 0xb7 0x28 0x00
+
+# CHECK: dmult t3,k0
+0x01 0x7a 0x00 0x1c
+
+# CHECK: dmultu s7,t5
+0x02 0xed 0x00 0x1d
+
+# CHECK: dsll v1,t8,0x11
+0x00 0x18 0x1c 0x78
+
+# CHECK: dsllv gp,k1,t8
+0x03 0x1b 0xe0 0x14
+
+# CHECK: dsra at,at,0x1e
+0x00 0x01 0x0f 0xbb
+
+# CHECK: dsrav at,at,s8
+0x03 0xc1 0x08 0x17
+
+# CHECK: dsrl t2,gp,0x18
+0x00 0x1c 0x56 0x3a
+
+# CHECK: dsrlv gp,t2,s7
+0x02 0xea 0xe0 0x16
+
+# CHECK: dsubu gp,k1,t8
+0x03 0x78 0xe0 0x2f
+
+# CHECK: lw k1,-15155(at)
+0x8c 0x3b 0xc4 0xcd
+
+# CHECK: lui at,0x1
+0x3c 0x01 0x00 0x01
+
+# CHECK: lwu v1,-1746(v1)
+0x9c 0x63 0xf9 0x2e
+
+# CHECK: lui ra,0x1
+0x3c 0x1f 0x00 0x01
+
+# CHECK: sw k0,-15159(at)
+0xac 0x3a 0xc4 0xc9
+
+# CHECK: ld k0,3958(zero)
+0xdc 0x1a 0x0f 0x76
+
+# CHECK: sd a2,17767(zero)
+0xfc 0x06 0x45 0x67
+
+# CHECK: dclo t1,t8
+0x73 0x09 0x48 0x25
+
+# CHECK: dclz k0,t1
+0x71 0x3a 0xd0 0x24
+
+# CHECK: dext a3,gp,0x1d,0x1f
+0x7f 0x87 0xf7 0x43
+
+# CHECK: dins s4,gp,0xf,0x1
+0x7f 0x94 0x7b 0xc7
+
+# CHECK: dsbh a3,gp
+0x7c 0x1c 0x38 0xa4
+
+# CHECK: dshd v1,t6
+0x7c 0x0e 0x19 0x64
+
+# CHECK: drotr s4,k1,0x6
+0x00 0x3b 0xa1 0xba
+
+# CHECK: drotrv t8,s7,a1
+0x00 0xb7 0xc0 0x56
diff --git a/test/MC/Disassembler/Mips/mips64r2_le.txt b/test/MC/Disassembler/Mips/mips64r2_le.txt new file mode 100644 index 0000000..81a7c66 --- /dev/null +++ b/test/MC/Disassembler/Mips/mips64r2_le.txt @@ -0,0 +1,91 @@ +# RUN: llvm-mc --disassemble %s -triple=mips64el-unknown-linux -mattr +mips64r2
+
+# CHECK: daddiu t3,k0,31949
+0xcd 0x7c 0x4b 0x67
+
+# CHECK: daddu k0,at,t3
+0x2d 0xd0 0x2b 0x00
+
+# CHECK: ddiv zero,k0,s6
+0x1e 0x00 0x56 0x03
+
+# CHECK: ddivu zero,t1,t8
+0x1f 0x00 0x38 0x01
+
+# CHECK: dmfc1 v0,$f14
+0x00 0x70 0x22 0x44
+
+# CHECK: dmtc1 s7,$f5
+0x00 0x28 0xb7 0x44
+
+# CHECK: dmult t3,k0
+0x1c 0x00 0x7a 0x01
+
+# CHECK: dmultu s7,t5
+0x1d 0x00 0xed 0x02
+
+# CHECK: dsll v1,t8,0x11
+0x78 0x1c 0x18 0x00
+
+# CHECK: dsllv gp,k1,t8
+0x14 0xe0 0x1b 0x03
+
+# CHECK: dsra at,at,0x1e
+0xbb 0x0f 0x01 0x00
+
+# CHECK: dsrav at,at,s8
+0x17 0x08 0xc1 0x03
+
+# CHECK: dsrl t2,gp,0x18
+0x3a 0x56 0x1c 0x00
+
+# CHECK: dsrlv gp,t2,s7
+0x16 0xe0 0xea 0x02
+
+# CHECK: dsubu gp,k1,t8
+0x2f 0xe0 0x78 0x03
+
+# CHECK: lw k1,-15155(at)
+0xcd 0xc4 0x3b 0x8c
+
+# CHECK: lui at,0x1
+0x01 0x00 0x01 0x3c
+
+# CHECK: lwu v1,-1746(v1)
+0x2e 0xf9 0x63 0x9c
+
+# CHECK: lui ra,0x1
+0x01 0x00 0x1f 0x3c
+
+# CHECK: sw k0,-15159(at)
+0xc9 0xc4 0x3a 0xac
+
+# CHECK: ld k0,3958(zero)
+0x76 0x0f 0x1a 0xdc
+
+# CHECK: sd a2,17767(zero)
+0x67 0x45 0x06 0xfc
+
+# CHECK: dclo t1,t8
+0x25 0x48 0x09 0x73
+
+# CHECK: dclz k0,t1
+0x24 0xd0 0x3a 0x71
+
+# CHECK: dext a3,gp,0x1d,0x1f
+0x43 0xf7 0x87 0x7f
+
+# CHECK: dins s4,gp,0xf,0x1
+0xc7 0x7b 0x94 0x7f
+
+# CHECK: dsbh a3,gp
+0xa4 0x38 0x1c 0x7c
+
+# CHECK: dshd v1,t6
+0x64 0x19 0x0e 0x7c
+
+# CHECK: drotr s4,k1,0x6
+0xba 0xa1 0x3b 0x00
+
+# CHECK: drotrv t8,s7,a1
+0x56 0xc0 0xb7 0x00
diff --git a/test/MC/Disassembler/X86/intel-syntax.txt b/test/MC/Disassembler/X86/intel-syntax.txt index e2883c7..a5dbcf2 100644 --- a/test/MC/Disassembler/X86/intel-syntax.txt +++ b/test/MC/Disassembler/X86/intel-syntax.txt @@ -1,4 +1,4 @@ -# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 -x86-asm-syntax=intel | FileCheck %s +# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 --output-asm-variant=1 | FileCheck %s # CHECK: movsb 0xa4 @@ -99,3 +99,9 @@ # CHECK: iretq 0x48 0xcf +# CHECK: ret +0x66 0xc3 + +# CHECK: retf +0x66 0xcb + diff --git a/test/MC/Disassembler/X86/invalid-cmp-imm.txt b/test/MC/Disassembler/X86/invalid-cmp-imm.txt new file mode 100644 index 0000000..bf8699b --- /dev/null +++ b/test/MC/Disassembler/X86/invalid-cmp-imm.txt @@ -0,0 +1,10 @@ +# RUN: llvm-mc --disassemble %s -triple=x86_64-apple-darwin9 |& grep {invalid instruction encoding} + +# This instruction would decode as cmpordps if the immediate byte was less than 8. +0x0f 0xc2 0xc7 0x08 +# This instruction would decode as cmpordpd if the immediate byte was less than 8. +0x66 0x0f 0xc2 0xc7 0x08 +# This instruction would decode as cmpordss if the immediate byte was less than 8. +0xf3 0x0f 0xc2 0xc7 0x08 +# This instruction would decode as cmpordsd if the immediate byte was less than 8. +0xf2 0x0f 0xc2 0xc7 0x08 diff --git a/test/MC/Disassembler/X86/lit.local.cfg b/test/MC/Disassembler/X86/lit.local.cfg index 5f3ae7d..6211b3e 100644 --- a/test/MC/Disassembler/X86/lit.local.cfg +++ b/test/MC/Disassembler/X86/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.txt'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'X86' in targets: config.unsupported = True diff --git a/test/MC/Disassembler/X86/x86-32.txt b/test/MC/Disassembler/X86/x86-32.txt index 5f2f608..739fa6a 100644 --- a/test/MC/Disassembler/X86/x86-32.txt +++ b/test/MC/Disassembler/X86/x86-32.txt @@ -421,6 +421,18 @@ # CHECK: movl %eax, 0 0xa3 0x00 0x00 0x00 0x00 +# CHECK: cmpordpd %xmm7, %xmm0 +0x66 0x0f 0xc2 0xc7 0x07 + +# CHECK: cmpordps %xmm7, %xmm0 +0x0f 0xc2 0xc7 0x07 + +# CHECK: cmpordsd %xmm7, %xmm0 +0xf2 0x0f 0xc2 0xc7 0x07 + +# CHECK: cmpordss %xmm7, %xmm0 +0xf3 0x0f 0xc2 0xc7 0x07 + # CHECK: vaddps %xmm3, %xmm7, %xmm0 0xc4 0xe1 0x00 0x58 0xc3 diff --git a/test/MC/Disassembler/X86/x86-64.txt b/test/MC/Disassembler/X86/x86-64.txt new file mode 100644 index 0000000..f4b8f46 --- /dev/null +++ b/test/MC/Disassembler/X86/x86-64.txt @@ -0,0 +1,63 @@ +# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s + +# Coverage + +# CHECK: vcmptrue_usps +0xc5 0x04 0xc2 0xc7 0x1f + +# CHECK: vcmptrue_uspd +0xc5 0x05 0xc2 0xc7 0x1f + +# CHECK: vcmptrue_usss +0xc5 0x06 0xc2 0xc7 0x1f + +# CHECK: vcmptrue_ussd +0xc5 0x07 0xc2 0xc7 0x1f + +# CHECK: vcmpeq_uqps +0xc5 0x04 0xc2 0xc7 0x08 + +# CHECK: vcmpeq_uqpd +0xc5 0x05 0xc2 0xc7 0x08 + +# CHECK: vcmpeq_uqss +0xc5 0x06 0xc2 0xc7 0x08 + +# CHECK: vcmpeq_uqsd +0xc5 0x07 0xc2 0xc7 0x08 + +# CHECK: vcmpeqps +0xc5 0x04 0xc2 0xc7 0x00 + +# CHECK: vcmpeqpd +0xc5 0x05 0xc2 0xc7 0x00 + +# CHECK: vcmpeqss +0xc5 0x06 0xc2 0xc7 0x00 + +# CHECK: vcmpeqsd +0xc5 0x07 0xc2 0xc7 0x00 + +# CHECK: cmpeqps +0x0f 0xc2 0xc7 0x00 + +# CHECK: cmpeqpd +0x66 0x0f 0xc2 0xc7 0x00 + +# CHECK: cmpeqss +0xf3 0x0f 0xc2 0xc7 0x00 + +# CHECK: cmpeqsd +0xf2 0x0f 0xc2 0xc7 0x00 + +# CHECK: cmpordps +0x0f 0xc2 0xc7 0x07 + +# CHECK: cmpordpd +0x66 0x0f 0xc2 0xc7 0x07 + +# CHECK: cmpordss +0xf3 0x0f 0xc2 0xc7 0x07 + +# CHECK: cmpordsd +0xf2 0x0f 0xc2 0xc7 0x07 diff --git a/test/MC/ELF/lit.local.cfg b/test/MC/ELF/lit.local.cfg index 461c6f4..56bf008 100644 --- a/test/MC/ELF/lit.local.cfg +++ b/test/MC/ELF/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll', '.s'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'X86' in targets: config.unsupported = True diff --git a/test/MC/MBlaze/lit.local.cfg b/test/MC/MBlaze/lit.local.cfg index 6f92d87..b0e1d85 100644 --- a/test/MC/MBlaze/lit.local.cfg +++ b/test/MC/MBlaze/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll', '.c', '.cpp', '.s'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'MBlaze' in targets: config.unsupported = True diff --git a/test/MC/MachO/ARM/lit.local.cfg b/test/MC/MachO/ARM/lit.local.cfg index 871e2b5..8976463 100644 --- a/test/MC/MachO/ARM/lit.local.cfg +++ b/test/MC/MachO/ARM/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.s'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'ARM' in targets: config.unsupported = True diff --git a/test/MC/MachO/lit.local.cfg b/test/MC/MachO/lit.local.cfg index 1f53769..6c49f08 100644 --- a/test/MC/MachO/lit.local.cfg +++ b/test/MC/MachO/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.s'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'X86' in targets: config.unsupported = True diff --git a/test/MC/Mips/elf-bigendian.ll b/test/MC/Mips/elf-bigendian.ll index 875ba3b..71c69bb 100644 --- a/test/MC/Mips/elf-bigendian.ll +++ b/test/MC/Mips/elf-bigendian.ll @@ -5,18 +5,18 @@ ; Make sure that a section table (text) entry is correct. ; CHECK: (('sh_name', 0x{{[0]*}}5) # '.text' -; CHECKNEXT: ('sh_type', 0x{{[0]*}}1) -; CHECKNEXT: ('sh_flags', 0x{{[0]*}}6) -; CHECKNEXT: ('sh_addr', 0x{{{[0-9,a-f]+}}) -; CHECKNEXT: ('sh_offset', 0x{{{[0-9,a-f]+}}) -; CHECKNEXT: ('sh_size', 0x{{{[0-9,a-f]+}}) -; CHECKNEXT: ('sh_link', 0x{{[0]+}}) -; CHECKNEXT: ('sh_info', 0x{{[0]+}}) -; CHECKNEXT: ('sh_addralign', 0x{{[0]*}}4) -; CHECKNEXT: ('sh_entsize', 0x{{[0]+}}) +; CHECK-NEXT: ('sh_type', 0x{{[0]*}}1) +; CHECK-NEXT: ('sh_flags', 0x{{[0]*}}6) +; CHECK-NEXT: ('sh_addr', 0x{{[0-9,a-f]+}}) +; CHECK-NEXT: ('sh_offset', 0x{{[0-9,a-f]+}}) +; CHECK-NEXT: ('sh_size', 0x{{[0-9,a-f]+}}) +; CHECK-NEXT: ('sh_link', 0x{{[0]+}}) +; CHECK-NEXT: ('sh_info', 0x{{[0]+}}) +; CHECK-NEXT: ('sh_addralign', 0x{{[0]*}}4) +; CHECK-NEXT: ('sh_entsize', 0x{{[0]+}}) ; See that at least first 3 instructions are correct: GP prologue -; CHECKNEXT: ('_section_data', '3c1c0000 279c0000 0399e021 {{[0-9,a-f]*}}') +; CHECK-NEXT: ('_section_data', '3c1c0000 279c0000 0399e021 {{[0-9,a-f, ]*}}') ; ModuleID = '../br1.c' target datalayout = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32" diff --git a/test/MC/Mips/elf_basic.s b/test/MC/Mips/elf_basic.s index f7ed348..7a79fa0 100644 --- a/test/MC/Mips/elf_basic.s +++ b/test/MC/Mips/elf_basic.s @@ -1,7 +1,32 @@ -// RUN: llvm-mc -filetype=obj -triple mips-unknown-linux %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE %s -// RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-LE %s +// 32 bit big endian +// RUN: llvm-mc -filetype=obj -triple mips-unknown-linux %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE32 %s +// 32 bit little endian +// RUN: llvm-mc -filetype=obj -triple mipsel-unknown-linux %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-LE32 %s +// 64 bit big endian +// RUN: llvm-mc -filetype=obj -arch=mips64 -triple mips64-unknown-linux %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-BE64 %s +// 64 bit little endian +// RUN: llvm-mc -filetype=obj -arch=mips64el -triple mips64el-unknown-linux %s -o - | elf-dump --dump-section-data | FileCheck -check-prefix=CHECK-LE64 %s -// Check that we produce the correct endian. +// Check that we produce 32 bit with each endian. -// CHECK-BE: ('e_indent[EI_DATA]', 0x02) -// CHECK-LE: ('e_indent[EI_DATA]', 0x01) +// This is 32 bit. +// CHECK-BE32: ('e_indent[EI_CLASS]', 0x01) +// This is big endian. +// CHECK-BE32: ('e_indent[EI_DATA]', 0x02) + +// This is 32 bit. +// CHECK-LE32: ('e_indent[EI_CLASS]', 0x01) +// This is little endian. +// CHECK-LE32: ('e_indent[EI_DATA]', 0x01) + +// Check that we produce 64 bit with each endian. + +// This is 64 bit. +// CHECK-BE64: ('e_indent[EI_CLASS]', 0x02) +// This is big endian. +// CHECK-BE64: ('e_indent[EI_DATA]', 0x02) + +// This is 64 bit. +// CHECK-LE64: ('e_indent[EI_CLASS]', 0x02) +// This is little endian. +// CHECK-LE64: ('e_indent[EI_DATA]', 0x01) diff --git a/test/MC/Mips/lit.local.cfg b/test/MC/Mips/lit.local.cfg index ecc61ea..d2e3b28 100644 --- a/test/MC/Mips/lit.local.cfg +++ b/test/MC/Mips/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll', '.c', '.cpp', '.s'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'Mips' in targets: config.unsupported = True diff --git a/test/MC/Mips/sym-offset.ll b/test/MC/Mips/sym-offset.ll new file mode 100644 index 0000000..5939935 --- /dev/null +++ b/test/MC/Mips/sym-offset.ll @@ -0,0 +1,22 @@ +; RUN: llc -filetype=obj -mtriple mipsel-unknown-linux %s -o - | elf-dump --dump-section-data | FileCheck %s + +; FIXME: use assembler instead of llc when it becomes available. + +@string1 = internal global [11 x i8] c"aaaaaaaaaa\00", align 1 +@string2 = internal global [10 x i8] c"aaaa\00bbbb\00", align 1 + +define i32 @foo1(i32 %n) nounwind readonly { +entry: +; check that the immediate fields of lwl and lwr are three apart. +; 8841000e lwl at,14(v0) +; 9841000b lwr at,11(v0) + +; CHECK: ('_section_data', '00001c3c 00009c27 21e09903 0000828f 0e004188 0b004198 + + %call = tail call i32 @memcmp(i8* getelementptr inbounds ([11 x i8]* @string1, i32 0, i32 0), i8* getelementptr inbounds ([10 x i8]* @string2, i32 0, i32 0), i32 4) nounwind readonly + %cmp = icmp eq i32 %call, 0 + %conv = zext i1 %cmp to i32 + ret i32 %conv +} + +declare i32 @memcmp(i8* nocapture, i8* nocapture, i32) nounwind readonly diff --git a/test/MC/X86/intel-syntax-encoding.s b/test/MC/X86/intel-syntax-encoding.s index 8891126..03b0551 100644 --- a/test/MC/X86/intel-syntax-encoding.s +++ b/test/MC/X86/intel-syntax-encoding.s @@ -42,3 +42,16 @@ LBB0_3: // CHECK: encoding: [0x0f,0xc2,0xd1,0x01] cmpltps XMM2, XMM1 + +// CHECK: encoding: [0xc3] + ret + +// CHECK: encoding: [0xcb] + retf + +// CHECK: encoding: [0xc2,0x08,0x00] + ret 8 + +// CHECK: encoding: [0xca,0x08,0x00] + retf 8 + diff --git a/test/MC/X86/x86-32.s b/test/MC/X86/x86-32.s index 8e11aec..57a0037 100644 --- a/test/MC/X86/x86-32.s +++ b/test/MC/X86/x86-32.s @@ -990,3 +990,11 @@ xchgl %ecx, %eax // CHECK: xchgl %ecx, %eax // CHECK: encoding: [0x91] xchgl %eax, %ecx + +// CHECK: retw +// CHECK: encoding: [0x66,0xc3] +retw + +// CHECK: lretw +// CHECK: encoding: [0x66,0xcb] +lretw diff --git a/test/MC/X86/x86-64.s b/test/MC/X86/x86-64.s index f53b672..6a2d5bb 100644 --- a/test/MC/X86/x86-64.s +++ b/test/MC/X86/x86-64.s @@ -50,6 +50,9 @@ // CHECK: ret ret +// CHECK: retw + retw + // FIXME: Check that this matches SUB32ri8 // CHECK: subl $1, %eax subl $1, %eax @@ -841,6 +844,7 @@ iretq lretq // CHECK: lretq # encoding: [0x48,0xcb] lretl // CHECK: lretl # encoding: [0xcb] lret // CHECK: lretl # encoding: [0xcb] +lretw // CHECK: lretw # encoding: [0x66,0xcb] // rdar://8403907 sysret diff --git a/test/MC/X86/x86_64-avx-encoding.s b/test/MC/X86/x86_64-avx-encoding.s index 990ba40..bd5559a 100644 --- a/test/MC/X86/x86_64-avx-encoding.s +++ b/test/MC/X86/x86_64-avx-encoding.s @@ -600,6 +600,774 @@ vdivpd -4(%rcx,%rbx,8), %xmm10, %xmm11 // CHECK: encoding: [0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x03] vcmpunordsd -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: vcmpps $8, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x08] + vcmpeq_uqps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $9, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x09] + vcmpngeps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $10, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x0a] + vcmpngtps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $11, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x0b] + vcmpfalseps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $12, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x0c] + vcmpneq_oqps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $13, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x0d] + vcmpgeps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $14, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x0e] + vcmpgtps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $15, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x0f] + vcmptrueps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $16, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x10] + vcmpeq_osps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $17, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x11] + vcmplt_oqps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $18, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x12] + vcmple_oqps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $19, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x13] + vcmpunord_sps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $20, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x14] + vcmpneq_usps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $21, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x15] + vcmpnlt_uqps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $22, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x16] + vcmpnle_uqps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $23, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x17] + vcmpord_sps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $24, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x18] + vcmpeq_usps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $25, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x19] + vcmpnge_uqps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $26, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x1a] + vcmpngt_uqps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $27, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x1b] + vcmpfalse_osps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $28, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x1c] + vcmpneq_osps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $29, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x1d] + vcmpge_oqps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $30, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x1e] + vcmpgt_oqps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $31, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xeb,0x1f] + vcmptrue_usps %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpps $8, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x08] + vcmpeq_uqps -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpps $9, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x09] + vcmpngeps -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpps $10, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x0a] + vcmpngtps -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpps $11, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x0b] + vcmpfalseps -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpps $12, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x0c] + vcmpneq_oqps -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpps $13, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x0d] + vcmpgeps -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpps $14, -4(%rbx,%rcx,8), %xmm6, %xmm2 +// CHECK: encoding: [0xc5,0xc8,0xc2,0x54,0xcb,0xfc,0x0e] + vcmpgtps -4(%rbx,%rcx,8), %xmm6, %xmm2 + +// CHECK: vcmpps $15, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x0f] + vcmptrueps -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpps $16, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x10] + vcmpeq_osps -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpps $17, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x11] + vcmplt_oqps -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpps $18, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x12] + vcmple_oqps -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpps $19, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x13] + vcmpunord_sps -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpps $20, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x14] + vcmpneq_usps -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpps $21, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x15] + vcmpnlt_uqps -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpps $22, -4(%rbx,%rcx,8), %xmm6, %xmm2 +// CHECK: encoding: [0xc5,0xc8,0xc2,0x54,0xcb,0xfc,0x16] + vcmpnle_uqps -4(%rbx,%rcx,8), %xmm6, %xmm2 + +// CHECK: vcmpps $23, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x17] + vcmpord_sps -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpps $24, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x18] + vcmpeq_usps -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpps $25, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x19] + vcmpnge_uqps -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpps $26, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x1a] + vcmpngt_uqps -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpps $27, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x1b] + vcmpfalse_osps -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpps $28, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x1c] + vcmpneq_osps -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpps $29, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x1d] + vcmpge_oqps -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpps $30, -4(%rbx,%rcx,8), %xmm6, %xmm2 +// CHECK: encoding: [0xc5,0xc8,0xc2,0x54,0xcb,0xfc,0x1e] + vcmpgt_oqps -4(%rbx,%rcx,8), %xmm6, %xmm2 + +// CHECK: vcmpps $31, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x18,0xc2,0x6c,0xcb,0xfc,0x1f] + vcmptrue_usps -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmppd $8, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x08] + vcmpeq_uqpd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $9, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x09] + vcmpngepd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $10, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x0a] + vcmpngtpd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $11, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x0b] + vcmpfalsepd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $12, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x0c] + vcmpneq_oqpd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $13, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x0d] + vcmpgepd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $14, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x0e] + vcmpgtpd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $15, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x0f] + vcmptruepd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $16, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x10] + vcmpeq_ospd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $17, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x11] + vcmplt_oqpd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $18, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x12] + vcmple_oqpd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $19, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x13] + vcmpunord_spd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $20, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x14] + vcmpneq_uspd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $21, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x15] + vcmpnlt_uqpd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $22, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x16] + vcmpnle_uqpd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $23, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x17] + vcmpord_spd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $24, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x18] + vcmpeq_uspd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $25, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x19] + vcmpnge_uqpd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $26, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x1a] + vcmpngt_uqpd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $27, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x1b] + vcmpfalse_ospd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $28, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x1c] + vcmpneq_ospd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $29, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x1d] + vcmpge_oqpd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $30, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x1e] + vcmpgt_oqpd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $31, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xeb,0x1f] + vcmptrue_uspd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmppd $8, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x08] + vcmpeq_uqpd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmppd $9, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x09] + vcmpngepd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmppd $10, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x0a] + vcmpngtpd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmppd $11, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x0b] + vcmpfalsepd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmppd $12, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x0c] + vcmpneq_oqpd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmppd $13, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x0d] + vcmpgepd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmppd $14, -4(%rbx,%rcx,8), %xmm6, %xmm2 +// CHECK: encoding: [0xc5,0xc9,0xc2,0x54,0xcb,0xfc,0x0e] + vcmpgtpd -4(%rbx,%rcx,8), %xmm6, %xmm2 + +// CHECK: vcmppd $15, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x0f] + vcmptruepd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmppd $16, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x10] + vcmpeq_ospd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmppd $17, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x11] + vcmplt_oqpd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmppd $18, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x12] + vcmple_oqpd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmppd $19, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x13] + vcmpunord_spd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmppd $20, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x14] + vcmpneq_uspd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmppd $21, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x15] + vcmpnlt_uqpd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmppd $22, -4(%rbx,%rcx,8), %xmm6, %xmm2 +// CHECK: encoding: [0xc5,0xc9,0xc2,0x54,0xcb,0xfc,0x16] + vcmpnle_uqpd -4(%rbx,%rcx,8), %xmm6, %xmm2 + +// CHECK: vcmppd $23, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x17] + vcmpord_spd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmppd $24, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x18] + vcmpeq_uspd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmppd $25, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x19] + vcmpnge_uqpd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmppd $26, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x1a] + vcmpngt_uqpd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmppd $27, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x1b] + vcmpfalse_ospd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmppd $28, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x1c] + vcmpneq_ospd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmppd $29, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x1d] + vcmpge_oqpd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmppd $30, -4(%rbx,%rcx,8), %xmm6, %xmm2 +// CHECK: encoding: [0xc5,0xc9,0xc2,0x54,0xcb,0xfc,0x1e] + vcmpgt_oqpd -4(%rbx,%rcx,8), %xmm6, %xmm2 + +// CHECK: vcmppd $31, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x19,0xc2,0x6c,0xcb,0xfc,0x1f] + vcmptrue_uspd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpss $8, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x08] + vcmpeq_uqss %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $9, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x09] + vcmpngess %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $10, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x0a] + vcmpngtss %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $11, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x0b] + vcmpfalsess %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $12, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x0c] + vcmpneq_oqss %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $13, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x0d] + vcmpgess %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $14, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x0e] + vcmpgtss %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $15, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x0f] + vcmptruess %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $16, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x10] + vcmpeq_osss %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $17, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x11] + vcmplt_oqss %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $18, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x12] + vcmple_oqss %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $19, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x13] + vcmpunord_sss %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $20, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x14] + vcmpneq_usss %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $21, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x15] + vcmpnlt_uqss %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $22, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x16] + vcmpnle_uqss %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $23, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x17] + vcmpord_sss %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $24, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x18] + vcmpeq_usss %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $25, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x19] + vcmpnge_uqss %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $26, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x1a] + vcmpngt_uqss %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $27, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x1b] + vcmpfalse_osss %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $28, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x1c] + vcmpneq_osss %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $29, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x1d] + vcmpge_oqss %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $30, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x1e] + vcmpgt_oqss %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $31, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1a,0xc2,0xeb,0x1f] + vcmptrue_usss %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpss $8, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x08] + vcmpeq_uqss -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpss $9, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x09] + vcmpngess -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpss $10, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x0a] + vcmpngtss -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpss $11, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x0b] + vcmpfalsess -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpss $12, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x0c] + vcmpneq_oqss -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpss $13, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x0d] + vcmpgess -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpss $14, -4(%rbx,%rcx,8), %xmm6, %xmm2 +// CHECK: encoding: [0xc5,0xca,0xc2,0x54,0xcb,0xfc,0x0e] + vcmpgtss -4(%rbx,%rcx,8), %xmm6, %xmm2 + +// CHECK: vcmpss $15, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x0f] + vcmptruess -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpss $16, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x10] + vcmpeq_osss -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpss $17, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x11] + vcmplt_oqss -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpss $18, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x12] + vcmple_oqss -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpss $19, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x13] + vcmpunord_sss -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpss $20, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x14] + vcmpneq_usss -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpss $21, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x15] + vcmpnlt_uqss -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpss $22, -4(%rbx,%rcx,8), %xmm6, %xmm2 +// CHECK: encoding: [0xc5,0xca,0xc2,0x54,0xcb,0xfc,0x16] + vcmpnle_uqss -4(%rbx,%rcx,8), %xmm6, %xmm2 + +// CHECK: vcmpss $23, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x17] + vcmpord_sss -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpss $24, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x18] + vcmpeq_usss -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpss $25, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x19] + vcmpnge_uqss -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpss $26, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x1a] + vcmpngt_uqss -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpss $27, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x1b] + vcmpfalse_osss -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpss $28, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x1c] + vcmpneq_osss -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpss $29, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x1d] + vcmpge_oqss -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpss $30, -4(%rbx,%rcx,8), %xmm6, %xmm2 +// CHECK: encoding: [0xc5,0xca,0xc2,0x54,0xcb,0xfc,0x1e] + vcmpgt_oqss -4(%rbx,%rcx,8), %xmm6, %xmm2 + +// CHECK: vcmpss $31, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1a,0xc2,0x6c,0xcb,0xfc,0x1f] + vcmptrue_usss -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpsd $8, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x08] + vcmpeq_uqsd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $9, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x09] + vcmpngesd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $10, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x0a] + vcmpngtsd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $11, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x0b] + vcmpfalsesd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $12, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x0c] + vcmpneq_oqsd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $13, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x0d] + vcmpgesd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $14, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x0e] + vcmpgtsd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $15, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x0f] + vcmptruesd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $16, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x10] + vcmpeq_ossd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $17, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x11] + vcmplt_oqsd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $18, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x12] + vcmple_oqsd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $19, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x13] + vcmpunord_ssd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $20, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x14] + vcmpneq_ussd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $21, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x15] + vcmpnlt_uqsd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $22, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x16] + vcmpnle_uqsd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $23, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x17] + vcmpord_ssd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $24, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x18] + vcmpeq_ussd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $25, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x19] + vcmpnge_uqsd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $26, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x1a] + vcmpngt_uqsd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $27, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x1b] + vcmpfalse_ossd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $28, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x1c] + vcmpneq_ossd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $29, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x1d] + vcmpge_oqsd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $30, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x1e] + vcmpgt_oqsd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $31, %xmm11, %xmm12, %xmm13 +// CHECK: encoding: [0xc4,0x41,0x1b,0xc2,0xeb,0x1f] + vcmptrue_ussd %xmm11, %xmm12, %xmm13 + +// CHECK: vcmpsd $8, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x08] + vcmpeq_uqsd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpsd $9, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x09] + vcmpngesd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpsd $10, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x0a] + vcmpngtsd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpsd $11, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x0b] + vcmpfalsesd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpsd $12, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x0c] + vcmpneq_oqsd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpsd $13, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x0d] + vcmpgesd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpsd $14, -4(%rbx,%rcx,8), %xmm6, %xmm2 +// CHECK: encoding: [0xc5,0xcb,0xc2,0x54,0xcb,0xfc,0x0e] + vcmpgtsd -4(%rbx,%rcx,8), %xmm6, %xmm2 + +// CHECK: vcmpsd $15, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x0f] + vcmptruesd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpsd $16, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x10] + vcmpeq_ossd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpsd $17, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x11] + vcmplt_oqsd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpsd $18, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x12] + vcmple_oqsd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpsd $19, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x13] + vcmpunord_ssd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpsd $20, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x14] + vcmpneq_ussd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpsd $21, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x15] + vcmpnlt_uqsd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpsd $22, -4(%rbx,%rcx,8), %xmm6, %xmm2 +// CHECK: encoding: [0xc5,0xcb,0xc2,0x54,0xcb,0xfc,0x16] + vcmpnle_uqsd -4(%rbx,%rcx,8), %xmm6, %xmm2 + +// CHECK: vcmpsd $23, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x17] + vcmpord_ssd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpsd $24, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x18] + vcmpeq_ussd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpsd $25, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x19] + vcmpnge_uqsd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpsd $26, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x1a] + vcmpngt_uqsd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpsd $27, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x1b] + vcmpfalse_ossd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpsd $28, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x1c] + vcmpneq_ossd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpsd $29, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x1d] + vcmpge_oqsd -4(%rbx,%rcx,8), %xmm12, %xmm13 + +// CHECK: vcmpsd $30, -4(%rbx,%rcx,8), %xmm6, %xmm2 +// CHECK: encoding: [0xc5,0xcb,0xc2,0x54,0xcb,0xfc,0x1e] + vcmpgt_oqsd -4(%rbx,%rcx,8), %xmm6, %xmm2 + +// CHECK: vcmpsd $31, -4(%rbx,%rcx,8), %xmm12, %xmm13 +// CHECK: encoding: [0xc5,0x1b,0xc2,0x6c,0xcb,0xfc,0x1f] + vcmptrue_ussd -4(%rbx,%rcx,8), %xmm12, %xmm13 + // CHECK: vucomiss %xmm11, %xmm12 // CHECK: encoding: [0xc4,0x41,0x78,0x2e,0xe3] vucomiss %xmm11, %xmm12 diff --git a/test/Makefile b/test/Makefile index 6cd27cc..a4e53f8 100644 --- a/test/Makefile +++ b/test/Makefile @@ -171,7 +171,6 @@ lit.site.cfg: site.exp @$(ECHOPATH) s=@ENABLE_ASSERTIONS@=$(ENABLE_ASSERTIONS)=g >> lit.tmp @$(ECHOPATH) s=@TARGETS_TO_BUILD@=$(TARGETS_TO_BUILD)=g >> lit.tmp @$(ECHOPATH) s=@LLVM_BINDINGS@=$(BINDINGS_TO_BUILD)=g >> lit.tmp - @$(ECHOPATH) s=@HOST_OS@=$(HOST_OS)=g >> lit.tmp @sed -f lit.tmp $(PROJ_SRC_DIR)/lit.site.cfg.in > $@ @-rm -f lit.tmp @@ -185,6 +184,5 @@ Unit/lit.site.cfg: $(PROJ_OBJ_DIR)/Unit/.dir FORCE @$(ECHOPATH) s=@ENABLE_SHARED@=$(ENABLE_SHARED)=g >> unit.tmp @$(ECHOPATH) s=@SHLIBDIR@=$(SharedLibDir)=g >> unit.tmp @$(ECHOPATH) s=@SHLIBPATH_VAR@=$(SHLIBPATH_VAR)=g >> unit.tmp - @$(ECHOPATH) s=@HOST_OS@=$(HOST_OS)=g >> unit.tmp @sed -f unit.tmp $(PROJ_SRC_DIR)/Unit/lit.site.cfg.in > $@ @-rm -f unit.tmp diff --git a/test/Object/X86/lit.local.cfg b/test/Object/X86/lit.local.cfg index bbffb84..6a29e92 100644 --- a/test/Object/X86/lit.local.cfg +++ b/test/Object/X86/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.test'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'X86' in targets: config.unsupported = True diff --git a/test/Other/X86/lit.local.cfg b/test/Other/X86/lit.local.cfg index 84bd88c..da2db5a 100644 --- a/test/Other/X86/lit.local.cfg +++ b/test/Other/X86/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'X86' in targets: config.unsupported = True diff --git a/test/Transforms/BBVectorize/no-ldstr-conn.ll b/test/Transforms/BBVectorize/no-ldstr-conn.ll new file mode 100644 index 0000000..ada2a71 --- /dev/null +++ b/test/Transforms/BBVectorize/no-ldstr-conn.ll @@ -0,0 +1,23 @@ +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +; RUN: opt < %s -bb-vectorize -bb-vectorize-req-chain-depth=2 -instcombine -gvn -S | FileCheck %s + +; Make sure that things (specifically getelementptr) are not connected to loads +; and stores via the address operand (which would be bad because the address +; is really a scalar even after vectorization) +define i64 @test2(i64 %a) nounwind uwtable readonly { +entry: + %a1 = inttoptr i64 %a to i64* + %a2 = getelementptr i64* %a1, i64 1 + %a3 = getelementptr i64* %a1, i64 2 + %v2 = load i64* %a2, align 8 + %v3 = load i64* %a3, align 8 + %v2a = add i64 %v2, 5 + %v3a = add i64 %v3, 7 + store i64 %v2a, i64* %a2, align 8 + store i64 %v3a, i64* %a3, align 8 + %r = add i64 %v2, %v3 + ret i64 %r +; CHECK: @test2 +; CHECK-NOT: getelementptr <2 x i64*> +} + diff --git a/test/Transforms/BBVectorize/simple-int.ll b/test/Transforms/BBVectorize/simple-int.ll index b2ef27b..6844977 100644 --- a/test/Transforms/BBVectorize/simple-int.ll +++ b/test/Transforms/BBVectorize/simple-int.ll @@ -3,6 +3,7 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 declare double @llvm.fma.f64(double, double, double) declare double @llvm.cos.f64(double) +declare double @llvm.powi.f64(double, i32) ; Basic depth-3 chain with fma define double @test1(double %A1, double %A2, double %B1, double %B2, double %C1, double %C2) { @@ -54,6 +55,49 @@ define double @test2(double %A1, double %A2, double %B1, double %B2) { ; CHECK: ret double %R } +; Basic depth-3 chain with powi +define double @test3(double %A1, double %A2, double %B1, double %B2, i32 %P) { + + %X1 = fsub double %A1, %B1 + %X2 = fsub double %A2, %B2 + %Y1 = call double @llvm.powi.f64(double %X1, i32 %P) + %Y2 = call double @llvm.powi.f64(double %X2, i32 %P) + %Z1 = fadd double %Y1, %B1 + %Z2 = fadd double %Y2, %B2 + %R = fmul double %Z1, %Z2 + ret double %R +; CHECK: @test3 +; CHECK: %X1.v.i1.1 = insertelement <2 x double> undef, double %B1, i32 0 +; CHECK: %X1.v.i0.1 = insertelement <2 x double> undef, double %A1, i32 0 +; CHECK: %X1.v.i1.2 = insertelement <2 x double> %X1.v.i1.1, double %B2, i32 1 +; CHECK: %X1.v.i0.2 = insertelement <2 x double> %X1.v.i0.1, double %A2, i32 1 +; CHECK: %X1 = fsub <2 x double> %X1.v.i0.2, %X1.v.i1.2 +; CHECK: %Y1 = call <2 x double> @llvm.powi.v2f64(<2 x double> %X1, i32 %P) +; CHECK: %Z1 = fadd <2 x double> %Y1, %X1.v.i1.2 +; CHECK: %Z1.v.r1 = extractelement <2 x double> %Z1, i32 0 +; CHECK: %Z1.v.r2 = extractelement <2 x double> %Z1, i32 1 +; CHECK: %R = fmul double %Z1.v.r1, %Z1.v.r2 +; CHECK: ret double %R +} + +; Basic depth-3 chain with powi (different powers: should not vectorize) +define double @test4(double %A1, double %A2, double %B1, double %B2, i32 %P) { + + %X1 = fsub double %A1, %B1 + %X2 = fsub double %A2, %B2 + %P2 = add i32 %P, 1 + %Y1 = call double @llvm.powi.f64(double %X1, i32 %P) + %Y2 = call double @llvm.powi.f64(double %X2, i32 %P2) + %Z1 = fadd double %Y1, %B1 + %Z2 = fadd double %Y2, %B2 + %R = fmul double %Z1, %Z2 + ret double %R +; CHECK: @test4 +; CHECK-NOT: <2 x double> +; CHECK: ret double %R +} + ; CHECK: declare <2 x double> @llvm.fma.v2f64(<2 x double>, <2 x double>, <2 x double>) nounwind readnone ; CHECK: declare <2 x double> @llvm.cos.v2f64(<2 x double>) nounwind readonly +; CHECK: declare <2 x double> @llvm.powi.v2f64(<2 x double>, i32) nounwind readonly diff --git a/test/Transforms/BBVectorize/simple-ldstr-ptrs.ll b/test/Transforms/BBVectorize/simple-ldstr-ptrs.ll new file mode 100644 index 0000000..f992d41 --- /dev/null +++ b/test/Transforms/BBVectorize/simple-ldstr-ptrs.ll @@ -0,0 +1,81 @@ +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" +; RUN: opt < %s -bb-vectorize -bb-vectorize-req-chain-depth=3 -instcombine -gvn -S | FileCheck %s +; RUN: opt < %s -bb-vectorize -bb-vectorize-req-chain-depth=3 -bb-vectorize-aligned-only -instcombine -gvn -S | FileCheck %s -check-prefix=CHECK-AO + +; Simple 3-pair chain also with loads and stores (using ptrs and gep) +define double @test1(i64* %a, i64* %b, i64* %c) nounwind uwtable readonly { +entry: + %i0 = load i64* %a, align 8 + %i1 = load i64* %b, align 8 + %mul = mul i64 %i0, %i1 + %arrayidx3 = getelementptr inbounds i64* %a, i64 1 + %i3 = load i64* %arrayidx3, align 8 + %arrayidx4 = getelementptr inbounds i64* %b, i64 1 + %i4 = load i64* %arrayidx4, align 8 + %mul5 = mul i64 %i3, %i4 + %ptr = inttoptr i64 %mul to double* + %ptr5 = inttoptr i64 %mul5 to double* + %aptr = getelementptr inbounds double* %ptr, i64 2 + %aptr5 = getelementptr inbounds double* %ptr5, i64 3 + %av = load double* %aptr, align 16 + %av5 = load double* %aptr5, align 16 + %r = fmul double %av, %av5 + store i64 %mul, i64* %c, align 8 + %arrayidx5 = getelementptr inbounds i64* %c, i64 1 + store i64 %mul5, i64* %arrayidx5, align 8 + ret double %r +; CHECK: @test1 +; CHECK: %i0.v.i0 = bitcast i64* %a to <2 x i64>* +; CHECK: %i1.v.i0 = bitcast i64* %b to <2 x i64>* +; CHECK: %i0 = load <2 x i64>* %i0.v.i0, align 8 +; CHECK: %i1 = load <2 x i64>* %i1.v.i0, align 8 +; CHECK: %mul = mul <2 x i64> %i0, %i1 +; CHECK: %ptr = inttoptr <2 x i64> %mul to <2 x double*> +; CHECK: %aptr = getelementptr inbounds <2 x double*> %ptr, <2 x i64> <i64 2, i64 3> +; CHECK: %aptr.v.r1 = extractelement <2 x double*> %aptr, i32 0 +; CHECK: %aptr.v.r2 = extractelement <2 x double*> %aptr, i32 1 +; CHECK: %av = load double* %aptr.v.r1, align 16 +; CHECK: %av5 = load double* %aptr.v.r2, align 16 +; CHECK: %r = fmul double %av, %av5 +; CHECK: %0 = bitcast i64* %c to <2 x i64>* +; CHECK: store <2 x i64> %mul, <2 x i64>* %0, align 8 +; CHECK: ret double %r +; CHECK-AO: @test1 +; CHECK-AO-NOT: load <2 x +} + +; Simple 3-pair chain with loads and stores (using ptrs and gep) +define void @test2(i64** %a, i64** %b, i64** %c) nounwind uwtable readonly { +entry: + %i0 = load i64** %a, align 8 + %i1 = load i64** %b, align 8 + %arrayidx3 = getelementptr inbounds i64** %a, i64 1 + %i3 = load i64** %arrayidx3, align 8 + %arrayidx4 = getelementptr inbounds i64** %b, i64 1 + %i4 = load i64** %arrayidx4, align 8 + %o1 = load i64* %i1, align 8 + %o4 = load i64* %i4, align 8 + %ptr0 = getelementptr inbounds i64* %i0, i64 %o1 + %ptr3 = getelementptr inbounds i64* %i3, i64 %o4 + store i64* %ptr0, i64** %c, align 8 + %arrayidx5 = getelementptr inbounds i64** %c, i64 1 + store i64* %ptr3, i64** %arrayidx5, align 8 + ret void +; CHECK: @test2 +; CHECK: %i0.v.i0 = bitcast i64** %a to <2 x i64*>* +; CHECK: %i1 = load i64** %b, align 8 +; CHECK: %i0 = load <2 x i64*>* %i0.v.i0, align 8 +; CHECK: %arrayidx4 = getelementptr inbounds i64** %b, i64 1 +; CHECK: %i4 = load i64** %arrayidx4, align 8 +; CHECK: %o1 = load i64* %i1, align 8 +; CHECK: %o4 = load i64* %i4, align 8 +; CHECK: %ptr0.v.i1.1 = insertelement <2 x i64> undef, i64 %o1, i32 0 +; CHECK: %ptr0.v.i1.2 = insertelement <2 x i64> %ptr0.v.i1.1, i64 %o4, i32 1 +; CHECK: %ptr0 = getelementptr inbounds <2 x i64*> %i0, <2 x i64> %ptr0.v.i1.2 +; CHECK: %0 = bitcast i64** %c to <2 x i64*>* +; CHECK: store <2 x i64*> %ptr0, <2 x i64*>* %0, align 8 +; CHECK: ret void +; CHECK-AO: @test2 +; CHECK-AO-NOT: <2 x +} + diff --git a/test/Transforms/BBVectorize/simple-sel.ll b/test/Transforms/BBVectorize/simple-sel.ll new file mode 100644 index 0000000..4daa571 --- /dev/null +++ b/test/Transforms/BBVectorize/simple-sel.ll @@ -0,0 +1,30 @@ +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128" +; RUN: opt < %s -bb-vectorize -bb-vectorize-req-chain-depth=3 -instcombine -gvn -S | FileCheck %s + +; Basic depth-3 chain with select +define double @test1(double %A1, double %A2, double %B1, double %B2, i1 %C1, i1 %C2) { +; CHECK: @test1 +; CHECK: %X1.v.i1.1 = insertelement <2 x double> undef, double %B1, i32 0 +; CHECK: %X1.v.i0.1 = insertelement <2 x double> undef, double %A1, i32 0 +; CHECK: %X1.v.i1.2 = insertelement <2 x double> %X1.v.i1.1, double %B2, i32 1 +; CHECK: %X1.v.i0.2 = insertelement <2 x double> %X1.v.i0.1, double %A2, i32 1 + %X1 = fsub double %A1, %B1 + %X2 = fsub double %A2, %B2 +; CHECK: %X1 = fsub <2 x double> %X1.v.i0.2, %X1.v.i1.2 + %Y1 = fmul double %X1, %A1 + %Y2 = fmul double %X2, %A2 +; CHECK: %Y1 = fmul <2 x double> %X1, %X1.v.i0.2 + %Z1 = select i1 %C1, double %Y1, double %B1 + %Z2 = select i1 %C2, double %Y2, double %B2 +; CHECK: %Z1.v.i0.1 = insertelement <2 x i1> undef, i1 %C1, i32 0 +; CHECK: %Z1.v.i0.2 = insertelement <2 x i1> %Z1.v.i0.1, i1 %C2, i32 1 +; CHECK: %Z1 = select <2 x i1> %Z1.v.i0.2, <2 x double> %Y1, <2 x double> %X1.v.i1.2 + %R = fmul double %Z1, %Z2 +; CHECK: %Z1.v.r1 = extractelement <2 x double> %Z1, i32 0 +; CHECK: %Z1.v.r2 = extractelement <2 x double> %Z1, i32 1 +; CHECK: %R = fmul double %Z1.v.r1, %Z1.v.r2 + ret double %R +; CHECK: ret double %R +} + + diff --git a/test/Transforms/GVN/pre-compare.ll b/test/Transforms/GVN/pre-compare.ll new file mode 100644 index 0000000..18d0c2e --- /dev/null +++ b/test/Transforms/GVN/pre-compare.ll @@ -0,0 +1,68 @@ +; RUN: opt -gvn -S < %s | FileCheck %s + +; C source: +; +; void f(int x) { +; if (x != 1) +; puts (x == 2 ? "a" : "b"); +; for (;;) { +; puts("step 1"); +; if (x == 2) +; continue; +; printf("step 2: %d\n", x); +; } +; } +; +; If we PRE %cmp3, CodeGenPrepare won't be able to sink the compare down to its +; uses, and we are forced to keep both %x and %cmp3 in registers in the loop. +; +; It is just as cheap to recompute the icmp against %x as it is to compare a +; GPR against 0. On x86-64, the br i1 %cmp3 becomes: +; +; testb %r12b, %r12b +; jne LBB0_3 +; +; The sunk icmp is: +; +; cmpl $2, %ebx +; je LBB0_3 +; +; This is just as good, and it doesn't require a separate register. +; +; CHECK-NOT: phi i1 + +@.str = private unnamed_addr constant [2 x i8] c"a\00", align 1 +@.str1 = private unnamed_addr constant [2 x i8] c"b\00", align 1 +@.str2 = private unnamed_addr constant [7 x i8] c"step 1\00", align 1 +@.str3 = private unnamed_addr constant [12 x i8] c"step 2: %d\0A\00", align 1 + +define void @f(i32 %x) noreturn nounwind uwtable ssp { +entry: + %cmp = icmp eq i32 %x, 1 + br i1 %cmp, label %for.cond.preheader, label %if.then + +if.then: ; preds = %entry + %cmp1 = icmp eq i32 %x, 2 + %cond = select i1 %cmp1, i8* getelementptr inbounds ([2 x i8]* @.str, i64 0, i64 0), i8* getelementptr inbounds ([2 x i8]* @.str1, i64 0, i64 0) + %call = tail call i32 @puts(i8* %cond) nounwind + br label %for.cond.preheader + +for.cond.preheader: ; preds = %entry, %if.then + %cmp3 = icmp eq i32 %x, 2 + br label %for.cond + +for.cond: ; preds = %for.cond.backedge, %for.cond.preheader + %call2 = tail call i32 @puts(i8* getelementptr inbounds ([7 x i8]* @.str2, i64 0, i64 0)) nounwind + br i1 %cmp3, label %for.cond.backedge, label %if.end5 + +if.end5: ; preds = %for.cond + %call6 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([12 x i8]* @.str3, i64 0, i64 0), i32 %x) nounwind + br label %for.cond.backedge + +for.cond.backedge: ; preds = %if.end5, %for.cond + br label %for.cond +} + +declare i32 @puts(i8* nocapture) nounwind + +declare i32 @printf(i8* nocapture, ...) nounwind diff --git a/test/Transforms/GlobalOpt/zeroinitializer-gep-load.ll b/test/Transforms/GlobalOpt/zeroinitializer-gep-load.ll new file mode 100644 index 0000000..d613601 --- /dev/null +++ b/test/Transforms/GlobalOpt/zeroinitializer-gep-load.ll @@ -0,0 +1,11 @@ +; RUN: opt < %s -S -globalopt | FileCheck %s + +@zero = internal global [10 x i32] zeroinitializer + +define i32 @test1(i64 %idx) nounwind { + %arrayidx = getelementptr inbounds [10 x i32]* @zero, i64 0, i64 %idx + %l = load i32* %arrayidx + ret i32 %l +; CHECK: @test1 +; CHECK: ret i32 0 +} diff --git a/test/Transforms/IndVarSimplify/2011-09-10-widen-nsw.ll b/test/Transforms/IndVarSimplify/2011-09-10-widen-nsw.ll index 4ad63aa..af9f1b3 100644 --- a/test/Transforms/IndVarSimplify/2011-09-10-widen-nsw.ll +++ b/test/Transforms/IndVarSimplify/2011-09-10-widen-nsw.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -indvars -enable-iv-rewrite=false -S | FileCheck %s +; RUN: opt < %s -indvars -S | FileCheck %s ; Test WidenIV::GetExtendedOperandRecurrence. ; add219 should be extended to i64 because it is nsw, even though its ; sext cannot be hoisted outside the loop. diff --git a/test/Transforms/IndVarSimplify/2011-11-01-lftrptr.ll b/test/Transforms/IndVarSimplify/2011-11-01-lftrptr.ll index c7809b8..c0c508f 100644 --- a/test/Transforms/IndVarSimplify/2011-11-01-lftrptr.ll +++ b/test/Transforms/IndVarSimplify/2011-11-01-lftrptr.ll @@ -1,7 +1,5 @@ -; RUN: opt < %s -indvars -S -enable-iv-rewrite=false "-default-data-layout=e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" | FileCheck %s -; RUN: opt < %s -indvars -S -enable-iv-rewrite=true "-default-data-layout=e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" | FileCheck %s -; RUN: opt < %s -indvars -S -enable-iv-rewrite=false "-default-data-layout=e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32" | FileCheck %s -; RUN: opt < %s -indvars -S -enable-iv-rewrite=true "-default-data-layout=e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32" | FileCheck %s +; RUN: opt < %s -indvars -S "-default-data-layout=e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" | FileCheck %s +; RUN: opt < %s -indvars -S "-default-data-layout=e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32" | FileCheck %s ; ; PR11279: Assertion !IVLimit->getType()->isPointerTy() ; diff --git a/test/Transforms/IndVarSimplify/ada-loops.ll b/test/Transforms/IndVarSimplify/ada-loops.ll index 154de6f..c093298 100644 --- a/test/Transforms/IndVarSimplify/ada-loops.ll +++ b/test/Transforms/IndVarSimplify/ada-loops.ll @@ -1,5 +1,4 @@ ; RUN: opt < %s -indvars -S | FileCheck %s -; RUN: opt < %s -indvars -enable-iv-rewrite=false -S | FileCheck %s ; ; PR1301 diff --git a/test/Transforms/IndVarSimplify/complex-scev.ll b/test/Transforms/IndVarSimplify/complex-scev.ll deleted file mode 100644 index 395377e..0000000 --- a/test/Transforms/IndVarSimplify/complex-scev.ll +++ /dev/null @@ -1,31 +0,0 @@ -; The i induction variable looks like a wrap-around, but it really is just -; a simple affine IV. Make sure that indvars eliminates it. - -; RUN: opt < %s -indvars -S -enable-iv-rewrite | FileCheck %s -; CHECK: phi -; CHECK-NOT: phi - -define void @foo() { -entry: - br label %bb6 - -bb6: ; preds = %cond_true, %entry - %j.0 = phi i32 [ 1, %entry ], [ %tmp5, %cond_true ] ; <i32> [#uses=3] - %i.0 = phi i32 [ 0, %entry ], [ %j.0, %cond_true ] ; <i32> [#uses=1] - %tmp7 = call i32 (...)* @foo2( ) ; <i32> [#uses=1] - %tmp = icmp ne i32 %tmp7, 0 ; <i1> [#uses=1] - br i1 %tmp, label %cond_true, label %return - -cond_true: ; preds = %bb6 - %tmp2 = call i32 (...)* @bar( i32 %i.0, i32 %j.0 ) ; <i32> [#uses=0] - %tmp5 = add i32 %j.0, 1 ; <i32> [#uses=1] - br label %bb6 - -return: ; preds = %bb6 - ret void -} - -declare i32 @bar(...) - -declare i32 @foo2(...) - diff --git a/test/Transforms/IndVarSimplify/elim-extend.ll b/test/Transforms/IndVarSimplify/elim-extend.ll index 43c162f..ad5679f 100644 --- a/test/Transforms/IndVarSimplify/elim-extend.ll +++ b/test/Transforms/IndVarSimplify/elim-extend.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -indvars -enable-iv-rewrite=false -S | FileCheck %s +; RUN: opt < %s -indvars -S | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" diff --git a/test/Transforms/IndVarSimplify/gep-with-mul-base.ll b/test/Transforms/IndVarSimplify/gep-with-mul-base.ll deleted file mode 100644 index 7e1e2a3..0000000 --- a/test/Transforms/IndVarSimplify/gep-with-mul-base.ll +++ /dev/null @@ -1,68 +0,0 @@ -; RUN: opt < %s -indvars -S -enable-iv-rewrite | FileCheck %s -; CHECK: define void @foo -; CHECK: mul -; CHECK: mul -; CHECK: mul -; CHECK: add -; CHECK: sub -; CHECK: define void @bar -; CHECK: mul -; CHECK: mul -; CHECK: mul -; CHECK: add -; CHECK: sub - -define void @foo(i64 %n, i64 %m, i64 %o, double* nocapture %p) nounwind { -entry: - %tmp = icmp sgt i64 %n, 0 ; <i1> [#uses=1] - br i1 %tmp, label %bb.nph, label %return - -bb.nph: ; preds = %entry - %tmp1 = mul i64 %n, 37 ; <i64> [#uses=1] - %tmp2 = mul i64 %tmp1, %m ; <i64> [#uses=1] - %tmp3 = mul i64 %tmp2, %o ; <i64> [#uses=1] - br label %bb - -bb: ; preds = %bb, %bb.nph - %i.01 = phi i64 [ %tmp3, %bb.nph ], [ %tmp13, %bb ] ; <i64> [#uses=3] - %tmp9 = getelementptr double* %p, i64 %i.01 ; <double*> [#uses=1] - %tmp10 = load double* %tmp9, align 8 ; <double> [#uses=1] - %tmp11 = fdiv double %tmp10, 2.100000e+00 ; <double> [#uses=1] - store double %tmp11, double* %tmp9, align 8 - %tmp13 = add i64 %i.01, 1 ; <i64> [#uses=2] - %tmp14 = icmp slt i64 %tmp13, %n ; <i1> [#uses=1] - br i1 %tmp14, label %bb, label %return.loopexit - -return.loopexit: ; preds = %bb - br label %return - -return: ; preds = %return.loopexit, %entry - ret void -} -define void @bar(i64 %n, i64 %m, i64 %o, i64 %q, double* nocapture %p) nounwind { -entry: - %tmp = icmp sgt i64 %n, 0 ; <i1> [#uses=1] - br i1 %tmp, label %bb.nph, label %return - -bb.nph: ; preds = %entry - %tmp1 = mul i64 %n, %q ; <i64> [#uses=1] - %tmp2 = mul i64 %tmp1, %m ; <i64> [#uses=1] - %tmp3 = mul i64 %tmp2, %o ; <i64> [#uses=1] - br label %bb - -bb: ; preds = %bb, %bb.nph - %i.01 = phi i64 [ %tmp3, %bb.nph ], [ %tmp13, %bb ] ; <i64> [#uses=3] - %tmp9 = getelementptr double* %p, i64 %i.01 ; <double*> [#uses=1] - %tmp10 = load double* %tmp9, align 8 ; <double> [#uses=1] - %tmp11 = fdiv double %tmp10, 2.100000e+00 ; <double> [#uses=1] - store double %tmp11, double* %tmp9, align 8 - %tmp13 = add i64 %i.01, 1 ; <i64> [#uses=2] - %tmp14 = icmp slt i64 %tmp13, %n ; <i1> [#uses=1] - br i1 %tmp14, label %bb, label %return.loopexit - -return.loopexit: ; preds = %bb - br label %return - -return: ; preds = %return.loopexit, %entry - ret void -} diff --git a/test/Transforms/IndVarSimplify/iv-fold.ll b/test/Transforms/IndVarSimplify/iv-fold.ll index 2e19118..e0b05cd 100644 --- a/test/Transforms/IndVarSimplify/iv-fold.ll +++ b/test/Transforms/IndVarSimplify/iv-fold.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -indvars -enable-iv-rewrite=false -S | FileCheck %s +; RUN: opt < %s -indvars -S | FileCheck %s target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n32:64" diff --git a/test/Transforms/IndVarSimplify/iv-zext.ll b/test/Transforms/IndVarSimplify/iv-zext.ll index 646e6c0..2e0f70c 100644 --- a/test/Transforms/IndVarSimplify/iv-zext.ll +++ b/test/Transforms/IndVarSimplify/iv-zext.ll @@ -1,5 +1,4 @@ ; RUN: opt < %s -indvars -S | FileCheck %s -; RUN: opt < %s -indvars -enable-iv-rewrite=false -S | FileCheck %s ; CHECK-NOT: and ; CHECK-NOT: zext diff --git a/test/Transforms/IndVarSimplify/lftr-reuse.ll b/test/Transforms/IndVarSimplify/lftr-reuse.ll index 490eee9..9abfe13 100644 --- a/test/Transforms/IndVarSimplify/lftr-reuse.ll +++ b/test/Transforms/IndVarSimplify/lftr-reuse.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -indvars -enable-iv-rewrite=false -S | FileCheck %s +; RUN: opt < %s -indvars -S | FileCheck %s ; ; Make sure that indvars can perform LFTR without a canonical IV. diff --git a/test/Transforms/IndVarSimplify/no-iv-rewrite.ll b/test/Transforms/IndVarSimplify/no-iv-rewrite.ll index 23fdc87..bfdd000 100644 --- a/test/Transforms/IndVarSimplify/no-iv-rewrite.ll +++ b/test/Transforms/IndVarSimplify/no-iv-rewrite.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -indvars -enable-iv-rewrite=false -S | FileCheck %s +; RUN: opt < %s -indvars -S | FileCheck %s ; ; Make sure that indvars isn't inserting canonical IVs. ; This is kinda hard to do until linear function test replacement is removed. diff --git a/test/Transforms/IndVarSimplify/preserve-gep-nested.ll b/test/Transforms/IndVarSimplify/preserve-gep-nested.ll deleted file mode 100644 index cdcaaa0..0000000 --- a/test/Transforms/IndVarSimplify/preserve-gep-nested.ll +++ /dev/null @@ -1,76 +0,0 @@ -; RUN: opt < %s -indvars -S -enable-iv-rewrite | FileCheck %s -; No explicit integer multiplications! -; No i8* arithmetic or pointer casting anywhere! -; CHECK-NOT: = {{= mul|i8\*|bitcast|inttoptr|ptrtoint}} -; Exactly one getelementptr for each load+store. -; Each getelementptr using %struct.Q* %s as a base and not i8*. -; CHECK: getelementptr %struct.Q* %s, -; CHECK: getelementptr %struct.Q* %s, -; CHECK: getelementptr %struct.Q* %s, -; CHECK: getelementptr %struct.Q* %s, -; CHECK: getelementptr %struct.Q* %s, -; CHECK: getelementptr %struct.Q* %s, -; CHECK-NOT: = {{= mul|i8\*|bitcast|inttoptr|ptrtoint}} - -; FIXME: This test should pass with or without TargetData. Until opt -; supports running tests without targetdata, just hardware this in. -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n32:64" - -%struct.Q = type { [10 x %struct.N] } -%struct.N = type { %struct.S } -%struct.S = type { [100 x double], [100 x double] } - -define void @foo(%struct.Q* %s, i64 %n) nounwind { -entry: - br label %bb1 - -bb1: - %i = phi i64 [ 2, %entry ], [ %i.next, %bb ] - %j = phi i64 [ 0, %entry ], [ %j.next, %bb ] - %t5 = icmp slt i64 %i, %n - br i1 %t5, label %bb, label %return - -bb: - %t0 = getelementptr inbounds %struct.Q* %s, i64 0, i32 0, i64 0, i32 0, i32 0, i64 %i - %t1 = load double* %t0, align 8 - %t2 = fmul double %t1, 3.200000e+00 - %t3 = getelementptr inbounds %struct.Q* %s, i64 0, i32 0, i64 0, i32 0, i32 0, i64 %i - store double %t2, double* %t3, align 8 - - %s0 = getelementptr inbounds %struct.Q* %s, i64 13, i32 0, i64 7, i32 0, i32 1, i64 %i - %s1 = load double* %s0, align 8 - %s2 = fmul double %s1, 3.200000e+00 - %s3 = getelementptr inbounds %struct.Q* %s, i64 13, i32 0, i64 7, i32 0, i32 1, i64 %i - store double %s2, double* %s3, align 8 - - %u0 = getelementptr inbounds %struct.Q* %s, i64 0, i32 0, i64 7, i32 0, i32 1, i64 %j - %u1 = load double* %u0, align 8 - %u2 = fmul double %u1, 3.200000e+00 - %u3 = getelementptr inbounds %struct.Q* %s, i64 0, i32 0, i64 7, i32 0, i32 1, i64 %j - store double %u2, double* %u3, align 8 - - %v0 = getelementptr inbounds %struct.Q* %s, i64 0, i32 0, i64 0, i32 0, i32 1, i64 %i - %v1 = load double* %v0, align 8 - %v2 = fmul double %v1, 3.200000e+00 - %v3 = getelementptr inbounds %struct.Q* %s, i64 0, i32 0, i64 0, i32 0, i32 1, i64 %i - store double %v2, double* %v3, align 8 - - %w0 = getelementptr inbounds %struct.Q* %s, i64 0, i32 0, i64 0, i32 0, i32 0, i64 %j - %w1 = load double* %w0, align 8 - %w2 = fmul double %w1, 3.200000e+00 - %w3 = getelementptr inbounds %struct.Q* %s, i64 0, i32 0, i64 0, i32 0, i32 0, i64 %j - store double %w2, double* %w3, align 8 - - %x0 = getelementptr inbounds %struct.Q* %s, i64 0, i32 0, i64 3, i32 0, i32 0, i64 %i - %x1 = load double* %x0, align 8 - %x2 = fmul double %x1, 3.200000e+00 - %x3 = getelementptr inbounds %struct.Q* %s, i64 0, i32 0, i64 3, i32 0, i32 0, i64 %i - store double %x2, double* %x3, align 8 - - %i.next = add i64 %i, 1 - %j.next = add i64 %j, 1 - br label %bb1 - -return: - ret void -} diff --git a/test/Transforms/IndVarSimplify/preserve-gep-remainder.ll b/test/Transforms/IndVarSimplify/preserve-gep-remainder.ll deleted file mode 100644 index a62943d..0000000 --- a/test/Transforms/IndVarSimplify/preserve-gep-remainder.ll +++ /dev/null @@ -1,20 +0,0 @@ -; RUN: opt < %s -indvars -S -enable-iv-rewrite | FileCheck %s -; CHECK: %p.2.ip.1 = getelementptr [3 x [3 x double]]* %p, i64 2, i64 %0, i64 1 -target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128-n32:64" - -; Indvars shouldn't expand this to -; %p.2.ip.1 = getelementptr [3 x [3 x double]]* %p, i64 0, i64 %tmp, i64 19 -; or something. That's valid, but more obscure. - -define void @foo([3 x [3 x double]]* noalias %p) nounwind { -entry: - br label %loop - -loop: - %i = phi i64 [ 0, %entry ], [ %i.next, %loop ] - %ip = add i64 %i, 1 - %p.2.ip.1 = getelementptr [3 x [3 x double]]* %p, i64 2, i64 %ip, i64 1 - store volatile double 0.0, double* %p.2.ip.1 - %i.next = add i64 %i, 1 - br label %loop -} diff --git a/test/Transforms/IndVarSimplify/preserve-gep.ll b/test/Transforms/IndVarSimplify/preserve-gep.ll deleted file mode 100644 index fec8a28..0000000 --- a/test/Transforms/IndVarSimplify/preserve-gep.ll +++ /dev/null @@ -1,39 +0,0 @@ -; RUN: opt < %s -indvars -S -enable-iv-rewrite | FileCheck %s -; CHECK-NOT: {{ptrtoint|inttoptr}} -; CHECK: getelementptr -; CHECK-NOT: {{ptrtoint|inttoptr|getelementptr}} - -; Indvars shouldn't leave getelementptrs expanded out as -; inttoptr+ptrtoint in its output in common cases. - -target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n32:64" -target triple = "x86_64-unknown-linux-gnu" - %struct.Foo = type { i32, i32, [10 x i32], i32 } - -define void @me(%struct.Foo* nocapture %Bar) nounwind { -entry: - br i1 false, label %return, label %bb.nph - -bb.nph: ; preds = %entry - br label %bb - -bb: ; preds = %bb1, %bb.nph - %i.01 = phi i64 [ %4, %bb1 ], [ 0, %bb.nph ] ; <i64> [#uses=3] - %0 = getelementptr %struct.Foo* %Bar, i64 %i.01, i32 2, i64 3 ; <i32*> [#uses=1] - %1 = load i32* %0, align 4 ; <i32> [#uses=1] - %2 = mul i32 %1, 113 ; <i32> [#uses=1] - %3 = getelementptr %struct.Foo* %Bar, i64 %i.01, i32 2, i64 3 ; <i32*> [#uses=1] - store i32 %2, i32* %3, align 4 - %4 = add i64 %i.01, 1 ; <i64> [#uses=2] - br label %bb1 - -bb1: ; preds = %bb - %phitmp = icmp sgt i64 %4, 19999 ; <i1> [#uses=1] - br i1 %phitmp, label %bb1.return_crit_edge, label %bb - -bb1.return_crit_edge: ; preds = %bb1 - br label %return - -return: ; preds = %bb1.return_crit_edge, %entry - ret void -} diff --git a/test/Transforms/IndVarSimplify/preserve-signed-wrap.ll b/test/Transforms/IndVarSimplify/preserve-signed-wrap.ll index 22e2092..f619e8d 100644 --- a/test/Transforms/IndVarSimplify/preserve-signed-wrap.ll +++ b/test/Transforms/IndVarSimplify/preserve-signed-wrap.ll @@ -1,5 +1,4 @@ ; RUN: opt < %s -indvars -S | FileCheck %s -; RUN: opt < %s -indvars -enable-iv-rewrite=false -S | FileCheck %s ; Indvars should insert a 64-bit induction variable to eliminate the ; sext for the addressing, however it shouldn't eliminate the sext diff --git a/test/Transforms/IndVarSimplify/variable-stride-ivs-0.ll b/test/Transforms/IndVarSimplify/variable-stride-ivs-0.ll index fc906cd..fb9ef22 100644 --- a/test/Transforms/IndVarSimplify/variable-stride-ivs-0.ll +++ b/test/Transforms/IndVarSimplify/variable-stride-ivs-0.ll @@ -1,5 +1,4 @@ ; RUN: opt < %s -indvars -instcombine -S | FileCheck %s -; RUN: opt < %s -indvars -enable-iv-rewrite=false -instcombine -S | FileCheck %s ; ; Test that -indvars can reduce variable stride IVs. If it can reduce variable ; stride iv's, it will make %iv. and %m.0.0 isomorphic to each other without diff --git a/test/Transforms/Inline/2008-09-02-AlwaysInline.ll b/test/Transforms/Inline/2008-09-02-AlwaysInline.ll deleted file mode 100644 index 39095c4..0000000 --- a/test/Transforms/Inline/2008-09-02-AlwaysInline.ll +++ /dev/null @@ -1,10 +0,0 @@ -; RUN: opt < %s -inline-threshold=0 -inline -S | not grep call - -define i32 @fn2() alwaysinline { - ret i32 1 -} - -define i32 @fn3() { - %r = call i32 @fn2() - ret i32 %r -} diff --git a/test/Transforms/Inline/2008-10-30-AlwaysInline.ll b/test/Transforms/Inline/2008-10-30-AlwaysInline.ll deleted file mode 100644 index 11e5012..0000000 --- a/test/Transforms/Inline/2008-10-30-AlwaysInline.ll +++ /dev/null @@ -1,14 +0,0 @@ -; RUN: opt < %s -always-inline -S | not grep call - -; Ensure that threshold doesn't disrupt always inline. -; RUN: opt < %s -inline-threshold=-2000000001 -always-inline -S | not grep call - - -define internal i32 @if0() alwaysinline { - ret i32 1 -} - -define i32 @f0() { - %r = call i32 @if0() - ret i32 %r -} diff --git a/test/Transforms/Inline/2008-11-04-AlwaysInline.ll b/test/Transforms/Inline/2008-11-04-AlwaysInline.ll deleted file mode 100644 index bc9787b..0000000 --- a/test/Transforms/Inline/2008-11-04-AlwaysInline.ll +++ /dev/null @@ -1,7 +0,0 @@ -; RUN: opt < %s -always-inline -S | grep {@foo} -; Ensure that foo is not removed by always inliner -; PR 2945 - -define internal i32 @foo() nounwind { - ret i32 0 -} diff --git a/test/Transforms/Inline/alloca-bonus.ll b/test/Transforms/Inline/alloca-bonus.ll index fb4062f..d04d54e 100644 --- a/test/Transforms/Inline/alloca-bonus.ll +++ b/test/Transforms/Inline/alloca-bonus.ll @@ -1,5 +1,7 @@ ; RUN: opt -inline < %s -S -o - -inline-threshold=8 | FileCheck %s +target datalayout = "p:32:32" + declare void @llvm.lifetime.start(i64 %size, i8* nocapture %ptr) @glbl = external global i32 @@ -15,8 +17,8 @@ define void @outer1() { define void @inner1(i32 *%ptr) { %A = load i32* %ptr store i32 0, i32* %ptr - %C = getelementptr i32* %ptr, i32 0 - %D = getelementptr i32* %ptr, i32 1 + %C = getelementptr inbounds i32* %ptr, i32 0 + %D = getelementptr inbounds i32* %ptr, i32 1 %E = bitcast i32* %ptr to i8* %F = select i1 false, i32* %ptr, i32* @glbl call void @llvm.lifetime.start(i64 0, i8* %E) @@ -35,8 +37,8 @@ define void @outer2() { define void @inner2(i32 *%ptr) { %A = load i32* %ptr store i32 0, i32* %ptr - %C = getelementptr i32* %ptr, i32 0 - %D = getelementptr i32* %ptr, i32 %A + %C = getelementptr inbounds i32* %ptr, i32 0 + %D = getelementptr inbounds i32* %ptr, i32 %A %E = bitcast i32* %ptr to i8* %F = select i1 false, i32* %ptr, i32* @glbl call void @llvm.lifetime.start(i64 0, i8* %E) @@ -90,12 +92,12 @@ define void @outer4(i32 %A) { ret void } -; %D poisons this call, scalar-repl can't handle that instruction. However, we +; %B poisons this call, scalar-repl can't handle that instruction. However, we ; still want to detect that the icmp and branch *can* be handled. define void @inner4(i32 *%ptr, i32 %A) { - %B = getelementptr i32* %ptr, i32 %A - %E = icmp eq i32* %ptr, null - br i1 %E, label %bb.true, label %bb.false + %B = getelementptr inbounds i32* %ptr, i32 %A + %C = icmp eq i32* %ptr, null + br i1 %C, label %bb.true, label %bb.false bb.true: ; This block musn't be counted in the inline cost. %t1 = load i32* %ptr @@ -122,3 +124,32 @@ bb.true: bb.false: ret void } + +define void @outer5() { +; CHECK: @outer5 +; CHECK-NOT: call void @inner5 + %ptr = alloca i32 + call void @inner5(i1 false, i32* %ptr) + ret void +} + +; %D poisons this call, scalar-repl can't handle that instruction. However, if +; the flag is set appropriately, the poisoning instruction is inside of dead +; code, and so shouldn't be counted. +define void @inner5(i1 %flag, i32 *%ptr) { + %A = load i32* %ptr + store i32 0, i32* %ptr + %C = getelementptr inbounds i32* %ptr, i32 0 + br i1 %flag, label %if.then, label %exit + +if.then: + %D = getelementptr inbounds i32* %ptr, i32 %A + %E = bitcast i32* %ptr to i8* + %F = select i1 false, i32* %ptr, i32* @glbl + call void @llvm.lifetime.start(i64 0, i8* %E) + ret void + +exit: + ret void +} + diff --git a/test/Transforms/Inline/always-inline.ll b/test/Transforms/Inline/always-inline.ll new file mode 100644 index 0000000..e0be41f --- /dev/null +++ b/test/Transforms/Inline/always-inline.ll @@ -0,0 +1,125 @@ +; RUN: opt < %s -inline-threshold=0 -always-inline -S | FileCheck %s +; +; Ensure the threshold has no impact on these decisions. +; RUN: opt < %s -inline-threshold=20000000 -always-inline -S | FileCheck %s +; RUN: opt < %s -inline-threshold=-20000000 -always-inline -S | FileCheck %s + +define i32 @inner1() alwaysinline { + ret i32 1 +} +define i32 @outer1() { +; CHECK: @outer1 +; CHECK-NOT: call +; CHECK: ret + + %r = call i32 @inner1() + ret i32 %r +} + +; The always inliner can't DCE internal functions. PR2945 +; CHECK: @pr2945 +define internal i32 @pr2945() nounwind { + ret i32 0 +} + +define internal void @inner2(i32 %N) alwaysinline { + %P = alloca i32, i32 %N + ret void +} +define void @outer2(i32 %N) { +; The always inliner (unlike the normal one) should be willing to inline +; a function with a dynamic alloca into one without a dynamic alloca. +; rdar://6655932 +; +; CHECK: @outer2 +; CHECK-NOT: call void @inner2 +; CHECK alloca i32, i32 %N +; CHECK-NOT: call void @inner2 +; CHECK: ret void + + call void @inner2( i32 %N ) + ret void +} + +declare i32 @a() returns_twice +declare i32 @b() returns_twice + +define i32 @inner3() alwaysinline { +entry: + %call = call i32 @a() returns_twice + %add = add nsw i32 1, %call + ret i32 %add +} +define i32 @outer3() { +entry: +; CHECK: @outer3 +; CHECK-NOT: call i32 @a +; CHECK: ret + + %call = call i32 @inner3() + %add = add nsw i32 1, %call + ret i32 %add +} + +define i32 @inner4() alwaysinline returns_twice { +entry: + %call = call i32 @b() returns_twice + %add = add nsw i32 1, %call + ret i32 %add +} + +define i32 @outer4() { +entry: +; CHECK: @outer4 +; CHECK: call i32 @b() +; CHECK: ret + + %call = call i32 @inner4() returns_twice + %add = add nsw i32 1, %call + ret i32 %add +} + +define i32 @inner5(i8* %addr) alwaysinline { +entry: + indirectbr i8* %addr, [ label %one, label %two ] + +one: + ret i32 42 + +two: + ret i32 44 +} +define i32 @outer5(i32 %x) { +; CHECK: @outer5 +; CHECK: call i32 @inner5 +; CHECK: ret + + %cmp = icmp slt i32 %x, 42 + %addr = select i1 %cmp, i8* blockaddress(@inner5, %one), i8* blockaddress(@inner5, %two) + %call = call i32 @inner5(i8* %addr) + ret i32 %call +} + +define void @inner6(i32 %x) alwaysinline { +entry: + %icmp = icmp slt i32 %x, 0 + br i1 %icmp, label %return, label %bb + +bb: + %sub = sub nsw i32 %x, 1 + call void @inner6(i32 %sub) + ret void + +return: + ret void +} +define void @outer6() { +; CHECK: @outer6 +; CHECK: call void @inner6(i32 42) +; CHECK: ret + +entry: + call void @inner6(i32 42) + ret void +} + diff --git a/test/Transforms/Inline/always_inline_dyn_alloca.ll b/test/Transforms/Inline/always_inline_dyn_alloca.ll deleted file mode 100644 index 25cfc49..0000000 --- a/test/Transforms/Inline/always_inline_dyn_alloca.ll +++ /dev/null @@ -1,15 +0,0 @@ -; RUN: opt < %s -inline -S | not grep callee -; rdar://6655932 - -; If callee is marked alwaysinline, inline it! Even if callee has dynamic -; alloca and caller does not, - -define internal void @callee(i32 %N) alwaysinline { - %P = alloca i32, i32 %N - ret void -} - -define void @foo(i32 %N) { - call void @callee( i32 %N ) - ret void -} diff --git a/test/Transforms/Inline/dynamic_alloca_test.ll b/test/Transforms/Inline/dynamic_alloca_test.ll index 0286535..15a5c66 100644 --- a/test/Transforms/Inline/dynamic_alloca_test.ll +++ b/test/Transforms/Inline/dynamic_alloca_test.ll @@ -3,33 +3,43 @@ ; Functions with dynamic allocas can only be inlined into functions that ; already have dynamic allocas. -; RUN: opt < %s -inline -S | \ -; RUN: grep llvm.stacksave -; RUN: opt < %s -inline -S | not grep callee - +; RUN: opt < %s -inline -S | FileCheck %s +; +; FIXME: This test is xfailed because the inline cost rewrite disabled *all* +; inlining of functions which contain a dynamic alloca. It should be re-enabled +; once that functionality is restored. +; XFAIL: * declare void @ext(i32*) define internal void @callee(i32 %N) { - %P = alloca i32, i32 %N ; <i32*> [#uses=1] - call void @ext( i32* %P ) - ret void + %P = alloca i32, i32 %N + call void @ext(i32* %P) + ret void } define void @foo(i32 %N) { -; <label>:0 - %P = alloca i32, i32 %N ; <i32*> [#uses=1] - call void @ext( i32* %P ) - br label %Loop - -Loop: ; preds = %Loop, %0 - %count = phi i32 [ 0, %0 ], [ %next, %Loop ] ; <i32> [#uses=2] - %next = add i32 %count, 1 ; <i32> [#uses=1] - call void @callee( i32 %N ) - %cond = icmp eq i32 %count, 100000 ; <i1> [#uses=1] - br i1 %cond, label %out, label %Loop - -out: ; preds = %Loop - ret void +; CHECK: @foo +; CHECK: alloca i32, i32 %{{.*}} +; CHECK: call i8* @llvm.stacksave() +; CHECK: alloca i32, i32 %{{.*}} +; CHECK: call void @ext +; CHECK: call void @llvm.stackrestore +; CHECK: ret + +entry: + %P = alloca i32, i32 %N + call void @ext(i32* %P) + br label %loop + +loop: + %count = phi i32 [ 0, %entry ], [ %next, %loop ] + %next = add i32 %count, 1 + call void @callee(i32 %N) + %cond = icmp eq i32 %count, 100000 + br i1 %cond, label %out, label %loop + +out: + ret void } diff --git a/test/Transforms/Inline/inline_cleanup.ll b/test/Transforms/Inline/inline_cleanup.ll index 4c64721..3898aa7 100644 --- a/test/Transforms/Inline/inline_cleanup.ll +++ b/test/Transforms/Inline/inline_cleanup.ll @@ -1,10 +1,8 @@ ; Test that the inliner doesn't leave around dead allocas, and that it folds ; uncond branches away after it is done specializing. -; RUN: opt < %s -inline -S | \ -; RUN: not grep {alloca.*uses=0} -; RUN: opt < %s -inline -S | \ -; RUN: not grep {br label} +; RUN: opt < %s -inline -S | FileCheck %s + @A = weak global i32 0 ; <i32*> [#uses=1] @B = weak global i32 0 ; <i32*> [#uses=1] @C = weak global i32 0 ; <i32*> [#uses=1] @@ -54,6 +52,18 @@ UnifiedReturnBlock: ; preds = %cond_next13 declare void @ext(i32*) define void @test() { +; CHECK: @test +; CHECK-NOT: ret +; +; FIXME: This should be a CHECK-NOT, but currently we have a bug that causes us +; to not nuke unused allocas. +; CHECK: alloca +; CHECK-NOT: ret +; +; No branches should survive the inliner's cleanup. +; CHECK-NOT: br +; CHECK: ret void + entry: tail call fastcc void @foo( i32 1 ) tail call fastcc void @foo( i32 2 ) @@ -61,3 +71,143 @@ entry: tail call fastcc void @foo( i32 8 ) ret void } + +declare void @f(i32 %x) + +define void @inner2(i32 %x, i32 %y, i32 %z, i1 %b) { +entry: + %cmp1 = icmp ne i32 %x, 0 + br i1 %cmp1, label %then1, label %end1 + +then1: + call void @f(i32 %x) + br label %end1 + +end1: + %x2 = and i32 %x, %z + %cmp2 = icmp sgt i32 %x2, 1 + br i1 %cmp2, label %then2, label %end2 + +then2: + call void @f(i32 %x2) + br label %end2 + +end2: + %y2 = or i32 %y, %z + %cmp3 = icmp sgt i32 %y2, 0 + br i1 %cmp3, label %then3, label %end3 + +then3: + call void @f(i32 %y2) + br label %end3 + +end3: + br i1 %b, label %end3.1, label %end3.2 + +end3.1: + %x3.1 = or i32 %x, 10 + br label %end3.3 + +end3.2: + %x3.2 = or i32 %x, 10 + br label %end3.3 + +end3.3: + %x3.3 = phi i32 [ %x3.1, %end3.1 ], [ %x3.2, %end3.2 ] + %cmp4 = icmp slt i32 %x3.3, 1 + br i1 %cmp4, label %then4, label %end4 + +then4: + call void @f(i32 %x3.3) + br label %end4 + +end4: + ret void +} + +define void @outer2(i32 %z, i1 %b) { +; Ensure that after inlining, none of the blocks with a call to @f actually +; make it through inlining. +; CHECK: define void @outer2 +; CHECK-NOT: call +; CHECK: ret void + +entry: + call void @inner2(i32 0, i32 -1, i32 %z, i1 %b) + ret void +} + +define void @PR12470_inner(i16 signext %p1) nounwind uwtable { +entry: + br i1 undef, label %cond.true, label %cond.false + +cond.true: + br label %cond.end + +cond.false: + %conv = sext i16 %p1 to i32 + br label %cond.end + +cond.end: + %cond = phi i32 [ undef, %cond.true ], [ 0, %cond.false ] + %tobool = icmp eq i32 %cond, 0 + br i1 %tobool, label %if.end5, label %if.then + +if.then: + ret void + +if.end5: + ret void +} + +define void @PR12470_outer() { +; This previously crashed during inliner cleanup and folding inner return +; instructions. Check that we don't crash and we produce a function with a single +; return instruction due to merging the returns of the inlined function. +; CHECK: define void @PR12470_outer +; CHECK-NOT: call +; CHECK: ret void +; CHECK-NOT: ret void +; CHECK: } + +entry: + call void @PR12470_inner(i16 signext 1) + ret void +} + +define void @crasher_inner() nounwind uwtable { +entry: + br i1 false, label %for.end28, label %for.body6 + +for.body6: + br i1 undef, label %for.body6, label %for.cond12.for.inc26_crit_edge + +for.cond12.for.inc26_crit_edge: + br label %for.body6.1 + +for.end28: + ret void + +for.body6.1: + br i1 undef, label %for.body6.1, label %for.cond12.for.inc26_crit_edge.1 + +for.cond12.for.inc26_crit_edge.1: + br label %for.body6.2 + +for.body6.2: + br i1 undef, label %for.body6.2, label %for.cond12.for.inc26_crit_edge.2 + +for.cond12.for.inc26_crit_edge.2: + br label %for.end28 +} + +define void @crasher_outer() { +; CHECK: @crasher_outer +; CHECK-NOT: call +; CHECK: ret void +; CHECK-NOT: ret +; CHECK: } +entry: + tail call void @crasher_inner() + ret void +} diff --git a/test/Transforms/Inline/inline_constprop.ll b/test/Transforms/Inline/inline_constprop.ll index cc7aaac..dc35b60 100644 --- a/test/Transforms/Inline/inline_constprop.ll +++ b/test/Transforms/Inline/inline_constprop.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -inline -S | FileCheck %s +; RUN: opt < %s -inline -inline-threshold=20 -S | FileCheck %s define internal i32 @callee1(i32 %A, i32 %B) { %C = sdiv i32 %A, %B @@ -14,17 +14,18 @@ define i32 @caller1() { } define i32 @caller2() { +; Check that we can constant-prop through instructions after inlining callee21 +; to get constants in the inlined callsite to callee22. +; FIXME: Currently, the threshold is fixed at 20 because we don't perform +; *recursive* cost analysis to realize that the nested call site will definitely +; inline and be cheap. We should eventually do that and lower the threshold here +; to 1. +; ; CHECK: @caller2 ; CHECK-NOT: call void @callee2 ; CHECK: ret -; We contrive to make this hard for *just* the inline pass to do in order to -; simulate what can actually happen with large, complex functions getting -; inlined. - %a = add i32 42, 0 - %b = add i32 48, 0 - - %x = call i32 @callee21(i32 %a, i32 %b) + %x = call i32 @callee21(i32 42, i32 48) ret i32 %x } @@ -41,49 +42,71 @@ define i32 @callee22(i32 %x) { br i1 %icmp, label %bb.true, label %bb.false bb.true: ; This block musn't be counted in the inline cost. - %ptr = call i8* @getptr() - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr - load volatile i8* %ptr + %x1 = add i32 %x, 1 + %x2 = add i32 %x1, 1 + %x3 = add i32 %x2, 1 + %x4 = add i32 %x3, 1 + %x5 = add i32 %x4, 1 + %x6 = add i32 %x5, 1 + %x7 = add i32 %x6, 1 + %x8 = add i32 %x7, 1 - ret i32 %x + ret i32 %x8 bb.false: ret i32 %x } + +define i32 @caller3() { +; Check that even if the expensive path is hidden behind several basic blocks, +; it doesn't count toward the inline cost when constant-prop proves those paths +; dead. +; +; CHECK: @caller3 +; CHECK-NOT: call +; CHECK: ret i32 6 + +entry: + %x = call i32 @callee3(i32 42, i32 48) + ret i32 %x +} + +define i32 @callee3(i32 %x, i32 %y) { + %sub = sub i32 %y, %x + %icmp = icmp ugt i32 %sub, 42 + br i1 %icmp, label %bb.true, label %bb.false + +bb.true: + %icmp2 = icmp ult i32 %sub, 64 + br i1 %icmp2, label %bb.true.true, label %bb.true.false + +bb.true.true: + ; This block musn't be counted in the inline cost. + %x1 = add i32 %x, 1 + %x2 = add i32 %x1, 1 + %x3 = add i32 %x2, 1 + %x4 = add i32 %x3, 1 + %x5 = add i32 %x4, 1 + %x6 = add i32 %x5, 1 + %x7 = add i32 %x6, 1 + %x8 = add i32 %x7, 1 + br label %bb.merge + +bb.true.false: + ; This block musn't be counted in the inline cost. + %y1 = add i32 %y, 1 + %y2 = add i32 %y1, 1 + %y3 = add i32 %y2, 1 + %y4 = add i32 %y3, 1 + %y5 = add i32 %y4, 1 + %y6 = add i32 %y5, 1 + %y7 = add i32 %y6, 1 + %y8 = add i32 %y7, 1 + br label %bb.merge + +bb.merge: + %result = phi i32 [ %x8, %bb.true.true ], [ %y8, %bb.true.false ] + ret i32 %result + +bb.false: + ret i32 %sub +} diff --git a/test/Transforms/Inline/noinline-recursive-fn.ll b/test/Transforms/Inline/noinline-recursive-fn.ll index d56b390..6cde0e2 100644 --- a/test/Transforms/Inline/noinline-recursive-fn.ll +++ b/test/Transforms/Inline/noinline-recursive-fn.ll @@ -71,3 +71,40 @@ entry: call void @f2(i32 123, i8* bitcast (void (i32, i8*, i8*)* @f1 to i8*), i8* bitcast (void (i32, i8*, i8*)* @f2 to i8*)) nounwind ssp ret void } + + +; Check that a recursive function, when called with a constant that makes the +; recursive path dead code can actually be inlined. +define i32 @fib(i32 %i) { +entry: + %is.zero = icmp eq i32 %i, 0 + br i1 %is.zero, label %zero.then, label %zero.else + +zero.then: + ret i32 0 + +zero.else: + %is.one = icmp eq i32 %i, 1 + br i1 %is.one, label %one.then, label %one.else + +one.then: + ret i32 1 + +one.else: + %i1 = sub i32 %i, 1 + %f1 = call i32 @fib(i32 %i1) + %i2 = sub i32 %i, 2 + %f2 = call i32 @fib(i32 %i2) + %f = add i32 %f1, %f2 + ret i32 %f +} + +define i32 @fib_caller() { +; CHECK: @fib_caller +; CHECK-NOT: call +; CHECK: ret + %f1 = call i32 @fib(i32 0) + %f2 = call i32 @fib(i32 1) + %result = add i32 %f1, %f2 + ret i32 %result +} diff --git a/test/Transforms/Inline/ptr-diff.ll b/test/Transforms/Inline/ptr-diff.ll index 0b431d6..60fc3e2 100644 --- a/test/Transforms/Inline/ptr-diff.ll +++ b/test/Transforms/Inline/ptr-diff.ll @@ -1,5 +1,7 @@ ; RUN: opt -inline < %s -S -o - -inline-threshold=10 | FileCheck %s +target datalayout = "p:32:32" + define i32 @outer1() { ; CHECK: @outer1 ; CHECK-NOT: call diff --git a/test/Transforms/InstCombine/alloca.ll b/test/Transforms/InstCombine/alloca.ll index e4d1367..ef7185c 100644 --- a/test/Transforms/InstCombine/alloca.ll +++ b/test/Transforms/InstCombine/alloca.ll @@ -44,3 +44,47 @@ define i32* @test4(i32 %n) { %A = alloca i32, i32 %n ret i32* %A } + +; Allocas which are only used by GEPs, bitcasts, and stores (transitively) +; should be deleted. +define void @test5() { +; CHECK: @test5 +; CHECK-NOT: alloca +; CHECK-NOT: store +; CHECK: ret + +entry: + %a = alloca { i32 } + %b = alloca i32* + %a.1 = getelementptr { i32 }* %a, i32 0, i32 0 + store i32 123, i32* %a.1 + store i32* %a.1, i32** %b + %b.1 = bitcast i32** %b to i32* + store i32 123, i32* %b.1 + %a.2 = getelementptr { i32 }* %a, i32 0, i32 0 + store atomic i32 2, i32* %a.2 unordered, align 4 + %a.3 = getelementptr { i32 }* %a, i32 0, i32 0 + store atomic i32 3, i32* %a.3 release, align 4 + %a.4 = getelementptr { i32 }* %a, i32 0, i32 0 + store atomic i32 4, i32* %a.4 seq_cst, align 4 + ret void +} + +declare void @f(i32* %p) + +; Check that we don't delete allocas in some erroneous cases. +define void @test6() { +; CHECK: @test6 +; CHECK-NOT: ret +; CHECK: alloca +; CHECK-NEXT: alloca +; CHECK: ret + +entry: + %a = alloca { i32 } + %b = alloca i32 + %a.1 = getelementptr { i32 }* %a, i32 0, i32 0 + store volatile i32 123, i32* %a.1 + tail call void @f(i32* %b) + ret void +} diff --git a/test/Transforms/InstCombine/apint-shift.ll b/test/Transforms/InstCombine/apint-shift.ll index 55243a6..0ea73a0 100644 --- a/test/Transforms/InstCombine/apint-shift.ll +++ b/test/Transforms/InstCombine/apint-shift.ll @@ -1,70 +1,93 @@ -; This test makes sure that shit instructions are properly eliminated +; This test makes sure that shift instructions are properly eliminated ; even with arbitrary precision integers. -; RUN: opt < %s -instcombine -S | not grep sh -; END. +; RUN: opt < %s -instcombine -S | FileCheck %s +; CHECK: @test1 +; CHECK-NOT: sh define i47 @test1(i47 %A) { %B = shl i47 %A, 0 ; <i47> [#uses=1] ret i47 %B } +; CHECK: @test2 +; CHECK-NOT: sh define i41 @test2(i7 %X) { %A = zext i7 %X to i41 ; <i41> [#uses=1] %B = shl i41 0, %A ; <i41> [#uses=1] ret i41 %B } +; CHECK: @test3 +; CHECK-NOT: sh define i41 @test3(i41 %A) { %B = ashr i41 %A, 0 ; <i41> [#uses=1] ret i41 %B } +; CHECK: @test4 +; CHECK-NOT: sh define i39 @test4(i7 %X) { %A = zext i7 %X to i39 ; <i39> [#uses=1] %B = ashr i39 0, %A ; <i39> [#uses=1] ret i39 %B } +; CHECK: @test5 +; CHECK-NOT: sh define i55 @test5(i55 %A) { %B = lshr i55 %A, 55 ; <i55> [#uses=1] ret i55 %B } +; CHECK: @test5a +; CHECK-NOT: sh define i32 @test5a(i32 %A) { %B = shl i32 %A, 32 ; <i32> [#uses=1] ret i32 %B } +; CHECK: @test6 +; CHECK-NOT: sh define i55 @test6(i55 %A) { %B = shl i55 %A, 1 ; <i55> [#uses=1] %C = mul i55 %B, 3 ; <i55> [#uses=1] ret i55 %C } +; CHECK: @test7 +; CHECK-NOT: sh define i29 @test7(i8 %X) { %A = zext i8 %X to i29 ; <i29> [#uses=1] %B = ashr i29 -1, %A ; <i29> [#uses=1] ret i29 %B } +; CHECK: @test8 +; CHECK-NOT: sh define i7 @test8(i7 %A) { %B = shl i7 %A, 4 ; <i7> [#uses=1] %C = shl i7 %B, 3 ; <i7> [#uses=1] ret i7 %C } +; CHECK: @test9 +; CHECK-NOT: sh define i17 @test9(i17 %A) { %B = shl i17 %A, 16 ; <i17> [#uses=1] %C = lshr i17 %B, 16 ; <i17> [#uses=1] ret i17 %C } +; CHECK: @test10 +; CHECK-NOT: sh define i19 @test10(i19 %A) { %B = lshr i19 %A, 18 ; <i19> [#uses=1] %C = shl i19 %B, 18 ; <i19> [#uses=1] ret i19 %C } +; CHECK: @test11 +; CHECK-NOT: sh define i23 @test11(i23 %A) { %a = mul i23 %A, 3 ; <i23> [#uses=1] %B = lshr i23 %a, 11 ; <i23> [#uses=1] @@ -72,12 +95,16 @@ define i23 @test11(i23 %A) { ret i23 %C } +; CHECK: @test12 +; CHECK-NOT: sh define i47 @test12(i47 %A) { %B = ashr i47 %A, 8 ; <i47> [#uses=1] %C = shl i47 %B, 8 ; <i47> [#uses=1] ret i47 %C } +; CHECK: @test13 +; CHECK-NOT: sh define i18 @test13(i18 %A) { %a = mul i18 %A, 3 ; <i18> [#uses=1] %B = ashr i18 %a, 8 ; <i18> [#uses=1] @@ -85,6 +112,8 @@ define i18 @test13(i18 %A) { ret i18 %C } +; CHECK: @test14 +; CHECK-NOT: sh define i35 @test14(i35 %A) { %B = lshr i35 %A, 4 ; <i35> [#uses=1] %C = or i35 %B, 1234 ; <i35> [#uses=1] @@ -92,6 +121,8 @@ define i35 @test14(i35 %A) { ret i35 %D } +; CHECK: @test14a +; CHECK-NOT: sh define i79 @test14a(i79 %A) { %B = shl i79 %A, 4 ; <i79> [#uses=1] %C = and i79 %B, 1234 ; <i79> [#uses=1] @@ -99,12 +130,16 @@ define i79 @test14a(i79 %A) { ret i79 %D } +; CHECK: @test15 +; CHECK-NOT: sh define i45 @test15(i1 %C) { %A = select i1 %C, i45 3, i45 1 ; <i45> [#uses=1] %V = shl i45 %A, 2 ; <i45> [#uses=1] ret i45 %V } +; CHECK: @test15a +; CHECK-NOT: sh define i53 @test15a(i1 %X) { %A = select i1 %X, i8 3, i8 1 ; <i8> [#uses=1] %B = zext i8 %A to i53 ; <i53> [#uses=1] @@ -112,6 +147,8 @@ define i53 @test15a(i1 %X) { ret i53 %V } +; CHECK: @test16 +; CHECK-NOT: sh define i1 @test16(i84 %X) { %tmp.3 = ashr i84 %X, 4 ; <i84> [#uses=1] %tmp.6 = and i84 %tmp.3, 1 ; <i84> [#uses=1] @@ -119,48 +156,64 @@ define i1 @test16(i84 %X) { ret i1 %tmp.7 } +; CHECK: @test17 +; CHECK-NOT: sh define i1 @test17(i106 %A) { %B = lshr i106 %A, 3 ; <i106> [#uses=1] %C = icmp eq i106 %B, 1234 ; <i1> [#uses=1] ret i1 %C } +; CHECK: @test18 +; CHECK-NOT: sh define i1 @test18(i11 %A) { %B = lshr i11 %A, 10 ; <i11> [#uses=1] %C = icmp eq i11 %B, 123 ; <i1> [#uses=1] ret i1 %C } +; CHECK: @test19 +; CHECK-NOT: sh define i1 @test19(i37 %A) { %B = ashr i37 %A, 2 ; <i37> [#uses=1] %C = icmp eq i37 %B, 0 ; <i1> [#uses=1] ret i1 %C } +; CHECK: @test19a +; CHECK-NOT: sh define i1 @test19a(i39 %A) { %B = ashr i39 %A, 2 ; <i39> [#uses=1] %C = icmp eq i39 %B, -1 ; <i1> [#uses=1] ret i1 %C } +; CHECK: @test20 +; CHECK-NOT: sh define i1 @test20(i13 %A) { %B = ashr i13 %A, 12 ; <i13> [#uses=1] %C = icmp eq i13 %B, 123 ; <i1> [#uses=1] ret i1 %C } +; CHECK: @test21 +; CHECK-NOT: sh define i1 @test21(i12 %A) { %B = shl i12 %A, 6 ; <i12> [#uses=1] %C = icmp eq i12 %B, -128 ; <i1> [#uses=1] ret i1 %C } +; CHECK: @test22 +; CHECK-NOT: sh define i1 @test22(i14 %A) { %B = shl i14 %A, 7 ; <i14> [#uses=1] %C = icmp eq i14 %B, 0 ; <i1> [#uses=1] ret i1 %C } +; CHECK: @test23 +; CHECK-NOT: sh define i11 @test23(i44 %A) { %B = shl i44 %A, 33 ; <i44> [#uses=1] %C = ashr i44 %B, 33 ; <i44> [#uses=1] @@ -168,6 +221,8 @@ define i11 @test23(i44 %A) { ret i11 %D } +; CHECK: @test25 +; CHECK-NOT: sh define i37 @test25(i37 %tmp.2, i37 %AA) { %x = lshr i37 %AA, 17 ; <i37> [#uses=1] %tmp.3 = lshr i37 %tmp.2, 17 ; <i37> [#uses=1] @@ -176,6 +231,8 @@ define i37 @test25(i37 %tmp.2, i37 %AA) { ret i37 %tmp.6 } +; CHECK: @test26 +; CHECK-NOT: sh define i40 @test26(i40 %A) { %B = lshr i40 %A, 1 ; <i40> [#uses=1] %C = bitcast i40 %B to i40 ; <i40> [#uses=1] diff --git a/test/Transforms/InstCombine/apint-shl-trunc.ll b/test/Transforms/InstCombine/apint-shl-trunc.ll index 8163e6d..f2dc7d5 100644 --- a/test/Transforms/InstCombine/apint-shl-trunc.ll +++ b/test/Transforms/InstCombine/apint-shl-trunc.ll @@ -1,13 +1,24 @@ -; RUN: opt < %s -instcombine -S | grep shl -; END. +; RUN: opt < %s -instcombine -S | FileCheck %s define i1 @test0(i39 %X, i39 %A) { +; CHECK: @test0 +; CHECK: %[[V1:.*]] = shl i39 1, %A +; CHECK: %[[V2:.*]] = and i39 %[[V1]], %X +; CHECK: %[[V3:.*]] = icmp ne i39 %[[V2]], 0 +; CHECK: ret i1 %[[V3]] + %B = lshr i39 %X, %A %D = trunc i39 %B to i1 ret i1 %D } define i1 @test1(i799 %X, i799 %A) { +; CHECK: @test1 +; CHECK: %[[V1:.*]] = shl i799 1, %A +; CHECK: %[[V2:.*]] = and i799 %[[V1]], %X +; CHECK: %[[V3:.*]] = icmp ne i799 %[[V2]], 0 +; CHECK: ret i1 %[[V3]] + %B = lshr i799 %X, %A %D = trunc i799 %B to i1 ret i1 %D diff --git a/test/Transforms/InstCombine/pr12251.ll b/test/Transforms/InstCombine/pr12251.ll new file mode 100644 index 0000000..74a41eb --- /dev/null +++ b/test/Transforms/InstCombine/pr12251.ll @@ -0,0 +1,15 @@ +; RUN: opt < %s -instcombine -S | FileCheck %s + +define zeroext i1 @_Z3fooPb(i8* nocapture %x) { +entry: + %a = load i8* %x, align 1, !range !0 + %b = and i8 %a, 1 + %tobool = icmp ne i8 %b, 0 + ret i1 %tobool +} + +; CHECK: %a = load i8* %x, align 1, !range !0 +; CHECK-NEXT: %tobool = icmp ne i8 %a, 0 +; CHECK-NEXT: ret i1 %tobool + +!0 = metadata !{i8 0, i8 2} diff --git a/test/Transforms/InstSimplify/compare.ll b/test/Transforms/InstSimplify/compare.ll index e15bfaa..ced74bd 100644 --- a/test/Transforms/InstSimplify/compare.ll +++ b/test/Transforms/InstSimplify/compare.ll @@ -103,6 +103,68 @@ define i1 @gep8(%gept* %x) { ; CHECK: ret i1 %equal } +define i1 @gep9(i8* %ptr) { +; CHECK: @gep9 +; CHECK-NOT: ret +; CHECK: ret i1 true + +entry: + %first1 = getelementptr inbounds i8* %ptr, i32 0 + %first2 = getelementptr inbounds i8* %first1, i32 1 + %first3 = getelementptr inbounds i8* %first2, i32 2 + %first4 = getelementptr inbounds i8* %first3, i32 4 + %last1 = getelementptr inbounds i8* %first2, i32 48 + %last2 = getelementptr inbounds i8* %last1, i32 8 + %last3 = getelementptr inbounds i8* %last2, i32 -4 + %last4 = getelementptr inbounds i8* %last3, i32 -4 + %first.int = ptrtoint i8* %first4 to i32 + %last.int = ptrtoint i8* %last4 to i32 + %cmp = icmp ne i32 %last.int, %first.int + ret i1 %cmp +} + +define i1 @gep10(i8* %ptr) { +; CHECK: @gep10 +; CHECK-NOT: ret +; CHECK: ret i1 true + +entry: + %first1 = getelementptr inbounds i8* %ptr, i32 -2 + %first2 = getelementptr inbounds i8* %first1, i32 44 + %last1 = getelementptr inbounds i8* %ptr, i32 48 + %last2 = getelementptr inbounds i8* %last1, i32 -6 + %first.int = ptrtoint i8* %first2 to i32 + %last.int = ptrtoint i8* %last2 to i32 + %cmp = icmp eq i32 %last.int, %first.int + ret i1 %cmp +} + +define i1 @gep11(i8* %ptr) { +; CHECK: @gep11 +; CHECK-NOT: ret +; CHECK: ret i1 true + +entry: + %first1 = getelementptr inbounds i8* %ptr, i32 -2 + %last1 = getelementptr inbounds i8* %ptr, i32 48 + %last2 = getelementptr inbounds i8* %last1, i32 -6 + %cmp = icmp ult i8* %first1, %last2 + ret i1 %cmp +} + +define i1 @gep12(i8* %ptr) { +; CHECK: @gep12 +; CHECK-NOT: ret +; CHECK: ret i1 %cmp + +entry: + %first1 = getelementptr inbounds i8* %ptr, i32 -2 + %last1 = getelementptr inbounds i8* %ptr, i32 48 + %last2 = getelementptr inbounds i8* %last1, i32 -6 + %cmp = icmp slt i8* %first1, %last2 + ret i1 %cmp +} + define i1 @zext(i32 %x) { ; CHECK: @zext %e1 = zext i32 %x to i64 diff --git a/test/Transforms/InstSimplify/ptr_diff.ll b/test/Transforms/InstSimplify/ptr_diff.ll index 013964c..1eb1fd4 100644 --- a/test/Transforms/InstSimplify/ptr_diff.ll +++ b/test/Transforms/InstSimplify/ptr_diff.ll @@ -6,8 +6,8 @@ define i64 @ptrdiff1(i8* %ptr) { ; CHECK: @ptrdiff1 ; CHECK-NEXT: ret i64 42 - %first = getelementptr i8* %ptr, i32 0 - %last = getelementptr i8* %ptr, i32 42 + %first = getelementptr inbounds i8* %ptr, i32 0 + %last = getelementptr inbounds i8* %ptr, i32 42 %first.int = ptrtoint i8* %first to i64 %last.int = ptrtoint i8* %last to i64 %diff = sub i64 %last.int, %first.int @@ -18,16 +18,31 @@ define i64 @ptrdiff2(i8* %ptr) { ; CHECK: @ptrdiff2 ; CHECK-NEXT: ret i64 42 - %first1 = getelementptr i8* %ptr, i32 0 - %first2 = getelementptr i8* %first1, i32 1 - %first3 = getelementptr i8* %first2, i32 2 - %first4 = getelementptr i8* %first3, i32 4 - %last1 = getelementptr i8* %first2, i32 48 - %last2 = getelementptr i8* %last1, i32 8 - %last3 = getelementptr i8* %last2, i32 -4 - %last4 = getelementptr i8* %last3, i32 -4 + %first1 = getelementptr inbounds i8* %ptr, i32 0 + %first2 = getelementptr inbounds i8* %first1, i32 1 + %first3 = getelementptr inbounds i8* %first2, i32 2 + %first4 = getelementptr inbounds i8* %first3, i32 4 + %last1 = getelementptr inbounds i8* %first2, i32 48 + %last2 = getelementptr inbounds i8* %last1, i32 8 + %last3 = getelementptr inbounds i8* %last2, i32 -4 + %last4 = getelementptr inbounds i8* %last3, i32 -4 %first.int = ptrtoint i8* %first4 to i64 %last.int = ptrtoint i8* %last4 to i64 %diff = sub i64 %last.int, %first.int ret i64 %diff } + +define i64 @ptrdiff3(i8* %ptr) { +; Don't bother with non-inbounds GEPs. +; CHECK: @ptrdiff3 +; CHECK: getelementptr +; CHECK: sub +; CHECK: ret + + %first = getelementptr i8* %ptr, i32 0 + %last = getelementptr i8* %ptr, i32 42 + %first.int = ptrtoint i8* %first to i64 + %last.int = ptrtoint i8* %last to i64 + %diff = sub i64 %last.int, %first.int + ret i64 %diff +} diff --git a/test/Transforms/LoopRotate/dbgvalue.ll b/test/Transforms/LoopRotate/dbgvalue.ll index 9287178..b32ee82 100644 --- a/test/Transforms/LoopRotate/dbgvalue.ll +++ b/test/Transforms/LoopRotate/dbgvalue.ll @@ -1,11 +1,13 @@ ; RUN: opt -S -loop-rotate %s | FileCheck %s -; CHECK: entry -; CHECK-NEXT: call void @llvm.dbg.value(metadata !{i32 %x} - declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone define i32 @tak(i32 %x, i32 %y, i32 %z) nounwind ssp { +; CHECK: define i32 @tak +; CHECK: entry +; CHECK-NEXT: call void @llvm.dbg.value(metadata !{i32 %x} + entry: br label %tailrecurse @@ -35,7 +37,45 @@ return: ; preds = %if.end ret i32 %z.tr, !dbg !17 } -declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone +@channelColumns = external global i64 +@horzPlane = external global i8*, align 8 + +define void @FindFreeHorzSeg(i64 %startCol, i64 %row, i64* %rowStart) { +; Ensure that the loop increment basic block is rotated into the tail of the +; body, even though it contains a debug intrinsic call. +; CHECK: define void @FindFreeHorzSeg +; CHECK: %dec = add +; CHECK-NEXT: tail call void @llvm.dbg.value +; CHECK-NEXT: br i1 %tobool, label %for.cond, label %for.end + +entry: + br label %for.cond + +for.cond: + %i.0 = phi i64 [ %startCol, %entry ], [ %dec, %for.inc ] + %cmp = icmp eq i64 %i.0, 0 + br i1 %cmp, label %for.end, label %for.body + +for.body: + %0 = load i64* @channelColumns, align 8 + %mul = mul i64 %0, %row + %add = add i64 %mul, %i.0 + %1 = load i8** @horzPlane, align 8 + %arrayidx = getelementptr inbounds i8* %1, i64 %add + %2 = load i8* %arrayidx, align 1 + %tobool = icmp eq i8 %2, 0 + br i1 %tobool, label %for.inc, label %for.end + +for.inc: + %dec = add i64 %i.0, -1 + tail call void @llvm.dbg.value(metadata !{i64 %dec}, i64 0, metadata undef) + br label %for.cond + +for.end: + %add1 = add i64 %i.0, 1 + store i64 %add1, i64* %rowStart, align 8 + ret void +} !llvm.dbg.sp = !{!0} diff --git a/test/Transforms/LoopStrengthReduce/2012-03-26-constexpr.ll b/test/Transforms/LoopStrengthReduce/2012-03-26-constexpr.ll new file mode 100644 index 0000000..c9b11a9 --- /dev/null +++ b/test/Transforms/LoopStrengthReduce/2012-03-26-constexpr.ll @@ -0,0 +1,49 @@ +; RUN: opt < %s -loop-reduce -S +; PR11950: isHighCostExpansion crashes on ConstExpr +; +; The crash happened during IVChain analysis (CollectChains). We don't +; really care how LSR decides to transform this loop, so we don't +; check it. As long as the analysis doesn't crash we're ok. +target datalayout = "e-p:64:64:64-n32:64" + +%struct.this_structure_s.0.5 = type { [6144 x [8 x i32]], [6144 x [8 x i32]], [6147 x [4 x i32]], [8 x i32], [2 x i8*], [2 x i8*], [6144 x i8], [6144 x i32], [6144 x i32], [4 x [4 x i8]] } + +define internal fastcc void @someFunction(%struct.this_structure_s.0.5* nocapture %scratch, i32 %stage, i32 %cbSize) nounwind { +entry: + %0 = getelementptr inbounds %struct.this_structure_s.0.5* %scratch, i32 0, i32 4, i32 %stage + %1 = load i8** %0, align 4 + %2 = getelementptr inbounds %struct.this_structure_s.0.5* %scratch, i32 0, i32 5, i32 %stage + %3 = load i8** %2, align 4 + %4 = getelementptr inbounds %struct.this_structure_s.0.5* %scratch, i32 0, i32 2, i32 0, i32 0 + %tmp11 = shl i32 %stage, 1 + %tmp1325 = or i32 %tmp11, 1 + br label %__label_D_1608 + +__label_D_1608: ; preds = %__label_D_1608, %entry + %i.12 = phi i32 [ 0, %entry ], [ %10, %__label_D_1608 ] + %tmp = shl i32 %i.12, 2 + %lvar_g.13 = getelementptr i32* %4, i32 %tmp + %tmp626 = or i32 %tmp, 1 + %scevgep = getelementptr i32* %4, i32 %tmp626 + %tmp727 = or i32 %tmp, 2 + %scevgep8 = getelementptr i32* %4, i32 %tmp727 + %tmp928 = or i32 %tmp, 3 + %scevgep10 = getelementptr i32* %4, i32 %tmp928 + %scevgep12 = getelementptr %struct.this_structure_s.0.5* %scratch, i32 0, i32 9, i32 %tmp11, i32 %i.12 + %scevgep14 = getelementptr %struct.this_structure_s.0.5* %scratch, i32 0, i32 9, i32 %tmp1325, i32 %i.12 + %5 = load i8* %scevgep12, align 1 + %6 = sext i8 %5 to i32 + %7 = load i8* %scevgep14, align 1 + %8 = sext i8 %7 to i32 + store i32 0, i32* %lvar_g.13, align 4 + store i32 %8, i32* %scevgep, align 4 + store i32 %6, i32* %scevgep8, align 4 + %9 = add nsw i32 %8, %6 + store i32 %9, i32* %scevgep10, align 4 + %10 = add nsw i32 %i.12, 1 + %exitcond = icmp eq i32 %10, 3 + br i1 %exitcond, label %return, label %__label_D_1608 + +return: ; preds = %__label_D_1608 + ret void +} diff --git a/test/Transforms/LoopStrengthReduce/ARM/lit.local.cfg b/test/Transforms/LoopStrengthReduce/ARM/lit.local.cfg index d622529..bac2ffa 100644 --- a/test/Transforms/LoopStrengthReduce/ARM/lit.local.cfg +++ b/test/Transforms/LoopStrengthReduce/ARM/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'ARM' in targets: config.unsupported = True diff --git a/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll b/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll index 2dcaab8..ed32ca8 100644 --- a/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll +++ b/test/Transforms/LoopStrengthReduce/X86/2012-01-13-phielim.ll @@ -61,7 +61,7 @@ exit: ; preds = %cond.true29.i, %cond.true.i ; CHECK: @test2 ; CHECK: %entry ; CHECK-NOT: mov -; CHECK: jne +; CHECK: je define void @test2(i32 %n) nounwind uwtable { entry: br i1 undef, label %while.end, label %for.cond468 diff --git a/test/Transforms/LoopStrengthReduce/X86/lit.local.cfg b/test/Transforms/LoopStrengthReduce/X86/lit.local.cfg index 84bd88c..da2db5a 100644 --- a/test/Transforms/LoopStrengthReduce/X86/lit.local.cfg +++ b/test/Transforms/LoopStrengthReduce/X86/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'X86' in targets: config.unsupported = True diff --git a/test/Transforms/IndVarSimplify/addrec-gep.ll b/test/Transforms/LoopStrengthReduce/addrec-gep.ll index b62d093..3e4e369 100644 --- a/test/Transforms/IndVarSimplify/addrec-gep.ll +++ b/test/Transforms/LoopStrengthReduce/addrec-gep.ll @@ -1,13 +1,17 @@ -; RUN: opt < %s -indvars -S -enable-iv-rewrite | FileCheck %s -; CHECK: getelementptr -; CHECK: mul {{.*}}, 37 -; CHECK: add {{.*}}, 5203 +; RUN: opt < %s -loop-reduce -S | FileCheck %s +; CHECK: bb1: +; CHECK: load double* [[IV:%[^,]+]] +; CHECK: store double {{.*}}, double* [[IV]] +; CHECK: getelementptr double* ; CHECK-NOT: cast +; CHECK: br {{.*}} label %bb1 ; This test tests several things. The load and store should use the ; same address instead of having it computed twice, and SCEVExpander should ; be able to reconstruct the full getelementptr, despite it having a few ; obstacles set in its way. +; We only check that the inner loop (bb1-bb2) is "reduced" because LSR +; currently only operates on inner loops. target datalayout = "e-p:64:64:64-n32:64" diff --git a/test/Transforms/IndVarSimplify/preserve-gep-loop-variant.ll b/test/Transforms/LoopStrengthReduce/preserve-gep-loop-variant.ll index 251d34e..f90d030 100644 --- a/test/Transforms/IndVarSimplify/preserve-gep-loop-variant.ll +++ b/test/Transforms/LoopStrengthReduce/preserve-gep-loop-variant.ll @@ -1,4 +1,4 @@ -; RUN: opt < %s -indvars -S -enable-iv-rewrite | FileCheck %s +; RUN: opt < %s -loop-reduce -S | FileCheck %s ; CHECK-NOT: {{inttoptr|ptrtoint}} ; CHECK: scevgep ; CHECK-NOT: {{inttoptr|ptrtoint}} diff --git a/test/Transforms/LoopUnroll/2011-08-09-IVSimplify.ll b/test/Transforms/LoopUnroll/2011-08-09-IVSimplify.ll index 59551d5..a43a4ff 100644 --- a/test/Transforms/LoopUnroll/2011-08-09-IVSimplify.ll +++ b/test/Transforms/LoopUnroll/2011-08-09-IVSimplify.ll @@ -1,4 +1,4 @@ -; RUN: opt -S < %s -loop-unroll -unroll-count=4 -enable-iv-rewrite=false | FileCheck %s +; RUN: opt -S < %s -loop-unroll -unroll-count=4 | FileCheck %s ; ; Test induction variable simplify after loop unrolling. It should ; expose nice opportunities for GVN. diff --git a/test/Transforms/LoopUnroll/2012-04-09-unroll-indirectbr.ll b/test/Transforms/LoopUnroll/2012-04-09-unroll-indirectbr.ll new file mode 100644 index 0000000..8946a23 --- /dev/null +++ b/test/Transforms/LoopUnroll/2012-04-09-unroll-indirectbr.ll @@ -0,0 +1,40 @@ +; RUN: opt < %s -S -loop-unroll -simplifycfg | FileCheck %s +; PR12513: Loop unrolling breaks with indirect branches. +; If loop unrolling attempts to transform this loop, it replaces the +; indirectbr successors. SimplifyCFG then considers them to be unreachable. +declare void @subtract() nounwind uwtable + +; CHECK-NOT: unreachable +define i32 @main(i32 %argc, i8** nocapture %argv) nounwind uwtable { +entry: + %vals19 = alloca [5 x i32], align 16 + %x20 = alloca i32, align 4 + store i32 135, i32* %x20, align 4 + br label %for.body + +for.body: ; preds = ; %call2_termjoin, %call3_termjoin + %indvars.iv = phi i64 [ 0, %entry ], [ %joinphi15.in.in, %call2_termjoin ] + %a6 = call coldcc i8* @funca(i8* blockaddress(@main, %for.body_code), i8* +blockaddress(@main, %for.body_codeprime)) nounwind + indirectbr i8* %a6, [label %for.body_code, label %for.body_codeprime] + +for.body_code: ; preds = %for.body + call void @subtract() + br label %call2_termjoin + +call2_termjoin: ; preds = %for.body_codeprime, %for.body_code + %joinphi15.in.in = add i64 %indvars.iv, 1 + %exitcond = icmp eq i64 %joinphi15.in.in, 5 + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %call2_termjoin + ret i32 0 + +for.body_codeprime: ; preds = %for.body + call void @subtract_v2(i64 %indvars.iv) + br label %call2_termjoin +} + +declare coldcc i8* @funca(i8*, i8*) readonly + +declare void @subtract_v2(i64) nounwind uwtable diff --git a/test/Transforms/LoopUnroll/partial-unroll-optsize.ll b/test/Transforms/LoopUnroll/partial-unroll-optsize.ll new file mode 100644 index 0000000..3179d55 --- /dev/null +++ b/test/Transforms/LoopUnroll/partial-unroll-optsize.ll @@ -0,0 +1,35 @@ +; RUN: opt < %s -S -loop-unroll -unroll-allow-partial | FileCheck %s +; Loop size = 3, when the function has the optsize attribute, the +; OptSizeUnrollThreshold, i.e. 50, is used, hence the loop should be unrolled +; by 16 times because 3 * 16 < 50. +define void @unroll_opt_for_size() nounwind optsize { +entry: + br label %loop + +loop: + %iv = phi i32 [ 0, %entry ], [ %inc, %loop ] + %inc = add i32 %iv, 1 + %exitcnd = icmp uge i32 %inc, 1024 + br i1 %exitcnd, label %exit, label %loop + +exit: + ret void +} + +; CHECK: add +; CHECK-NEXT: add +; CHECK-NEXT: add +; CHECK-NEXT: add +; CHECK-NEXT: add +; CHECK-NEXT: add +; CHECK-NEXT: add +; CHECK-NEXT: add +; CHECK-NEXT: add +; CHECK-NEXT: add +; CHECK-NEXT: add +; CHECK-NEXT: add +; CHECK-NEXT: add +; CHECK-NEXT: add +; CHECK-NEXT: add +; CHECK-NEXT: add +; CHECK-NEXT: icmp diff --git a/test/Transforms/LoopUnswitch/2012-04-02-IndirectBr.ll b/test/Transforms/LoopUnswitch/2012-04-02-IndirectBr.ll new file mode 100644 index 0000000..c92f0a2 --- /dev/null +++ b/test/Transforms/LoopUnswitch/2012-04-02-IndirectBr.ll @@ -0,0 +1,41 @@ +; RUN: opt < %s -S -loop-unswitch -verify-loop-info -verify-dom-info | FileCheck %s +; PR12343: -loop-unswitch crash on indirect branch + +; CHECK: %0 = icmp eq i64 undef, 0 +; CHECK-NEXT: br i1 %0, label %"5", label %"4" + +; CHECK: "5": ; preds = %entry +; CHECK-NEXT: br label %"16" + +; CHECK: "16": ; preds = %"22", %"5" +; CHECK-NEXT: indirectbr i8* undef, [label %"22", label %"33"] + +; CHECK: "22": ; preds = %"16" +; CHECK-NEXT: br i1 %0, label %"16", label %"26" + +; CHECK: "26": ; preds = %"22" +; CHECK-NEXT: unreachable + +define void @foo() { +entry: + %0 = icmp eq i64 undef, 0 + br i1 %0, label %"5", label %"4" + +"4": ; preds = %entry + unreachable + +"5": ; preds = %entry + br label %"16" + +"16": ; preds = %"22", %"5" + indirectbr i8* undef, [label %"22", label %"33"] + +"22": ; preds = %"16" + br i1 %0, label %"16", label %"26" + +"26": ; preds = %"22" + unreachable + +"33": ; preds = %"16" + unreachable +} diff --git a/test/Transforms/ObjCARC/basic.ll b/test/Transforms/ObjCARC/basic.ll index 08bd8c0..ba2f778 100644 --- a/test/Transforms/ObjCARC/basic.ll +++ b/test/Transforms/ObjCARC/basic.ll @@ -3,10 +3,12 @@ target datalayout = "e-p:64:64:64" declare i8* @objc_retain(i8*) +declare i8* @objc_retainAutoreleasedReturnValue(i8*) declare void @objc_release(i8*) declare i8* @objc_autorelease(i8*) +declare i8* @objc_autoreleaseReturnValue(i8*) declare void @objc_autoreleasePoolPop(i8*) -declare void @objc_autoreleasePoolPush() +declare i8* @objc_autoreleasePoolPush() declare i8* @objc_retainBlock(i8*) declare i8* @objc_retainedObject(i8*) @@ -526,7 +528,7 @@ entry: define void @test13d(i8* %x, i64 %n) { entry: call i8* @objc_retain(i8* %x) nounwind - call void @objc_autoreleasePoolPush() + call i8* @objc_autoreleasePoolPush() call i8* @objc_retain(i8* %x) nounwind call void @use_pointer(i8* %x) call void @use_pointer(i8* %x) @@ -1400,7 +1402,7 @@ entry: ; CHECK-NEXT: call i8* @objc_autorelease(i8* %p) ; CHECK-NEXT: call void @use_pointer(i8* %p) ; CHECK-NEXT: call void @use_pointer(i8* %p) -; CHECK-NEXT: call void @objc_autoreleasePoolPush() +; CHECK-NEXT: call i8* @objc_autoreleasePoolPush() ; CHECK-NEXT: ret void ; CHECK-NEXT: } define void @test43b(i8* %p) { @@ -1410,7 +1412,7 @@ entry: call i8* @objc_retain(i8* %p) call void @use_pointer(i8* %p) call void @use_pointer(i8* %p) - call void @objc_autoreleasePoolPush() + call i8* @objc_autoreleasePoolPush() call void @objc_release(i8* %p) ret void } @@ -1797,6 +1799,78 @@ exit: ret void } +; Move an autorelease past a phi with a null. + +; CHECK: define i8* @test65( +; CHECK: if.then: +; CHECK: call i8* @objc_autorelease( +; CHECK: return: +; CHECK-NOT: @objc_autorelease +; CHECK: } +define i8* @test65(i1 %x) { +entry: + br i1 %x, label %return, label %if.then + +if.then: ; preds = %entry + %c = call i8* @returner() + %s = call i8* @objc_retainAutoreleasedReturnValue(i8* %c) nounwind + br label %return + +return: ; preds = %if.then, %entry + %retval = phi i8* [ %s, %if.then ], [ null, %entry ] + %q = call i8* @objc_autorelease(i8* %retval) nounwind + ret i8* %retval +} + +; Don't move an autorelease past an autorelease pool boundary. + +; CHECK: define i8* @test65b( +; CHECK: if.then: +; CHECK-NOT: @objc_autorelease +; CHECK: return: +; CHECK: call i8* @objc_autorelease( +; CHECK: } +define i8* @test65b(i1 %x) { +entry: + %t = call i8* @objc_autoreleasePoolPush() + br i1 %x, label %return, label %if.then + +if.then: ; preds = %entry + %c = call i8* @returner() + %s = call i8* @objc_retainAutoreleasedReturnValue(i8* %c) nounwind + br label %return + +return: ; preds = %if.then, %entry + %retval = phi i8* [ %s, %if.then ], [ null, %entry ] + call void @objc_autoreleasePoolPop(i8* %t) + %q = call i8* @objc_autorelease(i8* %retval) nounwind + ret i8* %retval +} + +; Don't move an autoreleaseReuturnValue, which would break +; the RV optimization. + +; CHECK: define i8* @test65c( +; CHECK: if.then: +; CHECK-NOT: @objc_autorelease +; CHECK: return: +; CHECK: call i8* @objc_autoreleaseReturnValue( +; CHECK: } +define i8* @test65c(i1 %x) { +entry: + br i1 %x, label %return, label %if.then + +if.then: ; preds = %entry + %c = call i8* @returner() + %s = call i8* @objc_retainAutoreleasedReturnValue(i8* %c) nounwind + br label %return + +return: ; preds = %if.then, %entry + %retval = phi i8* [ %s, %if.then ], [ null, %entry ] + %q = call i8* @objc_autoreleaseReturnValue(i8* %retval) nounwind + ret i8* %retval +} + declare void @bar(i32 ()*) ; A few real-world testcases. diff --git a/test/Transforms/ObjCARC/contract.ll b/test/Transforms/ObjCARC/contract.ll index 04ae3ca..c48f8a5 100644 --- a/test/Transforms/ObjCARC/contract.ll +++ b/test/Transforms/ObjCARC/contract.ll @@ -143,3 +143,21 @@ define i8* @test7(i8* %p) { %2 = tail call i8* @objc_autoreleaseReturnValue(i8* %p) ret i8* %p } + +; Do the return value substitution for PHI nodes too. + +; CHECK: define i8* @test8( +; CHECK: %retval = phi i8* [ %p, %if.then ], [ null, %entry ] +; CHECK: } +define i8* @test8(i1 %x, i8* %c) { +entry: + br i1 %x, label %return, label %if.then + +if.then: ; preds = %entry + %p = call i8* @objc_retain(i8* %c) nounwind + br label %return + +return: ; preds = %if.then, %entry + %retval = phi i8* [ %c, %if.then ], [ null, %entry ] + ret i8* %retval +} diff --git a/test/Transforms/ObjCARC/escape.ll b/test/Transforms/ObjCARC/escape.ll new file mode 100644 index 0000000..3f694cf --- /dev/null +++ b/test/Transforms/ObjCARC/escape.ll @@ -0,0 +1,131 @@ +; RUN: opt -objc-arc -S < %s | FileCheck %s +; rdar://11229925 + +target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" + +%struct.__block_byref_weakLogNTimes = type { i8*, %struct.__block_byref_weakLogNTimes*, i32, i32, i8*, i8*, void (...)* } +%struct.__block_descriptor = type { i64, i64 } + +; Don't optimize away the retainBlock, because the object's address "escapes" +; with the objc_storeWeak call. + +; CHECK: define void @test0( +; CHECK: %tmp7 = call i8* @objc_retainBlock(i8* %tmp6) nounwind, !clang.arc.copy_on_escape !0 +; CHECK: call void @objc_release(i8* %tmp7) nounwind, !clang.imprecise_release !0 +; CHECK: } +define void @test0() nounwind { +entry: + %weakLogNTimes = alloca %struct.__block_byref_weakLogNTimes, align 8 + %block = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i8* }>, align 8 + %byref.isa = getelementptr inbounds %struct.__block_byref_weakLogNTimes* %weakLogNTimes, i64 0, i32 0 + store i8* null, i8** %byref.isa, align 8 + %byref.forwarding = getelementptr inbounds %struct.__block_byref_weakLogNTimes* %weakLogNTimes, i64 0, i32 1 + store %struct.__block_byref_weakLogNTimes* %weakLogNTimes, %struct.__block_byref_weakLogNTimes** %byref.forwarding, align 8 + %byref.flags = getelementptr inbounds %struct.__block_byref_weakLogNTimes* %weakLogNTimes, i64 0, i32 2 + store i32 33554432, i32* %byref.flags, align 8 + %byref.size = getelementptr inbounds %struct.__block_byref_weakLogNTimes* %weakLogNTimes, i64 0, i32 3 + store i32 48, i32* %byref.size, align 4 + %tmp1 = getelementptr inbounds %struct.__block_byref_weakLogNTimes* %weakLogNTimes, i64 0, i32 4 + store i8* bitcast (void (i8*, i8*)* @__Block_byref_object_copy_ to i8*), i8** %tmp1, align 8 + %tmp2 = getelementptr inbounds %struct.__block_byref_weakLogNTimes* %weakLogNTimes, i64 0, i32 5 + store i8* bitcast (void (i8*)* @__Block_byref_object_dispose_ to i8*), i8** %tmp2, align 8 + %weakLogNTimes1 = getelementptr inbounds %struct.__block_byref_weakLogNTimes* %weakLogNTimes, i64 0, i32 6 + %tmp3 = bitcast void (...)** %weakLogNTimes1 to i8** + %tmp4 = call i8* @objc_initWeak(i8** %tmp3, i8* null) nounwind + %block.isa = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i8* }>* %block, i64 0, i32 0 + store i8* null, i8** %block.isa, align 8 + %block.flags = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i8* }>* %block, i64 0, i32 1 + store i32 1107296256, i32* %block.flags, align 8 + %block.reserved = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i8* }>* %block, i64 0, i32 2 + store i32 0, i32* %block.reserved, align 4 + %block.invoke = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i8* }>* %block, i64 0, i32 3 + store i8* bitcast (void (i8*, i32)* @__main_block_invoke_0 to i8*), i8** %block.invoke, align 8 + %block.descriptor = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i8* }>* %block, i64 0, i32 4 + store %struct.__block_descriptor* null, %struct.__block_descriptor** %block.descriptor, align 8 + %block.captured = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i8* }>* %block, i64 0, i32 5 + %tmp5 = bitcast %struct.__block_byref_weakLogNTimes* %weakLogNTimes to i8* + store i8* %tmp5, i8** %block.captured, align 8 + %tmp6 = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i8* }>* %block to i8* + %tmp7 = call i8* @objc_retainBlock(i8* %tmp6) nounwind, !clang.arc.copy_on_escape !0 + %tmp8 = load %struct.__block_byref_weakLogNTimes** %byref.forwarding, align 8 + %weakLogNTimes3 = getelementptr inbounds %struct.__block_byref_weakLogNTimes* %tmp8, i64 0, i32 6 + %tmp9 = bitcast void (...)** %weakLogNTimes3 to i8** + %tmp10 = call i8* @objc_storeWeak(i8** %tmp9, i8* %tmp7) nounwind + %tmp11 = getelementptr inbounds i8* %tmp7, i64 16 + %tmp12 = bitcast i8* %tmp11 to i8** + %tmp13 = load i8** %tmp12, align 8 + %tmp14 = bitcast i8* %tmp13 to void (i8*, i32)* + call void %tmp14(i8* %tmp7, i32 10) nounwind, !clang.arc.no_objc_arc_exceptions !0 + call void @objc_release(i8* %tmp7) nounwind, !clang.imprecise_release !0 + call void @_Block_object_dispose(i8* %tmp5, i32 8) nounwind + call void @objc_destroyWeak(i8** %tmp3) nounwind + ret void +} + +; Like test0, but it makes a regular call instead of a storeWeak call, +; so the optimization is valid. + +; CHECK: define void @test1( +; CHECK-NOT: @objc_retainBlock +; CHECK: } +define void @test1() nounwind { +entry: + %weakLogNTimes = alloca %struct.__block_byref_weakLogNTimes, align 8 + %block = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i8* }>, align 8 + %byref.isa = getelementptr inbounds %struct.__block_byref_weakLogNTimes* %weakLogNTimes, i64 0, i32 0 + store i8* null, i8** %byref.isa, align 8 + %byref.forwarding = getelementptr inbounds %struct.__block_byref_weakLogNTimes* %weakLogNTimes, i64 0, i32 1 + store %struct.__block_byref_weakLogNTimes* %weakLogNTimes, %struct.__block_byref_weakLogNTimes** %byref.forwarding, align 8 + %byref.flags = getelementptr inbounds %struct.__block_byref_weakLogNTimes* %weakLogNTimes, i64 0, i32 2 + store i32 33554432, i32* %byref.flags, align 8 + %byref.size = getelementptr inbounds %struct.__block_byref_weakLogNTimes* %weakLogNTimes, i64 0, i32 3 + store i32 48, i32* %byref.size, align 4 + %tmp1 = getelementptr inbounds %struct.__block_byref_weakLogNTimes* %weakLogNTimes, i64 0, i32 4 + store i8* bitcast (void (i8*, i8*)* @__Block_byref_object_copy_ to i8*), i8** %tmp1, align 8 + %tmp2 = getelementptr inbounds %struct.__block_byref_weakLogNTimes* %weakLogNTimes, i64 0, i32 5 + store i8* bitcast (void (i8*)* @__Block_byref_object_dispose_ to i8*), i8** %tmp2, align 8 + %weakLogNTimes1 = getelementptr inbounds %struct.__block_byref_weakLogNTimes* %weakLogNTimes, i64 0, i32 6 + %tmp3 = bitcast void (...)** %weakLogNTimes1 to i8** + %tmp4 = call i8* @objc_initWeak(i8** %tmp3, i8* null) nounwind + %block.isa = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i8* }>* %block, i64 0, i32 0 + store i8* null, i8** %block.isa, align 8 + %block.flags = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i8* }>* %block, i64 0, i32 1 + store i32 1107296256, i32* %block.flags, align 8 + %block.reserved = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i8* }>* %block, i64 0, i32 2 + store i32 0, i32* %block.reserved, align 4 + %block.invoke = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i8* }>* %block, i64 0, i32 3 + store i8* bitcast (void (i8*, i32)* @__main_block_invoke_0 to i8*), i8** %block.invoke, align 8 + %block.descriptor = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i8* }>* %block, i64 0, i32 4 + store %struct.__block_descriptor* null, %struct.__block_descriptor** %block.descriptor, align 8 + %block.captured = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i8* }>* %block, i64 0, i32 5 + %tmp5 = bitcast %struct.__block_byref_weakLogNTimes* %weakLogNTimes to i8* + store i8* %tmp5, i8** %block.captured, align 8 + %tmp6 = bitcast <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i8* }>* %block to i8* + %tmp7 = call i8* @objc_retainBlock(i8* %tmp6) nounwind, !clang.arc.copy_on_escape !0 + %tmp8 = load %struct.__block_byref_weakLogNTimes** %byref.forwarding, align 8 + %weakLogNTimes3 = getelementptr inbounds %struct.__block_byref_weakLogNTimes* %tmp8, i64 0, i32 6 + %tmp9 = bitcast void (...)** %weakLogNTimes3 to i8** + %tmp10 = call i8* @not_really_objc_storeWeak(i8** %tmp9, i8* %tmp7) nounwind + %tmp11 = getelementptr inbounds i8* %tmp7, i64 16 + %tmp12 = bitcast i8* %tmp11 to i8** + %tmp13 = load i8** %tmp12, align 8 + %tmp14 = bitcast i8* %tmp13 to void (i8*, i32)* + call void %tmp14(i8* %tmp7, i32 10) nounwind, !clang.arc.no_objc_arc_exceptions !0 + call void @objc_release(i8* %tmp7) nounwind, !clang.imprecise_release !0 + call void @_Block_object_dispose(i8* %tmp5, i32 8) nounwind + call void @objc_destroyWeak(i8** %tmp3) nounwind + ret void +} + +declare void @__Block_byref_object_copy_(i8*, i8*) nounwind +declare void @__Block_byref_object_dispose_(i8*) nounwind +declare void @objc_destroyWeak(i8**) +declare i8* @objc_initWeak(i8**, i8*) +declare void @__main_block_invoke_0(i8* nocapture, i32) nounwind ssp +declare void @_Block_object_dispose(i8*, i32) +declare i8* @objc_retainBlock(i8*) +declare i8* @objc_storeWeak(i8**, i8*) +declare i8* @not_really_objc_storeWeak(i8**, i8*) +declare void @objc_release(i8*) + +!0 = metadata !{} diff --git a/test/Transforms/ObjCARC/invoke.ll b/test/Transforms/ObjCARC/invoke.ll index 9e26209..76e82a5 100644 --- a/test/Transforms/ObjCARC/invoke.ll +++ b/test/Transforms/ObjCARC/invoke.ll @@ -6,6 +6,7 @@ declare i8* @objc_retainAutoreleasedReturnValue(i8*) declare i8* @objc_msgSend(i8*, i8*, ...) declare void @use_pointer(i8*) declare void @callee() +declare i8* @returner() ; ARCOpt shouldn't try to move the releases to the block containing the invoke. @@ -103,6 +104,114 @@ finally.rethrow: ; preds = %invoke.cont, %entry unreachable } +; Don't try to place code on invoke critical edges. + +; CHECK: define void @test3( +; CHECK: if.end: +; CHECK-NEXT: call void @objc_release(i8* %p) nounwind +; CHECK-NEXT: ret void +define void @test3(i8* %p, i1 %b) { +entry: + %0 = call i8* @objc_retain(i8* %p) + call void @callee() + br i1 %b, label %if.else, label %if.then + +if.then: + invoke void @use_pointer(i8* %p) + to label %if.end unwind label %lpad, !clang.arc.no_objc_arc_exceptions !0 + +if.else: + invoke void @use_pointer(i8* %p) + to label %if.end unwind label %lpad, !clang.arc.no_objc_arc_exceptions !0 + +lpad: + %r = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__objc_personality_v0 to i8*) + cleanup + ret void + +if.end: + call void @objc_release(i8* %p) + ret void +} + +; Like test3, but with ARC-relevant exception handling. + +; CHECK: define void @test4( +; CHECK: lpad: +; CHECK-NEXT: %r = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__objc_personality_v0 to i8*) +; CHECK-NEXT: cleanup +; CHECK-NEXT: call void @objc_release(i8* %p) nounwind +; CHECK-NEXT: ret void +; CHECK: if.end: +; CHECK-NEXT: call void @objc_release(i8* %p) nounwind +; CHECK-NEXT: ret void +define void @test4(i8* %p, i1 %b) { +entry: + %0 = call i8* @objc_retain(i8* %p) + call void @callee() + br i1 %b, label %if.else, label %if.then + +if.then: + invoke void @use_pointer(i8* %p) + to label %if.end unwind label %lpad + +if.else: + invoke void @use_pointer(i8* %p) + to label %if.end unwind label %lpad + +lpad: + %r = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__objc_personality_v0 to i8*) + cleanup + call void @objc_release(i8* %p) + ret void + +if.end: + call void @objc_release(i8* %p) + ret void +} + +; Don't turn the retainAutoreleaseReturnValue into retain, because it's +; for an invoke which we can assume codegen will put immediately prior. + +; CHECK: define void @test5( +; CHECK: call i8* @objc_retainAutoreleasedReturnValue(i8* %z) +; CHECK: } +define void @test5() { +entry: + %z = invoke i8* @returner() + to label %if.end unwind label %lpad, !clang.arc.no_objc_arc_exceptions !0 + +lpad: + %r13 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__objc_personality_v0 to i8*) + cleanup + ret void + +if.end: + call i8* @objc_retainAutoreleasedReturnValue(i8* %z) + ret void +} + +; Like test5, but there's intervening code. + +; CHECK: define void @test6( +; CHECK: call i8* @objc_retain(i8* %z) +; CHECK: } +define void @test6() { +entry: + %z = invoke i8* @returner() + to label %if.end unwind label %lpad, !clang.arc.no_objc_arc_exceptions !0 + +lpad: + %r13 = landingpad { i8*, i32 } personality i8* bitcast (i32 (...)* @__objc_personality_v0 to i8*) + cleanup + ret void + +if.end: + call void @callee() + call i8* @objc_retainAutoreleasedReturnValue(i8* %z) + ret void +} + declare i32 @__gxx_personality_v0(...) declare i32 @__objc_personality_v0(...) diff --git a/test/Transforms/ObjCARC/pr12270.ll b/test/Transforms/ObjCARC/pr12270.ll index 30610f8..1faae5f 100644 --- a/test/Transforms/ObjCARC/pr12270.ll +++ b/test/Transforms/ObjCARC/pr12270.ll @@ -9,7 +9,13 @@ entry: return: ; No predecessors! %bar = bitcast %2* %x to i8* %foo = call i8* @objc_autoreleaseReturnValue(i8* %bar) nounwind + call void @callee() + call void @use_pointer(i8* %foo) + call void @objc_release(i8* %foo) nounwind ret void } declare i8* @objc_autoreleaseReturnValue(i8*) +declare void @objc_release(i8*) +declare void @callee() +declare void @use_pointer(i8*) diff --git a/test/Transforms/ObjCARC/retain-not-declared.ll b/test/Transforms/ObjCARC/retain-not-declared.ll index 41bde01..f876e51 100644 --- a/test/Transforms/ObjCARC/retain-not-declared.ll +++ b/test/Transforms/ObjCARC/retain-not-declared.ll @@ -30,7 +30,7 @@ entry: ; CHECK: @test1( ; CHECK: @objc_retain( -; CHECK: @objc_retain( +; CHECK: @objc_retainAutoreleasedReturnValue( ; CHECK: @objc_release( ; CHECK: @objc_release( ; CHECK: } diff --git a/test/Transforms/PhaseOrdering/PR6627.ll b/test/Transforms/PhaseOrdering/PR6627.ll new file mode 100644 index 0000000..ef9947f --- /dev/null +++ b/test/Transforms/PhaseOrdering/PR6627.ll @@ -0,0 +1,93 @@ +; RUN: opt -O3 -S %s | FileCheck %s +; XFAIL: * + +declare i32 @doo(...) + +; PR6627 - This whole nasty sequence should be flattened down to a single +; 32-bit comparison. +define void @test2(i8* %arrayidx) nounwind ssp { +entry: + %xx = bitcast i8* %arrayidx to i32* + %x1 = load i32* %xx, align 4 + %tmp = trunc i32 %x1 to i8 + %conv = zext i8 %tmp to i32 + %cmp = icmp eq i32 %conv, 127 + br i1 %cmp, label %land.lhs.true, label %if.end + +land.lhs.true: ; preds = %entry + %arrayidx4 = getelementptr inbounds i8* %arrayidx, i64 1 + %tmp5 = load i8* %arrayidx4, align 1 + %conv6 = zext i8 %tmp5 to i32 + %cmp7 = icmp eq i32 %conv6, 69 + br i1 %cmp7, label %land.lhs.true9, label %if.end + +land.lhs.true9: ; preds = %land.lhs.true + %arrayidx12 = getelementptr inbounds i8* %arrayidx, i64 2 + %tmp13 = load i8* %arrayidx12, align 1 + %conv14 = zext i8 %tmp13 to i32 + %cmp15 = icmp eq i32 %conv14, 76 + br i1 %cmp15, label %land.lhs.true17, label %if.end + +land.lhs.true17: ; preds = %land.lhs.true9 + %arrayidx20 = getelementptr inbounds i8* %arrayidx, i64 3 + %tmp21 = load i8* %arrayidx20, align 1 + %conv22 = zext i8 %tmp21 to i32 + %cmp23 = icmp eq i32 %conv22, 70 + br i1 %cmp23, label %if.then, label %if.end + +if.then: ; preds = %land.lhs.true17 + %call25 = call i32 (...)* @doo() + br label %if.end + +if.end: + ret void + +; CHECK: @test2 +; CHECK: %x1 = load i32* %xx, align 4 +; CHECK-NEXT: icmp eq i32 %x1, 1179403647 +; CHECK-NEXT: br i1 {{.*}}, label %if.then, label %if.end +} + +; PR6627 - This should all be flattened down to one compare. This is the same +; as test2, except that the initial load is done as an i8 instead of i32, thus +; requiring widening. +define void @test2a(i8* %arrayidx) nounwind ssp { +entry: + %x1 = load i8* %arrayidx, align 4 + %conv = zext i8 %x1 to i32 + %cmp = icmp eq i32 %conv, 127 + br i1 %cmp, label %land.lhs.true, label %if.end + +land.lhs.true: ; preds = %entry + %arrayidx4 = getelementptr inbounds i8* %arrayidx, i64 1 + %tmp5 = load i8* %arrayidx4, align 1 + %conv6 = zext i8 %tmp5 to i32 + %cmp7 = icmp eq i32 %conv6, 69 + br i1 %cmp7, label %land.lhs.true9, label %if.end + +land.lhs.true9: ; preds = %land.lhs.true + %arrayidx12 = getelementptr inbounds i8* %arrayidx, i64 2 + %tmp13 = load i8* %arrayidx12, align 1 + %conv14 = zext i8 %tmp13 to i32 + %cmp15 = icmp eq i32 %conv14, 76 + br i1 %cmp15, label %land.lhs.true17, label %if.end + +land.lhs.true17: ; preds = %land.lhs.true9 + %arrayidx20 = getelementptr inbounds i8* %arrayidx, i64 3 + %tmp21 = load i8* %arrayidx20, align 1 + %conv22 = zext i8 %tmp21 to i32 + %cmp23 = icmp eq i32 %conv22, 70 + br i1 %cmp23, label %if.then, label %if.end + +if.then: ; preds = %land.lhs.true17 + %call25 = call i32 (...)* @doo() + br label %if.end + +if.end: + ret void + +; CHECK: @test2a +; CHECK: %x1 = load i32* {{.*}}, align 4 +; CHECK-NEXT: icmp eq i32 %x1, 1179403647 +; CHECK-NEXT: br i1 {{.*}}, label %if.then, label %if.end +} diff --git a/test/Transforms/PhaseOrdering/basic.ll b/test/Transforms/PhaseOrdering/basic.ll index e5b2ba4..2d52ae5 100644 --- a/test/Transforms/PhaseOrdering/basic.ll +++ b/test/Transforms/PhaseOrdering/basic.ll @@ -1,5 +1,4 @@ ; RUN: opt -O3 -S %s | FileCheck %s -; XFAIL: * target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64" target triple = "x86_64-apple-macosx10.6.7" @@ -23,96 +22,3 @@ define void @test1() nounwind ssp { ; CHECK: @test1 ; CHECK-NEXT: ret void } - - -; PR6627 - This whole nasty sequence should be flattened down to a single -; 32-bit comparison. -define void @test2(i8* %arrayidx) nounwind ssp { -entry: - %xx = bitcast i8* %arrayidx to i32* - %x1 = load i32* %xx, align 4 - %tmp = trunc i32 %x1 to i8 - %conv = zext i8 %tmp to i32 - %cmp = icmp eq i32 %conv, 127 - br i1 %cmp, label %land.lhs.true, label %if.end - -land.lhs.true: ; preds = %entry - %arrayidx4 = getelementptr inbounds i8* %arrayidx, i64 1 - %tmp5 = load i8* %arrayidx4, align 1 - %conv6 = zext i8 %tmp5 to i32 - %cmp7 = icmp eq i32 %conv6, 69 - br i1 %cmp7, label %land.lhs.true9, label %if.end - -land.lhs.true9: ; preds = %land.lhs.true - %arrayidx12 = getelementptr inbounds i8* %arrayidx, i64 2 - %tmp13 = load i8* %arrayidx12, align 1 - %conv14 = zext i8 %tmp13 to i32 - %cmp15 = icmp eq i32 %conv14, 76 - br i1 %cmp15, label %land.lhs.true17, label %if.end - -land.lhs.true17: ; preds = %land.lhs.true9 - %arrayidx20 = getelementptr inbounds i8* %arrayidx, i64 3 - %tmp21 = load i8* %arrayidx20, align 1 - %conv22 = zext i8 %tmp21 to i32 - %cmp23 = icmp eq i32 %conv22, 70 - br i1 %cmp23, label %if.then, label %if.end - -if.then: ; preds = %land.lhs.true17 - %call25 = call i32 (...)* @doo() - br label %if.end - -if.end: - ret void - -; CHECK: @test2 -; CHECK: %x1 = load i32* %xx, align 4 -; CHECK-NEXT: icmp eq i32 %x1, 1179403647 -; CHECK-NEXT: br i1 {{.*}}, label %if.then, label %if.end -} - -declare i32 @doo(...) - -; PR6627 - This should all be flattened down to one compare. This is the same -; as test2, except that the initial load is done as an i8 instead of i32, thus -; requiring widening. -define void @test2a(i8* %arrayidx) nounwind ssp { -entry: - %x1 = load i8* %arrayidx, align 4 - %conv = zext i8 %x1 to i32 - %cmp = icmp eq i32 %conv, 127 - br i1 %cmp, label %land.lhs.true, label %if.end - -land.lhs.true: ; preds = %entry - %arrayidx4 = getelementptr inbounds i8* %arrayidx, i64 1 - %tmp5 = load i8* %arrayidx4, align 1 - %conv6 = zext i8 %tmp5 to i32 - %cmp7 = icmp eq i32 %conv6, 69 - br i1 %cmp7, label %land.lhs.true9, label %if.end - -land.lhs.true9: ; preds = %land.lhs.true - %arrayidx12 = getelementptr inbounds i8* %arrayidx, i64 2 - %tmp13 = load i8* %arrayidx12, align 1 - %conv14 = zext i8 %tmp13 to i32 - %cmp15 = icmp eq i32 %conv14, 76 - br i1 %cmp15, label %land.lhs.true17, label %if.end - -land.lhs.true17: ; preds = %land.lhs.true9 - %arrayidx20 = getelementptr inbounds i8* %arrayidx, i64 3 - %tmp21 = load i8* %arrayidx20, align 1 - %conv22 = zext i8 %tmp21 to i32 - %cmp23 = icmp eq i32 %conv22, 70 - br i1 %cmp23, label %if.then, label %if.end - -if.then: ; preds = %land.lhs.true17 - %call25 = call i32 (...)* @doo() - br label %if.end - -if.end: - ret void - -; CHECK: @test2a -; CHECK: %x1 = load i32* {{.*}}, align 4 -; CHECK-NEXT: icmp eq i32 %x1, 1179403647 -; CHECK-NEXT: br i1 {{.*}}, label %if.then, label %if.end -} - diff --git a/test/Transforms/SimplifyLibCalls/floor.ll b/test/Transforms/SimplifyLibCalls/floor.ll index 8780e32..03dcdf5 100644 --- a/test/Transforms/SimplifyLibCalls/floor.ll +++ b/test/Transforms/SimplifyLibCalls/floor.ll @@ -1,16 +1,31 @@ -; RUN: opt < %s -simplify-libcalls -S > %t -; RUN: not grep {call.*floor(} %t -; RUN: grep {call.*floorf(} %t -; RUN: not grep {call.*ceil(} %t -; RUN: grep {call.*ceilf(} %t -; RUN: not grep {call.*nearbyint(} %t -; RUN: grep {call.*nearbyintf(} %t -; XFAIL: sparc +; RUN: opt < %s -simplify-libcalls -S -mtriple "i386-pc-linux" | FileCheck -check-prefix=DO-SIMPLIFY %s +; RUN: opt < %s -simplify-libcalls -S -mtriple "i386-pc-win32" | FileCheck -check-prefix=DONT-SIMPLIFY %s +; RUN: opt < %s -simplify-libcalls -S -mtriple "x86_64-pc-win32" | FileCheck -check-prefix=C89-SIMPLIFY %s +; RUN: opt < %s -simplify-libcalls -S -mtriple "i386-pc-mingw32" | FileCheck -check-prefix=DO-SIMPLIFY %s +; RUN: opt < %s -simplify-libcalls -S -mtriple "x86_64-pc-mingw32" | FileCheck -check-prefix=DO-SIMPLIFY %s +; RUN: opt < %s -simplify-libcalls -S -mtriple "sparc-sun-solaris" | FileCheck -check-prefix=DO-SIMPLIFY %s + +; DO-SIMPLIFY: call float @floorf( +; DO-SIMPLIFY: call float @ceilf( +; DO-SIMPLIFY: call float @roundf( +; DO-SIMPLIFY: call float @nearbyintf( + +; C89-SIMPLIFY: call float @floorf( +; C89-SIMPLIFY: call float @ceilf( +; C89-SIMPLIFY: call double @round( +; C89-SIMPLIFY: call double @nearbyint( + +; DONT-SIMPLIFY: call double @floor( +; DONT-SIMPLIFY: call double @ceil( +; DONT-SIMPLIFY: call double @round( +; DONT-SIMPLIFY: call double @nearbyint( declare double @floor(double) declare double @ceil(double) +declare double @round(double) + declare double @nearbyint(double) define float @test_floor(float %C) { @@ -29,8 +44,14 @@ define float @test_ceil(float %C) { ret float %F } -; PR8466 -; XFAIL: win32 +define float @test_round(float %C) { + %D = fpext float %C to double ; <double> [#uses=1] + ; --> roundf + %E = call double @round( double %D ) ; <double> [#uses=1] + %F = fptrunc double %E to float ; <float> [#uses=1] + ret float %F +} + define float @test_nearbyint(float %C) { %D = fpext float %C to double ; <double> [#uses=1] ; --> nearbyintf diff --git a/test/Transforms/SimplifyLibCalls/win-math.ll b/test/Transforms/SimplifyLibCalls/win-math.ll new file mode 100644 index 0000000..367e5b8 --- /dev/null +++ b/test/Transforms/SimplifyLibCalls/win-math.ll @@ -0,0 +1,275 @@ +; RUN: opt -O2 -S -mtriple=i386-pc-win32 < %s | FileCheck %s -check-prefix=WIN32 +; RUN: opt -O2 -S -mtriple=x86_64-pc-win32 < %s | FileCheck %s -check-prefix=WIN64 +; RUN: opt -O2 -S -mtriple=i386-pc-mingw32 < %s | FileCheck %s -check-prefix=MINGW32 +; RUN: opt -O2 -S -mtriple=x86_64-pc-mingw32 < %s | FileCheck %s -check-prefix=MINGW64 + +; x86 win32 msvcrt does not provide entry points for single-precision libm. +; x86-64 win32 msvcrt does (except for fabsf) +; msvcrt does not provide C99 math, but mingw32 does. + +declare double @acos(double %x) +define float @float_acos(float %x) nounwind readnone { +; WIN32: @float_acos +; WIN32-NOT: float @acosf +; WIN32: double @acos + %1 = fpext float %x to double + %2 = call double @acos(double %1) + %3 = fptrunc double %2 to float + ret float %3 +} + +declare double @asin(double %x) +define float @float_asin(float %x) nounwind readnone { +; WIN32: @float_asin +; WIN32-NOT: float @asinf +; WIN32: double @asin + %1 = fpext float %x to double + %2 = call double @asin(double %1) + %3 = fptrunc double %2 to float + ret float %3 +} + +declare double @atan(double %x) +define float @float_atan(float %x) nounwind readnone { +; WIN32: @float_atan +; WIN32-NOT: float @atanf +; WIN32: double @atan + %1 = fpext float %x to double + %2 = call double @atan(double %1) + %3 = fptrunc double %2 to float + ret float %3 +} + +declare double @atan2(double %x, double %y) +define float @float_atan2(float %x, float %y) nounwind readnone { +; WIN32: @float_atan2 +; WIN32-NOT: float @atan2f +; WIN32: double @atan2 + %1 = fpext float %x to double + %2 = fpext float %y to double + %3 = call double @atan2(double %1, double %2) + %4 = fptrunc double %3 to float + ret float %4 +} + +declare double @ceil(double %x) +define float @float_ceil(float %x) nounwind readnone { +; WIN32: @float_ceil +; WIN32-NOT: float @ceilf +; WIN32: double @ceil +; WIN64: @float_ceil +; WIN64: float @ceilf +; WIN64-NOT: double @ceil +; MINGW32: @float_ceil +; MINGW32: float @ceilf +; MINGW32-NOT: double @ceil +; MINGW64: @float_ceil +; MINGW64: float @ceilf +; MINGW64-NOT: double @ceil + %1 = fpext float %x to double + %2 = call double @ceil(double %1) + %3 = fptrunc double %2 to float + ret float %3 +} + +declare double @_copysign(double %x) +define float @float_copysign(float %x) nounwind readnone { +; WIN32: @float_copysign +; WIN32-NOT: float @copysignf +; WIN32-NOT: float @_copysignf +; WIN32: double @_copysign + %1 = fpext float %x to double + %2 = call double @_copysign(double %1) + %3 = fptrunc double %2 to float + ret float %3 +} + +declare double @cos(double %x) +define float @float_cos(float %x) nounwind readnone { +; WIN32: @float_cos +; WIN32-NOT: float @cosf +; WIN32: double @cos + %1 = fpext float %x to double + %2 = call double @cos(double %1) + %3 = fptrunc double %2 to float + ret float %3 +} + +declare double @cosh(double %x) +define float @float_cosh(float %x) nounwind readnone { +; WIN32: @float_cosh +; WIN32-NOT: float @coshf +; WIN32: double @cosh + %1 = fpext float %x to double + %2 = call double @cosh(double %1) + %3 = fptrunc double %2 to float + ret float %3 +} + +declare double @exp(double %x, double %y) +define float @float_exp(float %x, float %y) nounwind readnone { +; WIN32: @float_exp +; WIN32-NOT: float @expf +; WIN32: double @exp + %1 = fpext float %x to double + %2 = fpext float %y to double + %3 = call double @exp(double %1, double %2) + %4 = fptrunc double %3 to float + ret float %4 +} + +declare double @fabs(double %x, double %y) +define float @float_fabs(float %x, float %y) nounwind readnone { +; WIN32: @float_fabs +; WIN32-NOT: float @fabsf +; WIN32: double @fabs +; WIN64: @float_fabs +; WIN64-NOT: float @fabsf +; WIN64: double @fabs + %1 = fpext float %x to double + %2 = fpext float %y to double + %3 = call double @fabs(double %1, double %2) + %4 = fptrunc double %3 to float + ret float %4 +} + +declare double @floor(double %x) +define float @float_floor(float %x) nounwind readnone { +; WIN32: @float_floor +; WIN32-NOT: float @floorf +; WIN32: double @floor +; WIN64: @float_floor +; WIN64: float @floorf +; WIN64-NOT: double @floor +; MINGW32: @float_floor +; MINGW32: float @floorf +; MINGW32-NOT: double @floor +; MINGW64: @float_floor +; MINGW64: float @floorf +; MINGW64-NOT: double @floor + %1 = fpext float %x to double + %2 = call double @floor(double %1) + %3 = fptrunc double %2 to float + ret float %3 +} + +declare double @fmod(double %x, double %y) +define float @float_fmod(float %x, float %y) nounwind readnone { +; WIN32: @float_fmod +; WIN32-NOT: float @fmodf +; WIN32: double @fmod + %1 = fpext float %x to double + %2 = fpext float %y to double + %3 = call double @fmod(double %1, double %2) + %4 = fptrunc double %3 to float + ret float %4 +} + +declare double @log(double %x) +define float @float_log(float %x) nounwind readnone { +; WIN32: @float_log +; WIN32-NOT: float @logf +; WIN32: double @log + %1 = fpext float %x to double + %2 = call double @log(double %1) + %3 = fptrunc double %2 to float + ret float %3 +} + +declare double @pow(double %x, double %y) +define float @float_pow(float %x, float %y) nounwind readnone { +; WIN32: @float_pow +; WIN32-NOT: float @powf +; WIN32: double @pow + %1 = fpext float %x to double + %2 = fpext float %y to double + %3 = call double @pow(double %1, double %2) + %4 = fptrunc double %3 to float + ret float %4 +} + +declare double @sin(double %x) +define float @float_sin(float %x) nounwind readnone { +; WIN32: @float_sin +; WIN32-NOT: float @sinf +; WIN32: double @sin + %1 = fpext float %x to double + %2 = call double @sin(double %1) + %3 = fptrunc double %2 to float + ret float %3 +} + +declare double @sinh(double %x) +define float @float_sinh(float %x) nounwind readnone { +; WIN32: @float_sinh +; WIN32-NOT: float @sinhf +; WIN32: double @sinh + %1 = fpext float %x to double + %2 = call double @sinh(double %1) + %3 = fptrunc double %2 to float + ret float %3 +} + +declare double @sqrt(double %x) +define float @float_sqrt(float %x) nounwind readnone { +; WIN32: @float_sqrt +; WIN32-NOT: float @sqrtf +; WIN32: double @sqrt +; WIN64: @float_sqrt +; WIN64: float @sqrtf +; WIN64-NOT: double @sqrt +; MINGW32: @float_sqrt +; MINGW32: float @sqrtf +; MINGW32-NOT: double @sqrt +; MINGW64: @float_sqrt +; MINGW64: float @sqrtf +; MINGW64-NOT: double @sqrt + %1 = fpext float %x to double + %2 = call double @sqrt(double %1) + %3 = fptrunc double %2 to float + ret float %3 +} + +declare double @tan(double %x) +define float @float_tan(float %x) nounwind readnone { +; WIN32: @float_tan +; WIN32-NOT: float @tanf +; WIN32: double @tan + %1 = fpext float %x to double + %2 = call double @tan(double %1) + %3 = fptrunc double %2 to float + ret float %3 +} + +declare double @tanh(double %x) +define float @float_tanh(float %x) nounwind readnone { +; WIN32: @float_tanh +; WIN32-NOT: float @tanhf +; WIN32: double @tanh + %1 = fpext float %x to double + %2 = call double @tanh(double %1) + %3 = fptrunc double %2 to float + ret float %3 +} + +; win32 does not have round; mingw32 does +declare double @round(double %x) +define float @float_round(float %x) nounwind readnone { +; WIN32: @float_round +; WIN32-NOT: float @roundf +; WIN32: double @round +; WIN64: @float_round +; WIN64-NOT: float @roundf +; WIN64: double @round +; MINGW32: @float_round +; MINGW32: float @roundf +; MINGW32-NOT: double @round +; MINGW64: @float_round +; MINGW64: float @roundf +; MINGW64-NOT: double @round + %1 = fpext float %x to double + %2 = call double @round(double %1) + %3 = fptrunc double %2 to float + ret float %3 +} + diff --git a/test/Transforms/TailDup/X86/lit.local.cfg b/test/Transforms/TailDup/X86/lit.local.cfg index 84bd88c..da2db5a 100644 --- a/test/Transforms/TailDup/X86/lit.local.cfg +++ b/test/Transforms/TailDup/X86/lit.local.cfg @@ -1,13 +1,6 @@ config.suffixes = ['.ll'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'X86' in targets: config.unsupported = True diff --git a/test/Transforms/TailDup/lit.local.cfg b/test/Transforms/TailDup/lit.local.cfg index 39c8039..18c604a 100644 --- a/test/Transforms/TailDup/lit.local.cfg +++ b/test/Transforms/TailDup/lit.local.cfg @@ -1,12 +1,5 @@ config.suffixes = ['.ll', '.c', '.cpp'] -def getRoot(config): - if not config.parent: - return config - return getRoot(config.parent) - -root = getRoot(config) - -targets = set(root.targets_to_build.split()) +targets = set(config.root.targets_to_build.split()) if not 'X86' in targets: config.unsupported = True diff --git a/test/Verifier/fpmath.ll b/test/Verifier/fpmath.ll new file mode 100644 index 0000000..b764a63 --- /dev/null +++ b/test/Verifier/fpmath.ll @@ -0,0 +1,31 @@ +; RUN: not llvm-as < %s |& FileCheck %s + +define void @fpmath1(i32 %i, float %f, <2 x float> %g) { + %s = add i32 %i, %i, !fpmath !0 +; CHECK: fpmath requires a floating point result! + %t = fadd float %f, %f, !fpmath !1 +; CHECK: fpmath takes one operand! + %u = fadd float %f, %f, !fpmath !2 +; CHECK: fpmath takes one operand! + %v = fadd float %f, %f, !fpmath !3 +; CHECK: invalid fpmath accuracy! + %w = fadd float %f, %f, !fpmath !0 +; Above line is correct. + %w2 = fadd <2 x float> %g, %g, !fpmath !0 +; Above line is correct. + %x = fadd float %f, %f, !fpmath !4 +; CHECK: fpmath accuracy not a positive number! + %y = fadd float %f, %f, !fpmath !5 +; CHECK: fpmath accuracy not a positive number! + %z = fadd float %f, %f, !fpmath !6 +; CHECK: fpmath accuracy not a positive number! + ret void +} + +!0 = metadata !{ float 1.0 } +!1 = metadata !{ } +!2 = metadata !{ float 1.0, float 1.0 } +!3 = metadata !{ i32 1 } +!4 = metadata !{ float -1.0 } +!5 = metadata !{ float 0.0 } +!6 = metadata !{ float 0x7FFFFFFF00000000 } diff --git a/test/Verifier/range-1.ll b/test/Verifier/range-1.ll new file mode 100644 index 0000000..611933a --- /dev/null +++ b/test/Verifier/range-1.ll @@ -0,0 +1,78 @@ +; RUN: not llvm-as < %s -o /dev/null |& FileCheck %s + +define void @f1(i8* %x) { +entry: + store i8 0, i8* %x, align 1, !range !0 + ret void +} +!0 = metadata !{i8 0, i8 1} +; CHECK: Ranges are only for loads! +; CHECK-NEXT: store i8 0, i8* %x, align 1, !range !0 + +define i8 @f2(i8* %x) { +entry: + %y = load i8* %x, align 1, !range !1 + ret i8 %y +} +!1 = metadata !{} +; CHECK: It should have at least one range! +; CHECK-NEXT: metadata + +define i8 @f3(i8* %x) { +entry: + %y = load i8* %x, align 1, !range !2 + ret i8 %y +} +!2 = metadata !{i8 0} +; CHECK: Unfinished range! + +define i8 @f4(i8* %x) { +entry: + %y = load i8* %x, align 1, !range !3 + ret i8 %y +} +!3 = metadata !{double 0.0, i8 0} +; CHECK: The lower limit must be an integer! + +define i8 @f5(i8* %x) { +entry: + %y = load i8* %x, align 1, !range !4 + ret i8 %y +} +!4 = metadata !{i8 0, double 0.0} +; CHECK: The upper limit must be an integer! + +define i8 @f6(i8* %x) { +entry: + %y = load i8* %x, align 1, !range !5 + ret i8 %y +} +!5 = metadata !{i32 0, i8 0} +; CHECK: Range types must match load type! +; CHECK: %y = load + +define i8 @f7(i8* %x) { +entry: + %y = load i8* %x, align 1, !range !6 + ret i8 %y +} +!6 = metadata !{i8 0, i32 0} +; CHECK: Range types must match load type! +; CHECK: %y = load + +define i8 @f8(i8* %x) { +entry: + %y = load i8* %x, align 1, !range !7 + ret i8 %y +} +!7 = metadata !{i32 0, i32 0} +; CHECK: Range types must match load type! +; CHECK: %y = load + +define i8 @f9(i8* %x) { +entry: + %y = load i8* %x, align 1, !range !8 + ret i8 %y +} +!8 = metadata !{i8 0, i8 0} +; CHECK: Range must not be empty! diff --git a/test/Verifier/range-2.ll b/test/Verifier/range-2.ll new file mode 100644 index 0000000..ef542c8 --- /dev/null +++ b/test/Verifier/range-2.ll @@ -0,0 +1,22 @@ +; RUN: llvm-as < %s -o /dev/null + +define i8 @f1(i8* %x) { +entry: + %y = load i8* %x, align 1, !range !0 + ret i8 %y +} +!0 = metadata !{i8 0, i8 1} + +define i8 @f2(i8* %x) { +entry: + %y = load i8* %x, align 1, !range !1 + ret i8 %y +} +!1 = metadata !{i8 255, i8 1} + +define i8 @f3(i8* %x) { +entry: + %y = load i8* %x, align 1, !range !2 + ret i8 %y +} +!2 = metadata !{i8 1, i8 3, i8 5, i8 42} diff --git a/test/YAMLParser/LICENSE.txt b/test/YAMLParser/LICENSE.txt new file mode 100644 index 0000000..050ced2 --- /dev/null +++ b/test/YAMLParser/LICENSE.txt @@ -0,0 +1,19 @@ +Copyright (c) 2006 Kirill Simonov + +Permission is hereby granted, free of charge, to any person obtaining a copy of +this software and associated documentation files (the "Software"), to deal in +the Software without restriction, including without limitation the rights to +use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies +of the Software, and to permit persons to whom the Software is furnished to do +so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +SOFTWARE. diff --git a/test/YAMLParser/bool.data b/test/YAMLParser/bool.data new file mode 100644 index 0000000..e987a0e --- /dev/null +++ b/test/YAMLParser/bool.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + +- yes +- NO +- True +- on diff --git a/test/YAMLParser/construct-bool.data b/test/YAMLParser/construct-bool.data new file mode 100644 index 0000000..035ec0c --- /dev/null +++ b/test/YAMLParser/construct-bool.data @@ -0,0 +1,11 @@ +# RUN: yaml-bench -canonical %s + +canonical: yes +answer: NO +logical: True +option: on + + +but: + y: is a string + n: is a string diff --git a/test/YAMLParser/construct-custom.data b/test/YAMLParser/construct-custom.data new file mode 100644 index 0000000..cac95e0 --- /dev/null +++ b/test/YAMLParser/construct-custom.data @@ -0,0 +1,28 @@ +# RUN: yaml-bench -canonical %s + +--- +- !tag1 + x: 1 +- !tag1 + x: 1 + 'y': 2 + z: 3 +- !tag2 + 10 +- !tag2 + =: 10 + 'y': 20 + z: 30 +- !tag3 + x: 1 +- !tag3 + x: 1 + 'y': 2 + z: 3 +- !tag3 + =: 1 + 'y': 2 + z: 3 +- !foo + my-parameter: foo + my-another-parameter: [1,2,3] diff --git a/test/YAMLParser/construct-float.data b/test/YAMLParser/construct-float.data new file mode 100644 index 0000000..07c51bd --- /dev/null +++ b/test/YAMLParser/construct-float.data @@ -0,0 +1,8 @@ +# RUN: yaml-bench -canonical %s + +canonical: 6.8523015e+5 +exponential: 685.230_15e+03 +fixed: 685_230.15 +sexagesimal: 190:20:30.15 +negative infinity: -.inf +not a number: .NaN diff --git a/test/YAMLParser/construct-int.data b/test/YAMLParser/construct-int.data new file mode 100644 index 0000000..b14c37f --- /dev/null +++ b/test/YAMLParser/construct-int.data @@ -0,0 +1,8 @@ +# RUN: yaml-bench -canonical %s + +canonical: 685230 +decimal: +685_230 +octal: 02472256 +hexadecimal: 0x_0A_74_AE +binary: 0b1010_0111_0100_1010_1110 +sexagesimal: 190:20:30 diff --git a/test/YAMLParser/construct-map.data b/test/YAMLParser/construct-map.data new file mode 100644 index 0000000..1b68120 --- /dev/null +++ b/test/YAMLParser/construct-map.data @@ -0,0 +1,8 @@ +# RUN: yaml-bench -canonical %s + +# Unordered set of key: value pairs. +Block style: !!map + Clark : Evans + Brian : Ingerson + Oren : Ben-Kiki +Flow style: !!map { Clark: Evans, Brian: Ingerson, Oren: Ben-Kiki } diff --git a/test/YAMLParser/construct-merge.data b/test/YAMLParser/construct-merge.data new file mode 100644 index 0000000..0ebc9f6 --- /dev/null +++ b/test/YAMLParser/construct-merge.data @@ -0,0 +1,29 @@ +# RUN: yaml-bench -canonical %s + +--- +- &CENTER { x: 1, 'y': 2 } +- &LEFT { x: 0, 'y': 2 } +- &BIG { r: 10 } +- &SMALL { r: 1 } + +# All the following maps are equal: + +- # Explicit keys + x: 1 + 'y': 2 + r: 10 + label: center/big + +- # Merge one map + << : *CENTER + r: 10 + label: center/big + +- # Merge multiple maps + << : [ *CENTER, *BIG ] + label: center/big + +- # Override + << : [ *BIG, *LEFT, *SMALL ] + x: 1 + label: center/big diff --git a/test/YAMLParser/construct-null.data b/test/YAMLParser/construct-null.data new file mode 100644 index 0000000..51f8b61 --- /dev/null +++ b/test/YAMLParser/construct-null.data @@ -0,0 +1,20 @@ +# RUN: yaml-bench -canonical %s + +# A document may be null. +--- +--- +# This mapping has four keys, +# one has a value. +empty: +canonical: ~ +english: null +~: null key +--- +# This sequence has five +# entries, two have values. +sparse: + - ~ + - 2nd entry + - + - 4th entry + - Null diff --git a/test/YAMLParser/construct-omap.data b/test/YAMLParser/construct-omap.data new file mode 100644 index 0000000..b96d679 --- /dev/null +++ b/test/YAMLParser/construct-omap.data @@ -0,0 +1,10 @@ +# RUN: yaml-bench -canonical %s + +# Explicitly typed ordered map (dictionary). +Bestiary: !!omap + - aardvark: African pig-like ant eater. Ugly. + - anteater: South-American ant eater. Two species. + - anaconda: South-American constrictor snake. Scaly. + # Etc. +# Flow style +Numbers: !!omap [ one: 1, two: 2, three : 3 ] diff --git a/test/YAMLParser/construct-pairs.data b/test/YAMLParser/construct-pairs.data new file mode 100644 index 0000000..40f288d --- /dev/null +++ b/test/YAMLParser/construct-pairs.data @@ -0,0 +1,9 @@ +# RUN: yaml-bench -canonical %s + +# Explicitly typed pairs. +Block tasks: !!pairs + - meeting: with team. + - meeting: with boss. + - break: lunch. + - meeting: with client. +Flow tasks: !!pairs [ meeting: with team, meeting: with boss ] diff --git a/test/YAMLParser/construct-seq.data b/test/YAMLParser/construct-seq.data new file mode 100644 index 0000000..f43fd39 --- /dev/null +++ b/test/YAMLParser/construct-seq.data @@ -0,0 +1,17 @@ +# RUN: yaml-bench -canonical %s + +# Ordered sequence of nodes +Block style: !!seq +- Mercury # Rotates - no light/dark sides. +- Venus # Deadliest. Aptly named. +- Earth # Mostly dirt. +- Mars # Seems empty. +- Jupiter # The king. +- Saturn # Pretty. +- Uranus # Where the sun hardly shines. +- Neptune # Boring. No rings. +- Pluto # You call this a planet? +Flow style: !!seq [ Mercury, Venus, Earth, Mars, # Rocks + Jupiter, Saturn, Uranus, Neptune, # Gas + Pluto ] # Overrated + diff --git a/test/YAMLParser/construct-set.data b/test/YAMLParser/construct-set.data new file mode 100644 index 0000000..3e9d095 --- /dev/null +++ b/test/YAMLParser/construct-set.data @@ -0,0 +1,9 @@ +# RUN: yaml-bench -canonical %s + +# Explicitly typed set. +baseball players: !!set + ? Mark McGwire + ? Sammy Sosa + ? Ken Griffey +# Flow style +baseball teams: !!set { Boston Red Sox, Detroit Tigers, New York Yankees } diff --git a/test/YAMLParser/construct-str-ascii.data b/test/YAMLParser/construct-str-ascii.data new file mode 100644 index 0000000..24290ae --- /dev/null +++ b/test/YAMLParser/construct-str-ascii.data @@ -0,0 +1,3 @@ +# RUN: yaml-bench -canonical %s + +--- !!str "ascii string" diff --git a/test/YAMLParser/construct-str.data b/test/YAMLParser/construct-str.data new file mode 100644 index 0000000..dc1ce82 --- /dev/null +++ b/test/YAMLParser/construct-str.data @@ -0,0 +1,3 @@ +# RUN: yaml-bench -canonical %s + +string: abcd diff --git a/test/YAMLParser/construct-timestamp.data b/test/YAMLParser/construct-timestamp.data new file mode 100644 index 0000000..f262c2d --- /dev/null +++ b/test/YAMLParser/construct-timestamp.data @@ -0,0 +1,7 @@ +# RUN: yaml-bench -canonical %s + +canonical: 2001-12-15T02:59:43.1Z +valid iso8601: 2001-12-14t21:59:43.10-05:00 +space separated: 2001-12-14 21:59:43.10 -5 +no time zone (Z): 2001-12-15 2:59:43.10 +date (00:00:00Z): 2002-12-14 diff --git a/test/YAMLParser/construct-value.data b/test/YAMLParser/construct-value.data new file mode 100644 index 0000000..fe01a0dc --- /dev/null +++ b/test/YAMLParser/construct-value.data @@ -0,0 +1,12 @@ +# RUN: yaml-bench -canonical %s + +--- # Old schema +link with: + - library1.dll + - library2.dll +--- # New schema +link with: + - = : library1.dll + version: 1.2 + - = : library2.dll + version: 2.3 diff --git a/test/YAMLParser/duplicate-key.former-loader-error.data b/test/YAMLParser/duplicate-key.former-loader-error.data new file mode 100644 index 0000000..9272103 --- /dev/null +++ b/test/YAMLParser/duplicate-key.former-loader-error.data @@ -0,0 +1,5 @@ +# RUN: yaml-bench -canonical %s + +--- +foo: bar +foo: baz diff --git a/test/YAMLParser/duplicate-mapping-key.former-loader-error.data b/test/YAMLParser/duplicate-mapping-key.former-loader-error.data new file mode 100644 index 0000000..96d175d --- /dev/null +++ b/test/YAMLParser/duplicate-mapping-key.former-loader-error.data @@ -0,0 +1,8 @@ +# RUN: yaml-bench -canonical %s + +--- +&anchor foo: + foo: bar + *anchor: duplicate key + baz: bat + *anchor: duplicate key diff --git a/test/YAMLParser/duplicate-merge-key.former-loader-error.data b/test/YAMLParser/duplicate-merge-key.former-loader-error.data new file mode 100644 index 0000000..6b12764 --- /dev/null +++ b/test/YAMLParser/duplicate-merge-key.former-loader-error.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + +--- +<<: {x: 1, y: 2} +foo: bar +<<: {z: 3, t: 4} diff --git a/test/YAMLParser/duplicate-value-key.former-loader-error.data b/test/YAMLParser/duplicate-value-key.former-loader-error.data new file mode 100644 index 0000000..dc20e0b --- /dev/null +++ b/test/YAMLParser/duplicate-value-key.former-loader-error.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + +--- +=: 1 +foo: bar +=: 2 diff --git a/test/YAMLParser/emit-block-scalar-in-simple-key-context-bug.data b/test/YAMLParser/emit-block-scalar-in-simple-key-context-bug.data new file mode 100644 index 0000000..f5adedb --- /dev/null +++ b/test/YAMLParser/emit-block-scalar-in-simple-key-context-bug.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + +? |- + foo +: |- + bar diff --git a/test/YAMLParser/empty-document-bug.data b/test/YAMLParser/empty-document-bug.data new file mode 100644 index 0000000..fa131fe --- /dev/null +++ b/test/YAMLParser/empty-document-bug.data @@ -0,0 +1,2 @@ +# RUN: yaml-bench -canonical %s + diff --git a/test/YAMLParser/float.data b/test/YAMLParser/float.data new file mode 100644 index 0000000..c4de970 --- /dev/null +++ b/test/YAMLParser/float.data @@ -0,0 +1,8 @@ +# RUN: yaml-bench -canonical %s + +- 6.8523015e+5 +- 685.230_15e+03 +- 685_230.15 +- 190:20:30.15 +- -.inf +- .NaN diff --git a/test/YAMLParser/int.data b/test/YAMLParser/int.data new file mode 100644 index 0000000..2651d09 --- /dev/null +++ b/test/YAMLParser/int.data @@ -0,0 +1,8 @@ +# RUN: yaml-bench -canonical %s + +- 685230 +- +685_230 +- 02472256 +- 0x_0A_74_AE +- 0b1010_0111_0100_1010_1110 +- 190:20:30 diff --git a/test/YAMLParser/invalid-single-quote-bug.data b/test/YAMLParser/invalid-single-quote-bug.data new file mode 100644 index 0000000..3722a00 --- /dev/null +++ b/test/YAMLParser/invalid-single-quote-bug.data @@ -0,0 +1,4 @@ +# RUN: yaml-bench -canonical %s + +- "foo 'bar'" +- "foo\n'bar'" diff --git a/test/YAMLParser/merge.data b/test/YAMLParser/merge.data new file mode 100644 index 0000000..8631359 --- /dev/null +++ b/test/YAMLParser/merge.data @@ -0,0 +1,3 @@ +# RUN: yaml-bench -canonical %s + +- << diff --git a/test/YAMLParser/more-floats.data b/test/YAMLParser/more-floats.data new file mode 100644 index 0000000..668b31c --- /dev/null +++ b/test/YAMLParser/more-floats.data @@ -0,0 +1,3 @@ +# RUN: yaml-bench -canonical %s + +[0.0, +1.0, -1.0, +.inf, -.inf, .nan, .nan] diff --git a/test/YAMLParser/negative-float-bug.data b/test/YAMLParser/negative-float-bug.data new file mode 100644 index 0000000..0ba0ffe --- /dev/null +++ b/test/YAMLParser/negative-float-bug.data @@ -0,0 +1,3 @@ +# RUN: yaml-bench -canonical %s + +-1.0 diff --git a/test/YAMLParser/null.data b/test/YAMLParser/null.data new file mode 100644 index 0000000..a38d7fa --- /dev/null +++ b/test/YAMLParser/null.data @@ -0,0 +1,5 @@ +# RUN: yaml-bench -canonical %s + +- +- ~ +- null diff --git a/test/YAMLParser/resolver.data b/test/YAMLParser/resolver.data new file mode 100644 index 0000000..8cbba63 --- /dev/null +++ b/test/YAMLParser/resolver.data @@ -0,0 +1,32 @@ +# RUN: yaml-bench -canonical %s + +--- +"this scalar should be selected" +--- +key11: !foo + key12: + is: [selected] + key22: + key13: [not, selected] + key23: [not, selected] + key32: + key31: [not, selected] + key32: [not, selected] + key33: {not: selected} +key21: !bar + - not selected + - selected + - not selected +key31: !baz + key12: + key13: + key14: {selected} + key23: + key14: [not, selected] + key33: + key14: {selected} + key24: {not: selected} + key22: + - key14: {selected} + key24: {not: selected} + - key14: {selected} diff --git a/test/YAMLParser/run-parser-crash-bug.data b/test/YAMLParser/run-parser-crash-bug.data new file mode 100644 index 0000000..3ec910c --- /dev/null +++ b/test/YAMLParser/run-parser-crash-bug.data @@ -0,0 +1,10 @@ +# RUN: yaml-bench -canonical %s + +--- +- Harry Potter and the Prisoner of Azkaban +- Harry Potter and the Goblet of Fire +- Harry Potter and the Order of the Phoenix +--- +- Memoirs Found in a Bathtub +- Snow Crash +- Ghost World diff --git a/test/YAMLParser/scan-document-end-bug.data b/test/YAMLParser/scan-document-end-bug.data new file mode 100644 index 0000000..7354caf --- /dev/null +++ b/test/YAMLParser/scan-document-end-bug.data @@ -0,0 +1,5 @@ +# RUN: yaml-bench -canonical %s + +# Ticket #4 +--- +... diff --git a/test/YAMLParser/scan-line-break-bug.data b/test/YAMLParser/scan-line-break-bug.data new file mode 100644 index 0000000..792973d --- /dev/null +++ b/test/YAMLParser/scan-line-break-bug.data @@ -0,0 +1,5 @@ +# RUN: yaml-bench -canonical %s + +foo: + bar + baz diff --git a/test/YAMLParser/single-dot-is-not-float-bug.data b/test/YAMLParser/single-dot-is-not-float-bug.data new file mode 100644 index 0000000..810a593 --- /dev/null +++ b/test/YAMLParser/single-dot-is-not-float-bug.data @@ -0,0 +1,3 @@ +# RUN: yaml-bench -canonical %s + +. diff --git a/test/YAMLParser/sloppy-indentation.data b/test/YAMLParser/sloppy-indentation.data new file mode 100644 index 0000000..2b2b62b --- /dev/null +++ b/test/YAMLParser/sloppy-indentation.data @@ -0,0 +1,19 @@ +# RUN: yaml-bench -canonical %s + +--- +in the block context: + indentation should be kept: { + but in the flow context: [ +it may be violated] +} +--- +the parser does not require scalars +to be indented with at least one space +... +--- +"the parser does not require scalars +to be indented with at least one space" +--- +foo: + bar: 'quoted scalars +may not adhere indentation' diff --git a/test/YAMLParser/spec-02-01.data b/test/YAMLParser/spec-02-01.data new file mode 100644 index 0000000..dd15b2b --- /dev/null +++ b/test/YAMLParser/spec-02-01.data @@ -0,0 +1,5 @@ +# RUN: yaml-bench -canonical %s + +- Mark McGwire +- Sammy Sosa +- Ken Griffey diff --git a/test/YAMLParser/spec-02-02.data b/test/YAMLParser/spec-02-02.data new file mode 100644 index 0000000..a5695d5 --- /dev/null +++ b/test/YAMLParser/spec-02-02.data @@ -0,0 +1,5 @@ +# RUN: yaml-bench -canonical %s + +hr: 65 # Home runs +avg: 0.278 # Batting average +rbi: 147 # Runs Batted In diff --git a/test/YAMLParser/spec-02-03.data b/test/YAMLParser/spec-02-03.data new file mode 100644 index 0000000..81f8d99 --- /dev/null +++ b/test/YAMLParser/spec-02-03.data @@ -0,0 +1,10 @@ +# RUN: yaml-bench -canonical %s + +american: + - Boston Red Sox + - Detroit Tigers + - New York Yankees +national: + - New York Mets + - Chicago Cubs + - Atlanta Braves diff --git a/test/YAMLParser/spec-02-04.data b/test/YAMLParser/spec-02-04.data new file mode 100644 index 0000000..44a218d --- /dev/null +++ b/test/YAMLParser/spec-02-04.data @@ -0,0 +1,10 @@ +# RUN: yaml-bench -canonical %s + +- + name: Mark McGwire + hr: 65 + avg: 0.278 +- + name: Sammy Sosa + hr: 63 + avg: 0.288 diff --git a/test/YAMLParser/spec-02-05.data b/test/YAMLParser/spec-02-05.data new file mode 100644 index 0000000..c9a4a75 --- /dev/null +++ b/test/YAMLParser/spec-02-05.data @@ -0,0 +1,5 @@ +# RUN: yaml-bench -canonical %s + +- [name , hr, avg ] +- [Mark McGwire, 65, 0.278] +- [Sammy Sosa , 63, 0.288] diff --git a/test/YAMLParser/spec-02-06.data b/test/YAMLParser/spec-02-06.data new file mode 100644 index 0000000..85c1e2b --- /dev/null +++ b/test/YAMLParser/spec-02-06.data @@ -0,0 +1,7 @@ +# RUN: yaml-bench -canonical %s + +Mark McGwire: {hr: 65, avg: 0.278} +Sammy Sosa: { + hr: 63, + avg: 0.288 + } diff --git a/test/YAMLParser/spec-02-07.data b/test/YAMLParser/spec-02-07.data new file mode 100644 index 0000000..c349662 --- /dev/null +++ b/test/YAMLParser/spec-02-07.data @@ -0,0 +1,12 @@ +# RUN: yaml-bench -canonical %s + +# Ranking of 1998 home runs +--- +- Mark McGwire +- Sammy Sosa +- Ken Griffey + +# Team ranking +--- +- Chicago Cubs +- St Louis Cardinals diff --git a/test/YAMLParser/spec-02-08.data b/test/YAMLParser/spec-02-08.data new file mode 100644 index 0000000..9746a43 --- /dev/null +++ b/test/YAMLParser/spec-02-08.data @@ -0,0 +1,12 @@ +# RUN: yaml-bench -canonical %s + +--- +time: 20:03:20 +player: Sammy Sosa +action: strike (miss) +... +--- +time: 20:03:47 +player: Sammy Sosa +action: grand slam +... diff --git a/test/YAMLParser/spec-02-09.data b/test/YAMLParser/spec-02-09.data new file mode 100644 index 0000000..6aef933 --- /dev/null +++ b/test/YAMLParser/spec-02-09.data @@ -0,0 +1,10 @@ +# RUN: yaml-bench -canonical %s + +--- +hr: # 1998 hr ranking + - Mark McGwire + - Sammy Sosa +rbi: + # 1998 rbi ranking + - Sammy Sosa + - Ken Griffey diff --git a/test/YAMLParser/spec-02-10.data b/test/YAMLParser/spec-02-10.data new file mode 100644 index 0000000..0302fa7 --- /dev/null +++ b/test/YAMLParser/spec-02-10.data @@ -0,0 +1,10 @@ +# RUN: yaml-bench -canonical %s + +--- +hr: + - Mark McGwire + # Following node labeled SS + - &SS Sammy Sosa +rbi: + - *SS # Subsequent occurrence + - Ken Griffey diff --git a/test/YAMLParser/spec-02-11.data b/test/YAMLParser/spec-02-11.data new file mode 100644 index 0000000..d8cf863 --- /dev/null +++ b/test/YAMLParser/spec-02-11.data @@ -0,0 +1,11 @@ +# RUN: yaml-bench -canonical %s + +? - Detroit Tigers + - Chicago cubs +: + - 2001-07-23 + +? [ New York Yankees, + Atlanta Braves ] +: [ 2001-07-02, 2001-08-12, + 2001-08-14 ] diff --git a/test/YAMLParser/spec-02-12.data b/test/YAMLParser/spec-02-12.data new file mode 100644 index 0000000..3b4d537 --- /dev/null +++ b/test/YAMLParser/spec-02-12.data @@ -0,0 +1,10 @@ +# RUN: yaml-bench -canonical %s + +--- +# products purchased +- item : Super Hoop + quantity: 1 +- item : Basketball + quantity: 4 +- item : Big Shoes + quantity: 1 diff --git a/test/YAMLParser/spec-02-13.data b/test/YAMLParser/spec-02-13.data new file mode 100644 index 0000000..2bbccbf --- /dev/null +++ b/test/YAMLParser/spec-02-13.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + +# ASCII Art +--- | + \//||\/|| + // || ||__ diff --git a/test/YAMLParser/spec-02-14.data b/test/YAMLParser/spec-02-14.data new file mode 100644 index 0000000..5a18ea2 --- /dev/null +++ b/test/YAMLParser/spec-02-14.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + +--- + Mark McGwire's + year was crippled + by a knee injury. diff --git a/test/YAMLParser/spec-02-15.data b/test/YAMLParser/spec-02-15.data new file mode 100644 index 0000000..2a7fbe9 --- /dev/null +++ b/test/YAMLParser/spec-02-15.data @@ -0,0 +1,10 @@ +# RUN: yaml-bench -canonical %s + +> + Sammy Sosa completed another + fine season with great stats. + + 63 Home Runs + 0.288 Batting Average + + What a year! diff --git a/test/YAMLParser/spec-02-16.data b/test/YAMLParser/spec-02-16.data new file mode 100644 index 0000000..3a5792c --- /dev/null +++ b/test/YAMLParser/spec-02-16.data @@ -0,0 +1,9 @@ +# RUN: yaml-bench -canonical %s + +name: Mark McGwire +accomplishment: > + Mark set a major league + home run record in 1998. +stats: | + 65 Home Runs + 0.278 Batting Average diff --git a/test/YAMLParser/spec-02-17.data b/test/YAMLParser/spec-02-17.data new file mode 100644 index 0000000..2bcb60c --- /dev/null +++ b/test/YAMLParser/spec-02-17.data @@ -0,0 +1,16 @@ +# RUN: yaml-bench -canonical %s + +unicode: "Sosa did fine.\u263A" +control: "\b1998\t1999\t2000\n" +hexesc: "\x13\x10 is \r\n" + +single: '"Howdy!" he cried.' +quoted: ' # not a ''comment''.' +tie-fighter: '|\-*-/|' + +# CHECK: !!str "Sosa did fine.\u263A" +# CHECK: !!str "\b1998\t1999\t2000\n" +# CHECK: !!str "\x13\x10 is \r\n" +# CHECK: !!str "\"Howdy!\" he cried." +# CHECK: !!str " # not a 'comment'." +# CHECK: !!str "|\\-*-/|" diff --git a/test/YAMLParser/spec-02-18.data b/test/YAMLParser/spec-02-18.data new file mode 100644 index 0000000..625a496 --- /dev/null +++ b/test/YAMLParser/spec-02-18.data @@ -0,0 +1,8 @@ +# RUN: yaml-bench -canonical %s + +plain: + This unquoted scalar + spans many lines. + +quoted: "So does this + quoted scalar.\n" diff --git a/test/YAMLParser/spec-02-19.data b/test/YAMLParser/spec-02-19.data new file mode 100644 index 0000000..cb9df6d --- /dev/null +++ b/test/YAMLParser/spec-02-19.data @@ -0,0 +1,7 @@ +# RUN: yaml-bench -canonical %s + +canonical: 12345 +decimal: +12,345 +sexagesimal: 3:25:45 +octal: 014 +hexadecimal: 0xC diff --git a/test/YAMLParser/spec-02-20.data b/test/YAMLParser/spec-02-20.data new file mode 100644 index 0000000..ed14798 --- /dev/null +++ b/test/YAMLParser/spec-02-20.data @@ -0,0 +1,8 @@ +# RUN: yaml-bench -canonical %s + +canonical: 1.23015e+3 +exponential: 12.3015e+02 +sexagesimal: 20:30.15 +fixed: 1,230.15 +negative infinity: -.inf +not a number: .NaN diff --git a/test/YAMLParser/spec-02-21.data b/test/YAMLParser/spec-02-21.data new file mode 100644 index 0000000..ea979db --- /dev/null +++ b/test/YAMLParser/spec-02-21.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + +null: ~ +true: y +false: n +string: '12345' diff --git a/test/YAMLParser/spec-02-22.data b/test/YAMLParser/spec-02-22.data new file mode 100644 index 0000000..77724f7 --- /dev/null +++ b/test/YAMLParser/spec-02-22.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + +canonical: 2001-12-15T02:59:43.1Z +iso8601: 2001-12-14t21:59:43.10-05:00 +spaced: 2001-12-14 21:59:43.10 -5 +date: 2002-12-14 diff --git a/test/YAMLParser/spec-02-23.data b/test/YAMLParser/spec-02-23.data new file mode 100644 index 0000000..d08dfa7 --- /dev/null +++ b/test/YAMLParser/spec-02-23.data @@ -0,0 +1,15 @@ +# RUN: yaml-bench -canonical %s + +--- +not-date: !!str 2002-04-28 + +picture: !!binary | + R0lGODlhDAAMAIQAAP//9/X + 17unp5WZmZgAAAOfn515eXv + Pz7Y6OjuDg4J+fn5OTk6enp + 56enmleECcgggoBADs= + +application specific tag: !something | + The semantics of the tag + above may be different for + different documents. diff --git a/test/YAMLParser/spec-02-24.data b/test/YAMLParser/spec-02-24.data new file mode 100644 index 0000000..01ca7f5 --- /dev/null +++ b/test/YAMLParser/spec-02-24.data @@ -0,0 +1,16 @@ +# RUN: yaml-bench -canonical %s + +%TAG ! tag:clarkevans.com,2002: +--- !shape + # Use the ! handle for presenting + # tag:clarkevans.com,2002:circle +- !circle + center: &ORIGIN {x: 73, y: 129} + radius: 7 +- !line + start: *ORIGIN + finish: { x: 89, y: 102 } +- !label + start: *ORIGIN + color: 0xFFEEBB + text: Pretty vector drawing. diff --git a/test/YAMLParser/spec-02-25.data b/test/YAMLParser/spec-02-25.data new file mode 100644 index 0000000..fbadfda --- /dev/null +++ b/test/YAMLParser/spec-02-25.data @@ -0,0 +1,9 @@ +# RUN: yaml-bench -canonical %s + +# sets are represented as a +# mapping where each key is +# associated with the empty string +--- !!set +? Mark McGwire +? Sammy Sosa +? Ken Griff diff --git a/test/YAMLParser/spec-02-26.data b/test/YAMLParser/spec-02-26.data new file mode 100644 index 0000000..257108e --- /dev/null +++ b/test/YAMLParser/spec-02-26.data @@ -0,0 +1,9 @@ +# RUN: yaml-bench -canonical %s + +# ordered maps are represented as +# a sequence of mappings, with +# each mapping having one key +--- !!omap +- Mark McGwire: 65 +- Sammy Sosa: 63 +- Ken Griffy: 58 diff --git a/test/YAMLParser/spec-02-27.data b/test/YAMLParser/spec-02-27.data new file mode 100644 index 0000000..a190ff1 --- /dev/null +++ b/test/YAMLParser/spec-02-27.data @@ -0,0 +1,31 @@ +# RUN: yaml-bench -canonical %s + +--- !<tag:clarkevans.com,2002:invoice> +invoice: 34843 +date : 2001-01-23 +bill-to: &id001 + given : Chris + family : Dumars + address: + lines: | + 458 Walkman Dr. + Suite #292 + city : Royal Oak + state : MI + postal : 48046 +ship-to: *id001 +product: + - sku : BL394D + quantity : 4 + description : Basketball + price : 450.00 + - sku : BL4438H + quantity : 1 + description : Super Hoop + price : 2392.00 +tax : 251.42 +total: 4443.52 +comments: + Late afternoon is best. + Backup contact is Nancy + Billsmer @ 338-4338. diff --git a/test/YAMLParser/spec-02-28.data b/test/YAMLParser/spec-02-28.data new file mode 100644 index 0000000..695c27f --- /dev/null +++ b/test/YAMLParser/spec-02-28.data @@ -0,0 +1,28 @@ +# RUN: yaml-bench -canonical %s + +--- +Time: 2001-11-23 15:01:42 -5 +User: ed +Warning: + This is an error message + for the log file +--- +Time: 2001-11-23 15:02:31 -5 +User: ed +Warning: + A slightly different error + message. +--- +Date: 2001-11-23 15:03:17 -5 +User: ed +Fatal: + Unknown variable "bar" +Stack: + - file: TopClass.py + line: 23 + code: | + x = MoreObject("345\n") + - file: MoreClass.py + line: 58 + code: |- + foo = bar diff --git a/test/YAMLParser/spec-05-01-utf8.data b/test/YAMLParser/spec-05-01-utf8.data new file mode 100644 index 0000000..349da06 --- /dev/null +++ b/test/YAMLParser/spec-05-01-utf8.data @@ -0,0 +1,3 @@ +# RUN: yaml-bench -canonical %s + +# Comment only. diff --git a/test/YAMLParser/spec-05-02-utf8.data b/test/YAMLParser/spec-05-02-utf8.data new file mode 100644 index 0000000..b306bdb --- /dev/null +++ b/test/YAMLParser/spec-05-02-utf8.data @@ -0,0 +1,7 @@ +# RUN: yaml-bench -canonical %s |& FileCheck %s + +# Invalid use of BOM +# inside a +# document. + +# CHECK: error diff --git a/test/YAMLParser/spec-05-03.data b/test/YAMLParser/spec-05-03.data new file mode 100644 index 0000000..461e98d --- /dev/null +++ b/test/YAMLParser/spec-05-03.data @@ -0,0 +1,9 @@ +# RUN: yaml-bench -canonical %s + +sequence: +- one +- two +mapping: + ? sky + : blue + ? sea : green diff --git a/test/YAMLParser/spec-05-04.data b/test/YAMLParser/spec-05-04.data new file mode 100644 index 0000000..52850f4 --- /dev/null +++ b/test/YAMLParser/spec-05-04.data @@ -0,0 +1,4 @@ +# RUN: yaml-bench -canonical %s + +sequence: [ one, two, ] +mapping: { sky: blue, sea: green } diff --git a/test/YAMLParser/spec-05-05.data b/test/YAMLParser/spec-05-05.data new file mode 100644 index 0000000..499ee8f --- /dev/null +++ b/test/YAMLParser/spec-05-05.data @@ -0,0 +1,3 @@ +# RUN: yaml-bench -canonical %s + +# Comment only. diff --git a/test/YAMLParser/spec-05-06.data b/test/YAMLParser/spec-05-06.data new file mode 100644 index 0000000..729141a --- /dev/null +++ b/test/YAMLParser/spec-05-06.data @@ -0,0 +1,4 @@ +# RUN: yaml-bench -canonical %s + +anchored: !local &anchor value +alias: *anchor diff --git a/test/YAMLParser/spec-05-07.data b/test/YAMLParser/spec-05-07.data new file mode 100644 index 0000000..fc80a0d --- /dev/null +++ b/test/YAMLParser/spec-05-07.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + +literal: | + text +folded: > + text diff --git a/test/YAMLParser/spec-05-08.data b/test/YAMLParser/spec-05-08.data new file mode 100644 index 0000000..9f2b7ec --- /dev/null +++ b/test/YAMLParser/spec-05-08.data @@ -0,0 +1,4 @@ +# RUN: yaml-bench -canonical %s + +single: 'text' +double: "text" diff --git a/test/YAMLParser/spec-05-09.data b/test/YAMLParser/spec-05-09.data new file mode 100644 index 0000000..fc061fb --- /dev/null +++ b/test/YAMLParser/spec-05-09.data @@ -0,0 +1,4 @@ +# RUN: yaml-bench -canonical %s + +%YAML 1.1 +--- text diff --git a/test/YAMLParser/spec-05-10.data b/test/YAMLParser/spec-05-10.data new file mode 100644 index 0000000..6788f0b --- /dev/null +++ b/test/YAMLParser/spec-05-10.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s |& FileCheck %s + +commercial-at: @text +grave-accent: `text + +# CHECK: error diff --git a/test/YAMLParser/spec-05-11.data b/test/YAMLParser/spec-05-11.data new file mode 100644 index 0000000..7cba556 --- /dev/null +++ b/test/YAMLParser/spec-05-11.data @@ -0,0 +1,5 @@ +# RUN: yaml-bench -canonical %s + +| + Generic line break (no glyph) + Generic line break (glyphed)
Line separator
Paragraph separator
diff --git a/test/YAMLParser/spec-05-12.data b/test/YAMLParser/spec-05-12.data new file mode 100644 index 0000000..7dadff7 --- /dev/null +++ b/test/YAMLParser/spec-05-12.data @@ -0,0 +1,16 @@ +# RUN: yaml-bench -canonical %s |& FileCheck %s +# +# We don't currently reject tabs as indentation. +# XFAIL: * + +# Tabs do's and don'ts: +# comment: +quoted: "Quoted " +block: | + void main() { + printf("Hello, world!\n"); + } +elsewhere: # separation + indentation, in plain scalar + +# CHECK: error diff --git a/test/YAMLParser/spec-05-13.data b/test/YAMLParser/spec-05-13.data new file mode 100644 index 0000000..db62e86 --- /dev/null +++ b/test/YAMLParser/spec-05-13.data @@ -0,0 +1,5 @@ +# RUN: yaml-bench -canonical %s + + "Text containing + both space and + tab characters" diff --git a/test/YAMLParser/spec-05-14.data b/test/YAMLParser/spec-05-14.data new file mode 100644 index 0000000..6545165 --- /dev/null +++ b/test/YAMLParser/spec-05-14.data @@ -0,0 +1,9 @@ +# RUN: yaml-bench -canonical %s + +"Fun with \\ +\" \a \b \e \f \ +\n \r \t \v \0 \ +\ \_ \N \L \P \ +\x41 \u0041 \U00000041" + +# CHECK: !!str "Fun with \\\n\" \a \b \e \f \n \r \t \v \0 \_ \N \L \P A A A" diff --git a/test/YAMLParser/spec-05-15.data b/test/YAMLParser/spec-05-15.data new file mode 100644 index 0000000..cd8421a --- /dev/null +++ b/test/YAMLParser/spec-05-15.data @@ -0,0 +1,7 @@ +# RUN: yaml-bench -canonical %s |& FileCheck %s + +Bad escapes: + "\c + \xq-" + +# CHECK: error diff --git a/test/YAMLParser/spec-06-01.data b/test/YAMLParser/spec-06-01.data new file mode 100644 index 0000000..95b26bd --- /dev/null +++ b/test/YAMLParser/spec-06-01.data @@ -0,0 +1,16 @@ +# RUN: yaml-bench -canonical %s + + # Leading comment line spaces are + # neither content nor indentation. + +Not indented: + By one space: | + By four + spaces + Flow style: [ # Leading spaces + By two, # in flow style + Also by two, # are neither +# Tabs are not allowed: +# Still by two # content nor + Still by two # content nor + ] # indentation. diff --git a/test/YAMLParser/spec-06-02.data b/test/YAMLParser/spec-06-02.data new file mode 100644 index 0000000..40a15c9 --- /dev/null +++ b/test/YAMLParser/spec-06-02.data @@ -0,0 +1,5 @@ +# RUN: yaml-bench -canonical %s + + # Comment + + diff --git a/test/YAMLParser/spec-06-03.data b/test/YAMLParser/spec-06-03.data new file mode 100644 index 0000000..c1893ef --- /dev/null +++ b/test/YAMLParser/spec-06-03.data @@ -0,0 +1,4 @@ +# RUN: yaml-bench -canonical %s + +key: # Comment + value diff --git a/test/YAMLParser/spec-06-04.data b/test/YAMLParser/spec-06-04.data new file mode 100644 index 0000000..b61bcc6 --- /dev/null +++ b/test/YAMLParser/spec-06-04.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + +key: # Comment + # lines + value + diff --git a/test/YAMLParser/spec-06-05.data b/test/YAMLParser/spec-06-05.data new file mode 100644 index 0000000..4bcaa5a --- /dev/null +++ b/test/YAMLParser/spec-06-05.data @@ -0,0 +1,8 @@ +# RUN: yaml-bench -canonical %s + +{ first: Sammy, last: Sosa }: +# Statistics: + hr: # Home runs + 65 + avg: # Average + 0.278 diff --git a/test/YAMLParser/spec-06-06.data b/test/YAMLParser/spec-06-06.data new file mode 100644 index 0000000..67e39dd --- /dev/null +++ b/test/YAMLParser/spec-06-06.data @@ -0,0 +1,9 @@ +# RUN: yaml-bench -canonical %s + +plain: text + lines +quoted: "text + lines" +block: | + text + lines diff --git a/test/YAMLParser/spec-06-07.data b/test/YAMLParser/spec-06-07.data new file mode 100644 index 0000000..451bd34 --- /dev/null +++ b/test/YAMLParser/spec-06-07.data @@ -0,0 +1,10 @@ +# RUN: yaml-bench -canonical %s + +- foo + + bar +- |- + foo + + bar + diff --git a/test/YAMLParser/spec-06-08.data b/test/YAMLParser/spec-06-08.data new file mode 100644 index 0000000..aa06f84 --- /dev/null +++ b/test/YAMLParser/spec-06-08.data @@ -0,0 +1,4 @@ +# RUN: yaml-bench -canonical %s + +>- + specific
trimmed
as
space diff --git a/test/YAMLParser/spec-07-01.data b/test/YAMLParser/spec-07-01.data new file mode 100644 index 0000000..21bc5e5 --- /dev/null +++ b/test/YAMLParser/spec-07-01.data @@ -0,0 +1,5 @@ +# RUN: yaml-bench -canonical %s + +%FOO bar baz # Should be ignored + # with a warning. +--- "foo" diff --git a/test/YAMLParser/spec-07-02.data b/test/YAMLParser/spec-07-02.data new file mode 100644 index 0000000..bf0e758 --- /dev/null +++ b/test/YAMLParser/spec-07-02.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + +%YAML 1.2 # Attempt parsing + # with a warning +--- +"foo" diff --git a/test/YAMLParser/spec-07-03.data b/test/YAMLParser/spec-07-03.data new file mode 100644 index 0000000..7ca9483 --- /dev/null +++ b/test/YAMLParser/spec-07-03.data @@ -0,0 +1,7 @@ +# RUN: yaml-bench -canonical %s |& FileCheck %s + +%YAML 1.1 +%YAML 1.1 +foo + +# CHECK: error diff --git a/test/YAMLParser/spec-07-04.data b/test/YAMLParser/spec-07-04.data new file mode 100644 index 0000000..beba7d0 --- /dev/null +++ b/test/YAMLParser/spec-07-04.data @@ -0,0 +1,5 @@ +# RUN: yaml-bench -canonical %s + +%TAG !yaml! tag:yaml.org,2002: +--- +!yaml!str "foo" diff --git a/test/YAMLParser/spec-07-05.data b/test/YAMLParser/spec-07-05.data new file mode 100644 index 0000000..279b54a --- /dev/null +++ b/test/YAMLParser/spec-07-05.data @@ -0,0 +1,10 @@ +# RUN: yaml-bench -canonical %s |& FileCheck %s +# +# We don't currently parse TAG directives. +# XFAIL: * + +%TAG ! !foo +%TAG ! !foo +bar + +# CHECK: error diff --git a/test/YAMLParser/spec-07-06.data b/test/YAMLParser/spec-07-06.data new file mode 100644 index 0000000..9f27f91 --- /dev/null +++ b/test/YAMLParser/spec-07-06.data @@ -0,0 +1,7 @@ +# RUN: yaml-bench -canonical %s + +%TAG ! !foo +%TAG !yaml! tag:yaml.org,2002: +--- +- !bar "baz" +- !yaml!str "string" diff --git a/test/YAMLParser/spec-07-07a.data b/test/YAMLParser/spec-07-07a.data new file mode 100644 index 0000000..e51f8f7 --- /dev/null +++ b/test/YAMLParser/spec-07-07a.data @@ -0,0 +1,4 @@ +# RUN: yaml-bench -canonical %s + +# Private application: +!foo "bar" diff --git a/test/YAMLParser/spec-07-07b.data b/test/YAMLParser/spec-07-07b.data new file mode 100644 index 0000000..003d575 --- /dev/null +++ b/test/YAMLParser/spec-07-07b.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + +# Migrated to global: +%TAG ! tag:ben-kiki.org,2000:app/ +--- +!foo "bar" diff --git a/test/YAMLParser/spec-07-08.data b/test/YAMLParser/spec-07-08.data new file mode 100644 index 0000000..7197404 --- /dev/null +++ b/test/YAMLParser/spec-07-08.data @@ -0,0 +1,11 @@ +# RUN: yaml-bench -canonical %s + +# Explicitly specify default settings: +%TAG ! ! +%TAG !! tag:yaml.org,2002: +# Named handles have no default: +%TAG !o! tag:ben-kiki.org,2000: +--- +- !foo "bar" +- !!str "string" +- !o!type "baz" diff --git a/test/YAMLParser/spec-07-09.data b/test/YAMLParser/spec-07-09.data new file mode 100644 index 0000000..1f98ba0 --- /dev/null +++ b/test/YAMLParser/spec-07-09.data @@ -0,0 +1,13 @@ +# RUN: yaml-bench -canonical %s + +--- +foo +... +# Repeated end marker. +... +--- +bar +# No end marker. +--- +baz +... diff --git a/test/YAMLParser/spec-07-10.data b/test/YAMLParser/spec-07-10.data new file mode 100644 index 0000000..a176683 --- /dev/null +++ b/test/YAMLParser/spec-07-10.data @@ -0,0 +1,13 @@ +# RUN: yaml-bench -canonical %s + +"Root flow + scalar" +--- !!str > + Root block + scalar +--- +# Root collection: +foo : bar +... # Is optional. +--- +# Explicit document may be empty. diff --git a/test/YAMLParser/spec-07-11.data b/test/YAMLParser/spec-07-11.data new file mode 100644 index 0000000..ce14b7e --- /dev/null +++ b/test/YAMLParser/spec-07-11.data @@ -0,0 +1,4 @@ +# RUN: yaml-bench -canonical %s + +# A stream may contain +# no documents. diff --git a/test/YAMLParser/spec-07-12a.data b/test/YAMLParser/spec-07-12a.data new file mode 100644 index 0000000..7327f81 --- /dev/null +++ b/test/YAMLParser/spec-07-12a.data @@ -0,0 +1,5 @@ +# RUN: yaml-bench -canonical %s + +# Implicit document. Root +# collection (mapping) node. +foo : bar diff --git a/test/YAMLParser/spec-07-12b.data b/test/YAMLParser/spec-07-12b.data new file mode 100644 index 0000000..d759abe --- /dev/null +++ b/test/YAMLParser/spec-07-12b.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + +# Explicit document. Root +# scalar (literal) node. +--- | + Text content diff --git a/test/YAMLParser/spec-07-13.data b/test/YAMLParser/spec-07-13.data new file mode 100644 index 0000000..ab74df1 --- /dev/null +++ b/test/YAMLParser/spec-07-13.data @@ -0,0 +1,11 @@ +# RUN: yaml-bench -canonical %s + +! "First document" +--- +!foo "No directives" +%TAG ! !foo +--- +!bar "With directives" +%YAML 1.1 +--- +!baz "Reset settings" diff --git a/test/YAMLParser/spec-08-01.data b/test/YAMLParser/spec-08-01.data new file mode 100644 index 0000000..5abbfa8 --- /dev/null +++ b/test/YAMLParser/spec-08-01.data @@ -0,0 +1,4 @@ +# RUN: yaml-bench -canonical %s + +!!str &a1 "foo" : !!str bar +&a2 baz : *a1 diff --git a/test/YAMLParser/spec-08-02.data b/test/YAMLParser/spec-08-02.data new file mode 100644 index 0000000..8a75783 --- /dev/null +++ b/test/YAMLParser/spec-08-02.data @@ -0,0 +1,4 @@ +# RUN: yaml-bench -canonical %s + +First occurrence: &anchor Value +Second occurrence: *anchor diff --git a/test/YAMLParser/spec-08-03.data b/test/YAMLParser/spec-08-03.data new file mode 100644 index 0000000..8c71530 --- /dev/null +++ b/test/YAMLParser/spec-08-03.data @@ -0,0 +1,4 @@ +# RUN: yaml-bench -canonical %s + +!<tag:yaml.org,2002:str> foo : + !<!bar> baz diff --git a/test/YAMLParser/spec-08-04.data b/test/YAMLParser/spec-08-04.data new file mode 100644 index 0000000..f13538b --- /dev/null +++ b/test/YAMLParser/spec-08-04.data @@ -0,0 +1,9 @@ +# RUN: yaml-bench -canonical %s |& FileCheck %s +# +# We don't currently look at the content of literal tags. +# XFAIL: * + +- !<!> foo +- !<$:?> bar + +# CHECK: error diff --git a/test/YAMLParser/spec-08-05.data b/test/YAMLParser/spec-08-05.data new file mode 100644 index 0000000..0613446 --- /dev/null +++ b/test/YAMLParser/spec-08-05.data @@ -0,0 +1,7 @@ +# RUN: yaml-bench -canonical %s + +%TAG !o! tag:ben-kiki.org,2000: +--- +- !local foo +- !!str bar +- !o!type baz diff --git a/test/YAMLParser/spec-08-06.data b/test/YAMLParser/spec-08-06.data new file mode 100644 index 0000000..a811bfd --- /dev/null +++ b/test/YAMLParser/spec-08-06.data @@ -0,0 +1,12 @@ +# RUN: yaml-bench -canonical %s |& FileCheck %s +# +# We don't currently validate tags. +# XFAIL: * + +%TAG !o! tag:ben-kiki.org,2000: +--- +- !$a!b foo +- !o! bar +- !h!type baz + +# CHECK: error diff --git a/test/YAMLParser/spec-08-07.data b/test/YAMLParser/spec-08-07.data new file mode 100644 index 0000000..fc3f2df --- /dev/null +++ b/test/YAMLParser/spec-08-07.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + +# Assuming conventional resolution: +- "12" +- 12 +- ! 12 diff --git a/test/YAMLParser/spec-08-08.data b/test/YAMLParser/spec-08-08.data new file mode 100644 index 0000000..460029f --- /dev/null +++ b/test/YAMLParser/spec-08-08.data @@ -0,0 +1,15 @@ +# RUN: yaml-bench -canonical %s + +--- +foo: + "bar + baz" +--- +"foo + bar" +--- +foo + bar +--- | + foo +... diff --git a/test/YAMLParser/spec-08-09.data b/test/YAMLParser/spec-08-09.data new file mode 100644 index 0000000..1c82585 --- /dev/null +++ b/test/YAMLParser/spec-08-09.data @@ -0,0 +1,13 @@ +# RUN: yaml-bench -canonical %s + +--- +scalars: + plain: !!str some text + quoted: + single: 'some text' + double: "some text" +collections: + sequence: !!seq [ !!str entry, + # Mapping entry: + key: value ] + mapping: { key: value } diff --git a/test/YAMLParser/spec-08-10.data b/test/YAMLParser/spec-08-10.data new file mode 100644 index 0000000..74054eb --- /dev/null +++ b/test/YAMLParser/spec-08-10.data @@ -0,0 +1,17 @@ +# RUN: yaml-bench -canonical %s + +block styles: + scalars: + literal: !!str | + #!/usr/bin/perl + print "Hello, world!\n"; + folded: > + This sentence + is false. + collections: !!map + sequence: !!seq # Entry: + - entry # Plain + # Mapping entry: + - key: value + mapping: + key: value diff --git a/test/YAMLParser/spec-08-11.data b/test/YAMLParser/spec-08-11.data new file mode 100644 index 0000000..8a75783 --- /dev/null +++ b/test/YAMLParser/spec-08-11.data @@ -0,0 +1,4 @@ +# RUN: yaml-bench -canonical %s + +First occurrence: &anchor Value +Second occurrence: *anchor diff --git a/test/YAMLParser/spec-08-12.data b/test/YAMLParser/spec-08-12.data new file mode 100644 index 0000000..69e78b4 --- /dev/null +++ b/test/YAMLParser/spec-08-12.data @@ -0,0 +1,10 @@ +# RUN: yaml-bench -canonical %s + +[ + Without properties, + &anchor "Anchored", + !!str 'Tagged', + *anchor, # Alias node + !!str , # Empty plain scalar + '', # Empty plain scalar +] diff --git a/test/YAMLParser/spec-08-13.data b/test/YAMLParser/spec-08-13.data new file mode 100644 index 0000000..931d56a --- /dev/null +++ b/test/YAMLParser/spec-08-13.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + +{ + ? foo :, + ? : bar, +} diff --git a/test/YAMLParser/spec-08-14.data b/test/YAMLParser/spec-08-14.data new file mode 100644 index 0000000..61c4483 --- /dev/null +++ b/test/YAMLParser/spec-08-14.data @@ -0,0 +1,7 @@ +# RUN: yaml-bench -canonical %s + +- "flow in block" +- > + Block scalar +- !!map # Block collection + foo : bar diff --git a/test/YAMLParser/spec-08-15.data b/test/YAMLParser/spec-08-15.data new file mode 100644 index 0000000..f21e84a --- /dev/null +++ b/test/YAMLParser/spec-08-15.data @@ -0,0 +1,7 @@ +# RUN: yaml-bench -canonical %s + +- # Empty plain scalar +- ? foo + : + ? + : bar diff --git a/test/YAMLParser/spec-09-01.data b/test/YAMLParser/spec-09-01.data new file mode 100644 index 0000000..8999b49 --- /dev/null +++ b/test/YAMLParser/spec-09-01.data @@ -0,0 +1,8 @@ +# RUN: yaml-bench -canonical %s + +"simple key" : { + "also simple" : value, + ? "not a + simple key" : "any + value" +} diff --git a/test/YAMLParser/spec-09-02.data b/test/YAMLParser/spec-09-02.data new file mode 100644 index 0000000..f690378 --- /dev/null +++ b/test/YAMLParser/spec-09-02.data @@ -0,0 +1,14 @@ +# RUN: yaml-bench -canonical %s |& FileCheck %s +# +# Indent trimming is not yet implemented. +# XFAIL: * + + "as space + trimmed + + specific + + escaped \ + none" + +# CHECK: !!str "as space trimmed\nspecific\nescaped\tnone" diff --git a/test/YAMLParser/spec-09-03.data b/test/YAMLParser/spec-09-03.data new file mode 100644 index 0000000..3fb0d8b --- /dev/null +++ b/test/YAMLParser/spec-09-03.data @@ -0,0 +1,8 @@ +# RUN: yaml-bench -canonical %s + +- " + last" +- " + last" +- " first + last" diff --git a/test/YAMLParser/spec-09-04.data b/test/YAMLParser/spec-09-04.data new file mode 100644 index 0000000..4178ec6 --- /dev/null +++ b/test/YAMLParser/spec-09-04.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + + "first + inner 1 + \ inner 2 \ + last" diff --git a/test/YAMLParser/spec-09-05.data b/test/YAMLParser/spec-09-05.data new file mode 100644 index 0000000..e482d53 --- /dev/null +++ b/test/YAMLParser/spec-09-05.data @@ -0,0 +1,10 @@ +# RUN: yaml-bench -canonical %s + +- "first + " +- "first + + last" +- "first + inner + \ last" diff --git a/test/YAMLParser/spec-09-06.data b/test/YAMLParser/spec-09-06.data new file mode 100644 index 0000000..edc0cbb --- /dev/null +++ b/test/YAMLParser/spec-09-06.data @@ -0,0 +1,3 @@ +# RUN: yaml-bench -canonical %s + + 'here''s to "quotes"' diff --git a/test/YAMLParser/spec-09-07.data b/test/YAMLParser/spec-09-07.data new file mode 100644 index 0000000..3c010ca --- /dev/null +++ b/test/YAMLParser/spec-09-07.data @@ -0,0 +1,8 @@ +# RUN: yaml-bench -canonical %s + +'simple key' : { + 'also simple' : value, + ? 'not a + simple key' : 'any + value' +} diff --git a/test/YAMLParser/spec-09-08.data b/test/YAMLParser/spec-09-08.data new file mode 100644 index 0000000..d114e58 --- /dev/null +++ b/test/YAMLParser/spec-09-08.data @@ -0,0 +1,3 @@ +# RUN: yaml-bench -canonical %s + + 'as space
trimmed
specific
none' diff --git a/test/YAMLParser/spec-09-09.data b/test/YAMLParser/spec-09-09.data new file mode 100644 index 0000000..2fec1b5 --- /dev/null +++ b/test/YAMLParser/spec-09-09.data @@ -0,0 +1,8 @@ +# RUN: yaml-bench -canonical %s + +- ' + last' +- ' + last' +- ' first + last' diff --git a/test/YAMLParser/spec-09-10.data b/test/YAMLParser/spec-09-10.data new file mode 100644 index 0000000..faabfb0 --- /dev/null +++ b/test/YAMLParser/spec-09-10.data @@ -0,0 +1,5 @@ +# RUN: yaml-bench -canonical %s + + 'first + inner + last' diff --git a/test/YAMLParser/spec-09-11.data b/test/YAMLParser/spec-09-11.data new file mode 100644 index 0000000..3f487ad --- /dev/null +++ b/test/YAMLParser/spec-09-11.data @@ -0,0 +1,7 @@ +# RUN: yaml-bench -canonical %s + +- 'first + ' +- 'first + + last' diff --git a/test/YAMLParser/spec-09-12.data b/test/YAMLParser/spec-09-12.data new file mode 100644 index 0000000..d992c58 --- /dev/null +++ b/test/YAMLParser/spec-09-12.data @@ -0,0 +1,10 @@ +# RUN: yaml-bench -canonical %s + +# Outside flow collection: +- ::std::vector +- Up, up, and away! +- -123 +# Inside flow collection: +- [ '::std::vector', + "Up, up, and away!", + -123 ] diff --git a/test/YAMLParser/spec-09-13.data b/test/YAMLParser/spec-09-13.data new file mode 100644 index 0000000..d48f2d2 --- /dev/null +++ b/test/YAMLParser/spec-09-13.data @@ -0,0 +1,8 @@ +# RUN: yaml-bench -canonical %s + +simple key : { + also simple : value, + ? not a + simple key : any + value +} diff --git a/test/YAMLParser/spec-09-14.data b/test/YAMLParser/spec-09-14.data new file mode 100644 index 0000000..890f6bf --- /dev/null +++ b/test/YAMLParser/spec-09-14.data @@ -0,0 +1,21 @@ +# RUN: yaml-bench -canonical %s |& FileCheck %s +# +# Not quite sure why this doesn't fail. +# XFAIL: * + +--- +--- ||| : foo +... >>>: bar +--- +[ +--- +, +... , +{ +--- : +... # Nested +} +] +... + +# CHECK: error diff --git a/test/YAMLParser/spec-09-15.data b/test/YAMLParser/spec-09-15.data new file mode 100644 index 0000000..4111d1b --- /dev/null +++ b/test/YAMLParser/spec-09-15.data @@ -0,0 +1,15 @@ +# RUN: yaml-bench -canonical %s + +--- +"---" : foo +...: bar +--- +[ +---, +..., +{ +? --- +: ... +} +] +... diff --git a/test/YAMLParser/spec-09-16.data b/test/YAMLParser/spec-09-16.data new file mode 100644 index 0000000..e595f47 --- /dev/null +++ b/test/YAMLParser/spec-09-16.data @@ -0,0 +1,5 @@ +# RUN: yaml-bench -canonical %s + +# Tabs are confusing: +# as space/trimmed/specific/none + as space
trimmed
specific
none diff --git a/test/YAMLParser/spec-09-17.data b/test/YAMLParser/spec-09-17.data new file mode 100644 index 0000000..1bacf4d --- /dev/null +++ b/test/YAMLParser/spec-09-17.data @@ -0,0 +1,5 @@ +# RUN: yaml-bench -canonical %s + + first line + + more line diff --git a/test/YAMLParser/spec-09-18.data b/test/YAMLParser/spec-09-18.data new file mode 100644 index 0000000..ac623f9 --- /dev/null +++ b/test/YAMLParser/spec-09-18.data @@ -0,0 +1,11 @@ +# RUN: yaml-bench -canonical %s + +- | # Just the style + literal +- >1 # Indentation indicator + folded +- |+ # Chomping indicator + keep + +- >-1 # Both indicators + strip diff --git a/test/YAMLParser/spec-09-19.data b/test/YAMLParser/spec-09-19.data new file mode 100644 index 0000000..52aa157 --- /dev/null +++ b/test/YAMLParser/spec-09-19.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + +- | + literal +- > + folded diff --git a/test/YAMLParser/spec-09-20.data b/test/YAMLParser/spec-09-20.data new file mode 100644 index 0000000..86fc7ab --- /dev/null +++ b/test/YAMLParser/spec-09-20.data @@ -0,0 +1,13 @@ +# RUN: yaml-bench -canonical %s + +- | + detected +- > + + + # detected +- |1 + explicit +- > + + detected diff --git a/test/YAMLParser/spec-09-21.data b/test/YAMLParser/spec-09-21.data new file mode 100644 index 0000000..2bcc283 --- /dev/null +++ b/test/YAMLParser/spec-09-21.data @@ -0,0 +1,12 @@ +# RUN: yaml-bench -canonical %s |& FileCheck %s + +- | + + text +- > + text + text +- |1 + text + +# CHECK: error diff --git a/test/YAMLParser/spec-09-22.data b/test/YAMLParser/spec-09-22.data new file mode 100644 index 0000000..b95faa5 --- /dev/null +++ b/test/YAMLParser/spec-09-22.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + +strip: |- + text
clip: | + text
keep: |+ + text
diff --git a/test/YAMLParser/spec-09-23.data b/test/YAMLParser/spec-09-23.data new file mode 100644 index 0000000..94f8398 --- /dev/null +++ b/test/YAMLParser/spec-09-23.data @@ -0,0 +1,13 @@ +# RUN: yaml-bench -canonical %s + + # Strip + # Comments: +strip: |- + # text
# Clip + # comments: +
clip: | + # text
# Keep + # comments: +
keep: |+ + # text
# Trail + # comments. diff --git a/test/YAMLParser/spec-09-24.data b/test/YAMLParser/spec-09-24.data new file mode 100644 index 0000000..f08eae6 --- /dev/null +++ b/test/YAMLParser/spec-09-24.data @@ -0,0 +1,8 @@ +# RUN: yaml-bench -canonical %s + +strip: >- + +clip: > + +keep: |+ + diff --git a/test/YAMLParser/spec-09-25.data b/test/YAMLParser/spec-09-25.data new file mode 100644 index 0000000..b15edb5 --- /dev/null +++ b/test/YAMLParser/spec-09-25.data @@ -0,0 +1,5 @@ +# RUN: yaml-bench -canonical %s + +| # Simple block scalar + literal + text diff --git a/test/YAMLParser/spec-09-26.data b/test/YAMLParser/spec-09-26.data new file mode 100644 index 0000000..286740e --- /dev/null +++ b/test/YAMLParser/spec-09-26.data @@ -0,0 +1,10 @@ +# RUN: yaml-bench -canonical %s + +| + + + literal + + text + + # Comment diff --git a/test/YAMLParser/spec-09-27.data b/test/YAMLParser/spec-09-27.data new file mode 100644 index 0000000..286740e --- /dev/null +++ b/test/YAMLParser/spec-09-27.data @@ -0,0 +1,10 @@ +# RUN: yaml-bench -canonical %s + +| + + + literal + + text + + # Comment diff --git a/test/YAMLParser/spec-09-28.data b/test/YAMLParser/spec-09-28.data new file mode 100644 index 0000000..286740e --- /dev/null +++ b/test/YAMLParser/spec-09-28.data @@ -0,0 +1,10 @@ +# RUN: yaml-bench -canonical %s + +| + + + literal + + text + + # Comment diff --git a/test/YAMLParser/spec-09-29.data b/test/YAMLParser/spec-09-29.data new file mode 100644 index 0000000..e8906ff --- /dev/null +++ b/test/YAMLParser/spec-09-29.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + +> # Simple folded scalar + folded + text + lines diff --git a/test/YAMLParser/spec-09-30.data b/test/YAMLParser/spec-09-30.data new file mode 100644 index 0000000..a2d8bf4 --- /dev/null +++ b/test/YAMLParser/spec-09-30.data @@ -0,0 +1,16 @@ +# RUN: yaml-bench -canonical %s + +> + folded + line + + next + line + + * bullet + * list + + last + line + +# Comment diff --git a/test/YAMLParser/spec-09-31.data b/test/YAMLParser/spec-09-31.data new file mode 100644 index 0000000..a2d8bf4 --- /dev/null +++ b/test/YAMLParser/spec-09-31.data @@ -0,0 +1,16 @@ +# RUN: yaml-bench -canonical %s + +> + folded + line + + next + line + + * bullet + * list + + last + line + +# Comment diff --git a/test/YAMLParser/spec-09-32.data b/test/YAMLParser/spec-09-32.data new file mode 100644 index 0000000..a2d8bf4 --- /dev/null +++ b/test/YAMLParser/spec-09-32.data @@ -0,0 +1,16 @@ +# RUN: yaml-bench -canonical %s + +> + folded + line + + next + line + + * bullet + * list + + last + line + +# Comment diff --git a/test/YAMLParser/spec-09-33.data b/test/YAMLParser/spec-09-33.data new file mode 100644 index 0000000..a2d8bf4 --- /dev/null +++ b/test/YAMLParser/spec-09-33.data @@ -0,0 +1,16 @@ +# RUN: yaml-bench -canonical %s + +> + folded + line + + next + line + + * bullet + * list + + last + line + +# Comment diff --git a/test/YAMLParser/spec-10-01.data b/test/YAMLParser/spec-10-01.data new file mode 100644 index 0000000..549a54d --- /dev/null +++ b/test/YAMLParser/spec-10-01.data @@ -0,0 +1,4 @@ +# RUN: yaml-bench -canonical %s + +- [ inner, inner, ] +- [inner,last] diff --git a/test/YAMLParser/spec-10-02.data b/test/YAMLParser/spec-10-02.data new file mode 100644 index 0000000..662427a --- /dev/null +++ b/test/YAMLParser/spec-10-02.data @@ -0,0 +1,10 @@ +# RUN: yaml-bench -canonical %s + +[ +"double + quoted", 'single + quoted', +plain + text, [ nested ], +single: pair , +] diff --git a/test/YAMLParser/spec-10-03.data b/test/YAMLParser/spec-10-03.data new file mode 100644 index 0000000..43f300e --- /dev/null +++ b/test/YAMLParser/spec-10-03.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + +block: # Block + # sequence +- one +- two : three diff --git a/test/YAMLParser/spec-10-04.data b/test/YAMLParser/spec-10-04.data new file mode 100644 index 0000000..733a570 --- /dev/null +++ b/test/YAMLParser/spec-10-04.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + +block: +- one +- + - two diff --git a/test/YAMLParser/spec-10-05.data b/test/YAMLParser/spec-10-05.data new file mode 100644 index 0000000..3848b2a --- /dev/null +++ b/test/YAMLParser/spec-10-05.data @@ -0,0 +1,9 @@ +# RUN: yaml-bench -canonical %s + +- # Empty +- | + block node +- - one # in-line + - two # sequence +- one: two # in-line + # mapping diff --git a/test/YAMLParser/spec-10-06.data b/test/YAMLParser/spec-10-06.data new file mode 100644 index 0000000..40efb2b --- /dev/null +++ b/test/YAMLParser/spec-10-06.data @@ -0,0 +1,4 @@ +# RUN: yaml-bench -canonical %s + +- { inner : entry , also: inner , } +- {inner: entry,last : entry} diff --git a/test/YAMLParser/spec-10-07.data b/test/YAMLParser/spec-10-07.data new file mode 100644 index 0000000..7aa350e --- /dev/null +++ b/test/YAMLParser/spec-10-07.data @@ -0,0 +1,9 @@ +# RUN: yaml-bench -canonical %s + +{ +? : value, # Empty key +? explicit + key: value, +simple key : value, +[ collection, simple, key ]: value +} diff --git a/test/YAMLParser/spec-10-08.data b/test/YAMLParser/spec-10-08.data new file mode 100644 index 0000000..5b981e9 --- /dev/null +++ b/test/YAMLParser/spec-10-08.data @@ -0,0 +1,13 @@ +# RUN: yaml-bench -canonical %s |& FileCheck %s +# +# This fails because even without a key token, some contexts (in this case flow +# maps) allow implicit null keys, which mix with this in weird ways. +# XFAIL: * + +{ +multi-line + simple key : value, +very long ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................(>1KB)................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... key: value +} + +# CHECK: error diff --git a/test/YAMLParser/spec-10-09.data b/test/YAMLParser/spec-10-09.data new file mode 100644 index 0000000..a6b1fd0 --- /dev/null +++ b/test/YAMLParser/spec-10-09.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + +{ +key : value, +empty: # empty value↓ +} diff --git a/test/YAMLParser/spec-10-10.data b/test/YAMLParser/spec-10-10.data new file mode 100644 index 0000000..c97901d --- /dev/null +++ b/test/YAMLParser/spec-10-10.data @@ -0,0 +1,10 @@ +# RUN: yaml-bench -canonical %s + +{ +? explicit key1 : explicit value, +? explicit key2 : , # Explicit empty +? explicit key3, # Empty value +simple key1 : explicit value, +simple key2 : , # Explicit empty +simple key3, # Empty value +} diff --git a/test/YAMLParser/spec-10-11.data b/test/YAMLParser/spec-10-11.data new file mode 100644 index 0000000..51bd06f --- /dev/null +++ b/test/YAMLParser/spec-10-11.data @@ -0,0 +1,9 @@ +# RUN: yaml-bench -canonical %s + +[ +? explicit key1 : explicit value, +? explicit key2 : , # Explicit empty +? explicit key3, # Implicit empty +simple key1 : explicit value, +simple key2 : , # Explicit empty +] diff --git a/test/YAMLParser/spec-10-12.data b/test/YAMLParser/spec-10-12.data new file mode 100644 index 0000000..65a90b3 --- /dev/null +++ b/test/YAMLParser/spec-10-12.data @@ -0,0 +1,5 @@ +# RUN: yaml-bench -canonical %s + +block: # Block + # mapping + key: value diff --git a/test/YAMLParser/spec-10-13.data b/test/YAMLParser/spec-10-13.data new file mode 100644 index 0000000..ccadeb1 --- /dev/null +++ b/test/YAMLParser/spec-10-13.data @@ -0,0 +1,7 @@ +# RUN: yaml-bench -canonical %s + +? explicit key # implicit value +? | + block key +: - one # explicit in-line + - two # block value diff --git a/test/YAMLParser/spec-10-14.data b/test/YAMLParser/spec-10-14.data new file mode 100644 index 0000000..866ec1f --- /dev/null +++ b/test/YAMLParser/spec-10-14.data @@ -0,0 +1,6 @@ +# RUN: yaml-bench -canonical %s + +plain key: # empty value +"quoted key": +- one # explicit next-line +- two # block value diff --git a/test/YAMLParser/spec-10-15.data b/test/YAMLParser/spec-10-15.data new file mode 100644 index 0000000..7d061bd --- /dev/null +++ b/test/YAMLParser/spec-10-15.data @@ -0,0 +1,5 @@ +# RUN: yaml-bench -canonical %s + +- sun: yellow +- ? earth: blue + : moon: white diff --git a/test/YAMLParser/str.data b/test/YAMLParser/str.data new file mode 100644 index 0000000..bf013b6 --- /dev/null +++ b/test/YAMLParser/str.data @@ -0,0 +1,3 @@ +# RUN: yaml-bench -canonical %s + +- abcd diff --git a/test/YAMLParser/timestamp-bugs.data b/test/YAMLParser/timestamp-bugs.data new file mode 100644 index 0000000..bf41a21 --- /dev/null +++ b/test/YAMLParser/timestamp-bugs.data @@ -0,0 +1,8 @@ +# RUN: yaml-bench -canonical %s + +- 2001-12-14 21:59:43.10 -5:30 +- 2001-12-14 21:59:43.10 +5:30 +- 2001-12-14 21:59:43.00101 +- 2001-12-14 21:59:43+1 +- 2001-12-14 21:59:43-1:30 +- 2005-07-08 17:35:04.517600 diff --git a/test/YAMLParser/timestamp.data b/test/YAMLParser/timestamp.data new file mode 100644 index 0000000..7994545 --- /dev/null +++ b/test/YAMLParser/timestamp.data @@ -0,0 +1,7 @@ +# RUN: yaml-bench -canonical %s + +- 2001-12-15T02:59:43.1Z +- 2001-12-14t21:59:43.10-05:00 +- 2001-12-14 21:59:43.10 -5 +- 2001-12-15 2:59:43.10 +- 2002-12-14 diff --git a/test/YAMLParser/utf8-implicit.data b/test/YAMLParser/utf8-implicit.data new file mode 100644 index 0000000..ee2791f --- /dev/null +++ b/test/YAMLParser/utf8-implicit.data @@ -0,0 +1,3 @@ +# RUN: yaml-bench -canonical %s + +--- implicit UTF-8 diff --git a/test/YAMLParser/utf8.data b/test/YAMLParser/utf8.data new file mode 100644 index 0000000..3935e9d --- /dev/null +++ b/test/YAMLParser/utf8.data @@ -0,0 +1,3 @@ +# RUN: yaml-bench -canonical %s + +--- UTF-8 diff --git a/test/YAMLParser/value.data b/test/YAMLParser/value.data new file mode 100644 index 0000000..311ccd4 --- /dev/null +++ b/test/YAMLParser/value.data @@ -0,0 +1,3 @@ +# RUN: yaml-bench -canonical %s + +- = diff --git a/test/YAMLParser/yaml.data b/test/YAMLParser/yaml.data new file mode 100644 index 0000000..3ce5e4b --- /dev/null +++ b/test/YAMLParser/yaml.data @@ -0,0 +1,5 @@ +# RUN: yaml-bench -canonical %s + +- !!yaml '!' +- !!yaml '&' +- !!yaml '*' diff --git a/test/lib/llvm.exp b/test/lib/llvm.exp deleted file mode 100644 index e69de29..0000000 --- a/test/lib/llvm.exp +++ /dev/null diff --git a/test/lit.cfg b/test/lit.cfg index acbe97a..d74bc7b 100644 --- a/test/lit.cfg +++ b/test/lit.cfg @@ -218,70 +218,6 @@ for pattern in [r"\bbugpoint\b(?!-)", r"(?<!/|-)\bclang\b(?!-)", break config.substitutions.append((pattern, substitution)) -excludes = [] - -# Provide llvm_supports_target for use in local configs. -targets = set(site_exp["TARGETS_TO_BUILD"].split()) -def llvm_supports_target(name): - return name in targets - -def llvm_supports_darwin_and_target(name): - return 'darwin' in config.target_triple and llvm_supports_target(name) - -bindings = set([s.strip() for s in site_exp['llvm_bindings'].split(',')]) -def llvm_supports_binding(name): - return name.strip() in bindings - -# Provide on_clone hook for reading 'dg.exp'. -import os -simpleLibData = re.compile(r"""load_lib llvm.exp - -RunLLVMTests \[lsort \[glob -nocomplain \$srcdir/\$subdir/\*\.(.*)\]\]""", - re.MULTILINE) -conditionalLibData = re.compile(r"""load_lib llvm.exp - -if.*\[ ?(llvm[^ ]*) ([^ ]*) ?\].*{ - *RunLLVMTests \[lsort \[glob -nocomplain \$srcdir/\$subdir/\*\.(.*)\]\] -\}""", re.MULTILINE) -def on_clone(parent, cfg, for_path): - def addSuffixes(match): - if match[0] == '{' and match[-1] == '}': - cfg.suffixes = ['.' + s for s in match[1:-1].split(',')] - else: - cfg.suffixes = ['.' + match] - - libPath = os.path.join(os.path.dirname(for_path), - 'dg.exp') - if not os.path.exists(libPath): - return - - # Reset unsupported, in case we inherited it. - cfg.unsupported = False - lib = open(libPath).read().strip() - - # Check for a simple library. - m = simpleLibData.match(lib) - if m: - addSuffixes(m.group(1)) - return - - # Check for a conditional test set. - m = conditionalLibData.match(lib) - if m: - funcname,arg,match = m.groups() - addSuffixes(match) - - func = globals().get(funcname) - if not func: - lit.error('unsupported predicate %r' % funcname) - elif not func(arg): - cfg.unsupported = True - return - # Otherwise, give up. - lit.error('unable to understand %r:\n%s' % (libPath, lib)) - -config.on_clone = on_clone - ### Features # Shell execution @@ -300,8 +236,13 @@ if loadable_module: # llc knows whether he is compiled with -DNDEBUG. import subprocess -llc_cmd = subprocess.Popen([os.path.join(llvm_tools_dir, 'llc'), '-version'], +try: + llc_cmd = subprocess.Popen([os.path.join(llvm_tools_dir, 'llc'), '-version'], stdout = subprocess.PIPE) +except OSError, why: + print "Could not find llc in " + llvm_tools_dir + exit(42) + if re.search(r'with assertions', llc_cmd.stdout.read()): config.available_features.add('asserts') llc_cmd.wait() diff --git a/test/lit.site.cfg.in b/test/lit.site.cfg.in index 4fdfb04..8b81186 100644 --- a/test/lit.site.cfg.in +++ b/test/lit.site.cfg.in @@ -9,7 +9,6 @@ config.enable_shared = @ENABLE_SHARED@ config.enable_assertions = @ENABLE_ASSERTIONS@ config.targets_to_build = "@TARGETS_TO_BUILD@" config.llvm_bindings = "@LLVM_BINDINGS@" -config.host_os = "@HOST_OS@" # Support substitution of the tools_dir with user parameters. This is # used when we can't determine the tool dir at configuration time. |