aboutsummaryrefslogtreecommitdiffstats
path: root/test
diff options
context:
space:
mode:
Diffstat (limited to 'test')
-rw-r--r--test/MC/Disassembler/ARM/invalid-MRRC2-arm.txt4
-rw-r--r--test/MC/Disassembler/ARM/unpredictable-MRRC2-arm.txt13
2 files changed, 17 insertions, 0 deletions
diff --git a/test/MC/Disassembler/ARM/invalid-MRRC2-arm.txt b/test/MC/Disassembler/ARM/invalid-MRRC2-arm.txt
new file mode 100644
index 0000000..aaae6ce
--- /dev/null
+++ b/test/MC/Disassembler/ARM/invalid-MRRC2-arm.txt
@@ -0,0 +1,4 @@
+# RUN: llvm-mc --disassemble %s -triple=armv7-linux-gnueabi |& FileCheck %s
+
+# CHECK: invalid instruction encoding
+0x00 0x1a 0x50 0xfc
diff --git a/test/MC/Disassembler/ARM/unpredictable-MRRC2-arm.txt b/test/MC/Disassembler/ARM/unpredictable-MRRC2-arm.txt
new file mode 100644
index 0000000..26b286d
--- /dev/null
+++ b/test/MC/Disassembler/ARM/unpredictable-MRRC2-arm.txt
@@ -0,0 +1,13 @@
+# RUN: llvm-mc --disassemble %s -triple=armv7-linux-gnueabi |& FileCheck %s
+
+# CHECK: potentially undefined
+# CHECK: 0x00 0x10 0x51 0xfc
+0x00 0x10 0x51 0xfc
+
+# CHECK: potentially undefined
+# CHECK: 0x00 0xf0 0x41 0x0c
+0x00 0xf0 0x41 0x0c
+
+# CHECK: potentially undefined
+# CHECK: 0x00 0x00 0x4f 0x0c
+0x00 0x00 0x4f 0x0c