aboutsummaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* StringRefize some debug accel table bits.Benjamin Kramer2013-05-113-7/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181663 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: Turn urem to bitwise-and more oftenDavid Majnemer2013-05-112-22/+53
| | | | | | | | Use isKnownToBeAPowerOfTwo in visitUrem so that we may more aggressively fold away urem instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181661 91177308-0d34-0410-b5e6-96231b3b80d8
* Change getFrameMoves to return a const reference.Rafael Espindola2013-05-1110-58/+52
| | | | | | | To add a frame now there is a dedicated addFrameMove which also takes care of constructing the move itself. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181657 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove more dead code.Rafael Espindola2013-05-112-13/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181656 91177308-0d34-0410-b5e6-96231b3b80d8
* Add -mtriple=mipsel-linux-gnu to the test so that the compiler doesReed Kotler2013-05-111-4/+4
| | | | | | | | not think it can support small data sections. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181654 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dead code.Rafael Espindola2013-05-102-82/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181649 91177308-0d34-0410-b5e6-96231b3b80d8
* SLPVectorizer: Add support for trees with external users.Nadav Rotem2013-05-103-13/+60
| | | | | | | | | | | | | | | For example: bar() { int a = A[i]; int b = A[i+1]; B[i] = a; B[i+1] = b; foo(a); <--- a is used outside the vectorized expression. } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181648 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a debug printNadav Rotem2013-05-101-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181647 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an additional testcase for PR15882.Nadav Rotem2013-05-101-0/+45
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181646 91177308-0d34-0410-b5e6-96231b3b80d8
* Checkin in of first of several patches to finish implementation ofReed Kotler2013-05-1013-16/+359
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mips16/mips32 floating point interoperability. This patch fixes returns from mips16 functions so that if the function was in fact called by a mips32 hard float routine, then values that would have been returned in floating point registers are so returned. Mips16 mode has no floating point instructions so there is no way to load values into floating point registers. This is needed when returning float, double, single complex, double complex in the Mips ABI. Helper functions in libc for mips16 are available to do this. For efficiency purposes, these helper functions have a different calling convention from normal Mips calls. Registers v0,v1,a0,a1 are used to pass parameters instead of a0,a1,a2,a3. This is because v0,v1,a0,a1 are the natural registers used to return floating point values in soft float. These values can then be moved to the appropriate floating point registers with no extra cost. The only register that is modified is ra in this call. The helper functions make sure that the return values are in the floating point registers that they would be in if soft float was not in effect (which it is for mips16, though the soft float is implemented using a mips32 library that uses hard float). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181641 91177308-0d34-0410-b5e6-96231b3b80d8
* Micro-optimization: don't shift an entire bitcode record over to get the code.Jordan Rose2013-05-101-3/+10
| | | | | | | | | | | Previously, BitstreamCursor read an abbreviated record by splatting the whole thing into a data vector, then extracting and removing the /first/ element. Now, it reads the first element--the record code--separately from the actual field values. No (intended) functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181639 91177308-0d34-0410-b5e6-96231b3b80d8
* Give the test from r181632 a target triple.David Blaikie2013-05-101-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181637 91177308-0d34-0410-b5e6-96231b3b80d8
* PR14492: Debug Info: Support for values of non-integer non-type template ↵David Blaikie2013-05-106-9/+112
| | | | | | | | | | parameters. This is only tested for global variables at the moment (& includes tests for the unnamed parameter case, since apparently this entire function was completely untested previously) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181632 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix unused variable error.Jyotsna Verma2013-05-101-2/+1
| | | | | | | | | Earlier, this variable was used in an assert and was causing failure on darwin. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181630 91177308-0d34-0410-b5e6-96231b3b80d8
* Hexagon: Fix switch statements in GetDotOldOp and IsNewifyStore.Jyotsna Verma2013-05-104-707/+81
| | | | | | | | No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181628 91177308-0d34-0410-b5e6-96231b3b80d8
* Hexagon: Fix switch cases in HexagonVLIWPacketizer.cpp.Jyotsna Verma2013-05-109-703/+198
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181624 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the R600 build.Rafael Espindola2013-05-102-3/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181621 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] Fix a crasher when we fail on a direct match.Chad Rosier2013-05-103-6/+12
| | | | | | | | | | | | | | | | | | | The issue was that the MatchingInlineAsm and VariantID args to the MatchInstructionImpl function weren't being set properly. Specifically, when parsing intel syntax, the parser thought it was parsing inline assembly in the at&t dialect; that will never be the case. The crash was caused when the emitter tried to emit the instruction, but the operands weren't set. When parsing inline assembly we only set the opcode, not the operands, which is used to lookup the instruction descriptor. rdar://13854391 and PR15945 Also, this commit reverts r176036. Now that we're correctly parsing the intel syntax the pushad/popad don't match properly. I've reimplemented that fix using a MnemonicAlias. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181620 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused argument.Rafael Espindola2013-05-1024-38/+31
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181618 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix MCJITCAPITest.cpp unit test on Windows.Andrew Kaylor2013-05-101-0/+2
| | | | | | MCJIT on Windows requires an explicit target triple with "-elf" appended to generate objects in ELF format. The common test framework was setting up this triple, but it wasn't passed to the C API in the test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181614 91177308-0d34-0410-b5e6-96231b3b80d8
* Better output for long help strings for command-line options.Alexander Kornienko2013-05-102-9/+18
| | | | | | | | | | | | | | | | | | | | | Summary: This patch allows using \n inside long help strings for command-line options, so that all lines are equally indented. This is not a perfect solution, as we don't (and probably don't want to) know about terminal width, but it allows to format long help strings somehow readable without manually padding them with spaces. A motivating example is -help output from clang-format (source code in tools/clang-format/ClangFormat.cpp, see cl options offset, length, style, and dump-config). Reviewers: atrick, alexfh Reviewed By: alexfh CC: llvm-commits, rafael Differential Revision: http://llvm-reviews.chandlerc.com/D779 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181608 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused function.Rafael Espindola2013-05-102-11/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181606 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: Don't claim to be able to evaluate any shl in a zexted type.Benjamin Kramer2013-05-102-1/+39
| | | | | | | | | | The shift amount may be larger than the type leading to undefined behavior. Limit the transform to constant shift amounts. While there update the bits to clear in the result which may enable additional optimizations. PR15959. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181604 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AsmParser for ARM unwind directives.Logan Chien2013-05-1024-27/+2587
| | | | | | | | | | | | | | | | | | | | This commit implements the AsmParser for fnstart, fnend, cantunwind, personality, handlerdata, pad, setfp, save, and vsave directives. This commit fixes some minor issue in the ARMELFStreamer: * The switch back to corresponding section after the .fnend directive. * Emit the unwind opcode while processing .fnend directive if there is no .handlerdata directive. * Emit the unwind opcode to .ARM.extab while processing .handlerdata even if .personality directive does not exist. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181603 91177308-0d34-0410-b5e6-96231b3b80d8
* XFAILing this test on Win32 to unbreak the build bots.Aaron Ballman2013-05-101-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181600 91177308-0d34-0410-b5e6-96231b3b80d8
* DAGCombiner: Generate a correct constant for vector types when folding (xor ↵Benjamin Kramer2013-05-102-2/+12
| | | | | | | | (and)) into (and (not)). PR15948. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181597 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: Verify the type before transforming uitofp into select.Benjamin Kramer2013-05-102-22/+41
| | | | | | PR15952. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181586 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Remove AMDILPeeopholeOptimizer and replace optimizations with tablegen ↵Tom Stellard2013-05-106-1217/+38
| | | | | | | | | | | | | | | patterns The BFE optimization was the only one we were actually using, and it was emitting an intrinsic that we don't support. https://bugs.freedesktop.org/show_bug.cgi?id=64201 Reviewed-by: Christian König <christian.koenig@amd.com> NOTE: This is a candidate for the 3.3 branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181580 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Expand SUB for v2i32/v4i32Tom Stellard2013-05-102-0/+17
| | | | | | | | | | | Patch by: Aaron Watry Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Aaron Watry <awatry@gmail.com> NOTE: This is a candidate for the 3.3 branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181579 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Expand MUL for v4i32/v2i32Tom Stellard2013-05-102-0/+18
| | | | | | | | | | | | | Fixes piglit test for OpenCL builtin mul24, and allows mad24 to run. Patch by: Aaron Watry Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Aaron Watry <awatry@gmail.com> NOTE: This is a candidate for the 3.3 branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181578 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Expand SRA for v4i32/v2i32Tom Stellard2013-05-102-0/+15
| | | | | | | | | | | | | v2: Add v4i32 test Patch by: Aaron Watry Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Aaron Watry <awatry@gmail.com> NOTE: This is a candidate for the 3.3 branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181577 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Expand vselect for v4i32 and v2i32Tom Stellard2013-05-102-0/+20
| | | | | | | | | | | | | v2: Add vselect v4i32 test Patch by: Aaron Watry Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Aaron Watry <awatry@gmail.com> NOTE: This is a candidate for the 3.3 branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181576 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86AsmParser] It's valid to stop parsing an operand at an immediate.Chad Rosier2013-05-092-1/+5
| | | | | | rdar://13854369 and PR15944 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181564 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach SelectionDAG to constant fold all-constant FMA nodes the same way that ↵Owen Anderson2013-05-092-0/+23
| | | | | | it constant folds FADD, FMUL, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181555 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a documentation warning: \bried -> \briefDmitri Gribenko2013-05-091-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181551 91177308-0d34-0410-b5e6-96231b3b80d8
* Documentation warning: \param, not \parmDmitri Gribenko2013-05-091-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181549 91177308-0d34-0410-b5e6-96231b3b80d8
* Rewrite assert to avoid warning when the record element type is byte-sized.Jordan Rose2013-05-091-1/+2
| | | | | | | | | | BitstreamWriter asserts that when blob data is written from the record element vector, each element fits in a byte. However, if the record elements are specified as a SmallVector of 'char', this causes a warning from -Wtautological-constant-out-of-range-compare. Fix this by using llvm::isUInt<8> instead of a plain comparison against 256. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181545 91177308-0d34-0410-b5e6-96231b3b80d8
* Generate a compact unwind encoding in the face of a stack alignment push.Bill Wendling2013-05-092-0/+36
| | | | | | | | | | | | | | We generate a `push' of a random register (%rax) if the stack needs to be aligned by the size of that register. However, this could mess up compact unwind generation. In particular, we want to still generate compact unwind in the presence of this monstrosity. Check if the push of of the %rax/%eax register. If it is and it's marked with the `FrameSetup' flag, then we can generate a compact unwind encoding for the function only if the push is the last FrameSetup instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181540 91177308-0d34-0410-b5e6-96231b3b80d8
* Hexagon: Remove switch cases from GetDotNewPredOp and isPostIncrement functions.Jyotsna Verma2013-05-093-593/+46
| | | | | | | | No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181535 91177308-0d34-0410-b5e6-96231b3b80d8
* [GVN] Split critical-edge on the fly, instead of postpone edge-splitting to nextShuxin Yang2013-05-091-13/+39
| | | | | | | | | | | iteration. This on step toward non-iterative GVN. My local hack suggests that getting rid of iteration will speedup GVN by 30%+ on a medium sized input (2k LOC, C++). I cannot explain why not 2x or more at this moment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181532 91177308-0d34-0410-b5e6-96231b3b80d8
* Hexagon: Use relation map for getMatchingCondBranchOpcode() and Jyotsna Verma2013-05-092-535/+35
| | | | | | | | getInvertedPredicatedOpcode() functions instead of switch cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181530 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify the code a bit.Bill Wendling2013-05-091-19/+10
| | | | | | | | | | | The compact unwind registers were defined in two different places. It's better just to place them in the function that uses them and specify that this is a 64-bit or 32-bit machine. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181529 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't replace an alias in llvm.used with its target.Rafael Espindola2013-05-092-2/+144
| | | | | | | When we replace an internal alias with its target, be careful not to replace the entry in llvm.used (and llvm.compiler_used). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181524 91177308-0d34-0410-b5e6-96231b3b80d8
* [XCore] Fix handling of functions where only the LR is spilled.Richard Osborne2013-05-092-27/+41
| | | | | | | | | | | | | | Previously we only checked if the LR required saving if the frame size was non zero. However because the caller reserves 1 word for the callee to use that doesn't count towards our frame size it is possible for the LR to need saving and for the frame size to be 0. We didn't hit when the LR needed saving because of a function calls because the 1 word of stack we must allocate for our callee means the frame size is always non zero in this case. However we can hit this case if the LR is clobbered in inline asm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181520 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: Don't just copy known bits from the first operand of an srem.Benjamin Kramer2013-05-092-1/+13
| | | | | | | That's obviously wrong. Conservatively restrict it to the sign bit, which matches the original intention of this analysis. Fixes PR15940. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181518 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid runtime type checks.Rafael Espindola2013-05-091-14/+40
| | | | | | | In most cases the relocation type implies the object word size and endianness. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181515 91177308-0d34-0410-b5e6-96231b3b80d8
* libDebugInfo depends on libObject nowadays.Benjamin Kramer2013-05-091-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181510 91177308-0d34-0410-b5e6-96231b3b80d8
* Introduce convenience typedefs for the 4 ELF object types.Rafael Espindola2013-05-093-50/+35
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181509 91177308-0d34-0410-b5e6-96231b3b80d8
* Test commit.Kai Nacke2013-05-091-0/+1
| | | | | | | Add one of my contributions to CREDITS.TXT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181508 91177308-0d34-0410-b5e6-96231b3b80d8
* Change getRelocationAdditionalInfo to be ELF only.Rafael Espindola2013-05-0910-59/+65
| | | | | | | It was only implemented for ELF where it collected the Addend, so this patch also renames it to getRelocationAddend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181502 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.1 at 2024-07-08 14:17:57 +0000