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* Fix an odd comment.Nadav Rotem2013-05-041-2/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181136 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: enable MCJIT and tests now that everything passes.Tim Northover2013-05-042-4/+5
| | | | | | | This removes dire warnings about AArch64 being unsupported and enables the tests when appropriate on this platform. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181135 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: implement 64-bit absolute relocation in MCJITTim Northover2013-05-041-0/+5
| | | | | | | | | This is about the simplest relocation, but surprisingly rare in actual code. It occurs in (for example) the MCJIT test test-ptr-reloc.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181134 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: add stubs to support long function calls on MCJITTim Northover2013-05-043-2/+84
| | | | | | | | | | | | | | | | | | | | As with global accesses, external functions could exist anywhere in memory. Therefore the stub must create a complete 64-bit address. This patch implements the fragment as (roughly): movz x16, #:abs_g3:somefunc movk x16, #:abs_g2_nc:somefunc movk x16, #:abs_g1_nc:somefunc movk x16, #:abs_g0_nc:somefunc br x16 In principle we could save 4 bytes by using a literal-load instead, but it is unclear that would be more efficient and can only be tested when real hardware is readily available. This allows (for example) the MCJIT test 2003-05-07-ArgumentTest to pass on AArch64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181133 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: implement relocations for global accessTim Northover2013-05-041-0/+31
| | | | | | | | | | | | | | | | | The large memory model (default and main viable for JIT) emits addresses in need of relocation as movz x0, #:abs_g3:somewhere movk x0, #:abs_g2_nc:somewhere movk x0, #:abs_g1_nc:somewhere movk x0, #:abs_g0_nc:somewhere To support this we must implement those four relocations in the dynamic loader. This allows (for example) the test-global.ll MCJIT test to pass on AArch64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181132 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: implement first relocation required for MCJITTim Northover2013-05-043-0/+45
| | | | | | | | | | | R_AARCH64_PCREL32 is present in even trivial .eh_frame sections and so is required to compile any function without the "nounwind" attribute. This change implements very basic infrastructure in the RuntimeDyldELF file and allows (for example) the test-shift.ll MCJIT test to pass on AArch64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181131 91177308-0d34-0410-b5e6-96231b3b80d8
* Build system changes to enable MCJIT on AArch64Tim Northover2013-05-042-1/+3
| | | | | | | These changes just allow AArch64 to take part in the MCJIT world when built correctly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181130 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: use __clear_cache under GCCish environmentsTim Northover2013-05-041-1/+1
| | | | | | | | | AArch64 is going to need some kind of cache-invalidation in order to successfully JIT since it has a weak memory-model. This is provided by a __clear_cache builtin in libgcc, which acts very much like the 32-bit ARM equivalent (on platforms where it exists). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181129 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix buildbot failure on 64 bit linux due to std::max() having differentRichard Osborne2013-05-041-1/+1
| | | | | | | operand types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181128 91177308-0d34-0410-b5e6-96231b3b80d8
* [XCore] Remove unused operand type.Richard Osborne2013-05-041-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181127 91177308-0d34-0410-b5e6-96231b3b80d8
* [XCore] Make use of the target independent global address offset folding.Richard Osborne2013-05-046-98/+41
| | | | | | | | This let us to remove some custom code that matched constant offsets from globals at instruction selection time as a special addressing mode. No intended functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181126 91177308-0d34-0410-b5e6-96231b3b80d8
* [XCore] Simplify code that checks for an aligned base plus a constant.Richard Osborne2013-05-042-81/+56
| | | | | | | | | The code now makes use of ComputeMaskedBits, SelectionDAG::isBaseWithConstantOffset and TargetLowering::isGAPlusOffset where appropriate reducing the amount of logic needed in XCoreISelLowering. No intended functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181125 91177308-0d34-0410-b5e6-96231b3b80d8
* [XCore] Move lowering of thread local storage to a separate pass.Richard Osborne2013-05-046-55/+158
| | | | | | | | | | | | | Thread local storage is not supported by the XMOS linker so we handle thread local variables by lowering the variable to an array of n elements (where n is the number of hardware threads per core, currently 8 for all XMOS devices) indexed by the the current thread ID. Previously this lowering was spread across the XCoreISelLowering and the XCoreAsmPrinter classes. Moving this to a separate pass should be much cleaner. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181124 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: assert code model is small for TLS accessesTim Northover2013-05-041-0/+2
| | | | | | | Supporting TLS in the large memory model is rather difficult at the moment, so make sure no-one gets into difficulties by mistake. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181121 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: support literal pool access in large memory model.Tim Northover2013-05-042-20/+88
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181120 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: support large code model for jump-tablesTim Northover2013-05-042-5/+26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181119 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: implement support for blockaddress in large code modelTim Northover2013-05-042-11/+29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181118 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: implement large code model access to global variables.Tim Northover2013-05-049-14/+206
| | | | | | | | | | | | | | The MOVZ/MOVK instruction sequence may not be the most efficient (a literal-pool load could be better) but adding that would require reinstating the ConstantIslands pass. For now the sequence is correct, and that's enough. Beware, as of commit GNU ld does not appear to support the relocations needed for this. Its primary purpose (for now) will be to support JITed code, since in that case there is no guarantee of where your code will end up in memory relative to external symbols it references. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181117 91177308-0d34-0410-b5e6-96231b3b80d8
* [XCore] Use static relocation model by default.Richard Osborne2013-05-044-5/+11
| | | | | | | This allows us to get get rid of a hack in XCoreTargetObjectFile where the the DataRel* sections were overridden. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181116 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow host triple to be correctly overridden in CMake buildsTim Northover2013-05-0410-13/+14
| | | | | | | | | | | The intended semantics mirror autoconf, where the user is able to specify a host triple, but if it's left to the build system then "config.guess" is invoked for the default. This also renames the LLVM_HOSTTRIPLE define to LLVM_HOST_TRIPLE to fit in with the style of the surrounding defines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181112 91177308-0d34-0410-b5e6-96231b3b80d8
* Optimize llvm-link too.Rafael Espindola2013-05-041-2/+2
| | | | | | | This takes the linking of almost all modules in a clang build from 6:32 to 0:19. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181105 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a performance bug in the Linker.Rafael Espindola2013-05-042-11/+25
| | | | | | | | | | | | | Now that we hava a convinient place to keep it, remeber the set of identified structs as we merge modules. This speeds up the linking of all the bitcode files in clang with the gold plugin and -plugin-opt=emit-llvm (i.e., link only, no codegen) from 5:25 minutes to 13.6 seconds! Patch by Xiaofei Wan! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181104 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement Linker::LinkModules with Linker::linkInModule.Rafael Espindola2013-05-041-8/+9
| | | | | | Flipping which one is the implementation will let us optimize linkInModule. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181102 91177308-0d34-0410-b5e6-96231b3b80d8
* Now that Linker.cpp is almost empty, merge it into LinkModules.cpp.Rafael Espindola2013-05-043-37/+9
| | | | | | Also remove unused includes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181100 91177308-0d34-0410-b5e6-96231b3b80d8
* Last batch of cleanups to Linker.h.Rafael Espindola2013-05-043-79/+23
| | | | | | | | Update comments, fix * placement, fix method names that are not used in clang, add a linkInModule that takes a Mode and put it in Linker.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181099 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't construct or delete a module on the Linker.Rafael Espindola2013-05-043-13/+2
| | | | | | | The linker is now responsible only for actually linking the modules, it is up to the clients to create and destroy them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181098 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't store the context in the Linker.Rafael Espindola2013-05-042-3/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181097 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused members and constructor arguments.Rafael Espindola2013-05-043-20/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181096 91177308-0d34-0410-b5e6-96231b3b80d8
* Add missing header.Rafael Espindola2013-05-041-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181095 91177308-0d34-0410-b5e6-96231b3b80d8
* Delete dead code from the linker.Rafael Espindola2013-05-042-64/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181094 91177308-0d34-0410-b5e6-96231b3b80d8
* Use consistent function names.Krzysztof Parzyszek2013-05-043-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181090 91177308-0d34-0410-b5e6-96231b3b80d8
* Tabs to spaces. No functionality change.Nick Lewycky2013-05-041-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181082 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r181009.Amara Emerson2013-05-0310-606/+140
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181079 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove some uneeded pseudos in the presence of the naked function attribute.Reed Kotler2013-05-032-2/+37
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181072 91177308-0d34-0410-b5e6-96231b3b80d8
* Delete test instead.Amara Emerson2013-05-031-47/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181066 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporarily disable failing test.Amara Emerson2013-05-031-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181062 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove this hack. We can support this better with function attributes.Bill Wendling2013-05-031-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181059 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Avoid using '$' in generated assembler codeUlrich Weigand2013-05-031-2/+2
| | | | | | | | | | | | | | PowerPC assemblers are supposed to support a stand-alone '$' symbol as an alternative of '.' to refer to the current PC. This does not work in the LLVM assembler parser yet. To avoid bootstrap failures when using the LLVM assembler as system assembler, this patch modifies the assembler source code generated by LLVM to avoid using '$' (and simply use '.' instead). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181054 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Parse platform-specifc variant kinds in AsmParserUlrich Weigand2013-05-032-0/+129
| | | | | | | | | | | This patch adds support for PowerPC platform-specific variant kinds in MCSymbolRefExpr::getVariantKindForName, and also adds a test case to verify they are translated to the appropriate fixup type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181053 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Add some Book II instructions to AsmParserUlrich Weigand2013-05-033-0/+75
| | | | | | | | | | | | | | | This patch adds a couple of Book II instructions (isync, icbi) to the PowerPC assembler parser. These are needed when bootstrapping clang with the integrated assembler forced on, because they are used in inline asm statements in the code base. The test case adds the full list of Book II storage control instructions, including associated extended mnemonics. Again, those that are not yet supported as marked as FIXME. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181052 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Support extended mnemonics in AsmParserUlrich Weigand2013-05-033-0/+473
| | | | | | | | | | | | | | This patch adds infrastructure to support extended mnemonics in the PowerPC assembler parser. It adds support specifically for those extended mnemonics that LLVM will itself generate. The test case lists *all* extended mnemonics according to the PowerPC ISA v2.06 Book I, but marks those not yet supported as FIXME. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181051 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Add assembler parserUlrich Weigand2013-05-0315-16/+2147
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds assembler parser support to the PowerPC back end. The parser will run for any powerpc-*-* and powerpc64-*-* triples, but was tested only on 64-bit Linux. The supported syntax is intended to be compatible with the GNU assembler. The parser does not yet support all PowerPC instructions, but it does support anything that is generated by LLVM itself. There is no support for testing restricted instruction sets yet, i.e. the parser will always accept any instructions it knows, no matter what feature flags are given. Instruction operands will be checked for validity and errors generated. (Error handling in general could still be improved.) The patch adds a number of test cases to verify instruction and operand encodings. The tests currently cover all instructions from the following PowerPC ISA v2.06 Book I facilities: Branch, Fixed-point, Floating-Point, and Vector. Note that a number of these instructions are not yet supported by the back end; they are marked with FIXME. A number of follow-on check-ins will add extra features. When they are all included, LLVM passes all tests (including bootstrap) when using clang -cc1as as the system assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181050 91177308-0d34-0410-b5e6-96231b3b80d8
* Decompose GVN::processNonLocalLoad() (about 400 LOC) into smaller helper ↵Shuxin Yang2013-05-031-169/+194
| | | | | | | | | | | | | | | functions. No function change. This function consists of following steps: 1. Collect dependent memory accesses. 2. Analyze availability. 3. Perform fully redundancy elimination, or 4. Perform PRE, depending on the availability Step 2, 3 and 4 are now moved to three helper routines. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181047 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Split the DSP control register and define one register for each field ofAkira Hatanaka2013-05-036-199/+261
| | | | | | | | | | | | | its fields. This removes false dependencies between DSP instructions which access different fields of the the control register. Implicit register operands are added to instructions RDDSP and WRDSP after instruction selection, depending on the value of the mask operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181041 91177308-0d34-0410-b5e6-96231b3b80d8
* LoopVectorizer: Add support for if-conversion of PHINodes with 3+ incoming ↵Nadav Rotem2013-05-032-20/+77
| | | | | | | | | | | | | | | | | | | | | | | | | | | | values. By supporting the vectorization of PHINodes with more than two incoming values we can increase the complexity of nested if statements. We can now vectorize this loop: int foo(int *A, int *B, int n) { for (int i=0; i < n; i++) { int x = 9; if (A[i] > B[i]) { if (A[i] > 19) { x = 3; } else if (B[i] < 4 ) { x = 4; } else { x = 5; } } A[i] = x; } } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181037 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Expand vector or, shl, srl, and xor nodesTom Stellard2013-05-035-0/+60
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181035 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: BFI_INT is a vector-only instructionTom Stellard2013-05-031-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181034 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Add pattern for SHA-256 Ma functionTom Stellard2013-05-034-0/+35
| | | | | | This can be optimized using the BFI_INT instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181033 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Clean up comments in Processors.tdTom Stellard2013-05-031-5/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181032 91177308-0d34-0410-b5e6-96231b3b80d8
* Autoconf: Compile cxxabi.h in C++ mode.Benjamin Kramer2013-05-032-6/+448
| | | | | | Should fix PR15877. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181026 91177308-0d34-0410-b5e6-96231b3b80d8
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