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* Disambiguate call to operator==.Benjamin Kramer2012-05-191-1/+1
| | | | | | clang++ and msvc happily had no problem with it but g++ refuses to compile. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157126 91177308-0d34-0410-b5e6-96231b3b80d8
* Collect inflatable virtual registers on the fly.Jakob Stoklund Olesen2012-05-191-16/+11
| | | | | | | There is no reason to defer the collection of virtual registers whose register class may be replaced with a larger class. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157125 91177308-0d34-0410-b5e6-96231b3b80d8
* ValueMap: Use DenseMap's find_as mechanism to reduce use list churn.Benjamin Kramer2012-05-191-5/+17
| | | | | | Otherwise just looking up a value in the map requires creating a VH, adding it to the use lists and destroying it again. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157124 91177308-0d34-0410-b5e6-96231b3b80d8
* Move CallbackVHs dtor inline, it can be devirtualized in many cases. Move ↵Benjamin Kramer2012-05-192-8/+9
| | | | | | the other virtual methods out of line as they are only called from within Value.cpp anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157123 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up some spacing and inconsistent use of pre/post increment. No ↵Craig Topper2012-05-192-28/+28
| | | | | | functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157122 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove extra semicolons.Benjamin Kramer2012-05-191-15/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157118 91177308-0d34-0410-b5e6-96231b3b80d8
* Provide move semantics for TinyPtrVector and for DenseMap's rehash function.Benjamin Kramer2012-05-192-2/+13
| | | | | | This makes DenseMap<..., TinyPtrVector<...>> as cheap as it always should've been! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157113 91177308-0d34-0410-b5e6-96231b3b80d8
* Ordinary PR1255 patch: DifferenceEngine and CPPBackend adopted to the new ↵Stepan Dyatkovskiy2012-05-192-5/+5
| | | | | | SwitchInst methods. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157112 91177308-0d34-0410-b5e6-96231b3b80d8
* Copy some AVX support from MCJIT to JIT. Maybe will fix PR12748.Craig Topper2012-05-191-17/+29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157109 91177308-0d34-0410-b5e6-96231b3b80d8
* Eliminate dead code after remat.Jakob Stoklund Olesen2012-05-191-1/+3
| | | | | | This will remove the original def once it has no more uses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157104 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't remat during updateRegDefsUses().Jakob Stoklund Olesen2012-05-191-22/+5
| | | | | | | | | | | Remaining virtreg->physreg copies were rematerialized during updateRegDefsUses(), but we already do the same thing in joinCopy() when visiting the physreg copy instruction. Eliminate the preserveSrcInt argument to reMaterializeTrivialDef(). It is now always true. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157103 91177308-0d34-0410-b5e6-96231b3b80d8
* Immediately erase trivially useless copies.Jakob Stoklund Olesen2012-05-191-2/+4
| | | | | | | There is no need for these instructions to stick around since they are known to be not dead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157102 91177308-0d34-0410-b5e6-96231b3b80d8
* Run proper recursive dead code elimination during coalescing.Jakob Stoklund Olesen2012-05-192-21/+63
| | | | | | | | | | | | | | | Dead copies cause problems because they are trivial to coalesce, but removing them gived the live range a dangling end point. This patch enables full dead code elimination which trims live ranges to their uses so end points don't dangle. DCE may erase multiple instructions. Put the pointers in an ErasedInstrs set so we never risk visiting erased instructions in the work list. There isn't supposed to be any dead copies entering RegisterCoalescer, but they do slip by as evidenced by test/CodeGen/X86/coalescer-dce.ll. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157101 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow LiveRangeEdit to be created with a NULL parent.Jakob Stoklund Olesen2012-05-195-13/+16
| | | | | | The dead code elimination with callbacks is still useful. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157100 91177308-0d34-0410-b5e6-96231b3b80d8
* Actually support DW_TAG_rvalue_reference_type that we were tryingEric Christopher2012-05-194-11/+56
| | | | | | | | to generate out of the front end. rdar://11479676 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157094 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for the 'd' mips inline asm output modifier.Eric Christopher2012-05-192-12/+23
| | | | | | Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157093 91177308-0d34-0410-b5e6-96231b3b80d8
* SCEV: Add MarkPendingLoopPredicates to avoid recursive isImpliedCond.Andrew Trick2012-05-193-1/+58
| | | | | | | | | | getUDivExpr attempts to simplify by checking for overflow. isLoopEntryGuardedByCond then evaluates the loop predicate which may lead to the same getUDivExpr causing endless recursion. Fixes PR12868: clang 3.2 segmentation fault. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157092 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix replacing all the users of objc weak runtime routinesDan Gohman2012-05-182-2/+58
| | | | | | | when deleting them. rdar://11434915. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157080 91177308-0d34-0410-b5e6-96231b3b80d8
* Modernize naming convention for class members.Jakob Stoklund Olesen2012-05-182-45/+45
| | | | | | No functional change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157079 91177308-0d34-0410-b5e6-96231b3b80d8
* Move all work list processing to copyCoalesceWorkList().Jakob Stoklund Olesen2012-05-181-39/+42
| | | | | | This will make it possible to filter out erased instructions later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157073 91177308-0d34-0410-b5e6-96231b3b80d8
* allow LazyValueInfo::getEdgeValue() to reason about multiple edges from the ↵Nuno Lopes2012-05-182-11/+34
| | | | | | same switch instruction by doing union of ranges (which may still be conservative, but it's more aggressive than before) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157071 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor data-in-code annotations.Jim Grosbach2012-05-1828-215/+411
| | | | | | | | | | | | | | | | | | | | | | Use a dedicated MachO load command to annotate data-in-code regions. This is the same format the linker produces for final executable images, allowing consistency of representation and use of introspection tools for both object and executable files. Data-in-code regions are annotated via ".data_region"/".end_data_region" directive pairs, with an optional region type. data_region_directive := ".data_region" { region_type } region_type := "jt8" | "jt16" | "jt32" | "jta32" end_data_region_directive := ".end_data_region" The previous handling of ARM-style "$d.*" labels was broken and has been removed. Specifically, it didn't handle ARM vs. Thumb mode when marking the end of the section. rdar://11459456 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157062 91177308-0d34-0410-b5e6-96231b3b80d8
* fix warnings when compiling with -WshadowNick Kledzik2012-05-183-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157061 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove duplicate code that we could just fallthrough to.Eric Christopher2012-05-181-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157060 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify RegisterCoalescer::copyCoalesceInMBB().Jakob Stoklund Olesen2012-05-181-48/+15
| | | | | | | | | It is no longer necessary to separate VirtCopies, PhysCopies, and ImpDefCopies. Implicitly defined copies are extremely rare after we added the ProcessImplicitDefs pass, and physical register copies are not joined any longer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157059 91177308-0d34-0410-b5e6-96231b3b80d8
* add test case for bugfix in r157032Nuno Lopes2012-05-181-0/+29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157058 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for the mips 'x' inline asm modifier.Eric Christopher2012-05-182-0/+11
| | | | | | Patch by Jack Carter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157057 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove support for PhysReg joining.Jakob Stoklund Olesen2012-05-181-136/+14
| | | | | | | | | | | | | | | | | | | | | | | | This has been disabled for a while, and it is not a feature we want to support. Copies between physical and virtual registers are eliminated by good hinting support in the register allocator. Joining virtual and physical registers is really a form of register allocation, and the coalescer is not properly equipped to do that. In particular, it cannot backtrack coalescing decisions, and sometimes that would cause it to create programs that were impossible to register allocate, by exhausting a small register class. It was also very difficult to keep track of the live ranges of aliasing registers when extending the live range of a physreg. By disabling physreg joining, we can let fixed physreg live ranges remain constant throughout the register allocator super-pass. One type of physreg joining remains: A virtual register that has a single value which is a copy of a reserved register can be merged into the reserved physreg. This always lowers register pressure, and since we don't compute live ranges for reserved registers, there are no problems with aliases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157055 91177308-0d34-0410-b5e6-96231b3b80d8
* FileCheck-ify, apropos of nothingJoel Jones2012-05-181-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157051 91177308-0d34-0410-b5e6-96231b3b80d8
* Recommited reworked r156804:Stepan Dyatkovskiy2012-05-182-53/+29
| | | | | | | | SelectionDAGBuilder::Clusterify : main functinality was replaced with CRSBuilder::optimize, so big part of Clusterify's code was reduced. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157046 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify code a bit. No functional change intended.Craig Topper2012-05-181-14/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157044 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify handling of v16i8 shuffles and fix a missed optimization.Craig Topper2012-05-183-35/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157043 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach two-address pass to update the "source" map so it doesn't perform aEvan Cheng2012-05-182-1/+23
| | | | | | | | | | non-profitable commute using outdated info. The test case would still fail because of poor pre-RA schedule. That will be fixed by MI scheduler. rdar://11472010 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157038 91177308-0d34-0410-b5e6-96231b3b80d8
* Temporarily disabled the MCJIT tests for Darwin, because the ↵Danil Malyshev2012-05-181-1/+1
| | | | | | RuntimeDyldMachO has a problems with relocations for 32bit x86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157035 91177308-0d34-0410-b5e6-96231b3b80d8
* Clarify comment.Eric Christopher2012-05-181-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157033 91177308-0d34-0410-b5e6-96231b3b80d8
* fix corner case in ConstantRange::intersectWith().Nuno Lopes2012-05-182-1/+6
| | | | | | this fixes the missed optimization I was seeing in the CorrelatedValuePropagation pass git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157032 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed a bug in llvm-objdump when disassembling using -macho option for a binaryKevin Enderby2012-05-182-2/+34
| | | | | | | containing no symbols. Fixed the crash and fixed it not disassembling anything. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157031 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove a test that was only testing for physreg joining.Jakob Stoklund Olesen2012-05-181-12/+1
| | | | | | | | | | This is the same as the other tests: Clever tricks are required to make the arguments and return value line up in a single-instruction function. It rarely happens in real life. We have plenty other examples of this behavior. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157030 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove -join-physregs from the test suite.Jakob Stoklund Olesen2012-05-1717-232/+227
| | | | | | | | | | | | | | This option has been disabled for a while, and it is going away so I can clean up the coalescer code. The tests that required physreg joining to be enabled were almost all of the form "tiny function with interference between arguments and return value". Such functions are usually inlined in the real world. The problem exposed by phys_subreg_coalesce-3.ll is real, but fairly rare. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157027 91177308-0d34-0410-b5e6-96231b3b80d8
* minor simplification in the call to ConstantRange constructorNuno Lopes2012-05-171-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157024 91177308-0d34-0410-b5e6-96231b3b80d8
* commentsAndrew Trick2012-05-171-2/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157020 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the encoding of the armv7m (MClass) for MSR APSR writes which was missingKevin Enderby2012-05-174-15/+82
| | | | | | | | | | | the 0b10 mask encoding bits. Make MSR APSR writes without a _<bits> qualifier an alias for MSR APSR_nzcvq even though ARM as deprecated it use. Also add support for suffixes (_nzcvq, _g, _nzcvqg) for APSR versions. Some FIXMEs in the code for better error checking when versions shouldn't be used. rdar://11457025 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157019 91177308-0d34-0410-b5e6-96231b3b80d8
* - Added ExecutionEngine/MCJIT testsDanil Malyshev2012-05-1754-3/+1295
| | | | | | | - Added HOST_ARCH to Makefile.config.in The HOST_ARCH will be used by MCJIT tests filter, because MCJIT supported only x86 and ARM architectures now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157015 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove extraneous ';'.Bill Wendling2012-05-171-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157011 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: trace ReadyQ.Andrew Trick2012-05-171-0/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157007 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: Added 3-level regpressure back-off.Andrew Trick2012-05-173-75/+288
| | | | | | | | | | | | | | | | | | | Introduce the basic strategy for register pressure scheduling. 1) Respect target limits at all times. 2) Indentify critical register classes (pressure sets). Track pressure within the scheduled region. Avoid increasing scheduled pressure for critical registers. 3) Avoid exceeding the max pressure of the region prior to scheduling. Added logic for picking between the top and bottom ready Q's based on regpressure heuristics. Status: functional but needs to be asjusted to achieve good results. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157006 91177308-0d34-0410-b5e6-96231b3b80d8
* commentAndrew Trick2012-05-172-3/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157005 91177308-0d34-0410-b5e6-96231b3b80d8
* regpressure: Fix getMaxUpwardPressureDelta.Andrew Trick2012-05-171-2/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157004 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: fix liveness iteratorsAndrew Trick2012-05-171-10/+16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157003 91177308-0d34-0410-b5e6-96231b3b80d8
* whitespaceAndrew Trick2012-05-172-2/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157002 91177308-0d34-0410-b5e6-96231b3b80d8
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