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* Remove incorrect testcases.Owen Anderson2011-09-261-4/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140572 91177308-0d34-0410-b5e6-96231b3b80d8
* Set register class of a register according to value of HasMips64.Akira Hatanaka2011-09-261-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140570 91177308-0d34-0410-b5e6-96231b3b80d8
* Define variable HasMips64 in MipsTargetLowering.Akira Hatanaka2011-09-262-4/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140569 91177308-0d34-0410-b5e6-96231b3b80d8
* In single float mode, double precision FP arguments are passed in integerAkira Hatanaka2011-09-261-4/+3
| | | | | | | registers, so there is no need to check here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140568 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert more tests to new atomic instructions.Eli Friedman2011-09-263-35/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140567 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert more tests over to the new atomic instructions. Eli Friedman2011-09-266-1504/+1367
| | | | | | | | | | I did not convert Atomics-32.ll and Atomics-64.ll by hand; the diff is autoupgrade output. The wmb test is gone because there isn't any way to express wmb with the new atomic instructions; if someone really needs a non-asm way to write a wmb on Alpha, a platform-specific intrisic could be added. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140566 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix grammar.Bill Wendling2011-09-261-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140564 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dead table entry.Bill Wendling2011-09-261-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140563 91177308-0d34-0410-b5e6-96231b3b80d8
* Some minor (and more involved) cleanups. No real context changes.Bill Wendling2011-09-261-128/+121
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* ASR #32 is not allowed on Thumb2 USAT and SSAT instructions.Owen Anderson2011-09-264-3/+38
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140560 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert more tests over to the new atomic instructions.Eli Friedman2011-09-264-65/+23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140559 91177308-0d34-0410-b5e6-96231b3b80d8
* Upgrade a couple more tests to the new atomic instructions.Eli Friedman2011-09-262-12/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140558 91177308-0d34-0410-b5e6-96231b3b80d8
* Enhance alias analysis for atomic instructions a bit. Upgrade a couple ↵Eli Friedman2011-09-264-14/+46
| | | | | | alias-analysis tests to the new atomic instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140557 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: Fix memcpy intrinsic to handle 64-bit pointersJustin Holewinski2011-09-261-8/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140556 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix this test so it doesn't fail on Mac.Eli Friedman2011-09-261-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140553 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: Implement PTXSelectionDAGInfoJustin Holewinski2011-09-265-5/+214
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140549 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: Implement ISD::ANY_EXTENDJustin Holewinski2011-09-261-0/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140548 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: Fix detection of stack load/store vs. global load/store, as well as fix theJustin Holewinski2011-09-264-50/+77
| | | | | | printing of local offsets git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140547 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix emission of debug data for global variables. getContext() on ↵James Molloy2011-09-263-2/+60
| | | | | | DIGlobalVariables is not valid any more. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140539 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: Add .align tests to stack object test fileJustin Holewinski2011-09-261-2/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140537 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: SM > 2.0 implies +doubleJustin Holewinski2011-09-261-5/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140536 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: Fix some lingering issues with stack allocationJustin Holewinski2011-09-262-1/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140535 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: Split up the TableGen instruction definitions into logical unitsJustin Holewinski2011-09-263-418/+300
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140534 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: Unify handling of loads/storesJustin Holewinski2011-09-265-206/+38
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140533 91177308-0d34-0410-b5e6-96231b3b80d8
* PTX: Handle FrameIndex nodesJustin Holewinski2011-09-266-30/+204
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140532 91177308-0d34-0410-b5e6-96231b3b80d8
* Only run tests in test/CodeGen/CBackend/X86 when both X86 and CBackend are ↵David Meyer2011-09-261-1/+1
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* PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL ↵David Meyer2011-09-263-7/+4
| | | | | | 2011-06-09-TailCallByVal and 2010-11-04-BigByval git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140516 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix VEX decoding in i386 mode. Fixes PR11008.Craig Topper2011-09-262-2/+291
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* Add target hook for pseudo instruction expansion.Jakob Stoklund Olesen2011-09-254-7/+35
| | | | | | | | | | | | Many targets use pseudo instructions to help register allocation. Like the COPY instruction, these pseudos can be expanded after register allocation. The early expansion can make life easier for PEI and the post-ra scheduler. This patch adds a hook that is called for all remaining pseudo instructions from the ExpandPostRAPseudos pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140472 91177308-0d34-0410-b5e6-96231b3b80d8
* [vector-select] Address one of the issues in pr10902. EXTRACT_VECTOR_ELEMENTNadav Rotem2011-09-251-2/+7
| | | | | | | | | | | SDNodes may return values which are wider than the incoming element types. In this patch we fix the integer promotion of these nodes. Fixes spill-q.ll when running -promote-elements. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140471 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up code after renaming LowerSubregs -> ExpandPostRAPseudos.Jakob Stoklund Olesen2011-09-254-51/+47
| | | | | | No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140470 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename LowerSubregs to ExpandPostRAPseudos.Jakob Stoklund Olesen2011-09-252-1/+1
| | | | | | | | | | | | | | I'll fix the file contents in the next commit. This pass is currently expanding the COPY and SUBREG_TO_REG pseudos. I am going to add a hook so targets can expand more pseudo-instructions after register allocation. Many targets have pseudo-instructions that assist the register allocator. They can be expanded after register allocation, before PEI and PostRA scheduling. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140469 91177308-0d34-0410-b5e6-96231b3b80d8
* Sort CMakeLists.txt.Benjamin Kramer2011-09-241-7/+5
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* Implement Duncan's suggestion to use the result of getSetCCResultType if it ↵Nadav Rotem2011-09-241-4/+9
| | | | | | | | | | | | is legal (this is always the case for scalars), otherwise use the promoted result type. Fix test/CodeGen/X86/vsplit-and.ll when promote-elements is enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140464 91177308-0d34-0410-b5e6-96231b3b80d8
* [Vector-Select] Address one of the problems in 10902.Nadav Rotem2011-09-241-1/+10
| | | | | | | | | | | | When generating the trunc-store of i1's, we need to use the vector type and not the scalar type. This patch fixes the assertion in CodeGen/Generic/bool-vector.ll when running with -promote-elements. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140463 91177308-0d34-0410-b5e6-96231b3b80d8
* Add .td file.Akira Hatanaka2011-09-241-0/+12
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* Revert change made in .gitignore.Akira Hatanaka2011-09-241-2/+0
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* Preparation for adding simple Mips64 instructions.Akira Hatanaka2011-09-243-0/+8
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* Only run MF.verify() with EXPENSIVE_CHECKS=1.Jakob Stoklund Olesen2011-09-242-4/+1
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* sys::Process: Add a SetWorkingDirectory method.Daniel Dunbar2011-09-233-0/+12
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* LSR minor bug fix in RateRegister.Andrew Trick2011-09-231-1/+1
| | | | | | | | No test case. Noticed by inspection and I doubt it ever affects the outcome of the overall heuristic, let alone final codegen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140431 91177308-0d34-0410-b5e6-96231b3b80d8
* Duncan owns dragonegg too, it's all his fault :)Chris Lattner2011-09-231-1/+1
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* Verify that terminators follow non-terminators.Jakob Stoklund Olesen2011-09-232-0/+16
| | | | | | This exposes a -segmented-stacks bug. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140429 91177308-0d34-0410-b5e6-96231b3b80d8
* PR10998: It is not legal to sink an instruction past the terminator of a ↵Eli Friedman2011-09-232-1/+52
| | | | | | block; make sure we don't do that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140428 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach the Thumb2 AsmParser to accept pre-indexed loads/stores with an offset ↵Owen Anderson2011-09-232-1/+3
| | | | | | of #-0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140426 91177308-0d34-0410-b5e6-96231b3b80d8
* Also match negative offsets for addrmode3 and addrmode5.Jakob Stoklund Olesen2011-09-232-2/+20
| | | | | | | | Math is hard, and isScaledConstantInRange() always returned false for negative constants. It was doing unsigned division of negative numbers before casting back to signed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140425 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix incorrect disassembly test.Owen Anderson2011-09-231-1/+1
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* Add more fixed bits to USAT16 encoding to filter out incorrect decodings.Owen Anderson2011-09-231-2/+2
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* Post-index loads/stores in still need to print the post-indexed immediate, ↵Owen Anderson2011-09-233-11/+18
| | | | | | even if it's zero, to distinguish them from non-post-indexed instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140420 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r140412 (Thumb2 reg-reg loads cannot target SP or PC), with invalid ↵Owen Anderson2011-09-232-3/+3
| | | | | | testcases updated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140415 91177308-0d34-0410-b5e6-96231b3b80d8
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