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* Nuke old code. Missed in last commit.Jim Grosbach2011-12-141-14/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146590 91177308-0d34-0410-b5e6-96231b3b80d8
* Add high level description of MachineInstr bundles.Evan Cheng2011-12-141-0/+83
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146589 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM NEON refactor VST2 w/ writeback instructions.Jim Grosbach2011-12-144-54/+130
| | | | | | | In addition to improving the representation, this adds support for assembly parsing of these instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146588 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM NEON improve factoring a bit. No functional change.Jim Grosbach2011-12-141-18/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146585 91177308-0d34-0410-b5e6-96231b3b80d8
* Model ARM predicated write as read-mod-write. e.g.Evan Cheng2011-12-144-19/+49
| | | | | | | | | | | | r0 = mov #0 r0 = moveq #1 Then the second instruction has an implicit data dependency on the first instruction. Sadly I have yet to come up with a small test case that demonstrate the post-ra scheduler taking advantage of this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146583 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM NEON VST2 assembly parsing and encoding.Jim Grosbach2011-12-147-90/+66
| | | | | | | | Work in progress. Parsing for non-writeback, single spaced register lists works now. The rest have the representations better factored, but still need more to be able to parse properly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146579 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix for bug #11429: Wrong behaviour for switches. Small improvement for code ↵Stepan Dyatkovskiy2011-12-144-11/+395
| | | | | | size heuristics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146578 91177308-0d34-0410-b5e6-96231b3b80d8
* It turns out that clang does use pointer-to-function types toDan Gohman2011-12-143-3/+40
| | | | | | | point to ARC-managed pointers sometimes. This fixes rdar://10551239. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146577 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix speling and 80-col.Jakob Stoklund Olesen2011-12-141-4/+3
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* Add support for local dynamic TLS model in LowerGlobalTLSAddress. Direct objectAkira Hatanaka2011-12-146-6/+54
| | | | | | | | | emission is not supported yet, but a patch that adds the support should follow soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146572 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix copy/pasto that skipped the 'modify' step.Jim Grosbach2011-12-141-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146571 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM/Thumb2 mov vs. mvn alias goes both ways.Jim Grosbach2011-12-142-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146570 91177308-0d34-0410-b5e6-96231b3b80d8
* VFP2 is required for FP loads. Noticed by inspection.Chad Rosier2011-12-141-0/+2
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* Tidy up.Chad Rosier2011-12-141-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146568 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM/Thumb2 'cmp rn, #imm' alias to cmn.Jim Grosbach2011-12-144-2/+15
| | | | | | | | | | When 'cmp rn #imm' doesn't match due to the immediate not being representable, but 'cmn rn, #-imm' does match, use the latter in place of the former, as it's equivalent. rdar://10552389 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146567 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix 80-column violation and extraneous brackets.Chad Rosier2011-12-141-8/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146566 91177308-0d34-0410-b5e6-96231b3b80d8
* Vectors are not aggregate types (see isAggregateType).Duncan Sands2011-12-141-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146561 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/lib/CodeGen: Fix cmake build since r146542.NAKAMURA Takumi2011-12-141-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146550 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a stupid typo in MemDepPrinter.Eli Friedman2011-12-141-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146549 91177308-0d34-0410-b5e6-96231b3b80d8
* Add missing cases to SDNode::getOperationName(). Patch by Micah Villmow.Eli Friedman2011-12-141-0/+5
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* Allow target to specify register output dependency. Still default to one.Evan Cheng2011-12-142-1/+17
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* Revert r146481 to review possible miscompilations.Bill Wendling2011-12-141-33/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146546 91177308-0d34-0410-b5e6-96231b3b80d8
* Disable to review some failures.Bill Wendling2011-12-141-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146545 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM assembler support for the target-specific .req directive.Jim Grosbach2011-12-142-1/+78
| | | | | | | rdar://10549683 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146543 91177308-0d34-0410-b5e6-96231b3b80d8
* - Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a functionEvan Cheng2011-12-1428-169/+653
| | | | | | | | | | | to finalize MI bundles (i.e. add BUNDLE instruction and computing register def and use lists of the BUNDLE instruction) and a pass to unpack bundles. - Teach more of MachineBasic and MachineInstr methods to be bundle aware. - Switch Thumb2 IT block to MI bundles and delete the hazard recognizer hack to prevent IT blocks from being broken apart. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146542 91177308-0d34-0410-b5e6-96231b3b80d8
* Add newline at EOF.Chad Rosier2011-12-141-1/+1
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* DW_AT_virtuality is also defined to be constant, not flag.Nick Lewycky2011-12-141-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146534 91177308-0d34-0410-b5e6-96231b3b80d8
* Per discussion on the list, remove BitcodeVerify pass to reimplement as a ↵Chad Rosier2011-12-143-61/+2
| | | | | | free function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146531 91177308-0d34-0410-b5e6-96231b3b80d8
* [asan] remove .preinit_array from the compiler module (it breaks .so ↵Kostya Serebryany2011-12-141-16/+0
| | | | | | builds). This should be done in the run-time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146527 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-nm: refactor in order to support reading files from stdin.Michael J. Spencer2011-12-131-31/+40
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* Support/FileSystem: Add file_magic and move a vew clients over to it.Michael J. Spencer2011-12-134-19/+172
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146523 91177308-0d34-0410-b5e6-96231b3b80d8
* Support/Program: Make Change<stream>ToBinary return error_code.Michael J. Spencer2011-12-135-18/+27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146522 91177308-0d34-0410-b5e6-96231b3b80d8
* Cleanup whitespace.Michael J. Spencer2011-12-132-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146521 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb2 assembler aliases for "mov(shifted register)"Jim Grosbach2011-12-133-1/+57
| | | | | | | rdar://10549767 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146520 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM LDM/STM system instruction variants.Jim Grosbach2011-12-133-11/+45
| | | | | | rdar://10550269 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146519 91177308-0d34-0410-b5e6-96231b3b80d8
* Thumb2 pre/post indexed stores can be from any non-PC GPR.Jim Grosbach2011-12-131-3/+3
| | | | | | rdar://10549786 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146518 91177308-0d34-0410-b5e6-96231b3b80d8
* Test for 146516Jim Grosbach2011-12-131-0/+4
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* Thumb2 tweak for ccout handling in RSB parsing.Jim Grosbach2011-12-131-1/+4
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* ARM thumb2 parsing of "rsb rd, rn, #0".Jim Grosbach2011-12-132-2/+12
| | | | | | | rdar://10549741 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146515 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM NEON two-operand aliases for VQDMULH.Jim Grosbach2011-12-133-0/+21
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* ARM pre-UAL NEG mnemonic for convenience when porting old code.Jim Grosbach2011-12-135-3/+31
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* ARM add some more pre-UAL VFP mnemonics for convenience when porting old code.Jim Grosbach2011-12-132-0/+3
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* ARM add more 'gas' compatibility aliases for NEON instructions.Jim Grosbach2011-12-133-3/+37
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* mention AddressSanitizer in 3.1 release notesKostya Serebryany2011-12-131-0/+1
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* [asan] report an error if blacklist file contains a malformed regex. fixes ↵Kostya Serebryany2011-12-131-5/+13
| | | | | | asan issue 17 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146503 91177308-0d34-0410-b5e6-96231b3b80d8
* [fast-isel] Unaligned loads of floats are not supported. Therefore, convert ↵Chad Rosier2011-12-132-7/+53
| | | | | | | | to a regular load and then move the result from a GPR to a FPR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146502 91177308-0d34-0410-b5e6-96231b3b80d8
* Rip llvm 3.0 out of the release notes, making room for LLVM 3.1Chris Lattner2011-12-131-983/+39
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* [fast-isel] Remove SelectInsertValue() as fast-isel wasn't designed to handle Chad Rosier2011-12-131-103/+0
| | | | | | instructions that define aggregate types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146492 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid using the 'insertvalue' instruction here.Bill Wendling2011-12-131-6/+33
| | | | | | | | | | Fast ISel isn't able to handle 'insertvalue' and it causes a large slowdown during -O0 compilation. We don't necessarily need to generate an aggregate of the values here if they're just going to be extracted directly afterwards. <rdar://problem/10530851> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146481 91177308-0d34-0410-b5e6-96231b3b80d8
* DW_AT_accessibility is "constant" class, not form class, so it may not useNick Lewycky2011-12-131-6/+6
| | | | | | | DW_FORM_flag. Use DW_FORM_data1 for one byte. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146475 91177308-0d34-0410-b5e6-96231b3b80d8
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