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* No need for "else if" after a return. Autosense "0o123" as octal inChris Lattner2012-04-211-4/+12
| | | | | | | StringRef::getAsInteger git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155298 91177308-0d34-0410-b5e6-96231b3b80d8
* stop hiding SmallVector's append that takes a count + element.Chris Lattner2012-04-211-1/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155297 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach getVectorTypeBreakdown about promotion of vectors in addition to ↵Nadav Rotem2012-04-212-3/+27
| | | | | | widening of vectors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155296 91177308-0d34-0410-b5e6-96231b3b80d8
* Make some fixed arrays const. Use array_lengthof in a couple places instead ↵Craig Topper2012-04-211-8/+8
| | | | | | of a hardcoded number. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155294 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up. 80 columns and some other spacing issues.Craig Topper2012-04-211-7/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155291 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused PointerLikeTypeTraits for IndexListEntry.Benjamin Kramer2012-04-211-13/+0
| | | | | | | | | It set NumLowBitAvailable = 3 which may not be true on all platforms. We only ever use 2 bits (the default) so this assumption can be safely removed Should fix PR12612. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155288 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/lib/Target: [PR12611] Add "llvm/Support/raw_ostream.h" for Debug build ↵NAKAMURA Takumi2012-04-212-0/+3
| | | | | | | | on MSVC. Thanks to Andy Gibbs, to report the issue. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155287 91177308-0d34-0410-b5e6-96231b3b80d8
* HexagonISelLowering.cpp: Reorder #includes.NAKAMURA Takumi2012-04-211-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155286 91177308-0d34-0410-b5e6-96231b3b80d8
* CMake: Enable LLVM_COMPILER_JOBS on all MS IDEs. We don't support older ↵NAKAMURA Takumi2012-04-211-3/+1
| | | | | | environments than VS9. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155285 91177308-0d34-0410-b5e6-96231b3b80d8
* CMake: Prune redundant LLVM_COMPILER_JOBS from llvm/CMakeLists.txt. ↵NAKAMURA Takumi2012-04-212-9/+2
| | | | | | HandleLLVMOptions.cmake has it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155284 91177308-0d34-0410-b5e6-96231b3b80d8
* move Signals to .rodataNuno Lopes2012-04-211-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155283 91177308-0d34-0410-b5e6-96231b3b80d8
* HexagonInstPrinter.cpp: Suppress -Wunused-variable warnings with -Asserts.NAKAMURA Takumi2012-04-211-6/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155281 91177308-0d34-0410-b5e6-96231b3b80d8
* YAMLParser: silence warning about tautological comparison on unsigned-char ↵Benjamin Kramer2012-04-211-1/+1
| | | | | | | | platforms. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155280 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove 'XXXRegisterClass' from tablegen output. Targets should use ↵Craig Topper2012-04-211-3/+0
| | | | | | '&XXXRegClass' instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155270 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: tblgen'erate more NEON two-operand aliases.Jim Grosbach2012-04-201-39/+12
| | | | | | VMUL and VEXT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155258 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR12599.Jakob Stoklund Olesen2012-04-202-1/+75
| | | | | | | | The X86 target is editing the selection DAG while isel is selecting nodes following a topological ordering. When the DAG hacking triggers CSE, nodes can be deleted and bad things happen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155257 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: tblgen'erate more NEON two-operand aliases.Jim Grosbach2012-04-201-153/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155254 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r155241, which is causing some breakage.Bill Wendling2012-04-203-72/+20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155253 91177308-0d34-0410-b5e6-96231b3b80d8
* Make ISelPosition a local variable.Jakob Stoklund Olesen2012-04-202-36/+25
| | | | | | | | | Now that multiple DAGUpdateListeners can be active at the same time, ISelPosition can become a local variable in DoInstructionSelection. We simply register an ISelUpdater with CurDAG while ISelPosition exists. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155249 91177308-0d34-0410-b5e6-96231b3b80d8
* Register DAGUpdateListeners with SelectionDAG.Jakob Stoklund Olesen2012-04-208-159/+141
| | | | | | | | | | | | | | | Instead of passing listener pointers to RAUW, let SelectionDAG itself keep a linked list of interested listeners. This makes it possible to have multiple listeners active at once, like RAUWUpdateListener was already doing. It also makes it possible to register listeners up the call stack without controlling all RAUW calls below. DAGUpdateListener uses an RAII pattern to add itself to the SelectionDAG list of active listeners. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155248 91177308-0d34-0410-b5e6-96231b3b80d8
* Extraneous semicolon.Eric Christopher2012-04-201-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155247 91177308-0d34-0410-b5e6-96231b3b80d8
* If we discover all of the named structs in a module, then don't bother toBill Wendling2012-04-203-20/+72
| | | | | | | process any more Values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155241 91177308-0d34-0410-b5e6-96231b3b80d8
* Print <def,read-undef> to avoid confusion.Jakob Stoklund Olesen2012-04-201-1/+5
| | | | | | | | The <undef> flag on a def operand only applies to partial register redefinitions. Only print the flag when relevant, and print it as <def,read-undef> to make it clearer what it means. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155239 91177308-0d34-0410-b5e6-96231b3b80d8
* Added TargetRegisterInfo::getRegPressureSetName.Andrew Trick2012-04-201-1/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155235 91177308-0d34-0410-b5e6-96231b3b80d8
* TableGen'd RegPressure: Added getPressureSetName.Andrew Trick2012-04-201-1/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155234 91177308-0d34-0410-b5e6-96231b3b80d8
* Modify the sh-bang to run out-of-the-box for FreeBSDes.Bill Wendling2012-04-202-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155230 91177308-0d34-0410-b5e6-96231b3b80d8
* New and improved comment.Andrew Trick2012-04-201-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155229 91177308-0d34-0410-b5e6-96231b3b80d8
* SparseSet: Add support for key-derived indexes and arbitrary key types.Andrew Trick2012-04-207-54/+95
| | | | | | | | | | | | | | | | | | | This nicely handles the most common case of virtual register sets, but also handles anticipated cases where we will map pointers to IDs. The goal is not to develop a completely generic SparseSet template. Instead we want to handle the expected uses within llvm without any template antics in the client code. I'm adding a bit of template nastiness here, and some assumption about expected usage in order to make the client code very clean. The expected common uses cases I'm designing for: - integer keys that need to be reindexed, and may map to additional data - densely numbered objects where we want pointer keys because no number->object map exists. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155227 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: initialize BBAndrew Trick2012-04-201-2/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155226 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow converting MachineBasicBlock::iterator to const_iterator.Andrew Trick2012-04-201-1/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155225 91177308-0d34-0410-b5e6-96231b3b80d8
* [docs] Update version number. I suggest that at some point we make theMichael J. Spencer2012-04-201-2/+2
| | | | | | build system generate this file with the proper version. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155221 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix broken internal link.Joel Jones2012-04-201-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155213 91177308-0d34-0410-b5e6-96231b3b80d8
* Kick off 3.2 cycle for LLVM trunk.Benjamin Kramer2012-04-203-13/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155211 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Update NEON assembly two-operand aliases.Jim Grosbach2012-04-204-305/+35
| | | | | | | | Use the new TwoOperandAliasConstraint to handle lots of the two-operand aliases for NEON instructions. There's still more to go, but this is a good chunk of them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155210 91177308-0d34-0410-b5e6-96231b3b80d8
* Add debugging hints for when bugpoint does not suffice, specifically for ↵Joel Jones2012-04-201-0/+77
| | | | | | instcombine and TargetLowering git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155209 91177308-0d34-0410-b5e6-96231b3b80d8
* [docs] Update Makefile for images removal.Daniel Dunbar2012-04-201-1/+1
| | | | | | | - Also, drop the lines.gif background from doxygen, this URL was wrong on the llvm.org server anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155208 91177308-0d34-0410-b5e6-96231b3b80d8
* LLVM docs no longer contain images, don't try to install them.Benjamin Kramer2012-04-201-4/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155206 91177308-0d34-0410-b5e6-96231b3b80d8
* Add documentation comment.Jim Grosbach2012-04-201-0/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155203 91177308-0d34-0410-b5e6-96231b3b80d8
* Correct spelling, q.v. http://en.wikipedia.org/wiki/Bourne_shellJoel Jones2012-04-201-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155202 91177308-0d34-0410-b5e6-96231b3b80d8
* [docs] Remove spurious or unused images.Daniel Dunbar2012-04-206-7/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155199 91177308-0d34-0410-b5e6-96231b3b80d8
* Removes json-bench from the test dependencies.Manuel Klimek2012-04-201-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155197 91177308-0d34-0410-b5e6-96231b3b80d8
* effectively back out my last change (r155190)Gabor Greif2012-04-201-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155195 91177308-0d34-0410-b5e6-96231b3b80d8
* fix obviously bogus (IMO) operand index of the load in assertsGabor Greif2012-04-201-3/+3
| | | | | | | | | | (load only has one operand) and smuggle in some whitespace changes too NB: I am obviously testing the water here, and believe that the unguarded cast is still wrong, but why is the getZExtValue of the load's operand tested against zero here? Any review is appreciated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155190 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change ↵Craig Topper2012-04-2031-296/+292
| | | | | | since they are equivalent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155188 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change ↵Craig Topper2012-04-2012-245/+244
| | | | | | since they are equivalent. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155186 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r155136 "Defer some shl transforms to DAGCombine."Jakob Stoklund Olesen2012-04-207-200/+56
| | | | | | | | | While the patch was perfect and defect free, it exposed a really nasty bug in X86 SelectionDAG that caused an llc crash when compiling lencod. I'll put the patch back in after fixing the SelectionDAG problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155181 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM some VFP tblgen'erated two-operand aliases.Jim Grosbach2012-04-202-18/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155178 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up. Formatting.Jim Grosbach2012-04-201-53/+45
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155177 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM let TableGen handle a few two-operand aliases.Jim Grosbach2012-04-191-121/+9
| | | | | | No need for these explicit aliases anymore. Nuke 'em. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155173 91177308-0d34-0410-b5e6-96231b3b80d8
* TableGen support for auto-generating assembly two-operand aliases.Jim Grosbach2012-04-192-2/+99
| | | | | | | | | | | | | | Assembly matchers for instructions with a two-operand form. ARM is full of these, for example: add {Rd}, Rn, Rm // Rd is optional and is the same as Rn if omitted. The property TwoOperandAliasConstraint on the instruction definition controls when, and if, an alias will be formed. No explicit InstAlias definitions are required. rdar://11255754 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155172 91177308-0d34-0410-b5e6-96231b3b80d8
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