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* Teach the MC and disassembler about SoftFail, and hook it up to ↵James Molloy2012-02-094-2/+90
| | | | | | UNPREDICTABLE on ARM. Wire this to tBLX in order to provide test coverage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150169 91177308-0d34-0410-b5e6-96231b3b80d8
* More tweaks to get the size of the X86 disassembler tables down.Craig Topper2012-02-093-7/+35
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150167 91177308-0d34-0410-b5e6-96231b3b80d8
* Flatten some of the arrays in the X86 disassembler tables to reduce space ↵Craig Topper2012-02-094-45/+44
| | | | | | needed to store pointers on 64-bit hosts and reduce relocations needed at startup. Part of PR11953. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150161 91177308-0d34-0410-b5e6-96231b3b80d8
* Preserve physreg kills in MachineBasicBlock::SplitCriticalEdge.Lang Hames2012-02-091-4/+7
| | | | | | | | Failure to preserve kills was causing LiveIntervals to miss some EFLAGS live ranges. Unfortunately I've been unable to reduce a good test case yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150152 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86/atom-lea-sp.ll: Add explicit -mtriple=i686-linux.NAKAMURA Takumi2012-02-091-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150151 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix kill flags when moving instructions using LiveIntervals::moveInstr(...).Lang Hames2012-02-091-6/+23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150150 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove assertion. Not all use operands are reads.Lang Hames2012-02-091-3/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150149 91177308-0d34-0410-b5e6-96231b3b80d8
* Improve TargetPassConfig. No intended functionality.Andrew Trick2012-02-092-98/+162
| | | | | | | Split CodeGen into stages. Distinguish between optimization and correctness. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150122 91177308-0d34-0410-b5e6-96231b3b80d8
* commentAndrew Trick2012-02-091-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150121 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove static initializer from DataStream.cppDavid Blaikie2012-02-091-12/+11
| | | | | | | | | | | If someone would prefer a clear name for the 'success' error_value we could come up with one - potentially just a 'named constructor' style 'error_value::success()' to make this expression more self-documenting. If I see this come up in other cases I'll certainly consider it. One step along the way to resolving PR11944. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150120 91177308-0d34-0410-b5e6-96231b3b80d8
* Erase dead copies that are clobbered by a call.Jakob Stoklund Olesen2012-02-091-5/+17
| | | | | | This does make a difference, at least when using RABasic. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150118 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle register masks when searching for EFLAGS clobbers.Jakob Stoklund Olesen2012-02-091-0/+6
| | | | | | | Calls clobber the flags, but when using register masks there is no EFLAGS<imp-def> operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150117 91177308-0d34-0410-b5e6-96231b3b80d8
* Never delete instructions that define reserved registers.Jakob Stoklund Olesen2012-02-091-6/+10
| | | | | | | | | | | I think this was already the intention, but DeadMachineInstructionElim was accidentally tracking the liveness of reserved registers. Now, instructions with reserved defs are never deleted. This prevents the call stack adjustment instructions from getting deleted when enabling register masks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150116 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle register masks in MachineCopyPropagation.Jakob Stoklund Olesen2012-02-081-0/+17
| | | | | | | | For simplicity, treat calls with register masks as basic block boundaries. This means we can't copy propagate callee-saved registers across calls, but I don't think that is a big deal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150108 91177308-0d34-0410-b5e6-96231b3b80d8
* Commit Andy Zhang's test for the lea patch.Evan Cheng2012-02-081-0/+48
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150107 91177308-0d34-0410-b5e6-96231b3b80d8
* fix broken linkChris Lattner2012-02-081-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150105 91177308-0d34-0410-b5e6-96231b3b80d8
* [asan] unpoison the stack before every noreturn call. Fixes asan issue 37. ↵Kostya Serebryany2012-02-082-2/+34
| | | | | | llvm part git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150102 91177308-0d34-0410-b5e6-96231b3b80d8
* Codegen pass definition cleanup. No functionality.Andrew Trick2012-02-0828-256/+176
| | | | | | | | | | | | | Moving toward a uniform style of pass definition to allow easier target configuration. Globally declare Pass ID. Globally declare pass initializer. Use INITIALIZE_PASS consistently. Add a call to the initializer from CodeGen.cpp. Remove redundant "createPass" functions and "getPassName" methods. While cleaning up declarations, cleaned up comments (sorry for large diff). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150100 91177308-0d34-0410-b5e6-96231b3b80d8
* Move pass configuration out of pass constructors: MachineLICM.Andrew Trick2012-02-083-6/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150099 91177308-0d34-0410-b5e6-96231b3b80d8
* whitespaceAndrew Trick2012-02-081-11/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150098 91177308-0d34-0410-b5e6-96231b3b80d8
* Move pass configuration out of pass constructors: StackSlotColoring.Andrew Trick2012-02-084-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150097 91177308-0d34-0410-b5e6-96231b3b80d8
* Move pass configuration out of pass constructors: PostRAScheduler.Andrew Trick2012-02-084-9/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150096 91177308-0d34-0410-b5e6-96231b3b80d8
* Move pass configuration out of pass constructors: BranchFolderPassAndrew Trick2012-02-087-26/+38
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150095 91177308-0d34-0410-b5e6-96231b3b80d8
* whitespaceAndrew Trick2012-02-088-80/+80
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150094 91177308-0d34-0410-b5e6-96231b3b80d8
* Added TargetPassConfig::setOptAndrew Trick2012-02-084-1/+20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150093 91177308-0d34-0410-b5e6-96231b3b80d8
* Added Pass::createPass(ID) to handle pass configuration by IDAndrew Trick2012-02-084-3/+18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150092 91177308-0d34-0410-b5e6-96231b3b80d8
* Move pass configuration out of pass constructors: TailDuplicate::PreRegAllocAndrew Trick2012-02-084-11/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150091 91177308-0d34-0410-b5e6-96231b3b80d8
* Add Register mask support to RABasic.Jakob Stoklund Olesen2012-02-081-0/+14
| | | | | | | When a virtual register is live across a call, limit the search space to call-preserved registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150081 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't map registers to the invalid dwarf register (-1). It's the default value.Benjamin Kramer2012-02-081-0/+3
| | | | | | | X86GenRegisterInfo.inc | 1032 ------------------------------------------------- 1 file changed, 1032 deletions(-) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150080 91177308-0d34-0410-b5e6-96231b3b80d8
* Use TSFlag bit to describe instruction properties.Brendon Cahoon2012-02-086-314/+208
| | | | | | | | | Creating the isPredicated TSFlag enables the code to use the property defined in the instruction format instead of using a large switch statement. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150078 91177308-0d34-0410-b5e6-96231b3b80d8
* Keep track of register masks in LiveIntervalAnalysis.Jakob Stoklund Olesen2012-02-082-0/+105
| | | | | | | | | | | | | Build an ordered vector of register mask operands (i.e., calls) when computing live intervals. Provide a checkRegMaskInterference() function that computes a bit mask of usable registers for a live range. This is a quick way of determining of a live range crosses any calls, and restricting it to the callee saved registers if it does. Previously, we had to discover call clobbers for each candidate register independently. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150077 91177308-0d34-0410-b5e6-96231b3b80d8
* Value initialize MCRegisterClasses. Not sure how could miss this during the ↵Benjamin Kramer2012-02-082-14/+3
| | | | | | MCTargetDesc refactor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150076 91177308-0d34-0410-b5e6-96231b3b80d8
* Use Use::set rather than finding the operand number of the useDuncan Sands2012-02-081-6/+3
| | | | | | | and setting that. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150074 91177308-0d34-0410-b5e6-96231b3b80d8
* PathV2: Remove static StringRef ctors.Benjamin Kramer2012-02-081-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150071 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed a bug in printing "cmp" pseudo ops.Elena Demikhovsky2012-02-085-41/+183
| | | | | | | | | | | | | | | | | | | | | | | | > This IR code > %res = call <8 x float> @llvm.x86.avx.cmp.ps.256(<8 x float> %a0, <8 x float> %a1, i8 14) > fails with assertion: > > llc: X86ATTInstPrinter.cpp:62: void llvm::X86ATTInstPrinter::printSSECC(const llvm::MCInst*, unsigned int, llvm::raw_ostream&): Assertion `0 && "Invalid ssecc argument!"' failed. > 0 llc 0x0000000001355803 > 1 llc 0x0000000001355dc9 > 2 libpthread.so.0 0x00007f79a30575d0 > 3 libc.so.6 0x00007f79a23a1945 gsignal + 53 > 4 libc.so.6 0x00007f79a23a2f21 abort + 385 > 5 libc.so.6 0x00007f79a239a810 __assert_fail + 240 > 6 llc 0x00000000011858d5 llvm::X86ATTInstPrinter::printSSECC(llvm::MCInst const*, unsigned int, llvm::raw_ostream&) + 119 I added the full testing for all possible pseudo-ops of cmp. I extended X86AsmPrinter.cpp and X86IntelInstPrinter.cpp. You'l also see lines alignments (unrelated to this fix) in X86IselLowering.cpp from my previous check-in. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150068 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove a couple unneeded intrinsic patternsCraig Topper2012-02-081-6/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150067 91177308-0d34-0410-b5e6-96231b3b80d8
* No actual functional change here, just some clarifications:Chris Lattner2012-02-081-14/+26
| | | | | | | | | | | | | Clarify that contributors are agreeing to license their code under the license corresponding to the subproject that they are contributing to, as requested by a potential contributor. Also, as a drive-by, update the llvm-gcc/GPL section to mention dragonegg and say that GPL code is all in its own repo's. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150065 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove GCC builtins for vpermilp* intrinsics as clang no longer needs them. ↵Craig Topper2012-02-083-36/+19
| | | | | | Custom lower the intrinsics to the vpermilp target specific node and remove intrinsic patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150060 91177308-0d34-0410-b5e6-96231b3b80d8
* [fast-isel] Add support for SUBs with non-legal types.Chad Rosier2012-02-082-0/+43
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150047 91177308-0d34-0410-b5e6-96231b3b80d8
* Add comment to test case.Chad Rosier2012-02-081-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150046 91177308-0d34-0410-b5e6-96231b3b80d8
* [fast-isel] Add support for ORs with non-legal types.Chad Rosier2012-02-082-2/+49
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150045 91177308-0d34-0410-b5e6-96231b3b80d8
* Added MachineInstr::isBundled() to check if an instruction is part of a bundle.Andrew Trick2012-02-083-1/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150044 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: bug in debug output.Andrew Trick2012-02-081-2/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150043 91177308-0d34-0410-b5e6-96231b3b80d8
* whitespaceAndrew Trick2012-02-081-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150042 91177308-0d34-0410-b5e6-96231b3b80d8
* stale commentAndrew Trick2012-02-081-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150041 91177308-0d34-0410-b5e6-96231b3b80d8
* add an explicit section on static constructors.Chris Lattner2012-02-081-16/+50
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150037 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't use static CTORs for the Attributes constants, while still keeping the ↵Kostya Serebryany2012-02-081-48/+78
| | | | | | class type-safe git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150031 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for a temporary forward decl type. We want this so weEric Christopher2012-02-082-0/+26
| | | | | | | | can rauw forward declarations if we decide to emit the full type. Part of rdar://10809898 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150024 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove tabs.Devang Patel2012-02-084-22/+22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150022 91177308-0d34-0410-b5e6-96231b3b80d8
* [fast-isel] Add support for indirect branches.Chad Rosier2012-02-072-0/+30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150014 91177308-0d34-0410-b5e6-96231b3b80d8
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