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* Add error handling in getInt.Patrik Hägglund2012-11-282-40/+37
| | | | | | | | | | | Accordingly, update a testcase with a broken datalayout string. Also, we never parse negative numbers, because '-' is used as a separator. Therefore, use unsigned as result type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168785 91177308-0d34-0410-b5e6-96231b3b80d8
* [asan] Split AddressSanitizer into two passes (FunctionPass, ModulePass), ↵Kostya Serebryany2012-11-286-28/+31
| | | | | | LLVM part. This requires a clang part which will follow. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168781 91177308-0d34-0410-b5e6-96231b3b80d8
* Add back support for reading and parsing 'deplibs'.Bill Wendling2012-11-287-0/+38
| | | | | | | | This is for backwards compatibility for pre-3.x bc files. The code reads the code, but does nothing with it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168779 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: Analysis that partitions the DAG into subtrees.Andrew Trick2012-11-284-77/+377
| | | | | | | | | | | This is a simple, cheap infrastructure for analyzing the shape of a DAG. It recognizes uniform DAGs that take the shape of bottom-up subtrees, such as the included matrix multiplication example. This is useful for heuristics that balance register pressure with ILP. Two canonical expressions of the heuristic are implemented in scheduling modes: -misched-ilpmin and -misched-ilpmax. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168773 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: rename ScheduleDAGILP to ScheduleDFS to prepare for other heuristics.Andrew Trick2012-11-283-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168772 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: better alias analysis.Andrew Trick2012-11-282-2/+130
| | | | | | | | | | | | | This fixes a hole in the "cheap" alias analysis logic implemented within the DAG builder itself, regardless of whether proper alias analysis is enabled. It now handles this pattern produced by LSR+CodeGenPrepare. %sunkaddr1 = ptrtoint * %obj to i64 %sunkaddr2 = add i64 %sunkaddr1, %lsr.iv %sunkaddr3 = inttoptr i64 %sunkaddr2 to i32* store i32 %v, i32* %sunkaddr3 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168768 91177308-0d34-0410-b5e6-96231b3b80d8
* misched: Debug output fix. Use an always valid iterator.Andrew Trick2012-11-281-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168767 91177308-0d34-0410-b5e6-96231b3b80d8
* BBVectorize: Correctly merge SubclassOptionalDataHal Finkel2012-11-282-0/+25
| | | | | | | When two instructions are combined into a vector instruction, the resulting instruction must have the most-conservative flags. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168765 91177308-0d34-0410-b5e6-96231b3b80d8
* Add brief support for the fission .debug_info.dwo section forEric Christopher2012-11-282-0/+12
| | | | | | ELF output. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168764 91177308-0d34-0410-b5e6-96231b3b80d8
* Add comments.Eric Christopher2012-11-281-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168763 91177308-0d34-0410-b5e6-96231b3b80d8
* Rearrange ordering of sections.Eric Christopher2012-11-281-9/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168762 91177308-0d34-0410-b5e6-96231b3b80d8
* Move and comment accessor routines.Eric Christopher2012-11-281-12/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168761 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove all references to TargetInstrInfoImpl.Jakob Stoklund Olesen2012-11-286-17/+14
| | | | | | This class has been merged into its super-class TargetInstrInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168760 91177308-0d34-0410-b5e6-96231b3b80d8
* Move the guts of TargetInstrInfoImpl into the TargetInstrInfo class.Jakob Stoklund Olesen2012-11-284-793/+686
| | | | | | | The *Impl class no longer serves a purpose now that the super-class implementation is in CodeGen. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168759 91177308-0d34-0410-b5e6-96231b3b80d8
* Move Target{Instr,Register}Info.cpp into lib/CodeGen.Jakob Stoklund Olesen2012-11-284-2/+2
| | | | | | | | | | | | | | | | The Target library is not allowed to depend on the large CodeGen library, but the TRI and TII classes provide abstract interfaces that require both caller and callee to link to CodeGen. The implementation files for these classes provide default implementations of some of the hooks. These methods may need to reference CodeGen, so they belong in that library. We already have a number of methods implemented in the TargetInstrInfoImpl sub-class because of that. I will merge that class into the parent next. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168758 91177308-0d34-0410-b5e6-96231b3b80d8
* Moving SectionMemoryManager to MCJIT to avoid cross dependency between JIT ↵Andrew Kaylor2012-11-283-1/+1
| | | | | | and RuntimeDyld git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168755 91177308-0d34-0410-b5e6-96231b3b80d8
* Some grammar fixesEli Bendersky2012-11-281-4/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168752 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r168630, r168631, and r168633 as these are causing nightly test failures.Chad Rosier2012-11-284-2/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168751 91177308-0d34-0410-b5e6-96231b3b80d8
* lit: Bump the version to .3.Daniel Dunbar2012-11-281-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168750 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch makes medium code model the default for 64-bit PowerPC ELF.Bill Schmidt2012-11-272-0/+31
| | | | | | | | | | | When the CodeGenInfo is to be created for the PPC64 target machine, a default code-model selection is converted to CodeModel::Medium provided we are not targeting the Darwin OS. Defaults for Darwin are unaffected. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168747 91177308-0d34-0410-b5e6-96231b3b80d8
* docs: [CMake] Add Xcode to the list of project formats CMake can generate.NAKAMURA Takumi2012-11-271-1/+1
| | | | | | Suggested by Sean McBride, thanks! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168745 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix comment formatting in RuntimeDyld.hAndrew Kaylor2012-11-271-23/+21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168739 91177308-0d34-0410-b5e6-96231b3b80d8
* Attempt to make the comments for dwarf debug look more likeEric Christopher2012-11-272-274/+200
| | | | | | the coding standard would like. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168737 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply section moving, make sure string section is output last.Eric Christopher2012-11-271-24/+54
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168736 91177308-0d34-0410-b5e6-96231b3b80d8
* [arm fast-isel] Appease the machine verifier by using the proper registerChad Rosier2012-11-271-9/+7
| | | | | | | | | | classes. The vast majority of the remaining issues are due to uses of invalid registers, which are defined by getRegForValue(). Those will be a little more challenging to cleanup. rdar://12719844 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168735 91177308-0d34-0410-b5e6-96231b3b80d8
* [arm fast-isel] Appease the machine verifier by using the proper registerChad Rosier2012-11-271-2/+4
| | | | | | | | classes. rdar://12719844 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168733 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused internal linkage variable.Richard Smith2012-11-271-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168729 91177308-0d34-0410-b5e6-96231b3b80d8
* [arm fast-isel] Appease the machine verifier by using the proper registerChad Rosier2012-11-271-5/+6
| | | | | | | | classes. Also a bit of cleanup. rdar://12719844 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168728 91177308-0d34-0410-b5e6-96231b3b80d8
* Add -verify-machineinstrs to these fast-isel test cases.Chad Rosier2012-11-274-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168723 91177308-0d34-0410-b5e6-96231b3b80d8
* Modifying lli to use the SectionMemoryManager.Andrew Kaylor2012-11-271-222/+10
| | | | | | The functionality of SectionMemoryManager is equivalent to the LLIMCJITMemoryManager being replaced except that it allocates memory as RW and later changes it to RX or R as needed. The page permissions are set in the call to MCJIT::finalizeObject. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168722 91177308-0d34-0410-b5e6-96231b3b80d8
* Moving SectionMemoryManager into RuntimeDyld and adding unit tests for it.Andrew Kaylor2012-11-276-14/+186
| | | | | | | | The SectionMemoryManager now supports (and requires) applying section-specific page permissions. Clients using this memory manager must call either MCJIT::finalizeObject() or SectionMemoryManager::applyPermissions() before executing JITed code. See r168718 for changes from the previous implementation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168721 91177308-0d34-0410-b5e6-96231b3b80d8
* Modified depends() to recognize that when all levels are "=" andPreston Briggs2012-11-2716-361/+376
| | | | | | | | | | there's no possible loo-independent dependence, then there's no dependence. Updated all test result appropriately. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168719 91177308-0d34-0410-b5e6-96231b3b80d8
* Implementing page permission setting in MCJIT unit test SectionMemoryManager.cppAndrew Kaylor2012-11-273-63/+205
| | | | | | This commit is primarily here for the revision history. I'm about to move the SectionMemoryManager into the RuntimeDyld library, but I wanted to check the changes in here so people could see the differences in the updated implementation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168718 91177308-0d34-0410-b5e6-96231b3b80d8
* CSE: allow PerformTrivialCoalescing to check copies across basic blockManman Ren2012-11-272-2/+32
| | | | | | | | | | | | | | | | | boundaries. Given the following case: BB0 %vreg1<def> = SUBrr %vreg0, %vreg7 %vreg2<def> = COPY %vreg7 BB1 %vreg10<def> = SUBrr %vreg0, %vreg2 We should be able to CSE between SUBrr in BB0 and SUBrr in BB1. rdar://12462006 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168717 91177308-0d34-0410-b5e6-96231b3b80d8
* instcombine: Don't replace all uses for instructions with no usesMeador Inge2012-11-272-1/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | My commit to migrate the printf simplifiers from the simplify-libcalls in r168604 introduced a regression reported by Duncan [1]. The problem is that in some cases the library call simplifier can return a new value that has no uses and the new value's type is different than the old value's type (which is fine because there are no uses). The specific case that triggered the bug looked something like: declare void @printf(i8*, ...) ... call void (i8*, ...)* @printf(i8* %fmt) Which we want to optimized into: call i32 @putchar(i32 104) However, the code was attempting to replace all uses of the printf with the putchar and the types differ, hence a crash. This is fixed by *just* deleting the original instruction when there are no uses. The old simplify-libcalls pass is already doing something similar. [1] http://lists.cs.uiuc.edu/pipermail/llvmdev/2012-November/056338.html git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168716 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove duplicated #includes.Jakub Staszak2012-11-271-4/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168712 91177308-0d34-0410-b5e6-96231b3b80d8
* SCEV: Even if the latch terminator is foldable we can't deduce the result of ↵Benjamin Kramer2012-11-272-3/+58
| | | | | | | | an unrelated condition with it. Fixes PR14432. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168711 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: do not fold load instructions such as [V]MOVS[S|D] to other instructionsManman Ren2012-11-272-0/+54
| | | | | | | | | | | | when the destination register is wider than the memory load. These load instructions load from m32 or m64 and set the upper bits to zero, while the folded instructions may accept m128. rdar://12721174 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168710 91177308-0d34-0410-b5e6-96231b3b80d8
* Test commit only modifying commentsPedro Artigas2012-11-271-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168709 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch implements medium code model support for 64-bit PowerPC.Bill Schmidt2012-11-2718-12/+645
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The default for 64-bit PowerPC is small code model, in which TOC entries must be addressable using a 16-bit offset from the TOC pointer. Additionally, only TOC entries are addressed via the TOC pointer. With medium code model, TOC entries and data sections can all be addressed via the TOC pointer using a 32-bit offset. Cooperation with the linker allows 16-bit offsets to be used when these are sufficient, reducing the number of extra instructions that need to be executed. Medium code model also does not generate explicit TOC entries in ".section toc" for variables that are wholly internal to the compilation unit. Consider a load of an external 4-byte integer. With small code model, the compiler generates: ld 3, .LC1@toc(2) lwz 4, 0(3) .section .toc,"aw",@progbits .LC1: .tc ei[TC],ei With medium model, it instead generates: addis 3, 2, .LC1@toc@ha ld 3, .LC1@toc@l(3) lwz 4, 0(3) .section .toc,"aw",@progbits .LC1: .tc ei[TC],ei Here .LC1@toc@ha is a relocation requesting the upper 16 bits of the 32-bit offset of ei's TOC entry from the TOC base pointer. Similarly, .LC1@toc@l is a relocation requesting the lower 16 bits. Note that if the linker determines that ei's TOC entry is within a 16-bit offset of the TOC base pointer, it will replace the "addis" with a "nop", and replace the "ld" with the identical "ld" instruction from the small code model example. Consider next a load of a function-scope static integer. For small code model, the compiler generates: ld 3, .LC1@toc(2) lwz 4, 0(3) .section .toc,"aw",@progbits .LC1: .tc test_fn_static.si[TC],test_fn_static.si .type test_fn_static.si,@object .local test_fn_static.si .comm test_fn_static.si,4,4 For medium code model, the compiler generates: addis 3, 2, test_fn_static.si@toc@ha addi 3, 3, test_fn_static.si@toc@l lwz 4, 0(3) .type test_fn_static.si,@object .local test_fn_static.si .comm test_fn_static.si,4,4 Again, the linker may replace the "addis" with a "nop", calculating only a 16-bit offset when this is sufficient. Note that it would be more efficient for the compiler to generate: addis 3, 2, test_fn_static.si@toc@ha lwz 4, test_fn_static.si@toc@l(3) The current patch does not perform this optimization yet. This will be addressed as a peephole optimization in a later patch. For the moment, the default code model for 64-bit PowerPC will remain the small code model. We plan to eventually change the default to medium code model, which matches current upstream GCC behavior. Note that the different code models are ABI-compatible, so code compiled with different models will be linked and execute correctly. I've tested the regression suite and the application/benchmark test suite in two ways: Once with the patch as submitted here, and once with additional logic to force medium code model as the default. The tests all compile cleanly, with one exception. The mandel-2 application test fails due to an unrelated ABI compatibility with passing complex numbers. It just so happens that small code model was incredibly lucky, in that temporary values in floating-point registers held the expected values needed by the external library routine that was called incorrectly. My current thought is to correct the ABI problems with _Complex before making medium code model the default, to avoid introducing this "regression." Here are a few comments on how the patch works, since the selection code can be difficult to follow: The existing logic for small code model defines three pseudo-instructions: LDtoc for most uses, LDtocJTI for jump table addresses, and LDtocCPT for constant pool addresses. These are expanded by SelectCodeCommon(). The pseudo-instruction approach doesn't work for medium code model, because we need to generate two instructions when we match the same pattern. Instead, new logic in PPCDAGToDAGISel::Select() intercepts the TOC_ENTRY node for medium code model, and generates an ADDIStocHA followed by either a LDtocL or an ADDItocL. These new node types correspond naturally to the sequences described above. The addis/ld sequence is generated for the following cases: * Jump table addresses * Function addresses * External global variables * Tentative definitions of global variables (common linkage) The addis/addi sequence is generated for the following cases: * Constant pool entries * File-scope static global variables * Function-scope static variables Expanding to the two-instruction sequences at select time exposes the instructions to subsequent optimization, particularly scheduling. The rest of the processing occurs at assembly time, in PPCAsmPrinter::EmitInstruction. Each of the instructions is converted to a "real" PowerPC instruction. When a TOC entry needs to be created, this is done here in the same manner as for the existing LDtoc, LDtocJTI, and LDtocCPT pseudo-instructions (I factored out a new routine to handle this). I had originally thought that if a TOC entry was needed for LDtocL or ADDItocL, it would already have been generated for the previous ADDIStocHA. However, at higher optimization levels, the ADDIStocHA may appear in a different block, which may be assembled textually following the block containing the LDtocL or ADDItocL. So it is necessary to include the possibility of creating a new TOC entry for those two instructions. Note that for LDtocL, we generate a new form of LD called LDrs. This allows specifying the @toc@l relocation for the offset field of the LD instruction (i.e., the offset is replaced by a SymbolLo relocation). When the peephole optimization described above is added, we will need to do similar things for all immediate-form load and store operations. The seven "mcm-n.ll" test cases are kept separate because otherwise the intermingling of various TOC entries and so forth makes the tests fragile and hard to understand. The above assumes use of an external assembler. For use of the integrated assembler, new relocations are added and used by PPCELFObjectWriter. Testing is done with "mcm-obj.ll", which tests for proper generation of the various relocations for the same sequences tested with the external assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168708 91177308-0d34-0410-b5e6-96231b3b80d8
* Never use .lcomm on platforms where it does not accept an alignmentUlrich Weigand2012-11-273-5/+12
| | | | | | | | | | | | argument. Instead, use a pair of .local and .comm directives. This avoids spurious differences between binaries built by the integrated assembler vs. those built by the external assembler, since the external assembler may impose alignment requirements on .lcomm symbols where the integrated assembler does not. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168704 91177308-0d34-0410-b5e6-96231b3b80d8
* Move sprintf simplifier tests to test/Transforms/InstCombineMeador Inge2012-11-272-48/+26
| | | | | | | The tests from SPrintF.ll should have been migrated to sprintf-1.ll in r168677, but I forgot to do it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168702 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the dependent libraries feature.Bill Wendling2012-11-2720-158/+1
| | | | | | | The dependent libraries feature was never used and has bit-rotted. Remove it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168694 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/test/Transforms/SimplifyLibCalls: FileCheck-ize 3 tests.NAKAMURA Takumi2012-11-273-6/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168691 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/test/Transforms/SimplifyLibCalls/SPrintF.ll: Handle @sprintf() with ↵NAKAMURA Takumi2012-11-271-2/+1
| | | | | | -instcombine, not -simplify-libcalls. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168690 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/test/Transforms/SimplifyLibCalls/SPrintF.ll: Fix datalayout since r168516.NAKAMURA Takumi2012-11-273-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168689 91177308-0d34-0410-b5e6-96231b3b80d8
* Trailing linefeeds.NAKAMURA Takumi2012-11-272-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168688 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert accidental commit.Craig Topper2012-11-271-0/+42
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168687 91177308-0d34-0410-b5e6-96231b3b80d8
* Make PrintReg constructor explicit to prevent weird implicit conversions ↵Craig Topper2012-11-272-43/+2
| | | | | | from accidentally being triggered. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168686 91177308-0d34-0410-b5e6-96231b3b80d8
* Add ENABLE_CXX11 and ENABLE_WERROR to Makefile.llvm.rules for sample ↵Craig Topper2012-11-271-0/+9
| | | | | | project. They were previously added to Makefile.llvm.config.in but the consumption was missing git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168685 91177308-0d34-0410-b5e6-96231b3b80d8
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