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* R600/SI: add srl/sha patterns for SIChristian Konig2013-03-273-2/+34
* Allocate r0 on PPCHal Finkel2013-03-272-2/+18
* Use the PPC no-r0 class on the TOC LD pseudosHal Finkel2013-03-271-2/+2
* Apply the no-r0 register class to the PPC SELECT_CC_I[4|8] pseudosHal Finkel2013-03-271-2/+7
* Apply the no-r0 class to PPC TOC ADDI[S] pseudo instructionsHal Finkel2013-03-271-9/+9
* Remove the link register from the GPR classes on PowerPC.Bill Schmidt2013-03-278-17/+17
* Added back in the test for arc-annotations.Michael Gottesman2013-03-271-0/+307
* Adding DIImportedModules to DIScopes.David Blaikie2013-03-2799-1354/+1473
* Don't spill PPC VRSAVE on non-Darwin (even in SjLj)Hal Finkel2013-03-275-6/+18
* Make DIBuilder::createClassType more type safe by returning DICompositeType r...David Blaikie2013-03-262-14/+17
* DebugInfo: more support for mutating DICompositeType to reduce magic number u...David Blaikie2013-03-262-1/+9
* Add a boolean parameter to the ExecuteAndWait static function to indicatedChad Rosier2013-03-262-5/+9
* Use the full path when outputting the `.gcda' file.Bill Wendling2013-03-261-5/+14
* Add XTEST codegen supportMichael Liao2013-03-266-1/+35
* Add HLE target featureMichael Liao2013-03-264-1/+14
* Enable SandyBridgeModel for all modern Intel P6 descendants.Jakob Stoklund Olesen2013-03-264-37/+47
* Debug Info: Provide a means to update the members of a composite typeDavid Blaikie2013-03-262-0/+12
* Restore real bit lengths on PPC register numbersHal Finkel2013-03-261-12/+12
* TableGen SubtargetEmitter fix to allow A9 and Swift to coexist.Andrew Trick2013-03-262-2/+24
* Fix the register scavenger for targets that provide custom spillingHal Finkel2013-03-262-4/+8
* PPC: Use HWEncoding and TRI->getEncodingValueHal Finkel2013-03-268-100/+31
* R600/SIMCCodeEmitter.cpp: Prune a couple of unused members, STI and Ctx. [-Wu...NAKAMURA Takumi2013-03-261-3/+1
* Use multiple virtual registers in PPC CR spillingHal Finkel2013-03-263-42/+58
* Update PPCRegisterInfo's use of virtual registers to be SSAHal Finkel2013-03-261-3/+5
* Update PEI's virtual-register-based scavenging to support multiple simultaneo...Hal Finkel2013-03-264-27/+43
* Annotate the remaining x86 instructions with SchedRW lists.Jakob Stoklund Olesen2013-03-263-10/+10
* Annotate x87 and mmx instructions with SchedRW lists.Jakob Stoklund Olesen2013-03-262-31/+71
* Annotate control instructions with SchedRW lists.Jakob Stoklund Olesen2013-03-261-28/+41
* Annotate the rest of X86InstrInfo.td with SchedRW lists.Jakob Stoklund Olesen2013-03-261-27/+43
* Fix PRFCHW test on non-x86 buildsMichael Liao2013-03-261-1/+1
* BasicAA: Only query twice if the result of the more general query was MayAliasArnold Schwaighofer2013-03-261-5/+5
* Add PREFETCHW codegen supportMichael Liao2013-03-266-5/+24
* Add test case for commit r178031.Ulrich Weigand2013-03-261-0/+50
* Hexagon: Use multiclass for aslh, asrh, sxtb, sxth, zxtb and zxth.Jyotsna Verma2013-03-263-186/+69
* Make InstCombineCasts.cpp:OptimizeIntToFloatBitCast endian safe.Ulrich Weigand2013-03-261-1/+9
* Hexagon: Remove HexagonMCInst.h file. It has been replaced with MCTargetDesc/...Jyotsna Verma2013-03-261-41/+0
* Revert ARM Scheduler Model: Add resources instructions, map resourcesArnold Schwaighofer2013-03-264-70/+24
* Remove default case from fully covered switch.Benjamin Kramer2013-03-261-1/+1
* R600/SI: improve post ISel foldingChristian Konig2013-03-261-31/+43
* R600/SI: improve vector interpolationChristian Konig2013-03-261-0/+20
* R600/SI: avoid unecessary subreg extraction in IMAGE_SAMPLEChristian Konig2013-03-262-14/+8
* R600/SI: switch back to RegPressure schedulingChristian Konig2013-03-263-1/+9
* R600/SI: mark most intrinsics as readnone v2Christian Konig2013-03-263-54/+89
* R600/SI: replace WQM intrinsicChristian Konig2013-03-265-28/+14
* R600/SI: fix ELSE pseudo op handlingChristian Konig2013-03-261-1/+2
* Patch by Gordon Keiser!Joe Abbey2013-03-262-1/+3
* [ASan] Change the ABI of __asan_before_dynamic_init function: now it takes po...Alexey Samsonov2013-03-261-17/+13
* PowerPC: Mark patterns as isCodeGenOnly.Ulrich Weigand2013-03-264-7/+21
* PowerPC: Simplify handling of fixups.Ulrich Weigand2013-03-265-70/+19
* PowerPC: Simplify FADD in round-to-zero mode.Ulrich Weigand2013-03-264-101/+50
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