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* Add X86 RORX instructionCraig Topper2011-10-239-14/+109
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142741 91177308-0d34-0410-b5e6-96231b3b80d8
* The element insertion code in scalar replacement doesn't handle incorrectCameron Zwarich2011-10-232-2/+23
| | | | | | | element types, even though the element extraction code does. It is surprising that this bug has been here for so long. Fixes <rdar://problem/10318778>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142740 91177308-0d34-0410-b5e6-96231b3b80d8
* Add X86 MULX instruction for disassembler.Craig Topper2011-10-233-0/+48
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142738 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove some duplicate specifying of neverHasSideEffects and mayLoad from X86 ↵Craig Topper2011-10-221-5/+5
| | | | | | multiply instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142737 91177308-0d34-0410-b5e6-96231b3b80d8
* Oops! Fix test I forgot to submit as part of r142735.Nick Lewycky2011-10-221-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142736 91177308-0d34-0410-b5e6-96231b3b80d8
* A non-escaping malloc in the entry block is not unlike an alloca. Do dead-storeNick Lewycky2011-10-222-2/+33
| | | | | | | elimination on them too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142735 91177308-0d34-0410-b5e6-96231b3b80d8
* Make SCEV's brute force analysis stronger in two ways. Firstly, we should beNick Lewycky2011-10-222-26/+178
| | | | | | | | | | | | | | | | | able to constant fold load instructions where the argument is a constant. Second, we should be able to watch multiple PHI nodes through the loop; this patch only supports PHIs in loop headers, more can be done here. With this patch, we now constant evaluate: static const int arr[] = {1, 2, 3, 4, 5}; int test() { int sum = 0; for (int i = 0; i < 5; ++i) sum += arr[i]; return sum; } git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142731 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a typo.wNadav Rotem2011-10-221-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142729 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor updates.Jim Grosbach2011-10-221-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142728 91177308-0d34-0410-b5e6-96231b3b80d8
* Added my name to CREDITS.TXTNadav Rotem2011-10-221-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142727 91177308-0d34-0410-b5e6-96231b3b80d8
* Move various generated tables into read-only memory, fixing up const ↵Benjamin Kramer2011-10-226-34/+40
| | | | | | correctness along the way. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142726 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix pr11193.Nadav Rotem2011-10-222-3/+15
| | | | | | | | | SHL inserts zeros from the right, thus even when the original sign_extend_inreg value was of 1-bit, we need to sra. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142724 91177308-0d34-0410-b5e6-96231b3b80d8
* The different flavors of ARM have different valid subsets of registers. CheckBill Wendling2011-10-221-3/+13
| | | | | | | | that the set of callee-saved registers is correct for the specific platform. <rdar://problem/10313708> & ctor_dtor_count & ctor_dtor_count-2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142706 91177308-0d34-0410-b5e6-96231b3b80d8
* Assembly parsing for 4-register sequential variant of VLD2.Jim Grosbach2011-10-214-42/+24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142704 91177308-0d34-0410-b5e6-96231b3b80d8
* Assembly parsing for 2-register sequential variant of VLD2.Jim Grosbach2011-10-216-37/+54
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142691 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure that the landing pads themselves have no PHI instructions in them.Bill Wendling2011-10-211-0/+21
| | | | | | | | | The assumption in the back-end is that PHIs are not allowed at the start of the landing pad block for SjLj exceptions. <rdar://problem/10313708> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142689 91177308-0d34-0410-b5e6-96231b3b80d8
* Extend the floating point heuristic to consider NaN checks unlikely.Benjamin Kramer2011-10-211-4/+17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142687 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r141657 for now. This has broken css and changed links on llvm.org. ↵Tanya Lattner2011-10-211-826/+613
| | | | | | I'd like to understand exactly why the links have changed and if a newer doxygen is required. This may be reapplied once we upgrade on llvm.org and it is fully tested. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142686 91177308-0d34-0410-b5e6-96231b3b80d8
* Remap blockaddress correctly when inlining a function. Fixes PR10162.Eli Friedman2011-10-212-1/+59
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142684 91177308-0d34-0410-b5e6-96231b3b80d8
* Use LLVMBool for a function that logically returns a boolean value.Owen Anderson2011-10-212-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142683 91177308-0d34-0410-b5e6-96231b3b80d8
* Assembly parsing for 4-register variant of VLD1.Jim Grosbach2011-10-218-31/+48
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142682 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typo.Owen Anderson2011-10-211-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142681 91177308-0d34-0410-b5e6-96231b3b80d8
* BranchProbabilityInfo: floating point equality is unlikely.Benjamin Kramer2011-10-211-2/+34
| | | | | | This is from the same paper from Ball and Larus as the rest of the currently implemented heuristics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142677 91177308-0d34-0410-b5e6-96231b3b80d8
* Assembly parsing for 3-register variant of VLD1.Jim Grosbach2011-10-218-23/+46
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142675 91177308-0d34-0410-b5e6-96231b3b80d8
* STABS symbols are debug symbols.Owen Anderson2011-10-211-1/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142673 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor simplification: use ShuffleVectorInst::getMaskValue instead of a more ↵Eli Friedman2011-10-211-2/+2
| | | | | | expensive helper. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142672 91177308-0d34-0410-b5e6-96231b3b80d8
* Extend instcombine's shufflevector simplification to handle more cases where ↵Eli Friedman2011-10-212-61/+241
| | | | | | the input and output vectors have different sizes. Patch by Xiaoyi Guo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142671 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM VLD parsing and encoding.Jim Grosbach2011-10-218-255/+285
| | | | | | | | | | | | | | | Next step in the ongoing saga of NEON load/store assmebly parsing. Handle VLD1 instructions that take a two-register register list. Adjust the instruction definitions to only have the single encoded register as an operand. The super-register from the pseudo is kept as an implicit def, so passes which come after pseudo-expansion still know that the instruction defines the other subregs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142670 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't automatically set the "fc" bits on MSR instructions if the user didn't ↵Owen Anderson2011-10-211-3/+7
| | | | | | ask for them. This is a divergence from gas' behavior, but it is correct per the documentation and allows us to forge ahead with roundtrip testing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142669 91177308-0d34-0410-b5e6-96231b3b80d8
* Bind libObject API for obtaining the section containing a Symbol.Owen Anderson2011-10-212-0/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142667 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand the coverage of the libObject C bindings to include more SectionRef ↵Owen Anderson2011-10-212-2/+100
| | | | | | accessors as well as Symbol iterators. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142661 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix pr11194. When promoting and splitting integers we need to useNadav Rotem2011-10-212-3/+31
| | | | | | | | | | ZExtPromotedInteger and SExtPromotedInteger based on the operation we legalize. SetCC return type needs to be legalized via PromoteTargetBoolean. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142660 91177308-0d34-0410-b5e6-96231b3b80d8
* Nuke an #if0 that got accidentally left in.Jim Grosbach2011-10-211-31/+0
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* whitespace.Jim Grosbach2011-10-211-1/+1
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* Don't hard code the desired alignment for loops -- it isn't 16-bytes onChandler Carruth2011-10-211-3/+3
| | | | | | all x86 systems. Sorry for the breakage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142656 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove some outdated comments.Jim Grosbach2011-10-211-11/+11
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* 1. Fix the widening of SETCC in WidenVecOp_SETCC. Use the correct return CC ↵Nadav Rotem2011-10-214-14/+47
| | | | | | | | | | type. 2. Fix a typo in CONCAT_VECTORS which exposed the bug in #1. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142648 91177308-0d34-0410-b5e6-96231b3b80d8
* Ensure timestamps are not embedded into files when doing a release build.Duncan Sands2011-10-211-0/+1
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* Fix build on mingw-w64.Anton Korobeynikov2011-10-211-6/+8
| | | | | | | Patch by Ruben Van Boxem! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142646 91177308-0d34-0410-b5e6-96231b3b80d8
* Add loop aligning to MachineBlockPlacement based on review discussion soChandler Carruth2011-10-212-5/+108
| | | | | | | | | | | | | | | | | | | it's a bit more plausible to use this instead of CodePlacementOpt. The code for this was shamelessly stolen from CodePlacementOpt, and then trimmed down a bit. There doesn't seem to be much utility in returning true/false from this pass as we may or may not have rewritten all of the blocks. Also, the statistic of counting how many loops were aligned doesn't seem terribly important so I removed it. If folks would like it to be included, I'm happy to add it back. This was probably the most egregious of the missing features, and now I'm going to start gathering some performance numbers and looking at specific loop structures that have different layout between the two. Test is updated to include both basic loop alignment and nested loop alignment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142645 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a very basic test for MachineBlockPlacement. This is essentially theChandler Carruth2011-10-211-0/+75
| | | | | | | | | | | | | | | | | canonical example I used when developing it, and is one of the primary motivating real-world use cases for __builtin_expect (when burried under a macro). I'm working on more test cases here, but I'm trying to make sure both that the pass is doing the right thing with the test cases and that they aren't too brittle to changes elsewhere in the code generation pipeline. Feedback and/or suggestions on how to test this are very welcome. Especially feedback on whether testing the block comments is a good strategy; I couldn't find any good examples to steal from but all the other ideas I had were a lot uglier or more fragile. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142644 91177308-0d34-0410-b5e6-96231b3b80d8
* Modify the script to output the regressions and passes into categories. My ↵Bill Wendling2011-10-211-9/+44
| | | | | | Python-fu could use some improving... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142643 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove intrinsics for X86 BLSI, BLSMSK, and BLSR intrinsics and replace with ↵Craig Topper2011-10-215-51/+93
| | | | | | custom isel lowering code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142642 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement a block placement pass based on the branch probability andChandler Carruth2011-10-216-2/+643
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | block frequency analyses. This differs substantially from the existing block-placement pass in LLVM: 1) It operates on the Machine-IR in the CodeGen layer. This exposes much more (and more precise) information and opportunities. Also, the results are more stable due to fewer transforms ocurring after the pass runs. 2) It uses the generalized probability and frequency analyses. These can model static heuristics, code annotation derived heuristics as well as eventual profile loading. By basing the optimization on the analysis interface it can work from any (or a combination) of these inputs. 3) It uses a more aggressive algorithm, both building chains from tho bottom up to maximize benefit, and using an SCC-based walk to layout chains of blocks in a profitable ordering without O(N^2) iterations which the old pass involves. The pass is currently gated behind a flag, and not enabled by default because it still needs to grow some important features. Most notably, it needs to support loop aligning and careful layout of loop structures much as done by hand currently in CodePlacementOpt. Once it supports these, and has sufficient testing and quality tuning, it should replace both of these passes. Thanks to Nick Lewycky and Richard Smith for help authoring & debugging this, and to Jakob, Andy, Eric, Jim, and probably a few others I'm forgetting for reviewing and answering all my questions. Writing a backend pass is *sooo* much better now than it used to be. =D git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142641 91177308-0d34-0410-b5e6-96231b3b80d8
* Check for divide by zero.Bill Wendling2011-10-211-2/+2
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* Remove a now dead function, fixing -Wunused-function warnings fromChandler Carruth2011-10-211-20/+0
| | | | | | Clang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142631 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix unused variable warning.Richard Smith2011-10-211-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142630 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r142618, r142622, and r142624, which were based on an incorrect ↵Owen Anderson2011-10-204-65/+77
| | | | | | reading of the ARMv7 docs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142626 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix decoding tests for fixed MSR encodings.Owen Anderson2011-10-202-55/+5
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* Remove unused include of sys/uio.h in MemoryBuffer.cpp. It was not correctly ↵David Meyer2011-10-201-1/+0
| | | | | | protected by ifdef either. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142623 91177308-0d34-0410-b5e6-96231b3b80d8
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