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* Add some more stats for fast isel vs. SelectionDAG, w.r.t lowering functionEli Bendersky2013-04-191-1/+10
| | | | | | | | arguments in entry BBs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179824 91177308-0d34-0410-b5e6-96231b3b80d8
* Use an enum instead of magic constants to improve readability.Bill Wendling2013-04-192-16/+44
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179820 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement a better fix for PR15185.Bill Wendling2013-04-181-6/+11
| | | | | | | | If the return type is a pointer and the call returns an integer, then do the inttoptr convertions. And vice versa. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179817 91177308-0d34-0410-b5e6-96231b3b80d8
* Relax this assert. It may not hold in all cases.Bill Wendling2013-04-181-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179814 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] Apply the condition code mnemonic aliases to both the Intel andChad Rosier2013-04-182-1/+31
| | | | | | | | AT&T dialect. Test case for r179804 as well. rdar://13674398 and PR13340. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179813 91177308-0d34-0410-b5e6-96231b3b80d8
* Assert if we're trying to generate a null compact unwind entry.Bill Wendling2013-04-181-4/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179809 91177308-0d34-0410-b5e6-96231b3b80d8
* Set the compact unwind encoding to 'requires EH DWARF' if we cannot generate ↵Bill Wendling2013-04-181-9/+9
| | | | | | a CU encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179808 91177308-0d34-0410-b5e6-96231b3b80d8
* Disable PPC comparison optimization by defaultHal Finkel2013-04-182-1/+7
| | | | | | | This seems to cause a stage-2 LLVM compile failure (by crashing TableGen); do I'm disabling this for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179807 91177308-0d34-0410-b5e6-96231b3b80d8
* [asm parser] Add support for predicating MnemonicAlias based on the assemblerChad Rosier2013-04-185-88/+130
| | | | | | | | | variant/dialect. Addresses a FIXME in the emitMnemonicAliases function. Use and test case to come shortly. rdar://13688439 and part of PR13340. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179804 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement optimizeCompareInstr for PPCHal Finkel2013-04-183-0/+413
| | | | | | | | | | | | | | | Many PPC instructions have a so-called 'record form' which stores to a specific condition register the result of comparing the result of the instruction with zero (always as a signed comparison). For integer operations on PPC64, this is always a 64-bit comparison. This implementation is derived from the implementation in the ARM backend; there are some differences because PPC condition registers are allocatable virtual registers (although the record forms always use a specific one), and we look for a matching subtraction instruction after the compare (but before the first use) in addition to before it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179802 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the TargetIndependent flag have the right boolean value.Bill Wendling2013-04-183-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179798 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: Add an SSE2 lowering for 64 bit compares when pcmpgtq (SSE4.2) isn't ↵Benjamin Kramer2013-04-182-15/+176
| | | | | | | | available. This pattern started popping up in vectorized min/max reductions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179797 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typoEli Bendersky2013-04-181-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179793 91177308-0d34-0410-b5e6-96231b3b80d8
* Cleanup patch:Bill Wendling2013-04-183-71/+71
| | | | | | | | | | | | | | | | Semantics of parameters named Index and Idx were inconsistent between "include/llvm/IR/Attributes.h", "lib/IR/AttributeImpl.h" and "lib/IR/Attributes.cpp": sometimes these were fixed 1-based indexes of IR parameters (or AttributeSet::ReturnIndex for IR return values or AttributeSet::FunctionIndex for IR functions), other times they were the internal slot for storage in the underlying AttributeSetImpl. I renamed usage of the former to "Index" and usage of the latter to "Slot" ("Slot" was already being used consistently for the latter in a subset of cases) Patch by Stephen Lin! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179791 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch addresses two cleanup issues:Bill Wendling2013-04-183-111/+71
| | | | | | | | | | | | | | | | | 1. Verify::VerifyParameterAttrs in "lib/IR/Verifier.cpp" and AttrBuilder::removeFunctionOnlyAttrs in "lib/IR/Attributes.cpp" (only called by Verify::VerifyFunctionAttrs) separately maintained a list of function-only attribute types. I've consolidated the logic into a new function used for both cases in "lib/IR/Verifier.cpp", so this logic is in one place (other than the AsmParser front-end) 2. Various functions in "lib/IR/Verifier.cpp" passed AttributeSet around by reference needlessly, as it's just a handle to an immutable pimpl body. Patch by Stephen Lin! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179790 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a -Wdocumentation warningDmitri Gribenko2013-04-181-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179789 91177308-0d34-0410-b5e6-96231b3b80d8
* In the function InstCombiner::visitExtractElementInst() removed the ↵Anat Shemer2013-04-182-4/+16
| | | | | | limitation that extract is promoted over a cast only if the cast has only one use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179786 91177308-0d34-0410-b5e6-96231b3b80d8
* C API: Fix coding styleTom Stellard2013-04-182-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179785 91177308-0d34-0410-b5e6-96231b3b80d8
* Added a function scalarizePHI() that sclarizes a vector phi instruction if ↵Anat Shemer2013-04-183-0/+105
| | | | | | it has only 2 uses: one to promote the vector phi in a loop and the other use is an extract operation of one element at a constant location. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179783 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix comment. Patch by Stephen Lin.Bill Wendling2013-04-181-2/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179780 91177308-0d34-0410-b5e6-96231b3b80d8
* At Jim Grosbach's request detemplate Object/MachO.h.Rafael Espindola2013-04-1811-1755/+2039
| | | | | | | We are still able to handle mixed endian objects by swapping one struct at a time. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179778 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a comment, PR15777.Chris Lattner2013-04-181-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179775 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow misaligned stores in x86 fast-isel.Derek Schuff2013-04-182-5/+18
| | | | | | | | | | | | In X86FastISel::X86SelectStore(), improperly aligned stores are rejected and handled by the DAG-based ISel. However, X86FastISel::X86SelectLoad() makes no such requirement. There doesn't appear to be an x86 architectural correctness issue with allowing potentially unaligned store instructions. This patch removes this restriction. Patch by Jim Stichnot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179774 91177308-0d34-0410-b5e6-96231b3b80d8
* LoopVectorizer: Recognize min/max reductionsArnold Schwaighofer2013-04-182-34/+608
| | | | | | | | | | | | A min/max operation is represented by a select(cmp(lt/le/gt/ge, X, Y), X, Y) sequence in LLVM. If we see such a sequence we can treat it just as any other commutative binary instruction and reduce it. This appears to help bzip2 by about 1.5% on an imac12,2. radar://12960601 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179773 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix grammar in LLVMBuild.rstEli Bendersky2013-04-181-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179768 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] Simplify some logic and add a FIXME for unhandled unary minus.Chad Rosier2013-04-181-10/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179765 91177308-0d34-0410-b5e6-96231b3b80d8
* Make this private method.Chad Rosier2013-04-181-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179764 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixes to LangRef.rst: incorrect attributes syntax and misplaced 'nobuiltin'Eli Bendersky2013-04-181-7/+8
| | | | | | | Patch by Stephen Lin git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179763 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix comment spacing.Chad Rosier2013-04-181-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179761 91177308-0d34-0410-b5e6-96231b3b80d8
* LoopVectorize: Use a set to avoid longer cycles in the reduction chain too.Benjamin Kramer2013-04-182-8/+24
| | | | | | Fixes PR15748. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179757 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix for PR14824, An ARM Load/Store Optimization bugHao Liu2013-04-182-1/+99
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179751 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Combine bit test + conditional or into simple math"David Majnemer2013-04-182-140/+0
| | | | | | | It is causing stage2 builds to fail, let's get them running again. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179750 91177308-0d34-0410-b5e6-96231b3b80d8
* Combine bit test + conditional or into simple mathDavid Majnemer2013-04-182-0/+140
| | | | | | | | | | | | | | | | | Simplify: (select (icmp eq (and X, C1), 0), Y, (or Y, C2)) Into: (or (shl (and X, C1), C3), y) Where: C3 = Log(C2) - Log(C1) If: C1 and C2 are both powers of two git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179748 91177308-0d34-0410-b5e6-96231b3b80d8
* [objc-arc] Do not mismatch up retains inside a for loop with releases ↵Michael Gottesman2013-04-182-96/+167
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | outside said for loop in the presense of differing provenance caused by escaping blocks. This occurs due to an alloca representing a separate ownership from the original pointer. Thus consider the following pseudo-IR: objc_retain(%a) for (...) { objc_retain(%a) %block <- %a F(%block) objc_release(%block) } objc_release(%a) From the perspective of the optimizer, the %block is a separate provenance from the original %a. Thus the optimizer pairs up the inner retain for %a and the outer release from %a, resulting in segfaults. This is fixed by noting that the signature of a mismatch of retain/releases inside the for loop is a Use/CanRelease top down with an None bottom up (since bottom up the Retain-CanRelease-Use-Release sequence is completed by the inner objc_retain, but top down due to the differing provenance from the objc_release said sequence is not completed). In said case in CheckForCFGHazards, we now clear the state of %a implying that no pairing will occur. Additionally a test case is included. rdar://12969722 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179747 91177308-0d34-0410-b5e6-96231b3b80d8
* Removed trailing whitespace.Michael Gottesman2013-04-181-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179746 91177308-0d34-0410-b5e6-96231b3b80d8
* Streamline arc-annotation test (removing some cases which do not add any ↵Michael Gottesman2013-04-181-233/+9
| | | | | | extra coverage) and set it up to use FileCheck variables to make the test more robust. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179745 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Rename function.Akira Hatanaka2013-04-181-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179741 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] DSP-ASE move from HI/LO register instructions.Akira Hatanaka2013-04-185-8/+112
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179739 91177308-0d34-0410-b5e6-96231b3b80d8
* Mips assembler: formatting and comment changes.Jack Carter2013-04-181-302/+294
| | | | | | | | This patch should not have any functional changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179737 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an option `-enable-old-style-attr-syntax' to print out function ↵Bill Wendling2013-04-174-28/+35
| | | | | | | | | | | attributes in the "old" style. It's sometimes beneficial to emit a testcase with the old style attribute syntax. Allow someone to do this. <rdar://problem/13563209> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179735 91177308-0d34-0410-b5e6-96231b3b80d8
* [objc-arc] Added annotation option to only emit annotations for a specific ↵Michael Gottesman2013-04-171-0/+24
| | | | | | ssa identifier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179729 91177308-0d34-0410-b5e6-96231b3b80d8
* Two small cleanups for ELF's templates.Rafael Espindola2013-04-172-99/+73
| | | | | | | | | | * We only ever specialize these templates with an instantiation of ELFType, so we don't need a template template. * Replace LLVM_ELF_COMMA with just passing the individual parameters to the macro. This requires a second macro for when we only have ELFT, but that is still a small win. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179726 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for subsections to the ELF assembler. Fixes PR8717.Peter Collingbourne2013-04-1730-118/+288
| | | | | | Differential Revision: http://llvm-reviews.chandlerc.com/D598 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179725 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] These should be int64_t, not uint64_t.Chad Rosier2013-04-171-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179724 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed typo.Michael Gottesman2013-04-171-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179721 91177308-0d34-0410-b5e6-96231b3b80d8
* [ms-inline asm] Add support for the minus unary operator. Previously, we wereChad Rosier2013-04-172-73/+114
| | | | | | | | | | | | unable to handle cases such as __asm mov eax, 8*-8. This patch also attempts to simplify the state machine. Further, the error reporting has been improved. Test cases included, but more will be added to the clang side shortly. rdar://13668445 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179719 91177308-0d34-0410-b5e6-96231b3b80d8
* [objc-arc] Added descriptions for EnableARCAnnotations, ↵Michael Gottesman2013-04-172-3/+7
| | | | | | EnableCheckForCFGHazards, EnableARCOptimizations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179718 91177308-0d34-0410-b5e6-96231b3b80d8
* [objc-arc] Added an option to arc-annotations for turning off CheckForCFGHazard.Michael Gottesman2013-04-171-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179717 91177308-0d34-0410-b5e6-96231b3b80d8
* More consistent formatting and tidying-upEli Bendersky2013-04-171-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179716 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch teaches x86 fast-isel to generate the native div/idiv instructionsEli Bendersky2013-04-173-0/+288
| | | | | | | | | | | for the sdiv/srem/udiv/urem bitcode instructions. This is done for the i8, i16, and i32 types, as well as i64 for the x86_64 target. Patch by Jim Stichnoth git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179715 91177308-0d34-0410-b5e6-96231b3b80d8
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