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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42324 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42323 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42322 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42318 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42316 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42314 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42313 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42312 91177308-0d34-0410-b5e6-96231b3b80d8
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This fixes PR714.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42309 91177308-0d34-0410-b5e6-96231b3b80d8
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both results with a single div or idiv instruction. This uses new X86ISD
nodes for DIV and IDIV which are introduced during the legalize phase
so that the SelectionDAG's CSE can automatically eliminate redundant
computations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42308 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42306 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42303 91177308-0d34-0410-b5e6-96231b3b80d8
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scheduling changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42302 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42300 91177308-0d34-0410-b5e6-96231b3b80d8
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for (i=A; i<N; i++) {
if (i < X && i > Y)
do_something();
}
is transformed into
U=min(N,X); L=max(A,Y);
for (i=L;i<U;i++)
do_somethihg();
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42299 91177308-0d34-0410-b5e6-96231b3b80d8
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of zero, infinity, and NaNs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42298 91177308-0d34-0410-b5e6-96231b3b80d8
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the check to see if the assembler supports .loc from X86TargetLowering
into the superclass TargetLowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42297 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42296 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42294 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42286 91177308-0d34-0410-b5e6-96231b3b80d8
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dependency). These are a bunch of instructions that are duplicated so the x86 backend can support both the old and new schemes at the same time. They will be deleted after
all the kinks are worked out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42285 91177308-0d34-0410-b5e6-96231b3b80d8
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physical register dependency. The BURR scheduler can now backtrace and duplicate instructions in order to avoid "expensive / impossible to copy" values (e.g. status flag EFLAGS for x86) from being clobbered.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42284 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42283 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42282 91177308-0d34-0410-b5e6-96231b3b80d8
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have situations where an SSE instruction turns into
multiple blocks, with the live range of an x87
register crossing them. To do this correctly make
sure we examine all blocks when inserting
FP_REG_KILL. PR 1697. (This was exposed by my
fix for PR 1681, but the same thing could happen
mixing x87 long double with SSE.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42281 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42280 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42279 91177308-0d34-0410-b5e6-96231b3b80d8
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instead of ISD::LABEL with a manual .debug_line entry when the assembler
supports .file and .loc directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42278 91177308-0d34-0410-b5e6-96231b3b80d8
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such as will happen when .loc directives are used.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42277 91177308-0d34-0410-b5e6-96231b3b80d8
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consistency with the other currently empty sections.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42276 91177308-0d34-0410-b5e6-96231b3b80d8
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use with .loc directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42275 91177308-0d34-0410-b5e6-96231b3b80d8
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aren't really usable without each other.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42274 91177308-0d34-0410-b5e6-96231b3b80d8
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Fixes PR1698.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42273 91177308-0d34-0410-b5e6-96231b3b80d8
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file numbers to use with .loc directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42272 91177308-0d34-0410-b5e6-96231b3b80d8
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Fixed some comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42271 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42270 91177308-0d34-0410-b5e6-96231b3b80d8
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and time usage.
Fixup operator == to make this work, and add a resize method to DenseMap
so we can resize our hashtable once we know how big it should be.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42269 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42268 91177308-0d34-0410-b5e6-96231b3b80d8
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(Not the most well written stuff in the universe :P)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42267 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42266 91177308-0d34-0410-b5e6-96231b3b80d8
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code that creates the label too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42265 91177308-0d34-0410-b5e6-96231b3b80d8
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in ExpandEXTRACT_VECTOR_ELT and SplitVectorOp. This fixes an abort
in the included testcase.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42264 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42263 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42262 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42261 91177308-0d34-0410-b5e6-96231b3b80d8
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asm to die with:
ScheduleDAG.cpp:269: failed assertion `false && "Couldn't find the register class"'
instead of:
failed assertion `RegMap->getRegClass(VReg) == RC && "Register class of operand and regclass of use don't agree!"'
yay.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42259 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42257 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42256 91177308-0d34-0410-b5e6-96231b3b80d8
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The two remaining unmerged parts are DFSPass, and the Calculate().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42255 91177308-0d34-0410-b5e6-96231b3b80d8
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-1. / -0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42254 91177308-0d34-0410-b5e6-96231b3b80d8
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