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* InstCombine: Don't claim to be able to evaluate any shl in a zexted type.Benjamin Kramer2013-05-102-1/+39
| | | | | | | | | | The shift amount may be larger than the type leading to undefined behavior. Limit the transform to constant shift amounts. While there update the bits to clear in the result which may enable additional optimizations. PR15959. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181604 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement AsmParser for ARM unwind directives.Logan Chien2013-05-1024-27/+2587
| | | | | | | | | | | | | | | | | | | | This commit implements the AsmParser for fnstart, fnend, cantunwind, personality, handlerdata, pad, setfp, save, and vsave directives. This commit fixes some minor issue in the ARMELFStreamer: * The switch back to corresponding section after the .fnend directive. * Emit the unwind opcode while processing .fnend directive if there is no .handlerdata directive. * Emit the unwind opcode to .ARM.extab while processing .handlerdata even if .personality directive does not exist. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181603 91177308-0d34-0410-b5e6-96231b3b80d8
* XFAILing this test on Win32 to unbreak the build bots.Aaron Ballman2013-05-101-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181600 91177308-0d34-0410-b5e6-96231b3b80d8
* DAGCombiner: Generate a correct constant for vector types when folding (xor ↵Benjamin Kramer2013-05-102-2/+12
| | | | | | | | (and)) into (and (not)). PR15948. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181597 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: Verify the type before transforming uitofp into select.Benjamin Kramer2013-05-102-22/+41
| | | | | | PR15952. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181586 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Remove AMDILPeeopholeOptimizer and replace optimizations with tablegen ↵Tom Stellard2013-05-106-1217/+38
| | | | | | | | | | | | | | | patterns The BFE optimization was the only one we were actually using, and it was emitting an intrinsic that we don't support. https://bugs.freedesktop.org/show_bug.cgi?id=64201 Reviewed-by: Christian König <christian.koenig@amd.com> NOTE: This is a candidate for the 3.3 branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181580 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Expand SUB for v2i32/v4i32Tom Stellard2013-05-102-0/+17
| | | | | | | | | | | Patch by: Aaron Watry Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Aaron Watry <awatry@gmail.com> NOTE: This is a candidate for the 3.3 branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181579 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Expand MUL for v4i32/v2i32Tom Stellard2013-05-102-0/+18
| | | | | | | | | | | | | Fixes piglit test for OpenCL builtin mul24, and allows mad24 to run. Patch by: Aaron Watry Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Aaron Watry <awatry@gmail.com> NOTE: This is a candidate for the 3.3 branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181578 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Expand SRA for v4i32/v2i32Tom Stellard2013-05-102-0/+15
| | | | | | | | | | | | | v2: Add v4i32 test Patch by: Aaron Watry Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Aaron Watry <awatry@gmail.com> NOTE: This is a candidate for the 3.3 branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181577 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Expand vselect for v4i32 and v2i32Tom Stellard2013-05-102-0/+20
| | | | | | | | | | | | | v2: Add vselect v4i32 test Patch by: Aaron Watry Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Aaron Watry <awatry@gmail.com> NOTE: This is a candidate for the 3.3 branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181576 91177308-0d34-0410-b5e6-96231b3b80d8
* [x86AsmParser] It's valid to stop parsing an operand at an immediate.Chad Rosier2013-05-092-1/+5
| | | | | | rdar://13854369 and PR15944 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181564 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach SelectionDAG to constant fold all-constant FMA nodes the same way that ↵Owen Anderson2013-05-092-0/+23
| | | | | | it constant folds FADD, FMUL, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181555 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a documentation warning: \bried -> \briefDmitri Gribenko2013-05-091-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181551 91177308-0d34-0410-b5e6-96231b3b80d8
* Documentation warning: \param, not \parmDmitri Gribenko2013-05-091-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181549 91177308-0d34-0410-b5e6-96231b3b80d8
* Rewrite assert to avoid warning when the record element type is byte-sized.Jordan Rose2013-05-091-1/+2
| | | | | | | | | | BitstreamWriter asserts that when blob data is written from the record element vector, each element fits in a byte. However, if the record elements are specified as a SmallVector of 'char', this causes a warning from -Wtautological-constant-out-of-range-compare. Fix this by using llvm::isUInt<8> instead of a plain comparison against 256. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181545 91177308-0d34-0410-b5e6-96231b3b80d8
* Generate a compact unwind encoding in the face of a stack alignment push.Bill Wendling2013-05-092-0/+36
| | | | | | | | | | | | | | We generate a `push' of a random register (%rax) if the stack needs to be aligned by the size of that register. However, this could mess up compact unwind generation. In particular, we want to still generate compact unwind in the presence of this monstrosity. Check if the push of of the %rax/%eax register. If it is and it's marked with the `FrameSetup' flag, then we can generate a compact unwind encoding for the function only if the push is the last FrameSetup instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181540 91177308-0d34-0410-b5e6-96231b3b80d8
* Hexagon: Remove switch cases from GetDotNewPredOp and isPostIncrement functions.Jyotsna Verma2013-05-093-593/+46
| | | | | | | | No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181535 91177308-0d34-0410-b5e6-96231b3b80d8
* [GVN] Split critical-edge on the fly, instead of postpone edge-splitting to nextShuxin Yang2013-05-091-13/+39
| | | | | | | | | | | iteration. This on step toward non-iterative GVN. My local hack suggests that getting rid of iteration will speedup GVN by 30%+ on a medium sized input (2k LOC, C++). I cannot explain why not 2x or more at this moment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181532 91177308-0d34-0410-b5e6-96231b3b80d8
* Hexagon: Use relation map for getMatchingCondBranchOpcode() and Jyotsna Verma2013-05-092-535/+35
| | | | | | | | getInvertedPredicatedOpcode() functions instead of switch cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181530 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify the code a bit.Bill Wendling2013-05-091-19/+10
| | | | | | | | | | | The compact unwind registers were defined in two different places. It's better just to place them in the function that uses them and specify that this is a 64-bit or 32-bit machine. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181529 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't replace an alias in llvm.used with its target.Rafael Espindola2013-05-092-2/+144
| | | | | | | When we replace an internal alias with its target, be careful not to replace the entry in llvm.used (and llvm.compiler_used). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181524 91177308-0d34-0410-b5e6-96231b3b80d8
* [XCore] Fix handling of functions where only the LR is spilled.Richard Osborne2013-05-092-27/+41
| | | | | | | | | | | | | | Previously we only checked if the LR required saving if the frame size was non zero. However because the caller reserves 1 word for the callee to use that doesn't count towards our frame size it is possible for the LR to need saving and for the frame size to be 0. We didn't hit when the LR needed saving because of a function calls because the 1 word of stack we must allocate for our callee means the frame size is always non zero in this case. However we can hit this case if the LR is clobbered in inline asm. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181520 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: Don't just copy known bits from the first operand of an srem.Benjamin Kramer2013-05-092-1/+13
| | | | | | | That's obviously wrong. Conservatively restrict it to the sign bit, which matches the original intention of this analysis. Fixes PR15940. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181518 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid runtime type checks.Rafael Espindola2013-05-091-14/+40
| | | | | | | In most cases the relocation type implies the object word size and endianness. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181515 91177308-0d34-0410-b5e6-96231b3b80d8
* libDebugInfo depends on libObject nowadays.Benjamin Kramer2013-05-091-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181510 91177308-0d34-0410-b5e6-96231b3b80d8
* Introduce convenience typedefs for the 4 ELF object types.Rafael Espindola2013-05-093-50/+35
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181509 91177308-0d34-0410-b5e6-96231b3b80d8
* Test commit.Kai Nacke2013-05-091-0/+1
| | | | | | | Add one of my contributions to CREDITS.TXT. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181508 91177308-0d34-0410-b5e6-96231b3b80d8
* Change getRelocationAdditionalInfo to be ELF only.Rafael Espindola2013-05-0910-59/+65
| | | | | | | It was only implemented for ELF where it collected the Addend, so this patch also renames it to getRelocationAddend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181502 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Make sure debug info contains linkage names (DW_AT_MIPS_linkage_name)"Eric Christopher2013-05-093-135/+12
| | | | | | | | temporarily while investigating gdb.cp/templates.exp. This reverts commit r181471. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181496 91177308-0d34-0410-b5e6-96231b3b80d8
* LoopVectorizer: Don't assert on the absence of induction variablesArnold Schwaighofer2013-05-092-1/+36
| | | | | | | | | A computable loop exit count does not imply the presence of an induction variable. Scalar evolution can return a value for an infinite loop. Fixes PR15926. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181495 91177308-0d34-0410-b5e6-96231b3b80d8
* Use correct parameter names in comments [-Wdocumentation]Dmitri Gribenko2013-05-081-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181478 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 181475 as the DebugIR tests are breaking (automake) buildbots that ↵Daniel Malea2013-05-0814-700/+0
| | | | | | | | | | re-use build dirs - the temporaries "-debug.ll" files generated by DebugIR pass are considered tests, even though they are not git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181476 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure debug info contains linkage names (DW_AT_MIPS_linkage_name)Eric Christopher2013-05-083-12/+135
| | | | | | | | | for constructors and destructors since the original declaration given by the AT_specification both won't and can't. Patch by Yacine Belkadi, I've cleaned up the testcases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181471 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugIR tests -- lit tests for the line number transformDaniel Malea2013-05-0814-0/+700
| | | | | | | | | | | | | | - simple one-function case - function-calling case - external function calling case - exception throwing case - vector case Note: these tests are somewhat coupled to the current format of debug metadata. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181469 91177308-0d34-0410-b5e6-96231b3b80d8
* Add DebugIR pass -- emits IR file and replace source lines with IR lines in MDDaniel Malea2013-05-087-0/+263
| | | | | | | | | | | | | - requires existing debug information to be present - fixes up file name and line number information in metadata - emits a "<orig_filename>-debug.ll" succinct IR file (without !dbg metadata or debug intrinsics) that can be read by a debugger - initialize pass in opt tool to enable the "-debug-ir" flag - lit tests to follow git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181467 91177308-0d34-0410-b5e6-96231b3b80d8
* Pull up AssemblyWriter interface into header to allow subclassingDaniel Malea2013-05-082-84/+160
| | | | | | | | | | | | | - made all functions virtual so that subclasses can specialize them - add printInstructionLine so that subclasses can choose whether or not to print the newline character (without having to implement printBasicBlock() - added a second constructor to AssemblyWriter that does not require a SlotTracker, as required in order to keep the SlotTracker helper class outside AsmWriter.h and buried in the implementation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181466 91177308-0d34-0410-b5e6-96231b3b80d8
* Add line tracking support to FormattedStream Daniel Malea2013-05-082-29/+42
| | | | | | | | | | - previously formatted_raw_ostream tracked columns, now it tracks lines too - used by (upcoming) DebugIR pass to know the line number to connect to each IR instruction git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181463 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Add instruction selection pattern for (seteq $LHS, 0).Akira Hatanaka2013-05-082-0/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181459 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Add ELF relocation testsUlrich Weigand2013-05-081-0/+25
| | | | | | | | | | | This patch extends test/MC/PowerPC/ppc64-fixups.s to not only check for the correct fixup type in the --show-encoding output, but also runs the generated object file through llvm-readobj -r and verifies that the correct ELF relocation records were generated. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181453 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused isLegalAddressImmediate() method.Roman Divacky2013-05-082-21/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181452 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Add some missing PPC64 relocsUlrich Weigand2013-05-082-0/+16
| | | | | | | | | | | | | | | All R_PPC_... relocs should also be present (using the same number) under the corresponding R_PPC64_... name. The latter were missing for a couple of cases, which this patch adds. This is not a big problem when emitting the reloc, because we can just use the R_PPC_... define instead. But it is a problem when *dumping* relocations e.g. using llvm-readobj, because this will expect only R_PPC64_... values when inspecting a ppc64 ELF file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181451 91177308-0d34-0410-b5e6-96231b3b80d8
* [PowerPC] Fix regression in generating @ha/@l relocsUlrich Weigand2013-05-081-1/+10
| | | | | | | | | | | | | | | | | | The patch I committed as revision 167864 introduced a regression that causes LLVM to no longer generate appropriate relocs for @ha/@l symbol references (but fail an assertion instead). This is fixed here by re-enabling support for the VK_PPC_GAS_HA16/ VK_PPC_GAS_LO16 variant kinds (and their Darwin variants) in PPCELFObjectWriter.cpp. Tested by running projects/test-suite in -m32 mode with the integrated assembler forced on. A standalone test case will be committed shortly as well. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181450 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix handling of anonymous aggregate parameters for powerpc*-apple-darwin8.Bill Schmidt2013-05-082-4/+94
| | | | | | | | | This fixes bug 15821 similarly to the powerpc64-linux fix for bug 14779. Patch by David Fang. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181449 91177308-0d34-0410-b5e6-96231b3b80d8
* For r181148: fixed warning 'enumeral and non-enumeral type in conditional ↵Stepan Dyatkovskiy2013-05-081-1/+1
| | | | | | expression'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181437 91177308-0d34-0410-b5e6-96231b3b80d8
* Add myself as SystemZ code ownerRichard Sandiford2013-05-081-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181434 91177308-0d34-0410-b5e6-96231b3b80d8
* Add SystemZ feats to CodeGenerator.rstRichard Sandiford2013-05-081-0/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181431 91177308-0d34-0410-b5e6-96231b3b80d8
* R600/SI: Add lit tests for llvm.SI.imageload and llvm.SI.resinfo intrinsicsMichel Danzer2013-05-082-0/+197
| | | | | | | | Adapted from the llvm.SI.sample test. Reviewed-by: Christian König <christian.koenig@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181425 91177308-0d34-0410-b5e6-96231b3b80d8
* PPCInstrInfo::optimizeCompareInstr should not optimize FP comparesHal Finkel2013-05-082-20/+13
| | | | | | | | The floating-point record forms on PPC don't set the condition register bits based on a comparison with zero (like the integer record forms do), but rather based on the exception status bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181423 91177308-0d34-0410-b5e6-96231b3b80d8
* This patch fixes two tests marked as XFAIL among the ARM assembler tests.Mihai Popa2013-05-082-99/+97
| | | | | | The reference encoding is correct, but written in the wrong byte order (these are Thumb tests, while the reference is in ARM byte order). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181420 91177308-0d34-0410-b5e6-96231b3b80d8
* Add libcxx and clang-tools-extra to the testing thing.Bill Wendling2013-05-081-3/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181418 91177308-0d34-0410-b5e6-96231b3b80d8
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