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* Add 'llvm_unreachable' to passify GCC's understanding of the constraintsChandler Carruth2012-01-1013-0/+18
| | | | | | | | of several newly un-defaulted switches. This also helps optimizers (including LLVM's) recognize that every case is covered, and we should assume as much. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147861 91177308-0d34-0410-b5e6-96231b3b80d8
* Various crash reporting tools have a problem with the dwarf generated forKevin Enderby2012-01-102-25/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | assembly source when it generates the TAG_subprogram dwarf debug info for the labels that have nothing between them as in this bit of assembly source: % cat ZeroLength.s _func1: _func2: nop One solution would be to not emit the subsequent labels with the same address and use the next label with a different address or the end of the section for the AT_high_pc value of the TAG_subprogram. Turns out in llvm-mc it is not possible in all cases to determine of two symbols have the same value at the point we put out the TAG_subprogram dwarf debug info. So we will have llvm-mc instead of putting out TAG_subprogram's put out DW_TAG_label's. And the DW_TAG_label does not have a AT_high_pc value which avoids the problem. This commit is only the functional change to make the diffs clear as to what is really being changed. The next commit will be to clean up the names of such things like MCGenDwarfSubprogramEntry to something like MCGenDwarfLabelEntry. rdar://10666925 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147860 91177308-0d34-0410-b5e6-96231b3b80d8
* Add definition for intel asm variant.Devang Patel2012-01-101-1/+11
| | | | | | | Right now, this just adds additional entries in match table. The parser does not use them yet. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147859 91177308-0d34-0410-b5e6-96231b3b80d8
* Record asm variant id in MatchEntry and check it while matching instruction.Devang Patel2012-01-101-6/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147858 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unnecessary default cases in switches that cover all enum values.David Blaikie2012-01-1046-88/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147855 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug in the legalization of shuffle vectors. When we emulate shuffles ↵Nadav Rotem2012-01-102-1/+16
| | | | | | using BUILD_VECTORS we may be using a BV of different type. Make sure to cast it back. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147851 91177308-0d34-0410-b5e6-96231b3b80d8
* Add definitions for AMD's bobcat (aka btver1)Benjamin Kramer2012-01-102-0/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147846 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a crash in AVX2 when trying to broadcast a double into a 128-bit vector. ↵Craig Topper2012-01-103-18/+40
| | | | | | There is no vbroadcastsd xmm, but we do need to support 64-bit integers broadcasted into xmm. Also factor the AVX check into the isVectorBroadcast function. This makes more sense since the AVX2 check was already inside. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147844 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove hasXMM/hasXMMInt functions. Move callers to hasSSE1/hasSSE2. This is ↵Craig Topper2012-01-105-79/+77
| | | | | | the final piece to remove the AVX hack that disabled SSE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147843 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove hasSSE*orAVX functions and change all callers to use just hasSSE*. ↵Craig Topper2012-01-102-31/+27
| | | | | | AVX is now an SSE level and no longer disables SSE checks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147842 91177308-0d34-0410-b5e6-96231b3b80d8
* Instruction selection priority fixes to remove the XMM/XMMInt/orAVX ↵Craig Topper2012-01-106-116/+89
| | | | | | predicates. Another commit will remove orAVX functions from X86SubTarget. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147841 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow machine-cse to look across MBB boundary when cse'ing instructions thatEvan Cheng2012-01-104-18/+107
| | | | | | | | | | | define physical registers. It's currently very restrictive, only catching cases where the CE is in an immediate (and only) predecessor. But it catches a surprising large number of cases. rdar://10660865 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147827 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable LSR IV Chains with sufficient heuristics.Andrew Trick2012-01-106-7/+819
| | | | | | | | | | | | | | | | | | | | | | | | | | These heuristics are sufficient for enabling IV chains by default. Performance analysis has been done for i386, x86_64, and thumbv7. The optimization is rarely important, but can significantly speed up certain cases by eliminating spill code within the loop. Unrolled loops are prime candidates for IV chains. In many cases, the final code could still be improved with more target specific optimization following LSR. The goal of this feature is for LSR to make the best choice of induction variables. Instruction selection may not completely take advantage of this feature yet. As a result, there could be cases of slight code size increase. Code size can be worse on x86 because it doesn't support postincrement addressing. In fact, when chains are formed, you may see redundant address plus stride addition in the addressing mode. GenerateIVChains tries to compensate for the common cases. On ARM, code size increase can be mitigated by using postincrement addressing, but downstream codegen currently misses some opportunities. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147826 91177308-0d34-0410-b5e6-96231b3b80d8
* Accurately model hardware alignment rounding.Jakob Stoklund Olesen2012-01-101-21/+56
| | | | | | | | | | | | | | | | | | | On Thumb, the displacement computation hardware uses the address of the current instruction rouned down to a multiple of 4. Include this rounding in the UserOffset we compute for each instruction. When inline asm is present, the instruction alignment may not be known. Constrain the maximum displacement instead in that case. This makes it possible for CreateNewWater() and OffsetIsInRange() to agree about the valid displacements. When they disagree, infinite looping happens. As always, test cases for this stuff are insane. <rdar://problem/10660175> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147825 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the logging streamer.Rafael Espindola2012-01-106-279/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147820 91177308-0d34-0410-b5e6-96231b3b80d8
* Catch runaway ARMConstantIslandPass even in -Asserts builds.Jakob Stoklund Olesen2012-01-091-2/+2
| | | | | | | | | The pass is prone to looping, and it is better to crash than loop forever, even in a -Asserts build. <rdar://problem/10660175> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147806 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix asm string wrt variants.Devang Patel2012-01-092-7/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147805 91177308-0d34-0410-b5e6-96231b3b80d8
* Use descriptive variable name and remove incorrect operand number check.Devang Patel2012-01-091-12/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147802 91177308-0d34-0410-b5e6-96231b3b80d8
* Adding IV chain generation to LSR.Andrew Trick2012-01-092-5/+324
| | | | | | | | | | | | | | | | | | | After collecting chains, check if any should be materialized. If so, hide the chained IV users from the LSR solver. LSR will only solve for the head of the chain. GenerateIVChains will then materialize the chained IV users by computing the IV relative to its previous value in the chain. In theory, chained IV users could be exposed to LSR's solver. This would be considerably complicated to implement and I'm not aware of a case where we need it. In practice it's more important to intelligently prune the search space of nontrivial loops before running the solver, otherwise the solver is often forced to prune the most optimal solutions. Hiding the chained users does this well, so that LSR is more likely to find the best IV for the chain as a whole. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147801 91177308-0d34-0410-b5e6-96231b3b80d8
* Adding collection of IV chains to LSR.Andrew Trick2012-01-091-0/+242
| | | | | | | | | This collects a set of IV uses within the loop whose values can be computed relative to each other in a sequence. Following checkins will make use of this information. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147797 91177308-0d34-0410-b5e6-96231b3b80d8
* Split AsmParser into two components - AsmParser and AsmParserVariantDevang Patel2012-01-095-80/+128
| | | | | | | | | AsmParser holds info specific to target parser. AsmParserVariant holds info specific to asm variants supported by the target. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147787 91177308-0d34-0410-b5e6-96231b3b80d8
* "Minor LSR debugging stuff"Andrew Trick2012-01-091-1/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147785 91177308-0d34-0410-b5e6-96231b3b80d8
* Update language check. Do not ignore DW_LANG_Python.Devang Patel2012-01-091-1/+2
| | | | | | | Patch by Joe Groff! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147781 91177308-0d34-0410-b5e6-96231b3b80d8
* Move assert to the right place.Benjamin Kramer2012-01-091-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147779 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: Teach foldLogOpOfMaskedICmpsHelper that sign bit tests are bit ↵Benjamin Kramer2012-01-092-81/+102
| | | | | | | | tests. This subsumes several other transforms while enabling us to catch more cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147777 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't rely on the fact that shift values are never very large, and thusChandler Carruth2012-01-091-1/+1
| | | | | | | | | | | | this substraction will result in small negative numbers at worst which become very large positive numbers on assignment and are thus caught by the <=4 check on the next line. The >0 check clearly intended to catch these as negative numbers. Spotted by inspection, and impossible to trigger given the shift widths that can be used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147773 91177308-0d34-0410-b5e6-96231b3b80d8
* Cleanup and FileCheck-ize a test.Chandler Carruth2012-01-091-13/+25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147772 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove AVX hack in X86Subtarget. AVX/AVX2 are now treated as an SSE level. ↵Craig Topper2012-01-093-32/+22
| | | | | | Predicate functions have been altered to maintain previous names and behavior. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147770 91177308-0d34-0410-b5e6-96231b3b80d8
* Add HasAVX predicate to some of the AVX patterns.Craig Topper2012-01-091-0/+17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147769 91177308-0d34-0410-b5e6-96231b3b80d8
* Reorder a bunch of patterns to put the AVX version first thus giving it ↵Craig Topper2012-01-091-405/+407
| | | | | | priority over the SSE version. Another step towards trying to remove the AVX hack that disables SSE from X86Subtarget. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147768 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up patterns for MOVNT*. Not sure why there were floating point types ↵Craig Topper2012-01-092-17/+25
| | | | | | on MOVNTPS and MOVNTDQ. And v4i64 was completely missing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147767 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark MOVNTI as being supported in SSE2 OR AVX mode. This instruction has no ↵Craig Topper2012-01-091-2/+2
| | | | | | AVX equivalent so we should use the SSE version. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147766 91177308-0d34-0410-b5e6-96231b3b80d8
* Move SSE2 logical operations PAND/POR/PXOR/PANDN above SSE1 logical ↵Craig Topper2012-01-091-47/+63
| | | | | | operations ANDPS/ORPS/XORPS/ANDNPS. This fixes a pattern ordering issue that meant that the SSE2 instructions could never be directly selected since the SSE1 patterns would always match first. This is largely moot with the ExeDepsFix pass, but I'm trying to audit for all such ordering issues. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147765 91177308-0d34-0410-b5e6-96231b3b80d8
* Change some places that were checking for AVX OR SSE1/2 to use ↵Craig Topper2012-01-092-6/+6
| | | | | | hasXMM/hasXMMInt instead. Also fix one place that checked SSE3, but accidentally excluded AVX to use hasSSE3orAVX. This is a step towards removing the AVX hack from the X86Subtarget.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147764 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't print an unused label before .cfi_endproc.Rafael Espindola2012-01-098-13/+29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147763 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't disable MMX support when AVX is enabled. Fix predicates for MMX ↵Craig Topper2012-01-095-28/+53
| | | | | | instructions that were added along with SSE instructions to check for AVX in addition to SSE level. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147762 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable FISTTP* instructions when AVX is enabled.Craig Topper2012-01-081-9/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147758 91177308-0d34-0410-b5e6-96231b3b80d8
* Tweak my last commit to be less conservative about uses.Benjamin Kramer2012-01-082-37/+35
| | | | | | | We still save an instruction when just the "and" part is replaced. Also change the code to match comments more closely. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147753 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't forget to transfer implicit uses of return instruction.Evan Cheng2012-01-081-2/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147752 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid eraseing copies from a reserved register unless the definition can beEvan Cheng2012-01-081-0/+26
| | | | | | | safely proven not to have been clobbered. No small test case possible. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147751 91177308-0d34-0410-b5e6-96231b3b80d8
* InstCombine: If we have a bit test and a sign test anded/ored together, ↵Benjamin Kramer2012-01-082-0/+112
| | | | | | | | merge the sign bit into the bit test. This is common in bit field code, e.g. checking if the first or the last bit of a bit field is set. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147749 91177308-0d34-0410-b5e6-96231b3b80d8
* Reverted commit #147601 upon Evan's request.Victor Umansky2012-01-084-628/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147748 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove MCELFStreamer.h.Rafael Espindola2012-01-072-143/+121
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147745 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't print a label before .cfi_startproc when we don't need to. This makesRafael Espindola2012-01-0710-19/+30
| | | | | | the produce assembly when using CFI just a bit more readable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147743 91177308-0d34-0410-b5e6-96231b3b80d8
* Make clever use of alignment and padding to shrink GlobalValue.Benjamin Kramer2012-01-071-4/+3
| | | | | | -8 bytes on x86_64, no change on x86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147742 91177308-0d34-0410-b5e6-96231b3b80d8
* Match SelectionDAG logic for enabling movt.Jakob Stoklund Olesen2012-01-072-2/+7
| | | | | | Darwin doesn't do static, and ELF targets only support static. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147740 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typo in the X86 backend readme. Patch from Jaeden Amero.Craig Topper2012-01-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147739 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove VectorExtras. This unused helper was written for a type of API that ↵Benjamin Kramer2012-01-0711-51/+0
| | | | | | is discouraged now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147738 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unnecessary check of hasAVX(). It's already included in hasXMM().Craig Topper2012-01-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147734 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace some uses of hasNUsesOfValue(0, X) with !hasAnyUseOfValue(X)Craig Topper2012-01-071-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147733 91177308-0d34-0410-b5e6-96231b3b80d8
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