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* need to fix 'make check' tests first. revert for a moment.Jim Grosbach2010-03-252-11/+16
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99569 91177308-0d34-0410-b5e6-96231b3b80d8
* switch the flag for using NEON for SP floating point to a subtarget 'feature'Jim Grosbach2010-03-252-16/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99568 91177308-0d34-0410-b5e6-96231b3b80d8
* rename pred_const_iterator to const_pred_iterator for consistency's sakeGabor Greif2010-03-257-22/+22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99567 91177308-0d34-0410-b5e6-96231b3b80d8
* Removed instruction class NI from ARMInstrFormats.td.Johnny Chen2010-03-251-6/+0
| | | | | | It doesn't seem to be used anywhere. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99566 91177308-0d34-0410-b5e6-96231b3b80d8
* switch the use-vml[as] instructions flag to a subtarget 'feature'Jim Grosbach2010-03-253-16/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99565 91177308-0d34-0410-b5e6-96231b3b80d8
* rename use_const_iterator to const_use_iterator for consistency's sakeGabor Greif2010-03-2516-22/+22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99564 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc: Add a -mc-relax-all option, which relaxes every fixup. We always needDaniel Dunbar2010-03-255-10/+36
| | | | | | | exactly two passes in that case, and don't ever need to recompute any layout, so this is a nice baseline for relaxation performance. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99563 91177308-0d34-0410-b5e6-96231b3b80d8
* Add NVDupLnFrm and change NVDupLane class to use that format.Johnny Chen2010-03-251-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99557 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM cortex-a8 doesn't do vmla/vmls well. disable them by default for that cpuJim Grosbach2010-03-251-0/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99549 91177308-0d34-0410-b5e6-96231b3b80d8
* Add NVCVTFrm (NEON Convert with fractional bits immediate) and modify N2VImm toJohnny Chen2010-03-252-19/+20
| | | | | | expect a Format arg. N2VCvtD/N2VCvtQ are modified to use the NVCVTFrm format. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99548 91177308-0d34-0410-b5e6-96231b3b80d8
* Add nounwind.Evan Cheng2010-03-251-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99546 91177308-0d34-0410-b5e6-96231b3b80d8
* Code clean up.Evan Cheng2010-03-251-11/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99544 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Stop restarting layout on every relaxation.Daniel Dunbar2010-03-253-6/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Still O(N^2), just a faster form, and now its the MCAsmLayout's fault. On the .s I am tuning against (combine.s from 403.gcc): -- ddunbar@lordcrumb:MC$ diff stats-before.txt stats-after.txt 5,10c5,10 < 1728 assembler - Number of assembler layout and relaxation steps < 7707 assembler - Number of emitted assembler fragments < 120588 assembler - Number of emitted object file bytes < 2233448 assembler - Number of evaluated fixups < 1727 assembler - Number of relaxed instructions < 6723845 mcexpr - Number of MCExpr evaluations --- > 3 assembler - Number of assembler layout and relaxation steps > 7707 assembler - Number of emitted assembler fragments > 120588 assembler - Number of emitted object file bytes > 14796 assembler - Number of evaluated fixups > 1727 assembler - Number of relaxed instructions > 67889 mcexpr - Number of MCExpr evaluations -- Feel free to LOL at the -before numbers, if you like. I am a little surprised we make more than 2 relaxation passes. It's pretty trivial for us to do relaxation out-of-order if that would give a speedup. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99543 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix -Asserts warning, again.Daniel Dunbar2010-03-251-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99542 91177308-0d34-0410-b5e6-96231b3b80d8
* Tag SSE2 integer instructions as SSEPackedInt.Jakob Stoklund Olesen2010-03-251-2/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99540 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach TableGen to understand X.Y notation in the TSFlagsFields strings.Jakob Stoklund Olesen2010-03-256-11/+21
| | | | | | | Remove much horribleness from X86InstrFormats as a result. Similar simplifications are probably possible for other targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99539 91177308-0d34-0410-b5e6-96231b3b80d8
* fix a valgrind error on copy-constructor-synthesis.cpp, which is caused whenChris Lattner2010-03-251-2/+3
| | | | | | | | | the custom insertion hook deletes the instruction, then we try to set dead flags on it. Neither the code that I added nor the code that was there before was safe. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99538 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove an unused option.Evan Cheng2010-03-251-59/+29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99537 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Simplify main section layout process by moving alignment into LayoutSection.Daniel Dunbar2010-03-252-32/+36
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99529 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Sink Section address assignment into LayoutSection.Daniel Dunbar2010-03-252-10/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99528 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a late SSEDomainFix pass that twiddles SSE instructions to avoid domain ↵Jakob Stoklund Olesen2010-03-259-21/+223
| | | | | | | | | | | | | | | | | | | | | | crossings. On Nehalem and newer CPUs there is a 2 cycle latency penalty on using a register in a different domain than where it was defined. Some instructions have equvivalents for different domains, like por/orps/orpd. The SSEDomainFix pass tries to minimize the number of domain crossings by changing between equvivalent opcodes where possible. This is a work in progress, in particular the pass doesn't do anything yet. SSE instructions are tagged with their execution domain in TableGen using the last two bits of TSFlags. Note that not all instructions are tagged correctly. Life just isn't that simple. The SSE execution domain issue is very similar to the ARM NEON/VFP pipeline issue handled by NEONMoveFixPass. This pass may become target independent to handle both. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99524 91177308-0d34-0410-b5e6-96231b3b80d8
* Added a new instruction class NVDupLane to be inherited by VDUPLND and VDUPLNQ,Johnny Chen2010-03-252-20/+31
| | | | | | | instead of the current N2V. Format of NVDupLane instances are set to NEONFrm currently. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99518 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply Kevin's change 94440, now that Chris has fixed the limitation onBob Wilson2010-03-256-1/+152
| | | | | | | opcode values fitting in one byte (svn r99494). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99514 91177308-0d34-0410-b5e6-96231b3b80d8
* Sketch a few Clang release notes.Daniel Dunbar2010-03-251-2/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99512 91177308-0d34-0410-b5e6-96231b3b80d8
* Add comment.Devang Patel2010-03-251-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99507 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed spurious warning problem noticed by Daniel Dunbar. The configure scriptJohn Criswell2010-03-252-1/+11
| | | | | | | | now configures prerequisite projects individually but also ignores them in the big project switch statement to avoid the incorrect warning. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99506 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/Mach-O: Switch to MCSectionData::getOrdinal.Daniel Dunbar2010-03-251-18/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99504 91177308-0d34-0410-b5e6-96231b3b80d8
* Scheduler assumes SDDbgValue nodes are in source order. That's true ↵Evan Cheng2010-03-251-0/+8
| | | | | | currently. But add an assertion to verify it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99501 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Explicity track section and fragment ordinals.Daniel Dunbar2010-03-252-0/+28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99500 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix -Asserts warning.Daniel Dunbar2010-03-251-2/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99499 91177308-0d34-0410-b5e6-96231b3b80d8
* lit: Add LitTestCase and lit.load_test_suite, for adapting lit based suites forDaniel Dunbar2010-03-253-2/+75
| | | | | | use with Python's unittest. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99498 91177308-0d34-0410-b5e6-96231b3b80d8
* Change tblgen to emit FOOISD opcode names as twoChris Lattner2010-03-252-13/+20
| | | | | | | | | | | | | | | bytes instead of one byte. This is important because we're running up to too many opcodes to fit in a byte and it is aggrevated by FIRST_TARGET_MEMORY_OPCODE making the numbering sparse. This just bites the bullet and bloats out the table. In practice, this increases the size of the x86 isel table from 74.5K to 76K. I think we'll cope :) This fixes rdar://7791648 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99494 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix typo.Devang Patel2010-03-251-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99493 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix evil TableGen bug in template parameters with defaults.Jakob Stoklund Olesen2010-03-253-11/+61
| | | | | | | | | | If a TableGen class has an initializer expression containing an X.Y subexpression, AND X depends on template parameters, AND those template parameters have defaults, AND some parameters with defaults are beyond position 1, THEN parts of the initializer expression are evaluated prematurely with the default values when the first explicit template parameter is substituted, before the remaining explicit template parameters have been substituted. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99492 91177308-0d34-0410-b5e6-96231b3b80d8
* Include isFunctionLocal while calculating folding node set profile for a MDNode.Devang Patel2010-03-251-13/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99490 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove a fixme that doesn't make sense any more.Evan Cheng2010-03-251-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99489 91177308-0d34-0410-b5e6-96231b3b80d8
* fix PR6642, GVN forwarding from memset to load of the base of the memset.Chris Lattner2010-03-252-7/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99488 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure SDDbgValue.Invalid is initialized to false by all the constructors.Evan Cheng2010-03-251-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99487 91177308-0d34-0410-b5e6-96231b3b80d8
* eliminate a bunch more parallels now that schedulingChris Lattner2010-03-251-205/+150
| | | | | | | | handles dead implicit results more aggressively. More to come, I think this is now just a data entry problem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99486 91177308-0d34-0410-b5e6-96231b3b80d8
* Make the NDEBUG assertion stronger and more clear what is Chris Lattner2010-03-257-11/+25
| | | | | | | | | | | | | | | | | | | | | | happening. Enhance scheduling to set the DEAD flag on implicit defs more aggressively. Before, we'd set an implicit def operand to dead if it were present in the SDNode corresponding to the machineinstr but had no use. Now we do it in this case AND if the implicit def does not exist in the SDNode at all. This exposes a couple of problems: one is the FIXME, which causes a live intervals crash on CodeGen/X86/sibcall.ll. The second is that it makes machinecse and licm more aggressive (which is a good thing) but also exposes a case where licm hoists a set0 and then it doesn't get resunk. Talking to codegen folks about both these issues, but I need this patch in in the meantime. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99485 91177308-0d34-0410-b5e6-96231b3b80d8
* Include isFunctionLocal while calculating folding node set provide for a MDNode.Devang Patel2010-03-251-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99484 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r99451 with a fix to move the NoInline check to the cost functionsEric Christopher2010-03-255-4/+53
| | | | | | | instead of InlineFunction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99483 91177308-0d34-0410-b5e6-96231b3b80d8
* reapply 99444/99445, which I speculatively reverted inChris Lattner2010-03-252-78/+95
| | | | | | | r99453. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99482 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Route access to SectionData offset and file size through MCAsmLayout.Daniel Dunbar2010-03-254-42/+86
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99474 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Route access to Fragment offset and effective size through MCAsmLayout.Daniel Dunbar2010-03-254-56/+69
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99473 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure this runs in 64-bit only, 32-bit won't produce the correct stores.Eric Christopher2010-03-251-1/+1
| | | | | | | Fariborz please review and make sure this is what you meant. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99472 91177308-0d34-0410-b5e6-96231b3b80d8
* Change how dbg_value sdnodes are converted into machine instructions. Their ↵Evan Cheng2010-03-258-145/+225
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | placement should be determined by the relative order of incoming llvm instructions. The scheduler will now use the SDNode ordering information to determine where to insert them. A dbg_value instruction is inserted after the instruction with the last highest source order and before the instruction with the next highest source order. It will optimize the placement by inserting right after the instruction that produces the value if they have consecutive order numbers. Here is a theoretical example that illustrates why the placement is important. tmp1 = store tmp1 -> x ... tmp2 = add ... ... call ... store tmp2 -> x Now mem2reg comes along: tmp1 = dbg_value (tmp1 -> x) ... tmp2 = add ... ... call ... dbg_value (tmp2 -> x) When the debugger examine the value of x after the add instruction but before the call, it should have the value of tmp1. Furthermore, for dbg_value's that reference constants, they should not be emitted at the beginning of the block (since they do not have "producers"). This patch also cleans up how SDISel manages DbgValue nodes. It allow a SDNode to be referenced by multiple SDDbgValue nodes. When a SDNode is deleted, it uses the information to find the SDDbgValues and invalidate them. They are not deleted until the corresponding SelectionDAG is destroyed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99469 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Eliminate MC{Fragment,{Section,Symbol}Data}::getAddress.Daniel Dunbar2010-03-252-22/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99467 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Fix refacto in MCExpr evaluation, I mistakenly replaced a fragment ↵Daniel Dunbar2010-03-252-26/+168
| | | | | | | | address with a symbol address. - This fixes the integrated-as nightly test regressions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99466 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid being influenced by dbg_value instructions.Evan Cheng2010-03-252-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99465 91177308-0d34-0410-b5e6-96231b3b80d8
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