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* Change the PassManager from a reference to a pointer.Bill Wendling2012-05-0113-71/+69
| | | | | | | | | | The TargetPassManager's default constructor wants to initialize the PassManager to 'null'. But it's illegal to bind a null reference to a null l-value. Make the ivar a pointer instead. PR12468 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155902 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow BMI, AES, F16C, POPCNT, FMA3, and CLMUL to be detected on AMD processors.Craig Topper2012-05-011-9/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155899 91177308-0d34-0410-b5e6-96231b3b80d8
* RuntimeDyld code cleanup:Eli Bendersky2012-05-016-30/+38
| | | | | | | | | | | - There's no point having a different type for the local and global symbol tables. - Renamed SymbolTable to GlobalSymbolTable to clarify the intention - Improved const correctness where relevant git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155898 91177308-0d34-0410-b5e6-96231b3b80d8
* Make XOP and FMA4 require SSE4A to match GCC behavior. Use this to simplify ↵Craig Topper2012-05-011-9/+8
| | | | | | Bulldozer feature list. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155897 91177308-0d34-0410-b5e6-96231b3b80d8
* Attempt to handle MRMInitReg in emitVEXOpcodePrefix. Hopefully fixes PR12711.Craig Topper2012-05-011-1/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155896 91177308-0d34-0410-b5e6-96231b3b80d8
* Removed examples of stack frame inspection which no longer work for old JIT.Eli Bendersky2012-05-011-101/+132
| | | | | | | | Added an example of MCJIT-based debugging. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155895 91177308-0d34-0410-b5e6-96231b3b80d8
* Make XOP imply AVX as its needed to legalize the registers types.Craig Topper2012-05-011-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155891 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove HasSSE2 from AES and CLMUL predicates. It's now implied by the HasAES ↵Craig Topper2012-05-011-3/+3
| | | | | | and HasCLMUL predicates. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155890 91177308-0d34-0410-b5e6-96231b3b80d8
* Make CLMUL and AES imply SSE2 since its needed to legalize the type.Craig Topper2012-05-011-2/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155888 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable AVX and FMA4 for AMD Bulldozer processors.Craig Topper2012-05-011-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155885 91177308-0d34-0410-b5e6-96231b3b80d8
* An instruction in a loop is not guaranteed to be executed just because the loopNick Lewycky2012-05-012-0/+27
| | | | | | | has no exit blocks. Fixes PR12706! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155884 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for llvm.arm.neon.vmull* intrinsics to InstCombine. FixesLang Hames2012-05-012-0/+119
| | | | | | | | | | <rdar://problem/11291436>. This is a second attempt at a fix for this, the first was r155468. Thanks to Chandler, Bob and others for the feedback that helped me improve this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155866 91177308-0d34-0410-b5e6-96231b3b80d8
* Add some constantness. No functionality change.Jakub Staszak2012-04-301-9/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155859 91177308-0d34-0410-b5e6-96231b3b80d8
* X86: optimization for -(x != 0)Manman Ren2012-04-302-0/+37
| | | | | | | | | | | | | | This patch will optimize -(x != 0) on X86 FROM cmpl $0x01,%edi sbbl %eax,%eax notl %eax TO negl %edi sbbl %eax %eax git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155853 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Diagnostics for out of range fixups.Jim Grosbach2012-04-301-34/+52
| | | | | | | | | | | Replace some assert() calls w/ actual diagnostics. In a perfect world, there'd be range checks on these values long before things ever reached this code. For now, though, issuing a better-late-than-never diagnostic is still a big improvement over assert(). rdar://11347287 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155851 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix address calculation error from r155744.Jakob Stoklund Olesen2012-04-301-1/+6
| | | | | | | | | | | | This was exposed by SingleSource/UnitTests/Vector/constpool.c. The computed size of a basic block isn't always a multiple of its known alignment, and that can introduce extra alignment padding after the block. <rdar://problem/11347135> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155845 91177308-0d34-0410-b5e6-96231b3b80d8
* fix typoSebastian Pop2012-04-302-4/+4
| | | | | | | | | | | Thanks to "Gabor Greif" <ggreif@gmail.com> for reporting this problem. The configure flag should be --with-default-sysroot as documented, and not --with-sysroot. The reason we don't want to define --with-sysroot is that GCC has a configure flag by that name and it has a different semantics. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155844 91177308-0d34-0410-b5e6-96231b3b80d8
* test/CodeGen/X86/select.ll: remove spacesManman Ren2012-04-301-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155840 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up. No functional change intended.Chad Rosier2012-04-301-8/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155832 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix fastcc structure return with fast-isel on x86-32Derek Schuff2012-04-302-0/+16
| | | | | | | | | | | | | | | | On x86-32, structure return via sret lets the callee pop the hidden pointer argument off the stack, which the caller then re-pushes. However if the calling convention is fastcc, then a register is used instead, and the caller should not adjust the stack. This is implemented with a check of IsTailCallConvention X86TargetLowering::LowerCall but is now checked properly in X86FastISel::DoSelectCall. (this time, actually commit what was reviewed!) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155825 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't introduce illegal types when creating vmull operations. <rdar://11324364>Bob Wilson2012-04-302-1/+77
| | | | | | | | ARM BUILD_VECTORs created after type legalization cannot use i8 or i16 operands, since those types are not legal. Instead use i32 operands, which will be implicitly truncated by the BUILD_VECTOR to match the element type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155824 91177308-0d34-0410-b5e6-96231b3b80d8
* It doesn't make sense to move symbol relocations to section relocations whenEli Bendersky2012-04-302-26/+27
| | | | | | | | | | | relocations are resolved. It's much more reasonable to do this decision when relocations are just being added - we have all the information at that point. Also a bit of renaming and extra comments to clarify extensions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155819 91177308-0d34-0410-b5e6-96231b3b80d8
* Just mark the sign bit as known zero, rather than any other irrelevant bitsDuncan Sands2012-04-302-1/+13
| | | | | | | known zero in the LHS. Fixes PR12541. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155818 91177308-0d34-0410-b5e6-96231b3b80d8
* Second attempt at PR12573:Bill Wendling2012-04-304-14/+131
| | | | | | | | | | | | Allow the "SplitCriticalEdge" function to split the edge to a landing pad. If the pass is *sure* that it thinks it knows what it's doing, then it may go ahead and specify that the landing pad can have its critical edge split. The loop unswitch pass is one of these passes. It will split the critical edges of all edges coming from a loop to a landing pad not within the loop. Doing so will retain important loop analysis information, such as loop simplify. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155817 91177308-0d34-0410-b5e6-96231b3b80d8
* Use an ArrayRef instead of explicit vector type.Bill Wendling2012-04-301-8/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155816 91177308-0d34-0410-b5e6-96231b3b80d8
* Code cleanup in RuntimeDyld:Eli Bendersky2012-04-304-72/+95
| | | | | | | | | | | - Add comments - Change field names to be more reasonable - Fix indentation and naming to conform to coding conventions - Remove unnecessary includes / replace them by forward declatations git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155815 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove hack from r154987. The problem persists even with it, so it's not ↵Bill Wendling2012-04-301-11/+1
| | | | | | even a good hack. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155813 91177308-0d34-0410-b5e6-96231b3b80d8
* No need to normalize index before calling Extract128BitVectorCraig Topper2012-04-301-12/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155811 91177308-0d34-0410-b5e6-96231b3b80d8
* Copied all the VEX prefix encoding code from X86MCCodeEmitter to the x86 JIT ↵Pete Cooper2012-04-302-97/+534
| | | | | | emitter. Needs some major refactoring as these two code emitters are almost identical git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155810 91177308-0d34-0410-b5e6-96231b3b80d8
* Make sure HoistInsertPosition finds a position that is dominated by allRafael Espindola2012-04-302-1/+35
| | | | | | inputs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155809 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unneeded casts. No functionality change.Jakub Staszak2012-04-291-11/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155800 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove superfluous 'inline'Craig Topper2012-04-291-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155799 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify code a bit. No functional change intended.Craig Topper2012-04-291-4/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155798 91177308-0d34-0410-b5e6-96231b3b80d8
* Update the documentation of CellSPU, in case it gets removed in 3.1.Kalle Raiskila2012-04-292-0/+18
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155797 91177308-0d34-0410-b5e6-96231b3b80d8
* RegisterPressure: ArrayRefize some functions for better readability. No ↵Benjamin Kramer2012-04-292-38/+40
| | | | | | functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155795 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix some formatting, grammar and style issues and add a couple of missing ↵Eli Bendersky2012-04-296-32/+37
| | | | | | comments. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155793 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove redundant line (the memory manager is set above to the same objectEli Bendersky2012-04-291-1/+0
| | | | | | | | | if !ForceInterpreteri). It has no effect (apart from a memory leak...) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155792 91177308-0d34-0410-b5e6-96231b3b80d8
* SmallVector: Don't rely on having an assignment operator around in push_back ↵Benjamin Kramer2012-04-292-1/+14
| | | | | | for POD-like types. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155791 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix comments from copy-paste to a more relevant meaningEli Bendersky2012-04-293-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155790 91177308-0d34-0410-b5e6-96231b3b80d8
* Add constants for first and last integer vector types to be consistent with ↵Craig Topper2012-04-291-1/+4
| | | | | | floating point. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155787 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove tab charactersCraig Topper2012-04-291-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155786 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark the default cases of MVT::getVectorElementType and ↵Craig Topper2012-04-291-2/+2
| | | | | | MVT:getVectorNumElements as unreachable to reduce code size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155785 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't update spill weights when joining intervals.Jakob Stoklund Olesen2012-04-282-29/+0
| | | | | | We don't compute spill weights until after coalescing anyway. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155766 91177308-0d34-0410-b5e6-96231b3b80d8
* Spring cleaning - Delete dead code.Jakob Stoklund Olesen2012-04-282-36/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155765 91177308-0d34-0410-b5e6-96231b3b80d8
* If the __is_trivially_copyable type trait is available use it as the ↵Benjamin Kramer2012-04-281-0/+15
| | | | | | | | | baseline for isPodLike. This way we can enable the POD-like class optimization for a lot more classes, saving ~120k of code in clang/i386/Release+Asserts when selfhosting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155761 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the most basic superclass of SmallVector in ArrayRef.Benjamin Kramer2012-04-281-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155760 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a problem with blocks that need to be split twice.Jakob Stoklund Olesen2012-04-281-3/+5
| | | | | | | | | The code could search past the end of the basic block when there was already a constant pool entry after the block. Test case with giant basic block in SingleSource/UnitTests/Vector/constpool.c git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155753 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply 155668: Fix the SD scheduler to avoid gluing the same node twice.Andrew Trick2012-04-282-26/+104
| | | | | | | | | | This time, also fix the caller of AddGlue to properly handle incomplete chains. AddGlue had failure modes, but shamefully hid them from its caller. It's luck ran out. Fixes rdar://11314175: BuildSchedUnits assert. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155749 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Thumb add(sp plus register) asm constraints.Jim Grosbach2012-04-274-2/+29
| | | | | | | | | | Make sure when parsing the Thumb1 sp+register ADD instruction that the source and destination operands match. In thumb2, just use the wide encoding if they don't. In Thumb1, issue a diagnostic. rdar://11219154 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155748 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Tweak tADDrSP definition for consistent operand order.Jim Grosbach2012-04-272-3/+3
| | | | | | Make the operand order of the instruction match that of the asm syntax. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155747 91177308-0d34-0410-b5e6-96231b3b80d8
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