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* Implement trivial DSE. If two stores are neighbors and store to the sameChris Lattner2005-10-101-0/+29
| | | | | | | | location, replace them with a new store of the last value. This occurs in the same neighborhood in 197.parser, speeding it up about 1.5% git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23691 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for CombineTo, allowing the dag combiner to replace nodes withChris Lattner2005-10-101-2/+56
| | | | | | | | | | | | | | | | | | | | | multiple results. Use this support to implement trivial store->load forwarding, implementing CodeGen/PowerPC/store-load-fwd.ll. Though this is the most simple case and can be extended in the future, it is still useful. For example, it speeds up 197.parser by 6.2% by avoiding an LSU reject in xalloc: stw r6, lo16(l5_end_of_array)(r2) addi r2, r5, -4 stwx r5, r4, r2 - lwzx r5, r4, r2 - rlwinm r5, r5, 0, 0, 30 stwx r5, r4, r2 lwz r2, -4(r4) ori r2, r2, 1 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23690 91177308-0d34-0410-b5e6-96231b3b80d8
* new testcaseChris Lattner2005-10-101-0/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23689 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach the DAGCombiner several new tricks, teaching it how to turnNate Begeman2005-10-101-32/+46
| | | | | | | | sext_inreg into zext_inreg based on the signbit (fires a lot), srem into urem, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23688 91177308-0d34-0410-b5e6-96231b3b80d8
* A testcase sitting in my treeChris Lattner2005-10-101-0/+11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23687 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix commentChris Lattner2005-10-101-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23686 91177308-0d34-0410-b5e6-96231b3b80d8
* Add ISD::ADD to MaskedValueIsZeroChris Lattner2005-10-101-0/+8
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* This function is now deadChris Lattner2005-10-101-110/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23684 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable Nate's excellent DAG combiner work by default. This allows theChris Lattner2005-10-102-558/+18
| | | | | | | removal of a bunch of ad-hoc and crufty code from SelectionDAG.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23682 91177308-0d34-0410-b5e6-96231b3b80d8
* These definitions have been moved to common code.Chris Lattner2005-10-101-199/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23681 91177308-0d34-0410-b5e6-96231b3b80d8
* Pull DAG ISel generation nodes out of the PowerPC backend to where theyChris Lattner2005-10-102-89/+216
| | | | | | | | can be used by other targets. For those targets that want to use it, have at. :) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23680 91177308-0d34-0410-b5e6-96231b3b80d8
* add a todo for something I noticedChris Lattner2005-10-091-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23679 91177308-0d34-0410-b5e6-96231b3b80d8
* (X & Y) & C == 0 if either X&C or Y&C are zeroChris Lattner2005-10-092-3/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23678 91177308-0d34-0410-b5e6-96231b3b80d8
* Make MaskedValueIsZero a bit more aggressiveChris Lattner2005-10-091-3/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23677 91177308-0d34-0410-b5e6-96231b3b80d8
* This seems useful from the original patch that added the function. If there ↵Andrew Lenharth2005-10-092-0/+21
| | | | | | is a reason it is not useful on a RISC type target, let me know and I will pull it out git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23676 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix funky xcode indentationChris Lattner2005-10-091-50/+50
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* Hrm, you didn't see this.Chris Lattner2005-10-091-3/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23673 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a source of non-determinism in the backend: the order of processingChris Lattner2005-10-091-6/+25
| | | | | | | | IV strides dependend on the pointer order of the strides in memory. Non-determinism is bad. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23672 91177308-0d34-0410-b5e6-96231b3b80d8
* When emiting a CopyFromReg and the source is already a vreg, do not botherChris Lattner2005-10-091-27/+31
| | | | | | | | | | | | creating a new vreg and inserting a copy: just use the input vreg directly. This speeds up the compile (e.g. about 5% on mesa with a debug build of llc) by not adding a bunch of copies and vregs to be coallesced away. On mesa, for example, this reduces the number of intervals from 168601 to 129040 going into the coallescer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23671 91177308-0d34-0410-b5e6-96231b3b80d8
* Disable formation of rlwinm instructions from SRA bases. This fixesChris Lattner2005-10-091-2/+2
| | | | | | | | | | the 177.mesa failure from last night, and fixes the CodeGen/PowerPC/2005-10-08-ArithmeticRotate.ll regression test I added. If this code cannot be fixed, it should be removed for good, but I'll leave it to Nate to decide its fate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23670 91177308-0d34-0410-b5e6-96231b3b80d8
* Testcase that is miscompiled by the ppc backendChris Lattner2005-10-091-0/+9
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* Remove another unused file. Preparing for the great "enable i64 on ppc32"Nate Begeman2005-10-081-35/+0
| | | | | | | merge, and using subtarget info for ptr size. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23668 91177308-0d34-0410-b5e6-96231b3b80d8
* remove a comma to compile with pedantic gccChris Lattner2005-10-081-1/+1
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* Remove a file that is no longer usedNate Begeman2005-10-081-46/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23666 91177308-0d34-0410-b5e6-96231b3b80d8
* Lo and behold, the last bits of SelectionDAG.cpp have been moved over.Nate Begeman2005-10-081-6/+150
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* When preselecting, favor things that have low depth to select first. ThisChris Lattner2005-10-071-5/+8
| | | | | | | | | is faster and uses less stack space. This reduces our stack requirement enough to compile sixtrack, and though it's a hack, should be enough until we switch to iterative isel git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23664 91177308-0d34-0410-b5e6-96231b3b80d8
* remove debugging codeChris Lattner2005-10-071-5/+1
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* implement CodeGen/PowerPC/div-2.ll:test2-4 by propagating zero bits throughChris Lattner2005-10-072-1/+41
| | | | | | | C-X's git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23662 91177308-0d34-0410-b5e6-96231b3b80d8
* These don't need to be sdivs.Chris Lattner2005-10-071-1/+22
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* fix indentationChris Lattner2005-10-071-57/+57
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* Turn sdivs into udivs when we can prove the sign bits are clear. ThisChris Lattner2005-10-072-0/+21
| | | | | | | implements CodeGen/PowerPC/div-2.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23659 91177308-0d34-0410-b5e6-96231b3b80d8
* New testcase, should turn into a ushrChris Lattner2005-10-071-0/+8
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* Remove prolific source of VC++ truncation warnings.Jeff Cohen2005-10-071-1/+2
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* Remove useless variable.Jeff Cohen2005-10-071-1/+1
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* add a hack to work around broken VC++ scoping rules. Thx to JeffC for pointingChris Lattner2005-10-071-13/+13
| | | | | | | this out to me git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23655 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a CQ regression from my patch to split F32/F64 into seperate registerChris Lattner2005-10-071-1/+2
| | | | | | | | classes on PPC. We were emitting fmr instructions to do fp extensions, which weren't getting coallesced. This fixes Regression/CodeGen/PowerPC/fpcopy.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23654 91177308-0d34-0410-b5e6-96231b3b80d8
* double to float casts should nto result in an fmrChris Lattner2005-10-071-0/+7
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* Fix CodeGen/Generic/bool-to-double.llChris Lattner2005-10-071-0/+3
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* test broken in the IA64 backend.Chris Lattner2005-10-071-0/+5
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* Pull out Call, reducing stack frame size from 6032 bytes to 5184 bytes.Chris Lattner2005-10-061-106/+111
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* Pull out setcc, this reduces stack frame size from 7520 to 6032 bytesChris Lattner2005-10-061-115/+117
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23649 91177308-0d34-0410-b5e6-96231b3b80d8
* Pull two more methods out, reducing stack frame size from 8224 -> 7520 bytesChris Lattner2005-10-061-58/+65
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* Add a recursive-iterative hybrid stage to attempt to reduce stack space, thisChris Lattner2005-10-061-45/+94
| | | | | | | | | | | | helps but not enough. Start pulling cases out of PPC32DAGToDAGISel::Select. With GCC 4, this function required 8512 bytes of stack space for each invocation (GCC 3 required less than 700 bytes). Pulling this first function out gets us down to 8224. More to come :( git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23647 91177308-0d34-0410-b5e6-96231b3b80d8
* silence a bogus GCC warningChris Lattner2005-10-061-1/+1
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* Fix the LLC regressions on X86 last night. In particular, when undoingChris Lattner2005-10-061-5/+12
| | | | | | | | | | previous copy elisions and we discover we need to reload a register, make sure to use the regclass of the original register for the reload, not the class of the current register. This avoid using 16-bit loads to reload 32-bit values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23645 91177308-0d34-0410-b5e6-96231b3b80d8
* This is suppose to work nowAndrew Lenharth2005-10-062-1/+2
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* remove VAX compatibility instruction, we will never use thisAndrew Lenharth2005-10-061-2/+0
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* Make the legalizer completely non-recursiveChris Lattner2005-10-061-28/+63
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* Let the combiner handle more casesNate Begeman2005-10-051-1/+4
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* Remove some bad code from LegalizeNate Begeman2005-10-051-4/+1
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