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* Add all 4 MachO object types. Use the stored type to implement is64Bits().Rafael Espindola2013-04-083-8/+24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179021 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Control Flow support for pre EG genVincent Lejeune2013-04-083-72/+240
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179020 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify the quoting here. Our lit emulator doesn't deal well with theChandler Carruth2013-04-081-1/+1
| | | | | | nested quoting schemes, and they're not important here... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179014 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove a global 'endl' variable from the other file as well.Chandler Carruth2013-04-081-25/+22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179010 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up namespaces in obj2yaml.cpp.Chandler Carruth2013-04-081-11/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179009 91177308-0d34-0410-b5e6-96231b3b80d8
* Add ACLE link to ARM documentation sectionsTim Northover2013-04-081-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179006 91177308-0d34-0410-b5e6-96231b3b80d8
* AArch64: remove barriers from AArch64 atomic operations.Tim Northover2013-04-085-325/+400
| | | | | | | | I've managed to convince myself that AArch64's acquire/release instructions are sufficient to guarantee C++11's required semantics, even in the sequentially-consistent case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179005 91177308-0d34-0410-b5e6-96231b3b80d8
* Cleanup the formatting of obj2yaml.cpp.Chandler Carruth2013-04-081-22/+23
| | | | | | | | I couldn't touch this file and not clean it up some. These reformattings brought to you by clang-format, with some minor adjustments by me. More spring cleaning to follow here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179004 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't define our own global 'endl' variable. While technically it hadChandler Carruth2013-04-081-5/+3
| | | | | | | | | | | | | | | | | | internal linkage and so wasn't a patent bug, it doesn't make any sense here. We can avoid even calling operator<< by just embedding the newline in the string literals that were already being streamed out. It also gives the impression of some line-ending agnosticisms which is not present, and that flushing happens when it doesn't. If we want to use std::endl, we could do that, but honestly it doesn't seem remotely worth it. Using '\n' directly is much more clear when working with raw_ostream. It also happens to fix builds with old crufty GCC STL implementations that include std::endl into the global namespace (or headers written to be compatible with such atrocities). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179003 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM: Remove unused variable.Benjamin Kramer2013-04-081-2/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179001 91177308-0d34-0410-b5e6-96231b3b80d8
* Cleanup and improve PPC fsel generationHal Finkel2013-04-072-7/+170
| | | | | | | | | | | | | First, we should not cheat: fsel-based lowering of select_cc is a finite-math-only optimization (the ISA manual, section F.3 of v2.06, makes this clear, as does a note in our own README). This also adds fsel-based lowering of EQ and NE condition codes. As it turned out, fsel generation was covered by a grand total of zero regression test cases. I've added some test cases to cover the existing behavior (which is now finite-math only), as well as the new EQ cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179000 91177308-0d34-0410-b5e6-96231b3b80d8
* TargetLowering: Fix getTypeConversion handling of extended vector typesArnold Schwaighofer2013-04-074-14/+17
| | | | | | | | | | | | | | | The code in getTypeConversion attempts to promote the element vector type before it trys to split or widen the vector. After it failed finding a legal vector type by promoting it would continue using the promoted vector element type. Thereby missing legal splitted vector types. For example the type v32i32 that has a legal split of 4 x v3i32 on x86/sse2 would be transformed to: v32i256 and from there on successively split to: v16i256, v8i256, v1i256 and then finally ends up as an i64 type. By resetting the vector element type to the original vector element type that existed before the promotion the code will attempt to split the vector type to smaller vector widths of the same type. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178999 91177308-0d34-0410-b5e6-96231b3b80d8
* Make MachOObjectFile independent from MachOObject.Rafael Espindola2013-04-072-17/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178998 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement MachOObjectFile::getData directly.Rafael Espindola2013-04-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178997 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement MachOObjectFile::is64Bit directly.Rafael Espindola2013-04-071-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178996 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement MachOObjectFile::getHeaderSize directly.Rafael Espindola2013-04-071-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178995 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement MachOObjectFile::getHeader directly.Rafael Espindola2013-04-073-19/+30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178994 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement LowerCall_64 for the SPARC v9 64-bit ABI.Jakob Stoklund Olesen2013-04-073-3/+375
| | | | | | | There is still no support for byval arguments (which I don't think are needed) and varargs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178993 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement MachOObjectFile::getHeaderSize and MachOObjectFile::getData.Rafael Espindola2013-04-072-41/+46
| | | | | | | These were the last missing forwarding functions. Also consistently use the forwarding functions instead of using MachOObj directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178992 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove LoadCommandInfo now that we always have a pointer to the command.Rafael Espindola2013-04-073-78/+31
| | | | | | | LoadCommandInfo was needed to keep a command and its offset in the file. Now that we always have a pointer to the command, we don't need the offset. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178991 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MachOObjectFile::LoadCommandInfo.Rafael Espindola2013-04-073-13/+39
| | | | | | This avoids using MachOObject::getLoadCommandInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178990 91177308-0d34-0410-b5e6-96231b3b80d8
* Use getLoadCommandInfo instead of MachOObj->getLoadCommandInfo.Rafael Espindola2013-04-071-18/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178989 91177308-0d34-0410-b5e6-96231b3b80d8
* Construct MachOObject in MachOObjectFile's constructor.Rafael Espindola2013-04-072-17/+21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178988 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused argument.Rafael Espindola2013-04-075-6/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178987 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove MachOObjectFile::getObject.Rafael Espindola2013-04-073-12/+25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178986 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove two uses of getObject.Rafael Espindola2013-04-073-13/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178985 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove usage of InMemoryStruct in getSymbol.Rafael Espindola2013-04-072-32/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178984 91177308-0d34-0410-b5e6-96231b3b80d8
* PPC Altivec load/store intrinsics can be marked IntrRead[Write]ArgMemHal Finkel2013-04-071-10/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178983 91177308-0d34-0410-b5e6-96231b3b80d8
* PPC rotate instructions don't have unmodeled side effctsHal Finkel2013-04-072-3/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178982 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove a use of InMemoryStruct in llvm-readobj.Rafael Espindola2013-04-072-11/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178981 91177308-0d34-0410-b5e6-96231b3b80d8
* Make getObject const. Remove a const_cast.Rafael Espindola2013-04-073-4/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178980 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove last use of InMemoryStruct in llvm-objdump.Rafael Espindola2013-04-073-2/+20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178979 91177308-0d34-0410-b5e6-96231b3b80d8
* Most PPC M[TF]CR instructions do not have side effectsHal Finkel2013-04-072-5/+19
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178978 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove dead code.Rafael Espindola2013-04-071-17/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178977 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused argument.Rafael Espindola2013-04-071-3/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178976 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix PR15674 (and PR15603): a SROA think-o.Chandler Carruth2013-04-072-0/+64
| | | | | | | | | | | | | | The fix for PR14972 in r177055 introduced a real think-o in the *store* side, likely because I was much more focused on the load side. While we can arbitrarily widen (or narrow) a loaded value, we can't arbitrarily widen a value to be stored, as that changes the width of memory access! Lock down the code path in the store rewriting which would do this to only handle the intended circumstance. All of the existing tests continue to pass, and I've added a test from the PR. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178974 91177308-0d34-0410-b5e6-96231b3b80d8
* PPC pre-increment load instructions do not have side effectsHal Finkel2013-04-071-2/+3
| | | | | | A few were missed in r178972. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178973 91177308-0d34-0410-b5e6-96231b3b80d8
* PPC pre-increment load instructions do not have side effectsHal Finkel2013-04-072-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178972 91177308-0d34-0410-b5e6-96231b3b80d8
* PPC MCRF instruction does not have side effectsHal Finkel2013-04-071-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178971 91177308-0d34-0410-b5e6-96231b3b80d8
* PPC FMR instruction does not have side effectsHal Finkel2013-04-071-0/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178970 91177308-0d34-0410-b5e6-96231b3b80d8
* DW_FORM_sec_offset should be a relocation on platforms that useEric Christopher2013-04-074-7/+35
| | | | | | | | | a relocation across sections. Do this for DW_AT_stmt list in the skeleton CU and check the relocations in the debug_info section. Add a FIXME for multiple CUs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178969 91177308-0d34-0410-b5e6-96231b3b80d8
* [cmake] Avoid rel+asserts warnings when passing -UNDEBUGReid Kleckner2013-04-071-0/+3
| | | | | | | MSVC 2012 gives warning D9025, "overriding /D NDEBUG with -UNDEBUG". Removing the original definition of NDEBUG silences this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178967 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement LowerReturn_64 for SPARC v9.Jakob Stoklund Olesen2013-04-064-9/+200
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Integer return values are sign or zero extended by the callee, and structs up to 32 bytes in size can be returned in registers. The CC_Sparc64 CallingConv definition is shared between LowerFormalArguments_64 and LowerReturn_64. Function arguments and return values are passed in the same registers. The inreg flag is also used for return values. This is required to handle C functions returning structs containing floats and ints: struct ifp { int i; float f; }; struct ifp f(void); LLVM IR: define inreg { i32, float } @f() { ... ret { i32, float } %retval } The ABI requires that %retval.i is returned in the high bits of %i0 while %retval.f goes in %f1. Without the inreg return value attribute, %retval.i would go in %i0 and %retval.f would go in %f3 which is a more efficient way of returning %multiple values, but it is not ABI compliant for returning C structs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178966 91177308-0d34-0410-b5e6-96231b3b80d8
* SPARC v9 stack pointer bias.Jakob Stoklund Olesen2013-04-063-9/+14
| | | | | | | | | | | 64-bit SPARC v9 processes use biased stack and frame pointers, so the current function's stack frame is located at %sp+BIAS .. %fp+BIAS where BIAS = 2047. This makes more local variables directly accessible via [%fp+simm13] addressing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178965 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement PPCInstrInfo::FoldImmediateHal Finkel2013-04-064-0/+87
| | | | | | | | There are certain PPC instructions into which we can fold a zero immediate operand. We can detect such cases by looking at the register class required by the using operand (so long as it is not otherwise constrained). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178961 91177308-0d34-0410-b5e6-96231b3b80d8
* PPC ISEL is a select and never has side effectsHal Finkel2013-04-062-0/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178960 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a comment to TargetInstrInfo about FoldImmediateHal Finkel2013-04-061-0/+4
| | | | | | | This comment documents the current behavior of the ARM implementation of this callback, and also the soon-to-be-committed PPC version. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178959 91177308-0d34-0410-b5e6-96231b3b80d8
* Complete formal arguments for the SPARC v9 64-bit ABI.Jakob Stoklund Olesen2013-04-063-25/+314
| | | | | | | | | | | | | | | | | | | | | | | | All arguments are formally assigned to stack positions and then promoted to floating point and integer registers. Since there are more floating point registers than integer registers, this can cause situations where floating point arguments are assigned to registers after integer arguments that where assigned to the stack. Use the inreg flag to indicate 32-bit fragments of structs containing both float and int members. The three-way shadowing between stack, integer, and floating point registers requires custom argument lowering. The good news is that return values are passed in the exact same way, and we can share the code. Still missing: - Update LowerReturn to handle structs returned in registers. - LowerCall. - Variadic functions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178958 91177308-0d34-0410-b5e6-96231b3b80d8
* typoNadav Rotem2013-04-061-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178949 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove last use of InMemoryStruct from MachOObjectFile.cpp.Rafael Espindola2013-04-062-4/+51
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178948 91177308-0d34-0410-b5e6-96231b3b80d8
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