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* SubRegIndex'ize MSP430Jakob Stoklund Olesen2010-05-241-1/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104513 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a few places that depended on the numeric value of subreg indices.Jakob Stoklund Olesen2010-05-243-8/+19
| | | | | | Add assertions in places that depend on consecutive indices. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104510 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch ARMRegisterInfo.td to use SubRegIndex and eliminate the parallel enumsJakob Stoklund Olesen2010-05-2410-199/+186
| | | | | | from ARMRegisterInfo.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104508 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename X86 subregister indices to something shorter.Jakob Stoklund Olesen2010-05-248-106/+96
| | | | | | Use the tablegen-produced enums. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104493 91177308-0d34-0410-b5e6-96231b3b80d8
* Add the SubRegIndex TableGen class.Jakob Stoklund Olesen2010-05-2411-57/+94
| | | | | | | This is the beginning of purely symbolic subregister indices, but we need a bit of jiggling before the explicit numeric indices can be completely removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104492 91177308-0d34-0410-b5e6-96231b3b80d8
* Encode the Caml frametable by following what the comment says: the number of ↵Nicolas Geoffray2010-05-241-5/+22
| | | | | | | | | | descriptors is first emitted, and StackOffsets are emitted in 16 bits. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104488 91177308-0d34-0410-b5e6-96231b3b80d8
* Apply timeouts and memory limits in more places. In particular, whenDuncan Sands2010-05-243-21/+40
| | | | | | | | | bugpoint does "Running the code generator to test for a crash" this gets you a crash if llc goes into an infinite loop or uses up vast amounts of memory. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104485 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc: Use EmitIntValue where possible, which makes the API calls from the ↵Daniel Dunbar2010-05-231-3/+6
| | | | | | AsmParser and CodeGen line up better. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104467 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm-mc: Use AddBlankLine in asm parser. This makes transliteration match ↵Daniel Dunbar2010-05-231-0/+9
| | | | | | the input much more closely, and also makes the API calls from the AsmParser and CodeGen line up better. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104466 91177308-0d34-0410-b5e6-96231b3b80d8
* MC: Add an MCLoggingStreamer, for use in debugging integrated-as mismatches.Daniel Dunbar2010-05-235-2/+229
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104463 91177308-0d34-0410-b5e6-96231b3b80d8
* VDUP doesn't support vectors with 64-bit elements.Bob Wilson2010-05-231-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104455 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/X86: Subdivide immediates a bit more, so that we properly recognize ↵Daniel Dunbar2010-05-224-38/+195
| | | | | | | | | | | immediates based on the width of the target instruction. For example: addw $0xFFFF, %ax should match the same as addw $-1, %ax but we used to match it to the longer encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104453 91177308-0d34-0410-b5e6-96231b3b80d8
* tblgen/AsmMatcher: Change AsmOperandClass to allow a list of superclasses ↵Daniel Dunbar2010-05-223-15/+19
| | | | | | instead of just one. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104452 91177308-0d34-0410-b5e6-96231b3b80d8
* MC/X86: Add alias for setz, setnz, jz, jnz.Daniel Dunbar2010-05-222-1/+22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104435 91177308-0d34-0410-b5e6-96231b3b80d8
* Trivial change to dump() function for SparseBitVectorJohn Mosby2010-05-221-6/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104433 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement @llvm.returnaddress. rdar://8015977.Evan Cheng2010-05-2222-32/+185
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104421 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit.Jim Grosbach2010-05-228-3/+63
| | | | | | | Followups: docs patch for the builtin and eh.sjlj.setjmp cleanup to match longjmp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104419 91177308-0d34-0410-b5e6-96231b3b80d8
* This test is darwin only. Make it so(tm).Eric Christopher2010-05-221-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104418 91177308-0d34-0410-b5e6-96231b3b80d8
* Recognize more BUILD_VECTORs and VECTOR_SHUFFLEs that can be implemented byBob Wilson2010-05-224-31/+119
| | | | | | | | | copying VFP subregs. This exposed a bunch of dead code in the *spill-q.ll tests, so I tweaked those tests to keep that code from being optimized away. Radar 7872877. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104415 91177308-0d34-0410-b5e6-96231b3b80d8
* Add full bss data support for darwin tls variables.Eric Christopher2010-05-223-3/+53
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104414 91177308-0d34-0410-b5e6-96231b3b80d8
* Collect variable information during endFunction() instead of beginFunction().Devang Patel2010-05-221-12/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104412 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a new section and accessor for TLS data.Eric Christopher2010-05-221-0/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104411 91177308-0d34-0410-b5e6-96231b3b80d8
* Clean up extra whitespace.Bob Wilson2010-05-211-1/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104410 91177308-0d34-0410-b5e6-96231b3b80d8
* Make this LookAheadLimit, not the uninitialized LookAheadLeft.Eric Christopher2010-05-211-1/+1
| | | | | | | Evan please verify! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104408 91177308-0d34-0410-b5e6-96231b3b80d8
* add a noteChris Lattner2010-05-211-0/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104404 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand on comment.Eric Christopher2010-05-211-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104396 91177308-0d34-0410-b5e6-96231b3b80d8
* Added retl for 32-bit x86 and added retq for 64-bit x86.Kevin Enderby2010-05-213-0/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104394 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix comment and whitespace.Eric Christopher2010-05-211-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104392 91177308-0d34-0410-b5e6-96231b3b80d8
* expand on the llvm ir bitcode dox. Patch by Peter Housel!Chris Lattner2010-05-211-7/+339
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104391 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow machine cse to cse instructions which define physical registers. ↵Evan Cheng2010-05-211-27/+81
| | | | | | Controlled by option -machine-cse-phys-defs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104385 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix section attribute name.Eric Christopher2010-05-211-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104381 91177308-0d34-0410-b5e6-96231b3b80d8
* Change CodeGen/ARM/2009-11-02-NegativeLane.ll to use 16-bit vector elementsBob Wilson2010-05-212-7/+14
| | | | | | | | | so that it will continue to test what it was meant to test when I commit a separate change for better support of BUILD_VECTOR and VECTOR_SHUFFLE for Neon. Fix a DAG combiner crash exposed by this test change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104380 91177308-0d34-0410-b5e6-96231b3b80d8
* - Change MachineInstr::findRegisterDefOperandIdx so it can also look for defsEvan Cheng2010-05-218-28/+43
| | | | | | | | | | | that are aliases of the specified register. - Rename modifiesRegister to definesRegister since it's looking a def of the specific register or one of its super-registers. It's not looking for def of a sub-register or alias that could change the specified register. - Added modifiesRegister to look for defs of aliases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104377 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MachineInstr::readsWritesVirtualRegister() to determine if an instructionJakob Stoklund Olesen2010-05-212-12/+26
| | | | | | | | | | reads or writes a register. This takes partial redefines and undef uses into account. Don't actually use it yet. That caused miscompiles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104372 91177308-0d34-0410-b5e6-96231b3b80d8
* SimplifyDevang Patel2010-05-211-44/+23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104338 91177308-0d34-0410-b5e6-96231b3b80d8
* Previous commit message should refer to 104308.Dale Johannesen2010-05-211-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104337 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix two bugs in 104348:Dale Johannesen2010-05-211-3/+9
| | | | | | | | | Case where MMX is disabled wasn't handled right. MMX->MMX bitconverts are Legal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104336 91177308-0d34-0410-b5e6-96231b3b80d8
* added an assertion to MCObjectWriter::WriteBytes to catch misuse of the ↵Nathan Jeffords2010-05-211-0/+2
| | | | | | | | ZeroFillSize parameter If the size of the string is greater than the zero fill size, the function will attempt to write a very large string of zeros to the object file (~4GB on 32 bit platforms). This assertion will catch the scenario and crash the program before the write occurs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104334 91177308-0d34-0410-b5e6-96231b3b80d8
* now that fp reg kill insertion stuff happens as a separateChris Lattner2010-05-212-38/+58
| | | | | | | | | | | | | | | | | | | pass after isel instead of being interlaced with it, we can trust that all the code for a function has been isel'd before it is run. The practical impact of this is that we can scan for machine instr phis instead of doing a fuzzy match on the LLVM BB for phi nodes. Doing the fuzzy match required knowing when isel would produce an fp reg stack phi which was gross. It was also wrong in cases where select got lowered to a branch tree because cmovs aren't available (PR6828). Just do the scan on machine phis which is simpler, faster and more correct. This fixes PR6828. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104333 91177308-0d34-0410-b5e6-96231b3b80d8
* Use less evil form of switch stmt.Chris Lattner2010-05-211-2/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104331 91177308-0d34-0410-b5e6-96231b3b80d8
* use continue to reduce nesting.Chris Lattner2010-05-211-14/+17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104330 91177308-0d34-0410-b5e6-96231b3b80d8
* pull a nested loop of this pass out to its own function,Chris Lattner2010-05-211-42/+55
| | | | | | | eliminating the gymnastics around the ContainsFPCode var. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104328 91177308-0d34-0410-b5e6-96231b3b80d8
* modernize this pass a bit, fit in 80 columns.Chris Lattner2010-05-211-6/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104326 91177308-0d34-0410-b5e6-96231b3b80d8
* constify accessor.Chris Lattner2010-05-212-2/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104325 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "Use MachineInstr::readsWritesVirtualRegister to determine if a ↵Jakob Stoklund Olesen2010-05-213-34/+58
| | | | | | | | register is read." This reverts r104322. I think it was causing miscompilations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104323 91177308-0d34-0410-b5e6-96231b3b80d8
* Use MachineInstr::readsWritesVirtualRegister to determine if a register is read.Jakob Stoklund Olesen2010-05-213-58/+34
| | | | | | This correctly handles partial redefines and undef uses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104322 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach VirtRegRewriter to handle spilling in instructions that have multipleJakob Stoklund Olesen2010-05-212-1/+52
| | | | | | | | | | | | | definitions of the virtual register. This happens when spilling the registers produced by REG_SEQUENCE: %reg1047:5<def>, %reg1047:6<def>, %reg1047:7<def> = VLD3d8 %reg1033, 0, pred:14, pred:%reg0 The rewriter would spill the register multiple times, dead store elimination tried to keep up, but ended up cutting the branch it was sitting on. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104321 91177308-0d34-0410-b5e6-96231b3b80d8
* If the first definition of a virtual register is a partial redef, add anJakob Stoklund Olesen2010-05-213-7/+24
| | | | | | | <imp-def> operand for the full register. This ensures that the full physical register is marked live after register allocation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104320 91177308-0d34-0410-b5e6-96231b3b80d8
* Currently, createMachOStreamer() is invoked directly in llvm-mc whichMatt Fleming2010-05-213-1/+68
| | | | | | | | | | | isn't ideal if we want to be able to use another object file format. Add a createObjectStreamer() factory method so that the correct object file streamer can be instantiated for a given target triple. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104318 91177308-0d34-0410-b5e6-96231b3b80d8
* Split out the x86_32 an x86_64 ELF backends as they handle ELFMatt Fleming2010-05-211-2/+14
| | | | | | | | differently. This will make adding ELF support easier in the long run. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104317 91177308-0d34-0410-b5e6-96231b3b80d8
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