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* Fix thinkoAnton Korobeynikov2009-07-161-8/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75957 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix epic bug with invalid regclass for R0DAnton Korobeynikov2009-07-161-1/+1
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* Let RegisterInfo decide whether it can emit cross-class copy or notAnton Korobeynikov2009-07-161-4/+5
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* More register pairs (now 32 bit ones)Anton Korobeynikov2009-07-161-0/+53
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* Add even-odd register pairsAnton Korobeynikov2009-07-161-1/+62
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* Unbreak due to mainline api changeAnton Korobeynikov2009-07-161-1/+1
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* Preliminary mul loweringAnton Korobeynikov2009-07-162-0/+44
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* More extloadsAnton Korobeynikov2009-07-162-0/+23
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* Tests for cmp / br_cc / select_ccAnton Korobeynikov2009-07-165-0/+570
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* SELECT_CC loweringAnton Korobeynikov2009-07-165-1/+155
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* Conditional branches and comparisonsAnton Korobeynikov2009-07-164-3/+228
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* Emit correct offset for PseudoSourceValueAnton Korobeynikov2009-07-161-6/+8
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* Provide proper stack offsets for outgoing argumentsAnton Korobeynikov2009-07-164-8/+17
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* Change register allocation order to reduce amount of callee-saved regs to be ↵Anton Korobeynikov2009-07-161-18/+98
| | | | | | spilled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75944 91177308-0d34-0410-b5e6-96231b3b80d8
* Emit callee-saved regs spills / restoresAnton Korobeynikov2009-07-168-38/+190
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* Scan for presence of calls and determine max callframe size early. To allow ↵Anton Korobeynikov2009-07-162-25/+37
| | | | | | ProcessFunctionBeforeCalleeSaveScan() use this information git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75942 91177308-0d34-0410-b5e6-96231b3b80d8
* Some preliminary call loweringAnton Korobeynikov2009-07-169-11/+331
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* Prologue / epilogue emissionAnton Korobeynikov2009-07-163-3/+92
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* Add simple frame index eliminationAnton Korobeynikov2009-07-165-2/+70
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75939 91177308-0d34-0410-b5e6-96231b3b80d8
* Provide proper test :)Anton Korobeynikov2009-07-161-10/+9
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* Swap the order of imm and idx field for rri addrmode in order to make ↵Anton Korobeynikov2009-07-163-11/+11
| | | | | | handling of rri and ri addrmodes common git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75937 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not truncate sign bits for negative immsAnton Korobeynikov2009-07-162-21/+23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75936 91177308-0d34-0410-b5e6-96231b3b80d8
* Add address computation stuffAnton Korobeynikov2009-07-163-4/+94
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* CleanupAnton Korobeynikov2009-07-161-4/+21
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* Add mem-imm storesAnton Korobeynikov2009-07-163-1/+49
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* [PATCH 023/155] TypoAnton Korobeynikov2009-07-161-1/+1
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* Add stores and truncstoresAnton Korobeynikov2009-07-163-3/+97
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* Add patterns for various extloadsAnton Korobeynikov2009-07-163-1/+119
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* Do some heroic rri address matching (shamelessly stolen from x86 backend). ↵Anton Korobeynikov2009-07-163-12/+268
| | | | | | Not tested though. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75929 91177308-0d34-0410-b5e6-96231b3b80d8
* Change register allocation order, so R0 will be allocated the last among ↵Anton Korobeynikov2009-07-161-2/+2
| | | | | | scratch. This will make address-calculation code much more happy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75928 91177308-0d34-0410-b5e6-96231b3b80d8
* Add shifts and reg-imm address matchingAnton Korobeynikov2009-07-167-3/+366
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* Add bunch of 32-bit patterns... Uffff :)Anton Korobeynikov2009-07-1617-9/+527
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* Propagate return result extension typeAnton Korobeynikov2009-07-161-0/+7
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* Add tests for fixes I committed earlier to the C++ FE.Rafael Espindola2009-07-162-0/+22
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* Add 32 bit subregsAnton Korobeynikov2009-07-164-29/+90
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* Add another bunch of reg-imm patterns for add/or/and/xorAnton Korobeynikov2009-07-161-0/+27
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* Add bunch of reg-imm movsAnton Korobeynikov2009-07-163-4/+104
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* Proper match halfword-imm operands for mov and addAnton Korobeynikov2009-07-161-7/+14
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* Provide masked reg-imm 'or' and 'and'Anton Korobeynikov2009-07-164-11/+123
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* Fix test running linesAnton Korobeynikov2009-07-1610-10/+10
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* Add reg-reg and patternAnton Korobeynikov2009-07-163-0/+24
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* Add sub reg-reg patternAnton Korobeynikov2009-07-163-0/+20
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* Add xor reg-reg patternAnton Korobeynikov2009-07-163-0/+19
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* Add or reg-reg pattern.Anton Korobeynikov2009-07-163-0/+23
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* Add add reg-reg and reg-imm patternsAnton Korobeynikov2009-07-164-1/+45
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* Add simple reg-reg and reg-imm movesAnton Korobeynikov2009-07-165-8/+80
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* Minimal lowering for formal_arguments / retAnton Korobeynikov2009-07-164-1/+180
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* Add testsuite dir for systemz stuffAnton Korobeynikov2009-07-161-0/+5
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* Let's start another backend :)Anton Korobeynikov2009-07-1625-2/+1884
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* Combine an unaligned store of unaligned load into a memmove.Richard Osborne2009-07-163-0/+66
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