| Commit message (Collapse) | Author | Age | Files | Lines |
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Constant::getRelocationInfo(), which has a much simpler
to use API. It still should not be part of libvmcore, but
is better than it was. Also teach it to be smart about
hidden visibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76700 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76699 91177308-0d34-0410-b5e6-96231b3b80d8
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negative on an individual bases rather than basing on whether it's in thumb
mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76698 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76693 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76689 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76688 91177308-0d34-0410-b5e6-96231b3b80d8
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virtual. Just inline it into its two current call sites in preparation
for simplifying the code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76686 91177308-0d34-0410-b5e6-96231b3b80d8
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pinsrd in sse4.1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76684 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76683 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76682 91177308-0d34-0410-b5e6-96231b3b80d8
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range's weight properly. This is turned off right now in the sense that
you'll get an assert if you get into a situation that can only be caused
by an iterative coalescer. All other code paths operate exactly as
before so there is no functional change with this patch. The asserts
should be disabled if/when an iterative coalescer gets added to trunk.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76680 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76679 91177308-0d34-0410-b5e6-96231b3b80d8
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pool entry will require relocations against it. I implemented this
conservatively for ARM, someone who is knowledgable about it should
see if this can be improved.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76678 91177308-0d34-0410-b5e6-96231b3b80d8
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getAnalysisIfAvailable<TargetData>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76676 91177308-0d34-0410-b5e6-96231b3b80d8
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to help support use when TargetData is not available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76675 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76674 91177308-0d34-0410-b5e6-96231b3b80d8
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their appropriate sections before the code itself. They need to be emitted
before the function because on some targets (x86 but not x86_64) the later
may reference a JT or CP entry address
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76672 91177308-0d34-0410-b5e6-96231b3b80d8
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(x pred y) with more thorough code that does more complete canonicalization
before resorting to range checks. This helps it find more cases where
the canonicalized expressions match.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76671 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76669 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76668 91177308-0d34-0410-b5e6-96231b3b80d8
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depends on XS1A, but I think the ReadOnlySection is already set up for this
and there is no testcase that this breaks. If this is really needed, we can
add the appropriate parameterization to TargetAsmInfo in the future to support
this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76667 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76666 91177308-0d34-0410-b5e6-96231b3b80d8
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LLVM IR, it should be rejected by a front-end.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76665 91177308-0d34-0410-b5e6-96231b3b80d8
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to twist your brain to see it, I believe it is the same as ELFTargetAsmInfo::SelectSectionForGlobal.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76664 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76662 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76661 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76660 91177308-0d34-0410-b5e6-96231b3b80d8
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the generic ELF version instead. This will result in its mergable constant
sections getting named ".rodata.cst4" instead of ".cp.const4", but the
linker looks at the section flags, not the name of the section AFAICT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76659 91177308-0d34-0410-b5e6-96231b3b80d8
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as 32-bit code by default, and if gcc defaults to 64-bit code then ocamlc
requires a -cc "gcc -arch i386" option. We were hardcoding -cc g++
and throwing away any other compiler options that were determined when
ocamlc was configured and built.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76658 91177308-0d34-0410-b5e6-96231b3b80d8
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This fixes a regression in the vmcore.ml dejagnu test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76657 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76655 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76654 91177308-0d34-0410-b5e6-96231b3b80d8
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implemented exactly the same way as its ELFTargetAsmInfo subclass
has them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76653 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76646 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76645 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76639 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76636 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76635 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76634 91177308-0d34-0410-b5e6-96231b3b80d8
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be useful, and it's currently unused. (Some issues: it isn't actually
rich enough to capture the semantics on many architectures, and
semantics can vary depending on the type being shifted.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76633 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76631 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76629 91177308-0d34-0410-b5e6-96231b3b80d8
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this:
%ESI<def> = MOV32rr %EDI<kill>
ADJCALLSTACKDOWN64 0, %RSP<imp-def>, %EFLAGS<imp-def,dead>, %RSP<imp-use>
%reg1027<def> = MOVZX64rr32 %ESI
%reg1027<def> = ADD64ri8 %reg1027, 15, %EFLAGS<imp-def,dead>
%reg1027<def> = AND64ri8 %reg1027, -16, %EFLAGS<imp-def,dead>
%RDI<def> = MOV64rr %RSP
%RDI<def> = SUB64rr %RDI, %reg1027<kill>, %EFLAGS<imp-def,dead>
%RSP<def> = MOV64rr %RDI
into this:
4 %reg1024<def> = MOV32rr %EDI<kill>
12 ADJCALLSTACKDOWN64 0, %RSP<imp-def>, %EFLAGS<imp-def,dead>, %RSP<imp-use>
20 %reg1025<def> = MOVZX64rr32 %reg1024
28 %reg1026<def> = MOV64rr %reg1025<kill>
36 %reg1026<def> = ADD64ri8 %reg1026, 15, %EFLAGS<imp-def,dead>
44 %reg1027<def> = MOV64rr %reg1026<kill>
52 %reg1027<def> = AND64ri8 %reg1027, -16, %EFLAGS<imp-def,dead>
60 %reg1028<def> = MOV64rr %RSP
68 %reg1029<def> = MOV64rr %reg1028<kill>
76 %reg1029<def> = SUB64rr %reg1029, %reg1027<kill>, %EFLAGS<imp-def,dead>
84 %RSP<def> = MOV64rr %reg1029
This helps greatly when debugging register allocation and coalescing
problems.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76615 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76612 91177308-0d34-0410-b5e6-96231b3b80d8
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and call PrintGlobalVariable, allowing elimination and simplification
of various targets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76604 91177308-0d34-0410-b5e6-96231b3b80d8
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MachineBasicBlock. We'll use these shortly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76603 91177308-0d34-0410-b5e6-96231b3b80d8
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printers to do neat and wonderful things when printing debug
information. The ideas is to allow passes to configer printers to emit
pass-specific information when dumping IR.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76602 91177308-0d34-0410-b5e6-96231b3b80d8
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efficiency. Fix a few formatting bugs along the way.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76601 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76600 91177308-0d34-0410-b5e6-96231b3b80d8
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76598 91177308-0d34-0410-b5e6-96231b3b80d8
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