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* Try using vmov.i32 to materialize FP32 constants that can't be materialized byLang Hames2012-03-291-23/+54
| | | | | | | vmov.f32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153696 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-factored RuntimeDyld.Danil Malyshev2012-03-2957-1073/+1828
| | | | | | Added ExecutionEngine/MCJIT tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153694 91177308-0d34-0410-b5e6-96231b3b80d8
* Lowercase the tag name to match the rest of dwarf.Eric Christopher2012-03-294-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153691 91177308-0d34-0410-b5e6-96231b3b80d8
* ARM assembly 'cmp lr, #0' should not encode using 'cmn'.Jim Grosbach2012-03-294-4/+10
| | | | | | | | | The CMP->CMN alias was matching for an immediate of zero when it should only match for negative values. rdar://11129224 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153689 91177308-0d34-0410-b5e6-96231b3b80d8
* The shuffle scheduler is only available in asserts build - make misched-new.llLang Hames2012-03-291-0/+1
| | | | | | | testcase require asserts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153687 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle register copies for the new ARM register classes.Jakob Stoklund Olesen2012-03-291-19/+41
| | | | | | | | | | | | | ARM recently gained DPair, DTriple, and DQuad register classes. Update copyPhysReg() to handle copies in these register classes. No test case, it is difficult to make the register allocator emit the odd copies reliably. The missing DPair copy caused a failure on partialsums in the nightly test suite. <rdar://problem/11147997> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153686 91177308-0d34-0410-b5e6-96231b3b80d8
* Drop O4 from the llc manpage, it was removed in r70445.Benjamin Kramer2012-03-291-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153684 91177308-0d34-0410-b5e6-96231b3b80d8
* Make x86 REP_MOV* and REP_STO instructions use the correct operand sizes in ↵Lang Hames2012-03-292-25/+59
| | | | | | 64-bit mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153680 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix missed files in JIT unittests MakefileDanil Malyshev2012-03-291-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153672 91177308-0d34-0410-b5e6-96231b3b80d8
* Expand FREM.Akira Hatanaka2012-03-292-0/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153671 91177308-0d34-0410-b5e6-96231b3b80d8
* Add more constness to CodeGenRegisters.Jakob Stoklund Olesen2012-03-293-7/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153667 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't PRE compares.Jakob Stoklund Olesen2012-03-292-1/+76
| | | | | | | | | | | | CodeGenPrepare sinks compare instructions down to their uses to prevent live flags and predicate registers across basic blocks. PRE of a compare instruction prevents that, forcing the i1 compare result into a general purpose register. That is usually more expensive than the redundant compare PRE was trying to eliminate in the first place. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153657 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace assert(0) with llvm_unreachable to avoid warnings about dropping off ↵Benjamin Kramer2012-03-291-6/+5
| | | | | | the end of a non-void function in Release builds. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153643 91177308-0d34-0410-b5e6-96231b3b80d8
* Add support for objc property decls according to the page at:Eric Christopher2012-03-296-15/+65
| | | | | | | | | | http://llvm.org/docs/SourceLevelDebugging.html#objcproperty including type and DECL. Expand the metadata needed accordingly. rdar://11144023 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153639 91177308-0d34-0410-b5e6-96231b3b80d8
* Make some headway towards compiling all of LLVM.Bill Wendling2012-03-292-36/+55
| | | | | | | | | | | | | | | | | | Module-level ASM may contain definitions of functions and globals. However, we were not telling the linker that these globals had definitions. As far as it was concerned, they were just declarations. Attempt to resolve this by inserting module-level ASM functions and globals into the '_symbol' set so that the linker will know that they have values. This gets us further towards our goal of compiling LLVM, but it still has problems when linking libLTO.dylib because of the `-dead_strip' flag that's passed to the linker. <rdar://problem/11124216> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153638 91177308-0d34-0410-b5e6-96231b3b80d8
* Only allow symbolic names for (v)cmpss/sd/ps/pd encodings 8-31 to be used ↵Craig Topper2012-03-291-12/+13
| | | | | | with 'v' version of instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153636 91177308-0d34-0410-b5e6-96231b3b80d8
* For X86, change load/dec-or-inc/store into dec-or-inc, respectively.Joel Jones2012-03-293-101/+273
| | | | | | | | | | | | | | | | | This is a code change to add support for changing instruction sequences of the form: load inc/dec of 8/16/32/64 bits store into the appropriate X86 inc/dec through memory instruction: inc[qlwb] / dec[qlwb] The checks that were in X86DAGToDAGISel::Select(SDNode *Node)>>ISD::STORE have been extracted to isLoadIncOrDecStore and reworked to use the better named wrappers for getOperand(unsigned) (e.g. getOffset()) and replaced Chain.getNode() with LoadNode. The comments have also been expanded. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153635 91177308-0d34-0410-b5e6-96231b3b80d8
* Cleanup whitespace.Bill Wendling2012-03-291-15/+12
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153634 91177308-0d34-0410-b5e6-96231b3b80d8
* Cache the end() iterator.Bill Wendling2012-03-291-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153632 91177308-0d34-0410-b5e6-96231b3b80d8
* Reverted to revision 153616 to unblock buildJoel Jones2012-03-293-273/+101
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153623 91177308-0d34-0410-b5e6-96231b3b80d8
* For X86, change load/dec-or-inc/store into dec-or-inc, respectively.Joel Jones2012-03-293-101/+273
| | | | | | | | | | | | | | | | | This is a code change to add support for changing instruction sequences of the form: load inc/dec of 8/16/32/64 bits store into the appropriate X86 inc/dec through memory instruction: inc[qlwb] / dec[qlwb] The checks that were in X86DAGToDAGISel::Select(SDNode *Node)>>ISD::STORE have been extracted to isLoadIncOrDecStore and reworked to use the better named wrappers for getOperand(unsigned) (e.g. getOffset()) and replaced Chain.getNode() with LoadNode. The comments have also been expanded. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153617 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable machine code verification in the entire code generator.Jakob Stoklund Olesen2012-03-283-15/+5
| | | | | | | | | | Some targets still mess up the liveness information, but that isn't verified after MRI->invalidateLiveness(). The verifier can still check other useful things like register classes and CFG, so it should be enabled after all passes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153615 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable machine code verification after PreSched2 passes.Jakob Stoklund Olesen2012-03-282-2/+4
| | | | | | | | | | The late scheduler depends on accurate liveness information if it is breaking anti-dependencies, so we should be able to verify it. Relax the terminator checking in the machine code verifier so it can handle the basic blocks created by if conversion. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153614 91177308-0d34-0410-b5e6-96231b3b80d8
* Cleanup some whitespaces.Bill Wendling2012-03-282-136/+132
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153612 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't kill the base register when expanding strd.Jakob Stoklund Olesen2012-03-282-0/+19
| | | | | | | | | | | | | | When an strd instruction doesn't get the registers it wants, it can be expanded into two str instructions. Make sure the first str doesn't kill the base register in the case where the base and data registers are identical: t2STRi12 %R0<kill>, %R0, 4, pred:14, pred:%noreg t2STRi12 %R2<kill>, %R0, 8, pred:14, pred:%noreg <rdar://problem/11101911> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153611 91177308-0d34-0410-b5e6-96231b3b80d8
* Preserve implicit defs in ARMLoadStoreOptimizer.Jakob Stoklund Olesen2012-03-282-4/+23
| | | | | | | | | | | When a number of sub-register VLRDS instructions are combined into a VLDM, preserve any super-register implicit defs. This is required to keep the register scavenger and machine code verifier happy. Enable machine code verification after ARMLoadStoreOptimizer. ARM/2012-01-26-CopyPropKills.ll was failing because of this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153610 91177308-0d34-0410-b5e6-96231b3b80d8
* Tidy up. Whitespace.Jim Grosbach2012-03-281-3/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153609 91177308-0d34-0410-b5e6-96231b3b80d8
* Move getPointerToNamedFunction() from JIT/MCJIT to JITMemoryManager.Danil Malyshev2012-03-2814-332/+233
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153607 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle intrinsics in GlobalsModRef. Fixes pr12351.Rafael Espindola2012-03-282-0/+39
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153604 91177308-0d34-0410-b5e6-96231b3b80d8
* Spill DPair registers, not just QPR.Jakob Stoklund Olesen2012-03-284-7/+22
| | | | | | | | | The arm_neon intrinsics can create virtual registers from the DPair register class which allows both even-odd and odd-even D-register pairs. This fixes PR12389. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153603 91177308-0d34-0410-b5e6-96231b3b80d8
* Also verify after ExpandPostRAPseudos.Jakob Stoklund Olesen2012-03-281-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153599 91177308-0d34-0410-b5e6-96231b3b80d8
* Inline function into its one caller.Bill Wendling2012-03-281-7/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153598 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable machine code verification after the late machine optimization passes.Jakob Stoklund Olesen2012-03-281-3/+3
| | | | | | | Branch folding invalidates liveness and disables liveness verification on some targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153597 91177308-0d34-0410-b5e6-96231b3b80d8
* Skip liveness verification when MRI->tracksLiveness() is false.Jakob Stoklund Olesen2012-03-281-105/+112
| | | | | | | | | Extract the liveness verification into its own method. This makes it possible to run the machine code verifier after liveness information is no longer required to be valid. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153596 91177308-0d34-0410-b5e6-96231b3b80d8
* Reformat the LTOModule code to be more inline with LLVM's coding standards. AddBill Wendling2012-03-282-105/+170
| | | | | | | a bunch of comments for the various functions. No intended functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153595 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r153516: "Invalidate liveness in Thumb2ITBlockPass."Jakob Stoklund Olesen2012-03-282-8/+0
| | | | | | | | | | | | | | Revert r153519: "ARMLoadStoreOptimizer invalidates register liveness." These patches caused miscompilations in povray by turning off branch folding's updating of live-in lists. It turns out the the late scheduler depends on the live-in lists, even if it doesn't need correct kill flags. <rdar://problem/11139228> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153593 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow removeLiveIn to be called with a register that isn't live-in.Jakob Stoklund Olesen2012-03-281-2/+2
| | | | | | | | | This avoids the silly double search: if (isLiveIn(Reg)) removeLiveIn(Reg); git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153592 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r153521 as it's causing large regressions on the nightly testers.Chad Rosier2012-03-283-56/+0
| | | | | | | | | Original commit message for r153521 (aka r153423): Use the new range metadata in computeMaskedBits and add a new optimization to instruction simplify that lets us remove an and when loding a boolean value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153587 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixed commuteInstructions bug where if its called pre-regalloc the subreg ↵Pete Cooper2012-03-281-6/+15
| | | | | | indices weren't commuted git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153579 91177308-0d34-0410-b5e6-96231b3b80d8
* GlobalOpt: If we have an inbounds GEP from a ConstantAggregateZero global ↵Benjamin Kramer2012-03-282-0/+17
| | | | | | that we just determined to be constant, replace all loads from it with a zero value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153576 91177308-0d34-0410-b5e6-96231b3b80d8
* Add another note about a missed compare with nsw arithmetic instcombine.Benjamin Kramer2012-03-281-0/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153574 91177308-0d34-0410-b5e6-96231b3b80d8
* Fixup VST1.32 with writeback instruction. Also re-factor non-writeback version.Richard Barton2012-03-282-21/+21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153573 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch to WeakVHs in the value mapper, and aggressively prune dead basicChandler Carruth2012-03-283-14/+24
| | | | | | | | | blocks in the function cloner. This removes the last case of trivially dead code that I've been seeing in the wild getting inlined, analyzed, re-inlined, optimized, only to be deleted. Nukes a FIXME from the cleanup tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153572 91177308-0d34-0410-b5e6-96231b3b80d8
* More debug output.Eric Christopher2012-03-281-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153571 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the output of the DW_TAG_friend tag to include DW_AT_friendEric Christopher2012-03-283-8/+63
| | | | | | | | and not the rest of the member tag. Fixes PR11695 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153570 91177308-0d34-0410-b5e6-96231b3b80d8
* Some whitespace cleanup.Bill Wendling2012-03-281-19/+14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153567 91177308-0d34-0410-b5e6-96231b3b80d8
* Use the correct filename for the error message.Bill Wendling2012-03-281-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153564 91177308-0d34-0410-b5e6-96231b3b80d8
* Use Nakamura's suggestion of bypassing using 'filename' and just the ↵Bill Wendling2012-03-281-5/+2
| | | | | | pointers directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153558 91177308-0d34-0410-b5e6-96231b3b80d8
* Turn off post-RA scheduler by default.Akira Hatanaka2012-03-281-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153557 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix 80-column violation.Chad Rosier2012-03-281-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153556 91177308-0d34-0410-b5e6-96231b3b80d8
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