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* [AArch64] Make the use of FP instructions optional, but enabled by default.Amara Emerson2013-10-3124-40/+225
| | | | | | | | This adds a new subtarget feature called FPARMv8 (implied by NEON), and predicates the support of the FP instructions and registers on this feature. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193739 91177308-0d34-0410-b5e6-96231b3b80d8
* llvm/test/Bitcode/invalid.ll: Tweak expresion to mach "llvm-dis.EXE:"NAKAMURA Takumi2013-10-311-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193738 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a use after free on invalid input.Rafael Espindola2013-10-313-5/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193737 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix most memory leaks in tablegen.Rafael Espindola2013-10-311-11/+20
| | | | | | Found by the valgrind bot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193736 91177308-0d34-0410-b5e6-96231b3b80d8
* Merge CallGraph and BasicCallGraph.Rafael Espindola2013-10-3111-203/+124
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193734 91177308-0d34-0410-b5e6-96231b3b80d8
* Updated llvm-cov's OVERVIEW descriptionYuchen Wu2013-10-311-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193732 91177308-0d34-0410-b5e6-96231b3b80d8
* Legalize: Improve legalization of long vector extends.Jim Grosbach2013-10-314-58/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When an extend more than doubles the size of the elements (e.g., a zext from v16i8 to v16i32), the normal legalization method of splitting the vectors will run into problems as by the time the destination vector is legal, the source vector is illegal. The end result is the operation often becoming scalarized, with the typical horrible performance. For example, on x86_64, the simple input of: define void @bar(<16 x i8> %a, <16 x i32>* %p) nounwind { %tmp = zext <16 x i8> %a to <16 x i32> store <16 x i32> %tmp, <16 x i32>*%p ret void } Generates: .section __TEXT,__text,regular,pure_instructions .section __TEXT,__const .align 5 LCPI0_0: .long 255 ## 0xff .long 255 ## 0xff .long 255 ## 0xff .long 255 ## 0xff .long 255 ## 0xff .long 255 ## 0xff .long 255 ## 0xff .long 255 ## 0xff .section __TEXT,__text,regular,pure_instructions .globl _bar .align 4, 0x90 _bar: vpunpckhbw %xmm0, %xmm0, %xmm1 vpunpckhwd %xmm0, %xmm1, %xmm2 vpmovzxwd %xmm1, %xmm1 vinsertf128 $1, %xmm2, %ymm1, %ymm1 vmovaps LCPI0_0(%rip), %ymm2 vandps %ymm2, %ymm1, %ymm1 vpmovzxbw %xmm0, %xmm3 vpunpckhwd %xmm0, %xmm3, %xmm3 vpmovzxbd %xmm0, %xmm0 vinsertf128 $1, %xmm3, %ymm0, %ymm0 vandps %ymm2, %ymm0, %ymm0 vmovaps %ymm0, (%rdi) vmovaps %ymm1, 32(%rdi) vzeroupper ret So instead we can check if there are legal types that enable us to split more cleverly when the input vector is already legal such that we don't turn it into an illegal type. If the extend is such that it's more than doubling the size of the input we check if - the number of vector elements is even, - the source type is legal, - the type of a split source is illegal, - the type of an extended (by doubling element size) source is legal, and - the type of that extended source when split is legal. If the conditions are met, instead of just splitting both the destination and the source types, we create an extend that only goes up one "step" (doubling the element width), and the continue legalizing the rest of the operation normally. The result is that this operates as a new, more effecient, termination condition for the loop of "split the operation until the destination type is legal." With this change, the above example now compiles to: _bar: vpxor %xmm1, %xmm1, %xmm1 vpunpcklbw %xmm1, %xmm0, %xmm2 vpunpckhwd %xmm1, %xmm2, %xmm3 vpunpcklwd %xmm1, %xmm2, %xmm2 vinsertf128 $1, %xmm3, %ymm2, %ymm2 vpunpckhbw %xmm1, %xmm0, %xmm0 vpunpckhwd %xmm1, %xmm0, %xmm3 vpunpcklwd %xmm1, %xmm0, %xmm0 vinsertf128 $1, %xmm3, %ymm0, %ymm0 vmovaps %ymm0, 32(%rdi) vmovaps %ymm2, (%rdi) vzeroupper ret This generalizes a custom lowering that was added a while back to the ARM backend. That lowering is no longer necessary, and is removed. The testcases for it, however, provide excellent ARM tests for this change and so remain. rdar://14735100 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193727 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a few typosMatt Arsenault2013-10-301-7/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193723 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix CodeGen for unaligned loads with address spacesMatt Arsenault2013-10-302-2/+24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193721 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach scalarrepl about address spacesMatt Arsenault2013-10-302-6/+39
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193720 91177308-0d34-0410-b5e6-96231b3b80d8
* Add calls to doInitialization() and doFinalization() in verifyFunction()Rafael Espindola2013-10-302-3/+6
| | | | | | | | | | | | | | | | | | | | | | The function verifyFunction() in lib/IR/Verifier.cpp misses some calls. It creates a temporary FunctionPassManager that will run a single Verifier pass. Unfortunately, FunctionPassManager is no PassManager and does not call doInitialization() and doFinalization() by itself. Verifier does important tasks in doInitialization() such as collecting type information used to check DebugInfo metadata and doFinalization() does some additional checks. Therefore these checks were missed and debug info couldn't be verified at all, it just crashed if the function had some. verifyFunction() is currently not used in llvm unless -debug option is enabled, and in unittests/IR/VerifierTest.cpp VerifierTest had to be changed to create the function in a module from which the type debug info can be collected. Patch by Michael Kruse. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193719 91177308-0d34-0410-b5e6-96231b3b80d8
* Produce .weak_def_can_be_hidden for some linkonce_odr valuesRafael Espindola2013-10-303-8/+47
| | | | | | | | | | | | | | With this patch llvm produces a weak_def_can_be_hidden for linkonce_odr if they are also unnamed_addr or don't have their address taken. There is not a lot of documentation about .weak_def_can_be_hidden, but from the old discussion about linkonce_odr_auto_hide and the name of the directive this looks correct: these symbols can be hidden. Testing this with the ld64 in Xcode 5 linking clang reduces the number of exported symbols from 21053 to 19049. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193718 91177308-0d34-0410-b5e6-96231b3b80d8
* DebugInfo: Push header handling down into CompileUnitDavid Blaikie2013-10-303-18/+29
| | | | | | | This is a preliminary step to handling type units by abstracting over all (type or compile) units. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193714 91177308-0d34-0410-b5e6-96231b3b80d8
* [Mips] Add more SHF_MIPS_xxx ELF section flags.Simon Atanasyan2013-10-301-2/+24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193713 91177308-0d34-0410-b5e6-96231b3b80d8
* Add DebugInfo testcase for high_pc encoded as constant, fixed in r193555.Will Dietz2013-10-303-0/+13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193711 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix GVN creating bitcast between address spacesMatt Arsenault2013-10-302-8/+24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193710 91177308-0d34-0410-b5e6-96231b3b80d8
* This commit adds some (but not all) of the x86-64 relocations that are notTom Roeder2013-10-302-6/+16
| | | | | | | currently supported in the ELF object writer, along with a simple test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193709 91177308-0d34-0410-b5e6-96231b3b80d8
* Add {start,end}with_lower methods to StringRef.Rui Ueyama2013-10-303-5/+53
| | | | | | | | | startswith_lower is ocassionally useful and I think worth adding. endwith_lower is added for completeness. Differential Revision: http://llvm-reviews.chandlerc.com/D2041 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193706 91177308-0d34-0410-b5e6-96231b3b80d8
* [ARM] NEON instructions were erroneously decoded from certain invalid encodingsArtyom Skrobov2013-10-302-20/+28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193705 91177308-0d34-0410-b5e6-96231b3b80d8
* R600: Custom lower f32 = uint_to_fp i64Tom Stellard2013-10-303-4/+42
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193701 91177308-0d34-0410-b5e6-96231b3b80d8
* DwarfDebug: Change Abbreviations member from pointer to referenceDavid Blaikie2013-10-302-10/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193699 91177308-0d34-0410-b5e6-96231b3b80d8
* fix RST reference in Writing an LLVM PassBenjamin Kramer2013-10-301-1/+1
| | | | | | | | | | Currently, instead of showing up as link, it is rendered as ...of FunctionPass <writing-an-llvm-pass-FunctionPass>. The... PR17733. Patch by Tay Ray Chuan! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193698 91177308-0d34-0410-b5e6-96231b3b80d8
* Add #include of raw_ostream.h to MipsSEISelLowering.cppHans Wennborg2013-10-301-0/+1
| | | | | | | | Fixing this Windows build error: ..\lib\Target\Mips\MipsSEISelLowering.cpp(997) : error C2027: use of undefined type 'llvm::raw_ostream' git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193696 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Correct definition of bins[lr] and CHECK-DAG-ize related testsDaniel Sanders2013-10-303-89/+166
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193695 91177308-0d34-0410-b5e6-96231b3b80d8
* make ConstantRange::signExtend() optimalNuno Lopes2013-10-302-0/+8
| | | | | | the case [x, INT_MIN) was not handled optimally git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193694 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Added support for matching bmnz, bmnzi, bmz, and bmzi from ↵Daniel Sanders2013-10-308-176/+471
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | normal IR (i.e. not intrinsics) Also corrected the definition of the intrinsics for these instructions (the result register is also the first operand), and added intrinsics for bsel and bseli to clang (they already existed in the backend). These four operations are mostly equivalent to bsel, and bseli (the difference is which operand is tied to the result). As a result some of the tests changed as described below. bitwise.ll: - bsel.v test adapted so that the mask is unknown at compile-time. This stops it emitting bmnzi.b instead of the intended bsel.v. - The bseli.b test now tests the right thing. Namely the case when one of the values is an uimm8, rather than when the condition is a uimm8 (which is covered by bmnzi.b) compare.ll: - bsel.v tests now (correctly) emits bmnz.v instead of bsel.v because this is the same operation (see MSA.txt). i8.ll - CHECK-DAG-ized test. - bmzi.b test now (correctly) emits equivalent bmnzi.b with swapped operands because this is the same operation (see MSA.txt). - bseli.b still emits bseli.b though because the immediate makes it distinguishable from bmnzi.b. vec.ll: - CHECK-DAG-ized test. - bmz.v tests now (correctly) emits bmnz.v with swapped operands (see MSA.txt). - bsel.v tests now (correctly) emits bmnz.v with swapped operands (see MSA.txt). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193693 91177308-0d34-0410-b5e6-96231b3b80d8
* [AArch64] Add support for NEON scalar floating-point compare instructions.Chad Rosier2013-10-309-37/+780
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193691 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor the AVX512 intrinsics. Cluster the intrinsics into the appropriate ↵Cameron McInally2013-10-301-82/+104
| | | | | | vector extension class within the .td file. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193690 91177308-0d34-0410-b5e6-96231b3b80d8
* Rehash but don't grow when full of tombstones.Howard Hinnant2013-10-301-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This problem was found and fixed by José Fonseca in March 2011 for SmallPtrSet, committed r128566. But as far as I can tell, all other llvm hash tables retain the same problem: the bucket count can grow without bound while size() remains near constant by repeated insert/erase cycles that tend to fill the container with tombstones. Here is a demo that has been reduced to a trivial case: int main() { llvm::DenseSet<unsigned> d; for (unsigned i = 0; i < 0xFFFFFFF; ++i) { d.insert(i); d.erase(i); } } While the container size() never grows above 1, the bucket count grows like this: nb = 64 nb = 128 nb = 256 nb = 512 nb = 1024 nb = 2048 nb = 4096 nb = 8192 nb = 16384 nb = 32768 nb = 65536 nb = 131072 nb = 262144 nb = 524288 nb = 1048576 nb = 2097152 nb = 4194304 nb = 8388608 nb = 16777216 nb = 33554432 nb = 67108864 nb = 134217728 nb = 268435456 The above program currently consumes a few GB ram. This patch brings the memory consumption down by several orders of magnitude, and keeps the bucket count at 64 for the above test. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193689 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Added support for matching bins[lr]i.[bhwd] from normal IR (i.e. ↵Daniel Sanders2013-10-3010-119/+395
| | | | | | | | | | | | | | | | | | | not intrinsics) This required correcting the definition of the bins[lr]i intrinsics because the result is also the first operand. It also required removing the (arbitrary) check for 32-bit immediates in MipsSEDAGToDAGISel::selectVSplat(). Currently using binsli.d with 2 bits set in the mask doesn't select binsli.d because the constant is legalized into a ConstantPool. Similar things can happen with binsri.d with more than 10 bits set in the mask. The resulting code when this happens is correct but not optimal. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193687 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Combine binsri-like DAG of AND and OR into equivalent VSELECTDaniel Sanders2013-10-302-0/+272
| | | | | | | | | | | | | | | | | (or (and $a, $mask), (and $b, $inverse_mask)) => (vselect $mask, $a, $b). where $mask is a constant splat. This allows bitwise operations to make use of bsel. It's also a stepping stone towards matching bins[lr], and bins[lr]i from normal IR. Two sets of similar tests have been added in this commit. The bsel_* functions test the case where binsri cannot be used. The binsr_*_i functions will start to use the binsri instruction in the next commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193682 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] MipsSETargetLowering now reports DAGCombiner changes when using ↵Daniel Sanders2013-10-301-1/+9
| | | | | | | | | | -debug-only=mips-isel No test since -debug output is intended for developers and not end-users. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193681 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips][msa] Added support for matching splat.[bhw] from normal IR (i.e. not ↵Daniel Sanders2013-10-304-59/+101
| | | | | | | | | | | intrinsics) splat.d is implemented but this subtest is currently disabled. This is because it is difficult to match the appropriate IR on MIPS32. There is a patch under review that should help with this so I hope to enable the subtest soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193680 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert "SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs ↵Juergen Ributzka2013-10-304-87/+9
| | | | | | | | splitting too." Now Hexagon and SystemZ are not happy with it :-( git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193677 91177308-0d34-0410-b5e6-96231b3b80d8
* SelectionDAG: Teach the legalizer to split SETCC if VSELECT needs splitting too.Juergen Ributzka2013-10-304-9/+87
| | | | | | | | | | | | | | | | | | | | The Type Legalizer recognizes that VSELECT needs to be split, because the type is to wide for the given target. The same does not always apply to SETCC, because less space is required to encode the result of a comparison. As a result VSELECT is split and SETCC is unrolled into scalar comparisons. This commit fixes the issue by checking for VSELECT-SETCC patterns in the DAG Combiner. If a matching pattern is found, then the result mask of SETCC is promoted to the expected vector mask type for the given target. This mask has usually the same size as the VSELECT return type (except for Intel KNL). Now the type legalizer will split both VSELECT and SETCC. This allows the following X86 DAG Combine code to sucessfully detect the MIN/MAX pattern. This fixes PR16695, PR17002, and <rdar://problem/14594431>. Reviewed by Nadav git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193676 91177308-0d34-0410-b5e6-96231b3b80d8
* Reformat Makefile. No other changes.Bill Wendling2013-10-301-4/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193675 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Compute stack alignment on the fly.Akira Hatanaka2013-10-303-7/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193673 91177308-0d34-0410-b5e6-96231b3b80d8
* Reformat code with clang-format.Josh Magee2013-10-302-42/+46
| | | | | | | Differential Revision: http://llvm-reviews.chandlerc.com/D2057 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193672 91177308-0d34-0410-b5e6-96231b3b80d8
* StackProtector.h: Fix trailing comments for doxygen. [-Wdocumentation]NAKAMURA Takumi2013-10-301-8/+8
| | | | | | s!//<!///<! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193669 91177308-0d34-0410-b5e6-96231b3b80d8
* Trailing whitespace in a comment line.NAKAMURA Takumi2013-10-301-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193668 91177308-0d34-0410-b5e6-96231b3b80d8
* Debug Info: code clean up.Manman Ren2013-10-292-3/+5
| | | | | | | | | | | Use EmitLabelOffsetDifference for handling on darwin platform when non-darwin platforms use EmitLabelPlusOffset. Also fix a bug in EmitLabelOffsetDifference where the size is hard-coded to 4 even though Size is passed in as an argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193660 91177308-0d34-0410-b5e6-96231b3b80d8
* Debug Info: support for DW_FORM_ref_addr.Manman Ren2013-10-296-3/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To support ref_addr, we calculate the section offset of a DIE (i.e. offset of a DIE from beginning of the debug info section). The Offset field in DIE is currently CU-relative. To calculate the section offset, we add a DebugInfoOffset field in CompileUnit to store the offset of a CU from beginning of the debug info section. We set the value in DwarfUnits::computeSizeAndOffset for each CompileUnit. A helper function DIE::getCompileUnit is added to return the CU DIE that the input DIE belongs to. We also add a map CUDieMap in DwarfDebug to help finding the CU for a given CU DIE. For a cross-referenced DIE, we first find the CU DIE it belongs to with getCompileUnit, then we use CUDieMap to get the corresponding CU for the CU DIE. Adding the section offset of the CU with the CU-relative offset of a DIE gives us the seciton offset of the DIE. We correctly emit ref_addr with relocation using EmitLabelPlusOffset when doesDwarfUseRelocationsAcrossSections is true. This commit handles the emission of DW_FORM_ref_addr when we have an attribute with FORM_ref_addr. A follow-on patch will start using ref_addr when adding a DIEEntry. This commit will be tested and verified in the follow-on patch. Reviewed off-list by Eric, Thanks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193658 91177308-0d34-0410-b5e6-96231b3b80d8
* Debug Info: instead of calling addToContextOwner which constructs the contextManman Ren2013-10-2911-68/+63
| | | | | | | | | | | | | | | | after the DIE creation, we construct the context first. Ensure that we create the context before we create a type so that we can add the newly created type to the parent. Remove last use of addToContextOwner now that it's not needed. We use createAndAddDIE to wrap around "new DIE(". Now all shareable DIEs should be added to their parents right after the creation. Reviewed off-list by Eric, Thanks. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193657 91177308-0d34-0410-b5e6-96231b3b80d8
* Struct byval cleanup: add helper functions to reduce code duplication.Manman Ren2013-10-291-180/+117
| | | | | | | | | | | Helper functions are added: emitPostLd: emit a post-increment load operation with given size. emitPostSt: emit a post-increment store operation with given size. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193656 91177308-0d34-0410-b5e6-96231b3b80d8
* [stackprotector] Update the StackProtector pass to perform datalayout analysis.Josh Magee2013-10-292-28/+90
| | | | | | | | | | | | | | | | This modifies the pass to classify every SSP-triggering AllocaInst according to an SSPLayoutKind (LargeArray, SmallArray, AddrOf). This analysis is collected by the pass and made available for use, but no other pass uses it yet. The next patch will make use of this analysis in PEI and StackSlot passes. The end goal is to support ssp-strong stack layout rules. WIP. Differential Revision: http://llvm-reviews.chandlerc.com/D1789 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193653 91177308-0d34-0410-b5e6-96231b3b80d8
* Update commentMatt Arsenault2013-10-291-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193651 91177308-0d34-0410-b5e6-96231b3b80d8
* Workaround MSVC 32-bit miscompile of getCondCodeAction.Matt Arsenault2013-10-291-15/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use 32-bit types for the array instead of 64. This should generally be better anyway. In optimized + assert builds, I saw a failure when a cond code / type combination that is never set was loading a non-zero value and hitting the != Promote assert. It turns out when loading the 64-bit value to do the shift, the assembly loads the 2 32-bit halves from non-consecutive addresses. The address the second half of the loaded uint64_t doesn't include the offset of the array in the struct. Instead of being offset + 4, it's just + 4. I'm not entirely sure why this wasn't observed before. setCondCodeAction isn't heavily used by the in-tree targets, and not with the higher valued vector SimpleValueTypes. Only PPC is using one of the > 32 valued types, and that is probably never used by anyone on a 32-bit MSVC compiled host. I ran into this when upgrading LLVM versions, so I guess the value loaded from the nonsense address happened to work out before. No test since I'm not really sure if / how it can be reproduced with the current in tree targets, and it's not supposed to change anything. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193650 91177308-0d34-0410-b5e6-96231b3b80d8
* Removing a switch statement that contains only a default label. This ↵Aaron Ballman2013-10-291-28/+25
| | | | | | resolves an MSVC warning. No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193649 91177308-0d34-0410-b5e6-96231b3b80d8
* [mips] Align the stack to 16-bytes for mfp64.Akira Hatanaka2013-10-296-4/+25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193641 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove declared but not implemented function.Rafael Espindola2013-10-291-11/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@193637 91177308-0d34-0410-b5e6-96231b3b80d8
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