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* Add AVX AES instructionsBruno Cardoso Lopes2010-07-073-26/+167
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* Update the insert position after scheduling, which may change theDan Gohman2010-07-071-0/+1
| | | | | | | | position when emitting multiple blocks when executing a custom inserter. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107797 91177308-0d34-0410-b5e6-96231b3b80d8
* Update comment.Devang Patel2010-07-071-3/+4
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* Fix debugging strings.Dan Gohman2010-07-071-2/+2
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* Issue the warning about being slow whenever optimization is disabled,Duncan Sands2010-07-071-1/+1
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* Give FunctionLoweringInfo an MBB member, avoiding the need to pass itDan Gohman2010-07-077-185/+240
| | | | | | | | | around everywhere, and also give it an InsertPt member, to enable isel to operate at an arbitrary position within a block, rather than just appending to a block. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107791 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify FastISel's constructor by giving it a FunctionLoweringInfoDan Gohman2010-07-077-145/+51
| | | | | | | | | | instance, rather than pointers to all of FunctionLoweringInfo's members. This eliminates an NDEBUG ABI sensitivity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107789 91177308-0d34-0410-b5e6-96231b3b80d8
* Move FunctionLoweringInfo.h out into include/llvm/CodeGen. This willDan Gohman2010-07-075-6/+6
| | | | | | | allow target-specific fast-isel code to make use of it directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107787 91177308-0d34-0410-b5e6-96231b3b80d8
* Split the SDValue out of OutputArg so that SelectionDAG-independentDan Gohman2010-07-0731-122/+144
| | | | | | | code can do calling-convention queries. This obviates OutputArgReg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107786 91177308-0d34-0410-b5e6-96231b3b80d8
* add some triple for minix, patch by Kees van Reeuwijk from PR7582Chris Lattner2010-07-074-4/+8
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* Move ArgFlagsTy, OutputArg, and InputArg out of SelectionDAGNodes.h andDan Gohman2010-07-074-139/+163
| | | | | | | into a new header, TargetCallingConv.h. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107782 91177308-0d34-0410-b5e6-96231b3b80d8
* Move CallingConvLower.cpp out of the SelectionDAG directory.Dan Gohman2010-07-074-2/+1
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* Fix more places assuming subregisters have live intervalsJakob Stoklund Olesen2010-07-071-1/+6
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* adapt condition for changed default build modeGabor Greif2010-07-071-1/+1
| | | | | | | who knows how to cover Asserts or Debug separately please do not hesitate to extend this git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107779 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a getFirstNonPHI utility function.Dan Gohman2010-07-072-0/+14
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* Minore code simplification.Dan Gohman2010-07-071-17/+15
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* Remove interprocedural-basic-aa and associated code. The AliasAnalysisDan Gohman2010-07-078-1959/+338
| | | | | | | | | | | | interface needs implementations to be consistent, so any code which wants to support different semantics must use a different interface. It's not currently worthwhile to add a new interface for this new concept. Document that AliasAnalysis doesn't support cross-function queries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107776 91177308-0d34-0410-b5e6-96231b3b80d8
* Add Debug+Asserts and Release+Asserts to svn:ignore properties.Dan Gohman2010-07-070-0/+0
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* typo in comment, regeneration not necessaryGabor Greif2010-07-071-2/+2
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* conditionalize by CallInst::ArgOffsetGabor Greif2010-07-071-2/+2
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* conditionalize on CallInst::ArgOffsetGabor Greif2010-07-071-2/+2
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* minor cosmetic changes that happened to sit in my treeGabor Greif2010-07-071-3/+3
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* Rename "Release" builds as "Release+Asserts"; rename "Release-Asserts"Duncan Sands2010-07-076-16/+15
| | | | | | | | | | | | | | builds to "Release". The default build is unchanged (optimization on, assertions on), however it is now called Release+Asserts. The intent is that future LLVM releases released via llvm.org will be Release builds in the new sense, i.e. will have assertions disabled (currently they have assertions enabled, for a more than 20% slowdown). This will bring them in line with MacOS releases, which ship with assertions disabled. It also means that "Release" now means the same things in make and cmake builds: cmake already disables assertions for "Release" builds AFAICS. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107758 91177308-0d34-0410-b5e6-96231b3b80d8
* Add AVX SSE4.2 instructionsBruno Cardoso Lopes2010-07-073-114/+258
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* Use only one multiclass to pinsrq instructionsBruno Cardoso Lopes2010-07-072-38/+20
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* Now that almost all SSE4.1 AVX instructions are added, move code around to ↵Bruno Cardoso Lopes2010-07-072-361/+374
| | | | | | more appropriate sections. No functionality changes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107749 91177308-0d34-0410-b5e6-96231b3b80d8
* Add AVX SSE4.1 insertps, ptest and movntdqa instructionsBruno Cardoso Lopes2010-07-073-18/+79
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* Add AVX SSE4.1 extractps and pinsr instructionsBruno Cardoso Lopes2010-07-073-35/+139
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* Revert "Remove references to INSERT_SUBREG after de-SSA" r107725.Jakob Stoklund Olesen2010-07-077-9/+136
| | | | | | Buildbot breakage. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107744 91177308-0d34-0410-b5e6-96231b3b80d8
* Also use REG_SEQUENCE for VTBX instructions.Bob Wilson2010-07-072-24/+30
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* Mark eh.sjlj.set/longjmp custom lowerings as Darwin-only since that's whereJim Grosbach2010-07-071-2/+4
| | | | | | they've been tested to work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107742 91177308-0d34-0410-b5e6-96231b3b80d8
* Add AVX SSE4.1 Extract Integer instructionsBruno Cardoso Lopes2010-07-073-0/+67
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* By default, the eh.sjlj.setjmp/longjmp intrinsics should just do nothing ratherJim Grosbach2010-07-062-2/+9
| | | | | | | | | than assuming a target will custom lower them. Targets which do so should exlicitly mark them as having custom lowerings. PR7454. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107734 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove references to INSERT_SUBREG after de-SSAJakob Stoklund Olesen2010-07-067-136/+9
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* Use REG_SEQUENCE nodes to make the table registers for VTBL instructions beBob Wilson2010-07-062-10/+61
| | | | | | | allocated to consecutive registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107730 91177308-0d34-0410-b5e6-96231b3b80d8
* Accept RIP-relative symbols with 'i' constraint, andDale Johannesen2010-07-063-2/+24
| | | | | | | | | print the (%rip) only if the 'a' modifier is present. PR 7528. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107727 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert INSERT_SUBREG to COPY in TwoAddressInstructionPass.Jakob Stoklund Olesen2010-07-063-2/+35
| | | | | | | | | INSERT_SUBREG will now only appear in SSA machine instructions. Fix the handling of partial redefs in ProcessImplicitDefs. This is now relevant since partial redef COPY instructions appear. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107726 91177308-0d34-0410-b5e6-96231b3b80d8
* Track defs for all aliases in NEONMoveFix.Jakob Stoklund Olesen2010-07-061-2/+2
| | | | | | | This means that an instruction defining an S register will affect the domain of the parent D register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107725 91177308-0d34-0410-b5e6-96231b3b80d8
* Add the rest of AVX SSE4.1 packed move with sign/zero extend instructionsBruno Cardoso Lopes2010-07-063-0/+112
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* Make test not hang waiting for input.Dale Johannesen2010-07-061-1/+1
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* Add part of AVX SSE4.1 packed move with sign/zero extend instructionsBruno Cardoso Lopes2010-07-063-0/+112
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* Fix comment from previous patchBruno Cardoso Lopes2010-07-061-1/+1
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* Add AVX vblendvpd, vblendvps and vpblendvb instructionsBruno Cardoso Lopes2010-07-066-10/+108
| | | | | | | Update VEX encoding to support those new instructions git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107715 91177308-0d34-0410-b5e6-96231b3b80d8
* CanLowerReturn doesn't need a SelectionDAG; it just needs an LLVMContext.Dan Gohman2010-07-068-13/+12
| | | | | | | SelectBasicBlock doesn't needs its BasicBlock argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107712 91177308-0d34-0410-b5e6-96231b3b80d8
* Propagate debug loc.Devang Patel2010-07-0621-54/+64
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* Represent NEON load/store alignments in bytes, not bits.Bob Wilson2010-07-063-7/+13
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* One more case assuming that subregs have live ranges.Jakob Stoklund Olesen2010-07-061-2/+2
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* Closing tags start with slashes.John McCall2010-07-061-2/+2
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* Fix buildbot breakage where a def is missing.Jakob Stoklund Olesen2010-07-061-0/+2
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* Add fixme.Devang Patel2010-07-061-0/+1
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