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* Add LOAD NEGATIVE instructionAnton Korobeynikov2009-07-161-1/+9
* LOAD COMPLEMENT instruction is not really two-addrAnton Korobeynikov2009-07-161-4/+5
* Add multiple add/sub instructionsAnton Korobeynikov2009-07-161-0/+40
* Handle FP callee-saved regsAnton Korobeynikov2009-07-163-51/+102
* Proper FP extloadsAnton Korobeynikov2009-07-162-7/+9
* Add proper PWS impdef'sAnton Korobeynikov2009-07-162-21/+51
* Propagate FP select_cc to dag insertersAnton Korobeynikov2009-07-162-2/+19
* Implement fp_to_sintAnton Korobeynikov2009-07-161-1/+14
* Implement FP regs spills / restoresAnton Korobeynikov2009-07-161-0/+14
* Add fabsAnton Korobeynikov2009-07-161-0/+9
* Add fnegAnton Korobeynikov2009-07-161-0/+8
* We don't have native sine / cosine instructionsAnton Korobeynikov2009-07-161-0/+5
* More sint_to_fp stuffAnton Korobeynikov2009-07-161-0/+7
* Add bunch of FP instructionsAnton Korobeynikov2009-07-163-0/+163
* We don't have any FP extloadsAnton Korobeynikov2009-07-161-0/+7
* Implement all comparisonsAnton Korobeynikov2009-07-164-25/+96
* Add constpool lowering / printingAnton Korobeynikov2009-07-164-2/+35
* Allow FP arguments pass / returnAnton Korobeynikov2009-07-162-21/+39
* Register FP regclassesAnton Korobeynikov2009-07-161-0/+6
* Add FP regsAnton Korobeynikov2009-07-162-20/+89
* Fix fallout from prev. patchAnton Korobeynikov2009-07-161-4/+4
* Provide consistent subreg idx scheme. This (hopefully) fixes remaining divide...Anton Korobeynikov2009-07-164-35/+42
* Use divide single for 32 bit signed dividesAnton Korobeynikov2009-07-162-14/+28
* Add missed operands typesAnton Korobeynikov2009-07-161-0/+6
* Missed part of prev. patchAnton Korobeynikov2009-07-161-1/+3
* Another attempt to fix prologue emissionAnton Korobeynikov2009-07-162-10/+14
* Implement 'large' PIC modelAnton Korobeynikov2009-07-1610-9/+190
* Implement shifts properly (hopefilly - finally!)Anton Korobeynikov2009-07-164-21/+34
* Remove redundand register moveAnton Korobeynikov2009-07-162-21/+15
* Properly handle divides. As a bonus - implement memory versions of them.Anton Korobeynikov2009-07-166-66/+313
* Fix epic fail: full-width muls are not commutable. This unbreaks bunch of stu...Anton Korobeynikov2009-07-161-2/+1
* 32 bit rotate is not twoaddr instructionAnton Korobeynikov2009-07-161-2/+1
* 32 bit shifts have only 12 bit displacementsAnton Korobeynikov2009-07-164-5/+42
* Add proper register aliasesAnton Korobeynikov2009-07-162-20/+24
* Properly generate stack frameAnton Korobeynikov2009-07-161-5/+5
* Unbreak indirect branchesAnton Korobeynikov2009-07-161-1/+1
* UnbreakAnton Korobeynikov2009-07-161-24/+1
* Do not forget to save R15 when we allocate stack frameAnton Korobeynikov2009-07-161-1/+2
* All calls clobbers R14Anton Korobeynikov2009-07-161-3/+3
* Unbreak calls to vararg functionsAnton Korobeynikov2009-07-161-3/+1
* Stupid typoAnton Korobeynikov2009-07-161-1/+1
* TyposAnton Korobeynikov2009-07-161-2/+2
* Consolidate reg-imm / reg-reg-imm address mode selection logic in one place.Anton Korobeynikov2009-07-165-170/+156
* Fix fallout from 12-bit stuff landing: decide whether 20 bit displacements ar...Anton Korobeynikov2009-07-164-5/+56
* Add support for 12 bit displacementsAnton Korobeynikov2009-07-166-112/+353
* We already have reserved call frame regardless whether variable sized frame o...Anton Korobeynikov2009-07-162-16/+1
* Emit proper lowering of load from arg stack slotAnton Korobeynikov2009-07-162-10/+25
* Implement dynamic allocasAnton Korobeynikov2009-07-163-1/+22
* Add jump tablesAnton Korobeynikov2009-07-165-11/+69
* Exapnd br_jt into indirect branch. Provide pattern for indirect branches.Anton Korobeynikov2009-07-162-0/+7
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