aboutsummaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
* Fix typo (common to both X86 and PPC)Hal Finkel2013-03-272-2/+2
* Remove more dead LR-as-GPR PPC codeHal Finkel2013-03-271-16/+4
* Avoid undefined behavior from passing a std::vector's own contentsDan Gohman2013-03-271-1/+3
* Remove "gpr0 allocation" from the PPC README TODO listHal Finkel2013-03-271-1/+0
* Don't try to generate crash diagnostics if we had an I/O failure. It's veryChad Rosier2013-03-271-1/+1
* Add a boolean parameter to the llvm::report_fatal_error() function to indicatedChad Rosier2013-03-272-13/+18
* Specutively revert r178130.Bill Wendling2013-03-271-44/+29
* Fix commentDavid Blaikie2013-03-271-1/+1
* Cleanup the simplify_type implementation.Rafael Espindola2013-03-279-114/+67
* R600/SI: add SETO/SETUO patternsChristian Konig2013-03-273-0/+40
* Silence warning about mixing || in &&, fix up 80-cols.Benjamin Kramer2013-03-271-1/+3
* Print PPC ZERO as 0 (not r0) even on DarwinHal Finkel2013-03-272-5/+5
* Switch to LLVM support function abs64 to keep VS2008 happy.Tim Northover2013-03-272-4/+4
* Disable ASan/MSan symbolization of reports in tests.Evgeniy Stepanov2013-03-272-11/+0
* Fix target-customized spilling in the register scavengerHal Finkel2013-03-271-1/+1
* Disable Initialize.MultipleThreads test under MemorySanitizer.Evgeniy Stepanov2013-03-271-1/+1
* Enabling the generation of dependency breakers for partial updates on Cortex-...Silviu Baranga2013-03-274-11/+47
* Hexagon: Disable optimizations at O0.Jyotsna Verma2013-03-271-18/+31
* Improve performance of LinkModules when linking with modules with large numbe...James Molloy2013-03-271-29/+44
* R600/SI: add cummuting of rev instructionsChristian Konig2013-03-278-37/+90
* R600/SI: add mulhu/mulhs patternsChristian Konig2013-03-274-2/+36
* R600/SI: add srl/sha patterns for SIChristian Konig2013-03-273-2/+34
* Allocate r0 on PPCHal Finkel2013-03-272-2/+18
* Use the PPC no-r0 class on the TOC LD pseudosHal Finkel2013-03-271-2/+2
* Apply the no-r0 register class to the PPC SELECT_CC_I[4|8] pseudosHal Finkel2013-03-271-2/+7
* Apply the no-r0 class to PPC TOC ADDI[S] pseudo instructionsHal Finkel2013-03-271-9/+9
* Remove the link register from the GPR classes on PowerPC.Bill Schmidt2013-03-278-17/+17
* Added back in the test for arc-annotations.Michael Gottesman2013-03-271-0/+307
* Adding DIImportedModules to DIScopes.David Blaikie2013-03-2799-1354/+1473
* Don't spill PPC VRSAVE on non-Darwin (even in SjLj)Hal Finkel2013-03-275-6/+18
* Make DIBuilder::createClassType more type safe by returning DICompositeType r...David Blaikie2013-03-262-14/+17
* DebugInfo: more support for mutating DICompositeType to reduce magic number u...David Blaikie2013-03-262-1/+9
* Add a boolean parameter to the ExecuteAndWait static function to indicatedChad Rosier2013-03-262-5/+9
* Use the full path when outputting the `.gcda' file.Bill Wendling2013-03-261-5/+14
* Add XTEST codegen supportMichael Liao2013-03-266-1/+35
* Add HLE target featureMichael Liao2013-03-264-1/+14
* Enable SandyBridgeModel for all modern Intel P6 descendants.Jakob Stoklund Olesen2013-03-264-37/+47
* Debug Info: Provide a means to update the members of a composite typeDavid Blaikie2013-03-262-0/+12
* Restore real bit lengths on PPC register numbersHal Finkel2013-03-261-12/+12
* TableGen SubtargetEmitter fix to allow A9 and Swift to coexist.Andrew Trick2013-03-262-2/+24
* Fix the register scavenger for targets that provide custom spillingHal Finkel2013-03-262-4/+8
* PPC: Use HWEncoding and TRI->getEncodingValueHal Finkel2013-03-268-100/+31
* R600/SIMCCodeEmitter.cpp: Prune a couple of unused members, STI and Ctx. [-Wu...NAKAMURA Takumi2013-03-261-3/+1
* Use multiple virtual registers in PPC CR spillingHal Finkel2013-03-263-42/+58
* Update PPCRegisterInfo's use of virtual registers to be SSAHal Finkel2013-03-261-3/+5
* Update PEI's virtual-register-based scavenging to support multiple simultaneo...Hal Finkel2013-03-264-27/+43
* Annotate the remaining x86 instructions with SchedRW lists.Jakob Stoklund Olesen2013-03-263-10/+10
* Annotate x87 and mmx instructions with SchedRW lists.Jakob Stoklund Olesen2013-03-262-31/+71
* Annotate control instructions with SchedRW lists.Jakob Stoklund Olesen2013-03-261-28/+41
* Annotate the rest of X86InstrInfo.td with SchedRW lists.Jakob Stoklund Olesen2013-03-261-27/+43