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* Update aosp/master llvm for rebase to r233350Pirama Arumuga Nainar2015-04-091-3/+12
| | | | Change-Id: I07d935f8793ee8ec6b7da003f6483046594bca49
* Update aosp/master LLVM for rebase to r230699.Stephen Hines2015-03-231-3/+16
| | | | Change-Id: I2b5be30509658cb8266be782de0ab24f9099f9b9
* Update aosp/master LLVM for rebase to r222494.Stephen Hines2014-12-021-7/+11
| | | | Change-Id: Ic787f5e0124df789bd26f3f24680f45e678eef2d
* Update LLVM for 3.5 rebase (r209712).Stephen Hines2014-05-291-25/+41
| | | | Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
* Update to LLVM 3.5a.Stephen Hines2014-04-241-38/+332
| | | | Change-Id: Ifadecab779f128e62e430c2b4f6ddd84953ed617
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-191-1/+2
| | | | | | | | | | | | This patch removes most of the trivial cases of weak vtables by pinning them to a single object file. The memory leaks in this version have been fixed. Thanks Alexey for pointing them out. Differential Revision: http://llvm-reviews.chandlerc.com/D2068 Reviewed by Andy git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195064 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r194865 and r194874.Alexey Samsonov2013-11-181-2/+1
| | | | | | | | | | | | | This change is incorrect. If you delete virtual destructor of both a base class and a subclass, then the following code: Base *foo = new Child(); delete foo; will not cause the destructor for members of Child class. As a result, I observe plently of memory leaks. Notable examples I investigated are: ObjectBuffer and ObjectBufferStream, AttributeImpl and StringSAttributeImpl. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194997 91177308-0d34-0410-b5e6-96231b3b80d8
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-151-1/+2
| | | | | | | | | | | This patch removes most of the trivial cases of weak vtables by pinning them to a single object file. Differential Revision: http://llvm-reviews.chandlerc.com/D2068 Reviewed by Andy git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194865 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a convenient PSetIterator for visiting pressure sets affected by a register.Andrew Trick2013-08-231-0/+46
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189121 91177308-0d34-0410-b5e6-96231b3b80d8
* Notify LiveRangeEdit of new virtual registers.Mark Lacey2013-08-141-0/+27
| | | | | | | | | Add a delegate class to MachineRegisterInfo with a single virtual function, MRI_NoteNewVirtualRegister(). Update LiveRangeEdit to inherit from this delegate class and override the definition of the callback with an implementation that tracks the newly created virtual registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@188435 91177308-0d34-0410-b5e6-96231b3b80d8
* Handle more cases in LiveRangeEdit::eliminateDeadDefs.Andrew Trick2013-06-211-4/+4
| | | | | | | | | | Live intervals for dead physregs may be created during coalescing. We need to update these in the event that their instruction goes away. crash.ll is the unit test that catches it when MI sched is enabled on X86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184572 91177308-0d34-0410-b5e6-96231b3b80d8
* Directly access objects which may change during compilation.Bill Wendling2013-06-171-6/+15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@184121 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an MRI::verifyUseLists() function.Jakob Stoklund Olesen2013-04-191-0/+6
| | | | | | | This checks the sanity of the register use lists in the MI intermediate representation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179895 91177308-0d34-0410-b5e6-96231b3b80d8
* Residual cleanup: live-out set is goneEli Bendersky2013-03-111-8/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176836 91177308-0d34-0410-b5e6-96231b3b80d8
* Make RAFast::UsedInInstr indexed by register units.Jakob Stoklund Olesen2013-02-211-0/+6
| | | | | | | | | | This fixes some problems with too conservative checking where we were marking all aliases of a register as used, and then also checking all aliases when allocating a register. <rdar://problem/13249625> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175782 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove liveout lists from MachineRegisterInfo.Jakob Stoklund Olesen2013-02-051-11/+4
| | | | | | | | All targets are now adding return value registers as implicit uses on return instructions, and there is no longer a need for the live out lists. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174417 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MachineRegisterInfo::moveOperands().Jakob Stoklund Olesen2013-01-051-0/+3
| | | | | | | | | | | | | This function works like memmove() for MachineOperands, except it also updates any use-def chains containing the moved operands. The use-def chains are updated without affecting the order of operands in the list. That isn't possible when using the removeRegOperandFromUseList() and addRegOperandToUseList() functions. Callers to follow soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171597 91177308-0d34-0410-b5e6-96231b3b80d8
* Sort the #include lines for the include/... tree with the script.Chandler Carruth2012-12-031-2/+2
| | | | | | | | | | AKA: Recompile *ALL* the source code! This one went much better. No manual edits here. I spot-checked for silliness and grep-checked for really broken edits and everything seemed good. It all still compiles. Yell if you see something that looks goofy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169133 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch MRI::UsedPhysRegs to a register unit bit vector.Jakob Stoklund Olesen2012-10-171-10/+18
| | | | | | | This is a more compact, less redundant representation, and it avoids scanning long lists of aliases for ARM D-registers, for example. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166124 91177308-0d34-0410-b5e6-96231b3b80d8
* Merge MRI::isPhysRegOrOverlapUsed() into isPhysRegUsed().Jakob Stoklund Olesen2012-10-171-7/+6
| | | | | | | | | | | All callers of these functions really want the isPhysRegOrOverlapUsed() functionality which also checks aliases. For historical reasons, targets without register aliases were calling isPhysRegUsed() instead. Change isPhysRegUsed() to also check aliases, and switch all isPhysRegOrOverlapUsed() callers to isPhysRegUsed(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166117 91177308-0d34-0410-b5e6-96231b3b80d8
* Use a SparseSet instead of a BitVector for UsedInInstr in RAFast.Jakob Stoklund Olesen2012-10-171-4/+0
| | | | | | | | This is just as fast, and it makes it possible to avoid leaking the UsedPhysRegs BitVector implementation through MachineRegisterInfo::addPhysRegsUsed(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166083 91177308-0d34-0410-b5e6-96231b3b80d8
* Freeze the reserved registers as soon as isel is complete.Jakob Stoklund Olesen2012-10-151-3/+28
| | | | | | | | | | | | | Also provide an MRI::getReservedRegs() function to access the frozen register set, and isReserved() and isAllocatable() methods to test individual registers. The various implementations of TRI::getReservedRegs() are quite complicated, and many passes need to look at the reserved register set. This patch makes it possible for these passes to use the cached copy in MRI, avoiding a lot of malloc traffic and repeated calculations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165982 91177308-0d34-0410-b5e6-96231b3b80d8
* Mark unimplemented copy constructors and copy assignment operators as ↵Craig Topper2012-09-171-2/+2
| | | | | | LLVM_DELETED_FUNCTION. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164016 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r161633-161634 "Partition use lists so defs always come before uses.""Jakob Stoklund Olesen2012-08-101-9/+14
| | | | | | | No changes to these patches, MRI needed to be notified when changing uses into defs and vice versa. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161644 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r161633-161634 "Partition use lists so defs always come before uses."Jakob Stoklund Olesen2012-08-091-14/+9
| | | | | | These commits broke a number of buildbots. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161640 91177308-0d34-0410-b5e6-96231b3b80d8
* Partition use lists so defs always come before uses.Jakob Stoklund Olesen2012-08-091-5/+14
| | | | | | | | | | | | | | | | This makes it possible to speed up def_iterator by stopping at the first use. This makes def_empty() and getUniqueVRegDef() much faster when there are many uses. In a +Asserts build, LiveVariables is 100x faster in one case because getVRegDef() has an assertion that would scan to the end of a def_iterator chain. Spill weight calculation is significantly faster (300x in one case) because isTriviallyReMaterializable() calls MRI->isConstantPhysReg(%RIP) which calls def_empty(%RIP). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161634 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't use pointer-pointers for the register use lists.Jakob Stoklund Olesen2012-08-091-4/+0
| | | | | | | | | | | Use a more conventional doubly linked list where the Prev pointers form a cycle. This means it is no longer necessary to adjust the Prev pointers when reallocating the VRegInfo array. The test changes are required because the register allocation hint is using the use-list order to break ties. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161633 91177308-0d34-0410-b5e6-96231b3b80d8
* Move use list management into MachineRegisterInfo.Jakob Stoklund Olesen2012-08-091-14/+20
| | | | | | | | | | | | | | Register MachineOperands are kept in linked lists accessible via MRI's reg_iterator interfaces. The linked list management was handled partly by MachineOperand methods, partly by MRI methods. Move all of the list management into MRI, delete MO::AddRegOperandToRegInfo() and MO::RemoveRegOperandFromRegInfo(). Be more explicit about handling the cases where an MRI pointer isn't available. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161632 91177308-0d34-0410-b5e6-96231b3b80d8
* Move getNextOperandForReg() into MachineRegisterInfo.Jakob Stoklund Olesen2012-08-081-2/+11
| | | | | | | MRI provides iterators for traversing the use-def chains. They should not be accessible from anywhere else. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161543 91177308-0d34-0410-b5e6-96231b3b80d8
* Added MachineRegisterInfo::hasOneDef()Andrew Trick2012-07-301-0/+9
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161009 91177308-0d34-0410-b5e6-96231b3b80d8
* Inline MachineRegisterInfo::hasOneUseAndrew Trick2012-07-301-1/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161007 91177308-0d34-0410-b5e6-96231b3b80d8
* Add getUniqueVRegDef to MachineRegisterInfo.Manman Ren2012-06-291-0/+5
| | | | | | | This comes in handy during peephole optimization. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@159453 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch all register list clients to the new MC*Iterator interface.Jakob Stoklund Olesen2012-06-011-1/+1
| | | | | | | | | | | | | No functional change intended. Sorry for the churn. The iterator classes are supposed to help avoid giant commits like this one in the future. The TableGen-produced register lists are getting quite large, and it may be necessary to change the table representation. This makes it possible to do so without changing all clients (again). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157854 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an MRI::tracksLiveness() flag.Jakob Stoklund Olesen2012-03-271-0/+22
| | | | | | | | | | | | | | | | | | | | Late optimization passes like branch folding and tail duplication can transform the machine code in a way that makes it expensive to keep the register liveness information up to date. There is a fuzzy line between register allocation and late scheduling where the liveness information degrades. The MRI::tracksLiveness() flag makes the line clear: While true, liveness information is accurate, and can be used for register scavenging. Once the flag is false, liveness information is not accurate, and can only be used as a hint. Late passes generally don't need the liveness information, but they will sometimes use the register scavenger to help update it. The scavenger enforces strict correctness, and we have to spend a lot of code to update register liveness that may never be used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153511 91177308-0d34-0410-b5e6-96231b3b80d8
* Use uint16_t to store register overlaps to reduce static data.Craig Topper2012-03-041-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152001 91177308-0d34-0410-b5e6-96231b3b80d8
* Make InlineSpiller bundle-aware.Jakob Stoklund Olesen2012-03-011-0/+9
| | | | | | | | | | Simply treat bundles as instructions. Spill code is inserted between bundles, never inside a bundle. Rewrite all operands in a bundle at once. Don't attempt and memory operand folding inside bundles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151787 91177308-0d34-0410-b5e6-96231b3b80d8
* Clear virtual registers after they are no longer referenced.Andrew Trick2012-02-211-0/+3
| | | | | | | | | | | | | Passes after RegAlloc should be able to rely on MRI->getNumVirtRegs() == 0. This makes sharing code for pre/postRA passes more robust. Now, to check if a pass is running before the RA pipeline begins, use MRI->isSSA(). To check if a pass is running after the RA pipeline ends, use !MRI->getNumVirtRegs(). PEI resets virtual regs when it's done scavenging. PTX will either have to provide its own PEI pass or assign physregs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151032 91177308-0d34-0410-b5e6-96231b3b80d8
* whitespaceAndrew Trick2012-02-211-26/+26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151030 91177308-0d34-0410-b5e6-96231b3b80d8
* Transfer regmasks to MRI.Jakob Stoklund Olesen2012-02-171-8/+22
| | | | | | | | | MRI keeps track of which physregs have been used. Make sure it gets updated with all the regmask-clobbered registers. Delete the closePhysRegsUsed() function which isn't necessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150830 91177308-0d34-0410-b5e6-96231b3b80d8
* Extract method for detecting constant unallocatable physregs.Jakob Stoklund Olesen2012-01-161-1/+9
| | | | | | It is safe to move uses of such registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148259 91177308-0d34-0410-b5e6-96231b3b80d8
* Freeze reserved registers before starting register allocation.Jakob Stoklund Olesen2012-01-051-1/+38
| | | | | | | | | | | The register allocators don't currently support adding reserved registers while they are running. Extend the MRI API to keep track of the set of reserved registers when register allocation started. Target hooks like hasFP() and needsStackRealignment() can look at this set to avoid reserving more registers during register allocation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147577 91177308-0d34-0410-b5e6-96231b3b80d8
* Move common code into an MRI function.Jakob Stoklund Olesen2011-12-211-1/+10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147071 91177308-0d34-0410-b5e6-96231b3b80d8
* Admonish that MI is not IR and virtual registers have constraints.Jakob Stoklund Olesen2011-10-171-0/+8
| | | | | | | | In machine code, you can't just replaceRegWith() the same way you can replaceAllUsesWith() in IR. Virtual registers may have different register classes that need to be merged first. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142201 91177308-0d34-0410-b5e6-96231b3b80d8
* Move getCommonSubClass() into TRI.Jakob Stoklund Olesen2011-09-301-0/+2
| | | | | | It will soon need the context. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140896 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a MinNumRegs argument to MRI::constrainRegClass().Jakob Stoklund Olesen2011-09-221-3/+5
| | | | | | | | | | | The function will refuse to use a register class with fewer registers than MinNumRegs. This can be used by clients to avoid accidentally increase register pressure too much. The default value of MinNumRegs=0 doesn't affect how constrainRegClass() works. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140339 91177308-0d34-0410-b5e6-96231b3b80d8
* Move CalculateRegClass to MRI::recomputeRegClass.Jakob Stoklund Olesen2011-08-091-0/+11
| | | | | | | | This function doesn't have anything to do with spill weights, and MRI already has functions for manipulating the register class of a virtual register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137123 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an isSSA() flag to MachineRegisterInfo.Jakob Stoklund Olesen2011-07-291-1/+21
| | | | | | | | | | | | | This flag is true from isel to register allocation when the machine function is required to be in SSA form. The TwoAddressInstructionPass and PHIElimination passes clear the flag. The SSA flag wil be used by the machine code verifier to check for SSA form, and eventually an assertion can enforce it in +Asserts builds. This will catch the common target error of creating machine code with multiple defs of a virtual register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136532 91177308-0d34-0410-b5e6-96231b3b80d8
* Be more aggressive about following hints.Jakob Stoklund Olesen2011-07-081-0/+8
| | | | | | | | | | | | | | | | | | | | RAGreedy::tryAssign will now evict interference from the preferred register even when another register is free. To support this, add the EvictionCost struct that counts how many hints are broken by an eviction. We don't want to break one hint just to satisfy another. Rename canEvict to shouldEvict, and add the first bit of eviction policy that doesn't depend on spill weights: Always make room in the preferred register as long as the evictees can be split and aren't already assigned to their preferred register. Also make the CSR avoidance more accurate. When looking for a cheaper register it is OK to use a new volatile register. Only CSR aliases that have never been used before should be avoided. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134735 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove RegClass2VRegMap from MachineRegisterInfo.Evan Cheng2011-06-271-12/+0
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133967 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r124611 - "Keep track of incoming argument's location while emitting ↵Devang Patel2011-02-211-12/+2
| | | | | | | | | | | | | LiveIns." In other words, do not keep track of argument's location. The debugger (gdb) is not prepared to see line table entries for arguments. For the debugger, "second" line table entry marks beginning of function body. This requires some coordination with debugger to get this working. - The debugger needs to be aware of prolog_end attribute attached with line table entries. - The compiler needs to accurately mark prolog_end in line table entries (at -O0 and at -O1+) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126155 91177308-0d34-0410-b5e6-96231b3b80d8
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