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* Mark getRawBits const.Preston Gurd2013-02-141-1/+1
| | | | | | | | Patch by Tyler Nowicki. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175218 91177308-0d34-0410-b5e6-96231b3b80d8
* Renumber SlotIndexes locally when a new block is inserted.Cameron Zwarich2013-02-121-5/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174937 91177308-0d34-0410-b5e6-96231b3b80d8
* Add blocks to the LiveIntervalAnalysis RegMaskBlocks array when splittingCameron Zwarich2013-02-121-0/+7
| | | | | | a critical edge. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174936 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix some problems with the updating of SlotIndexes after adding a new MBB. InCameron Zwarich2013-02-111-13/+18
| | | | | | particular, holes were being left between two blocks after splitting an edge. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174868 91177308-0d34-0410-b5e6-96231b3b80d8
* Currently, codegen may spent some time in SDISel passes even if an entireEvan Cheng2013-02-111-0/+10
| | | | | | | | | | | | | | | function is successfully handled by fast-isel. That's because function arguments are *always* handled by SDISel. Introduce FastLowerArguments to allow each target to provide hook to handle formal argument lowering. As a proof-of-concept, add ARMFastIsel::FastLowerArguments to handle functions with 4 or fewer scalar integer (i8, i16, or i32) arguments. It completely eliminates the need for SDISel for trivial functions. rdar://13163905 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174855 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the unused but nearly correct method SlotIndexes::insertMBBInMaps() and addCameron Zwarich2013-02-101-10/+12
| | | | | | | | support for updating SlotIndexes to MachineBasicBlock::SplitCriticalEdge(). This calls renumberIndexes() every time; it should be improved to only renumber locally. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174851 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unneeded "TargetMachine.h" #includes.Jakub Staszak2013-02-091-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174817 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify code.Jakub Staszak2013-02-091-2/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174807 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove the old liveness algorithm.Jakob Stoklund Olesen2013-02-091-25/+0
| | | | | | This is part of the plan to delete LiveVariables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174783 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 172027 and 174336. Remove diagnostics about over-aligned stack objects.Bob Wilson2013-02-081-16/+3
| | | | | | | | | | | | Aside from the question of whether we report a warning or an error when we can't satisfy a requested stack object alignment, the current implementation of this is not good. We're not providing any source location in the diagnostics and the current warning is not connected to any warning group so you can't control it. We could improve the source location somewhat, but we can do a much better job if this check is implemented in the front-end, so let's do that instead. <rdar://problem/13127907> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174741 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove liveout lists from MachineRegisterInfo.Jakob Stoklund Olesen2013-02-051-11/+4
| | | | | | | | All targets are now adding return value registers as implicit uses on return instructions, and there is no longer a need for the live out lists. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174417 91177308-0d34-0410-b5e6-96231b3b80d8
* SelectionDAG: Teach FoldConstantArithmetic how to deal with vectors.Benjamin Kramer2013-02-041-4/+2
| | | | | | | | | | | | | | | | | This required disabling a PowerPC optimization that did the following: input: x = BUILD_VECTOR <i32 16, i32 16, i32 16, i32 16> lowered to: tmp = BUILD_VECTOR <i32 8, i32 8, i32 8, i32 8> x = ADD tmp, tmp The add now gets folded immediately and we're back at the BUILD_VECTOR we started from. I don't see a way to fix this currently so I left it disabled for now. Fix some trivially foldable X86 tests too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174325 91177308-0d34-0410-b5e6-96231b3b80d8
* Correct indentation for dumping LexicalScope.Manman Ren2013-02-021-7/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174237 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach SDISel to combine fsin / fcos into a fsincos node if the followingEvan Cheng2013-01-292-0/+8
| | | | | | | | | | | | | | | | | | | conditions are met: 1. They share the same operand and are in the same BB. 2. Both outputs are used. 3. The target has a native instruction that maps to ISD::FSINCOS node or the target provides a sincos library call. Implemented the generic optimization in sdisel and enabled it for Mac OSX. Also added an additional optimization for x86_64 Mac OSX by using an alternative entry point __sincos_stret which returns the two results in xmm0 / xmm1. rdar://13087969 PR13204 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173755 91177308-0d34-0410-b5e6-96231b3b80d8
* MachineScheduler support for viewGraph.Andrew Trick2013-01-252-2/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173432 91177308-0d34-0410-b5e6-96231b3b80d8
* ScheduleDAG: colorize the DOT graph and improve formatting.Andrew Trick2013-01-251-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173431 91177308-0d34-0410-b5e6-96231b3b80d8
* ScheduleDAG: Added isBoundaryNode to conveniently detect a common corner case.Andrew Trick2013-01-251-1/+12
| | | | | | This fixes DAG subtree analysis at the boundary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173427 91177308-0d34-0410-b5e6-96231b3b80d8
* SchedDFS: Complete support for nested subtrees.Andrew Trick2013-01-251-9/+35
| | | | | | | | | Maintain separate per-node and per-tree book-keeping. Track all instructions above a DAG node including nested subtrees. Seperately track instructions within a subtree. Record subtree parents. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173426 91177308-0d34-0410-b5e6-96231b3b80d8
* MIsched: Improve the interface to SchedDFS analysis (subtrees).Andrew Trick2013-01-252-9/+12
| | | | | | | Allow the strategy to select SchedDFS. Allow the results of SchedDFS to affect initialization of the scheduler state. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173425 91177308-0d34-0410-b5e6-96231b3b80d8
* SchedDFS: Initial support for nested subtrees.Andrew Trick2013-01-251-5/+17
| | | | | | | This is mostly refactoring, along with adding an instruction count within the subtrees and ensuring we only look at data edges. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173420 91177308-0d34-0410-b5e6-96231b3b80d8
* MISched: Add SchedDFSResult to ScheduleDAGMI to formalize theAndrew Trick2013-01-251-5/+25
| | | | | | interface and allow other strategies to select it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173413 91177308-0d34-0410-b5e6-96231b3b80d8
* SchedDFS: Constify interface.Andrew Trick2013-01-251-3/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173398 91177308-0d34-0410-b5e6-96231b3b80d8
* MIsched: Added biasCriticalPath.Andrew Trick2013-01-241-0/+4
| | | | | | | Allow schedulers to order DAG edges by critical path. This makes DFS-based heuristics more stable and effective. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173317 91177308-0d34-0410-b5e6-96231b3b80d8
* Make APFloat constructor require explicit semantics.Tim Northover2013-01-221-0/+14
| | | | | | | | | Previously we tried to infer it from the bit width size, with an added IsIEEE argument for the PPC/IEEE 128-bit case, which had a default value. This default value allowed bugs to creep in, where it was inappropriate. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173138 91177308-0d34-0410-b5e6-96231b3b80d8
* Introduce a new data structure, the SparseMultiSet, and changes to the MI ↵Michael Ilseman2013-01-211-46/+9
| | | | | | | | | | scheduler to use it. A SparseMultiSet adds multiset behavior to SparseSet, while retaining SparseSet's desirable properties. Essentially, SparseMultiSet provides multiset behavior by storing its dense data in doubly linked lists that are inlined into the dense vector. This allows it to provide good data locality as well as vector-like constant-time clear() and fast constant time find(), insert(), and erase(). It also allows SparseMultiSet to have a builtin recycler rather than keeping SparseSet's behavior of always swapping upon removal, which allows it to preserve more iterators. It's often a better alternative to a SparseSet of a growable container or vector-of-vector. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173064 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unused parameter. Also use the AttributeSet query methods instead of ↵Bill Wendling2013-01-181-2/+1
| | | | | | the Attribute query methods. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172852 91177308-0d34-0410-b5e6-96231b3b80d8
* Move MachineTraceMetrics.h into include/llvm/CodeGen.Jakob Stoklund Olesen2013-01-171-0/+350
| | | | | | Let targets use it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172688 91177308-0d34-0410-b5e6-96231b3b80d8
* Provide a place for targets to insert ILP optimization passes.Jakob Stoklund Olesen2013-01-171-0/+10
| | | | | | | | | | | | | | Move the early if-conversion pass into this group. ILP optimizations usually need to find the right balance between register pressure and ILP using the MachineTraceMetrics analysis to identify critical paths and estimate other costs. Such passes should run together so they can share dominator tree and loop info analyses. Besides if-conversion, future passes to run here here could include expression height reduction and ARM's MLxExpansion pass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172687 91177308-0d34-0410-b5e6-96231b3b80d8
* Precompute some information about register costs.Jakob Stoklund Olesen2013-01-121-1/+21
| | | | | | | | | | | Remember the minimum cost of the registers in an allocation order and the number of registers at the end of the allocation order that have the same cost per use. This information can be used to limit the search space for RAGreedy::tryEvict() when looking for a cheaper register. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172280 91177308-0d34-0410-b5e6-96231b3b80d8
* Split TargetLowering into a CodeGen and a SelectionDAG part.Benjamin Kramer2013-01-111-3/+5
| | | | | | | | | This fixes some of the cycles between libCodeGen and libSelectionDAG. It's still a complete mess but as long as the edges consist of virtual call it doesn't cause breakage. BasicTTI did static calls and thus broke some build configurations. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172246 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove unneeded includes from FunctionLoweringInfo.h.Jakub Staszak2013-01-101-4/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172123 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow hasProperty() to be called on bundle-internal instructions.Jakob Stoklund Olesen2013-01-101-3/+3
| | | | | | | | | | | | | When calling hasProperty() on an instruction inside a bundle, it should always behave as if IgnoreBundle was passed, and just return properties for the current instruction. Only attempt to aggregate bundle properties whan asked about the bundle header. The assertion fires on existing ARM test cases without this fix. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172082 91177308-0d34-0410-b5e6-96231b3b80d8
* Support headerless bundles in MachineInstr::hasProperty().Jakob Stoklund Olesen2013-01-101-1/+1
| | | | | | This function can still work without a BUNDLE header instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172029 91177308-0d34-0410-b5e6-96231b3b80d8
* Stack Alignment: throw error if we can't satisfy the minimal alignmentManman Ren2013-01-101-3/+16
| | | | | | | | | | | | | | | | | | | requirement when creating stack objects in MachineFrameInfo. Add CreateStackObjectWithMinAlign to throw error when the minimal alignment can't be achieved and to clamp the alignment when the preferred alignment can't be achieved. Same is true for CreateVariableSizedObject. Will not emit error in CreateSpillStackObject or CreateStackObject. As long as callers of CreateStackObject do not assume the object will be aligned at the requested alignment, we should not have miscompile since later optimizations which look at the object's alignment will have the correct information. rdar://12713765 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172027 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix include guards so they exactly match file names.Jakub Staszak2013-01-1019-40/+40
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@172025 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't require BUNDLE headers in MachineInstr::getBundleSize().Jakob Stoklund Olesen2013-01-091-1/+5
| | | | | | | | It is possible to build MI bundles that don't begin with a BUNDLE header. Add support for such bundles, counting all instructions inside the bundle. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171985 91177308-0d34-0410-b5e6-96231b3b80d8
* MIsched: add an ILP window property to machine model.Andrew Trick2013-01-091-0/+3
| | | | | | | | | | This was an experimental option, but needs to be defined per-target. e.g. PPC A2 needs to aggressively hide latency. I converted some in-order scheduling tests to A2. Hal is working on more test cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171946 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a getBundleEnd() function to go with the existing getBundleStart().Jakob Stoklund Olesen2013-01-092-7/+22
| | | | | | This is easier implemented now that bundle flags are symmetric. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171927 91177308-0d34-0410-b5e6-96231b3b80d8
* Add fp128 rtlib function names to LLVMTim Northover2013-01-081-0/+46
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171867 91177308-0d34-0410-b5e6-96231b3b80d8
* Sink a function that refers to the SelectionDAG into that library in theChandler Carruth2013-01-081-3/+0
| | | | | | | | | | | | | | one file where it is called as a static function. Nuke the declaration and the definition in lib/CodeGen, along with the include of SelectionDAG.h from this file. There is no dependency edge from lib/CodeGen to lib/CodeGen/SelectionDAG, so it isn't valid for a routine in lib/CodeGen to reference the DAG. There is a dependency from lib/CodeGen/SelectionDAG on lib/CodeGen. This breaks one violation of this layering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171842 91177308-0d34-0410-b5e6-96231b3b80d8
* Pack MachineOperand bitfields better.Jakob Stoklund Olesen2013-01-071-21/+19
| | | | | | Previously, 4 bits were unused. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171814 91177308-0d34-0410-b5e6-96231b3b80d8
* Pack MachineInstr fields better.Jakob Stoklund Olesen2013-01-071-2/+3
| | | | | | This shrinks MachineInstr to 64 bytes (from 72). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171813 91177308-0d34-0410-b5e6-96231b3b80d8
* CallingConvLower.h: Use bitfields like unsigned:1 instead of bool:1 .NAKAMURA Takumi2013-01-071-2/+2
| | | | | | Some compilers might be confused if bool were potentially signed integer. In my case, g++-4.7.0 miscompiled CodeGen/ARM. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171727 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch TargetTransformInfo from an immutable analysis pass that requiresChandler Carruth2013-01-071-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | a TargetMachine to construct (and thus isn't always available), to an analysis group that supports layered implementations much like AliasAnalysis does. This is a pretty massive change, with a few parts that I was unable to easily separate (sorry), so I'll walk through it. The first step of this conversion was to make TargetTransformInfo an analysis group, and to sink the nonce implementations in ScalarTargetTransformInfo and VectorTargetTranformInfo into a NoTargetTransformInfo pass. This allows other passes to add a hard requirement on TTI, and assume they will always get at least on implementation. The TargetTransformInfo analysis group leverages the delegation chaining trick that AliasAnalysis uses, where the base class for the analysis group delegates to the previous analysis *pass*, allowing all but tho NoFoo analysis passes to only implement the parts of the interfaces they support. It also introduces a new trick where each pass in the group retains a pointer to the top-most pass that has been initialized. This allows passes to implement one API in terms of another API and benefit when some other pass above them in the stack has more precise results for the second API. The second step of this conversion is to create a pass that implements the TargetTransformInfo analysis using the target-independent abstractions in the code generator. This replaces the ScalarTargetTransformImpl and VectorTargetTransformImpl classes in lib/Target with a single pass in lib/CodeGen called BasicTargetTransformInfo. This class actually provides most of the TTI functionality, basing it upon the TargetLowering abstraction and other information in the target independent code generator. The third step of the conversion adds support to all TargetMachines to register custom analysis passes. This allows building those passes with access to TargetLowering or other target-specific classes, and it also allows each target to customize the set of analysis passes desired in the pass manager. The baseline LLVMTargetMachine implements this interface to add the BasicTTI pass to the pass manager, and all of the tools that want to support target-aware TTI passes call this routine on whatever target machine they end up with to add the appropriate passes. The fourth step of the conversion created target-specific TTI analysis passes for the X86 and ARM backends. These passes contain the custom logic that was previously in their extensions of the ScalarTargetTransformInfo and VectorTargetTransformInfo interfaces. I separated them into their own file, as now all of the interface bits are private and they just expose a function to create the pass itself. Then I extended these target machines to set up a custom set of analysis passes, first adding BasicTTI as a fallback, and then adding their customized TTI implementations. The fourth step required logic that was shared between the target independent layer and the specific targets to move to a different interface, as they no longer derive from each other. As a consequence, a helper functions were added to TargetLowering representing the common logic needed both in the target implementation and the codegen implementation of the TTI pass. While technically this is the only change that could have been committed separately, it would have been a nightmare to extract. The final step of the conversion was just to delete all the old boilerplate. This got rid of the ScalarTargetTransformInfo and VectorTargetTransformInfo classes, all of the support in all of the targets for producing instances of them, and all of the support in the tools for manually constructing a pass based around them. Now that TTI is a relatively normal analysis group, two things become straightforward. First, we can sink it into lib/Analysis which is a more natural layer for it to live. Second, clients of this interface can depend on it *always* being available which will simplify their code and behavior. These (and other) simplifications will follow in subsequent commits, this one is clearly big enough. Finally, I'm very aware that much of the comments and documentation needs to be updated. As soon as I had this working, and plausibly well commented, I wanted to get it committed and in front of the build bots. I'll be doing a few passes over documentation later if it sticks. Commits to update DragonEgg and Clang will be made presently. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171681 91177308-0d34-0410-b5e6-96231b3b80d8
* Funnel the actual TargetTransformInfo pass from the SelectionDAGISelChandler Carruth2013-01-052-1/+6
| | | | | | | | | pass into the SelectionDAG itself rather than snooping on the implementation of that pass as exposed by the TargetMachine. This removes the last direct client of the ScalarTargetTransformInfo class outside of the TTI pass implementation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171625 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't call destructors on MachineInstr and MachineOperand.Jakob Stoklund Olesen2013-01-051-2/+6
| | | | | | | | | | | | | | | | | | | | The series of patches leading up to this one makes llc -O0 run 8% faster. When deallocating a MachineFunction, there is no need to visit all MachineInstr and MachineOperand objects to deallocate them. All their memory come from a BumpPtrAllocator that is about to be purged, and they have empty destructors anyway. This only applies when deallocating the MachineFunction. DeleteMachineInstr() should still be used to recycle MI memory during the codegen passes. Remove the LeakDetector support for MachineInstr. I've never seen it used before, and now it definitely doesn't work. With this patch, leaked MachineInstrs would be much less of a problem since all of their memory will be reclaimed by ~MachineFunction(). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171599 91177308-0d34-0410-b5e6-96231b3b80d8
* Use ArrayRecycler for MachineInstr operand lists.Jakob Stoklund Olesen2013-01-053-9/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of an std::vector<MachineOperand>, use MachineOperand arrays from an ArrayRecycler living in MachineFunction. This has several advantages: - MachineInstr now has a trivial destructor, making it possible to delete them in batches when destroying MachineFunction. This will be enabled in a later patch. - Bypassing malloc() and free() can be faster, depending on the system library. - MachineInstr objects and their operands are allocated from the same BumpPtrAllocator, so they will usually be next to each other in memory, providing better locality of reference. - Reduce MachineInstr footprint. A std::vector is 24 bytes, the new operand array representation only uses 8+4+1 bytes in MachineInstr. - Better control over operand array reallocations. In the old representation, the use-def chains would be reordered whenever a std::vector reached its capacity. The new implementation never changes the use-def chain order. Note that some decisions in the code generator depend on the use-def chain orders, so this patch may cause different assembly to be produced in a few cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171598 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MachineRegisterInfo::moveOperands().Jakob Stoklund Olesen2013-01-051-0/+3
| | | | | | | | | | | | | This function works like memmove() for MachineOperands, except it also updates any use-def chains containing the moved operands. The use-def chains are updated without affecting the order of operands in the list. That isn't possible when using the removeRegOperandFromUseList() and addRegOperandToUseList() functions. Callers to follow soon. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171597 91177308-0d34-0410-b5e6-96231b3b80d8
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-0211-15/+15
| | | | | | | | | | | | | | | | | | | | | into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
* Provide a common half-open interval map info implementation, and justChandler Carruth2012-12-271-11/+3
| | | | | | | re-use that for SlotIndexes. This way other users who want half-open semantics can share the implementation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171158 91177308-0d34-0410-b5e6-96231b3b80d8
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