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* Cosmetic change.Evan Cheng2008-03-291-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48935 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename getAnyLoad to getLoad is suggested by Evan.Duncan Sands2008-03-281-5/+5
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48914 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement LegalizeTypes support for softfloat LOAD.Duncan Sands2008-03-271-0/+5
| | | | | | | | | In order to handle indexed nodes I had to introduce a new constructor, and since I was there I factorized the code in the various load constructors. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48894 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid creating chain dependencies from CopyToReg nodes to load and storeDan Gohman2008-03-271-2/+1
| | | | | | | | | | | | | | | | | | | nodes. This doesn't currently have much impact the generated code, but it does produce simpler-looking SelectionDAGs, and consequently simpler-looking ScheduleDAGs, because there are fewer spurious dependencies. In particular, CopyValueToVirtualRegister now uses the entry node as the input chain dependency for new CopyToReg nodes instead of calling getRoot and depending on the most recent memory reference. Also, rename UnorderedChains to PendingExports and pull it up from being a local variable in SelectionDAGISel::BuildSelectionDAG to being a member variable of SelectionDAGISel, so that it doesn't have to be passed around to all the places that need it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48893 91177308-0d34-0410-b5e6-96231b3b80d8
* Use a linked data structure for the uses lists of an SDNode, just like Roman Levenstein2008-03-262-62/+227
| | | | | | | | | | | | | | | LLVM Value/Use does and MachineRegisterInfo/MachineOperand does. This allows constant time for all uses list maintenance operations. The idea was suggested by Chris. Reviewed by Evan and Dan. Patch is tested and approved by Dan. On normal use-cases compilation speed is not affected. On very big basic blocks there are compilation speedups in the range of 15-20% or even better. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48822 91177308-0d34-0410-b5e6-96231b3b80d8
* A quick nm audit turned up several fixed tables and objects that wereDan Gohman2008-03-251-3/+3
| | | | | | | | marked read-write. Use const so that they can be allocated in a read-only segment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48800 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach DAG combiner to commute commutable binary nodes in order to achieve ↵Evan Cheng2008-03-221-0/+5
| | | | | | sdisel CSE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48673 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't include <map> in Pass.h, which doesn't need it. This requiresDan Gohman2008-03-211-0/+1
| | | | | | | adding <map> to many files that actually do need it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48667 91177308-0d34-0410-b5e6-96231b3b80d8
* Introduce a new node for holding call argumentDuncan Sands2008-03-213-30/+101
| | | | | | | | | | | | | | | | | | flags. This is needed by the new legalize types infrastructure which wants to expand the 64 bit constants previously used to hold the flags on 32 bit machines. There are two functional changes: (1) in LowerArguments, if a parameter has the zext attribute set then that is marked in the flags; before it was being ignored; (2) PPC had some bogus code for handling two word arguments when using the ELF 32 ABI, which was hard to convert because of the bogusness. As suggested by the original author (Nicolas Geoffray), I've disabled it for the moment. Tested with "make check" and the Ada ACATS testsuite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48640 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix live variables issues:Evan Cheng2008-03-191-0/+6
| | | | | | | | | | | | 1. If part of a register is re-defined, an implicit kill and an implicit def are added to denote read / mod / write. However, this should only be necessary if the register is actually read later. This is a performance issue. 2. If a sub-register is being defined, and it doesn't have a previous use, do not add a implicit kill to the last use of a super-register: = EAX, AX<imp-use,kill> ... AX = In this case, EAX is live but AX is killed, this is wrong and will cause the coalescer to do bad things. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48521 91177308-0d34-0410-b5e6-96231b3b80d8
* Replace all target specific implicit def instructions with a target ↵Evan Cheng2008-03-151-0/+8
| | | | | | independent one: TargetInstrInfo::IMPLICIT_DEF. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48380 91177308-0d34-0410-b5e6-96231b3b80d8
* Back out r48353. Not needed.Evan Cheng2008-03-142-16/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48375 91177308-0d34-0410-b5e6-96231b3b80d8
* Add an MO_Undef MachineOperandType, intended for INSERT_SUBREG. Next up ↵Evan Cheng2008-03-142-4/+16
| | | | | | MO_Undead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48353 91177308-0d34-0410-b5e6-96231b3b80d8
* Forgot this.Evan Cheng2008-03-141-8/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48349 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a typo in a comment.Dan Gohman2008-03-131-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48345 91177308-0d34-0410-b5e6-96231b3b80d8
* Improve VarInfo::removeKill() by using std::find instead of linear search.Evan Cheng2008-03-131-7/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48321 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor some code out of MachineSink into a MachineInstr query.Evan Cheng2008-03-131-1/+7
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48311 91177308-0d34-0410-b5e6-96231b3b80d8
* Experimental scheduler change to schedule / coalesce the copies added for ↵Evan Cheng2008-03-121-1/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted: entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0: Live Ins: %EAX %EDX %ECX %reg1031<def> = MOVPC32r 0 %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def> %reg1028<def> = MOV32rr %EAX %reg1029<def> = MOV32rr %EDX %reg1030<def> = MOV32rr %ECX %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0] %reg1025<def> = MOV32rr %reg1029 %reg1026<def> = MOV32rr %reg1030 %reg1024<def> = MOV32rr %reg1028 The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled. With -schedule-livein-copies: entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0: Live Ins: %EAX %EDX %ECX %reg1031<def> = MOVPC32r 0 %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def> %reg1024<def> = MOV32rr %EAX %reg1025<def> = MOV32rr %EDX %reg1026<def> = MOV32rr %ECX %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0] Much better! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48307 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't try to extract an i32 from an f64. ThisDuncan Sands2008-03-121-4/+4
| | | | | | | | | | | | | getCopyToParts problem was noticed by the new LegalizeTypes infrastructure. In order to avoid this kind of thing in the future I've added a check that EXTRACT_ELEMENT is only used with integers. Once LegalizeTypes is up and running most likely BUILD_PAIR and EXTRACT_ELEMENT can be removed, in favour of using apints instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48294 91177308-0d34-0410-b5e6-96231b3b80d8
* Document an implementation detail about EXTRACT_SUBREG and INSERT_SUBREG ↵Evan Cheng2008-03-121-0/+3
| | | | | | sub-register operand. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48283 91177308-0d34-0410-b5e6-96231b3b80d8
* Use PassManagerBase instead of FunctionPassManager for functionsDan Gohman2008-03-111-3/+3
| | | | | | | | | that merely add passes. This allows them to be used with either FunctionPassManager or PassManager, or even with a custom new kind of pass manager. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48256 91177308-0d34-0410-b5e6-96231b3b80d8
* When the register allocator runs out of registers, spill a physical register ↵Evan Cheng2008-03-111-0/+18
| | | | | | around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48218 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement more support for fp-to-i128 and i128-to-fp conversions. Dan Gohman2008-03-101-0/+8
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48189 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.Evan Cheng2008-03-101-5/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48167 91177308-0d34-0410-b5e6-96231b3b80d8
* Use uint64_t not unsigned long long.Dale Johannesen2008-03-101-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48154 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow insert_subreg into implicit, target-specific values. Christopher Lamb2008-03-101-2/+5
| | | | | | | | Change insert/extract subreg instructions to be able to be used in TableGen patterns. Use the above features to reimplement an x86-64 pseudo instruction as a pattern. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48130 91177308-0d34-0410-b5e6-96231b3b80d8
* Increase ISD::ParamFlags to 64 bits. Increase the ByValSizeDale Johannesen2008-03-102-23/+27
| | | | | | | | | | | | field to 32 bits, thus enabling correct handling of ByVal structs bigger than 0x1ffff. Abstract interface a bit. Fixes gcc.c-torture/execute/pr23135.c and gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing on ppc32, quietly producing wrong code on x86-32.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48122 91177308-0d34-0410-b5e6-96231b3b80d8
* Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} ↵Evan Cheng2008-03-081-0/+5
| | | | | | and prefetchnta instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48042 91177308-0d34-0410-b5e6-96231b3b80d8
* When setting the "unused" info, take into account something like this:Bill Wendling2008-03-061-1/+1
| | | | | | | | | %r3<def> = OR %x3<kill>, %x3 We don't want to mark the %r3 as unused even though it's a sub-register of %x3. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48003 91177308-0d34-0410-b5e6-96231b3b80d8
* Clarify that CALLSEQ_START..END may not be nested,Dale Johannesen2008-03-051-0/+1
| | | | | | | | and add some protection against creating such. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47957 91177308-0d34-0410-b5e6-96231b3b80d8
* Codegen support for i128 SINT_TO_FP.Dan Gohman2008-03-051-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47928 91177308-0d34-0410-b5e6-96231b3b80d8
* Refactor code. Remove duplicated functions that basically do the same thing asEvan Cheng2008-03-053-16/+59
| | | | | | | findRegisterUseOperandIdx, findRegisterDefOperandIndx. Fix some naming inconsistencies. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47927 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename isOperand() to isOperandOf() (and other similar methods). It always ↵Evan Cheng2008-03-041-10/+10
| | | | | | confuses me. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47872 91177308-0d34-0410-b5e6-96231b3b80d8
* This is the initial check-in for adding register scavenging to PPC. (Currently,Bill Wendling2008-03-031-2/+2
| | | | | | | | | | | PPC-64 doesn't work.) This also lowers the spilling of the CR registers so that it uses a register other than the default R0 register (the scavenger scrounges for one). A significant part of this patch fixes how kill information is handled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47863 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MVT::is128BitVector and is64BitVector. ShrinkDale Johannesen2008-03-011-0/+13
| | | | | | | | | unaligned load/store code using them. Per review of unaligned load/store vector patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47782 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't fill eh frames even though these are text sections.Evan Cheng2008-02-291-2/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47765 91177308-0d34-0410-b5e6-96231b3b80d8
* Document that the shuffle mask may contain undefDuncan Sands2008-02-281-7/+7
| | | | | | | values. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47719 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to ↵Evan Cheng2008-02-284-7/+26
| | | | | | 16-byte boundaries. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47703 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a bug in dead spill slot elimination.Evan Cheng2008-02-271-0/+4
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47687 91177308-0d34-0410-b5e6-96231b3b80d8
* LegalizeTypes support for INSERT_VECTOR_ELT.Duncan Sands2008-02-271-1/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47669 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't track max alignment during stack object allocations since they can be ↵Evan Cheng2008-02-271-4/+0
| | | | | | deleted later. Let PEI compute it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47668 91177308-0d34-0410-b5e6-96231b3b80d8
* Spiller now remove unused spill slots.Evan Cheng2008-02-271-1/+21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47657 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert the last remaining users of the non-APInt form ofDan Gohman2008-02-271-6/+0
| | | | | | | | ComputeMaskedBits to use the APInt form, and remove the non-APInt form. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47654 91177308-0d34-0410-b5e6-96231b3b80d8
* DetabifyBill Wendling2008-02-262-6/+6
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47597 91177308-0d34-0410-b5e6-96231b3b80d8
* Factor the assert for indexed loads/stores out of LoadSDNodeDan Gohman2008-02-251-8/+4
| | | | | | | and StoreSDNode into LSBaseSDNode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47570 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert MaskedValueIsZero and all its users to use APInt. Also addDan Gohman2008-02-251-1/+5
| | | | | | | a SignBitIsZero function to simplify a common use case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47561 91177308-0d34-0410-b5e6-96231b3b80d8
* add LSBaseSDNode::getOffset at Dan's request.Chris Lattner2008-02-251-0/+3
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47558 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a new method to SDNode/SDOperand named getValueSizeInBitsDan Gohman2008-02-251-0/+12
| | | | | | | | that combines getValueType and MVT::getSizeInBits, since this occurrs frequently. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47552 91177308-0d34-0410-b5e6-96231b3b80d8
* Correctly determine whether a argument load can be folded into its uses.Evan Cheng2008-02-251-2/+2
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47545 91177308-0d34-0410-b5e6-96231b3b80d8
* Forgot this.Evan Cheng2008-02-231-1/+1
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@47510 91177308-0d34-0410-b5e6-96231b3b80d8
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